NSC CD4093BC
CD4093BM/CD4093BC Quad
2-Input NAND Schmitt Trigger
Y
General Description
Y
The CD4093B consists of four Schmitt-trigger circuits. Each
circuit functions as a 2-input NAND gate with Schmitt-trigger
action on both inputs. The gate switches at different points
for positive and negative-going signals. The difference between the positive (VT a ) and the negative voltage (VTb) is
defined as hysteresis voltage (VH).
All outputs have equal source and sink currents and conform to standard B-series output drive (see Static Electrical
Characteristics).
Y
Y
Applications
Y
Features
Y
Y
Y
Y
Wide supply voltage range
Schmitt-trigger on each input
with no external components
Noise immunity greater than 50%
3.0V to 15V
Equal source and sink currents
No limit on input rise and fall time
Standard B-series output drive
Hysteresis voltage (any input) TA e 25§ C
VH e 1.5V
Typical
VDD e 5.0V
VDD e 10V
VH e 2.2V
VDD e 15V
VH e 2.7V
Guaranteed
VH e 0.1 VDD
Y
Y
Y
Wave and pulse shapers
High-noise-environment systems
Monostable multivibrators
Astable multivibrators
NAND logic
Connection Diagram
Dual-In-Line Package
TL/F/5982 – 1
Top View
Order Number CD4093B
C1995 National Semiconductor Corporation
TL/F/5982
RRD-B30M105/Printed in U. S. A.
CD4093BM/CD4093BC Quad 2-Input NAND Schmitt Trigger
February 1993
Absolute Maximum Ratings (Notes 1 & 2)
Recommended Operating
Conditions (Note 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
DC Supply Voltage (VDD)
Input Voltage (VIN)
Storage Temperature Range (TS)
Power Dissipation (PD)
Dual-In-Line
Small Outline
Lead Temperature (TL)
(Soldering, 10 seconds)
DC Supply Voltage (VDD)
Input Voltage (VIN)
Operating Temperature Range (TA)
CD4093BM
CD4093BC
b 0.5 to a 18 VDC
b 0.5 to VDD a 0.5 VDC
b 65§ C to a 150§ C
3 to 15 VDC
0 to VDD VDC
b 55§ C to a 125§ C
b 40§ C to a 85§ C
700 mW
500 mW
260§ C
DC Electrical Characteristics CD4093BM (Note 2)
Symbol
Parameter
b 55§ C
Conditions
Min
Max
IDD
Quiescent Device
Current
VDD e 5V
VDD e 10V
VDD e 15V
0.25
0.5
1.0
VOL
Low Level
Output Voltage
VIN e VDD, lIOl k 1 mA
VDD e 5V
VDD e 10V
VDD e 15V
0.05
0.05
0.05
High Level
Output Voltage
VIN e VSS, lIOl k 1 mA
VDD e 5V
VDD e 10V
VDD e 15V
4.95
9.95
14.95
Negative-Going Threshold
Voltage (Any Input)
lIOl k 1 mA
VDD e 5V, VO e 4.5V
VDD e 10V, VO e 9V
VDD e 15V, VO e 13.5V
1.3
2.85
4.35
Positive-Going Threshold
Voltage (Any Input)
lIOl k 1 mA
VDD e 5V, VO e 0.5V
VDD e 10V, VO e 1V
VDD e 15V, VO e 1.5V
VH
Hysteresis (VT a b VTb)
(Any Input)
IOL
VOH
VTb
VT a
IOH
IIN
a 25§ C
Min
Typ
0
0
0
a 125§ C
Max
Min
Units
Max
0.25
0.5
1.0
7.5
15.0
30.0
mA
mA
mA
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
4.95
9.95
14.95
5
10
15
2.25
4.5
6.75
1.5
3.0
4.5
1.8
4.1
6.3
2.25
4.5
6.75
1.5
3.0
4.5
2.3
4.65
6.9
V
V
V
2.75
5.5
8.25
3.65
7.15
10.65
2.75
5.5
8.25
3.3
6.2
9.0
3.5
7.0
10.5
2.65
5.35
8.1
3.5
7.0
10.5
V
V
V
VDD e 5V
VDD e 10V
VDD e 15V
0.5
1.0
1.5
2.35
4.30
6.30
0.5
1.0
1.5
1.5
2.2
2.7
2.0
4.0
6.0
0.35
0.70
1.20
2.0
4.0
6.0
V
V
V
Low Level Output
Current (Note 3)
VIN e VDD
VDD e 5V, VO e 0.4V
VDD e 10V, VO e 0.5V
VDD e 15V, VO e 1.5V
0.64
1.6
4.2
0.51
1.3
3.4
0.88
2.25
8.8
0.36
0.9
2.4
mA
mA
mA
High Level Output
Current (Note 3)
VIN e VSS
VDD e 5V, VO e 4.6V
VDD e 10V, VO e 9.5V
VDD e 15V, VO e 13.5V
b 0.64
b 1.6
b 4.2
0.51
b 1.3
b 3.4
b 0.88
b 2.25
b 8.8
b 0.36
b 0.9
b 2.4
mA
mA
mA
Input Current
VDD e 15V, VIN e 0V
VDD e 15V, VIN e 15V
4.95
9.95
14.95
V
V
V
b 0.1
b 10 b 5
b 0.1
b 1.0
0.1
10b5
0.1
1.0
mA
mA
Note 1: ‘‘Absolute Maximum Ratings’’ are those values beyond which the safety of the device cannot be guaranteed; they are not meant to imply that the devices
should be operated at these limits. The table of ‘‘Recommended Operating Conditions’’ and ‘‘Electrical Characteristics’’ provides conditions for actual device
operation.
Note 2: VSS e 0V unless otherwise specified.
Note 3: IOH and IOL are tested one output at a time.
2
DC Electrical Characteristics CD4093BC (Note 2)
Symbol
Parameter
b 40§ C
Conditions
Min
Max
IDD
Quiescent Device
Current
VDD e 5V
VDD e 10V
VDD e 15V
1.0
2.0
4.0
VOL
Low Level
Output Voltage
VIN e VDD, lIOl k 1 mA
VDD e 5V
VDD e 10V
VDD e 15V
0.05
0.05
0.05
High Level
Output Voltage
VIN e VSS, lIOl k 1 mA
VDD e 5V
VDD e 10V
VDD e 15V
4.95
9.95
14.95
Negative-Going Threshold
Voltage (Any Input)
lIOl k 1 mA
VDD e 5V, VO e 4.5V
VDD e 10V, VO e 9V
VDD e 15V, VO e 13.5V
1.3
2.85
4.35
Positive-Going Threshold
Voltage (Any Input)
lIOl k 1 mA
VDD e 5V, VO e 0.5V
VDD e 10V, VO e 1V
VDD e 15V, VO e 1.5V
VH
Hysteresis (VT a b VTb)
(Any Input)
IOL
VOH
VTb
VT a
IOH
IIN
a 25§ C
Min
Typ
0
0
0
a 85§ C
Max
Min
Units
Max
1.0
2.0
4.0
7.5
15.0
30.0
mA
mA
mA
0.05
0.05
0.05
0.05
0.05
0.05
V
V
V
4.95
9.95
14.95
5
10
15
2.25
4.5
6.75
1.5
3.0
4.5
1.8
4.1
6.3
2.25
4.5
6.75
1.5
3.0
4.5
2.3
4.65
6.9
V
V
V
2.75
5.5
8.25
3.6
7.15
10.65
2.75
5.5
8.25
3.3
6.2
9.0
3.5
7.0
10.5
2.65
5.35
8.1
3.5
7.0
10.5
V
V
V
VDD e 5V
VDD e 10V
VDD e 15V
0.5
1.0
1.5
2.35
4.3
6.3
0.5
1.0
1.5
1.5
2.2
2.7
2.0
4.0
6.0
0.35
0.70
1.20
2.0
4.0
6.0
V
V
V
Low Level Output
Current (Note 3)
VIN e VDD
VDD e 5V, VO e 0.4V
VDD e 10V, VO e 0.5V
VDD e 15V, VO e 1.5V
0.52
1.3
3.6
0.44
1.1
3.0
0.88
2.25
8.8
0.36
0.9
2.4
mA
mA
mA
High Level Output
Current (Note 3)
VIN e VSS
VDD e 5V, VO e 4.6V
VDD e 10V, VO e 9.5V
VDD e 15V, VO e 13.5V
b 0.52
b 1.3
b 3.6
0.44
b 1.1
b 3.0
b 0.88
b 2.25
b 8.8
b 0.36
b 0.9
b 2.4
mA
mA
mA
Input Current
VDD e 15V, VIN e 0V
VDD e 15V, VIN e 15V
4.95
9.95
14.95
V
V
V
b 0.3
b 10 b 5
b 0.3
b 1.0
0.3
10b5
0.3
1.0
mA
mA
AC Electrical Characteristics*
TA e 25§ C, CL e 50 pF, RL e 200k, Input tr, tf e 20 ns, unless otherwise specified
Typ
Max
Units
tPHL, tPLH
Symbol
Propagation Delay Time
Parameter
VDD e 5V
VDD e 10V
VDD e 15V
Conditions
300
120
80
450
210
160
ns
ns
ns
tTHL, tTLH
Transition Time
VDD e 5V
VDD e 10V
VDD e 15V
90
50
40
145
75
60
ns
ns
ns
CIN
Input Capacitance
(Any Input)
5.0
7.5
pF
CPD
Power Dissipation Capacitance
(Per Gate)
24
*AC Parameters are guaranteed by DC correlated testing.
Note 2: VSS e 0V unless otherwise specified.
Note 3: IOH and IOL are tested one output at a time.
3
Min
pF
Typical Applications
Gated Oscillator
TL/F/5982 – 2
Assume t1 a t2 ll tPHL a tPLH then:
t0 e RC fin [VDD/VTb]
t1 e RC fin [(VDD b VTb)/(VDD b VT a )]
t2 e RC fin [VT a /VTb]
fe
1
e
t1 a t2
1
(VT a ) (VDD b VTb)
RC fin
(VTb)(VDD b VT a )
TL/F/5982 – 3
Gated One-Shot
TL/F/5982 – 4
TL/F/5982 – 5
(a) Negative-Edge Triggered
TL/F/5982 – 6
TL/F/5982 – 7
(b) Positive-Edge Triggered
4
Typical Performance Characteristics
Typical Transfer
Characteristics
Guaranteed Hysteresis vs VDD
TL/F/5982 – 8
TL/F/5982 – 9
Guaranteed Trigger Threshold
Voltage vs VDD
Guaranteed Hysteresis vs VDD
TL/F/5982 – 10
TL/F/5982 – 11
Input and Output Characteristics
Output Characteristic
Input Characteristic
TL/F/5982–12
TL/F/5982 – 13
VNML e VIH(MIN) b VOL j VIH(MIN) e VT a (MIN)
VNMH e VOH b VIL(MAX) j VDD b VIL(MAX) e VDD b VTb(MAX)
AC Test Circuits and Switching Time Waveforms
TL/F/5982 – 14
TL/F/5982 – 15
5
CD4093BM/CD4093BC Quad 2-Input NAND Schmitt Trigger
Physical Dimensions inches (millimeters)
Ceramic Dual-In-Line Package (J)
Order Number CD4093BMJ or CD4093BCJ
NS Package Number J14A
Molded Dual-In-Line Package (N)
Order Number CD4093BM or CD4093BCN
NS Package Number N14A
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