DATA SHEET
DATA SHEET
Order code
82-0669
Manufacturer code
n/a
Description
ULN2803ADWG4 DARLINGTON DRIVER SO18 RC
Page 1 of 14
The enclosed information is believed to be correct, Information may change ‘without notice’ due to
product improvement. Users should ensure that the product is suitable for their use. E. & O. E.
Sales: 01206 751166
Sales@rapidelec.co.uk
Technical: 01206 835555
Tech@rapidelec.co.uk
Revision A
20/02/2007
Fax: 01206 751188
www.rapidonline.com
SLRS049E − FEBRUARY1997 − REVISED JULY 2006
D 500-mA Rated Collector Current (Single
D
D
D
D
D
DW OR N PACKAGE
(TOP VIEW)
Output)
High-Voltage Outputs . . . 50 V
Output Clamp Diodes
Inputs Compatible With Various Types of
Logic
Relay Driver Applications
Compatible with ULN2800A Series
1B
2B
3B
4B
5B
6B
7B
8B
GND
description/ordering information
1
18
2
17
3
16
4
15
5
14
6
13
7
12
8
11
9
10
1C
2C
3C
4C
5C
6C
7C
8C
COM
The ULN2803A is a high-voltage, high-current
Darlington transistor array. The device consists of
eight npn Darlington pairs that feature
high-voltage outputs with common-cathode
clamp diodes for switching inductive loads. The
collector-current rating of each Darlington pair is
500 mA. The Darlington pairs may be connected
in parallel for higher current capability.
Applications include relay drivers, hammer drivers, lamp drivers, display drivers (LED and gas discharge), line
drivers, and logic buffers. The ULN2803A has a 2.7-kΩ series base resistor for each Darlington pair for operation
directly with TTL or 5-V CMOS devices.
ORDERING INFORMATION
PDIP (N)
−40°C
−40
C to 85
85°C
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
SOIC (DW)
Tube of 20
ULN2803AN
Tube of 40
ULN2803ADW
Reel of 2000
ULN2803ADWR
TOP-SIDE
MARKING
ULN2803AN
ULN2803A
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2006, Texas Instruments Incorporated
!" #$
# % & ## '($ # ) # "( "#
) "" $
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SLRS049E − FEBRUARY1997 − REVISED JULY 2006
logic diagram
1B
2B
3B
4B
5B
6B
7B
8B
1
18
2
17
3
16
4
15
5
14
6
13
7
12
8
11
10
1C
2C
3C
4C
5C
6C
7C
8C
COM
schematic (each Darlington pair)
COM
Output C
2.7 kΩ
Input B
7.2 kΩ
3 kΩ
E
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLRS049E − FEBRUARY1997 − REVISED JULY 2006
absolute maximum ratings at 25°C free-air temperature (unless otherwise noted)†
Collector-emitter voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 V
Input voltage (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V
Continuous collector current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA
Output clamp diode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mA
Total substrate-terminal current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −2.5 A
Package thermal impedance, θJA (see Notes 2 and 3): DW package . . . . . . . . . . . . . . . . . . . . . . . 73.14°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . 62.66°C/W
Operating virtual junction temperature, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, unless otherwise noted, are with respect to the emitter/substrate terminal GND.
2. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable
ambient temperature is PD = (TJ(max) − TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
electrical characteristics at 25°C free-air temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
ICEX
Collector cutoff current
VCE = 50 V,
See Figure 1
II = 0,
II(off)
Off-state input current
VCE = 50 V,
TA = 70°C,
IC = 500 µA,
See Figure 2
II(on)
Input current
VI = 3.85 V,
See Figure 3
2.4
VCE = 2 V,
See Figure 4
IC = 200 mA
IC = 250 mA
IC = 300 mA
IC = 100 mA,
3
0.9
1.1
II = 350 µA,
See Figure 5
IC = 200 mA,
1
1.3
II = 500 µA,
See Figure 5
IC = 350 mA,
1.3
1.6
See Figure 6
See Figure 7
1.7
2
V
f = 1 MHz
15
25
pF
TYP
MAX
VI(on)
On-state input voltage
II = 250 µA,
See Figure 5
VCE(sat)
Collector-emitter saturation voltage
IR
VF
Clamp diode reverse current
Clamp diode forward voltage
VR = 50 V,
IF = 350 mA,
Ci
Input capacitance
VI = 0 V,
50
50
µA
65
0.93
µA
1.35
2.7
50
mA
V
V
µA
switching characteristics at 25°C free-air temperature
PARAMETER
TEST CONDITIONS
tPLH
tPHL
Propagation delay time, low- to high-level output
VOH
High-level output voltage after switching
Propagation delay time, high- to low-level output
POST OFFICE BOX 655303
VS = 50 V,
CL = 15 pF,
RL = 163 Ω,
See Figure 8
VS = 50 V,
See Figure 9
IO ≈ 300 mA,
• DALLAS, TEXAS 75265
MIN
UNIT
130
20
VS − 20
ns
mV
3
SLRS049E − FEBRUARY1997 − REVISED JULY 2006
PARAMETER MEASUREMENT INFORMATION
Open VCE
Open VCE
IC
II(off)
ICEX
Open
Figure 1. ICEX Test Circuit
Figure 2. II(off) Test Circuit
Open
Open
IC
II
VI
Open
VI
VCE
Figure 3. II(on) Test Circuit
Figure 4. VI(on) Test Circuit
Open
IC
hFE =
II
IC
II
VR
IR
Open
VCE
Figure 6. IR Test Circuit
Figure 5. hFE, VCE(sat) Test Circuit
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLRS049E − FEBRUARY1997 − REVISED JULY 2006
PARAMETER MEASUREMENT INFORMATION
IF
VF
Open
Figure 7. VF Test Circuit
Input
Open
VS = 50 V
RL = 163 Ω
Pulse
Generator
(see Note A)
Output
CL = 15 pF
(see Note B)
Test Circuit
<5 ns
Input
10%
<10 ns
90%
50%
90%
50%
VIH
(see Note C)
10%
0
0.5 µs
tPHL
tPLH
VOH
Output
50%
50%
Voltage Waveforms
NOTES: A. The pulse generator has the following characteristics: PRR = 1 MHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. VIH = 3 V
Figure 8. Propagation Delay Times
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SLRS049E − FEBRUARY1997 − REVISED JULY 2006
PARAMETER MEASUREMENT INFORMATION
VS
Input
2 mH
163 Ω
Pulse
Generator
(see Note A)
Output
CL = 15 pF
(see Note B)
Test Circuit
<5 ns
Input
10%
<10 ns
90%
1.5 V
90%
1.5 V
VIH
(see Note C)
10%
0
40 µs
VOH
Output
Voltage Waveforms
NOTES: A. The pulse generator has the following characteristics: PRR = 12.5 KHz, ZO = 50 Ω.
B. CL includes probe and jig capacitance.
C. VIH = 3 V
Figure 9. Latch-Up Test
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SLRS049E − FEBRUARY1997 − REVISED JULY 2006
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
7
PACKAGE OPTION ADDENDUM
www.ti.com
21-May-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
ULN2803ADW
ACTIVE
SOIC
DW
18
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
ULN2803ADWG4
ACTIVE
SOIC
DW
18
40
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
ULN2803ADWR
ACTIVE
SOIC
DW
18
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
ULN2803ADWRG4
ACTIVE
SOIC
DW
18
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-2-260C-1 YEAR
ULN2803AN
ACTIVE
PDIP
N
18
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
ULN2803ANE4
ACTIVE
PDIP
N
18
20
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
ULN2803ADWR
Package Pins
DW
18
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
SITE 47
0
0
10.9
12.0
2.7
12
Pack Materials-Page 1
W
Pin1
(mm) Quadrant
24
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Oct-2007
Device
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
ULN2803ADWR
DW
18
SITE 47
370.0
355.0
55.0
Pack Materials-Page 2
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