AN-2009 LM3421 SEPIC LED Driver Evaluation Board for Automotive Applications User's Guide 1

AN-2009 LM3421 SEPIC LED Driver Evaluation Board for Automotive Applications User's Guide 1
User's Guide
SNVA414B – November 2010 – Revised May 2013
AN-2009 LM3421 SEPIC LED Driver Evaluation Board for
Automotive Applications
1
Introduction
This document describes an evaluation board consisting of the LM3421 controller configured as a SEPIC
constant current LED driver. It is capable of converting input voltages from 8 V to 18 V and illuminating up
to six LEDs with approximately 350 mA of drive current.
Additional features include analog and pulse-width modulated (PWM) dimming, over-voltage protection,
under-voltage lock-out and cycle-by-cycle current limit.
A bill of materials is included that describes the parts used in this evaluation board. A schematic and
layout have also been included along with measured performance characteristics.
2
Key Features
•
•
•
•
•
•
•
3
Designed to CISPR-25, Class 3 limits
0 V to 10 V analog dimming function
PWM dimming function
Input under-voltage protection
Over-voltage protection
Cycle-by-cycle current limit
NoPB and RoHS compliant bill of materials
Applications
•
•
•
Emergency lighting modules
LED light-bars, beacons and strobe lights
Automotive tail-light modules
All trademarks are the property of their respective owners.
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1
Performance Specifications
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Performance Specifications
Based on an LED, Vf = 3.15 V.
Symbol
VIN
Parameter
Min
Typ
Max
Operating Input Supply Voltage
8
12
18
Input Supply Voltage Surge Voltage
-
50 V
-
VOUT
LED String Voltage
-
18.9 V (6 LEDs)
-
ILED
LED String Average Current
-
345 mA
-
Efficiency (VIN=12 V, ILED=345 mA, 6 LEDs)
-
85.4%
Switching Frequency
-
132 kHz
VIN(MAX)
fSW
-
-
LED Current Regulation
-
< 1% Variation
ILIMIT
Current Limit
-
2.5 A
-
VUVLO
Input Undervoltage Lock-out Threshold (VIN Rising)
-
7.2 V
-
Input Undervoltage Lock-out Hysteresis
-
1V
-
VOVP
Output Over-Voltage Protection Threshold
-
37 V
-
VOVP(HYS)
Output Over-Voltage Protection Hysteresis
-
3.5 V
-
VUVLO(HYS)
Figure 1. Demo Board
5
General Information
This evaluation board uses the LM3421 controller configured as a SEPIC converter for use in automotive
based LED lighting modules. The described circuit can also be used as a general starting point for designs
requiring robust performance in EMI sensitive environments.
The design is based on the LM3421 controller integrated circuit (IC). Inherent to the LM3421 design is an
adjustable high-side current sense voltage that allows for tight regulation of the LED current with the
highest efficiency possible. Additional features include analog dimming, over-voltage protection, undervoltage lock-out and cycle-by-cycle current limit.
The operating input voltage range is from 8 V to 18 V. The design, however, is able to withstand input
voltages up to 50 V to account for power surges and load dump situations. . Up to six LEDs can be
powered with approximately 350 mA of current, which is sufficient to drive a variety of available high
brightness (HB) LEDs on the market.
2
AN-2009 LM3421 SEPIC LED Driver Evaluation Board for Automotive
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Demo Board Schematic
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In order to comply with EMI requirements for automotive applications, an input filter and snubber
components have also been designed into the circuit. This minimizes the time needed to optimize the
design for specific EMI qualifications pertaining to individual automobile manufacturers and ensures faster
product time to market.
The demo board consists of a 1.6” x 2.4” four-layer printed circuit board (PCB). Test terminals in the form
of turrets are available to connect the input power supply and an LED string as well as apply an analog or
PWM dimming signal.
(1) (2)
6 Demo Board Schematic
L3
L2
L1
VIN
C23
C22 +
C25
R27
C26
J4
C24
C5
PGND
R32
D6
C6
J2
C7
C8
C10
R28
LM3421
U1
R35
R29
1
VIN
HSN 16
2
EN
HSP 15
3
COMP
RPD 14
4
CSH
IS 13
5
RCT
VCC 12
6
AGND
R7
C11
C4
5V
C27
D12
R6
R8
R9
LED+
CSH
R5
C12
R13
C14
R31
Q1
C13
R30
R11
R10
Q3
7
OVP
PGND 10
8
nDIM
DDRV
R33
DIM
C15
LED-
R15
GATE 11
C28
J3
9
EP
R16
Q2
R14
R34
DIM_GND
C16
R18
ADIM
J1
5V
R19
R20
+
5V
R25
D10
V+
R21
CSH
V-
R1
R2
C20
C21
R26
ADIM_GND
(1)
(2)
Although this evaluation board can be used as a reference design for automotive applications, it is up to you to verify and qualify that the
final design and Bill of Materials (BOM) meets any AECQ-100 requirements.
The Analog dimming circuit must not be connected when applying surge voltages greater than 21 V.
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3
Bill of Materials (BOM)
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Bill of Materials (BOM)
Table 1. Bill of Materials (BOM)
4
Designator
Value
Package
Description
Manufacturer
Part Number
C4
1.0 µF
1206
Ceramic, C Series, 100 V, 20%
TDK
C3216X7R2A105M
C5
-
-
DNP
-
-
C6
10 µF
2220
CAP, CERM, 50 V, +/-10%, X7R
TDK
C5750X7R1H106K
C7
10 µF
2220
CAP, CERM, 50 V, +/-10%, X7R
TDK
C5750X7R1H106K
C8
0.10 µF
805
Ceramic, X7R, 100 V, 10%
TDK
C2012X7R2A104K
C10
4.7 µF
2220
Ceramic, X7R, 100 V, 10%
MuRata
GRM55ER72A475KA01L
C11
0.10 µF
805
Ceramic, X7R, 50 V, 10%
Yageo America
CC0805KRX7R9BB104
C12
0.22 µF
805
Ceramic, X7R, 50 V, 10%
TDK
C2012X7R1H224K
C13
1000 pF
805
Ceramic, C0G/NP0, 50 V, 1%
AVX
08055A102FAT2A
C14
2.2 µF
805
Ceramic, X5R, 16 V, 10%
AVX
0805YD225KAT2A
C15
47 pF
805
Ceramic, C0G/NP0, 50 V, 5%
MuRata
GQM2195C1H470JB01D
C16
0.1 µF
805
Ceramic, X7R, 25 V, 10%
MuRata
GRM21BR71E104KA01L
C20
1.0 µF
805
Ceramic, X7R, 25 V, 10%
MuRata
GRM216R61E105KA12D
C21
1.0 uF
805
Ceramic, X5R, 25 V, 10%
MuRata
GRM216R61E105KA12D
C22
68 µF
Radial Can SMD
CAP ELECT 68UF 63 V FK
Panasonic
EEE-FK1J680UP
C23
0.01 µF
805
CAP, CERM, 100 V, +/-10%, X7R
TDK
C2012X7R2A103K
C24
4.7 µF
2220
CAP, CERM, 100 V, +/-10%, X7R
TDK
C5750X7R2A475K
C25
1000 pF
805
CAP, CERM, 100 V, +/-10%, X7R
TDK
C2012X7R2A102K
C26
1.2 nF
1206
CAP, CERM, 100 V, +/-20%, X7R
AVX
12061A122JAT2A
C27
0.10 µF
805
Ceramic, X7R, 25 V, 10%
TDK
C2012X7R1E104K
C28
2.7 nF
1206
CAP, CERM, 100 V, +/-20%, X7R
AVX
12065C272KAT2A
RB160M-60TR
D6
-
SOD-123
Diode Schottky, 60 V, 1A
RΩ
D10
-
SOD-123
Vr = 100 V, Io = 0.15A, Vf = 1.25 V
Diodes Inc.
1N4148W-7-F
D12
-
SOD-123
SMT Zener Diode
Diodes Inc.
MMSZ5231B-7-F
J1
-
Through
hole
Header, 100mil, 1x2, Gold plated, 230
mil above insulator
Samtec Inc.
TSW-102-07-G-S
J2
-
Through
hole
Header, 100mil, 1x2, Gold plated, 230
mil above insulator
Samtec Inc.
TSW-102-07-G-S
J3
-
Through
hole
Header, 100mil, 1x2, Gold plated, 230
mil above insulator
Samtec Inc.
TSW-102-07-G-S
J4
-
Through
hole
Header, 100mil, 1x2, Gold plated, 230
mil above insulator
Samtec Inc.
TSW-102-07-G-S
L1
100 µH
SMD
Coupled inductor
Coilcraft
MSD1278-104ML
L2
-
1206
6A Ferrite Bead, 160 Ω @ 100 MHz
Steward
HI1206T161R-10
L3
10 µH
SMD
Inductor, Shielded Drum Core, Ferrite,
2.1A, 0.038Ω
Coilcraft
MSS7341-103MLB
Q1
-
DPAK
MOSFET N-CH 100 V 6.2A
Fairchild
Semiconductor
FDD3860
Q2
-
SOT-23
MOSFET, N-CH, 30 V, 4.5A
Vishay-Siliconix
SI2316BDS-T1-E3
Q3
-
SOT-23
MOSFET, N-CH, 60 V, 0.24A
Vishay-Siliconix
2N7002E-T1-E3
R1
40.2 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW080540K2FKEA
R2
40.2 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW080540K2FKEA
R5
174 kΩ
805
1%, 0.125W
Panasonic
ERJ-6ENF1743V
R6
1.0 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW08051k00FKEA
R7
1.0 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW08051k00FKEA
R8
0.2 Ω
2010
1%, 0.5W
Vishay-Dale
WSL2010R3000FEA
R9
10 Ω
805
1%, 0.125W
Yageo America
RC0805FR-0710RL
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Bill of Materials (BOM)
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Table 1. Bill of Materials (BOM) (continued)
Designator
Value
Package
Description
Manufacturer
Part Number
R10
21.5 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW080521K5FKEA
R11
100 Ω
805
5%, 0.125W
Vishay-Dale
CRCW0805100RJNEA
R13
174 kΩ
805
1%, 0.125W
Panasonic
ERJ-6ENF1743V
R14
4.32 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW08054K32FKEA
R15
6.04 kΩ
805
1%, 0.125W
Panasonic
ERJ-6ENF6041V
R16
0.10 Ω
2512
1%, 1W
Vishay-Dale
WSL2512R1000FEA
R18
60.4 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW080560K4FKEA
R19
40.2 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW080540K2FKEA
R20
40.2 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW080540K2FKEA
R21
22.1 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW080522K1FKEA
R25
40.2 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW080540K2FKEA
R26
11.8 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW080511K8FKEA
R27
0Ω
1206
1%, 0.25W
Yageo America
RC1206JR-070RL
R28
10.0 Ω
1206
1%, 0.25W
Vishay-Dale
CRCW120610R0FKEA
R29
590 Ω
1210
1%, 0.5W
Vishay/Dale
CRCW1210590RFEA
R30
10 Ω
805
1%, 0.125W
Vishay-Dale
CRCW080510R0FKEA
R31
2.2 Ω
1206
1%, 0.25W
Vishay-Dale
CRCW12062R20FKEA
R32
0Ω
1206
5%, 0.25W
Yageo America
RC1206JR-070RL
R33
4.99 kΩ
805
0.1%, 0.125W
Yageo America
RT0805BRD074K99L
R34
10.0 kΩ
805
1%, 0.125W
Vishay-Dale
CRCW080510K0FKEA
R35
590 Ω
1210
1%, 0.5W
Vishay/Dale
CRCW1210590RFEA
TP1 - TP8
-
Through
Hole
Terminal, Turret, TH, Double
Keystone
Electronics
1573-2
U1
-
HTSSOP-16
EP
N-Channel Controller for Constant
Current LED Drivers
Texas
Instruments
LM3421
U3
-
SC70-6
2.4 V R-R Out CMOS Video OpAmp
with Shutdown
Texas
Instruments
LMH6601
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LM3421 Device Pin-Out
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LM3421 Device Pin-Out
VIN
1
16 HSN
EN
2
15 HSP
COMP 3
14 RPD
CSH
4
RCT 5
DAP
AGND 6
17
13 IS
12 VCC
11 GATE
OVP 7
10 PGND
nDIM 8
9
DDRV
Figure 2. Pin Description 16-Lead HTSSOP EP (Top View)
Table 2. Pin Descriptions
Pin No
6
Name
Description
1
VIN
Bypass with 100 nF capacitor to AGND as close to the device as possible in the circuit board layout.
2
EN
Connect to AGND for zero current shutdown or apply > 2.4 V to enable device.
3
COMP
4
CSH
Connect a resistor to AGND to set the signal current. For analog dimming, connect a controlled current source or
a potentiometer to AGND as detailed in Section 13.3.
5
RCT
External RC network sets the predictive “off-time” and thus the switching frequency.
6
AGND
7
OVP
Connect to a resistor divider from VO to program output over-voltage lockout (OVLO). Turn-off threshold is 1.24 V
and hysteresis for turn-on is provided by 23 µA current source.
8
nDIM
Connect a PWM signal for dimming as detailed in the Section 13.4 and/or a resistor divider from VIN to program
input under-voltage lockout (UVLO). Turn-on threshold is 1.24 V and hysteresis for turn-off is provided by 23 µA
current source.
Connect a capacitor to AGND to set the compensation.
Connect to PGND through the DAP copper pad to provide ground return for CSH, COMP, RCT, and TIMR.
9
DDRV
Connect to the gate of the dimming MosFET.
10
PGND
Connect to AGND through the DAP copper pad to provide ground return for GATE and DDRV.
11
GATE
Connect to the gate of the main switching MosFET.
12
VCC
13
IS
14
RPD
Connect the low side of all external resistor dividers (VIN UVLO, OVP) to implement “zero-current” shutdown.
15
HSP
Connect through a series resistor to the positive side of the LED current sense resistor.
16
HSN
Connect through a series resistor to the negative side of the LED current sense resistor.
EP (17)
EP
Bypass with 2.2 µF–3.3 µF ceramic capacitor to PGND.
Connect to the drain of the main N-channel MosFET switch for RDS-ON sensing or to a sense resistor installed in
the source of the same device.
Star ground connecting AGND and PGND.
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Evaluation Board Connection Overview
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Evaluation Board Connection Overview
Figure 3. Wiring and Jumper Connection Diagram
Name
I/O
VIN
Input
Power supply voltage.
PGND
Input
Ground.
DIM
Input
PWM Dimming Input
Apply a pulse-width modulated dimming voltage signal with varying duty cycle. Maximum dimming voltage
level is 20 V. Maximum dimming frequency is 1 kHz.
DIM_GND
Input
PWM dimming ground.
ADIM
Input
0 V - 10 V Dimming Input
Apply a 0 V - 10 V analog dimming voltage signal. For more details, see Section 13.
ADIM_GND
Input
Analog dimming ground.
LED+
Output
LED Constant Current Supply
Supplies voltage and constant-current to anode of LED array.
LED-
Output
LED Return Connection (not GND)
Connects to cathode of LED array. Do NOT connect to GND.
10
Description
Evaluation Board Modes of Operation Overview
The available modes of operation for this evaluation board are enabled utilizing the jumper configurations
described in Table 3.
Table 3. Modes of Operation
J1
J2
J3
J4
-
OPEN
-
-
Mode of Operation
OPEN
CLOSED
CLOSED
OPEN
CLOSED
CLOSED
CLOSED
CLOSED
LM3421 is enabled and powered on. The analog dimming function is now enabled.
OPEN
CLOSED
OPEN
OPEN
LM3421 is enabled and powered on. The PWM dimming function is now enabled.
LM3421 is disabled and placed into low-power shutdown.
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LM3421 is enabled and powered on. The evaluation board will now run under standard
operation.
AN-2009 LM3421 SEPIC LED Driver Evaluation Board for Automotive
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Typical Performance Characteristics
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Typical Performance Characteristics
TA = 25°C and LED Vf = 3.15 V, unless otherwise specified.
100
100
95
6 LEDs
90
EFFICIENCY (%)
EFFICIENCY (%)
95
85
80
75
2 LEDs
4 LEDs
80
75
70
65
65
4 LEDs
2 LEDs
60
6
8
10
12
14
VIN(V)
16
18
50
20
Figure 4. Efficiency vs. Input Voltage
fSW = 132 kHz, ILED = 345 mA
100
150
200
250
SWITCHING FREQUENCY (kHz)
300
Figure 5. Efficiency vs. Switching Frequency
VIN = 12 V, ILED = 345 mA
100
400
95
350
ILED=345mA
90
300
85
250
ILED(mA)
EFFICIENCY (%)
85
70
60
80
75
ILED=207mA
70
65
RSNS=0.3
200
150
RSNS=0.5
100
50
ILED=104mA
60
RSNS=1.0
0
6
8
10
12 14
VIN(V)
16
18
20
Figure 6. Efficiency vs. Input Voltage
fSW = 132 kHz, 6 LEDs, VOUT = 18.8 V
8
6 LEDs
90
AN-2009 LM3421 SEPIC LED Driver Evaluation Board for Automotive
Applications
6
8
10
12 14
VIN(V)
16
18
20
Figure 7. LED Current vs. Input Voltage
fSW = 132 kHz, 6 LEDs, VOUT = 18.8 V
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Typical Performance Characteristics
350
350
300
300
250
250
ILED(mA)
ILED(mA)
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200
150
200
150
100
100
50
50
0
fDIM= 100 Hz
fDIM= 1 kHz
0
0
1
2
3
4
5
6
7
8
9
10
0
ADIM VOLTAGE (V)
20
40
60
80
100
DUTY CYCLE (%)
Figure 8. Analog Dimming
VIN = 12 V, fSW = 132 kHz, 6 LEDs, VOUT = 20.4 V
Figure 9. PWM Dimming
VIN = 12 V, fSW = 132 kHz, 6 LEDs, VOUT = 20.4 V
Figure 10. Steady-State Waveforms
Top Plot: VSW, Bottom Plot: ILED
(VIN =12 V, ILED = 342 mA, 6 LEDs, VOUT = 20.4 V)
Figure 11. Start-Up Waveforms
Top Plot: VSW, Bottom Plot: ILED
(VIN =12 V, ILED = 342 mA, 6 LEDs, VOUT = 20.4 V)
Figure 12. Shutdown Waveforms
Top Plot: VSW, Bottom Plot: ILED
(VIN =12 V, ILED = 342 mA, 6 LEDs, VOUT = 20.4 V)
Figure 13. Over-Voltage Protection Response
Top Plot: VSW, Middle Plot: VOUT, Bottom Plot: ILED
(VIN =12 V, ILED = 342 mA, 6 LEDs, VOUT = 20.4 V)
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Typical Performance Characteristics
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Figure 14. 100Hz, 50% Duty Cycle PWM Dimming
Top Plot: VSW, Middle Plot: VDIM, Bottom Plot: ILED
VIN = 12 V, fSW = 132 kHz, 6 LEDs, VOUT = 20.4 V
Figure 15. 100Hz, 50% Duty Cycle PWM Dimming
(rising edge)
Top Plot: VSW, Middle Plot: VDIM, Bottom Plot: ILED
VIN = 12 V, fSW = 132 kHz, 6 LEDs, VOUT = 20.4 V
Figure 16. 1 kHz, 50% Duty Cycle PWM Dimming
Top Plot: VSW, Middle Plot: VDIM, Bottom Plot: ILED
VIN = 12 V, fSW = 132 kHz, 6 LEDs, VOUT = 20.4 V
Figure 17. 1 kHz, 50% Duty Cycle PWM Dimming
(rising edge)
Top Plot: VSW, Middle Plot: VDIM, Bottom Plot: ILED
VIN = 12 V, fSW = 132 kHz, 6 LEDs, VOUT = 20.4 V
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PCB Layout
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PCB Layout
Figure 18. Top Layer
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PCB Layout
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Figure 19. Mid-Layer 1
12
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PCB Layout
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Figure 20. Mid-Layer 2
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PCB Layout
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Figure 21. Bottom Layer
14
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Theory of Operation
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13
Theory of Operation
13.1 Input EMI Line Filter
L3
L2
VIN
C23
C22 +
C25
C24
R28
PGND
LM3421
1 VIN
C4
Figure 22. Input Filter Circuit
A low-pass input filter (highlighted in Figure 22) has been added to the front-end of the circuit. Its primary
purpose is to minimize EMI conducted from the LM3421 circuit to prevent it from interfering with the
electrical network supplying power to the LED driver. Frequencies in and around the LED driver switching
frequency (fSW = 132 kHz) are primarily addressed with this filter. The ferrite bead, L2, has been chosen to
help attenuate EMI frequencies above 10 MHz in conjunction with snubber circuitry that has been
designed into the driver circuitry, which is discussed in the next section.
This low pass filter has a cut-off frequency that is determined by the inductor and capacitor resonance of
L3 and C22 as described in Equation 1:
f0 =
1
2S L3 u C22
(1)
The input filter needs to attenuate the fundamental frequency and associated harmonics of the demo
board’s switching frequency, which is designed to be 132 kHz. Plugging the chosen values of L3 and C22
as 10 µH and 68uF respectively gives a roll-off frequency of 6.1 kHz. The ferrite bead chosen has a
nominal impedance of 160 Ω at 100 Mhz for 1A of current and will help attenuate higher frequency noise.
Conducted EMI scans of an earlier prototype evaluation board with and without an input filter are shown in
Figure 23 and Figure 24.
NOTE:
These scans were originally done per CISPR-22, however, for the purpose of evaluating
filter performance this EMI data is acceptable. The actual EMI performance for this
evaluation board is discussed later in this document.
Frequencies from 300 kHz to 10 MHz show noticeable attenuation of peak frequencies with the input filter
in place. Harmonics of the driver switching frequency are reduced up to 22 dBµV/m.
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Figure 23. Conducted EMI Scan (peak) WITHOUT Input Filter and With Snubber Circuitry
Figure 24. Conducted EMI Scan (peak) WITH Input Filter and With Snubber Circuitry
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Theory of Operation
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13.2 Snubber Circuitry
L1
R27
C5
R32
C26
D6
C6
C7
C8
C10
LM3421
R31
Q1
GATE 11
R30
C28
IS 13
R16
Figure 25. Snubber Circuitry
Snubber circuitry (highlighted in Figure 25 has been added around the switching elements of Q1 and D6 in
the form of series resistor-capacitor (RC) pairs. The purpose of these snubbers is to reduce the
rising/falling edge rate of the switching voltage waveform when Q1 and D6 transition from an “on” to “off”
state and vice versa. This helps reduce both conducted and radiated EMI in the higher test frequency
ranges. For lower EMI frequencies particularly during conducted EMI testing, the input filter is utilized as
the primary EMI attenuator as previously discussed.
Conducted EMI scans of an earlier prototype evaluation board with and without snubber circuitry are
shown in Figure 26 and Figure 27.
NOTE: These scans were originally done per CISPR-22, however, for the purpose of evaluating filter
performance this EMI data is acceptable. The actual EMI performance for this evaluation
board will be discussed later in this document.
From 10 MHz to 30 MHz, the snubbers reduce peak power for all frequencies with noticeable attenuation
of peak power between 20 MHz and 30 MHz.
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Figure 26. Conducted EMI Scan (peak) With Input Filter and WITHOUT Snubber Circuitry
Figure 27. Conducted EMI Scan (peak) With Input Filter and WITH Snubber Circuitry
Radiated EMI scans of the demo board with and without the snubber circuitry are shown in Figure 28 and
Figure 29. From 30 MHz to near 200 MHz, the snubbers reduce peak power with attenuation values
ranging from 5 to 10 dBµV/m.
Figure 28. Radiated EMI Scan (peak) With Input Filter and WITHOUT Snubber Circuitry
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Figure 29. Radiated EMI Scan (peak) With Input Filter and WITH Snubber Circuitry
Although the snubber circuits help reduce the EMI signature of the evaluation board, they do so at the
cost of lowering the maximum achievable driver efficiency. Since each board design and application is
unique, it is recommended that the user investigate different snubber configurations and values to provide
the optimal balance of EMI performance and system efficiency.
13.3 Analog Dimming
The analog dimming circuitry is highlighted in Figure 30. Closing jumpers J1 and J4 connects the analog
dimming circuitry to the LED driver and thus enables this feature. Analog dimming of the LED current is
performed by adjusting the CSH pin current (ICSH) from the LM3421. The relationship between ICSH and the
average LED current is described Equation 2:
ILED =
(ICSH)(RHSP)
RSNS
(2)
For the demo board, RHSP is 1 kΩ and RSNS is 0.3 Ω, so the equation becomes,
ILED =
(ICSH)(RHSP) (ICSH ) (1 k :)
=
0.3:
RSNS
(3)
When no analog dimming is being applied, the ICSH current is described by Equation 4:
ICSH =
1. 24V
RCSH
(4)
The value of RCSH is 11.8kΩ and this gives ICSH as 105µA.
The method used to adjust ICSH for analog dimming is with an external variable current source consisting of
an on-board op-amp circuit. When a 0 V to 10 V voltage signal is applied to the ADIM test point, the opamp will adjust its output current accordingly. This output current is sourced into the node consisting of the
CSH pin and resistors, R21 and R26, which adjusts the ICSH current from the original 105 µA based on the
0 V to 10 V analog dimming signal. A low analog dimming voltage will source more current into the CSH
pin effectively dimming the LEDs while a high analog dim voltage will source less current resulting in less
dimming. ADIM should be a precise external voltage reference.
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C16
R18
ADIM
J1
5V
R19
R20
5V
-
V+
+
V-
D10
R21
CSH
R1
C20
C21
R2
R25
R26
ADIM_GND
Figure 30. Analog Dimming Circuit
13.4 PWM Dimming
LED+
LM3421
LED-
R10
R33
DIM
J3
nDIM
Q3
Q2
DDRV
R34
R14
DIM_GND
Figure 31. PWM Dimming Circuit
The circuitry associated with pulse-width modulation (PWM) dimming is highlighted in Figure 31 and
closing jumper J3 enables this function. A logic-level PWM signal can be applied to the DIM pin which in
turn drives the nDIM pin thought the MosFET Q3. A pull down resistor, R34, has also been added to
properly turn off, Q3, if no signal is present. The nDIM pin controls the dimming NFET, Q2, which is in
series with the LED stack. The brightness of the LEDs can be varied by modulating the duty cycle of the
PWM signal. LED brightness is approximately proportional to the PWM signal duty cycle, so for example,
30% duty cycle equals approximately 30% LED brightness.
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Conducted EMI Analysis
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Conducted EMI Analysis
Several automobile manufacturers base their conducted EMI limit requirements on the CISPR-25, Class 3
standard. However, each manufacturer in the end specifies their own individual method for EMI
qualification, and so there is not at this time a universally adopted set of EMI limits and performance
requirements. This makes it challenging to design a single LED driver circuit to comprehensively meet the
EMI requirements for each and every auto manufacturer. Therefore, the Class 3 limits described by
CISPR-25 were used as a reference point for the EMI performance of the LM3421 SEPIC design. From
this data, specific auto manufacturer EMI limits and requirements can be applied to the data to determine
if additional optimization of the reference design is required for compliance.
Conducted EMI tests were performed with a six LED load running 345 mA of LED current with an input
power supply voltage of 12 V. In the following EMI scan of Figure 32, the CISPR-25 Class 3 "peak" limits
are designated as blue and the "average" limits are designated in green. No enclosure was used around
the board. Due to limitations in the data gathering equipment only the peak EMI data from 100 kHz to 30
MHz could be acquired, and so the conducted EMI performance of the evaluation board at other
frequencies and versus quasi-peak and average CISPR25 limits can only be roughly interpreted.
Figure 32. Conducted "Peak" Scan per CISPR-25 With Class 3 Limits
15
Radiated EMI Analysis
Similar to the conducted EMI testing described previously, several automobile manufacturers base their
radiated EMI limit requirements on the CISPR-25, Class 3 standard. However, each manufacturer in the
end specifies their own individual method for EMI qualification, and so there is not at this time a
universally adopted set of EMI limits and performance requirements. This makes it challenging to design a
single LED driver circuit to comprehensively meet the EMI requirements for each and every auto
manufacturer. Therefore, the Class 3 limits described by CISPR-25 were used as a reference point for the
EMI performance of the LM3421 SEPIC design. From this data, specific auto manufacturer EMI limits and
requirements can be applied to the data to determine if additional optimization of the reference design is
required for compliance.
Radiated EMI tests were performed with a six LED load running 345 mA of LED current with an input
power supply voltage of 12 V. No enclosure was used around the board. In the EMI scan of Figure 33, the
CISPR-25 Class 3 "peak" limits are shown in blue. For the EMI scan of Figure 34, the CISPR-25 Class 3
"average" limits are shown in green. Some frequency bands have multiple limits associated with them. In
these instances, the frequency bands have multiple RF spectrum allocations (for example, FM, CB, VHF,
and so forth), and so all applicable limits are being shown even if they overlap. Due to limitations in the
data gathering equipment only the peak EMI data from 10 MHz to 1GHz could be acquired, and so the
radiated EMI performance of the evaluation board at other frequencies and versus quasi-peak and
average CISPR25 limits can only be roughly interpreted.
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Radiated EMI Analysis
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Figure 33. Radiated “Peak” Scan Data per CISPR-25 With Class 3 "Peak" Limits
Figure 34. Radiated “Peak” Scan Data per CISPR-25 With Class 3 "Average" Limits
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Thermal Analysis
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Thermal Analysis
Thermal scans were taken of the stand-alone LED demo board at room temperature with no airflow.
Primary hot spots on the top and bottom layers are associated with the snubber resistors R27 and R31.
Test Conditions: VIN = 12.1 V, IIN=651 mA, VOUT = 20.4 V (6 LEDs), ILED = 336 mA, PIN = 7.88W, POUT =
6.85W, Efficiency = 86.9%, Time = 75 minutes, Ta = Room temp, No airflow, No enclosure
Figure 35. Thermal Scan, Top Layer
Figure 36. Thermal Scan, Bottom Layer
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