Infineon-IPT015N10N5-DS-v02_00-EN

Infineon-IPT015N10N5-DS-v02_00-EN
MOSFET
MetalOxideSemiconductorFieldEffectTransistor
OptiMOSTM
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
DataSheet
Rev.2.1
Final
PowerManagement&Multimarket
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
1Description
HSOF
Features
Tab
•Idealforhighfrequencyswitchingandsync.rec.
•ExcellentgatechargexRDS(on)product(FOM)
•Verylowon-resistanceRDS(on)
•N-channel,normallevel
•100%avalanchetested
•Pb-freeplating;RoHScompliant
•QualifiedaccordingtoJEDEC1)fortargetapplications
•Halogen-freeaccordingtoIEC61249-2-21
12
34
56
78
Table1KeyPerformanceParameters
Parameter
Value
Unit
VDS
100
V
RDS(on),max
1.5
mΩ
ID
300
A
Qoss
213
nC
QG(0V..10V)
169
nC
Type/OrderingCode
Package
IPT015N10N5
PG-HSOF-8-1
1)
Drain
Tab
Gate
Pin 1
Source
Pin 2-8
Marking
015N10N5
RelatedLinks
-
J-STD20 and JESD22
Final Data Sheet
2
Rev.2.1,2015-02-23
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
TableofContents
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Electrical characteristics diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Disclaimer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Final Data Sheet
3
Rev.2.1,2015-02-23
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
2Maximumratings
atTj=25°C,unlessotherwisespecified
Table2Maximumratings
Parameter
Symbol
Continuous drain current
Values
Unit
Note/TestCondition
300
243
32
A
VGS=10V,TC=25°C
VGS=10V,TC=100°C
VGS=10V,TC=25°C,RthJA=40K/W1)
-
1200
A
TC=25°C
-
-
652
mJ
ID=150A,RGS=25Ω
VGS
-20
-
20
V
-
Power dissipation
Ptot
-
-
375
W
TC=25°C
Operating and storage temperature
Tj,Tstg
-55
-
175
°C
IEC climatic category;
DIN IEC 68-1: 55/175/56
Unit
Note/TestCondition
Min.
Typ.
Max.
ID
-
-
ID,pulse
-
Avalanche energy, single pulse
EAS
Gate source voltage
Pulsed drain current2)
3)
3Thermalcharacteristics
Table3Thermalcharacteristics
Parameter
Symbol
Thermal resistance, junction - case
Values
Min.
Typ.
Max.
RthJC
-
0.2
0.4
K/W
-
Device on PCB,
minimal footprint
RthJA
-
-
62
K/W
-
Device on PCB,
6 cm² cooling area1)
RthJA
-
-
40
K/W
-
1)
Device on 40 mm x 40 mm x 1.5 mm epoxy PCB FR4 with 6 cm2 (one layer, 70 µm thick) copper area for drain
connection. PCB is vertical in still air.
2)
See figure 3 for more detailed information
3)
See figure 13 for more detailed information
Final Data Sheet
4
Rev.2.1,2015-02-23
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
4Electricalcharacteristics
Table4Staticcharacteristics
Parameter
Symbol
Drain-source breakdown voltage
Values
Unit
Note/TestCondition
-
V
VGS=0V,ID=1mA
3.0
3.8
V
VDS=VGS,ID=280µA
-
0.1
10
5
100
µA
VDS=100V,VGS=0V,Tj=25°C
VDS=100V,VGS=0V,Tj=125°C
IGSS
-
10
100
nA
VGS=20V,VDS=0V
Drain-source on-state resistance
RDS(on)
-
1.3
1.6
1.5
2.0
mΩ
VGS=10V,ID=150A
VGS=6V,ID=75A
Gate resistance1)
RG
-
1.4
2.1
Ω
-
Transconductance
gfs
140
280
-
S
|VDS|>2|ID|RDS(on)max,ID=100A
Unit
Note/TestCondition
Min.
Typ.
Max.
V(BR)DSS
100
-
Gate threshold voltage
VGS(th)
2.2
Zero gate voltage drain current
IDSS
Gate-source leakage current
Table5Dynamiccharacteristics1)
Parameter
Symbol
Input capacitance
Values
Min.
Typ.
Ciss
-
12000 16000 pF
VGS=0V,VDS=50V,f=1MHz
Output capacitance
Coss
-
1800
2300
pF
VGS=0V,VDS=50V,f=1MHz
Reverse transfer capacitance
Crss
-
80
140
pF
VGS=0V,VDS=50V,f=1MHz
Turn-on delay time
td(on)
-
36
-
ns
VDD=50V,VGS=10V,ID=100A,
RG,ext=1.8Ω
Rise time
tr
-
30
-
ns
VDD=50V,VGS=10V,ID=100A,
RG,ext=1.8Ω
Turn-off delay time
td(off)
-
85
-
ns
VDD=50V,VGS=10V,ID=100A,
RG,ext=1.8Ω
Fall time
tf
-
30
-
ns
VDD=50V,VGS=10V,ID=100A,
RG,ext=1.8Ω
1)
Max.
Defined by design. Not subject to production test.
Final Data Sheet
5
Rev.2.1,2015-02-23
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
Table6Gatechargecharacteristics1)
Parameter
Symbol
Gate to source charge
Gate charge at threshold
Values
Unit
Note/TestCondition
-
nC
VDD=50V,ID=100A,VGS=0to10V
36
-
nC
VDD=50V,ID=100A,VGS=0to10V
-
34
51
nC
VDD=50V,ID=100A,VGS=0to10V
Qsw
-
51
-
nC
VDD=50V,ID=100A,VGS=0to10V
Gate charge total
Qg
-
169
211
nC
VDD=50V,ID=100A,VGS=0to10V
Gate plateau voltage
Vplateau
-
4.4
-
V
VDD=50V,ID=100A,VGS=0to10V
Gate charge total, sync. FET
Qg(sync)
-
146
-
nC
VDS=0.1V,VGS=0to10V
Qoss
-
213
284
nC
VDD=50V,VGS=0V
Unit
Note/TestCondition
Min.
Typ.
Max.
Qgs
-
53
Qg(th)
-
Gate to drain charge
Qgd
Switching charge
2)
2)
2)
Output charge
Table7Reversediode
Parameter
Symbol
Diode continuous forward current
Diode pulse current
Diode forward voltage
2)
Reverse recovery time
2)
Reverse recovery charge
1)
2)
Values
Min.
Typ.
Max.
IS
-
-
300
A
TC=25°C
IS,pulse
-
-
1200
A
TC=25°C
VSD
-
0.9
1.2
V
VGS=0V,IF=100A,Tj=25°C
trr
-
103
206
ns
VR=50V,IF=100A,diF/dt=100A/µs
Qrr
-
316
632
nC
VR=50V,IF=100A,diF/dt=100A/µs
See ″Gate charge waveforms″ for parameter definition
Defined by design. Not subject to production test.
Final Data Sheet
6
Rev.2.1,2015-02-23
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
5Electricalcharacteristicsdiagrams
Diagram1:Powerdissipation
Diagram2:Draincurrent
400
350
350
300
300
250
200
ID[A]
Ptot[W]
250
200
150
150
100
100
50
50
0
0
25
50
75
100
125
150
0
175
0
25
50
75
TC[°C]
100
125
150
175
200
TC[°C]
Ptot=f(TC)
ID=f(TC);VGS≥10V
Diagram3:Safeoperatingarea
Diagram4:Max.transientthermalimpedance
4
100
10
1 µs
103
0.5
10 µs
10-1
102
ZthJC[K/W]
ID[A]
100 µs
1 ms
1
0.2
10
0.1
0.05
0.02
10
10 ms
DC
-2
0.01
100
single pulse
10-1
10-1
100
101
102
103
10-3
10-6
10-5
10-4
VDS[V]
10-2
10-1
100
tp[s]
ID=f(VDS);TC=25°C;D=0;parameter:tp
Final Data Sheet
10-3
ZthJC=f(tp);parameter:D=tp/T
7
Rev.2.1,2015-02-23
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
Diagram5:Typ.outputcharacteristics
Diagram6:Typ.drain-sourceonresistance
800
3.0
10 V
6V
7V
5V
5.5 V
700
2.5
600
5.5 V
RDS(on)[mΩ]
ID[A]
500
400
300
5V
2.0
6V
1.5
7V
10 V
1.0
200
0.5
100
0
0.0
0.5
1.0
1.5
2.0
2.5
0.0
3.0
0
100
200
VDS[V]
300
400
500
600
700
800
ID[A]
ID=f(VDS);Tj=25°C;parameter:VGS
RDS(on)=f(ID);Tj=25°C;parameter:VGS
Diagram7:Typ.transfercharacteristics
Diagram8:Typ.forwardtransconductance
700
360
320
600
280
500
240
ID[A]
gfs[S]
400
300
200
160
120
200
80
100
175 °C
40
25 °C
0
0
1
2
3
4
5
6
7
0
0
VGS[V]
80
120
160
ID[A]
ID=f(VGS);|VDS|>2|ID|RDS(on)max;parameter:Tj
Final Data Sheet
40
gfs=f(ID);Tj=25°C
8
Rev.2.1,2015-02-23
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
Diagram9:Drain-sourceon-stateresistance
Diagram10:Typ.gatethresholdvoltage
3.5
4
3.0
2800 µA
3
280 µA
max
2.0
1.5
VGS(th)[V]
RDS(on)[mΩ]
2.5
typ
1.0
2
1
0.5
0.0
-60
-20
20
60
100
140
0
-60
180
-20
20
60
Tj[°C]
100
140
180
Tj[°C]
RDS(on)=f(Tj);ID=150A;VGS=10V
VGS(th)=f(Tj);VGS=VDS
Diagram11:Typ.capacitances
Diagram12:Forwardcharacteristicsofreversediode
5
104
10
25 °C
175 °C
175°C max
25°C max
104
103
Ciss
IF[A]
C[pF]
Coss
103
102
101
101
Crss
0
20
102
40
60
80
100
100
0.0
0.5
VDS[V]
1.5
2.0
2.5
VSD[V]
C=f(VDS);VGS=0V;f=1MHz
Final Data Sheet
1.0
IF=f(VSD);parameter:Tj
9
Rev.2.1,2015-02-23
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
Diagram13:Avalanchecharacteristics
Diagram14:Typ.gatecharge
103
10
50 V
9
8
7
25 °C
102
20 V
VGS[V]
6
IAV[A]
100 °C
80 V
5
4
1
10
125 °C
3
2
1
100
100
101
102
103
0
0
tAV[µs]
50
100
150
200
Qgate[nC]
IAS=f(tAV);RGS=25Ω;parameter:Tj(start)
VGS=f(Qgate);ID=100Apulsed;parameter:VDD
Diagram15:Drain-sourcebreakdownvoltage
Gate charge waveforms
110
108
106
VBR(DSS)[V]
104
102
100
98
96
94
-60
-20
20
60
100
140
180
Tj[°C]
VBR(DSS)=f(Tj);ID=1mA
Final Data Sheet
10
Rev.2.1,2015-02-23
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
6PackageOutlines
1) partially covered with Mold Flash
DIM
A
b
b1
b2
c
D
D2
E
E1
E4
E5
e
H
H1
H2
H3
H4
N
K1
L
L1
L2
L4
MILLIMETERS
MIN
MAX
2.20
2.40
0.70
0.90
9.70
9.90
0.42
0.50
0.40
0.60
10.28
10.58
3.30
9.70
10.10
7.50
8.50
9.46
1.20 (BSC)
11.48
6.55
11.88
6.75
INCHES
MIN
0.087
0.028
0.382
0.017
0.016
0.405
0.295
0.335
0.372
0.047 (BSC)
0.452
0.258
2
0
2
4mm
EUROPEAN PROJECTION
0.083
ISSUE DATE
20-02-2014
0.051
REVISION
02
0.028
0.024
1.30
0
SCALE
0.468
0.266
0.063
0.70
0.60
1.00
0.398
0.281
0.141
0.128
8
0.165
2.10
DOCUMENT NO.
Z8B00169619
0.130
0.382
7.15
3.59
3.26
8
4.18
1.60
MAX
0.094
0.035
0.390
0.020
0.024
0.416
0.039
Figure1OutlinePG-HSOF-8-1
Final Data Sheet
11
Rev.2.1,2015-02-23
OptiMOSTM5Power-Transistor,100V
IPT015N10N5
RevisionHistory
IPT015N10N5
Revision:2015-02-23,Rev.2.1
Previous Revision
Revision
Date
Subjects (major changes since last revision)
2.0
2014-12-17
Release of final version
2.1
2015-02-23
Correction of SOA area with Ipulse = 1200A
WeListentoYourComments
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Publishedby
InfineonTechnologiesAG
81726München,Germany
©2015InfineonTechnologiesAG
AllRightsReserved.
LegalDisclaimer
Theinformationgiveninthisdocumentshallinnoeventberegardedasaguaranteeofconditionsorcharacteristics.With
respecttoanyexamplesorhintsgivenherein,anytypicalvaluesstatedhereinand/oranyinformationregardingtheapplication
ofthedevice,InfineonTechnologiesherebydisclaimsanyandallwarrantiesandliabilitiesofanykind,includingwithout
limitation,warrantiesofnon-infringementofintellectualpropertyrightsofanythirdparty.
Information
Forfurtherinformationontechnology,deliverytermsandconditionsandpricespleasecontactyournearestInfineon
TechnologiesOffice(www.infineon.com).
Warnings
Duetotechnicalrequirements,componentsmaycontaindangeroussubstances.Forinformationonthetypesinquestion,
pleasecontactthenearestInfineonTechnologiesOffice.
TheInfineonTechnologiescomponentdescribedinthisDataSheetmaybeusedinlife-supportdevicesorsystemsand/or
automotive,aviationandaerospaceapplicationsorsystemsonlywiththeexpresswrittenapprovalofInfineonTechnologies,ifa
failureofsuchcomponentscanreasonablybeexpectedtocausethefailureofthatlife-support,automotive,aviationand
aerospacedeviceorsystemortoaffectthesafetyoreffectivenessofthatdeviceorsystem.Lifesupportdevicesorsystemsare
intendedtobeimplantedinthehumanbodyortosupportand/ormaintainandsustainand/orprotecthumanlife.Iftheyfail,itis
reasonabletoassumethatthehealthoftheuserorotherpersonsmaybeendangered.
Final Data Sheet
12
Rev.2.1,2015-02-23
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