Communicated by John Wyatt Synthetic Neural Circuits Using Current-Domain Signal Representations Andreas G. Andreou Kwabena A. Bpahen Electrical and Computer Engineering, The Johns Hopkins University, Baltimore, MD 21218 USA We present a new approach to the engineering of collective analog computing systems that emphasizes the role of currents as an appropriate signal representation and the need for low-power dissipation and simplicity in the basic functional circuits. The design methodology and implementation style that we describe are inspired by the functional and organizational principles of neuronal circuits in living systems. We have implemented synthetic neurons and synapses in analog CMOS VLSI that are suitable for building associative memories and self-organizing feature maps. 1 Introduction Connectionist architectures, neural networks, and cellular automata (Rumelhart and McClelland 1986; Kohonen 1987; Grossberg 1988; Toffoli 1988) have large numbers of simple and highly connected processing elements and employ massively parallel computing paradigms, features inspired by those found in the nervous system. In a hardware implementation, the physical laws that govern the cooperative behavior of these elements are exploited to process information. This is true both at the system level, where global properties such as energy are used, and at the circuit level, where the device physics are exploited. For example, Hopfield’s network (1982) uses the stable states of a dynamic system to represent information; associative recall occurs as the system converges to its local energy minima. On the other hand, Mead’s retina (1989) uses the native properties of silicon transistors to perform local automatic gain control. In this paper we discuss the importance of signal representations in the implementation of such systems, emphasizing the role of currents. The paper is organized into six sections: Section 2 describes the roles played by current as well as voltage signals. The metal-oxidesemiconductor (MOS) transistor, the basic element of complementaryMOS (CMOS) very large scale integration (VLSI) technology, is introduced in Section 3. In the subthreshold region, the MQS transistor’s behavior strongly resembles that of the ionic channels in excitable cell Neural Computation 1, 489-501 (1989) © 1989 Massachusetts Institute of Technology 490 Andreas G. Andreou and Kwabena A. Boahen membranes. Translinear circuits, a computationally rich class of circuits with current inputs and outputs, are reviewed in Section 4. These circuits are based on the exponential transfer characteristics of the transistors, a property that also holds true for certain ionic channels. Simple and useful circuits for neurons and synapses are described in Section 5. Proper choice of signal representations leads to very efficient realizations; a single line provides two-way communication between neurons. Finally, a brief disscussion of the philosophy behind the adopted design methodology and implementation style is presented in Section 6. 2 Signals In an electronic circuit, signals are represented by either voltages or currents.1 A digital CMOS circuit depends on two well defined voltage levels for reliable computation. Currents play only an incidental role of establishing the desired voltage levels (through charging or discharging capacitive nodes). Since the abstract Turing model of computation does not specify the actual circuit implementation, two distinct current levels will work as well. In contrast, the circuits described here use analog signals and rely heavily on currents; both currents and voltages having continuous values. At the circuit level, Kirchoff’s current law (KCL) and Kirchoff’s voltage law (KVL) are exploited to implement computational primitives. KCL states that the sum of the currents entering a node equals the sum of the currents leaving it (conservation of ,charge). So current signals may be summed simply by bringing them to the same node. KVL states that the sum of voltages around a closed loop is zero (conservation of energy). Therefore, voltage signals may be summed as well. Actually, the translinear circuits described in Section 4 rely on KVL while avoiding the use of differential voltage signals (not referenced to ground). Voltages are used for communicating results to different parts of the system or for storing information locally. Accumulation of charge on a capacitor (driven by a current source) results in a voltage that represents local memory in the system. This also implements the useful function of temporal integration. Distributed memory can be realized using spatiotemporal patterns of charge, following the biological model (Freeman et al. 1988; Eisenberg et al. 1989). In this type of memory, stored information is represented by limit-cycles in the phase space of a dynamic system. However, in current VLSI implementations, memory is represented as point attractors (i.e., a stable equilibrium) in the spatial distributions of charge, as, for example, in our bidirectional associative memory chips (Boahen et al. 1989a,b). 1 This may be an area in which biological systems have a distinct advantage by employing both chemical and electrical signals in the computation. Synthetic Neural Circuits Using Current-Domain Signal Representations 491 +m- Figure 1: The MOS transistor. (a) Structure. 3 Devices The MOS transistor, shown in Figure la, has four terminals: the gate (G), the source (S), the drain (D), and the substrate (B, for bulk). The gate and source potentials control the charge density in the channel between the source and the drain, and hence the current passed by the device. The MOS transistor is analogous to an ensemble of ionic channels in the lipid membrane of a cell controlled by the transmembrane potential. We operate the MOS transistor in the so-called "off" region, characterized by gate source voltages that are below the threshold voltage. In this region charge transport is by diffusion from areas of high carrier concentration to energetically preferred areas of lower carrier concentration. This is referred to as weak-inversion (ViHoz and Fellrath 1977) or subthreshold conduction (Mead 1989; Maher et al. 1989). The transfer characteristics are shown in Figure lb. These curves are very similar to those for the calcium-controlled sodium channel, Hille (1984, p. 317). In both cases the exponential relationships arise from the Boltzmann distribution. The subthreshold current is given by2 = I0e[(1-K)Vbs]/VTeKVgs/VT (1 - e-Vds/VT + Vds/V0) 2 (3.1) For the sake of brevity, we discuss only the n-type device whose operation depends on the transport of negative charges. The operation of a p-type device is analogous. 492 Andreas G. Andreou and Kwabena A. Boahen 0.7 . . . . . 0.6 0.5 . 0.4 o .2 l V d s (V) 0.4 0.6 0.8 1.0 Figure 1: Cont’d (b) transfer characteristics, (C) output characteristics. To first order, the current is exponentially dependent on both the substrate and the gate voltages. In (b) the dots show measured data from an n-type transistor of size 4 x 4 µm, with V d s = 1.0 V . The solid lines are obtained using equation 3.1 with I0 = 0.72 x 10-18A and K = 0.75. The data in (b) are for a similar device with V bs = o; it is fitted with V0 = 15.0 V . where I0 is the zero-bias current and K measures the effectiveness of the gate potential in controlling the channel current. To first order, the effectiveness of the substrate potential is given by (1- K ) ; VT = k T / q , the thermal voltage, equals 26 mV at room temperature, and V0 is the Early voltage, which can be determined from the slope of the I d s versus Vds curves. Notice that I d s changes by a factor of e for a V T /K = 33.0 mV change in V gs . This drain current equation is equivalent to that in Maher Synthetic Neural Circuits Using Current-Domain Signal Representations 493 et al. (1989); however, in this form the dependence on the substrate voltage is explicit. This three parameter model is adequate for rough design calculations but not for accurate simulation of device operation. Refer to Mead (1989, Appendix B) for a more elaborate model. Subthreshold currents are comparable to currents in cell membranes; they range from a few picoamps to a few microamps. For a given gate-source voltage V gs , the MOS transistor has two distinct modes of operation, determined by the drain-source voltage V d s , as shown by the output characteristicsin Figure 1c. The behavior is roughly linear if V d s is less than Vdsat 100 mV; small changes in V d s cause proportional changes in the drain current. For voltages above V d s a t , the current saturates. In this region the MOS transistor is a current source with output conductance: The change in drain current for a small change in gate voltage is given by g m is called the transconductance because it relates a current between two nodes to a voltage at a third node. As we shall see, the subthreshold MOS transistor is a very versatile circuit element because gm >> g d s a t . 4 Circuits Area-efficient (compact) functional blocks can be obtained by using the MOS transistor itself to perform as many circuit functions as possible. The three possible circuit configurations for the transistor are shown in Figure 2: In the common-source mode, it is an inverting amplifier with high voltage gain: g m / g d s a t . In the common-drain mode, it is a voltage follower with low output resistance; 1/gm. In the common-gate mode, it is a current buffer with low output conductance; g d s a t . In the synthetic neuronal circuits described in the next section the inverting amplifier is used as a feedback element to obtain more ideal circuit operation while the voltage follower and the current buffer are used to effectively transfer signals between different circuits. 494 Andreas G. Andreou and Kwabena A. Boahen The actual computations are performed by current-domain (or currentmode) circuits. A Current-Domain (CD) circuit is one whose input signals and output signals are currents. The simplest CD circuit is shown in Figure 3. This circuit copies the input current to the output and reverses its direction. It is appropriately named a current mirror. The circuit has just two transistors: an input transistor and an output transistor. The input current I in is converted to a voltage Vb by the input transistor. This voltage sets the gate voltage of the output transistor. Thus, both devices have the same gate-source voltages and will pass the same current if they are identical and have the same drain and substrate voltages. In practice, device mismatch produces random variations in the output current, while the nonzero drain conductance results in systematic variations. More complicated mirror circuits, for example, the Wilson mirror or the Complex mirror (Pavasovic et al. 1988), may be used to obtain lower output conductance. By using more output devices, several copies of the input current can be obtained. The current mirror is analogous to a basic synapse structure in biological systems: it is simple in (a) Common-source, Figure 2: MOS transistor circuit configurations. (b) common-drain, and (C) common-gate modes of operation. In (a) voltage gain is obtained by converting the current produced by the device's transconductance to a voltage across its drain conductance. In (b) a voltage follower/buffer is realized; the gate-source drop is kept constant by using a fixed bias current and setting Vbs = O. In (C) the device serves as a current buffer by transferring the signal from its high conductance source terminal to the low conductance drain node. Synthetic Neural Circuits Using Current-Domain Signal Representations 495 Y Figure 3: Current mirror circuits using (a) n-type and (b) ptype transistors. These circuits provide an output current that equals the input current if the devices are perfectly matched. For subthreshold operation, we observe variations of about l0%, on average: using 4 x 4pm devices. form, it enforces unidirectional information flow, and it can function over a large range of input and output signal levels. Translinear circuits (Gilbert 1975)are a computationally powerful subclass of CD circuìts. A translinear circuit is defined as one whose Operation depends on the linear relationship between the transconductance and the channel current of the active devices (Equation 3.3).3 The current mirror in subthreshold operation is an example of a translinear circuit. The Translinear Principle (Gilbert 1975) can be used to synthesize a wide variety of circuits to perform both linear and nonlinear operations on the current inputs, including products, quotients, and power terms with fixed exponents. The Gilbert current multiplier is one of the better known translinear circuits. Gilbert's elegant analog array normalizer (1984) is an example of a more powerful translinear circuit. One fascinating aspect of translinear circuits is that although the currents in its constitutive elements (the transistors) are exponentially dependent on temperature, the overall input/output relationship is insensitive to isothermal temperature variations. The effect of small local variations in fabrication parameters can also be shown to be temperature independent. Finally, translinear circuits are simple, because an analog representation is used and the native device properties provide the computational primitives. 3 Translinear circuits have traditionally been built using bipolar transistors. Andreas G. Andreou and Kwabena A. Boahen 496 5 Synapses and Neurons In a neuronal circuit, the interaction between neurons is mediated by a large variety of synapses (Shepherd 1979). A neuron receives its inputs from other neurons through synaptic junctions that may have different efficacies. In a VLSI system, the synapses are implemented as a twodimensional array with the neurons on the periphery. This is because O(N2) synapses are required in a network with N neurons. Generally, two sets of lines (buses) are run between the neurons and the synaptic array; one carries neuronal output to the synapses and the other feeds input to the neurons. However, in networks with reciprocal connections, such as the bidirectional associative memory (Boahen et al. 1989a,b), proper choice of signal representations leads to a more efficient implementation. Our circuit implementations for neurons and synapses are shown in Figure 4. These circuits use voltage to represent a neuron’s output (presynapticsignal) and cùrrent to represent its inputs (postsynapticSignals). Since currents and voltages may be independently transmitted along the same line, these signal representations allow a neuron’s output and I n2 I Iout M1 1 Figure 4: Circuits for synapsesand neurons. (a)Reciprocal synapse and (b)neuron. These circuits demonstrate efficient signal representations that use a single line to provide two-way communication. A voltage is used to represent information going one way while a current is used to send information the other way. The synapse circuit in (a) provides bidirectional interaction between two neurons connected to nodes n1 and n2. The neuron circuit in (b) sends out a voltage that mirrors its output current Iout in the synapses while receiving the total current I a from these synapses. Synthetic Neural Circuits Using Current-Domain Signal Representations 497 inputs to be communicated using just one line. Voltage output facilitates fan-out while current input provides summation. Thus, in close analogy to actual neuronal microcircuits, the output signal is generated at the same node at which inputs are integrated. The two transistor synapse circuit (Figure 4a) provides bidirectional interaction between neurons connected to nodes n1 and n2; each transistor serves as a synaptic junction. When S is at ground, voltages applied at nodes n1 and n2 are transformed into currents by the transconductances of M2 and M1, respectively. If these voltages exceed Vdsat, the transistors are in saturation and act as current sources. Thus, changes in the voltage at n1(n2) do not affect the current in M1(M2). Actually, for a small change in Vn1,the changes in I1 and I2 arerelated by This gives Hence, we can double I2 (using the voltage at n1) while disturbing I1 by only 0.2%.The interaction is turned off by setting S to a high voltage, or modulated by applying an analog signal to the substrate. The circuit for the neuron also uses just two transistors (Figure 4b). The net input current I a (for activation), formed by summing the inputs at node n, is available at the drain of M1. This device buffers the input current and controls the output voltage. I a is fed through a nonlinearity, for example, thresholding (not shown), to obtain Iout, which sets the output voltage Vout. This is accomplished by using M1 as a voltage follower and providing feedback through M2, which functions as an inverting amplifier; M1 adjusts Vout so that the current in M2 equals Iout. Hence, Vout will mirror I out in the synapses. The feedback makes the output voltage insensitive to changes in the input current, Ia. Actually, the output conductance is approximately gm1gm2/gdsat2; it is increased by a factor equal to the gain provided by M2. In this case, a small change in Vout produces changes in I a and I s (the postsynaptic copy of I o u t ) given by Hence, if I, doubles, the resulting change in Vout decreases I , by only 0.2%-just as in the previous case. Note that Iout must always exceed a few picoamps to keep Vout above Vdsat. The characteristics of these 498 Andreas G. Andreou and Kwabena A. Boahen Figure 5: Characteristics of a synthetic neuronal circuit. (a) A simple circuit consisting of two neurons (nl and n 2 ) and a synapse ( S ) was built and tested to demonstrate the proposed communication scheme. The currents sent by n l (n 2 ) and that received by n 2 (n l ) are denoted by I12(I21) and Î12(Î21), respectively. Continued on next page. circuits, designed using 4 p m x 4 p m devices and fabricated through MOSIS, are shown in Figure 5a-c. 6 Discussion The adopted design methodology is governed by three simple principles: First, the computation is carried out in the analog domain; this gives simple functional blocks and makes efficient use of interconnect lines. Second, the physical properties of silicon-based devices and circuits are used synergetically to obtain the desired result. Third, circuits are designed with power dissipation and area efficiency as prime engineering constraints, not accuracy or speed. We believe power dissipation will be a serious limitation in large scale-analog computing hardware. Unlike digital integrated circuits, the massive parallelism and concurrency attainable with analog computation impose serious limits on the amount of power that each circuit can dissipate. This is why we operate the devices with currents in the nanoamps range and, if possible, picoamps, about the same current levels found in biological systems. This approach is similar to, and strongly influenced by, that of Mead’s group at Caltech. Our approach is more minimalistic, we view the transistor itself as the basic building block; not the transconductance amplifier. Thus, currents, rather than differential voltages, are the primary signal representation. Synthetic Neural Circuits Using Current-Domain Signal Representations I21^ (nA) 1o o-- 499 V b s (mV) 8 O-- 60-- O 4o-- - 50 2 o-- -100 20 40 60 80 l I12 (nA) 100 (b) I12^ 100 Vbs (mV) 6 O-- 4o-- 20 40 60 80 l I12 (nA) 100 Figure 5: Cont'd Plots (b) and (c) show how I^12 and I^ 21 vary as I 1 2 is stepped from 2.0nA to 100nA while I21 is held at 50nA, for various substrate bias voltages. The values Vbs = O, -50, and -100mV correspond to weights of 0.93, 0.57, and 0.33, respectively. Notice that these weights modulate signals going both ways symmetrically. We are not concerned about accuracy or matching in the basic elements because biological systems perform well despite the limited precision of their neurons and synaptic connections. The emerging view is that this is a result of the collective nature of the computation performedwhereby large numbers of elements contribute to the final result. From 500 Andreas G. Andreou and Kwabena A. Boahen a system designer’s point of view, this means that random variations in transistor characteristics are not deleterious to the system’s performance, whereas systematic variations are and must therefore be kept to a minimum. Indeed, we have observed this in silicon chips. The translinear property of the subthreshold MOS transistor provides a very powerful computational primitive., This property arises from the highly nonlinear relationship between the gate potential and the channel current. In fact, the exponential is the strongest nonlinearity relating a voltage and a current in solid-state devices (Shockley 1963; Gunn 1968). It is interestingto note that the same property holds for voltage-activated ionic channels, however, the conductance dependence is steeper due to correlated charge control of the current (Hille 1984, p. 55). In translinear (current-domain) circuits we have seen a classical example of how a rich form for circuit design emerges from the properties of the basic units (MOS transistor in subthreshold). To summarize, we have addressed some issues related to the engineering of collective analog computing systems. In particular, we have demonstrated that currents are an appropriate analog signal representation. Current levels comparable to those in excitable membranes are achieved by operating the devices in the subthreshold region resulting in manageable power dissipation levels. This design methodology and implementation style have been used to build associative memories (Boahen et al. 1989a, b) and self-organizing feature maps in analog VLSI. Acknowledgments This research was funded by the Independent Research and Development program of the Applied Physics Laboratory; we thank Robert Jenkins for his personal interest and support. The authors would like to thank Professor Carver Mead of Caltech for encouraging this work. Philippe Pouliquen and Marc Cohen made excellent comments on the paper and Sasa Pavasovic helped with acquiring the experimental data. We are indebted to Terry Sejnowski, who provided a discussion forum and important insights in the field of neural computation at Johns Hopkins University. We thank the action editor, Professor John Wyatt, for his critical review and insightful comments. References Boahen, K. A., Pouliquen, P. O., Andreou, A. G., and Jenkins, R. E. 1989a. A heteroassociative memory using current-mode MOS analog VLSI circuits. I E E E Trans. Circ. Sys. 36 (5), 643-652. Boahen, K. A., Andreou, A. G., Pavasovic, A., and Pouliquen, P. O. 1989b. Architectures for associative memories using current-mode analog MOS circuits. Synthetic Neural Circuits Using Current-Domain Signal Representations 501 Proceedings of the Decennial Caltech Conference on VLSI, C. Seitz, ed. MIT Press, Cambridge, MA. Eisenberg, J., Freeman, W. J., and Burke, B. 1989. Hardware architecture of a neural network model simulating pattern recognition by the olfactory bulb. Neural Networks 2, 315-325. Freeman, W. J., Yao, Y., and Burke, B. 1988. Central pattern generating and recognizing in olfactory bulb: A correlation learning rule. Neural Networks 1,277-288. Gilbert, B. 1975. Translinear circuits: A proposed classification. Electron. Lett. 11 (l),14-16. Gilbert, B. 1984. A monolithic 16-channel analog array normalizer. IEEE J. Solid-state Circuits SC-19, 956-963. Grossberg, S. 1988. Nonlinear neural networks: Principles, mathematics, and architectures. Neural Networks 1, 17-61. Gunn, J. B. 1968. Thermodynamics of nonlinearity and noise in diodes. J. Appl. Phy. 39 (12), 5357-5361. Hille, B. 1984. Ionic Channels of Excitable Membranes. Sinauer, Sunderland, MA. Hopfield, J. J. 1982. Neural networks ahd physical systems with emergent computational abilities. Proc. Natl. Acad. Sci. U.S.A. 79, 2554-2558. Kohonen, T. 1987. Self-Organization 'and Associative Memory. Springer-Verlag, New York. Maher, M. A. C., DeWeerth, S. P., Mahawold, M. A., and Mead, C. A. 1989. Implementing neural architectures using analog VLSI circuits. IEEE Trans. Circ. Sys. 36 (5), 643-652. Mead, C. A. 1989. Analog VLSI and Neural Systems. Addison-Wesley, Reading, MA. Pavasovic, A., Andreou, A. G., and Westgate, C. R. (1988) An investigation of minimum-size, nano-power MOS current mirrors for analog VLSI systems. JHU Elect. Computer Eng. Tech. Rep., JHU/ECE 88-10. Rumelhart, D. E., and McClelland, J. L. 1986. Parallel Distributed Processing: Explorations in the Microstructure of Cognition. MIT Press, Cambridge, MA. Shepherd, G. M. 1979. The Synaptic Organization of the Brain. Oxford University Press, New York. Shockley, W. 1963. Electrons and Holes in Semiconductors, p. 90. D. van Nostrand, Princeton, NJ. Toffoli, T. 1988. Information transport obeying the continuity equation. IBM J. Res. Dev. 32, 29-35. ViHoz, E. A., and Fellrath, J. 1977. CMOS analog integrated circuits based on weak inversion operation. IEEE J. Solid-state Circuits SC-12, 224-231. Received 30 March 1989; accepted 13 October 1989.
* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project