Acrosser Technology AR-B1462 User's Guide

AR-B1462

INDUSTRIAL GRADE

486DX/DX2/DX4 CPU CARD

User’ s Guide

Edition: 2.0

Book Number: AR-B1462-99.A02

Table of Contents

0.

PREFACE....................................................................................................................................................... 0-3

0.1

0.2

0.3

0.4

0.5

0.6

0.7

COPYRIGHT NOTICE AND DISCLAIMER ................................................................................................................................0-3

WELCOME TO THE AR-B1462 CPU BOARD ...........................................................................................................................0-3

BEFORE YOU USE THIS GUIDE...............................................................................................................................................0-3

RETURNING YOUR BOARD FOR SERVICE............................................................................................................................0-3

TECHNICAL SUPPORT AND USER COMMENTS ...................................................................................................................0-3

ORGANIZATION..........................................................................................................................................................................0-4

STATIC ELECTRICITY PRECAUTIONS....................................................................................................................................0-4

1.

OVERVIEW..................................................................................................................................................... 1-1

1.1

1.2

1.3

INTRODUCTION .........................................................................................................................................................................1-1

PACKING LIST ............................................................................................................................................................................1-2

FEATURES ..................................................................................................................................................................................1-2

2.

SYSTEM CONTROLLER ................................................................................................................................ 2-1

2.1

2.2

DMA CONTROLLER ...................................................................................................................................................................2-1

KEYBOARD CONTROLLER .......................................................................................................................................................2-1

2.3

2.3.1

INTERRUPT CONTROLLER ......................................................................................................................................................2-2

I/O Port Address Map ..........................................................................................................................................................2-3

2.4

2.3.2

I/O Channel Pin Assignment (Bus1) ...................................................................................................................................2-3

REAL-TIME CLOCK AND NON-VOLATILE RAM ......................................................................................................................2-5

2.5

2.6

2.7

TIMER ..........................................................................................................................................................................................2-5

SERIAL PORT .............................................................................................................................................................................2-6

PARALLEL PORT........................................................................................................................................................................2-8

3.

SETTING UP THE SYSTEM............................................................................................................................ 3-1

3.1

OVERVIEW..................................................................................................................................................................................3-1

3.2

3.2.1

SYSTEM SETTING .....................................................................................................................................................................3-2

FDD Port Connector (CN8) .................................................................................................................................................3-2

3.2.2

3.2.3

3.2.4

3.2.5

3.2.6

3.2.7

3.2.8

3.2.9

3.2.10

3.2.11

3.2.12

3.2.13

Hard Disk (IDE) Connector .................................................................................................................................................3-3

Parallel Port Connector (CN9) ............................................................................................................................................3-4

PC/104 Connector ...............................................................................................................................................................3-5

LED Header (LM1) ..............................................................................................................................................................3-7

Serial Port ............................................................................................................................................................................3-7

Keyboard Connector .........................................................................................................................................................3-11

External Speaker Header (J9) ..........................................................................................................................................3-11

Power Connector ...............................................................................................................................................................3-11

Reset Header (J6) .........................................................................................................................................................3-12

PS/2 Mouse Connector .................................................................................................................................................3-12

Battery Setting ...............................................................................................................................................................3-13

26-Pin Audio Connector (CN10) ...................................................................................................................................3-13

3.2.14

3.2.15

3.2.16

CPU Setting ...................................................................................................................................................................3-14

PCI Connector ...............................................................................................................................................................3-15

Memory Setting .............................................................................................................................................................3-16

3.3

3.3.1

3.3.2

ETHERNET CONTROLLER .....................................................................................................................................................3-16

Network 4-Pin Connector (J3)...........................................................................................................................................3-17

AUI Connector (CN2) ........................................................................................................................................................3-17

4.

CRT/LCD FLAT PANEL DISPLAY .................................................................................................................. 4-1

4.1

4.1.1

CONNECTING THE CRT MONITOR .........................................................................................................................................4-1

CRT Connector (CN13).......................................................................................................................................................4-1

4.2

4.2.1

LCD FLAT PANEL DISPLAY ......................................................................................................................................................4-2

Inverter Board Description ..................................................................................................................................................4-4

4.3

4.2.2

LCD Connector ....................................................................................................................................................................4-4

SUPPORTED LCD PANEL .........................................................................................................................................................4-4

5.

INSTALLATION .............................................................................................................................................. 5-1

5.1

5.2

5.2.1

5.2.2

OVERVIEW..................................................................................................................................................................................5-1

UTILITY DISKETTE.....................................................................................................................................................................5-1

VGA Driver...........................................................................................................................................................................5-2

Audio Driver .........................................................................................................................................................................5-4

5.3

5.2.3

Network & SSD Utility..........................................................................................................................................................5-6

WATCHDOG TIMER ...................................................................................................................................................................5-9

5.3.1

5.3.2

Watchdog Timer Setting......................................................................................................................................................5-9

Watchdog Timer Enabled..................................................................................................................................................5-10

5.3.3

5.3.4

Watchdog Timer Trigger....................................................................................................................................................5-10

Watchdog Timer Disabled .................................................................................................................................................5-10

6.

SOLID STATE DISK ....................................................................................................................................... 6-1

6.1

OVERVIEW..................................................................................................................................................................................6-1

0-1

6.2

6.2.1

SWITCH SETTING ......................................................................................................................................................................6-1

Overview ..............................................................................................................................................................................6-2

6.2.2

6.2.3

I/O Port Address Select (SW1-1) ........................................................................................................................................6-2

SSD Firmware Address Select (SW1-2).............................................................................................................................6-2

6.2.4

6.2.5

6.2.6

6.2.7

SSD Drive Number (SW1-4 & SW1-5) ...............................................................................................................................6-3

ROM Type Select (SW1-6 & SW1-7)..................................................................................................................................6-4

Serial Port 1 Mode Select (SW1-8).....................................................................................................................................6-4

Serial Port 2 Mode Select (SW1-9 & SW1-10)...................................................................................................................6-5

6.3

6.4

6.4.1

6.4.2

JUMPER SETTING .....................................................................................................................................................................6-5

ROM DISK INSTALLATION ........................................................................................................................................................6-6

UV EPROM (27Cxxx)..........................................................................................................................................................6-6

Large Page 5V FLASH Disk................................................................................................................................................6-7

6.4.3

6.4.4

Small Page 5V FLASH ROM Disk ......................................................................................................................................6-9

RAM Disk ...........................................................................................................................................................................6-11

6.5

6.4.5

Combination of ROM and RAM Disk ................................................................................................................................6-12

DISKONCHIP INSTALLATION .................................................................................................................................................6-12

7.

BIOS CONSOLE ............................................................................................................................................. 7-1

7.1

7.2

7.3

7.4

BIOS SETUP OVERVIEW ..........................................................................................................................................................7-1

STANDARD CMOS SETUP ........................................................................................................................................................7-2

ADVANCED CMOS SETUP........................................................................................................................................................7-3

ADVANCED CHIPSET SETUP...................................................................................................................................................7-6

7.5

7.6

PERIPHERAL SETUP .................................................................................................................................................................7-7

AUTO-DETECT HARD DISKS....................................................................................................................................................7-7

7.7

7.7.1

PASSWORD SETTING ...............................................................................................................................................................7-7

Setting Password.................................................................................................................................................................7-8

7.8

7.7.2

Password Checking.............................................................................................................................................................7-8

LOAD DEFAULT SETTING.........................................................................................................................................................7-8

7.8.1

7.8.2

Auto Configuration with Optimal Setting.............................................................................................................................7-8

Auto Configuration with Fail Safe Setting ...........................................................................................................................7-8

7.9

7.9.1

BIOS EXIT....................................................................................................................................................................................7-8

Save Settings and Exit ........................................................................................................................................................7-8

7.9.2

7.10

Exit Without Saving .............................................................................................................................................................7-9

BIOS UPDATE.........................................................................................................................................................................7-9

8.

SPECIFICATIONS & SSD TYPES SUPPORTED............................................................................................. 8-1

8.1

8.2

SPECIFICATIONS .......................................................................................................................................................................8-1

SSD TYPES SUPPORTED .........................................................................................................................................................8-1

9.

PLACEMENT & DIMENSIONS........................................................................................................................ 9-1

9.1

9.2

PLACEMENT ...............................................................................................................................................................................9-1

DIMENSIONS ..............................................................................................................................................................................9-2

10.

PROGRAMMING RS-485 & INDEX ............................................................................................................10-1

10.1

10.2

PROGRAMMING RS-485 .....................................................................................................................................................10-1

INDEX ....................................................................................................................................................................................10-3

0-2

0. PREFACE

0.1 COPYRIGHT NOTICE AND DISCLAIMER

April 1999

Acrosser Technology makes no representations or warranties with respect to the contents hereof and specifically disclaims any implied warranties of merchantability or fitness for any particular purpose. Furthermore, Acrosser

Technology reserves the right to revise this publication and to make changes from time to time in the contents hereof without obligation of Acrosser Technology to notify any person of such revisions or changes.

Possession, use, or copying of the software described in this publication is authorized only pursuant to a valid written license from Acrosser or an authorized sublicensor.

(C) Copyright Acrosser Technology Co., Ltd., 1997. All rights Reserved.

Acrosser, ALI, AMI, HMC, IBM PC/AT, Windows 3.1, Windows 95, Windows NT, AMD, Cyrix, Intel …are registered trademarks.

All other trademarks and registered trademarks are the property of their respective holders.

This document was produced with Adobe Acrobat 3.01.

0.2 WELCOME TO THE AR-B1462 CPU BOARD

This guide introduces the Acrosser AR-B1462 CPU board.

Use the information describes this card’ s functions, features, and how to start, set up and operate your AR-

B1462. You also could find general system information here.

0.3 BEFORE YOU USE THIS GUIDE

If you have not already installed this AR-B1462, refer to the Chapter 3, “Setting Up the System” in this guide.

Check the packing list, make sure the accessories in the package.

The AR-B1462 diskette provides the newest information about the card. Please refer to the README.DOC file

of the enclosed utility diskette. It contains the modification and hardware & software information, and adding the description or modification of product function after manual published.

0.4 RETURNING YOUR BOARD FOR SERVICE

If your board requires servicing, contact the dealer from whom you purchased the product for service information.

If you need to ship your board to us for service, be sure it is packed in a protective carton. We recommend that you keep the original shipping container for this purpose.

You can help assure efficient servicing of your product by following these guidelines:

1. Include your name, address, telephone and facsimile number where you may be reached during the day.

2. A description of the system configuration and/or software at the time is malfunction.

3. A brief description is in the symptoms.

0.5 TECHNICAL SUPPORT AND USER COMMENTS

User’ s comments are always welcome as they assist us in improving the usefulness of our products and the understanding of our publications. They form a very important part of the input used for product enhancement and revision.

We may use and distribute any of the information you supply in any way we believe appropriate without incurring any obligation. You may, of course, continue to use the information you supply.

If you have suggestions for improving particular sections or if you find any errors, please indicate the manual title and book number.

Please send your comments to Acrosser Technology Co., Ltd. or your local sales representative.

Internet electronic mail to: [email protected]

0-3

0.6 ORGANIZATION

This information for users covers the following topics (see the Table of Contents for a detailed listing): l Chapter 1, “Overview”, provides an overview of the system features and packing list.

l Chapter 2, “System Controller” describes the major structure.

l Chapter 3, “Setting Up the System”, describes how to adjust the jumper, and the connectors setting.

l Chapter 4, “CRT/LCD Flat Panel Display”, describes the configuration and installation procedure using the LCD and CRT display.

l Chapter 5, “Installation”, describes setup procedures including information on the utility diskette.

l Chapter 6, “Solid State Disk”, describes the various type SSDs’ installation steps.

l Chapter 7, “BIOS Console”, providing the BIOS options setting.

l Chapter 8, Specifications & SSD Types Supported l Chapter 9, Placement & Dimensions l Chapter 10, Programming RS-485 & Index

0.7 STATIC ELECTRICITY PRECAUTIONS

Before removing the board from its anti-static bag, read this section about static electricity precautions.

Static electricity is a constant danger to computer systems. The charge that can build up in your body may be more than sufficient to damage integrated circuits on any PC board. It is, therefore, important to observe basic precautions whenever you use or handle computer components. Although areas with humid climates are much less prone to static build-up, it is always best to safeguard against accidents may result in expensive repairs. The following measures should generally be sufficient to protect your equipment from static discharge:

•

Touch a grounded metal object to discharge the static electricity in your body (or ideally, wear a grounded wrist strap).

•

When unpacking and handling the board or other system component, place all materials on an antic static surface.

•

Be careful not to touch the components on the board, especially the “golden finger” connectors on the bottom of every board.

0-4

1. OVERVIEW

This chapter provides an overview of your system features and capabilities. The following topics are covered: l Introduction l Packing List l Features

1.1 INTRODUCTION

The AR-B1462 is a disk size industrial grade CPU card that has been designed to withstand continuous operation in harsh environments. The total on-board memory for the AR-B1462 can be configured from 1MB to 128MB by using all 72-pin type DRAM SIMM devices.

The 8 layers PCB CPU card is equipped with a IDE HDD interface, a floppy disk drive adapter, 1 parallel port, 4 serial ports and a watchdog timer. Its dimensions are as compact as 146mmX203mm. It highly condensed features make it an ideal cost/performance solution for high-end commercial and industrial applications where CPU speeding and mean time between failure is critical.

The AR-B1462 provides 2 bus interfaces, ISA bus and PC/104 compatible expansion bus. Based on the PC/104 expansion bus, you could easy install thousands of PC/104 module from hundreds venders around the world. You could also directly connect the power supply to the AR-B1462 on-board power connector in standalone applications.

A watchdog timer has a software programmable time-out interval, is also provided on this CPU card. It ensures that the system does not hang-up if a program can not execute normally.

A super I/O chip (SMC37C669) is embedded in the AR-B1462 card. It combines functions of a floppy disk drive adapter, a hard disk drive (IDE) adapter, four serial (with 16C550 UART) adapters and 1 parallel adapter. The I/O port configurations can be done by set the BIOS setup program.

As an UART, the chip supports serial to parallel conversion on data characters received from a peripheral device or a MODEM, and parallel to serial conversion on data character received from the CPU. The UART includes a programmable baud rate generator, complete MODEM control capability and a processor interrupt system. As a parallel port, the SMC37C669 provides the user with a fully bi-directional parallel centronics-type printer interface.

The special device is the AR-B1462 provides one audio connector, the sound system is built-in 16bit PnP sound blaster with DOS and Windows drivers. In the same time the AR-B1462 provides network connectors that are 10M bps NE2000 compatible. We designed the connectors for easily setup.

The super VGA controller supports CRT color monitor, STN, Dual-Scan, TFT, monochrome and colored panels. It can be connected to create a compact video solution for the industrial environment. And provides the touch screen header on the serial port 4 for multiple function.

Note: Just the AR-B1462A supported the audio function and supported 2MB on-board VRAM. The AR-B1462 only supported 1MB on-board VRAM.

1-1

1.2 PACKING LIST

The accessories are included with the system. Before you begin installing your AR-B1462 board, take a moment to make sure that the following items have been included inside the AR-B1462 package.

l

The quick setup manual l

1 AR-B1462 CPU card l

1 Hard disk drive interface cable l

1 Floppy disk drive interface cable l

1 Parallel port interface cable l

1 AUI cable l

1 PS/2 mouse cable l

1 Keyboard adapter l

1 RJ-45 network cable l

1 20-pin RS-485/RS-422 adapter cable l

1 10-pin to DB-15 VGA l

4 phone-jack to DB-9 adapter l

4 Software utility diskettes

If use the AR-B1462A CPU card, the card added the audio function the accessories also added as follows.

l

1 AR-B9425 card l

1 audio adapter cable

1.3 FEATURES

The system provides a number of special features that enhance its reliability, ensure its availability, and improve its expansion capabilities, as well as its hardware structure.

l All-In-One designed 486DX/DX2/DX4 CPU card.

l Supports 25 to 133 MHz 3.3V/3.45V/5V CPU with voltage regulator.

l Supports ISA bus and PC/104 bus.

l Supports 512KB cache on board.

l Supports two 72-pin DRAM SIMMs up to 128MB DRAM on board.

l Supports D.O.C. up to 72MB.

l Legal AMI BIOS.

l IDE hard disk drive interface.

l Floppy disk drive interface.

l Bi-direction parallel interface.

l 4 serial ports with 16C550 UART.

l Programmable watchdog timer.

l Build-in 16bit PnP sound blaster with DOS and Windows drivers l Supports 10M bps NE2000 compatible chips.

l On-board built-in buzzer.

l 8 layers PCB.

1-2

2. SYSTEM CONTROLLER

This chapter describes the major structure of the AR-B1462 CPU board. The following topics are covered: l DMA Controller l Keyboard Controller l Interrupt Controller l Real-Time Clock and Non-Volatile RAM l Timer l Serial Port l Parallel Port

2.1 DMA CONTROLLER

The equivalent of two 8237A DMA controllers are implemented in the AR-B1462 board. Each controller is a fourchannel DMA device that will generate the memory addresses and control signals necessary to transfer information directly between a peripheral device and memory. This allows high speeding information transfer with less

CPU intervention. The two DMA controllers are internally cascaded to provide four DMA channels for transfers to

8-bit peripherals (DMA1) and three channels for transfers to 16-bit peripherals (DMA2). DMA2 channel 0 provides the cascade interconnection between the two DMA devices, thereby maintaining IBM PC/AT compatibility.

Following is the system information of DMA channels:

DMA Controller 1

Channel 0: Spare

Channel 1: IBM SDLC

Channel 2: Diskette adapter

DMA Controller 2

Channel 4: Cascade for controller 1

Channel 5: Spare

Channel 6: Spare

Channel 3: Spare Channel 7: Spare

Table 2-1 DMA Channel Controller

2.2 KEYBOARD CONTROLLER

The 8042 processor is programmed to support the keyboard serial interface. The keyboard controller receives serial data from the keyboard, checks its parity, translates scan codes, and presents it to the system as a byte data in its output buffer. The controller can interrupt the system when data is placed in its output buffer, or wait for the system to poll its status register to determine when data is available.

Data can be written to the keyboard by writing data to the output buffer of the keyboard controller.

Each byte of data is sent to the keyboard controller in series with an odd parity bit automatically inserted. The keyboard controller is required to acknowledge all data transmissions. Therefore, another byte of data will not be sent to keyboard controller until acknowledgment is received for the previous byte sent. The “output buffer full” interruption may be used for both send and receive routines.

2-1

2.3 INTERRUPT CONTROLLER

The equivalent of two 8259 Programmable Interrupt Controllers (PIC) are included on the AR-B1462 board. They accept requests from peripherals, resolve priorities on pending interrupts in service, issue interrupt requests to the

CPU, and provide vectors which are used as acceptance indices by the CPU to determine which interrupt service routine to execute.

Following is the system information of interrupt levels:

NMI

CTRL1

IRQ 0

IRQ 1

IRQ 2

Description

Parity check

CTRL2

System timer interrupt from timer 8254

Keyboard output buffer full

IRQ 3

IRQ 4

IRQ 5

IRQ 6

IRQ 7

IRQ8 : Real time clock

IRQ9 : Rerouting to INT 0Ah from hardware IRQ2

IRQ10 : Reserved for LAN

IRQ11 : Serial port 4

IRQ12 : spare (PS/2 mouse)

IRQ13 : Math. coprocessor

IRQ14 : Hard disk adapter

IRQ15 : spare (Watchdog Timer)

Serial port 2

Serial port 1

Serial port 3

Floppy disk adapter

Parallel port 1

Figure 2-1 Interrupt Controller

2-2

2.3.1 I/O Port Address Map

Hex Range

000-01F DMA controller 1

020-021 Interrupt controller 1

Device

022-023 System -- ALI M1489/M1487

Video – C & T F65550 (PCI bus)

I/O – Two SMC FDC37C669 (ISA bus)

Audio – ESS ES1869S

040-04F Timer 1

050-05F Timer 2

060-06F 8042 keyboard/controller

070-071 Real-time clock (RTC), non-maskable interrupt (NMI)

080-09F DMA page registers

0A0-0A1 Interrupt controller 2

0C0-0DF DMA controller 2

0F0 Clear Math Co-processor

0F1 Reset Math Co-processor

0F8-0FF Math Co-processor

170-178 Fixed disk 1

1F0-1F8 Fixed disk 0

201 Game port

208-20A EMS register 0

218-21A EMS register 1

278-27F Parallel printer port 2 (LPT 2)

2E8-2EF Serial port 4 (COM 4)

2F8-2FF Serial port 2 (COM 2)

300-31F Prototype card/streaming type adapter

320-33F LAN adapter

378-37F Parallel printer port 1 (LPT 1)

380-38F SDLC, bisynchronous

3A0-3AF Bisynchronous

3B0-3BF Monochrome display and printer port 3 (LPT 3)

3C0-3CF EGA/VGA adapter

3D0-3DF Color/graphics monitor adapter

3E8-3EF Serial port 3 (COM 3)

3F0-3F7 Diskette controller

3F8-3FF Serial port 1 (COM 1)

Table 2-2 I/O Port Address Map

2.3.2 I/O Channel Pin Assignment (Bus1)

I/O Pin Signal Name Input/Output I/O Pin Signal Name Input/Output

A1 -IOCHCK Input B1 GND Ground

A2

A3

SD7

SD6

Input/Output

Input/Output

B2

B3

RSTDRV

+5V

Output

Power

A8

A9

A10

A11

A4

A5

A6

A7

A12

A13

SD5

SD4

SD3

SD2

SD1

SD0

-IOCHRDY

AEN

SA19

SA18

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input

Output

Input/Output

Input/Output

B4

B5

B6

B7

B8

B9

B10

B11

B12

B13

IRQ9

-5V

DRQ2

-12V

-ZWS

+12V

GND

-SMEMW

-SMEMR

-IOW

Input

Power

Input

Power

Input

Power

Ground

Output

Output

Input/Output

2-3

2-4

A21

A22

A23

A24

A25

A26

A27

A28


A14

A15

A16

A17

A18

A19

A20

SA17

SA16

SA15

SA14

SA13

SA12

SA11

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

B14

B15

B16

B17

B18

B19

B20

-IOR

-DACK3

DRQ3

-DACK1

DRQ1

-REFRESH

BUSCLK

Input/Output

Output

Input

Output

Input

Input/Output

Output

A29

A30

SA10

SA9

SA8

SA7

SA6

SA5

SA4

SA3

SA2

SA1

Input/Output B21

Input/Output B22

Input/Output B23

Input/Output B24

Input/Output B25

Input/Output B26

Input/Output B27

Input/Output B28

Input/Output B29

Input/Output B30

A31 SA0 Input/Output B31

Table 2-3 I/O Channel Pin Assignments

IRQ7

IRQ6

IRQ5

IRQ4

IRQ3

-DACK2

TC

BALE

+5V

OSC

GND

Input

Input

Input

Input

Input

Output

Output

Output

Power

Output

Ground

C10

C11

C12

C13

C6

C7

C8

C9


C1 -SBHE Input/Output D1 -MEMCS16 Input

C2

C3

LA23

LA22

Input/Output

Input/Output

D2

D3

-IOCS16

IRQ10

Input

Input

C4

C5

LA21

LA20

Input/Output

Input/Output

D4

D5

IRQ11

IRQ12

Input

Input

LA19

LA18

LA17

-MRD16

-MWR16

SD8

SD9

SD10

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

Input/Output

D6

D7

D8

D9

D10

D11

D12

D13

IRQ15

IRQ14

-DACK0

DRQ0

-DACK5

DRQ5

-DACK6

DRQ6

Input

Input

Output

Input

Output

Input

Output

Input

C14

C15

C16

C17

SD11

SD12

SD13

SD14

Input/Output

Input/Output

Input/Output

Input/Output

D14

D15

D16

D17

C18 SD15 Input/Output D18

Table 2-4 I/O Channel Pin Assignments

-DACK7

DRQ7

+5V

-MASTER

GND

Output

Input

Power

Input

Ground

2.4 REAL-TIME CLOCK AND NON-VOLATILE RAM

The AR-B1462 contains a real-time clock compartment that maintains the date and time in addition to storing configuration information about the computer system. It contains 14 bytes of clock and control registers and 114 bytes of general purpose RAM. Because of the use of CMOS technology, it consumes very little power and can be maintained for long period of time using an internal Lithium battery. The contents of each byte in the CMOS RAM are listed as follows:

16

17

18

19-2D

2E-2F

30

31

32

12

13

14

15

0E

0F

10

11

0A

0B

0C

0D

06

07

08

09

Address

00

01

02

03

04

05

Seconds

Second alarm

Minutes

Minute alarm

Hours

Hour alarm

Day of week

Date of month

Month

Year

Status register A

Status register B

Status register C

Status register D

Diagnostic status byte

Shutdown status byte

Diskette drive type byte, drive A and B

Fixed disk type byte, drive C

Fixed disk type byte, drive D

Reserved

Equipment byte

Low base memory byte

High base memory byte

Low expansion memory byte

High expansion memory byte

Reserved

2-byte CMOS checksum

Low actual expansion memory byte

High actual expansion memory byte

Date century byte

Description

33

34-7F

Information flags (set during power on)

Reserved for system BIOS

Table 2-5 Real-Time Clock & Non-Volatile RAM

2.5 TIMER

The AR-B1462 provides three programmable timers, each with a timing frequency of 1.19 MHz.

Timer 0 The output of this timer is tied to interrupt request 0. (IRQ 0)

Timer 1 This timer is used to trigger memory refresh cycles.

Timer 2 This timer provides the speaker tone.

Application programs can load different counts into this timer to generate various sound frequencies.

2-5

2.6 SERIAL PORT

The ACEs (Asynchronous Communication Elements ACE1 to ACE4) are used to convert parallel data to a serial format on the transmit side and convert serial data to parallel on the receiver side. The serial format, in order of transmission and reception, is a start bit, followed by five to eight data bits, a parity bit (if programmed) and one, one and half (five-bit format only) or two stop bits. The ACEs are capable of handling divisors of 1 to 65535, and produce a 16x clock for driving the internal transmitter logic.

Provisions are also included to use this 16x clock to drive the receiver logic. Also included in the ACE a completed

MODEM control capability, and a processor interrupt system that may be software tailored to the computing time required handle the communications link.

The following table is summary of each ACE accessible register

DLAB

0

X

1

X

X

1

X

X

0

X

Port Address base + 0 base + 1 base + 2 base + 3 base + 4 base + 5 base + 6 base + 7 base + 0 base + 1

Register

Receiver buffer (read)

Transmitter holding register (write)

Interrupt enable

Interrupt identification (read only)

Line control

MODEM control

Line status

MODEM status

Scratched register

Divisor latch (least significant byte)

Divisor latch (most significant byte)

Table 2-6 ACE Accessible Registers

(1) Receiver Buffer Register (RBR)

Bit 0-7: Received data byte (Read Only)

(2) Transmitter Holding Register (THR)

Bit 0-7: Transmitter holding data byte (Write Only)

(3) Interrupt Enable Register (IER)

Bit 0: Enable Received Data Available Interrupt (ERBFI)

Bit 1: Enable Transmitter Holding Empty Interrupt (ETBEI)

Bit 2: Enable Receiver Line Status Interrupt (ELSI)

Bit 3: Enable MODEM Status Interrupt (EDSSI)

Bit 4: Must be 0

Bit 5: Must be 0

Bit 6: Must be 0

Bit 7: Must be 0

(4) Interrupt Identification Register (IIR)

Bit 0: “0” if Interrupt Pending

Bit 1: Interrupt ID Bit 0

Bit 2: Interrupt ID Bit 1

Bit 3: Must be 0

Bit 4: Must be 0

Bit 5: Must be 0

Bit 6: Must be 0

Bit 7: Must be 0

2-6

(5) Line Control Register (LCR)

Bit 0: Word Length Select Bit 0 (WLS0)

Bit 1: Word Length Select Bit 1 (WLS1)

WLS1 WLS0

1

1

0

0

Bit 2: Number of Stop Bit (STB)

Bit 3: Parity Enable (PEN)

Bit 4: Even Parity Select (EPS)

Bit 5: Stick Parity

0

1

0

1

Bit 6: Set Break

Bit 7: Divisor Latch Access Bit (DLAB)

Word Length

5 Bits

6 Bits

7 Bits

8 Bits

(6) MODEM Control Register (MCR)

Bit 0: Data Terminal Ready (DTR)

Bit 1: Request to Send (RTS)

Bit 2: Out 1 (OUT 1)

Bit 3: Out 2 (OUT 2)

Bit 4: Loop

Bit 5: Must be 0

Bit 6: Must be 0

Bit 7: Must be 0

(7) Line Status Register (LSR)

Bit 0: Data Ready (DR)

Bit 1: Overrun Error (OR)

Bit 2: Parity Error (PE)

Bit 3: Framing Error (FE)

Bit 4: Break Interrupt (BI)

Bit 5: Transmitter Holding Register Empty (THRE)

Bit 6: Transmitter Shift Register Empty (TSRE)

Bit 7: Must be 0

(8) MODEM Status Register (MSR)

Bit 0: Delta Clear to Send (DCTS)

Bit 1: Delta Data Set Ready (DDSR)

Bit 2: Training Edge Ring Indicator (TERI)

Bit 3: Delta Receive Line Signal Detect (DSLSD)

Bit 4: Clear to Send (CTS)

Bit 5: Data Set Ready (DSR)

Bit 6: Ring Indicator (RI)

Bit 7: Received Line Signal Detect (RSLD)

2-7

(9) Divisor Latch (LS, MS)

Bit 0:

Bit 1:

Bit 2:

Bit 3:

Bit 4:

Bit 5:

Bit 6:

Bit 7:

LS

Bit 0

Bit 1

Bit 2

Bit 3

Bit 4

Bit 5

Bit 6

Bit 7

MS

Bit 8

Bit 9

Bit 10

Bit 11

Bit 12

Bit 13

Bit 14

Bit 15

Desired Baud Rate

300

600

1200

1800

2400

3600

4800

9600

14400

19200

28800

38400

57600

115200

Table 2-7 Serial Port Divisor Latch

Divisor Used to Generate 16x Clock

384

192

24

12

8

6

96

64

48

32

2

1

4

3

2.7 PARALLEL PORT

(1) Register Address

Port Address base + 0 base + 0 base + 1 base + 2

Table 2-8 Registers’ Address

Read/Write

Write

Read

Read

Write

Register

Output data

Input data

Printer status buffer

Printer control latch

(2) Printer Interface Logic

The parallel portion of the SMC37C669 makes the attachment of various devices that accept eight bits of parallel data at standard TTL level.

(3) Data Swapper

The system microprocessor can read the contents of the printer’ s Data Latch through the Data Swapper by reading the Data Swapper address.

2-8

(4) Printer Status Buffer

The system microprocessor can read the printer status by reading the address of the Printer Status Buffer. The bit definitions are described as follows:

7 6 5 4 3 2 1 0

X X X

Figure 2-2 Printer Status Buffer

-ERROR

SLCT

PE

-ACK

-BUSY

NOTE: X presents not used.

Bit 7: This signal may become active during data entry, when the printer is off-line during printing, or when the print head is changing position or in an error state. When Bit 7 is active, the printer is busy and can not accept data.

Bit 6: This bit represents the current state of the printer’ s ACK signal. A0 means the printer has received the character and is ready to accept another. Normally, this signal will be active for approximately 5 microseconds before receiving a BUSY message stops.

Bit 5: A1 means the printer has detected the end of the paper.

Bit 4: A1 means the printer is selected.

Bit 3: A0 means the printer has encountered an error condition.

2-9

(5) Printer Control Latch & Printer Control Swapper

The system microprocessor can read the contents of the printer control latch by reading the address of printer control swapper. Bit definitions are as follows:

7

X

6

X

5 4 3 2 1 0

Figure 2-3 Bit’ s Definition

STROBE

AUTO FD XT

INIT

SLDC IN

IRQ ENABLE

DIR(write only)

NOTE: X presents not used.

Bit 5: Direction control bit. When logic 1, the output buffers in the parallel port are disabled allowing data driven from external sources to be read; when logic 0, they work as a printer port. This bit is write only.

Bit 4: A1 in this position allows an interrupt to occur when ACK changes from low state to high state.

Bit 3: A1 in this bit position selects the printer.

Bit 2: A0 starts the printer (50 microseconds pulse, minimum).

Bit 1: A1 causes the printer to line-feed after a line is printed.

Bit 0: A0.5 microsecond minimum highly active pulse clocks data into the printer. Valid data must be present for a minimum of 0.5 microseconds before and after the strobe pulse.

2-10

3. SETTING UP THE SYSTEM

This section describes pin assignments for system’ s external connectors and the jumpers setting.

l Overview l System Setting l Ethernet Controller

3.1 OVERVIEW

The AR-B1462 is a half size industrial grade CPU card that has been designed to withstand continuous operation in harsh environments. This section provides hardware’ s jumpers setting, the connectors’ locations, and the pin assignment.

Note: Just the AR-B1462A supported the audio function and supported 2MB on-board VRAM. The AR-B1462 only supported 1MB on-board VRAM.

CN1

1

H3

J1

1 1

1

H7

1 1

JP10 JP11

1

CN13

LED1

U28

U11

U59

1

JP1

1 3

CN10

J10

1

JP5

CN2

U6

U60

5V

3V

M6

5

3

1

J8

53

JP4

2

1

(LCD)

J9

CN3

12 GND 5

1

LED2

1

CN14

CN11 2

1

CN4

JP2

1

J3

J4 J5

JP3

1

2

U9

M1

1

2

3

A B C

M2 2

1

3

A B C

U17 MEM1

U20 MEM2

SW1

U27 MEM3

M3 2

1

3

A B C

M4

2

3

1

A B C U30 MEM4

2

1

CN12

1

CN15

1

CN16

LED3

J6 J7

1 1

CN5

P5 P1

J2

P10 P8

2

1

3

M5

A B C

H6

CN6

CN7

(IDE)

CN8

CN9

Figure 3-1 AR-B1462 Jumpers & Connectors Placement

3-1

3.2 SYSTEM SETTING

Jumper pins allow you to set specific system parameters. Set them by changing the pin location of jumper blocks.

(A jumper block is a small plastic-encased conductor [shorting plug] that slips over the pins.) To change a jumper setting, remove the jumper from its current location with your fingers or small needle-nosed pliers. Place the jumper over the two pins designated for the desired setting. Press the jumper evenly onto the pins. Be careful not to bend the pins.

We will show the locations of the AR-B1462 jumper pins, and the factory-default setting.

CAUTION: Do not touch any electronic component unless you are safely grounded. Wear a grounded wrist strap or touch an exposed metal part of the system unit chassis. The static discharges from your fingers can permanently damage electronic components.

3.2.1 FDD Port Connector (CN8)

The AR-B1462 provides a 34-pin header type connector for supporting up to two floppy disk drives.

To enable or disable the floppy disk controller, please use the BIOS Setup program.

Ground 1

Ground 3

Ground 5

Ground 7

Ground 9

Ground 11

Ground 13

Ground 15

Ground 17

Ground 19

Ground 21

Ground 23

Ground 25

Ground 27

Ground 29

Ground 31

Ground 33

2 DRVEN 0

4 Not Used

6 DRVEN 1

8 -INDEX

10 -MTR 0

12 -DRV 1

14 -DRV0

16 -MTR1

18 DIR

20 -STEP

22 -WDATA

24 -WGATE

26 -TRK 0

28 -WRPT

30 -RDATA

32 -HDSEL

34 DSKCHG

Figure 3-2 CN8: FDD Port connector

3-2

3.2.2 Hard Disk (IDE) Connector

(1) 40-Pin Hard Disk (IDE) Connector (CN5)

A 40-pin header type connector (CN5) is provided to interface with up to two embedded hard disk drives (IDE AT bus). This interface, through a 40-pin cable, allows the user to connect up to two drives in a “daisy chain” fashion.

To enable or disable the hard disk controller, please use the BIOS Setup program. The following table illustrates the pin assignments of the hard disk drive’ s 40-pin connector.

CN5

-IDERST 1

D7 3

D6 5

D5 7

D4 9

D3 11

D2 13

D1 15

D0 17

GROUND 19

Not Used 21

-IOW 23

-IOR 25

-IORDY 27

Not Used 29

IRQ 14 31

HDA1 33

HDA0 35

-HDCS0 37

-HDLED 39

2 GROUND

4 D8

6 D9

8 D10

10 D11

12 D12

14 D13

16 D14

18 D15

20 Not Used

22 GROUND

24 GROUND

26 GROUND

28 Not Used

30 GROUND

32 -IO16

34 Not Used

36 HDA2

38 -HDCS1

40 GROUND

Figure 3-3 CN5: Hard Disk (IDE) Connector

Caution: When the CN5 is used to connect the hard disk drive, if you find it can not make partition, please change the hard disk cable to below 35cm in length.

(2) 44-Pin Hard Disk (IDE) Connector (CN7)

AR-B1462 also provides IDE interface 44-pin connector to connect with the hard disk device.

CN7

-IDERST 1

D7 3

D6 5

D5 7

D4 9

D3 11

D2 13

D1 15

D0 17

GROUND 19

Not Used 21

-IOW 23

-IOR 25

-IORDY 27

Not Used 29

IRQ 14 31

HDA1 33

HDA0 35

-HDCS0 37

-HDLED 39

VCC 41

GROUND 43

2 GROUND

4 D8

6 D9

8 D10

10 D11

12 D12

14 D13

16 D14

18 D15

20 Not Used

22 GROUND

24 GROUND

26 GROUND

28 Not Used

30 GROUND

32 -IO16

34 Not Used

36 HDA2

38 -HDCS1

40 GROUND

42 VCC

44 Not Used

Figure 3-4 CN7: Hard Disk (IDE) Connector

3-3

3.2.3 Parallel Port Connector (CN9)

To use the parallel port, an adapter cable has to be connected to the CN9 (26-pin header type) connector. This adapter cable is mounted on a bracket and is included in your AR-B1462 package. The connector for the parallel port is a 25 pin D-type female connector.

-STB1 1

PD10 3

PD11 5

PD12 7

PD13 9

PD14 11

PD15 13

PD16 15

PD17 17

-ACK1 19

BUSY1 21

PE1 23

SLCT1 25

2 -AFD1

4 -ERR1

6 -INIT1

8 -SLIN1

10 GND

12 GND

14 GND

16 GND

18 GND

20 GND

22 GND

24 GND

26 GND

Figure 3-5 CN9: Parallel Port Connector

CN9 DB-25

1

3

5

7

9

1

2

3

4

5

Signal

-Strobe

Data 0

Data 1

Data 2

Data 3

11

13

15

17

19

8

9

6

7

10

Data 4

Data 5

Data 6

Data 7

-Acknowledge

21

23

11

12

Busy

Paper

22

24

25 13 Printer Select 26

Table 3-1 Parallel Port Pin Assignment

12

14

16

18

20

CN9 DB-25

2

4

14

15

6

8

10

16

17

18

24

25

--

19

20

21

22

23

Signal

-Auto Form Feed

-Error

-Initialize

-Printer Select In

Ground

Ground

Ground

Ground

Ground

Ground

Ground

Ground

No Used

3-4

3.2.4 PC/104 Connector

(1) 64 Pin PC/104 Connector Bus A & B (CN11)

2 64

1 63

64-Pin PC/104 Connector

Figure 3-6 CN11: 64 Pin PC/104 Connector Bus A & B

CN11

1 2

-IOCHCK ---

SD7 ---

SD6 ---

SD5 ---

SD4 ---

SD3 ---

SD2 ---

SD1 ---

SD0 ---

-IOCHRDY---

AEN ---

SA19 ---

SA18 ---

SA17 ---

SA16 ---

SA15 ---

SA14 ---

SA13 ---

SA12 ---

SA11 ---

SA10 ---

SA9 ---

SA8 ---

SA7 ---

SA6 ---

SA5 ---

SA4 ---

SA3 ---

SA2 ---

SA1 ---

SA0 ---

GND ---

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A17

A18

A19

A20

A21

A22

A23

A24

A25

A26

A27

A28

A29

A30

A31

A32

--- GND

--- RSTDRV

--- +5 VDC

--- IRQ9

--- -5 VDC

--- DRQ2

--- -12 VDC

--- -ZWS

--- +12 VDC

--- GND

--- -SMEMW

--- -SMEMR

--- -IOW

--- -IOR

--- -DACK3

--- DRQ3

--- -DACK1

--- DRQ1

--- -REFRESH

--- BUSCLK

--- IRQ7

--- IRQ6

--- IRQ5

--- IRQ4

--- IRQ3

--- -DACK2

--- TC

--- BALE

--- +5 VDC

--- OSC

--- GND

--- GND

B7

B8

B9

B10

B11

B12

B13

B14

B15

B16

B17

B18

B1

B2

B3

B4

B5

B6

B19

B20

B21

B22

B23

B24

B25

B26

B27

B28

B29

B30

B31

B32

Figure 3-7 CN11: 64-Pin PC/104 Connector Bus A & B

(2) 40 Pin PC/104 Connector Bus C & D (CN12)

1

2

39

40

40 Pin PC/104 Connector

Figure 3-8 CN12: 40 Pin PC/104 Connector Bus C & D

GND ---

-SBHE ---

LA23 ---

LA22 ---

LA21 ---

LA20 ---

LA19 ---

LA18 ---

LA17 ---

-MRD16 ---

-MWR16 ---

SD8 ---

SD9 ---

SD10 ---

SD11 ---

SD12 ---

SD13 ---

SD14 ---

SD15 ---

Not Used ---

C11

C12

C13

C14

C15

C16

C17

C18

C19

C20

C1

C2

C3

C4

C5

C6

C7

C8

C9

C10

CN12

1 2

D11

D12

D13

D14

D15

D16

D17

D18

D19

D20

D1

D2

D3

D4

D5

D6

D7

D8

D9

D10

--- GND

--- -MEM16

--- -IOCS16

--- IRQ10

--- IRQ11

--- IRQ12

--- IRQ15

--- IRQ14

--- -DACK0

--- DRQ0

--- -DACK5

--- DRQ5

--- -DACK6

--- DRQ6

--- -DACK7

--- DRQ7

--- +5 VDC

--- -MASTER

--- GND

--- GND

Figure 3-9 CN12: 40-Pin PC/104 Connector Bus C & D

3-5

(3) I/O Channel Signal Description

Name Description

BUSCLK [Output]

RSTDRV [Output]

The BUSCLK signal of the I/O channel is asynchronous to the CPU clock.

This signal goes high during power-up, low line-voltage or hardware reset

SA0 - SA19 The System Address lines run from bit 0 to 19. They are

[Input / Output] latched onto the falling edge of "BALE"

LA17 - LA23

[Input/Output]

The Unlatched Address line run from bit 17 to 23

SD0 - SD15

[Input/Output]

System Data bit 0 to 15

BALE [Output] The Buffered Address Latch Enable is used to latch SA0 -

SA19 onto the falling edge. This signal is forced high during DMA cycles

-IOCHCK [Input] The I/O Channel Check is an active low signal which indicates that a parity error exist on the I/O board

IOCHRDY This signal lengthens the I/O, or memory read/write cycle,

[Input, Open collector] and should be held low with a valid address

IRQ 3-7, 9-12, 14, 15 The Interrupt Request signal indicates I/O service request

[Input] attention. They are prioritized in the following sequence :

(Highest) IRQ 9, 10, 11, 12, 13, 15, 3, 4, 5, 6, 7 (Lowest)

-IOR The I/O Read signal is an active low signal which instructs

[Input/Output] the I/O device to drive its data onto the data bus

-IOW [Input/Output] The I/O write signal is an active low signal which instructs the I/O device to read data from the data bus

-SMEMR [Output] The System Memory Read is low while any of the low 1 mega bytes of memory are being used

-MEMR The Memory Read signal is low while any memory location

[Input/Output] is being read

-SMEMW [Output] The System Memory Write is low while any of the low 1 mega bytes of memory is being written

-MEMW The Memory Write signal is low while any memory location

[Input/Output] is being written

DRQ 0-3, 5-7 [Input] DMA Request channels 0 to 3 are for 8-bit data transfers.

DMA Request channels 5 to 7 are for 16-bit data transfers.

DMA request should be held high until the corresponding

DMA has been completed. DMA request priority is in the following sequence:(Highest) DRQ 0, 1, 2, 3, 5, 6, 7

(Lowest)

-DACK 0-3, 5-7 The DMA Acknowledges 0 to 3, 5 to 7 are the

[Output] corresponding acknowledge signals for DRQ 0 to 3 and 5 to 7

AEN [output] The DMA Address Enable is high when the DMA controller is driving the address bus. It is low when the CPU is driving the address bus

-REFRESH This signal is used to indicate a memory refresh cycle and

[Input/Output] can be driven by the microprocessor on the I/O channel

TC [Output] Terminal Count provides a pulse when the terminal count for any DMA channel is reached

SBHE [Input/Output] The System Bus High Enable indicates the high byte SD8 -

SD15 on the data bus

3-6

Name Description

-MASTER [Input] The MASTER is the signal from the I/O processor which gains control as the master and should be held low for a maximum of 15 microseconds or system memory may be lost due to the lack of refresh

-MEMCS16

[Input, Open collector]

The Memory Chip Select 16 indicates that the present data transfer is a 1-wait state, 16-bit data memory operation

-IOCS16


The I/O Chip Select 16 indicates that the present data transfer is a 1-wait state, 16-bit data I/O operation

OSC [Output] The Oscillator is a 14.31818 MHz signal used for the color graphic card

-ZWS


The Zero Wait State indicates to the microprocessor that the present bus cycle can be completed without inserting additional wait cycle

Table 3-2 I/O Channel Signal’ s Description

3.2.5 LED Header (LM1)

The AR-B1462 provides one module for various LEDs’ headers.

1

3

5

7

LM1

2

4

6

8

+5V Power LED Header

Watchdog LED Header

LAN LED Header

HDD LED Header

Figure 3-10 LM1: LED Header

3.2.6 Serial Port

(1) RS-422/RS-485 Select

SW1-9 & SW1-10 selects COM B port, and adjusts the CN15 connector is RS-485 or RS-232C. M5 selects COM A port for using DB2 for RS-232C or connects External RS-485.

(A) COM-A RS-485/RS-422 Adapter Select (M5)

A B C A B C

1

2

3

1

2

3

RS-422

Factory Preset

RS-485

Figure 3-11 M5: COM-A RS-485/RS-422 Adapter Select

(B) Terminal Select (M5)

A B C A B

1

2

3

1

2

3

OFF

Factory-Default Setting

Figure 3-12 M5: Terminal Select

ON

C

3-7

3-8

(C) COM-A RS-232/TTL Select (SW1-8)

ON

OFF

1 2 3 4 5 6 7 8 9 10

SW1-8 -- RS-232 (Factory Default Setting)

ON

OFF

1 2 3 4 5 6 7 8 9 10

SW1-8 -- TTL

Figure 3-13 SW1-8: COM-A RS-232/TTL Select

(D) COM-B RS-232C/RS-422 Select (SW1-9 & SW1-10)

ON

OFF

1 2 3 4 5 6 7 8 9 10

SW1-9 & SW1-10 -- RS-232 (Factory Presetting)

ON

OFF

1 2 3 4 5 6 7 8 9 10

SW1-9 & SW1-10 -- RS-485

Figure 3-14 SW1-9 & SW1-10: COM-B RS-232/RS-422 Select

(E) RS-485 Mode Select (SW1-9 & SW1-10)

ON

OFF

1 2 3 4 5 6 7 8 9 10

SW1-9 & SW1-10 -- RS-485 MODE1

ON

OFF

1 2 3 4 5 6 7 8 9 10

SW1-9 & SW1-10 -- RS-485 MODE2

Figure 3-15 SW1-9 & SW1-10: RS-485 Mode Select

When RS-422 or RS-485 mode is selected, you also need to change M5 to select between RS-422 or RS-485 mode.

NOTE: 1. The recommended configuration for RS-485 interface is to set the transmitter to the controlled by DTR and set the transmitter. Receiver is disabled.

2. The receiver is always enabled, so you will receive data that you transmitted previously. It is not recommended to use this setting as RS-485 interface.

(2) RS-485/RS-422 Connector (CN15)

2 4 6 8 10 12 14 16 18 20

1 3 5 7 9 11 13 15 17 19

Figure 3-16 CN15: RS-485/RS-422 Connector

CN15

1

3

5

7

9

Signal

-DCDAT

RXDAT

TXDAT

-DTRAT

GND

11

13

15

GND

RTS+

RTS-

17

19

TXD+

TXD-

Table 3-3 RS-485/RS-422 Pin Assignment

18

20

12

14

16

CN15

2

4

6

8

10

Signal

-DSRAT

-RTSAT

-CTSAT

-RIAT

VCC

CTS+

CTS-

RXD+

RXD-

GND

3-9

(3) TTL Connector (CN16)

2 4 6 8 10

1 3 5 7 9

Figure 3-17 CN16: TTL Connector

CN16

1

3

5

Signal

TTLOP0

TTLOP1

TTLOP2

7

9

TTLOP3

GROUND

Table 3-4 TTL Pin Assignment

CN16

2

4

6

8

10

Signal

TTLIP0

TTLIP1

TTLIP2

TTLIP3

VCC

(4) RS-232 Connector (CN4)

There are four serial ports with EIA RS-232C interface on the AR-B1462. To configure these serial ports, use the

BIOS Setup program, and adjust the jumpers on M5 and SW1.

2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40

1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39

6 7 8 9 6 7 8 9 6 7 8 9 6 7 8 9

1 2 3 4

COM-A

5 1 2 3 4

COM-B

5 1 2 3 4

COM-C

5 1 2 3 4

COM-D

Figure 3-18 CN4: RS-232 Connector

5

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

CN4 DB-9

1

3

5

A-1

A-2

A-3

7

9

A-4

A-5

D-1

D-2

D-3

D-4

D-5

B-1

B-2

B-3

B-4

B-5

C-1

C-2

C-3

C-4

C-5

Signal

-DCDA

RXDA

TXDA

-DTRA

GNDA

-DCDB

RXDB

TXDB

-DTRB

GNDB

-DCDC

RXDC

TXDC

-DTRC

GNDC

-DCDD

RXDD

TXDD

-DTRD

GNDD

Table 3-5 RS-232 Connector Pin Assignment

12

14

16

18

20

22

24

26

28

30

32

34

36

38

40

CN4 DB-9

2

4

6

A-6

A-7

A-8

8

10

A-9

--

D-6

D-7

D-8

D-9

--

B-6

B-7

B-8

B-9

--

C-6

C-7

C-8

C-9

--

Signal

-DSRA

-RTSA

-CTSA

-RIA

GNDA

-DSRB

-RTSB

-CTSB

-RIB

GNDB

-DSRC

-RTSC

-CTSC

-RIC

GNDC

-DSRD

-RTSD

-CTSD

-RID

GNDD

3-10

3.2.7 Keyboard Connector

(1) Keyboard Lock Header (J7)

2 GND

1 KBLK

J7

Figure 3-19 J7: Keyboard Lock Header

(2) Keyboard Connector (J4)

This keyboard connector is a PS/2 type keyboard connector. This connector is also for a standard IBM-compatible keyboard with the keyboard adapter cable. J4 provides the way of connecting a keyboard to the AR-B1462.

J4

1 2 3 4 5

1 CLOCK

2 DATA

3 GND

4 GND

5 VCC

1 DATA

2 GND

3 GND

4 VCC

3

5 CLOCK

6 Not Used

5

1 2

6

4

6-Pin Midi Din

(Front View)

Figure 3-20 J4: Keyboard Connector

3.2.8 External Speaker Header (J9)

Besides the onboard buzzer, you can use an external speaker by connecting to the J9 header.

1 Speaker+

2 Speaker-

3 Speaker-

1 2 3 4

4 Speaker-

Figure 3-21 J9: Speaker Header

3.2.9 Power Connector

(1) 8-Pin Power Connector (J1)

J1 is an 8-pin power connector. You can directly connect the power supply to the onboard power connector for stand-alone applications.

1 GND

2 +5 VDC

3 +5 VDC

1 2 3 4 5 6 7 8

4 GND

5 GND

6 +12 VDC

7 -12 VDC

8 -5 VDC

Figure 3-22 J1: 8-Pin Power Connector

3-11

(2) 4-Pin Power Connector (CN6)

1 +12 VDC

2 GND

3 GND

4 +5 VDC

CN6

Figure 3-23 CN6: 4-Pin Power Connector

3.2.10 Reset Header (J6)

J6 is used to connect to an external reset switch. Shorting these two pins will reset the system.

2 GND

1 Reset+

Figure 3-24 J6: Reset Header

3.2.11 PS/2 Mouse Connector

(1) PS/2 Mouse IRQ12 Setting (JP2)

The default of <Enabled> allows the system detecting a PS/2 mouse on boot. If detected, IRQ12 will be used for the PS/2 mouse. IRQ12 will be reserved for expansion cards and therefore the PS/2 mouse will not function.

JP2 JP2

2 1

Enable

Factory Preset

2 1

Disable

Figure 3-25 JP2: PS/2 Mouse IRQ12 Setting

CAUTION: After adjusting the JP2 correctly, the user must set the <PS/2 Mouse Support> option to Enabled in the

BIOS <Advanced CMOS Setup> Menu. Then the PS/2 mouse can be used.

(2) PS/2 Mouse Connector (J5)

To use the PS/2 interface, an adapter cable has to be connected to the J5 (6-pin header type) connector. This adapter cable is mounted on a bracket and is included in your AR-B1462 package. The connector for the PS/2 mouse is a Mini-DIN 6-pin connector. Pin assignments for the PS/2 port connector are as follows:

DATA 1

Not Used 2

GND 3

VCC 4

CLOCK 5

GND 6

J5 1 2 3 4 5 6

1 2

3 4

5 6

6 Pin Mini-DIN

Figure 3-26 J5: PS/2 Mouse Connector

3-12

3.2.12 Battery Setting

(1) Battery Charger Select (JP9)

JP9 JP9

3

2

1

3

2

1

Rechargeable Non-Rechargeable

Factory Preset

Figure 3-27 JP9: Battery Charger Select

(2) External Battery Connector (J8)

J8 allows users to connector an external 4.5 to 6 VDC battery to the AR-B1462, if the on-board battery is fully discharged. Only the SRAM disk will draw the battery current. If no SRAM chips will be used, no battery is needed. The battery charger on AR-B1462 does not source charge current to the external battery which connects to J8.

2 Battery-

1 Battery+

Figure 3-28 J8: External Battery Connector

3.2.13 26-Pin Audio Connector (CN10)

The AR-B1462 didn’ t support the audio function, only using the AR-B1462A just find this connector.

2 4 6 8 10 12 14 16 18 20 22 24 26

CN10

1 3 5 7 9 11 13 15 17 19 21 23 25

Figure 3-29 CN10: 26-Pin Audio Connector

13

15

17

19

21

23

25

CN10

1

3

5

7

9

11

Signal

AUXAL

AUXAR

+12V

AUDIOL

AUDIOR

GND

MIDIIN

GND

-JSWA

-JSWB

-JSWC

-JSWD

GND

Table 3-6 Audio Connector Pin Assignment

14

16

18

20

22

24

26

CN10

2

4

6

8

10

12

Signal

LINEL

LINER

VJOYS

MICPH

PCSPKO

GND

MIDIOP

GND

JTMA

JTMB

JTMC

JTMD

GND

3-13

3.2.14 CPU Setting

The AR-B1462 accepts many types of microprocessors such as Intel/AMD/Cyrix 486DX/DX2/DX4. All of these

CPUs include an integer processing unit, floating-point processing unit, memory-management unit, and cache.

They can give a two to ten-fold performance improvement in speed over the 386 processor, depending on the clock speeds used and specific application. Like the 386 processor, the 486 processor includes both segmentbased and page-based memory protection schemes. The instruction of processing time is reduced by on-chip instruction pipelining. By performing fast, on-chip memory management and caching, the 486 processor relaxes requirements for memory response for a given level of system performance.

(1) CPU Logic Core Voltage Select (M6)

M6

P3 P4 P3 P4

3

2

1

5

3

1

3

2

1

5

3

1

5V 3.45V -- Factory Default Setting

Figure 3-30 M6: CPU Logic Core Voltage

(2) AMD 3X/4X CPU Select (JP11)

JP11

2

1

2

1

AMD 4X AMD 3X

Factory Default Setting

Figure 3-31 JP11: AMD 3X/4X CPU Select

(3) PCI Clock Select (JP4)

5 3 1

JP4

6 4 2

PCICLK=CPUCLK

Fixed on the

Factory Setting

Figure 3-32 JP4: PCI Clock Select

(4) CPU Base Clock Select (JP3)

PIN1-2 PIN3-4 PIN5-6 Base Clock

Close

Close

Close

Close

Open

Open

Open

Open

Close

Close

Open

Open

Close

Close

Open

Open

Close

Open

Close

Open

Close

Open

Close

Open

Table 3-7 JP3: CPU Base Clock Select

50MHz

40MHz

33.3MHz

25MHz

20MHz

16MHz

12MHz

8MHz

JP3

5

6

3 1

4 2

3-14

(5) CPU Cooling Fan Power Connector (CN3)

CN3

1 +12V

2 GND

3 GND

4 VCC

1 2 3 4

Figure 3-33 CN3: CPU Cooling Fan Power Connector

3.2.15 PCI Connector

(1) PCI Connector Power Select (JP1)

JP1

2

1

4

3

2

1

4

3

Enabled 3.3V


Disabled

Figure 3-34 JP1: PCI Connector Power Select

(2) 120-Pin PCI Connector (CN1)

CN1

1

2

3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49

4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48

51 53 55 57 59

50 52 54 56 58 60

61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97 99 101 103 105 107 109

62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108

Figure 3-35 CN1: 120-Pin PCI Connector

101 103 105 107 109

110 112 114 116 118 120

33

35

37

39

41

43

21

23

25

27

29

31

45

47

49

51

53

55

57

59

CN1 Signal

1 -TRST

3

5

TMS

+5V

7

9

11

13

15

17

19

-INTC

NC

NC

GND

-RST

-GNT

NC

+3.3V

AD11

AD9

+3.3V

AD4

AD2

+5V

+5V

+3.3V

AD26

AD24

+3.3V

AD20

AD18

+3.3V

GND

GND

+3.3V

-SB0

PAR

Table 3-8 Audio Connector Pin Assignment

34

36

38

40

42

44

22

24

26

28

30

32

46

48

50

52

54

56

58

60

CN1 Signal

2 +12V

4

6

TDI

-INTA

8

10

12

14

16

18

20

+5V

+5V

GND

NC

+5V

GND

AD30

AD28

GND

IDSEL

AD22

GND

AD16

-FRAME

-TRDY

-STOP

SDONE

GND

AD15

AD13

GND

C/BE0

CN1 Signal

61 -12V

63

65

GND

+5V

67

69

71

73

75

77

79

-INTB

-PRST1

-PRST2

GND

GND

GND

+5V

81

83

85

87

89

91

93

95

97

99

101

103

105

107

109

AD6

GND

111

113

AD0 115

-REQ64 117

+5V 119

AD14

AD12

GND

AD7

AD5

GND

+5V

+5V

AD29

AD27

+3.3V

AD23

AD21

+3.3V

C/BE2

-IRDY

-DEVSL

-LOCK

+3.3V

+3.3V

94

96

98

100

102

104

82

84

86

88

90

92

CN1 Signal

62 TCK

64

66

TD0

+5V

68

70

72

74

76

78

80

-INTD

NC

GND

NC

CLK

-REQ

AD31

106

108

110

GND

AD10

AD8

112

114

+3.3V

AD3

116 AD1

118 -ACK64

120 +5V

GND

AD25

C/BE3

GND

AD19

AD17

GND

+3.3V

GND

-PERR

-SERR

C/BE1

3-15

3.2.16 Memory Setting

(1) DRAM Configuration

There are two 32-bit memory banks on the AR-B1462 board. It can be one-side or double-side SIMM (Single-Line

Memory Modules) which is designed to accommodate 256KX36 bit to 16MX36-bit SIMMs. This provides the user with up to 128MB of main memory. The 32-bit SIMM (without parity bit) also can be used on AR-B1462 board.

There are listing on-board memory configurations available. Please refer to the following table for details:

SIMM1

256KX32(X36)

256KX32(X36)

512KX32(X36)

512KX32(X36)

1MX32(X36)

1MX32(X36)

2MX32(X36)

SIMM2

None

256KX32(X36)

None

512KX32(X36)

None

1MX32(X36)

None

2MX32(X36)

4MX32(X36)

4MX32(X36)

2MX32(X36)

None

4MX32(X36)

8MX32(X36)

8MX32(X36)

16MX32(X36)

16MX32(X36)

None

8MX32(X36)

None

16MX32(X36)

Table 3-9 DRAMs’ Configuration

Total Memory

1MB

2MB

2MB

4MB

4MB

8MB

8MB

16MB

16MB

32MB

32MB

64MB

64MB

128MB

(2) Cache RAM Select (JP10)

The AR-B1462 can be configured to provide a write-back or write-through cache scheme and support 512KB cache systems. A write-back cache system may provide better performance than a write-through cache system.

The BIOS Setup program allows you to set the cache scheme either write-back or write-through, either the internal cache selection.

JP10

2

1

2

1

Write-Through


Write-Back

Figure 3-36 JP10: Write-Through/Write-Back CPU Select

3.3 ETHERNET CONTROLLER

The Ethernet controller of the AR-B1462 is a highly integrated design that provides all Media Access Control

(MAC) and Encode-Decode (ENDEC) functions in accordance with the IEEE 802.3 standard. Network interfaces include 10BASE5 or 10BASE2 Ethernet via 10BASE-T via the Twisted-pair. The Ethernet controller can interface directly to the PC-AT ISA bus without any external device. The interface to PC-AT ISA bus is fully compatible with

NE2000 Ethernet adapter cards, so all software programs designed for NE2000 can run on the Ethernet controller card without any modification.

Microsoft’ s Plug and Play and the jumperless software configuration function are both supported. The capability of the PnP and Non-PnP mode autoswitch function allows users to configure network card. No jumpers or switches are needed to set when using either the PC or PnP function. The integrated 8KX16 SRAM and 10BASE-T transceiver make Ethernet controller more cost-effective.

3-16

3.3.1 Network 4-Pin Connector (J3)

J3

1 TPTX+

2 TPTX-

3 TPRX+

4 TPRX-

Figure 3-37 J3: Network Connector

3.3.2 AUI Connector (CN2)

2 4 6 8 10 12 14 16

CN2

1 3 5 7 9 11 13 15

9 10 11 12 13 14 15

DB-15

1 2 3 4 5 6 7 8

Figure 3-38 CN2: AUI Connector

CN2 DB-15

1 1

7

9

3

5

2

3

4

5

11

13

15

6

7

8

Signal

GND

T5CD+

T5TX+

GND

T5RS+

GND

Not Used

GND

Table 3-10 AUI Connector Pin Assignment

CN2 DB-15

2 9

4

6

8

10

10

11

12

13

12

14

16

14

15

--

Signal

T5CD-

T5TX-

GND

T5RX-

+12V

GND

Not Used

Not Used

3-17

4. CRT/LCD FLAT PANEL DISPLAY

This section describes the configuration and installation procedure using LCD and CRT display.

l Connecting the CRT Monitor l LCD Flat Panel Display l Supported LCD Panel

4.1 CONNECTING THE CRT MONITOR

To connect a CRT monitor, an adapter cable has to be connected to the CN13 (10-pin header type) connector.

This adapter cable is included in your AR-B1462 package.

4.1.1 CRT Connector (CN13)

The AR-B1462 support CRT color monitors. AR-B1462 used onboard VGA chipset and supported 1MB on-board

VRAM, and the AR-B1462A supported 2MB on-board VRAM. For different VGA display modes, your monitor must possess certain characteristics to display the mode you want.

To connect to a CRT monitor, an adapter cable has to be connected to the CN13 connector. CN13 is used to connect with a VGA monitor when you are using the on-board VGA controller as a display adapter.

CN13 is a 10-pin connector that attaches to the CRT monitor via a HD-sub 15-pin adapter cable. Pin assignments for the CN13 & HDB15 connector is as follows:

2 4 6 8 10

1 3 5 7 9

1 RED

3 GREEN

5 BLUE

7 VSYNC

9 HSYNC

2 GND

4 AGND

6 AGND

8 AGND

10 GND

11 12 13 14 15

6

1

7

2

8

3

9

4

10

5

1 Red

2 Green

3 Blue

13 Horizontial Sync

14 Vertical Sync

4, 9, 11, 12, & 15 Not used

5 & 10 Ground

6, 7 & 8 AGND

Figure 4-1 CN13: CRT Connector

CN13 DB-15

1 1

3

5

2

3

7

9

14

13

FUNCTION

Red

Green

Blue

V-sync

H-sync

Table 4-1 CRT Connector Assignment

CN13 DB-15

2 5

4

6

6

7

8

10

8

10

FUNCTION

GND

AGND

AGND

AGND

GND

4-1

4.2 LCD FLAT PANEL DISPLAY

This section describes the configuration and installation procedure for a LCD display. Skip this section if you are using a CRT monitor only.

Use the Flash memory Writer utility to download the new BIOS file into the ROM chip to configure the BIOS default settings for different types of LCD panels. Next, set your system properly and configure the AR-B1462 VGA module for the right type of LCD panel you are using.

The following shows the block diagram of the system when using the AR-B1462 with a LCD display.

AR-B1462

CPU Boad

LCD

Panel

VBL Control

+12V, +5V

VEE

Inverter

Board

FL HIGH

Voltage

Figure 4-2 LCD Panel Block Diagram

The block diagram shows that the AR-B1462 still needs components to use with a LCD panel. The inverter board provides the control for the brightness and the contrast of the LCD panel. The inverter is also the components that supply the high voltage to drive the LCD panel. Each item will be explained further in the section.

Inverter & Contrast

Pin 1

CN14 J10

AR-B1462

CPU Board

Pin 1

LCD

Panel

Figure 4-3 LCD Panel Cable Installation Diagram

NOTE: Be careful with the pin orientation when installing connectors and the cables. A wrong connection can easily destroy your LCD panel. Pin 1 of the cable connector is indicated with a sticker and pin1 of the ribbon cable is usually has a different color.

4-2

4.2.1 Inverter Board Description

The inverter board supplies high voltage signals to drive the LCD panel by converting the 12 volt signal from the

AR-B1462 into a high voltage AC signal for LCD panel. It can be installed freely on the space provided over the

VR board. If the VR board is installed on the bracket, you have to provide a place to install the inverter board into your system.

4.2.2 LCD Connector

(1) DE/E Signal from M or LP Select (JP6)

1

2

1

2

3

DE/M

Factory Preset

3

E/LP

Figure 4-4 JP6: DE/E Signal from M or LP

(2) DENAVEE & DVEE Signal Select (JP5)

1 2 3 1 2 3

DENAVEE

Factory Preset

DVEE

Figure 4-5 JP5: DENAVEE & DVEE Signal Select

(3) LCD Control Connector (J10)

J10 is a 5-pin connector that attaches to the Contrast and Backlight board, Its pin assignment is shown below:

1 2 3 4 5

1 ENABLK

2 ENVEE

3 +12V

4 GND

5 VEE

Figure 4-6 J10: LCD Control Connector

(4) Touch Screen Connector (J2)

1 RXDD

2 TXDD

3 GNDD

Figure 4-7 J2: Touch Screen Connector

(5) LCD Voltage Selector (JP12)

JP12 is used to select the LCD voltages to be 3.3V or 5V.

1

3

5

5V

2

4

6

1

3

5

3.3V

Factory Preset

6

2

4

4-3

(6) LCD Panel Display Connector (CN14)

Attach a display panel connector to this 44-pin connector with pin assignments as shown below:

2

1

27

29

31

33

35

37

39

41

43

11

13

15

17

19

21

23

25

Pin

1

3

5

7

9

GND

P19

P21

P23

VCC

+12V

GND

DE

GND

Signal

GND

GND

FLM

P0

P2

P4

GND

P7

P9

P11

P12

P14

P16

Figure 4-8 CN14: LCD Display Connector

28

30

32

34

36

38

40

42

44

12

14

16

18

20

22

24

26

Pin

2

4

6

8

10

Table 4-2 LCD Display Assignment

44

43

Signal

SHFCLK

LP

GND

P1

P3

P5

P6

P8

P10

GND

P13

P15

P17

P18

P20

P22

GND

VCC

+12V

GND

ENABLK

VEE

4.3 SUPPORTED LCD PANEL

At present, this VGA card can provide a solution with an inverter board for the following list of standard LCD panels. Consult your Acrosser representative for new developments. When using other models of standard LCD panels in the market.

5

6

7

8

NO.

Manufacture

1 NEC

2

3

4

NEC

NEC

HITACHI

HITACHI

HITACHI

ORION

SHARP

Table 4-3 LCD Panel Type List

Model No.

NL-6448AC30-10

NL-6448AC32-10

NL-6448AC33-10

LMG5371

LMG9200

LMG9400

OGM-640CN03C-S

LQ10D321

Description

TFT 9.4”

TFT 10.2”

TFT 10.4”

MONO 9.4” Dual Scan

DSTN 9.4”

DSTN 10.4”

DSTN 10.4”

TFT 10.4”

CAUTION: 1. If you want to connect the LCD panel, you must update the AR-B1462’ s BIOS, then you can setup the corrected BIOS. Please contact Acrosser for the latest BIOS update.

2. If user needs to update the BIOS version or connect other LCD, please contact the sales department. The detail supported LCDs are listed in the Acrosser Web site, user can download the suitable BIOS. The address is as follows: http:\\www.acrosser.com

4-4

5. INSTALLATION

This chapter describes the procedure of the utility diskette installation. The following topics are covered: l Overview l Utility Diskette l Watchdog Timer

5.1 OVERVIEW

This chapter provides information for you to set up a working system based on the AR-B1462 CPU board. Please read the details of the CPU board’ s hardware descriptions before installation carefully, especially jumpers’ setting, switch settings and cable connections.

Follow steps listed below for proper installation:

Step 1 : Read the CPU card’ s hardware description in this manual.

Step 2 : Install any DRAM SIMM onto the CPU card. (or user can skip this step because that the AR-B1462 embedded on-board DRAM)

Step 3 : Set jumpers.

Step 4 : Make sure that the power supply connected to your passive CPU board backplane is turned off.

Step 5 : Plug the CPU card into a free AT-bus slot or PICMG slot on the backplane and secure it in place with a screw to the system chassis.

Step 6 : Connect all necessary cables. Make sure that the FDC, HDC, serial and parallel cables are connected to pin 1 of the related connector.

Step 7 : Connect the hard disk/floppy disk flat cables from the CPU card to the drives. Connect a power source to each drive.

Step 8 : Plug the keyboard into the keyboard connector.

Step 9 : Turn on the power.

Step 10: Configure your system with the BIOS Setup program then re-boot your system.

Step 11: If the CPU card does not work, turn off the power and read the hardware description carefully again.

Step 12: If the CPU card still does not perform properly, return the card to your dealer for immediate service.

5.2 UTILITY DISKETTE

AR-B1462 provides two VGA driver diskettes, support WIN31, WIN95, WINNT 4.0 & OS/2; and one audio driver diskette. If your operating system is the other operating system, please attach Acrosser that will provide the technical supporting for the VGA resolution.

There are two diskettes: disk#2 is for WIN31, WIN95 & WINNT4.0 VGA resolution, disk#3 is for WINNT3.5 and

OS/2 VGA resolution. While user extracted the compressed files there is the README.* file in each subdirectories. Please refer to the file of README for any troubleshooting before install the driver. The disk#1 is for

SSD and network utility driver. The AR-B1462A supports audio function, so the disk provides audio driver.

5-1

5.2.1 VGA Driver

(1) WIN 3.1 Driver

For the WIN31 operating system, user must in the DOS mode decompress the compress file. And then as to the steps:

Step 1:

Step 2:

Make the new created directory to put the VGA drivers.

C:\>MD VGAW31

Insert the Utility Disk #2 in the floppy disk drive, and then copy the compress file —VGAWIN31.ZIP, and the extract program —PKUNZIP.EXE, in the new created directory.

C:\>COPY A:\ VGAWIN31.ZIP C:\VGAW31

C:\>COPY A:\PKUNZIP.EXE C:\VGAW31

Step 3:

Change directory to the new created directory, and extract the compress file.

C:\>CD VGAW31

C:\VGAW31>PKUNZIP -d VGAWIN31.ZIP

Step 4: In the DOS mode execute the SETUP.EXE file.

C:\VGAW31>SETUP

Step 5: The screen shows the chip type, and presses any key enter the main menu.

CHIPS 655XX - PCI Display Drivers

Preliminary Version 3.3.0

Step 6: There are some items for choice to setup. Please choose the <Windows Version 3.1> item, notice the function key defined. Press [ENTER] selected the <All Resolutions>, when this line appears [*] symbol, that means this item is selected. Press [End] starts to install.

Step 7: The screen will show the dialog box to demand user typing the WIN31’ s path. The default is

C:\WINDOWS.

Step 8: Follow the setup steps’ messages execute. As completed the setup procedure will generate the message as follow.

Installation is done!

Change to your Windows directory and type SETUP to run the Windows Setup program. Choose one of the new drivers marked by an *. Please refer to the User’ s Guide to complete the installation.

Step 9: Presses [Esc] return the main menu, and re-press [Esc] return to the DOS mode.

Step 10: And then re-name the OEM655XX.INF file as OEM65DGM.INF in the system directory of cwin31 directory. Acrosser recommends the method as:

C:\WINDOWS\SYSTEM>COPY OEM655XX.INF OEM65DGM.INF

Step 11: In the WIN31, you can find the <Chips CPL> icon located in the {CONTROL PANEL} group.

Step 12: Adjust the <Refresh Rate>, <Cursor Animation>, <Font size>, <Resolution>, and <Big Cursor>.

5-2

(2) WIN 95 Driver


Step 1: Make the new created directory to put the VGA drivers.

C:\>MD VGAW95

Step 2: Insert the Utility Disk #2 in the floppy disk drive, and then copy the compress file —VGAWIN95.ZIP, and the extract program —PKUNZIP.EXE, in the new created directory.

C:\>COPY A:\VGAWIN95.ZIP C:\VGAW95

C:\>COPY A:\PKUNZIP.EXE C:\VGAW95

Step 3: Change directory to the new created directory, and extract the compress file.

C:\>CD VGAW95

C:\VGAW95>PKUNZIP -d VGAWIN95.ZIP

Step 4: Enter the WIN95 operation system, please choose the <SETTING> item of the <DISPLAY> icon in the {CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source files’ path.

C:\VGAW95

Step 5: And then you can find the <Chips and Tech 65550 PCI (new)> item, select it and click the <OK> button.

Step 6: Finally, user can find the <DISPLAY> icon adds the <Chips> item. You can select this item, and adjust the <Screen Resolution>, <Refresh Rate>, <Font Size> …and other functions. Please refer to the messages during installation.

(3) WINNT Driver

For the WINNT4.0 and WINNT3.5 operating system, user must in the DOS mode decompress the compress file.

And then the following steps are for WINNT4.0, if you use WINNT3.5 for the disk#3 as to the steps:

Step 1: Make the new created directory to put the VGA drivers.

C:\>MD VGANT40

Step 2: Insert the Utility Disk #2 in the floppy disk drive, and then copy the compress file —WINNT40.ZIP,

C:\>COPY A:\WINNT40.ZIP C:\VGANT40

C:\>COPY A:\PKUNZIP.EXE C:\VGANT40


C:\>CD VGANT40

C:\VGANT40>PKUNZIP -d WINNT40.ZIP

Step 4: Enter the WINNT4.0 operation system, please choose the <SETTING> item of the <DISPLAY> icon in the {CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source files’ path.

C:\VGANT40

Step 5: And then you can find the <Chips and Tech 65550 PCI (new)> item, select it and click the <OK> button.

Step 6: Finally, user can find the <DISPLAY> icon adds the <Chips> item. You can select this item, and adjust the <Screen Resolution>, <Refresh Rate>, <Font Size> …and other function. Please refer to the messages during installation.

5-3

(4) OS/2 Warp Driver

The following steps must be performed before you install the 65550 display’ s driver:

CAUTION:

1. OS/2 DOS Support must be installed.

2. If you previously installed SVGA support, you must do the following: a) Close all DOS Full Screen and WIN-OS2 sessions.

b) Reset the system to VGA mode. VGA is the default video mode enabled when OS/2 is installed. To restore VGA mode, use Selective Install and select VGA for Primary Display. For more information on this procedure, see the section on Changing Display Adapter Support in the OS/2 Users Guide.

To install this driver, do the following steps:

Step 1: Open an OS/2 full screen or windowed session.

Step 2: Place the 65550 PCI Display Driver Diskette in drive A. (DISK #3)

Step 3: Because the diskette enclosed the compress file, to extract file had to as the steps.

Step 4: In the OS/2-DOS mode, make the VGA directory for decompress the driver.

C:\>MD VGAOS2

C:\>CD VGAOS2

C:\VGAOS2>COPY A:\VGAOS2.ZIP

C:\VGAOS2>PKUNZIP -d VGAOS2.ZIP

Step 5: At the OS/2 command prompt, type the following commands to copy the files to the OS/2 drive:

C:\VGAOS2> SETUP C:\VGAOS2 C: <ENTER>

Step 6: When the Setup Program is completed, you will need to perform a shutdown and then restart the system in order for changes to take effect.

Step 7: Please refer to the README.TXT file, there is detail description, user had to according to the installation step by step. When install completed, user can adjust the VGA resolution in the

SYSTEM icon <SCREEN> item of the <SYSTEM SETUP>.

5.2.2 Audio Driver

(1) WIN 3.1 Driver


Step 1:

Make the new created directory to put the audio drivers.

C:\>MD AUW31

Step 2: Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file —WIN31DRV.ZIP, and the extract program —PKUNZIP.EXE, in the new created directory.

C:\>COPY A:\ AUDIO\WIN31DRV.ZIP C:\AUW31

C:\>COPY A:\PKUNZIP.EXE C:\AUW31

Step 3:


C:\>CD AUW31

C:\AUW31>PKUNZIP -d WIN31DRV.ZIP

Step 4: In the FILE MANAGER ICON execute the SETUP.EXE file.

Step 5: The screen shows the chip type, and presses any key enter the main menu.

5-4

Step 6: There are some items for choice to setup. Please choose the <Driver Installation> item, notice the function key defined. And then the screen shows the hardware setting, press [OK] starts to install.

Step 7: Completed the installation, user will find two drivers: <ESS AudioDrive ES1869 4.17.08> and <ESS

AudioDrive MPU-401 4.17.08>.

(2) WIN 95 Driver


Step 1: Make the new created directory to put the audio drivers.

C:\>MD AUW95

Step 2: Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file —WIN95DRV.ZIP, and the extract program —PKUNZIP.EXE, in the new created directory.

C:\>COPY A:\AUDIO\WIN95DRV.ZIP C:\AUW95

C:\>COPY A:\PKUNZIP.EXE C:\AUW95


C:\>CD AUW95

C:\AUW95>PKUNZIP -d WIN95DRV.ZIP

Step 4: In the WIN95 operation system, please choose the <ADDING NEW HARDWARE> icon in the

{CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source files’ path.

C:\AUW95

Step 5: And then you can find the <ES1869 Plug and Play AudioDrive> item, select it and click the <OK> button.

Step 6: Finally, the installation is completed and user must reboot the system.

(3) WINNT Driver

For the WINNT4.0 and WINNT3.5 operating system, user must in the DOS mode decompress the compress file.

And then the following steps are for WINNT4.0:

Step 1: Make the new created directory to put the audio drivers.

C:\>MD AUNT40

Step 2: Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file —NT40DRV.ZIP,

C:\>COPY A:\AUNT40\NT40DRV.ZIP C:\AUNT40

C:\>COPY A:\PKUNZIP.EXE C:\AUNT40


C:\>CD AUNT40

C:\AUNT40>PKUNZIP -d NT40DRV.ZIP

Step 4: In the WINNT4.0 operation system, please choose the <ADDING NEW HARDWARE> icon in the

{CONTROL PANEL}. Please select the <From Disk Install> item, and type the factory source files’ path.

C:\AUNT40

Step 5: And then you can find the <ES1869 Plug and Play AudioDrive> item, select it and click the <OK> button.

Step 6: Finally, the installation is completed and user must reboot the system.

5-5

(4) DOS Driver

Step 1:

Step 2:

Make the new created directory to put the audio drivers.

C:\>MD AUDOS

Insert the Utility Disk #1 in the floppy disk drive, and then copy the compress file —DOSDRV.ZIP, and the extract program —PKUNZIP.EXE, in the new created directory.

C:\>COPY A:\AUDIO\DOSDRV.ZIP C:\AUDOS

C:\>COPY A:\PKUNZIP.EXE C:\AUDOS

Step 3:


C:\>CD AUDOS

C:\AUDOS>PKUNZIP -d DOSDRV.ZIP

Step 4: In the DOS mode execute the SETUP.EXE file.

C:\AUDOS>ESS

Step 5: The screen shows the hardware configuration items for setup the base address, IRQ, DMA …etc. If these items setting all are correct. The setup will ask the directory to install the files. The default directory is C:\AUDIODRV, and then press the [ENTER] key the installation is completed.

5.2.3 Network & SSD Utility

The first diskette provides two functions for user application. The file list is as follow:

UM9008 ZIP

PKUNZIP EXE

README DOC

The third diskette also provides SSD functions drivers. The file list is as follow:

SSD <DIR>

WD1462 EXE

WP1462

RFG

EXE

EXE

RFGDEMO PGF

(1) Network Utility

1. Use PKUNZIP.EXE program to decompress the file in the DOS mode, and use the command to decompress.

The decompressing active is as follow:

For Example

C:\>MD NET

C:\>CD NET

C:\NET>COPY A:\PKUNZIP.EXE C:\NET

C:\NET>COPY A:\UM9008.ZIP C:\NET

C:\NET>PKUNZIP -D UM9008.ZIP

2. And then enter the operation system, as the installation steps process. Please refer to the decompressed file.

There is the README file in every sub-directory, and has detail description for using the drivers.

5-6

(2) SSD Utility

To support the AR-B1462 solid state disk’ s operations, the following files have been provided on the enclosed diskette #3’ s directory <SSD>.

(A) WD1462.EXE

WD1462.EXE

This program demonstrates how to enable and trigger the watchdog timer. It allows you to test the <TIMES-OUT & RESET> function when the watchdog timer is enabled.

(B) WP1462.EXE

WP1462.EXE

This program demonstrates how to enable and disable software write protected function. It also shows the current protect mode of write or read only memory.

(C) RFG.EXE

RFG.EXE

This program is used to generate ROM pattern files in a binary format. Each ROM pattern file has the same size as the FLASH or EPROM and can be easily programmed on to the FLASH with on-board programmer or on to EPROM with any EPROM programmer. If you have specified a DOS drive in the *.PGF file, RFG will generate bootable ROM pattern files for the

EPROM or FLASH disk. The RFG supports the following DOS, MS-DOS, PC-DOS, DR-DOS, and X-DOS.

NOTE: If you want to use AR-B1462 with any DOS which is not supported by RFG, please send your requirement to Acrosser Technology Co., Ltd. or contract with your local sales representative.

The RFG.EXE provided in the utility diskette is a program that converts the files you list in the PGF and convert them into ROM pattern file. The RFG will determine how many EPROMs are needed and generate the same number of ROM pattern files. These ROM pattern files are named with the name assigned by the ROM_NAME in the PGF and the extension names are *.R01, *.R02 ….etc. To generate ROM pattern files.

The ROM File Generator main menu will be displayed on the screen. There are 7 options on the main menu. They serve the following functions:

Quit to DOS

Quits and exits to the DOS

OS Shell

Exits from the RFG temporarily to the DOS prompt. Type <EXIT> to return to the RFG main menu.

Load PFG File

If this option is used, the RFG will prompt you for the PGF file name. This option is useful if you have not previously entered a PGF name or you wish to use a different PGF file. The RFG will check and display the

PGF filename, ROM pattern file name, EPROM capacity, DOS version and the number of ROM pattern files that will be generated.

Type Current PGF File

This option instructs the RFG to use the DOS type command to display the contents of the current PGF file.

Generate ROM File(s)

If there is no mistake in your *.PGF file, then this menu option will generate ROM pattern files. The number of ROM pattern file generated by the RFG will depend on the total capacity needed by your files. For instance, if 3 files are generated, then you will need to use 3 EPROMs (The size depends upon the number stated in your PGF). The ROM pattern files will have the same file names, but will have different extension names. For example:

TEST.R01, TEST.R02, TEST.R03 …etc.

Display Error in PGF File

This option displays errors that were detected in your PGF.

5-7

5-8

Help to PGF File

This option gives information on how to write a PGF file and how to generate ROM pattern files. An example PGF is also included.

Move the reverse video bar to <Generate ROM File(s)> then press [ENTER]. The ROM pattern file is a binary file. The file size will be the same size as the EPROM that you assigned in the PGF. For example, if you are using 128KX8 EPROM memory chips, then the size of ROM patterns file will be 131072 bytes. For other chips the file size will be:

64KX8 EPROM----65536 bytes

256KX8 EPROM —262144 bytes

512KX8 EPROM---524288 bytes

1MX8 EPROM -----1048576 bytes

(D) RFGDEMO.PGF

RFGDEMO.PGF This file provides a sample PROGRAM GROUP FILE which illustrates how to create ROM pattern files correctly.

The PGF is an ASCII text file that can be created by using any text editor, word processor or DOS <COPY CON> command. The PGF lists what files will be copied and if DOS is going to be copied. This file can have any DOS filename, but the extension name must be *.PGF. For example, followings are valid filenames.

RFGDEMO.PGF

MYRFG.PGF

MSDOS.PGF

….

An examples of the *.PGF file is as follow.

ROM_NAME=TEST1 ; ROM pattern file name is TEST1

;The output file names will be TEST1.R01,

DOS_DRIVE=C:

;TEST1.R02..etc.

; DOS system drive unit is drive C:

ROM_SIZE=128

;If user does not want to copy DOS

;system files onto the ROM disk

;write as DOS_DRIVE=NONE

;64 means 64KX8 (28F512) EPROM

;size used

;128 means 128KX8 (27C/28F/29F010)

;EPROM size used

;256 means 512KX8 (27C/28F/29F020)

;EPROM size used

;512 means 512KX8 (27C/29F040)

;EPROM size used

;1024 means 1MX8 (27C080) EPROM

;size used

The following two files are options which depend on whether the ROM disk is to be bootable or not.

CONFIG.SYS

AUTOEXEC.BAT

;Below are user’ s files

A:\USER1.COM ; File USER1.COM on root of drive A:

USER2.EXE ; File USER2.EXE on current directory & drive

C:\TTT\USER3.TXT ; File USER3.TXT on sub-directory TTT of drive C:

5.3 WATCHDOG TIMER

This section describes how to use the Watchdog Timer, disabled, enabled, and trigger.

The AR-B1462 is equipped with a programmable time-out period watchdog timer. User can use the program to enable the watchdog timer. Once you have enabled the watchdog timer, the program should trigger it every time before it times out. If your program fails to trigger or disable this timer before it times out because of system hangup, it will generate a reset signal to reset the system. The time-out period can be programmed to be 3 to 42 seconds.

Enable (D7)

Time Factor (D0-D2)

Time Base

Watchdog

Register

Write and Trigger

Counter and

Compartor

Watchdog

LED

Figure 5-1 Watchdog Block Diagram

RESET

5.3.1 Watchdog Timer Setting

The watchdog timer is a circuit that may be used from your program software to detect crashes or hang-ups.

Whenever the watchdog timer is enabled, the LED will blink to indicate that the timer is counting. The watchdog timer is automatically disabled after reset.

Once you have enabled the watchdog timer, your program must trigger the watchdog timer every time before it times-out. After you trigger the watchdog timer, it will be set to zero and start to count again. If your program fails to trigger the watchdog timer before time-out, it will generate a reset pulse to reset the system or trigger the IRQ15 signal to tell your program that the watchdog is times out.

The factor of the watchdog timer time-out constant is approximately 6 seconds. The period for the watchdog timer time-out period is between 1 to 7 timer factors.

If you want to reset your system when watchdog times out, the following table listed the relation of timer factors between time-out period.

Time Factor

80H

81H

82H

83H

84H

85H

86H

87H

Table 5-1 Time-Out Setting

Time-Out Period (Seconds)

3

6

12

18

24

30

36

42

If you want to generate IRQ15 signal to warn your program when watchdog times out, the following table listed the relation of timer factors between time-out period. And if you use the IRQ15 signal to warn your program when watchdog timer out, please enter the BIOS Setup the <Peripheral Setup> menu, the <OnBoard PCI IDE> and <IDE

Prefetch> these two items must set to Primary.

Time Factor

0C0H

0C1H

0C2H

0C3H

0C4H

0C5H

0C6H

0C7H

Table 5-2 Time-Out Setting

Time-Out Period (Seconds)

3

6

12

18

24

30

36

42

5-9

NOTE: 1. If you program the watchdog to generate IRQ15 signal when it times out, you should initial IRQ15 interrupt vector and enable the second interrupt controller (8259 PIC) in order to enable CPU to process this interrupt. An interrupt service routine is required too.

2. Before you initial the interrupt vector of IRQ15 and enable the PIC, please enable the watchdog timer previously, otherwise the watchdog timer will generate an interrupt at the time watchdog timer is enabled.

SW1-1

On

Off

1 2 3 4 5 6 7 8 9 10

I/O Port 214h

Factory-Default Setting

SW1-1

On

Off

1 2 3 4 5 6 7

I/O Port 294h

8 9 10

Figure 5-1 SW1-1: Watchdog I/O Port Address Select

5.3.2 Watchdog Timer Enabled

To enable the watchdog timer, you have to output a byte of timer factor to the watchdog register whose address is

214H or Base Port. The following is a BASICA program which demonstrates how to enable the watchdog timer and set the time-out period at 24 seconds.

1000 REM Points to command register

1010 WD_REG% = 214H

1020

1030

1040

1050

REM Timer factor = 84H (or 0C4H)

TIMER_FACTOR% = %H84

REM Output factor to watchdog register

OUT WD_REG%, TIMER_FACTOR%

.,etc.

5.3.3 Watchdog Timer Trigger

After you enable the watchdog timer, your program must write the same factor as enabling to the watchdog register at least once every time-out period to its previous setting. You can change the time-out period by writing another timer factor to the watchdog register at any time, and you must trigger the watchdog before the new time-out period in next trigger. Below is a BASICA program which demonstrates how to trigger the watchdog timer:


2010

2020

WD_REG% = 214H

REM Timer factor = 84H (or 0C4H)

2030

2040

2050

TIMER_FACTOR% = &H84



.,etc.

5.3.4 Watchdog Timer Disabled

To disable the watchdog timer, simply write a 00H to the watchdog register.


3010 WD_REG% = BASE_PORT%

3020

3030

3040

3050

REM Timer factor = 0

TIMER_FACTOR% = 0



., etc.

5-10

6. SOLID STATE DISK

The section describes the various type SSDs’ installation steps as follows. This chapter describes the procedure of the installation. The following topics are covered: l Overview l Switch Setting l Jumper Setting l ROM Disk Installation l DiskOnChip Installation

6.1 OVERVIEW

The AR-B1462 provides three 32-pin JEDEC DIP sockets which may be populated with up to 4MB of EPROM or

2MB of FLASH or 2MB of SRAM disk. It is ideal for diskless systems, high reliability and/or high speed access applications, controller for industrial or line test instruments, and etc.

If small page (less or equal 512 bytes per page) 5V FLASHs were used, you could format FLASH disk and copy files onto FLASH disk just like using a normal floppy disk. You can use all of the related DOS command (such as

COPY, DEL …etc.) to update files on the 5V FLASH disk.

The write protect function allows you to prevent your data on small page 5V FLASH or SRAM disk from accidental deletion or overwrite.

Data retention of SRAM is ensured by an on-board Lithium battery or an external battery pack that could be connected to the AR-B1462.

6.2 SWITCH SETTING

We will show the locations of the AR-B1462 switch, and the factory-default setting.

CAUTION: The switch setting needs to adjust with the jumpers setting, make sure the jumper settings and the switch setting are correct.

CN4 J2

1

H3

1

H7

JP10 JP11

J1

50

51

50

51

CN13

U6

LED1

H4

2

1

JP1

U11

U28

1

CN2

U8

1

2

3

A B C

J8

JP4

104

CN1

12

81

CN3

GND

LED2

5

LM1

6

8

2

4

H5

51

50

U7

100

1

31

JP3

2

1

JP2

1

J3

J4

1

2

81

2

1

3

A B C

2

1

3

A B C

H35

51

50

U18

SW1

31

100

1

81

U26

51

50

31

2

1

3

A B C

2

3

1

A B C

CN11

100

1

U34

H9

CN10

1

JP5

J9 CN12

H10

J10 CN14 CN15

J5

U17

U20

U27

U30

CN16

LED3

J6 J7

CN5

2

3

1

M5

A B C

CN8

H6

CN6

CN7

CN9

Figure 6-1 Switch & SSD Type Jumper Location

6-1

6.2.1 Overview

There is 1 DIP Switch located on the AR-B1462. It performs the following functions:

ON

OFF

1 2 3 4 5 6 7 8 9 10

Figure 6-2 SW1: Switch Select

SW1-1

SW1-2

Set the base I/O port address

Set the starting memory address

SW1-3 Reserved

SW1-4 & SW1-5 Set the drive number of solid state disk

SW1-6 & SW1-7 Set the used ROM memory chips

SW1-8, SW1-9 & Mode select of serial port 1/2

SW1-10

6.2.2 I/O Port Address Select (SW1-1)

SW1-1 is provided to select one of the four base port addresses for the watchdog timer and the solid state disk.

The AR-B1462 occupies 6 I/O port addresses. Followings state selections of base port address.

SW1-1

OFF (*)

ON

Base Port

210h

290h

Table 6-1 I/O Port Address Select

Solid State Disk Watchdog

210h-213h 214h-215h

290h-293h 294h-295h

6.2.3 SSD Firmware Address Select (SW1-2)

The AR-B1462‘ s SSD firmware occupies 32KB of memory. SW1-2 is used to select the memory base address.

You must select an appropriate address so that the AR-B1462 will not conflict with memory installed on other addon memory cards. Additionally, be sure not to use shadow RAM area or EMM driver’ s page frame in this area.

SW1-2

OFF (*)

SSD BIOS Address

D000:0 (16KB)

ON D000:0 (16KB)

Table 6-2 SSD Firmware Address Select

Bank Memory Address

CC00:0 (16KB)

D400:0 (16KB)

If you are not going to use the solid state disk (SSD), you can use BIOS setup program to disable the SSD BIOS.

The AR-B1462 will not occupy any memory address if the SSD BIOS is disabled.

If you are going to install the EMM386.EXE driver, please use the [X] option to prevent EMM386.EXE from using the particular range of segment address as an EMS page which is used by AR-B1462. For example, write a statement in the CONFIG.SYS file as follow: (If the memory configuration of AR-B1462 is CC00:0)

DEVICE=C:\DOS\EMM386.EXE X=CC00-CFFF

6-2

6.2.4 SSD Drive Number (SW1-4 & SW1-5)

The AR-B1462 SSD can simulate one or two disk drives. You can assign the drive letter of the AR-B1462 by configuring SW1-4 & SW1-5.

You can make the computer to boot from SSD by copying DOS into the SSD. If your SSD does not have DOS, the computer will boot from your hard disk or floppy disk. In this condition, the SSD BIOS of AR-B1462 will set the drive letter of the SSD to the desired drive letter automatically.

The AR-B1462 would simulate a single disk drive when only (FLASH) EPROM or SRAM (starting from MEM1 socket) is installed. The drive numbers with respect to the switch setting when the AR-B1462 simulates single disk drives.

SW1-4

OFF (*)

ON

OFF

SW1-5

OFF

OFF

ON

ON ON

Table 6-3 SSD Drive Number

Occupies floppy disk number (SSD)

0 or 1 (Note 1)

0 or 2 (Note 2)

0

0

NOTE: 1. If there is no DOS on this SSD, the disk number will 1 (B:). If any DOS is found by the AR-B1462 SSD

BIOS, the disk number will be 0 (A:) But, you can change the disk number from 0 to 1 by pressing the

<ESC> key during system bootup.

2. If there is no DOS on this SSD, the disk number will be 2 (C: or D: or …). If any DOS is found by the AR-

B1462 SSD BIOS, the disk number will be 0 (A:). But, you can change the disk number from 0 to 2 by pressing the <ESC> key during system bootup.

(2) Simulate 2 Disk Drive

When (FLASH) EPROM and SRAM are both used on the AR-B1462, or you only have installed SRAM that does not start from MEM1 socket, the AR-B1462 will simulate two disk drives. The drive numbers respect to those switch settings when AR-B1462 simulates two disk drives.

SW1-4

OFF

ON

OFF

SW1-5

OFF

OFF

ON

Occupies floppy disk number

FLASH (EPROM) SRAM

0 or 1 (Note 1) 2

0 or 2 (Note 2)

0

ON ON 0

Table 6-4 SSD Drive Number for Simulate 2 Disk Drive

3

1

2

NOTE: 1. If there is no DOS on this SSD, the disk number will be 1 (B:). If any DOS is found by the AR-B1462

SSD BIOS, the disk letter will be 0 (A:). But, you can change the disk number from 0 to 1 by pressing the <ESC> key during system bootup.

2. If there is no DOS on this SSD, the disk number will be 2 (C: or D: or ….). If any DOS is found by the

AR-B1462 SSD BIOS, the disk number will be 0 (A:). But, you can change the disk number from 0 to 2 by pressing the <ESC> key during system bootup.

6-3

(2) Disk Drive Name Arrangement

If any logical hard disk drives exist in your system, there will also be a different disk number depending on which version DOS you are using.

The solid state disk drive number with there respective DOS drive designation are listed in table as follows. The solid state disk drive number is changeable as the DOS version. The following table expresses the variety.

Condition

No Logical hard disk

1 Logical hard disk

Floppy disk No.

Logical hard disk

0 1 2 3 1 2 3 4

A: B: C: D: -----

A: B: C: D: E: ----

2 Logical hard disk

3 Logical hard disk

A: B: C: D: E: F: ---

A: B: C: D: E: F: G: --

4 Logical hard disk A: B: C: D: E: F: G: H:

Table 6-5 SSD Drive Number for DOS Version before 5.0

Condition

Floppy disk No.

Logical hard disk

0 1 2 3 1 2 3 4

No Logical hard disk

1 Logical hard disk

2 Logical hard disk

A:

A:

A:

B:

B:

B:

C:

D:

E:

D:

E:

F:

--

C:

C:

--

--

D:

--

--

--

--

--

--

3 Logical hard disk

4 Logical hard disk

A:

A:

B:

B:

F:

G:

G:

H:

C:

C:

D:

D:

E:

E:

Table 6-6 SSD Drive Number for DOS Version 5.0 and Newer

--

F:

6.2.5 ROM Type Select (SW1-6 & SW1-7)

SW1-6 & SW1-7 are used to select the memory type of ROM disk section.

SW1-6

OFF

ON

OFF

SW1-7

OFF

OFF

ON

ON ON

Table 6-7 ROM Type Select

EPROM Type

UV EPROM (27Cxxx)

5V FLASH 29Fxxx (*Note)

5V FLASH (29Cxxx & 28Eexxx)

12V FLASH (28Fxxx)

NOTE: It is also used to perform the hardware write protection of small page 5V FLASH (29Cxxx or 28Eexxx) disk.

6.2.6 Serial Port 1 Mode Select (SW1-8)

SW1-8 is used to select the interface mode of serial port 1.

SW1-8

OFF

ON

Table 6-8 Serial Port 1 Mode Select

Serial Port 1

RS-232C (*)

TTL

6-4

6.2.7 Serial Port 2 Mode Select (SW1-9 & SW1-10)

SW1-9 & SW1-10 are used to select the interface mode of serial port2.

SW1-9

OFF

ON

OFF

SW1-10

OFF

OFF

ON

RS-232C (*)

Serial port 2

RS-422

RS-485 mode1 (Note 1)

ON ON RS-485 mode2 (Note 2)

Table 6-9 Serial Port 2 Mode Select

When RS-422 or RS-485 mode is selected, you also need to change M5 to select between RS-422 or RS-485 mode.

NOTE: 1. The recommended configuration for RS-485 interface is to set the transmitter to be controlled by DTR and set the receiver to the inverse state of the transmitter. Receiver is disabled.

2. The receiver is always enabled, so you will receive data that you transmitted previously. It is not recommended to use this setting as RS-485 interface.

6.3 JUMPER SETTING

Before installing the memory into memory sockets MEM1 through MEM4, you have to configure the memory type which will be used (ROM/RAM) on the AR-B1462. Each socket is equipped with a jumper to select the memory type.

You can configure the AR-B1462 as a (FLASH) EPROM disk (ROM only), a SRAM disk (SRAM only) or a combination of (FLASH) EPROM and SRAM disk.

It is not necessary to insert memory chips into all of the sockets. The number of SRAM chips required depends on your RAM disk capacity. The number of EPROM chips required depends on the total size of files that you plan to copy onto the ROM disk and whether or not it will be bootable.

Insert the first memory chip into MEM1 if you are going to configure it as a ROM or SRAM disk. If you use a combination of ROM and RAM, then insert the (FLASH) EPROM chip starting with the MEM1, and insert the

SRAM chips starting from the first socket which is configured as SRAM.

l M1:is used to configure the memory type of MEM1 l M2:is used to configure the memory type of MEM2 l M3:is used to configure the memory type of MEM3 l M4:is used to configure the memory type of MEM4

CAUTION: When the power is turned off, please note the following precautions.

1. If your data has been stored in the SRAM disk, do not change the jumper position or data will be lost.

2. Make sure jumpers are set properly. If you mistakenly set the jumpers for SRAM and you have

EPROM or FLASH installed, the EPROM or FLASH will drain the battery’ s power.

6-5

A B C

1

2

3

M1, M2, M3, & M4

JP8

1

2

3

1MX8 EPROM (Only)

A B C JP8

1

2

1

2

3

3

M1, M2, M3, & M4 EPROM (128KX8, 256KX8 and 512KX8)

5V FLASH (64KX8, 128KX8 and 256KX8)

(Factory Preset)

A B C JP8

1

2

3

M1, M2, M3, & M4

A B C

1

2

3

5V FLASH (512KX8 Only)

JP8

1

2

1

2

3

SRAM

3

M1, M2, M3, & M4

Figure 6-3 M1~M4 & JP8: Memory Type Setting

6.4 ROM DISK INSTALLATION

The section describes the various type SSDs’ installation steps as follows. The jumper and switch adjust as SSD’ s different type to set.

6.4.1 UV EPROM (27Cxxx)

(2) Switch and Jumper Setting

Step 1: Use jumper block to set the memory type as ROM (FLASH).

Step 2: Select the proper I/O base port, firmware address, disk drive number and EPROM type on SW1.

Step 3: Insert programmed EPROM(s) or FLASH(s) chips into sockets starting at MEM1.

ON

OFF

1 2 3 4 5 6 7 8 9 10

Figure 6-4 UV EPROM (27CXXX) Switch Setting

6-6

A B C

1

2

3

M1, M2, M3, & M4

JP8

1

2

3

1MX8 EPROM (Only)

A B C

1

2

3

M1, M2, M3, & M4

JP8

1

2

3

EPROM (128KX8, 256KX8 and 512KX8)

Figure 6-5 UV EPROM Jumper Setting

(2) Software Programming

Use the UV EPROM, please refer to the follow steps:

Step 1: Turn on the power and boot DOS from hard disk drive or floppy disk drive.

Step 2: Making a Program Group File (*.PGF file)

Step 3: Using the RFG.EXE to generate ROM pattern files, and counting the ROM numbers as the pattern files.

Step 4: In the DOS prompt type the command as follows.

C:\>RFG [file name of PGF]

Step 5: In the RFG.EXE main menu, choose the <Load PGF File> item, that is user editing *.PGF file.

Step 6: Choose the <Generate ROM File(s)>, the tools program will generate the ROM files, for programming the EPROMs.

Step 7: Program the EPROMs

Using the instruments of the EPROM writer to load and write the ROM pattern files into the EPROM chips. Make sure that the EPROMs are verified by the program without any error.

Step 8: Install EPROM chips

Be sure to place the programmed EPROMs (R01, R02 ….) into socket starting from MEM1 and ensure that the chips are installed in the sockets in the proper orientation.

6.4.2 Large Page 5V FLASH Disk

If you are using large page 5V FLASH as ROM disk, it is the same procedure as step 1 to step 4 of using the UV

EPROM.



Step 2: Select the proper I/O base port, firmware address, disk drive number and large page 5V FLASH type on SW1.


6-7

ON

OFF

1 2 3 4 5 6 7 8 9 10

Figure 6-6 5V Large FLASH (29FXXX) Switch Setting

A B C JP8

1

2

1

2

3

3

M1, M2, M3, & M4


(Factory Preset)

1

2

3

A B C JP8

1

2

3


M1, M2, M3, & M4

Figure 6-7 Large Page 5V FLASH Jumper Setting


And then, you should create a PGF and generate ROM pattern files by using the RFG.EXE.


Step 2: Generate ROM pattern files

Step 3: Turn off your system, and then install FLASH EPROMs into the sockets.

NOTE: Place the appropriate number of FLASH EPROM chips (the numbers depends on the ROM pattern files generated by RFG.EXE) into the socket starting from MEM1 and ensure that the chips are installed in the sockets in the proper orientation. Line up and insert the AR-B1462 board into any free slot of your computer.

Step 4: Turn on your system, and Program FLASH EPROMs.

NOTE: The FLASH EPROM program is built-in the AR-B1462 board. The FLASH EPROMs can be programmed on the AR-B1462. Before programming the FLASH EPROMs, please insert at least the same number of FLASH EPROMs, please insert at least the same number of FLASH

EPROMs, please insert at least the same number of FLASH chips as the ROM pattern files generated.

Step 5: The PGM1462.EXE file is a program that loads and writes the ROM pattern files onto the (FLASH) memory chips. To program the FLASH EPROM.

Step 6: In the DOS prompt type the command as follows.

C:\>PGM1462 [ROM pattern file name]

6-8

Step 7: In the main menu, choose the <Load ROM File> item, that is the ROM_NAME=[file name] in the *.PGF

file.

Step 8: Choose the <Program Memory> item, this item program will program the EPROMs.

NOTE: Move the reverse video bar to the <Program memory> option then press <ENTER>.

Step 9: Reboot the system

NOTE: Reboot your computer by making a software or hardware reset.

6.4.3 Small Page 5V FLASH ROM Disk



Step 2: Select the proper I/O base port, firmware address, disk drive number and EPROM type on SW1.


ON

OFF

1 2 3 4 5 6 7 8 9 10

Figure 6-8 5V FLASH (29CXXX & 28EEXXX) Switch Setting

A B C JP8

1 1

2

2

3

3

M1, M2, M3, & M4

(Factory Preset)


A B C JP8

1

2

1

2

3


3

M1, M2, M3, & M4

Figure 6-9 5V FLASH (29CXXX & 28EEXXX) Jumper Setting

6-9

(2) Using Tool Program

If small page 5V FLASH EPROMs are used, it is the same procedure as step 1 to step 4 of using the UV EPROM:


Step 2: Generating ROM pattern files

Step 3: Installing FLASH EPROMs

Step 4: Programming FLASH EPROMs

Step 5: Reboot system

(3) Typing DOS Command

You can use another way to format and copy files to the 5V FLASH EPROM. This method provides the convenience of using a RAM disk. You can use the DOS <FORMAT> and <COPY> command to format and copy files. Follow the following steps to format and copy files to the FLASH disk. it is the same procedure as step 1 to step 4 of using the UV EPROM.

Step 1: Turn on your computer, when the screen shows the SSD BIOS menu, please hit the [F1] key during the system boot-up, this enables you to enter the FLASH setup program. If the program does not show up, check the switch setting of SW1.

Step 2: Use <Page-Up>, <Page-Down>, <Right>, and <Left> arrow keys to select the correct FLASH memory type and how many memory chips are going to be used.

Step 3: Press the [F4] key to save the current settings.

Step 4: After the DOS is loaded, use the DOS [FORMAT] command to format the FLASH disk.

To format the disk and copy DOS system files to the disk.

C:\>FORMAT [ROM disk letter] /S /U

To format the disk without copying DOS system files.

C:\>FORMAT [ROM disk letter] /U

Step 5: Copy your program or files to the FLASH disk by using DOS [COPY] command.

CAUTION: It is not recommended that the user formatted the disk and copy files to the FLASH disk very often.

Since the FLASH EPROM’ s write cycle life time is about 10,000 or 100,000 times, writing data to the

FLASH too often will reduce the life time of the FLASH EPROM chips, especially the FLASH EPROM chip in the MEM1 socket.

6-10

6.4.4 RAM Disk



Step 2: Select the proper I/O base port, firmware address, disk drive number on SW1.

Step 3: Insert programmed SRAM chips into sockets starting at MEM1.

NOTE: If you use the SRAM, please skip the SW1-6 & SW1-7 setting.

1

2

3

A B C JP8

1

2

SRAM

3

M1, M2, M3, & M4

Figure 6-10 SRAM Jumper Setting


It is very easy to use the RAM disk. The RAM disk operates just like a normal floppy disk. A newly installed RAM disk needs to be formatted before files can be copied to it. Use the DOS command [FORMAT] to format the RAM disk.

Step 1: Use jumper block to select the memory type as SRAM refer.

Step 2: Select the proper I/O base port, firmware address and disk drive number on SW1.

Step 3: Insert SRAM chips into sockets starting from MEM1

Step 4: Turn on power and boot DOS from hard disk drive or floppy disk drive.

Step 5: Use the DOS command [FORMAT] to format the RAM disk. If you are installing SRAM for the first time.

To format the RAM disk and copy DOS system files onto the RAM disk.

C:\>FORMAT [RAM disk letter] /S /U

To format the RAM disk without copying DOS system files into the RAM disk.

C:\>FORMAT [RAM disk letter] /U

Step 6: Use the DOS command [COPY] to copy files onto the RAM disk. For example, if you want to copy file

<EDIT.EXE> to the RAM disk from drive C: and the RAM disk is assigned as drive A:.

COPY C:EDIT.EXE A:

NOTE: In addition, you can use any other DOS command to operate the RAM disk.

6-11

6.4.5 Combination of ROM and RAM Disk

The AR-B1462 can be configured as a combination of one ROM disk and one RAM disk. Each disk occupies a drive unit.

Step 1: Use jumper block to select the proper ROM/RAM configuration you are going to use.

Step 2: Insert the first programmed EPROM into the socket mem1, the second into the socket MEM2, etc.

Step 3: Insert the SRAM chips starting from the first socket assigned as SRAM.

Step 4: Select the proper I/O base port, firmware address and disk drive number on SW1.

Step 5: Turn on power and boot DOS from hard disk drive or floppy disk drive.

Step 6: Use the DOS command [FORMAT] to format the RAM disk.

C:\>FORMAT [RAM disk letter] /U

Step 7: If 5V FLASH (small page) is being used for the first time.

And then use the DOS command [FORMAT] to format the FLASH disk.

Step 8: If large page 5V FLASH is being installed for the first time, please use the FLASH programming utility

RFG.EXE to program ROM pattern files.

NOTE: Users can only boot DOS from the ROM disk drive if the AR-B1462 is configured as a ROM and a RAM disk. You don’ t need to copy DOS onto the RAM disk.

6.5 DISKONCHIP INSTALLATION

The DiskOnChip is a new generation of high performance single-chip Flash Disk. It provides a Flash Disk in a standard 32-pin DIP package.

This unique data storage solution offers a better, faster, and more cost-effective Flash Disk for Single Board embedded systems. The DiskOnChip provides a Flash Disk that does not require any bus, slot or connector.

Simply insert the DiskOnChip into 32-pin socket MEM4 position on the CPU board. It is the optimal solution for single board computers, it is a small, fully functional, easy to integrate, plug-and-play Flash Disk with a very low power consumption.

The DiskOnChip is fully tested and formatted before the product is shipped.

(1) DiskOnChip Hardware Installation

Step 1: Make sure the target platform is powered OFF

Step 2: Use JP7 to select the correct D.O.C. socket.

Step 3: Plug the DiskOnChip device into the MEM4 socket. Verify the direction is correct (pin 1 of the

DiskOnChip is aligned with pin 1 of the MEM4 socket)

Step 4: Line up and insert the AR-B1462 card into any free slot of your computer.

Step 5: Power up the system

Step 6: During power up you may observe the messages displayed by the DiskOnChip when its drivers are automatically loaded into system’ s memory

Step 7: At this stage the DiskOnChip can be accessed as any disk in the system

Step 8: If the DiskOnChip is the only disk in the system, it will appear as the first disk (drive C: in DOS)

Step 9: If there are more disks besides the DiskOnChip, it will appear by default as the last drive, unless it was programmed as first drive.

Step 10: If you want the DiskOnChip to be bootable, copy the operating system files into the DiskOnChip by using the standard DOS command.

6-12

(2) DiskOnChip Memory Address Setting (JP7)

JP7 JP7

6

4

2

5

3

1

6

4

2

5

3

1

MEM4=SSD MEM4=DOC

Figure 6-11 JP7: DiskOnChip Memory Address Setting

(3) Configuring the DiskOnChip as a Bootable Disk

The DiskOnChip fully supports the BOOT capability. In order for the DiskOnChip to be bootable, it should be DOS formatted as bootable, like any floppy or hard disk that required to be booted.

SYS D:

Change the disk into bootable (assuming the DiskOnChip is disk D)

6-13

7. BIOS CONSOLE

This chapter describes the AR-B1462 BIOS menu displays and explains how to perform common tasks needed to get up and running, and presents detailed explanations of the elements found in each of the BIOS menus. The following topics are covered: l BIOS Setup Overview l Standard CMOS Setup l Advanced CMOS Setup l Advanced Chipset Setup l Peripheral Setup l Auto-Detect Hard Disks l Password Setting l Load Default Setting l BIOS Exit l BIOS Update

7.1 BIOS SETUP OVERVIEW

BIOS is a program used to initialize and set up the I/O system of the computer, which includes the ISA bus and connected devices such as the video display, diskette drive, and the keyboard.

The BIOS provides a menu-based interface to the console subsystem. The console subsystem contains special software, called firmware that interacts directly with the hardware components and facilitates interaction between the system hardware and the operating system.

The BIOS Default Values ensure that the system will function at its normal capability. In the worst situation the user may have corrupted the original settings set by the manufacturer.

After the computer turned on, the BIOS will perform a diagnostics of the system and display the size of the memory that is being tested. Press the [Del] key to enter the BIOS Setup program, and then the main menu will show on the screen.

The BIOS Setup main menu includes some options. Use the [Up/Down] arrow key to highlight the option that you wish to modify, and then press the [Enter] key to assure the option and configure the functions.

AMIBIOS HIFLEX SETUP UTILITY - VERSION 1.16

(C) 1996 American Megatrends, Inc. All Rights Reserved

Standard CMOS Setup

Advanced CMOS Setup

Advanced Chipset Setup

Peripheral Setup

Auto-Detect Hard Disks

Change User Password

Change Supervisor Password

Auto Configuration with Optimal Settings

Auto Configuration with Fail Safe Settings

Save Settings and Exit

Exit Without Saving

Standard CMOS setup for changing time, date, hard disk type, etc.

Figure 7-1 BIOS: Setup Main Menu

CAUTION: 1. AR-B1462 BIOS the factory-default setting is used to the <Auto Configuration with Optimal Settings>

Acrosser recommends using the BIOS default setting, unless you are very familiar with the setting function, or you can contact the technical support engineer.

2. If the BIOS loss setting, the CMOS will detect the <Auto Configuration with Fail Safe Settings> to boot the operation system, this option will reduce the performance of the system. Acrosser recommends choosing the <Auto Configuration with Optimal Setting> in the main menu. The option is best-case values that should optimize system performance.

3. The BIOS settings are described in detail in this section.

7-1

7.2 STANDARD CMOS SETUP

The <Standard CMOS Setup> option allows you to record some basic system hardware configuration and set the system clock and error handling. If the CPU board is already installed in a working system, you will not need to select this option anymore.

AMIBIOS SETUP - STANDARD CMOS SETUP


Date (mm/dd/yyyy): Sat Dec 05,1998

Time (hh/mm/ss): 13:13:00

640K

39MB

Floppy Drive A: Not Installed

Floppy Drive B: Not Installed

LBA Blk PIO 32Bit

Type Size Cyln Head Wpcom Sec Mode Mode Mode Mode

Pri Master : Auto

Pri Slave : Auto

Off Off Auto Off

Off Off Auto Off

Boot Sector Virus Protection Disabled

Month: Jan - Dec

Day: 01 - 31

Year: 1901 - 2099

PgUp/PgDn:Modify

F2/F3:Color

Figure 7-2 BIOS: Standard CMOS Setup

Date & Time Setup

Highlight the <Date> field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow the month, day and year format.

Highlight the <Time> field and then press the [Page Up] /[Page Down] or [+]/[-] keys to set the current date. Follow the hour, minute and second format.

The user can bypass the date and time prompts by creating an AUTOEXEC.BAT file. For information on how to create this file, please refer to the MS-DOS manual.

Floppy Setup

The <Standard CMOS Setup> option records the types of floppy disk drives installed in the system.

To enter the configuration value for a particular drive, highlight its corresponding field and then select the drive type using the left-or right-arrow key.

Hard Disk Setup

The BIOS supports various types for user settings, The BIOS supports <Pri Master> and <Pri Slave> so the user can install up to two hard disks. For the master and slave jumpers, please refer to the hard disk’ s installation descriptions and the hard disk jumper settings.

You can select <AUTO> under the <TYPE> and <MODE> fields. This will enable auto detection of your IDE drives during bootup. This will allow you to change your hard drives (with the power off) and then power on without having to reconfigure your hard drive type. If you use older hard disk drives which do not support this feature, then you must configure the hard disk drive in the standard method as described above by the <USER> option.

Boot Sector Virus Protection

This option protects the boot sector and partition table of your hard disk against accidental modifications. Any attempt to write to them will cause the system to halt and display a warning message. If this occurs, you can either allow the operation to continue or use a bootable virus-free floppy disk to reboot and investigate your system. The default setting is <Disabled>. This setting is recommended because it conflicts with new operating systems.

Installation of new operating system requires that you disable this to prevent write errors.

7-2

7.3 ADVANCED CMOS SETUP

The <Advanced CMOS SETUP> option consists of configuration entries that allow you to improve your system performance, or let you set up some system features according to your preference. Some entries here are remained in their default settings.

AMIBIOS SETUP - ADVANCED CMOS SETUP


BootUp Sequence

BootUp Num-Lock

Floppy Drive Swap

Floppy Drive Seek

Mouse Support

Typematic Rate

System Keyboard

Primary Display

Password Check

Wait For ‘ F1’ If Error

Hit ‘ DEL’ Message Display

Internal Cache

External Cache

System BIOS Cacheable

Hard disk Delay

C000, 16k Shadow

C400, 16k Shadow

C800, 16k Shadow

CC00, 16k Shadow

D000, 16k Shadow

D400, 16k Shadow

D800, 16k Shadow

DC00, 16k Shadow

C:,A:,CDROM

On

Disabled

Disabled

Enabled

Fast

Present

VGA/EGA

Setup

Enabled

Enabled

WriteBack

WriteThru

Enabled

3 Sec

Enabled

Enabled

Disabled

Disabled

Disabled

Disabled

Disabled

Disabled

Available Options :

C:, A:. CDROM

A:, C:, CDROM

CDROM, A:, C:

PgUp/PgDn:Modify

F2/F3:Color

Figure 7-3 BIOS: Advanced CMOS Setup

BootUp Sequence

The option determines where the system looks first for an operating system.

BootUp Num-Lock

This item is used to activate the Num-Lock function upon system boot. If the setting is on, after a boot, the Num-

Lock light is lit, and user can use the number key.

Floppy Drive Swap

The option reverses the drive letter assignments of your floppy disk drives in the Swap A, B setting, otherwise leave on the default setting of Disabled (No Swap). This works separately from the BIOS Features floppy disk swap feature. It is functionally the same as physically interchanging the connectors of the floppy disk drives. When the setting is <Enabled>, the BIOS will be swapped floppy drive assignments so that Drive A becomes Drive B, and Drive B becomes Drive A under DOS.

Floppy Drive Seek

If the <Floppy Drive Seek> item is setting Enabled, the BIOS will seek the floppy <A> drive one time upon bootup.

Mouse Support

The setting of Enabled allows the system to detect a PS/2 mouse on bootup. If detected, IRQ12 will be used for the PS/2 mouse. IRQ 12 will be reserved for expansion cards if a PS/2 mouse is not detected. Disabled will reserve IRQ12 for expansion cards and therefore the PS/2 mouse will not function.

Typematic Rate

This item specifies the speed at which a keyboard keystroke is repeated.

7-3

System Keyboard

This function specifies that a keyboard is attached to the computer.

Primary Display

The option is used to set the type of video display card installed in the system.

Password Check

This option enables password checking every time the computer is powered on or every time the BIOS Setup is executed. If Always is chosen, a user password prompt appears every time the computer is turned on. If Setup is chosen, the password prompt appears if the BIOS executed.

Wait for ‘ F1’ If Error

AMIBIOS POST error messages are followed by:

Press <F1> to continue

If this option is set to Disabled, the AMIBIOS does not wait for you to press the <F1> key after an error message.

Hit ‘ DEL’ Message Display

Set this option to Disabled to prevent the message as follows:

Hit ‘DEL’ if you want to run setup

It will prevent the message from appearing on the first BIOS screen when the computer boots.

Internal Cache

This option specifies the caching algorithm used for L1 internal cache memory. The settings are:

Setting Description

Disabled Neither L1 internal cache memory on the CPU or L2 secondary cache memory is enabled.

WriteBack Use the write-back caching algorithm.

WriteThru Use the write-through caching algorithm.

Table 7-1 Internal Cache Setting

External Cache

This option specifies the caching algorithm used for L2 secondary (external) cache memory. The settings are:

Setting Description

Disabled Neither L1 internal cache memory on the CPU or L2 secondary cache memory is enabled.

WriteBack Use the write-back caching algorithm.

WriteThru Use the write-through caching algorithm.

Table 7-2 External Cache Setting

System BIOS Cacheable

When this option is set to Enabled, the contents of the F0000h system memory segment can be read from or written to L2 secondary cache memory. The contents of the F0000h memory segment are always copied from the

BIOS ROM to system RAM for faster execution.

The settings are Enabled or Disabled. The Optimal default setting is Enabled. The Fail-Safe default setting is

Disabled.

7-4

Shadow

These options control the location of the contents of the 32KB of ROM beginning at the specified memory location.

If no adapter ROM is using the named ROM area, this area is made available to the local bus. The settings are:

SETTING DESCRIPTION

Disabled The video ROM is not copied to RAM. The contents of the video ROM cannot be read from or written to cache memory.

Enabled The contents of C000h - C7FFFh are written to the same address in system memory (RAM) for faster execution.

Cached The contents of the named ROM area are written to the same address in system memory (RAM) for faster execution, if an adapter ROM will be using the named

ROM area. Also, the contents of the RAM area can be read from and written to cache memory.

Table 7-3 Shadow Setting

7-5

7.4 ADVANCED CHIPSET SETUP

This option controls the configuration of the board’ s chipset. Control keys for this screen are the same as for the previous screen.

AMIBIOS SETUP - ADVANCED CHIPSET SETUP


Auto Config Function

AT Bus Clock

DRAM Read Timing

DRAM Write Timing

Memory Parity Check

DRAM Hidden Refresh

DRAM Refresh Period Setting

Memory Hole At 15-16M

ISA I/O Recovery

ISA I/O Recovery time

Enabled

CLK/4

Normal

Normal

Disabled

Enabled

60us

Disabled

Disabled

1.5us

Available Options :

Disabled

Enabled

PgUp/PgDn:Modify

F2/F3:Color

Figure 7-4 BIOS: Advanced Chipset Setup

Automatic Configuration

If selecting a certain setting for one BIOS Setup option determines the settings for one or more other BIOS Setup options, the BIOS automatically assigns the dependent settings and does not permit the end user to modify these settings unless the setting for the parent option is changed. Invalid options are grayed and cannot be selected.

AT Bus Clock

This option sets the polling clock speed of ISA Bus (PC/104).

NOTE: 1. PCLK means the CPU inputs clock.

2. Acrosser recommends user setting at the range of 8MHz to 10MHz.

Memory Parity Check

This option Enables or Disables parity is error checking for all system RAM. This option must be Disabled if the used DRAM SIMMs are 32-bit but not 36-bit devices.

Memory Hole at 15-16 M

This option specifies the range 15MB to 16MB in memory that cannot be addressed on the ISA bus.

ISA I/O Recovery

ISA I/O Recovery Time

These options specify the length of the delay (in BUSCLK) inserted between consecutive 8-bit/16-bit I/O operations.

7-6

7.5 PERIPHERAL SETUP

This section is used to configure peripheral features.

AMIBIOS SETUP - PERIPHERAL SETUP


OnBoard FDC

OnBoard Serial Port1

OnBoard Serial Port1 IRQ

OnBoard Serial Port2

OnBoard Serial Port2 IRQ

OnBoard Parallel Port

Parallel Port Mode

EPP Version

Parallel Port IRQ

Parallel Port DMA Channel

OnBoard PCI IDE

Enabled

3F8

4

2F8

3

378

Normal

N/A

7

N/A

Both

Available Options :

Auto

Disabled

Enabled

PgUp/PgDn:Modify

F2/F3:Color

Figure 7-5 BIOS: Peripheral Setup

OnBoard FDC

This option enables the floppy drive controller on the AR-B1462.

OnBoard Serial Port

This option enables the serial port on the AR-B1462.

OnBoard Parallel Port

This option enables the parallel port on the AR-B1462.

Parallel Port Mode

This option specifies the parallel port mode. ECP and EPP are both bidirectional data transfer schemes that adhere to the IEEE P1284 specifications.

Parallel Port DMA Channel

This option is only available if the setting for the parallel Port Mode option is ECP.

OnBoard PCI IDE/IDE Prefetch

This option specifies the onboard IDE controller channels that will be used.

7.6 AUTO-DETECT HARD DISKS

This option detects the parameters of an IDE hard disk drive, and automatically enters them into the Standard

CMOS Setup screen.

7.7 PASSWORD SETTING

This BIOS Setup has an optional password feature. The system can be configured so that all users must enter a password every time the system boots or when BIOS Setup is executed. User can set either a Supervisor password or a User password.

7-7

7.7.1 Setting Password

Select the appropriate password icon (Supervisor or User) from the Security section of the BIOS Setup main menu.

Enter the password and press [Enter]. The screen does not display the characters entered. After the new password is entered, retype the new password as prompted and press [Enter].

If the password confirmation is incorrect, an error message appears. If the new password is entered without error, press [Esc] to return to the BIOS Main Menu. The password is stored in CMOS RAM after BIOS completes. The next time the system boots, you are prompted for the password function is present and is enabled.

Enter new supervisor password:

7.7.2 Password Checking

The password check option is enabled in Advanced Setup by choosing either Always (the password prompt appears every time the system is powered on) or Setup (the password prompt appears only when BIOS is run).

The password is stored in CMOS RAM. User can enter a password by typing on the keyboard. As user select

Supervisor or User. The BIOS prompts for a password, user must set the Supervisor password before user can set the User password. Enter 1-6 character as password. The password does not appear on the screen when typed. Make sure you write it down.

7.8 LOAD DEFAULT SETTING

In this section permit user to select a group of setting for all BIOS Setup options. Not only can you use these items to quickly set system configuration parameters, you can choose a group of settings that have a better chance of working when the system is having configuration related problems.

7.8.1 Auto Configuration with Optimal Setting

User can load the optimal default settings for the BIOS. The Optimal default settings are best-case values that should optimize system performance. If CMOS RAM is corrupted, the optimal settings are loaded automatically.

Load high performance settings (Y/N) ?

7.8.2 Auto Configuration with Fail Safe Setting

User can load the Fail-Safe BIOS Setup option settings by selecting the Fail-Safe item from the Default section of the BIOS Setup main menu.

The Fail-Safe settings provide far from optimal system performance, but are the most stable settings. Use this option as a diagnostic aid if the system is behaving erratically.

Load failsafe settings (Y/N) ?

7.9 BIOS EXIT

This section is used to exit the BIOS main menu in two types situation. After making your changes, you can either save them or exit the BIOS menu and without saving the new values.

7.9.1 Save Settings and Exit

This item set in the <Standard CMOS Setup>, <Advanced CMOS Setup>, <Advanced Chipset Setup> and the new password (if it has been changed) will be stored in the CMOS. The CMOS checksum is calculated and written into the CMOS.

As you select this function, the following message will appear at the center of the screen to assist you to save data to CMOS and Exit the Setup.

Save current settings and exit (Y/N) ?

7-8

7.9.2 Exit Without Saving

When you select this option, the following message will appear at the center of the screen to help to Abandon all

Data and Exit Setup.

Quit without saving (Y/N) ?

7.10 BIOS UPDATE

The BIOS program instructions are contained within computer chips called FLASH ROMs that are located on your system board. The chips can be electronically reprogrammed, allowing you to upgrade your BIOS firmware without removing and installing chips.

The AR-B1462 BIOS provides a menu-based interface to the console subsystem. The console subsystem contains special software, called firmware that interacts directly with the hardware components and facilitates interaction between the system hardware and the operating system.

The AR-B1462 provides FLASH BIOS update function for you to easily upgrade newer BIOS version. Please follow the operating steps for updating new BIOS:

Step 1: Insert the FLASH BIOS diskette into the floppy disk drive.

Step 2: Turn on your system and press [Ctrl]+[Home[ (Hit the [Ctrl] key and [Home] key simultaneously just powered on. Then the onboard BIOS will read new BIOS file named and AMIBOOT.ROM from floppy drive and write to FLASH.

Step 3: If all steps is correctly, the system will reboot. But the system did not boot up, please check everything and try again. If still not work, please contact your Acrosser distributor for technology supports at once.

NOTE: 1. After turn on the computer and the system didn’ t detect the boot procedure, please press the

[Ctrl]+[Home] key immediately. The system will detect the BIOS file from floppy drive.

2. The BIOS Flash disk is not the standard accessory. It supports to add some functions, if it is necessary to update in the future. User can download the suitable BIOS. The address is as follows: http:\\www.acrosser.com

7-9

8. SPECIFICATIONS & SSD TYPES SUPPORTED

8.1 SPECIFICATIONS

CPU:

Chipset:

Bus Interface:

RAM Memory:

Supports25 to 133 Mhz Intel / AMD / Cyrix / ST / IBM 486 CPU .

ALI M1489/M1487 and C & T 65545

ISA (PC/AT) and non-stack through PC/104 bus

Supports FPM/EDO RAM, 72 MB maximum (8MB on-board and one 72-pin SIMMs w/o DRAM)

Cache Size: 512KB for standard

VGA/LCD Display: AR-B1462: 1 MB VRAM (PCI bus, 1024X768/256 colors)

HDC:

ARB1462A: 2 MB VRAM (PCI bus, 1024X768/256 colors)

One PCI IDE Supports LBA/Block mode access

FDC:

Parallel Port:

Supports two 5.25” or 3.5” floppy disk drives

1 bi-directional centronics type parallel port

Supports SPP/EPP/ECP mode

1 RS-232C and 1 RS-232C/RS-485 Serial Port:

Keyboard:

Watchdog:

Speaker:

PC/AT compatible keyboard

Programmable watchdog timer 3 to 42 seconds time interval

On-board Buzzer and external speaker

Real Time Clock: BQ3287MT or compatible chips with 128 bytes data RAM

BIOS:

Flash Disk:

AMI Flash BIOS (128KB, including VGA BIOS)

Supports 1 DiskOnChip socket

BUS Drive Cap.: 15 TTL level loads maximum

CE Design-In: Add EMI components to COM ports, parallel port, CRT, keyboard, and PS/2 mouse

Indicator:

Power Req.:

Power LED, and watchdog LED

+5V only, 2.0A maximum (base on Intel DX4-100)

PC Board:

Dimensions:

8 layers, EMI considered

185 mmX122mm (7.29”X4.80”)

8.2 SSD TYPES SUPPORTED

The following list contains SRAMs supported by the AR-B1462:

AKM

HITACHI

NEC

SONY

HITACHI

NEC

SONY

AKM628128

HM628128

UPD431000A

CXK581000P/M

HM628512

UPD434000

CXK584000P/M

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

The following list contains large page 5V FLASHs supported by the AR-B1462:

AMD

AMD

AMD

AMD

Am29F512

Am29F010

Am29F020

Am29F040

(64Kx8, 512K bits)

(128Kx8, 1M bits)

(256Kx8, 2M bits)

(512Kx8, 4M bits)

The following list contains small page 5V FLASHs supported by the AR-B1462:

ATMEL

SST

ATMEL

AT29C512

PH29EE512

AT29C010

(64Kx8, 512K bits)

(64Kx8, 512K bits)

(128Kx8, 1M bits)

8-1

8-2

SST

SST

SST

WINBOND

ATMEL

ATMEL

ATMEL

SST

28EE010

28EE011

PH29EE010

W29EE011

AT29C020

AT29C040

AT29C040A

PH28SF040

The following list contains EPROMs supported by the AR-B1462:

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(256Kx8, 2M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

AMD

ATMEL

FUJITSHU

HITACHI

INTEL

MITSHUBISHI

NEC

NS

SGS-THOMSON

TI

TOSHIBA

AMD

ATMEL

FUJITSU

HITACHI

INTEL

MITSHUBISHI

NEC

NS

SGS-THOMSON

TI

TOSHIBA

Am27C010

AT27C010

MBM27C1001

HN27C101

D27C010

M5M27C101

D27C1001

NM27C010

M27C1001

TMS27C010

TCS711000

Am27C020

AT27C020

MBM27C2001

HN27C201

D27C020

M5M27C201

D27C2001

NM27C020

M27C2001

TMS27C020

TCS712000

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(128Kx8, 1M bits)

(256Kx8, 2M bits)

(256Kx8, 2M bits)

(256Kx8, 2M bits)

(256Kx8, 2M bits)

(256Kx8, 2M bits)

(256Kx8, 2M bits)

(256Kx8, 2M bits)

(256Kx8, 2M bits)

(256Kx8, 2M bits)

(256Kx8, 2M bits)

(256Kx8, 2M bits)

AMD

ATMEL

FUJITSU

HITACHI

INTEL

MITSUBISHI

NEC

NS

SGS-THOMSON

TI

TOSHIBA

ATMEL

Am27C040

AT27C040

MBM27C4001

HN27C401

D27C040

M5M27C401

D27C4001

NM27C040

M27C4001

TMS27C040

TCS714000

AT27C080

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(512Kx8, 4M bits)

(1Mx8, 8M bits)

9. PLACEMENT & DIMENSIONS

9.1 PLACEMENT

1

H3

1

H7

JP10 JP11

J1

50

51

50

51

CN13

LED1

H4

2

1

JP1

U6

U11

U28

1

CN2

U8

1

2

3

A B C

J8

JP4

104

CN1

12

81

CN3

GND

LED2

5

LM1

8

6

4

2

H5

51

50

U7

100

1

31

JP3

2

1

JP2

1

2

1

81

J3

3

2

1

A B C

3

2

1

A B C

H35

51

50

U18

SW1

J4

31

100

1

81

100

1

U26

51

50

31

3

2

1

A B C

3

2

1

A B C

CN11

U34

H9

CN10

1

JP5

J9

CN12

H10

J10 CN14 CN15

CN4

J5

U17

U20

U27

U30

CN16

LED3

J6 J7

CN5

J2

3

2

1

M5

A B C

CN8

H6

CN6

CN7

CN9

9-1

9.2 DIMENSIONS

200

1600

8−∅138

4700

3975 2900

200

3875

145

3825 3150

7600

8000

Unit: mil (1 inch = 25.4 mm = 1000 mil)

9-2

10. PROGRAMMING RS-485 & INDEX

10.1 PROGRAMMING RS-485

The majority communicative operation of the RS-485 is in the same of the RS-232. When the RS-485 proceeds the transmission which needs control the TXC signal, and the installing steps are as follows:

Step 1: Enable TXC

Step 2: Send out data

Step 3: Waiting for data empty

Step 4: Disable TXC

NOTE: Please refer to the section of the “Serial Port” in the chapter “System Control” for the detail description of the COM port’ s register.

(1) Initialize COM port

Step 1: Initialize COM port in the receiver interrupt mode, and /or transmitter interrupt mode. (All of the communication protocol buses of the RS-485 are in the same.)

Step 2: Disable TXC (transmitter control), the bit 0 of the address of offset+4 just sets “0”.

NOTE: Control the AR-B1462 CPU card’ s DTR signal to the RS-485’ s TXC communication.

(2) Send out one character (Transmit)

Step 1: Enable TXC signal, and the bit 0 of the address of offset+4 just sets “1”.

Step 2: Send out the data. (Write this character to the offset+0 of the current COM port address)

Step 3: Wait for the buffer’ s data empty. Check transmitter holding register (THRE, bit 5 of the address of offset+5), and transmitter shift register (TSRE, bit 6 of the address of offset+5) are all sets must be

“0”.

Step 4: Disabled TXC signal, and the bit 0 of the address of offset+4 sets “0”

(3) Send out one block data (Transmit – the data more than two characters)

Step 1: Enable TXC signal, and the bit 0 of the address of offset+4 just sets “1”.

Step 2: Send out the data. (Write all data to the offset+0 of the current COM port address)

Step 3: Wait for the buffer’ s data empty. Check transmitter holding register (THRE, bit 5 of the address of offset+5), and transmitter shift register (TSRE, bit 6 of the address of offset+5) are all sets must be

“0”.

Step 4: Disabled TXC signal, and the bit 0 of the address of offset+4 sets “0”

(4) Receive data

The RS-485’ s operation of receiving data is in the same of the RS-232’ s.

10-1

(5) Basic Language Example

a.) Initial 86C450 UART

50

60

70

80

10

20

30

40

10

20

30

40

OPEN “COM1:9600,m,8,1”AS #1 LEN=1

REM Reset DTR

OUT &H3FC, (INP(%H3FC) AND &HFA)

RETURN b.) Send out one character to COM1

50

60

70

80

90

10

20

30

40

REM Enable transmitter by setting DTR ON

OUT &H3FC, (INP(&H3FC) OR &H01)

REM Send out one character

PRINT #1, OUTCHR$

REM Check transmitter holding register and shift register

IF ((INP(&H3FD) AND &H60) >0) THEN 60

REM Disable transmitter by resetting DTR

OUT &H3FC, (INP(&H3FC) AND &HEF)

RETURN c.) Receive one character from COM1

REM Check COM1: receiver buffer

IF LOF(1)<256 THEN 70

REM Receiver buffer is empty

INPSTR$”

RETURN

REM Read one character from COM1: buffer

INPSTR$=INPUT$(1,#1)

RETURN

10-2

10.2 INDEX

JP8

JP9

JP10

JP11

JP12

M1~ M4

M5

LM1

JP1

JP2

JP3

JP4

JP5

JP6

JP7

CN7

CN8

CN9

CN10

CN11

CN12

CN13

CN14

Name

CN1

CN2

CN3

CN4

CN5

CN6

Function

120-pin PCI connector

AUI connector

CPU cooling fan power connector

RS-232 connector

40-pin hard disk (IDE) connector

4-pin power connector

44-pin hard disk (IDE) connector

FDD port connector

Parallel port connector

26-pin audio connector

64-pin PC/104 connector bus A & B

40-pin PC/104 connector bus C & D

CRT connector

LCD panel display connector

CN15

CN16

RS-485/RS-422 connector

TTL connector

SIMM1~ SIMM2 Socket for DRAM SIMMs

J1 8-pin power connector

J2

J3

J4

J5

Touch screen connector

Network 4-pin connector

Keyboard connector

PS/2 mouse connector

J6

J7

J8

J9

J10

LED1

LED2

LED3

Reset header

Keyboard lock header

External battery connector

External speaker header

LCD control connector

+3.3V power LED

Watchdog LED

+5V LED

M6

SW1

LED header

PCI connector power select

PS/2 mouse IRQ12 setting

CPU base clock select

PCI clock select

DENAVEE & DVEE signal select

DE/E signal from M or LP select

DiskOnChip memory address setting

Memory type setting

Battery charger select

Cache RAM select

AMD 3X/4X CPU select

LCD voltage select

Memory type setting

COM-A RS-485/RS-422 adapter select

Terminal select

CPU logic core voltage select

COM-B RS232/RS-485 Select

Switch Select

Watchdog I/O Port Address Select

3-9

3-10

3-16

3-11

4-4

3-17

3-11

3-12

3-12

3-11

3-13

3-11

4-4

3-3

3-2

3-4

3-13

3-5

3-5

4-1

4-4

Page

3-15

3-17

3-15

3-10

3-3

3-12

6-6

3-13

3-16

3-14

4-4

6-6

3-7

3-7

3-7

3-15

3-12

3-14

3-14

4-4

4-4

6-13

3-14

3-8

6-2

5-10

10-3

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