Acrosser Technology AR-B8170L Industrial Computing Owner's Manual

AR-B8170L Board
ISA CPU card with DM&P CPU Vortex86DX
User Manual
1
Copyright
All Rights Reserved.
Manual’s first edition:
For the purpose of improving reliability, design and function, the information in this document is
subject to change without prior notice and does not represent a commitment on the part of the
manufacturer.
In no event will the manufacturer be liable for direct, indirect, special, incidental, or consequential
damages arising out of the use or inability to use the product or documentation, even if advised of
the possibility of such damages.
This document contains proprietary information protected by copyright. All rights are reserved. No
part of this Manual may be reproduced by any mechanical, electronic, or other means in any form
without prior written permission of the manufacturer.
Trademarks
AR-B8170L is a registered trademarks of Acrosser; IBM PC is a registered trademark of the
International Business Machines Corporation; Pentium is a registered trademark of Intel
Technologies Inc; Award is a registered trademark of Award Software International Inc; other
product names mentioned herein are used for identification purposes only and may be trademarks
and/or registered trademarks of their respective companies.
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Table of Contents
1 Introduction .......................................................................................... 4
1.1 Specifications ................................................................................................. 4
1.2 Package Contents ........................................................................................... 5
1.3 Block Diagram ................................................................................................. 5
2 H/W Information.................................................................................... 6
2.1 Locations (Top side)....................................................................................... 6
2.2 Connectors and Jumper Setting ................................................................... 7
2.3 Connector and Jumper Setting Table ........................................................... 8
3 BIos Setting ........................................................................................ 10
3.1 Main Setup..................................................................................................... 11
3.2 Advanced Setup............................................................................................ 12
3.3 PCIPnP........................................................................................................... 16
3.4 Boot................................................................................................................ 19
3.5 Security.......................................................................................................... 21
3.6 Chipset Setup................................................................................................ 22
3.7 Exit ................................................................................................................. 25
4 BIOS REFRESHING, WATCHDOG AND GPIO PROGRAMMING .... 26
4.1 BIOS Refreshing ........................................................................................... 26
4.2 WATCHDOG Programming .......................................................................... 26
4.3 GPIO Programming ...................................................................................... 28
5 ELECTRICAL CHARACTERISTICS ................................................... 33
5.1 Basic Electrical Characteristics Table ........................................................ 33
3
1
INTRODUCTION
AR-B8170L is the cost effective version of AR-B8170. It means that AR-B8170L removes some
functions to meet the cost down issue. AR-B8170L is also based on a DM&P Vortex86DX chip and
ISA interface. Vortex86DX 800MHz CPU processes with L2 256KB cache and floating point unit
ability. It equips 256MB DDR2 333MHz onboard memory.
AR-B8170L removes SD socket, RJ45 and SRAM. AR-B8170L retains 1 x IDE connector
(40-pin), 1 x FDD connector, 4 x USB 2.0, 1 x RS-232, 1 x RS-232/422/485, 1 x VGA, 16-bit GPIO
and 1 x PS/2 connector.
AR-B8170L uses XGI Z9s 2D Graphic Core with 64MB graphic memory, supports
1600x1200@32bit resolution display. It can completely satisfy your application need.
1.1Specifications











AR-B8170L, ISA bus CPU card with DM&P CPU Vortex86DX.
Onboard Fanless DM&P Vortex86DX 800MHz / L1 32KB, L2: 256KB included in CPU.
AMI BIOS Core-8 / On chip SPI Flash 2MBits built-in.
Default Onboard DDR2 256MB (128Mb*8*2) support DDR2 clock up to 333MHz.
Interfaces with 4 through holes, follow AR-B1479A.
XGI Z9s Display Chipset / Video Memory: 64MB (max up to 64MB) / CRT: Up to
1600x1200@32bits.
RS-232 port: COM1: RS-232, COM2: RS-232/422/485 (internal) / 1 x LPT port (Internal) / 4 x
USB2.0 port (4 x internal).
Enhanced IDE interface x1 (Ultra DMA 100/66/33) (Default: Secondary IDE*) / Supports
UltraDMA 33/66/100 for 40-pin connector.
1 x 3.5” Floppy driver connector (internal pin header connector).
GPIO: 16 bits. Use GPIO_P0 & GPIO_P1 with interrupt support (input / output). Group to 2 x
pin header connectors (GPIO1, GPIO2).
RTC / Watchdog: Software programmable from 1~256 seconds.
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1.2 Package Contents
Check if the following items are included in the package.



1 x AR-B8170L
1 x Quick User Guide
1 x Software Utility CD
1.3Block Diagram
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2
H/W INFORMATION
This chapter describes the installation of AR-B8170L. At first, it shows the function diagram
and the layout of AR-B8170L. It then describes the unpacking information which you should
understand, as well as the jumper/switch settings for the AR-B8170L configuration
2.1 Locations (Top side)
FDD1
FLOPPY CONNECTOR
U1
CPU Vortex DX 800MHz
U17
GPU XGI z9s
IDE1
39PIN IDE CONNECTOR
LPT1
PRINTER PORT
U18
GPU DDR2 64MB
U31 (Optional)
SUPER IO W83697HG
BZ1
BUZZER
VGA1
VGA DB15 CONNECTOR
U2, U3
CPU DDR2 128MBX2
COM1
RS232 DB9 CONNECTOR
KM1
Keyboard/Mouse CONNECTOR
BAT3
BATTERY for RTC/SRAM
U19
VGA SPI FLASH 512KB
ISA1
ISA BUS
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2.2 Connectors and Jumper Setting
2.2.1 Locations (Top side)
CN8
Reserved
COM2
RS232 CONNECTOR
CN1
USB 0/1 CONNECTOR
LED1/LED2
SYSTEM STATUS LED
JP2
Clear CMOS DATA
CN2
USB 2/3 CONNECTOR
JP1
RS232/422/485 SELECTION
RST_BTN1 (Optional)
Reserved
GPIO1
GPIO 0/1 CONNECTOR
JP3
RS422/485 TERMINATION
SELECTION
CN3
Reserved
CN7
RS422/485 CONNECTOR
PWR1
POWER INPUT
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2.3 Connector and Jumper Setting Table
2.1 CN8
2.2 LED1/LED2
Reserved
LED1
LED2
2.3 JP1
FUNCTION
POWER LED
IDE/SD LED
2.4 JP3
JUMPER
1-2 (default)
FUNCTION
RS232
JUMPER
3-4
RS422
1-2
5-6
RS485
2.5 CN7
FUNCTION
RS422/485
TERMINATION
ENABLE
2.6 COM2
PIN
1
2
3
4
FUNCTION
485D+_422TX+
485D-_422TX422RX+
422RX-
8
PIN
FUNCTION
PIN
FUNCTION
1
3
5
7
9
DCD
RXD
TXD
DTR
GND
2
4
6
8
10
DSR
RTS
CTS
RI
X
2.7 JP2
2.8 RST_BTN1 (OPTION)
JUMPER
1-2(default)
2-3
FUNCTION
NORMAL
Clear CMOS
Reserved
2.9 CN3
2.10 PWR1
PIN
1
2
3
4
Reserved
2.11-12 CN1/CN2
PIN
1
3
5
7
9
FUNCTION
+12V
GND
GND
+5V
2.13 GPIO1
FUNCTION
VCC
D0D0+
GND
GND
PIN
2
4
6
8
10
PIN
1
3
5
7
9
11
13
15
17
19
FUNCTION
VCC
D1D1+
GND
GND
9
FUNCTION
GPIO00
GPIO01
GPIO02
GPIO03
GND
GPIO10
GPIO11
GPIO12
GPIO13
GND
PIN
2
4
6
8
10
12
14
16
18
20
FUNCTION
VCC
GPIO07
GPIO06
GPIO05
GPIO04
VCC
GPIO17
GPIO16
GPIO15
GPIO14
3
BIOS SETTING
This chapter describes the BIOS menu displays and explains how to perform common tasks
needed to get the system up. It also gives detailed explanation of the elements found in each of the
BIOS menus. The following topics are covered:






Main Setup
Advanced Setup
PCIPnP Setup
Boot Setup
Security Setup
Chipset Setup
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3.1 Main Setup
3.1.1 AMI BIOS
This is the interface of AMI BIOS:
3.1.2 Processor
This part shows the auto-detected CPU specification. DM&P Semiconductor is the
Vortex86DX 32-Bit Microprocessor, DDR2 128MB onboard, which is based on x86 structure. It is
the x86 SoC (System on Chip) with 0.13 micron process and ultra low power consumption design
(less than 1 watt)The CPU on the Vortex86DX is a high performance and fully static 32-bit X86
processor with the compatibility of Windows based, Linux and most popular 32-bit RTOS.
3.1.3 System Memory
This part shows the auto-detected system memory. The Vortex86DX is a high performance
with 256MB RAM and speed 133MHz onboard and fully static 32-bit x86 processor, which is
compatible with DOS and Linux. It integrates 32KB write through direct map L1 cache, PCI Rev.
2.1 32-bit bus interface at 33 MHz, SDRAM, DDR2, ROM controller, IPC (Internal Peripheral
Controllers with DMA and interrupt timer/counter included), Fast Ethernet MAC, FIFO UART,
USB2.0 Host and IDE controller into a System-on-Chip (SoC) design. The Vortex86DX are all
256MB onboard and the speed is 133MHz.
3.1.4 System Time:
The time format is based on the 24-hour military time clock. Press the “+” or “–“ key to
increment the setting or type the desired value into the field.
3.1.5 System Date:
Press the “+” or ” –“ to set the date you wanted. The BIOS determines the day of the week
from the other date information; this field is for information only.
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3.2 Advanced Setup
3.2.1 IDE Configuration
OnBoard PCI IDE Controller
This can select the specification you wanted for the IDE device. This option specifies the channel
used by IDE controller on the motherboard,
Option
Description
Disabled Set this value to prevent the computer system from using the onboard IDE controller.
Primary
Set this value to allow the computer system to detect only the Primary IDE channel.
This includes both the Primary Master and the Primary Slave.
Secondary
Set this value to allow the computer system to detect only the Secondary IDE channel.
This includes both the Secondary Master and the Secondary Slave.
Both
Set this value to allow the computer system to detect the Primary and Secondary IDE
channels.
This includes the Primary Master, Primary Slave, Secondary Master, and Secondary
Slave. This is the default setting.
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Primary and Secondary IDE Master/Slave
When you entered the IDE devices, the bios will auto-detected and show the detail information of
IDE devices. If you want to change IDE configuration, select the item and press the “Enter” to
configure the item you wanted.
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3.2.2 Floppy A’ B
Select the correct specifications for the diskette drive(s) installed in the computer.
Disabled: No diskette drive installed
360KB 5 1/4: 5.25 in5-1/4 inch PC-type standard drive
1.2MB 5 1/4: 5.25 in5-1/4 inch AT-type high-density drive
720KB 3 1/2: 3.5 in3-1/2 inch double-sided drive
1.44MB 3 1/2: 3.5 in3-1/2 inch double-sided drive
2.88MB 3 1/2: 3.5 in 3-1/2 inch double-sided drive
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3.2.3 SuperIO Configuration
You can use this screen to select options for the Super I/O settings. Use the up and down
<Arrow> keys to select an item. Use the <Plus> and <Minus> keys to change the value of the
selected option. The settings are described on the following pages. The screen is shown below.
Onboard Floppy Controller
This item specifies the Floppy used by the onboard Floppy controller. The settings are Disabled or
Enabled.
Floppy Drive Swap
This option allows you to Enabled or Disabled the Floppy Drive Swap.
3.2.4 USB Configuration
USB Functions
Set this value to allow the system to enable or disable the onboard USB ports. The Optimal and
Fail-Safe default setting is Enabled.
Option
Description
Disabled This setting makes the onboard USB ports unavailable.
Enabled This setting allows the use of the USB PORTS. This is the default setting.
Legacy USB Support
Legacy USB Support refers to the USB mouse and USB keyboard support. Normally if this option
is not enabled, any attached USB mouse or USB keyboard will not become available until a USB
compatible operating system is fully booted with all USB drivers loaded. When this option is
enabled, any attached USB mouse or USB keyboard can control the system even when there is no
USB drivers loaded on the system. Set this value to enable or disable the Legacy USB Support.
The Optimal and Fail-Safe default setting is Disabled.
Option
Description
Set this value to prevent the use of any USB device in DOS or during system
Disabled
boot. This is the default setting.
Enabled Set this value to allow the use of USB devices during boot and while using DOS.
This option auto detects USB Keyboards or Mice and if found, allows them to be
Auto
utilized during boot and while using DOS.
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3.3 PCIPnP
3.3.1 Clear NVRAM
Clear NVRAM during system boot.
3.3.2 PCI Latency Timer
Allow you to select the value in units of PCI clocks for all of the PCI device latency timer
register. Configuration option: 32, 64, 96, 128, 160, 192, 224, 248.
Option
32
64
96
128
160
192
224
248
Description
This option sets the PCI latency to 32 PCI clock cycles.
This option sets the PCI latency to 64 PCI clock cycles. This is the default setting.
This option sets the PCI latency to 96 PCI clock cycles.
This option sets the PCI latency to 128 PCI clock cycles.
This option sets the PCI latency to 160 PCI clock cycles.
This option sets the PCI latency to 192 PCI clock cycles.
This option sets the PCI latency to 224 PCI clock cycles.
This option sets the PCI latency to 248 PCI clock cycles.
Set this value to allow the PCI Latency Timer to be adjusted. This option sets the latency of all
PCI devices on the PCI bus This decides how long a PCI device can hog the PCI bus for , higher
setting , hogs the bus a little longer , lower setting lets go quicker but stuff like some sound card
(PCI of course) will start to crackle , default on this board was default at 64.
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IRQ
This item can select the IRQ with Available or Reserved. And the default of IRQ3, 4 are Reserved
and others are Available. When you set available, the specified IRQ is to be used by a PCI/PnP
device; as you set reserved, the IRQ will reserved for legacy ISA devices.
Interrupt Option
Description
IRQ3
IRQ4
IRQ5
This setting allows the specified IRQ to be used by a PCI/PnP
Available
device. This is the default setting.
IRQ6
IRQ7
IRQ8
IRQ9
IRQ10
IRQ11
This setting allows the specified IRQ to be used by a legacy ISA
IRQ12 Reserved
device.
IRQ13
IRQ14
IRQ15
DMA Channel
This item can select the DMA Channel for Available or Reserved. When set to Available the
specified DMA is available for used by PCI/PnP devices; when set to reserved, the specified DMA
to be used by a legacy ISA device.
DMA Channel Option
Description
DMA Channel 0
This setting allows the specified DMA to be used by PCI/PnP device. It is
DMA Channel 1 Available
default setting.
DMA Channel 3
DMA Channel 5
DMA Channel 6 Reserved This setting allows the specified DMA to be used by a legacy ISA device.
DMA Channel 7
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Reserved Memory Size
Set this value to allow the system to reserve memory that is used by ISA devices. The optimal and
Fail-Safe default setting is Disabled.
Option
Description
Disabled Set this value to prevent BIOS from reserving memory to ISA devices.
16K Set this value to allow the system to reserve 16K of the system memory to the ISA devices.
32K Set this value to allow the system to reserve 32K of the system memory to the ISA devices.
64K Set this value to allow the system to reserve 64K of the system memory to the ISA devices.
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3.4 Boot
The Boot menu items allow you to change the system boot options. Select an item then press
Enter to display the sub-menu.
3.4.1 Boot Settings Configuration
Allow you to configure the system boot setting with bellow submenus.
Quick Boot
Set the value to Enable to allow the BIOS to skip some Power On Self Tests (POST) while booting
to decrease the time needed to boot the system. When you set the value to Disable the BIOS will
performs all the POST items.
Option Description
Disabled Set this value to allow BIOS to perform all POST tests.
Enabled Set this value to allow BIOS to skip certain POST tests to boot faster.
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PS/2 Mouse Support
Set this value to allow the PS/2 mouse support to be adjusted. The Optimal and Fail-Safe default
setting is Enabled.
Option
Disabled
Description
This option will prevent the PS/2 mouse port from using system resources and will
prevent the port from being active. Use this setting if installing a serial mouse.
Enabled Set this value to allow the system to use a PS/2 mouse. This is the default setting.
Hit “DEL” Massage Display
Set this value to allow the Hit “DEL” to enter Setup Message Display to be modified. The Optimal
and Fail-Safe default setting is Enabled.
Option
Description
Disabled
This prevents the export to display Hit Del to enter Setup during memory initialization. If
Quiet Boot is enabled, the Hit 'DEL' message will not display.
Enabled
This allows the export to display Hit Del to enter Setup during memory initialization. This
is the default setting.
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3.5 Security
The Security menu items allow you to change the system security settings. Select an item then
press Enter to display the configuration options.
Supervisor Password
Indicate whether a supervisor password has been set. If the password has been installed,
Installed displays. If not, Not Installed displays.
Change Supervisor Password
Select this option and press <Enter> to access the sub menu. You can use the sub menu to
change the supervisor password. Select Change Supervisor Password from the Security Setup
menu and press <Enter>. Enter New Password: appears. Type the password and press <Enter>.
The screen does not display the characters entered. Retype the password as prompted and press
<Enter>. If the password confirmation is incorrect, an error message appears. The password is
stored in NVRAM.
Change User Password
Select this option and press <Enter> to access the sub menu. You can use the sub menu to
change the user password.
Clear User Password
Select this option and press <Enter> to access the sub menu. You can use the sub menu to clear
the user password. Select Change User Password from the Security Setup menu and press
<Enter>. Enter New Password: appears. Type the password and press <Enter>. The screen does
not display the characters entered. Retype the password as prompted and press <Enter>. If the
password confirmation is incorrect, an error message appears. The password is stored in NVRAM
Clear User Password
Select Clear User Password from the Security Setup menu and press <Enter>. Clear New
Password [Ok] [Cancel] appears. Type the password and press <Enter>. The screen does not
display the characters entered. Retype the password as prompted and press <Enter>. If the
password confirmation is incorrect, an error message appears. The password is stored in NVRAM.
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3.6 Chipset Setup
3.6.1 SouthBridge Configuration
You can use this screen to select options for the South Bridge Configuration. South Bridge is a
chipset on the motherboard that controls the basic I/O functions. Use the up and down. <Arrow>
keys to select an item. Use the <Plus> and <Minus> keys to change the value of the selected
option.
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ISA Configuration
This allows you to set the ISA bus frequency and to select the clock value of I/O and Memory.
Serial/Parallel Port Configuration
These options specify the serial port address and the parallel port mode and select the IRQ of
Serial/Parallel Port.
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Option
Description
Disabled
Set this value to prevent the serial port from accessing any system resources. When this
option is set to disabled, the serial port physically becomes unavailable.
Set this value to allow the serial port to use 3F8 as its I/O port address and IRQ 4 for the
interrupt address. This is the default setting. The majority of serial port 1 or COM1 ports
3F8/IRQ4 on computer systems use IRQ4 and I/O Port 3F8 as the standard setting. The most
common serial device connected to this port is a mouse. If the system will not use a
serial device, it is best to set this port to disabled.
Set this value to allow the serial port to use 2F8 as its I/O port address and IRQ 3 for the
2F8/IRQ3 interrupt address. If the system will not use a serial device, it is best to set this port to
disabled.
Set this value to allow the serial port to use 3E8 as its I/O port address and IRQ 4 for the
3E8/IRQ4 interrupt address. If the system will not use a serial device, it is best to set this port to
disabled.
Set this value to allow the serial port to use 2E8 as its I/O port address and IRQ 3 for the
2E8/IRQ3 interrupt address. If the system will not use a serial device, it is best to set this port to
disabled.
Option
Description
Normal
Set this value to allow the standard parallel port mode to be used. This is the default
setting.
Bi-Directional lSet this value to allow data to be sent to and received from the parallel port.
EPP
The parallel port can be used with devices that adhere to the Enhanced Parallel Port
(EPP) specification. EPP uses the existing parallel port signals to provide
asymmetric bi-directional data transfer driven by the host device.
EPP
The parallel port can be used with devices that adhere to the Extended Capabilities
Port (ECP) specification. ECP uses the DMA protocol to achieve data transfer rates
up to 2.5 Megabits per second. ECP provides symmetric bi-directional
communication.
Option Description
Set this value to allow the serial port to use Interrupt 3.
5
7
Set this value to allow the serial port to use Interrupt 7. This is the default setting. The majority
of parallel ports on computer systems use IRQ7 and I/O Port 378H as the standard setting.
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3.7 Exit
3.7.1 Save Changes and Exit
Once you finished the selections, this option will allow you to determine whether to accept the
modifications or not. Select the “OK” to save the change and exit, if you select “NO”, you will return
to Setup utility.
3.7.2 Discard Change and Exit
Select this option to exit the Setup without saving any change you have made in this session. Press
“OK” will quit the Setup utility without saving any modifications. Press “NO” will return to Setup
utility.
3.7.3 Discard Change
This option allows you to load the default values to your system configuration. These default
settings will save the setup without making any permanent changes to the system configuration.
Discard Changes This option allows you to discard the selections you made and restore the
previously saved value.
3.7.4 Load Optimal Defaults
This option allows you to load the default values to your system configuration. These default
settings are optimal and enable all high performance features.
3.7.5 Load Failsafe Defaults
This option allows you to load the failsafe default values for each of the parameters on the Setup
menus, this will provide the most stable performance setting.
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4
BIOS REFRESHING, WATCHDOG
AND GPIO PROGRAMMING
4.1 BIOS Refreshing
The BIOS program instructions are contained within computer chips called FLASH ROMs that
are located on your system board. The chips can be electronically reprogrammed, allowing you to
update your BIOS firmware without removing and installing chips.
The AR-B8170L provides the FLASH BIOS update function for you to easily to update BIOS.
Please follow these operating steps to update BIOS:
STEP1
You must boot up system into MS-DOS first and please don’t detect files CONFIG.SYS
and AUTOEXEC.BAT.
STEP2
In the MS-DOS mode, you should execute the AMIFLASH program to update BIOS.
STEP3
Follow all messages then you could update BIOS smoothly.
4.2 WATCHDOG Programming
This section describes the usage of WatchDog. AR-B8170L integrated the WatchDog that
enable user to reset the system after a time-out event. User can use a program to enable the
WatchDog and program the timer in range of 1~255 second(s)/minute(s). Once user enables the
WatchDog, the timer will start to count down to zero except trigger the timer by user’s program
continuously. After zeroize the timer (stop triggering), the WatchDog will generate a signal to reset
the system. It can be used to prevent system crash or hang up. The WatchDog is disabled after
reset and should be enabled by user’s program.
Please refer to the following table to program WatchDog properly, and user could test
WatchDog under ‘Debug’ program
WatchDog demo program in Turbo C++ as following:
//===========================================================================
// Turbo C++ Version 3.0 Copyright(c) 1990, 1992 by Borland International,Inc.
//===========================================================================
// Describe : Vortex86DX WatchDog timer test
// Date
: 09/16/2009
// Author : Willy
//===========================================================================
//===========================================================================
// Language include files
//===========================================================================
#include <conio.h>
#include <stdlib.h>
#include <stdio.h>
26
#include <dos.h>
//===========================================================================
// Normal procedure
//===========================================================================
void Show_Help();
//===========================================================================
// Main procedure
//===========================================================================
int main(int argc, char *argv[])
{
unsigned char IO_Port_Address=0x22; // Index Port 22h, Date Port 23h
unsigned char Signal;
unsigned char Time;
unsigned long Timer;
unsigned char Counter0;
unsigned char Counter1;
unsigned char Counter2;
int Temp;
if ( argc != 3 )
{ Show_Help();
return 1;
}
clrscr();
Signal=atoi(argv[1]);
Signal=Signal<<4;
// Signal Set Bits
Time=atoi(argv[2]);
// Watchdog counter
Timer=Time*32768;
Counter0=(unsigned char)Timer;
Counter1=(unsigned char)(Timer>>8);
Counter2=(unsigned char)(Timer>>16);
// Select Watchdog Signal Source
outportb(IO_Port_Address,0x38); // WDT0 signal select
outportb(IO_Port_Address+1,Signal);
// Set Watchdog timer
outportb(IO_Port_Address,0x39); // WDT0 Counter0
outportb(IO_Port_Address+1,Counter0);
outportb(IO_Port_Address,0x3A); // WDT0 Counter1
outportb(IO_Port_Address+1,Counter1);
outportb(IO_Port_Address,0x3B); // WDT0 Counter2
outportb(IO_Port_Address+1,Counter2);
// Set Watchdog Enabled.
outportb(IO_Port_Address,0x37); // WDT0 Enabled Control Reg.
outportb(IO_Port_Address+1,0x40);
textcolor(YELLOW);
for(Temp=Time;Temp>0;Temp--)
{
gotoxy(20,10);
if(Signal==0xD0)
cprintf(">>> After %3d Second will reset the system. <<<",Temp);
else
cprintf(">>> After %3d Second Watchdog Signal will occur. <<<",Temp);
27
delay(1000);
}
textcolor(LIGHTRED);
gotoxy(18,10);
if(Signal==0xD0)
cprintf("If you can see this message, Reset system is Fail");
else
cprintf("If you can see this message, Watchdog Signal is occur.");
return 1;
}
//===========================================================================
// Function : Show_Help()
// Input
:// Change : // Return : // Description : Show Title string.
//===========================================================================
void Show_Help()
{
clrscr();
printf("WatchDog Test for Vortex86DX \n\n");
printf("Signal Select
\n");
printf("1 : IRQ3 2 : IRQ4 4 : IRQ5 \n");
printf("4 : IRQ6 5 : IRQ7 6 : IRQ9 \n");
printf("7 : IRQ10 8 : IRQ11 9 : IRQ12\n");
printf("10: IRQ14 11: IRQ15 12: NMI \n");
printf("13: System Reset
\n\n");
printf("Sample:
\n");
printf("
WDT.EXE 1 10
\n");
printf("For 10 seconds to IRQ3.
\n\n");
printf("
WDT.EXE 13 10
\n");
printf("For 10 seconds to system reset.\n");
}
4.3 GPIO Programming
Data Port
(GPIO0 Base Address 0 Refers to the Register of index 61h-60h, IDSEL = AD18/SB of PCI
Configuration Register)
(GPIO1 Base Address 1 Refers to the Register of index 63h-62h, IDSEL = AD18/SB of PCI
Configuration Register)
(GPIO2 Base Address 2 Refers to the Register of index 65h-64h, IDSEL = AD18/SB of PCI
Configuration Register)
(GPIO3 Base Address 3 Refers to the Register of index 67h-66h, IDSEL = AD18/SB of PCI
Configuration Register)
(GPIO4 Base Address 4 Refers to the Register of index 69h-68h, IDSEL = AD18/SB of PCI
Configuration Register)
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IO Address
BA[0] + 00h
BA[1] + 00h
BA[2] + 00h
BA3 + 00h
BA4 + 00h
Register Name
GPIO PORT0 Data Register
GPIO PORT1 Data Register
GPIO PORT2 Data Register
GPIO PORT3 Data Register
GPIO PORT4 Data Register
Direction Port
(Base Address Refers to the Register of index 6Bh-6Ah, IDSEL = AD18/SB of PCI Configuration
Register)
IO Address
BA + 00h
BA + 01h
BA + 02h
BA + 03h
BA + 04h
BA + 06h
BA + 07h
Register Name
GPIO PORT0 Data Register
GPIO PORT1 Data Register
GPIO PORT2 Data Register
GPIO PORT3 Data Register
GPIO PORT4 Data Register
GPIO PORT1 Interrupt Status Register
GPIO PORT0 Interrupt Status Register
GPIO demo program in Turbo C++ as following:
//===========================================================================
// Turbo C++ Version 3.0 Copyright(c) 1990, 1992 by Borland International,Inc.
//===========================================================================
// Describe : GPIO00~GPIO07 GPIO10~GPIO17 Test utility for Vortex86DX.
// Date
: 09/17/2009
// Author : Willy
//===========================================================================
//===========================================================================
// Language include files
//===========================================================================
#include <conio.h>
#include <stdio.h>
//===========================================================================
// Normal procedure
//===========================================================================
void Show_Help();
void Show_Fail();
void Show_Pass();
//===========================================================================
// Main procedure
//===========================================================================
int main(int argc)
{
char *Model_Name="AR-B8170L";
unsigned char
IO_PORT_BASE=0x22; // DATA_PORT = IO_PORT_BASE + 1;
unsigned char data;
int result=0;
29
if ( argc >1 )
{ Show_Help();
return 1; }
clrscr();
textcolor(WHITE);
gotoxy(1, 1);
cprintf("<>==========================================================================<>");
gotoxy(1, 2); cprintf("|| Vortex86DX GPIO Test Utility v1.0 Acrosser Technology Co., Ltd.
||");
gotoxy(1, 3);
cprintf("<>==========================================================================<>");
gotoxy(1, 4);
cprintf("<>==========================================================================<>");
gotoxy(1, 5); cprintf("|| Model Name :
||");
gotoxy(1, 6); cprintf("|| SIO IO Base :
||");
gotoxy(1, 7);
cprintf("<>==========================================================================<>");
// Show Got Parameter Informat
textcolor(LIGHTGRAY);
gotoxy(18,5); cprintf("%s",Model_Name);
gotoxy(18,6); cprintf("%X",IO_PORT_BASE);
// Set GPIO00~07 to Output
outportb(IO_PORT_BASE,0x4E);
outportb(IO_PORT_BASE+1,0xFF);
// bit=1 , output
// Set GPIO10~GPIO17 to Input
outportb(IO_PORT_BASE,0x4F);
outportb(IO_PORT_BASE+1,0x00); // bit=0 , input
// Set GPIO00~07 to AA
outportb(IO_PORT_BASE,0x47);
outportb(IO_PORT_BASE+1,0xAA);
// Read GPIO10~17 Status, if not AA error.
outportb(IO_PORT_BASE,0x4C);
if(inportb(IO_PORT_BASE+1)!=0xAA)
result=1;
// Set GPIO00~07 to 55
outportb(IO_PORT_BASE,0x47);
outportb(IO_PORT_BASE+1,0x55);
// Read GPIO10~17 Status, if not 55 error.
outportb(IO_PORT_BASE,0x4C);
if(inportb(IO_PORT_BASE+1)!=0x55)
result=2;
// Set GPIO10~GPIO17 to Output
outportb(IO_PORT_BASE,0x4F);
outportb(IO_PORT_BASE+1,0xFF);
// bit=1 , output
// Set GPIO00~07 to Input
outportb(IO_PORT_BASE,0x4E);
outportb(IO_PORT_BASE+1,0x00); // bit=0 , input
// Set GPIO10~17 to AA
outportb(IO_PORT_BASE,0x4D);
outportb(IO_PORT_BASE+1,0xAA);
// Read GPIO00~07 Status, if not AA error.
outportb(IO_PORT_BASE,0x46);
if(inportb(IO_PORT_BASE+1)!=0xAA)
30
result=3;
// Set GPIO10~17 to 55
outportb(IO_PORT_BASE,0x4D);
outportb(IO_PORT_BASE+1,0x55);
// Read GPIO00~07 Status, if not 55 error.
outportb(IO_PORT_BASE,0x46);
if(inportb(IO_PORT_BASE+1)!=0x55)
result=4;
if(result)
Show_Fail();
else
Show_Pass();
return result;
}
//===========================================================================
// Function : Show_Help()
// Input
:// Change : // Return : // Description : Show Title string.
//===========================================================================
void Show_Help()
{
clrscr();
printf("GPIO Test utility for Vortex86DX\n\n");
VCC
printf("GPIO00 迋?
\n");
printf("GPIO01 迋迋?
奼迋迋迋? GPIO07\n");
printf("GPIO02 迋迋迋?
?奼迋迋? GPIO06\n");
printf("GPIO03 迋迋迋迋? ??奼迋? GPIO05\n");
printf("GND
???? ???奼? GPIO04\n");
printf("GPIO10 迋???? ???? VCC \n");
printf("GPIO11 迋迋??? 迋迋迋? GPIO17\n");
printf("GPIO12 迋迋迋??
迋迋? GPIO16\n");
printf("GPIO13 迋迋迋迋?
迋? GPIO15\n");
printf("GND
? GPIO14\n");
}
//===========================================================================
// Function : Show_Fail()
// Input
:// Change : // Return : // Description : Show Fail Message.
//===========================================================================
void Show_Fail()
{
textcolor(LIGHTRED);
gotoxy(20,10); cprintf(" 詗詗詗詗 詗詗詗
詗詗 詗
");
gotoxy(20,11); cprintf(" 詗
詗 詗
詗
詗
");
gotoxy(20,12); cprintf(" 詗詗詗? 詗詗詗詗
詗
詗
");
gotoxy(20,13); cprintf(" 詗
詗
詗
詗
詗
");
gotoxy(20,14); cprintf(" 詗
詗
詗
詗詗 詗詗詗詗");
}
//===========================================================================
// Function : Show_Pass()
// Input
:31
// Change : // Return : // Description : Show Pass Message.
//===========================================================================
void Show_Pass()
{
textcolor(LIGHTGREEN);
gotoxy(20,10); cprintf(" 詗詗詗詗 詗詗詗 詗詗詗詗 詗詗詗詗");
gotoxy(20,11); cprintf(" 詗
詗 詗 詗 詗
詗
");
gotoxy(20,12); cprintf(" 詗詗詗詗 詗詗詗詗 詗詗詗詗 詗詗詗詗");
gotoxy(20,13); cprintf(" 詗
詗
詗
詗
詗");
gotoxy(20,14); cprintf(" 詗
詗
詗 詗詗詗詗 詗詗詗詗");
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5
ELECTRICAL CHARACTERISTICS
5.1 Basic Electrical Characteristics Table
Electrical Characteristics
Symbol
Value
Parameter / Condition
Unit
Min.
Typ.
Max.
TA
Ambient Temperature
0
-
60
℃
Tstg
Storage Temperature
-20
-
80
℃
+12V
External power input for system or +12Vdc power output
11.4
12.0
12.6
V
+5V
+5Vdc power input
4.75
5.0
5.25
V
GPIO VIL
GPIO’s maximum Input LOW voltage
-
0
0.8
V
GPIO VIH
GPIO’s minimum input HIGH voltage
2.5
3.3
-
V
GPIO VOL
GPIO’s typical output LOW voltage
-
-
0.4
V
GPIO VOH
GPIO’s typical output HIGH voltage
2.4
-
-
V
-5V
-5V ISA power input
-5.25
-5
-4.75
V
-12V
-12V ISA power input
-12.6
-12
-11.4
V
33