MICROCHIP MICROCHIP ATSAMA5D4-XULT Evaluation Board Data Sheet
Below you will find brief information for SAMA5D4 Xplained Ultra. This evaluation kit is based on the Atmel SAMA5D4 series ARM-based embedded microprocessor units (eMPUs) and allows users to extensively evaluate, prototype, and create application-specific designs.
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Atmel | SMART SAMA5D4 Series
SAMA5D4 Xplained Ultra Evaluation Kit
USER GUIDE
SMART
Introduction
This user guide introduces the Atmel ® SAMA5D4 Xplained Ultra evaluation kit
(SAMA5D4-XULT) and describes the development and debugging capabilities for applications running on the Atmel | SMART SAMA5D4 ARM ® Cortex ® -A5-based embedded microprocessor unit (eMPU).
Scope
This guide provides details on the SAMA5D4-XULT. It is made up of four main sections:
describes the evaluation kit content and its main features.
provides instructions to power up the SAMA5D4-XULT board.
provides an overview of the SAMA5D4-XULT board.
describes the SAMA5D4-XULT board components.
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
Kit Contents
The SAMA5D4-XULT includes:
Board
One SAMA5D4-XULT board
Cables
One Micro-AB type USB cable
Welcome letter
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Table of Contents
Introduction
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Scope
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Kit Contents
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
Table of Contents
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.
Evaluation Kit Specifications
1.1
1.2
2.
Power Source
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
2.2
3.
Hardware Overview
3.1
3.2
3.3
4.
Board Components
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1
4.2
4.3
4.4
5.
Revision History
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1.
Evaluation Kit Specifications
Table 1-1.
Characteristic
Evaluation Kit Specifications
Specifications
Board
Board supply voltage
Temperature
Relative Humidity
Operating
Storage
SAMA5D4-XULT
USB powered
5VDC from optional jack connector or from “Arduino shield”
0°C to +70°C
-40°C to +85°C
0 to 90% (non-condensing)
Dimensions: Main board
RoHS status
Board Identification
135 × 88 × 20 mm
Compliant
SAMA5D4-XULT
1.1
Electrostatic Warning
WARNING
Electrostatic sensitive device
ESD-Sensitive Electronic Equipment!
The evaluation kit is shipped in a protective anti-static package. The board system must not be subject to high electrostatic potentials.
We strongly recommend using a grounding strap or similar ESD protective device when handling the board in hostile ESD environments (offices with synthetic carpet, for example). Avoid touching the component pins or any other metallic element on the board.
1.2
Power Supply Warning
WARNING
Hardware Power Supply Limitation
Using a power adapter greater than 5Vcc (e.g., the 12Vcc power adapters from other kits such as Arduino kits) may damage the board.
WARNING
Hardware Power Budget
Using the USB as the main power source (max. 500 mA) is acceptable only with the use of the on-board peripherals and low-power LCD extension.
When external peripheral or add-on boards need to be powered, we recommend the use of an external power adapter connected to the J4 DC jack (can provide up to 1.2A on the 3.3V node).
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2.
Power Source
Several options are available to power up the SAMA5D4-XULT board.
The board can be:
USB-powered through the USB Micro-AB connector (J11 - default configuration).
Powered through an external AC-to-DC adapter connected via a 2.1 mm center-positive plug into the optional power jack of the board (J4). The recommended output voltage range of the power adapter is 5V at
2A.
Powered through the Arduino shield.
Powered through the USB Micro-AB connector on the Atmel Embedded Debugger (EDBG) interface (J20).
WARNING
Unlike Arduino Uno boards, the SAMA5D4-XULT board runs at 3.3V. The maximum voltage that the I/O pins can tolerate is 3.3V. Providing higher voltages (e.g., 5V) to an I/O pin could damage the board.
2.1
Power up the Board
Unpack the board, taking care to avoid electrostatic discharge. Connect the USB Micro-AB cable to the connector
(J11). Then connect the other end of the cable to a free USB port of your PC.
Table 2-1.
Electrical Characteristics
Electrical Parameter
Input voltage
Maximum Input voltage (limits)
Max DC 3v3 current available
I/O Voltage
Values
5 VCC
6 VCC
1.2A
3.3V only
2.2
Sample Code and Technical Support
After boot up, you can run some sample code or your own application on the development kit. You can download sample code and get technical support from the Atmel website .
Linux software and demos can be found on the website Linux4SAM .
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3.
Hardware Overview
3.1
Introduction
The Atmel SAMA5D4-XULT is a fully-featured evaluation platform for the Atmel SAMA5D4 series ARM-based embedded microprocessor units (eMPU). It allows users to extensively evaluate, prototype and create applicationspecific designs.
3.2
Equipment List
The SAMA5D4-XULT board is based on the integration of an ARM Cortex-A5-based microprocessor with external memory, one Ethernet physical layer transceiver, two SD/MMC interfaces, two host USB ports and one device
USB port, one 24-bit RGB LCD and HDMI interface and debug interfaces.
Seven headers, compatible with Arduino R3 (Uno, Due) and two Xplained headers are available for various shield connections.
3.3
Board Features
Table 3-1.
Board Specifications
Characteristics Specifications
Dimensions (L x W x H) 135 × 88 × 20 mm
Processor
Oscillators
SAMA5D44 (361-ball BGA package), 16x16 mm body, pitch 0.8 mm
MPU, EDBG: 12 MHz quartz
RTC: 32.768 kHz
PHY: 25 MHz
Main Memory
Accessory memories
SD/MMC
USB
2 x DDR2 2 Gb 16 Meg x 16 x 8 banks (total 4 Gbit = 512 MB)
1 x SLC NAND Flash 4 Gb 8-bit data (total 4 Gbit = 512 MB)
One optional Serial EEPROM SPI
One EEPROM with Mac Address and Serial Number
One 4-bit SD card connector
One 4-bit Micro-SD card connector
Two USB Hosts with power switch
One Micro-AB USB device
Display
Ethernet
Debug port
Expansion connector
Board supply voltage
Battery
User interface
One LCD interface connector, LCD TFT Controller with overlay, alpha-blending, rotation, scaling and color space conversion
One HDMI interface and connector
One Ethernet PHY (RMII 10/100MHz)
One JTAG interface connector
One EDBG interface
One serial DBGU interface (3v3 level)
Arduino R3 compatible set of connectors
XPRO set of connectors
5V from USB, power jack, and Arduino shield
On-board power regulation by PMIC
On-board battery socket
Reset, Wake-up and free user push button
One red user/power LED
One blue user LED
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4.
Board Components
4.1
Board Overview
The fully-featured SAMA5D4-XULT board integrates multiple peripherals and interface connectors, as shown in
Figure 4-1.
SAMA5D4-XULT Board Overview
4Gb Nand Flash Memory
ATS
CU
1
P
1427C A
P6R245.00A
ARM
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Table 4-1 describes the interface connectors on the SAMA5D4-XULT.
Table 4-1.
Connector
J4
J11
J16
J1
J13
J20
SAMA5D4-XULT Board Interface Connectors
Interfaces to
Main power supply
USB A Device. Supports USB device using a type Micro-AB connector
USB Host B and C. Supports USB host using a stacked type A connector
Serial DBGU (3.3V level)
JTAG, 20 pin IDC connector
EDBG USB connector
J9
J24
J12
J2
Micro-SD connector
SD/MMC connector
Ethernet ETH0
Expansion connector with all LCD controller signals for display module connection (QTouch ® , TFT LCD display with touchscreen and backlight)
HDMI connector type A
CR1225 Battery holder
J5
BAT1
J6, J7, J8,
J14, J15,
J17, J18, J19
Expansion connectors with Arduino R3 compatible PIO signals
J21, J22, J23 Expansion connectors Xplained
J3 JTAG EDBG (not populated)
J10 PIOBU extension (not populated)
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4.2
Function Blocks
4.2.1
Processor
The Atmel® | SMART SAMA5D4 Series is a high-performance, power-efficient ARM® Cortex®-A5 processor MPU capable of running up to 600 MHz. It integrates the ARM NEON™ SIMD engine for accelerated signal processing, multimedia and graphics as well as a 128 KB L2-Cache for high system performance. The device features the
ARM TrustZone® enabling a strong security perimeter for critical software, as well as several hardware security features. The device also features advanced user interface and connectivity peripherals.
The SAMA5D4 devices have three software-selectable low-power modes: Idle, Ultra Low-power, and Backup. In
Idle mode, the processor is stopped while all other functions can be kept running at normal operating bus frequency. In Ultra Low-power mode, the processor is stopped while all other functions can be kept running at minimum operating bus frequency. In Backup mode, only the real-time clock, real-time timer, backup SRAM, backup registers, and wake-up logic are running.
The SAMA5D4 features an internal multi-layer bus architecture associated with 32 DMA channels to sustain the high ba ndwidth required by the proce sso r an d th e h ig h-spee d p eriphera ls. The de vice suppo rts
DDR2/LPDDR/LPDDR2 and SLC/MLC NAND Flash memory with 24-bit ECC.
The comprehensive peripheral set includes a 720p hardware video decoder, an LCD controller with overlays for hardware-accelerated image composition, a resistive touch screen function, and a CMOS sensor interface.
Connectivity peripherals include a dual 10/100 Ethernet MAC with IEEE1588, three HS USB ports, UARTs, SPIs and I2Cs.
Security features includes an "on-the-fly" encryption-decryption process from the external DDR memory, tamper detection pins, secure storage of critical data, an integrity check monitor (ICM) to detect modification of the memory contents and a secure boot. The product also includes a dedicated coprocessor for public key cryptography such as RSA and elliptic curves algorithms (ECC), as well as AES, 3DES, SHA function and TRNG.
These features permit to protect the system against counterfeiting, to safeguard sensitive data, authenticate safe program or secure external data transfers.
The SAMA5D4 series is optimized for control panel/HMI applications needing video playback and applications that require high levels of connectivity in the industrial and consumer market. Its security features make the SAMA5D4 well suited for secure gateways or for the IoT.
4.2.2
Power Supply Topology and Power Distribution
4.2.2.1 Power Lines
Refer to the Power Supplies and Power Supply Connections tables in the SAMA5D4 datasheet.
4.2.2.2 Power-up and Power-down Considerations
Power-up and power-down considerations are described in section “Power Considerations” of the SAMA5D4
Series datasheet.
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4.2.2.3 SAMA5D44 Power Supplies Summary
Table 4-2.
Name
VDDCORE
VDDIODDR
VDDIOM
SAMA5D44 Power Supplies
Voltage Range,
Nominal
Associated
Ground
1.62–1.98V, 1.8V
VCCCORE 1.1–1.32V, 1.2V
1.70–1.90V, 1.8V
1.14–1.30V, 1.2V
1.65–1.95V, 1.8V
3.0–3.6V, 3.3V
GNDCORE
GNDCORE Core
DDR2 Interface I/O lines
GNDIODDR
LP-DDR2 Interface I/O lines
GNDIOM
Powers
Regulator that generates core power supply on VCCCORE
10 µF decoupling capacitor is to be connected to VCCCORE
MUST BE ESTABLISHED AFTER VDDIOP OR AT THE SAME TIME
NAND and HSMC Interface I/O lines
VDDIOP
VDDBU
3.0–3.6V, 3.3V
1.88–2.12V, 2V
GNDIOP
GNDBU
Peripherals I/O lines
MUST BE ESTABLISHED PRIOR TO VDDCORE
Slow Clock oscillator, the internal 64 kHz RC and a part of the System Controller
MUST BE ESTABLISHED FIRST
VDDUTMIC
VDDUTMII
VDDPLLA
1.1–1.32V, 1.2V
3.0–3.6V, 3.3V
1.1–1.32V, 1.2V
GNDUTMI
GNDUTMI
GNDPLL
USB device and host UTMI+ core and the UTMI PLL
MUST be connected to VCCCORE
USB device and host UTMI+ interface
PLLA cell
MUST be connected to VCCCORE
VDDOSC
3.0–3.6V
3.0–3.6V, 3.3V
GNDOSC
GNDANA
Main Oscillator cell
Analog parts
MUST be connected to VDDIOP with filtering
Fuse box for programming
VDDFUSE 2.25–2.75V, 2.5V
GNDFUSE
VDDFUSE must be 2.5V or 0V and must not be left floating
Notes: 1. Both VDDIOP and VDDANA must rise at the same time due to internal constraints.
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4.2.2.4 ACT8865 Power Management IC
The ACT8865 is a complete, cost-effective and highly-efficient ActivePMU™ power management solution, optimized to provide a single-chip power solution and voltage sequencing for Atmel SAMA5D3/SAMA5D4 and
SAM9 series MPUs. It also meets the control requirements of these devices.
The ACT8865 features three step-down DC/DC converters and four low-noise, low-dropout linear regulators.
WARNING
There is a known error on the ACT8865 I²C implementation. The port must be shut off after configuration or problems may occur with devices using the same I²C channel, e.g., TM43xx LCD display.
Refer to the ACT8865 datasheet at www.active-semi.com
for more details.
Figure 4-2.
Board Power Management
VCC_1V8
1 2
VDDIODDR_MPU
VDDIODDR
VCC_5V
[9] WKUP
[9] PMIC_IRQ_PE25
VCC_3V3 VCC_2V
[10,12,14,15] NRST_3V3
[8]
[8]
PMIC_TWCK3_PC26
PMIC_TWD3_PC25
VDDREF
PWRHLD
23
20
17
13
31
26
16
18
25
12
11
10
21
22
32
9 nPBIN
VP1
VP2
VP3
NC1
NC2
VDDREF
VSEL
PWREN nPBSTAT nIRQ nRSTO
PWRHLD
SCL
SDA
REFBP
RESET
INL45
INL67
5
6
SW1
OUT1
30
1
SW2
OUT2
27
24
SW3
OUT3
15
19
OUT4
3
OUT5
4
OUT6
7
OUT7
8
(2V5)
(3V3)
(1V8)
VDDCORE
1V2_HDMI
VCC_3V3
1
FUSE_2V5
VDDANA
VOUT6
VOUT7
1
1
1
2
VDDIOP
VDDIOM
2
VDDUTMII
2
VCC_EDBG
2
WAKE UP
[9] SHDN
PWRHLD
VDDREF
C5 DNP(100nF)
C4
10nF
C6 100nF
1
3
2
Place TP13 and TP14 to Bottom.
Supply Group Configuration
The ACT8865 provides:
All power supplies required by the SAMA5D44 device:
1.8V VDDCORE
1.8V VDDIODDR
2.0V VDDBU
3.3V VDDIOP, VDDIOM, VDDANA, VDDUTMII
2.5V VDDFUSE
Power supplies to external chips on the main board:
1.2V HDMI
3.3V Ethernet PHY, HDMI, EDBG
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4.2.2.5 Power Options
There are several power options for the SAMA5D4-XULT board.
The power sources are selected by a set of 0R resistors. The USB-powered operation is the default configuration.
It comes from the USB device port connected to a PC or a 5V DC supply. The USB supply is sufficient to power the board in most applications. It is important to note that when the USB supply is used, the USB Host ports do not function. If USB Host ports are required for the application, it is recommended that a DC supply be used.
Figure 4-3 provides the schematics of power options.
Figure 4-3.
Input Powering Scheme Option
2
Q5
IRLML6402
3
[14] EDBG_USB_VBUS_5V
3
Q8
IRLML6402
2
VCC_5V_IN VCC_5V
[10] USB_VBUS_5V
2
Q7
IRLML6402
3
6
2
1
7
IN
IN_pad
EN
GND
OUT1
OUT2
FLAG
4
5
3
[15] EXP_5V
3
Q6
IRLML6402
2
1
3
2
5V/2A Input
Note: USB-powered operation eliminates additional wires and batteries. It is the preferred mode of operation for any project that requires only a 5V source at up to 500 mA.
4.2.2.6 Wall Supply Source
A wall supply can be used to provide power to the board. A regulated 5V DC supply of at least 2A is required. If
USB ports and expansion headers are used, a rating of 3A is preferred. A 2.1 mm plug with a center-hot configuration is required.
If the USB host ports or expansion board Arduino shields are used, additional current is necessary.
If the DC load required is greater than 500 mA per port, a higher current supply must be used.
4.2.2.7 Backup Power Supply
The SAMA5D4-XULT board requires a battery (3V lithium battery type CR1225 or equivalent) in order to permanently power the backup part of the SAMA5D4 device (refer to SAMA5D4 Series data sheet).
To avoid losing data and saved registers, the board must be powered on when replacing the battery.
Figure 4-4.
VBAT Powering Scheme Option
VCC_5V
[15] EXP_VBAT
1
2
3
VDDBU_3V
4
1
2
VIN
CE
VOUT
GND
3
VCC_2V VDDBU_2V
4.2.2.8 Power Supply Control
In the ACT8865, three DCDCs (1.8V, 1.2V, 3.3V) and two LDO outputs are available.
All ACT8865 outputs can be controlled by the TWI interface through software.
The three DCDCs outputs can be enabled or disabled by the SAMA5D44 SHDN output:
SHDN = 0: The DCDCs output is disabled.
SHDN = 1: The DCDCs output is enabled.
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Two push buttons are also available:
Wakeup push button: When pressed, the ACT8865 power outputs are restarted if the ACT8865 is in shutdown mode.
Reset push button: When pressed, the ACT8865 transfers the reset signal to NRST_3V3, and then to
NRST_2V for the MPU by using a resistor divider.
4.2.3
Reset Circuitry
The reset sources for SAMA5D4-XULT board are:
Power-on reset from the Power Management Unit (PMIC)
Push button reset BP3
External reset from Arduino connectors
JTAG or EDBG reset from an in-circuit emulator
Figure 4-5.
Reset/Wakeup and Shutdown Control
[8]
[8]
PMIC_TWCK3_PC26
PMIC_TWD3_PC25
PWRHLD 10
PWRHLD
21
22
32
SCL
SDA
REFBP
9 nPBIN
RESET
WAKE UP
[9] SHDN
PWRHLD
VDDREF
C5 DNP(100nF)
C4
10nF
C6 100nF
1
3
2
4.2.4
Clock Circuitry
The SAMA5D4-XULT board includes four clock sources:
Two clocks are alternatives for the SAMA5D44 processor (12 MHz, 32 kHz)
One crystal oscillator used for the Ethernet RMII chip (25 MHz)
One crystal oscillator used for the EDBG (12 MHz)
Figure 4-6.
Clock Circuitry
XIN
XOUT
XOUT32
XIN32
1
2
4
3
4
3
1
2
1
2
4
3
EDBG_XIN
EDBG_XOUT
ETH0_XI
ETH0_XO
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4.2.5
Memory
4.2.5.1 Memory Organization
The SAMA5D4 features a DDR/SDR memory interface and an External Bus Interface (EBI) to permit interfacing to a wide range of external memories and to almost any kind of parallel peripheral.
This section describes the memory devices that equip the SAMA5D4-XULT board.
4.2.5.2 DDR2/SDRAM
Two DDR2/SDRAM (MT47H128M16 - 2 Gb - 16 Meg x 16 x 8 banks) are used as main system memory. The board provides 4 Gb on-board, soldered DDR2 (double data rate) SDRAM. The memory bus is 32 bits wide and operates with a frequency of up to 176 MHz.
Figure 4-7.
DDR2
VDDIODDR
MPU_DDR2_A0
MPU_DDR2_A1
MPU_DDR2_A2
MPU_DDR2_A3
MPU_DDR2_A4
MPU_DDR2_A5
MPU_DDR2_A6
MPU_DDR2_A7
MPU_DDR2_A8
MPU_DDR2_A9
MPU_DDR2_A10
MPU_DDR2_A11
MPU_DDR2_A12
MPU_DDR2_A13
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
MPU_DDR2_BA0
MPU_DDR2_BA1
MPU_DDR2_BA2
MPU_DDR2_CSn
MPU_DDR2_RASn
MPU_DDR2_CASn
MPU_DDR2_WEn
MPU_DDR2_CK+
MPU_DDR2_CK-
MPU_DDR2_CKEn
DDR2_VREF
VDDIODDR
L2
L3
L1
BA0
BA1
BA2
L8
K7
L7
K3
CS
RAS
CAS
WE
J8
K8
K2
J2
J7
J1
CK
CK
CKE
K9
ODT
VREF
VSSDL
VDDL
DQ0
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
LDQS
LDQS
F7
E8
UDQS
UDQS
B7
A8
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
MPU_DDR2_DQ0
MPU_DDR2_DQ1
MPU_DDR2_DQ2
MPU_DDR2_DQ3
MPU_DDR2_DQ4
MPU_DDR2_DQ5
MPU_DDR2_DQ6
MPU_DDR2_DQ7
MPU_DDR2_DQ8
MPU_DDR2_DQ9
MPU_DDR2_DQ10
MPU_DDR2_DQ11
MPU_DDR2_DQ12
MPU_DDR2_DQ13
MPU_DDR2_DQ14
MPU_DDR2_DQ15
MPU_DDR2_DQS0+
MPU_DDR2_DQS0-
MPU_DDR2_DQS1+
MPU_DDR2_DQS1-
UDM
LDM
B3
F3
MPU_DDR2_DM1
MPU_DDR2_DM0
NC_A2
NC_E2
RFU_R3
RFU_R7
A2
E2
R3
R7
MPU_DDR2_CK+
MPU_DDR2_CK-
MPU_DDR2_A0
MPU_DDR2_A1
MPU_DDR2_A2
MPU_DDR2_A3
MPU_DDR2_A4
MPU_DDR2_A5
MPU_DDR2_A6
MPU_DDR2_A7
MPU_DDR2_A8
MPU_DDR2_A9
MPU_DDR2_A10
MPU_DDR2_A11
MPU_DDR2_A12
MPU_DDR2_A13
MPU_DDR2_BA0
MPU_DDR2_BA1
MPU_DDR2_BA2
MPU_DDR2_CSn
MPU_DDR2_RASn
MPU_DDR2_CASn
MPU_DDR2_WEn
MPU_DDR2_CK+
MPU_DDR2_CK-
MPU_DDR2_CKEn
DDR2_VREF
VDDIODDR
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
L2
L3
L1
BA0
BA1
BA2
L8
K7
L7
K3
CS
RAS
CAS
WE
J8
K8
K2
J2
J7
J1
CK
CK
CKE
K9
ODT
VREF
VSSDL
VDDL
VDDIODDR
DDR2
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
LDQS
LDQS
F7
E8
UDQS
UDQS
B7
A8
G8
G2
D7
D3
D1
D9
B1
B9
H7
H3
H1
H9
F1
F9
C8
C2
UDM
LDM
B3
F3
MPU_DDR2_DQ16
MPU_DDR2_DQ17
MPU_DDR2_DQ18
MPU_DDR2_DQ19
MPU_DDR2_DQ20
MPU_DDR2_DQ21
MPU_DDR2_DQ22
MPU_DDR2_DQ23
MPU_DDR2_DQ24
MPU_DDR2_DQ25
MPU_DDR2_DQ26
MPU_DDR2_DQ27
MPU_DDR2_DQ28
MPU_DDR2_DQ29
MPU_DDR2_DQ30
MPU_DDR2_DQ31
MPU_DDR2_DQS2+
MPU_DDR2_DQS2-
MPU_DDR2_DQS3+
MPU_DDR2_DQS3-
MPU_DDR2_DM3
MPU_DDR2_DM2
NC_A2
NC_E2
RFU_R3
RFU_R7
A2
E2
R3
R7
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4.2.5.3 DDR_CALP and DDR_CALN Analog Inputs
Two specific analog inputs, DDR_CALP and DDR_CALN, are used to calibrate all DDR I/Os.
Figure 4-8.
DDR_CALP and DDR_CALN Analog Inputs
MPU_DDR2_BA0
MPU_DDR2_BA1
MPU_DDR2_BA2
VDDIODDR
C15
D14
G13
DDR_BA0
DDR_BA1
DDR_BA2
DDR2_VREF
C19
B19
DDR_CALN
DDR_CALP
K12
DDR_VREF
Table 4-3.
DDR_CALN and DDR_CALP
Memory Type
DDR2
LPDDR2
CALP Pull-down
200 ohm
240 ohm
4.2.5.4 NAND Flash
One 512 MB NAND Flash is connected to the processor.
Figure 4-9.
NAND Flash
3V3_NAND
NAND_CLE_PC18
NAND_ALE_PC17
NAND_REn_PC13
NAND_WEn_PC14
NAND_CEn_PC15
NAND_RDY_PC16
(NAND_WPn)
Nand Flash
VCC_3V3 3V3_NAND
CLE
ALE
RE
WE
CE
R/B
WP
N.C1
N.C2
N.C3
N.C4
N.C5
N.C6
N.C7
N.C8
N.C9
N.C10
N.C11
N.C12
N.C13
N.C14
N.C15
N.C16
19
10
11
14
15
20
3
4
5
6
1
2
21
22
23
24
35
16
17
8
18
9
7
DNU2
DNU1
VCC_1
VCC_2
VCC_3
VCC_4
VSS_1
VSS_2
VSS_3
VSS_4
N.C18
N.C19
N.C20
N.C21
N.C22
N.C23
N.C24
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
33
40
45
46
44
26
27
28
29
30
31
32
41
42
43
47
38
13
36
25
48
12
37
34
39
NAND_IO0_PC5
NAND_IO1_PC6
NAND_IO2_PC7
NAND_IO3_PC8
NAND_IO4_PC9
NAND_IO5_PC10
NAND_IO6_PC11
NAND_IO7_PC12
3V3_NAND
CALN Pull-up
200 ohm
240 ohm
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15
4.2.5.5 CS Disable
The SAMA5D44 device boots according to the following sequence:
1.
D CARD connected on MCI1
2.
Optional Dataflash connected on NPCS0 SPI0
3.
8-bit NAND Flash connected to D0–D7
In this sequence, the first device found with bootable contents is selected as the boot source. The others are disregarded.
On-board jumpers (JP7, JP8) control the selection (CS#) of the on-board bootable memory components (NAND
Flash and Serial DataFlash) using a non-inverting 3-state buffer.
Figure 4-10.
CS Disable
Nand & SPI Flash CS
VCC_3V3
AT25_SPI0_NCPS0_PC3
1
2
3
5
4
SPI Flash CS
AT25_SPI0_CS0_PC3
BOOT_DIS
NAND_NCS3_PC15
The jumper JP7 must be populated near the reset button
1
2
3
5
4 NAND_CEn_PC15
NAND Flash CS
The rule of operation is:
JP7 = OFF (default)
→ enable normal boot from NAND Flash (or serial DataFlash if mounted)
JP7 = ON → booting from optional serial DataFlash or NAND Flash is disabled
JP8 (optional) also controls the serial DataFlash if mounted.
Refer to the SAMA5D4 Series datasheet for more information on standard boot strategies and sequencing.
4.2.6
Additional Memories
4.2.6.1 Serial Data Flash (optional)
The SAMA5D44 provides two high-speed Serial Peripheral Interface (SPI) controllers. One port is used to interface with the optional on-board serial DataFlash.
The four main signals used in the SPI are Clock, Data In, Data Out, and Chip Select. The SPI is a serial interface similar to the I 2 C bus interface but with three main differences:
It operates at a higher speed.
Transmit and receive data lines are separate.
Device access is chip select-based instead of address-based.
Figure 4-11.
Optional Serial DataFlash
SPI Flash
AT25_SPI0_MOSI_PC1
AT25_SPI0_MISO_PC0
AT25_SPI0_SPCK_PC2
AT25_SPI0_CS0_PC3
5
2
6
1
SI
SO
SCK
CS
VCC
8
WP
HOLD
GND
3
7
4
VCC_3V3
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4.2.6.2 Serial EEPROM with Unique MAC Address
The SAMA5D4-XULT board embeds one Atmel AT24MAC402/602 EEPROM using a TWI0 interface.
The AT24MAC402/602 provides 2048 bits of Serial Electrically-Erasable Programmable Read-Only Memory
(EEPROM) organized as 256 words of eight bits each and is accessed via an I 2 C-compatible (2-wire) serial interface. In addition, the AT24MAC402/602 incorporates an easy and inexpensive method to obtain a globally unique MAC or EUI address (EUI-48 or EUI-64).
The EUI-48/64 addresses can be assigned as the actual physical address of a system hardware device or node, or it can be assigned to a software instance. These addresses are factory-programmed by Atmel and permanently write-protected in an extended memory block located outside of the standard 2-Kbit memory array.
In addition, the AT24MAC402/602 provides the value-added feature of a factory-programmed, guaranteed unique
128-bit serial number located in the extended memory block (same area as the EUI address values).
The EEPROM device is used as a “soft label” to store board information such as chip type, manufacture name and production date, using the last two 16-byte blocks in memory.
WARNING The information contained in these blocks should not be modified.
Figure 4-12.
EEPROM
EEPROM_WP
VCC_3V3_EEPROM
VCC_3V3_EEPROM
VCC_3V3
EEPROM
VCC_3V3_EEPROM
3
4
1
2
A0
A1
A2
GND
VCC
WP
SCL
SDA
6
5
8
7 EEPROM_WP
EEPROM_TWCK0_PA31 [7]
EEPROM_TWD0_PA30 [7]
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17
4.2.7
High-Speed Multimedia Card Interface (HSMCI)
4.2.7.1 Multimedia Card Interface (MCI)
The SAMA5D4-XULT board has two high-speed Multimedia Card interfaces (MCIs) that support the multimedia card (MMC) Specification V4.3, the SD Memory Card Specification V2.0 and the SDIO V1.1 specification:
MCI0 interface based on a 7-pin interface (clock, command, 4-bit data, power lines).
MCI1 Interface based on a 7-pin interface (clock, command, 4-bit data, power lines).
4.2.7.2 HSMCI Card Connector
A standard MMC/SD card (push and click type) connector, connected to MCI1, is mounted on the top side of the board. It features a push-lock / push-eject mechanism and a card detection switch.
A micro SD card (push and click type) connector, connected to MCI0, is mountable as an option on the bottom side of the board.
Figure 4-13.
HSMCI0 & HSMCI1
VDD_MCI1
3 2
VCC_3V3
VCC_3V3
MCI1_PWR_PE4 [9]
[9] MCI1_CD_PE3
[9]
[9]
MCI1_DA1_PE21
MCI1_DA0_PE20
[9] MCI1_CK_PE18
[9]
[9]
[9]
MCI1_CDA_PE19
MCI1_DA3_PE23
MCI1_DA2_PE22
(MCI1_CD)
(MCI1_DA1)
(MCI1_DA0)
(MCI1_CK)
(MCI1_CDA)
(MCI1_DA3)
(MCI1_DA2)
3
2
5
4
1
9
8
7
6
SD/MMCPlus CARD INTERFACE - MCI1
VCC_3V3
13
12
11
10
16
15
14
(MCI1_WP)
[8]
[8]
[8]
[8]
MCI0_DA0_PC6
MCI0_DA1_PC7
MCI0_DA2_PC8
MCI0_DA3_PC9
[8]
[8]
MCI0_CDA_PC5
MCI0_CK_PC4
[9] MCI0_CD_PE2
(MCI0_DA0)
(MCI0_DA1)
(MCI0_DA2)
(MCI0_DA3)
(MCI0_CDA)
(MCI0_CK)
(MCI0_CD)
1
2
7
8
3
5
DAT0
DAT1
DAT2
DAT3
CMD
CLK
9
10
4
6
VDD
VSS
CD
PGND
PGND_1
PGND_2
PGND_3
NC_1
NC_2
11
12
13
14
15
Micro SD CARD INTERFACE - MCI0
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4.2.8
Communication Interfaces
The SAMA5D4-XULT board is equipped with EMAC and USB Host/Device communication interfaces.
4.2.8.1 Ethernet 10/100 (EMAC) Port
The SAMA5D4-XULT board contains a MICREL PHY device (KSZ8081) operating at 10/100 Mb/s. The board supports RMII interface modes. The Ethernet interface consists of two pairs of low-voltage differential pair signals designated from GRX± and GTX± plus control signals for link activity indicators. These signals can be used to connect to a 10/100 Base-T RJ45 connector integrated on SAMA5D4-XULT board.
Additionally, for monitoring and control purposes, LED functionality is carried on the RJ45 connectors to indicate activity, link, and speed status information.
For more information about the Ethernet controller device, refer to the MICREL KSZ8081RN controller manufacturer's datasheet.
Figure 4-14.
Ethernet
EARTH_ETH0
13
14
15
16
ETH0_VDD
75 75
ETH0_VDD
100 ohms differential trace impedance
Routing top or bottom
1
4
2
TX+
TX-
TX+
TXtop/bot top/bot
7
TXP
6
TXM
3
5
6
7
8
GND_ETH0
EARTH_ETH0
ACT ETH0_LED1
LINK ETH0_LED0
RX+
RX-
ETH0_VDD
ETH0_LED0
ETH0_LED1
RX+
RXtop/bot top/bot
5
RXP
4
RXM
2
VDD_1V2
1
33
22
26
27
10
GND
PADDLE
TXC
TXD2
TXD3
REXT
ETH0_XO
ETH0_XI
8
XO
9
XI
30
31
LED0/NWAYEN
LED1/SPEED
ETH0
10Base-T/100Base-TX
RXC/B-CAST_OFF
19
TXD1
TXD0
TXEN
RXD3/PHYAD0
RXD2/PHYAD1
RXD1/PHYAD2
RXD0/DUPLEX
RXDV/CONFIG2
RXER/ISO
CRS/CONFIG1
COL/CONFIG0
14
15
16
18
20
29
28
25
24
23
13
MDC
MDIO
INTRP/NAND
12
11
21
VDDA_3V3
3
ETH0_VDDA
VDDIO
17
ETH0_VDD
RESET
32
NRST_3V3 [4,10,14,15]
Terminal Resistor close to output side
G0_TXCK_PB0 [7]
G0_TX1_PB13 [7]
G0_TX0_PB12 [7]
G0_TXEN_PB2 [7]
G0_RX1_PB9 [7]
G0_RX0_PB8 [7]
G0_RXDV_PB6 [7]
G0_RXER_PB7 [7]
G0_MDC_PB16 [7]
G0_MDIO_PB17 [7]
G0_IRQ_PE1 [9]
VCC_3V3
1 2
ETH0_VDD
ETH0_VDDA
1
EARTH_ETH0
2
GND_ETH0
ETH0_XI
ETH0_XO
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4.2.8.2 USB Host/Device A, B & C
The SAMA5D4-XULT board features three USB communication ports:
USB Host B/C High- and Full-speed Interface
Two USB host stacked type A connectors.
USB Host/Device A Interface
One USB device standard micro-AB connector. This port has a VBUS detection function made through the resistor ladder R218 and R214.
Figure 4-15.
USB Host & Device Interface
USB A
USB_VBUS_5V [4]
USBA_VBUS_PE31 [9]
USB B & C
J7_USB_A_Upper
[9]
[9]
5V_USBB
USBB_DM
USBB_DP
5
6
7
8
9 10 1112
1
2
3
4
J7_USB_B_Lower
5V_USBC
USBC_DM [9]
USBC_DP [9]
EARTH_USB_B/C
9
10
VBUS
DM
DP
ID
GND
3
4
1
2
5
USBA_DM [9]
USBA_DP [9]
EARTH_USB_A
1 2
EARTH_USB_A
1 2
EARTH_USB_B/C
The two USB Host ports are equipped with 500 mA high-side power switch for self-powered and bus-powered applications.
5V_USBC 1 2
VCC_5V
5V_USBB 1 2
8
7
OUTA
IN
ENA
1
FLGA
2
6
5
GNG
OUTB
FLGB
3
ENB
4
USBC_EN5V_PE14 [9]
ENA and ENB Active High
USB_OVCUR_PE0 [9]
USBB_EN5V_PE11 [9]
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4.2.9
LCD TFT Interface
4.2.9.1 LCD
The SAMA5D4 provides 24 bits of data and control signals to the LCD interface. Other signals are used to control the LCD and are available on connector J2: TWI, SPI, 2 GPIOs for interrupt, 1-Wire and power supply lines.
4.2.9.2 LCD Expansion Header
J2 is a 1.27mm pitch 50-pin header; it gives access to the LCD signals.
Figure 4-16.
LCD Expansion Header Interface
VCC_5V VCC_3V3
[8]
[7]
AD0_XP_PC27
LCD_SPI1_NPCS2_PB23
[8]
[7]
AD1_XM_PC28
LCD_SPI1_MISO_PB18
[8]
[7]
AD2_YP_PC29
LCD_SPI1_MOSI_PB19
[8]
[7]
AD3_YM_PC30
LCD_SPI1_SPCK_PB20
NRST_3V3
[7]
[9]
[9]
[7]
[7]
[7]
LCD_PWM_PA24
LCD_PE10
LCD_PE9
LCD_TWCK0_PA31
LCD_TWD0_PA30
LCD_DISP_PA25
[7]
[7]
[7]
[7]
LCD_DEN_PA29
LCD_HSYNC_PA27
LCD_VSYNC_PA26
LCD_PCK_PA28
[7]
[7]
[7]
[7]
LCD_DAT23_PA23
LCD_DAT22_PA22
LCD_DAT21_PA21
LCD_DAT20_PA20
[7]
[7]
[7]
[7]
LCD_DAT19_PA19
LCD_DAT18_PA18
LCD_DAT17_PA17
LCD_DAT16_PA16
[7]
[7]
[7]
[7]
LCD_DAT15_PA15
LCD_DAT14_PA14
LCD_DAT13_PA13
LCD_DAT12_PA12
[7]
[7]
[7]
[7]
LCD_DAT11_PA11
LCD_DAT10_PA10
LCD_DAT9_PA9
LCD_DAT8_PA8
[7]
[7]
[7]
[7]
LCD_DAT7_PA7
LCD_DAT6_PA6
LCD_DAT5_PA5
LCD_DAT4_PA4
[7]
[7]
[7]
[7]
LCD_DAT3_PA3
LCD_DAT2_PA2
LCD_DAT1_PA1
LCD_DAT0_PA0
[9]
[14]
LCD_ID_PE15
EDBG_ID_01
(LCDPWM)
(IRQ2)
(IRQ1)
(LCDDISP)
(LCDDEN)
(LCDHSYNC)
(LCDVSYNC)
(LCDPCK)
(LCDDAT23)
(LCDDAT22)
(LCDDAT21)
(LCDDAT20)
(LCDDAT19)
(LCDDAT18)
(LCDDAT17)
(LCDDAT16)
(LCDDAT15)
(LCDDAT14)
(LCDDAT13)
(LCDDAT12)
(LCDDAT11)
(LCDDAT10)
(LCDDAT9)
(LCDDAT8)
(LCDDAT7)
(LCDDAT6)
(LCDDAT5)
(LCDDAT4)
(LCDDAT3)
(LCDDAT2)
(LCDDAT1)
(LCDDAT0)
(ID_SYS)
LCD
50
44
43
42
41
40
39
38
37
49
48
47
46
45
36
35
34
33
32
31
30
29
24
23
22
21
20
19
18
17
28
27
26
25
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
52
51
4.2.9.3 LCD Power
In order to operate correctly out of the processor with various LCD modules, two voltage lines are available: 3.3V
and 5 VCC (default), both selected by 0R resistors R416 and R417.
Figure 4-17.
LCD Power
VCC_5V VCC_3V3
NRST_3V3
LCD
50
49
48
47
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21
4.2.10 HDMI Transmitter Interface
The SAMA5D4-XULT board features the Silicon Image SiI9022ACUN device to convert video signals to the HDMI standard.
It features the following:
Compliance
HDMI 1.2a, Simply HD, DVI 1.0
Digital Video Output
Integrated TMDS core
DTV resolution support - 480i/576i/480p/576p/720p/1080i/1080p
PC resolution support - VGA/XGA/SXGA/WSXGA/UXGA
Flexible interface to HD MPEG decoders
Integrated YCbCr
→ RGB conversion
4:2:2 → 4:4:4 up-converter
Digital Audio Output
DVD-Audio support through 4 x I2S inputs
Supports 2-ch 192 kHz or 8-ch 96 kHz
Supports IEC60958 2-ch PCM or IEC61937 compressed audio (Dolby Digital, DTS, etc.)
Industry-standard S/PDIF input, Integrated MCLK generator
Power Management
1.2V and 1.8V cores provide low-power operation
Flexible power-down modes
Figure 4-18.
HDMI Interface
VCC_5V
1 2
VCC_5V_HDMI
100 ohms differential trace impedance
Routing top or bottom
[7] HDMI_INT_PA25
3V3_HDMI
[7]
[7]
HDMI_TWD0_PA30
HDMI_TWCK0_PA31
3V3_HDMI
3V3_HDMI
HDMI_HPD
HDMI_SDA
HDMI_SCL
(PCK0) [7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
HDMI_DAT0_PA0
HDMI_DAT1_PA1
HDMI_DAT2_PA2
HDMI_DAT3_PA3
HDMI_DAT4_PA4
[7]
[7]
[7]
[7]
[7]
[7]
[7]
[7]
HDMI_DAT5_PA5
HDMI_DAT6_PA6
HDMI_DAT7_PA7
HDMI_DAT8_PA8
HDMI_DAT9_PA9
HDMI_DAT10_PA10
HDMI_DAT11_PA11
HDMI_DAT12_PA12
HDMI_DAT13_PA13
HDMI_DAT14_PA14
HDMI_DAT15_PA15
HDMI_DAT16_PA16
HDMI_DAT17_PA17
HDMI_DAT18_PA18
HDMI_DAT19_PA19
HDMI_DAT20_PA20
HDMI_DAT21_PA21
HDMI_DAT22_PA22
HDMI_DAT23_PA23
[7] HDMI_PCK_PA28
[7]
[7]
[7]
[7]
HDMI_VSYNC_PA26
HDMI_HSYNC_PA27
HDMI_DEN_PA29
HDMI_RST_PB15
3V3_HDMI
[7]
[7]
[7]
HDMI_TK0_PB27
HDMI_TF0_PB31
HDMI_TD0_PB28
Close to SiI9022
HDMI_MCK_PA24
17
16
15
14
23
20
19
18
28
27
25
24
32
31
30
29
8
7
6
4
13
11
10
9
D8
D9
D10
D11
D12
D13
D14
D15
D0
D1
D2
D3
D4
D5
D6
D7
D16
D17
D18
D19
D20
D21
D22
D23
45
44
41
40
39
37
22
CLK
35
34
33
51
VSYNC
HSYNC
DE
RESETN
SCLK
LRCLK
I2S0
I2S1
I2S2
I2S3
38
MCLK
36
SPDIF
HDMI
TXC+
TXC-
TX1+
TX1-
59
58
TX0+
TX0-
62
61
65
64
TX2+
TX2-
68
67
EXT_SWING
56
SIL_TCK+
SIL_TCK-
SIL_TD0+
SIL_TD0-
SIL_TD1+
SIL_TD1-
SIL_TD2+
SIL_TD2-
Close to Pin56
AVCC_1
AVCC_2
IOVCC18_1
IOVCC18_2
IOVCC18_3
60
66
AGND_1
AGND_2
57
63
IO_SEL
69
3
21
46
IO_SEL: LOW=3.3V
HIGH=1.8V
1 2
1V2_HDMI
3V3_HDMI
1 2
VCC_3V3
SIL_TCK-
SIL_TCK+
2
1
1 2
1V2_HDMI
CVCC12_1
CVCC12_2
CVCC12_3
CVCC12_4
CVCC12_5
CVCC12_6
5
12
26
42
47
53
CGND
43
SIL_TD0-
SIL_TD0+
2
1
SIL_TD1-
SIL_TD1+
2
1
HDMI Type A Connector
HDMI_TD2-
HDMI_TD2+
HDMI_SCL
HDMI_SDA
HDMI_HPD
HDMI_TD1-
HDMI_TD1+
HDMI_TD0-
HDMI_TD0+
HDMI_TCK+
HDMI_TCK-
19
6
4
5
9
7
8
15
16
3
1
2
10
12
11
DAT2-
DAT2+
DAT2_S MTG1
SCL
SDA
MTG2
MTG3
HPLG
MTG4
DAT-
DAT+
DAT1_S CEC
NC
DAT0-
DAT0+
DAT0_S +5V
DDC/CEC
CLK+
CLK-
CLK_S
20
21
22
23
13
14
18
17
EARTH_HDMI
VCC_5V_HDMI
3
4
HDMI_TCK-
HDMI_TCK+
3
4
HDMI_TD0-
HDMI_TD0+
3
4
HDMI_TD1-
HDMI_TD1+
1 2
EARTH_HDMI
HDMI_TCK-
HDMI_TCK+
10
9
8
HDMI_TD0-
HDMI_TD0+
7
6
HDMI_TD1-
HDMI_TD1+
10
9
8
HDMI_TD2-
HDMI_TD2+
7
6
1
2
3
4
5
HDMI_TCK-
HDMI_TCK+
HDMI_TD0-
HDMI_TD0+
1
2
3
4
5
HDMI_TD1-
HDMI_TD1+
HDMI_TD2-
HDMI_TD2+
SIL_TD2-
SIL_TD2+
2
1
3
4
HDMI_TD2-
HDMI_TD2+
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4.2.11 Indicators
There are two LEDs on the SAMA5D4-XULT board that can be controlled by the user:
The red LED provides an indication that power is supplied to the board and is controlled via software.
The blue LED is controlled via GPIO pins.
Figure 4-19.
LED Indicators
LED
VCC_3V3
LED_USER_PE15
PD30 LED_POWER_PD30
1
2 3
4.2.12 Push Button Switches
The SAMA5D4-XULT features three push buttons:
One board Reset button (BP3). When pressed and released, it causes a power-on reset of the board.
One Wakeup push button to exit the processor from low-power mode (BP2).
One User momentary push button (BP1).
Figure 4-20.
Push Buttons
32
REFBP
9 nPBIN
RESET
WAKE UP
[9] SHDN
PWRHLD
VDDREF
C5 DNP(100nF)
C4
10nF
C6 100nF
1
3
2
PE8 PB_USER_PE8
Place TP19 to Bottom
USER BUTTON
4.2.13 Debug Interfaces
The SAMA5D4-XULT board includes a JTAG, a Debug serial COM port and an EDBG interface port, to provide debug level access to the SAMA5D4.
4.2.13.1 Debug JTAG
A 2x10-pin JTAG header is provided on the SAMA5D4-XULT board to facilitate the software development and debugging by using various JTAG emulators. The interface signals have a voltage level of 3.3V.
Figure 4-21.
JTAG Interface
VCC_3V3
VCC_3V3
JTAG
12
14
16
18
20
2
4
6
8
10
11
13
15
17
19
1
3
5
7
9
NTRST [7]
TDI [7,14]
TMS [7,14]
TCK [7,14]
TDO [7,14]
NRST_3V3 [4,12,14,15]
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4.2.13.2 DBGU
The SAMA5D4-XULT board has a dedicated serial port for debugging, which is accessible through the 6-pin male header J1. Various interfaces can be used as USB/Serial DBGU port bridge, such as FTDI TTL-232R USB to TTL serial cable or basic breakout board for the RS232/USB converter.
Figure 4-22.
DBGU Interface
VCC_3V3 VCC_5V
DEBUG
[9]
[9,14]
[9,14]
DBGU_CTS3_PE5
DBGU_TXD3_PE17
DBGU_RXD3_PE16
[9] DBGU_RTS3_PE24
(CTS3)
(TXD3)
(RXD3)
(RTS3)
4
5
6
1
2
3
R13 and R14 are optional (not implemented) resistors that can be used for power selection. Power can be delivered either by the SAMA5D4-XULT board or by the debug interface tool. To avoid malfunction between the debug interface (e.g., FTDI) and the on-board power system, ensure that the voltage level selected corresponds to application requirements.
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4.2.14 Embedded Debugger (EDBG) Interface
The Atmel Embedded Debugger (EDBG)
(1) is an intuitive plug-and-play solution which adds full programming and debugging support to embedded hardware kits containing Atmel microcontrollers. It enables seamless integration between the target hardware and the Atmel Studio front end.
In addition to the Virtual COM port which provides a UART bridge to the target device, the EDBG provides a Data
Gateway Interface, through which the target device and host PC can communicate, facilitating high-level application debugging, monitoring, graphing and logging of system information in real-time.
The EDBG is based on the Atmel UC3A4 high-performance low-power 32-bit AVR microcontroller running at up to
60 MHz. The device includes an on-chip USB 2.0 high-speed hardware module with dedicated DMA channels, making it ideal for data communications.
By default, the EDBG is in Reset state and not usable. To use the EDBG interface, remove the jumper JP1. To avoid any conflict with the debug signals, do not use the JTAG and EDBG at the same time.
Figure 4-23.
EDBG Interface
VCC_EDBG
1
2
4
3
EDBG_XIN
EDBG_XOUT
[15]
[15]
EDBG_ID_03
EDBG_ID_02
TARGET_JTAG_TCK
TARGET_JTAG_TDO
TARGET_JTAG_NRST
TARGET_JTAG_TMS
TARGET_JTAG_TDI
TCK [7,10]
TDO [7,10]
NRST_3V3 [4,10,12,15]
TMS [7,10]
TDI [7,10]
EDBG_ID_01
EDBG_ID_02
EDBG_ID_03
EDBG_ID_04
EDBG_ID_05
EDBG_ID_06
EDBG_ID_07
EDBG_DGI_TWD
EDBG_DGI_TWCK
EDBG_TWI
ERASE
VCC_EDBG
VCC_5V
[9,10]
[9,10]
DBGU_TXD3_PE17
DBGU_RXD3_PE16
[15]
[15]
[15]
[15]
EDBG_DGI_GPIO0
EDBG_DGI_GPIO1
EDBG_DGI_GPIO2
EDBG_DGI_GPIO3
EDBG_ADC0
[15]
[15]
EDBG_DGI_TWD
EDBG_DGI_TWCK
[10] EDBG_ID_01
EDBG_USB_VBUS_5V
EDBG_USB_DM
EDBG_USB_DP
EDBG_CDC_UART_RX
EDBG_CDC_UART_TX
EDBG_DGI_SDA
EDBG_FORCE_BOOT
Force s/n
EDBG_DGI_SCL
TARGET_JTAG_NRST
K10
H6
G6
J10
F7
A2
A1
C10
C9
G7
K7
J7
E7
H9
B4
A4
C2
G8
G10
E1
F9
E9
G9
E8
H10
F8
D8
PA00 / PA18
PA01 / PA17
PA02 / PX47
PA03
PA04
PA05
PA06 / PA13
PA07 / PA19
PA08
PA09
PA10
PA11
PA12 / PA25
PA14 / PX11
PA15 / PX45
PA16
PA20 / PX18
PA21 / PX22
PA22 / PX20
PA23 / PX46
PA24 / PX17
PA26 / PB05
PA27
PA28
PA29
PA30
PA31
EDBG_USB_HS_DM
EDBG_USB_HS_DP
EDBG_USB_FS_DM
EDBG_USB_FS_DP
A10
A9
A8
USB_VBUS
DMHS
DPHS
B9
B8
DMFS
DPFS
C7
USB_VBIAS
EDBG
K1
J2
H4
J3
K2
K3
J4
D2
D1
D3
K4
D4
F1
H2
G5
H5
G4
G2
G3
J1
H1
G1
F3
F4
E3
E4
PX09
PX10
PX12
PX13
PX15 / PX32
PX16 / PX53
PX19 / PX59
PX21
PX23
PX24
PX25
PX26
PX27
PX28
PX29
PX30
PX31
PX00
PX01
PX02
PX03
PX04
PX05
PX06
PX07
PX08
EDBG_ID_06 [15]
EDBG_ID_07 [15]
EDBG_ID_05 [15]
EDBG_ID_04 [15]
POWER_LED_CTRL
STATUS_LED_CTRL
TARGET_RESET_SENSE
1
3
2
EDBG_SPI_MISO [15]
EDBG_SPI_MOSI [15]
EDBG_SPI_SCK [15]
EDBG_SPI_NCS [15]
TCK
TDI
TDO
TMS
RESET_N
K9
K8
J8
H7
J9
EDBG_JTAG_TCK
EDBG_JTAG_TDI
EDBG_JTAG_TDO
EDBG_JTAG_TMS
EDBG_RESET_N
3
1
2
NRST_3V3 [4,10,12,15]
VCC_EDBG
1 2
VCC_EDBG
EDBG_JTAG_TCK
EDBG_JTAG_TDO
EDBG_JTAG_TMS
EDBG_JTAG_TDI
1
3
5
7
9
JTAG
VCC_EDBG
2
4
6
8
10
EDBG_RESET_N
9
10
VBUS
DM
DP
ID
GND
1
2
3
4
5
VCC_EDBG
1
EDBG_USB_VBUS_5V [4]
EDBG_USB_DM
EDBG_USB_DP
2
VCC_EDBG
VCC_EDBG
(3V3)
EDBG_DIS
EDBG_RESET_N
EARTH_USB_EDBG
1 2
EARTH_USB_EDBG
1.
Device and Ordering Information—The EDBG is a factory-programmed AT32UC3A4256J-C1UR standard microcontroller with ordering code AT32UC3A4256HHB-C1UR. For further information please contact [email protected].
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4.2.15 Expansion Ports
4.2.15.1 Arduino
Five 8-pin, one 6-pin, one 10-pin and one 36-pin headers (J6, J7, J8, J14, J15, J17, J18, J19) are provided on the
SAMA5D4-XULT board to enable the PIO connection of various expansion cards. These headers’ physical and electrical implementation match the Arduino R3 extension (“shields”) scheme.
Due to multiplexing, different signals can be provided on each pin.
Figure 4-24.
Expansion Boards Connectors
Expansion
Boards
Connectors
VCC_3V3
[4] EXP_VBAT
[4,10,12,14] NRST_3V3
[4] EXP_5V
1
4
5
2
3
6
7
8
7
6
5
4
3
2
1
10
9
8
[7]
[8]
[8]
[8]
[8]
[8]
[9]
[9]
EXP_PB28
EXP/XPRO_PC27
EXP/XPRO_PC28
EXP/XPRO_PC29
EXP/XPRO_PC30
EXP_PC31
EXP_PE24
EXP_PE5
[7]
[7]
[7]
[7]
[8]
[8]
[7]
[7]
EXP/XPRO_PB30
EXP/XPRO_PB29
EXP/XPRO_PB26
EXP_PB10
EXP/XPRO_PC0
EXP/XPRO_PC1
EXP/XPRO_PB14
EXP/XPRO_PB15
[9]
[8]
[7]
[9]
[9]
[9]
EXP_PD8
EXP_PC4
EXP_PB31
EXP_PD14
EXP_PE12
EXP_PD18
[8]
[8]
[8]
[8]
EXP_PC20
EXP_PC22
EXP_PC24
EXP/XPRO_PC26
[9]
[9]
EXP_PE25
EXP_PD20
[9]
[9]
[9]
EXP_PE28
EXP_PD30
EXP_PD22
[7]
[7]
[9]
EXP_PB3
EXP_PB4
EXP_PD24
[14]
[9] EXP_PD28
EDBG_ID_04
[14]
[9] EXP_PD10
EDBG_ID_06
[8] EXP/XPRO_PC3
[9] EXP_PD26
3
4
5
1
2
6
7
8
1
4
5
2
3
6
7
8
15
17
19
21
23
25
27
11
13
7
9
1
3
5
29
31
33
35
EXP_5V
16
18
20
22
24
26
28
2
4
6
8
10
12
14
30
32
34
36
3
4
5
1
2
6
7
8
1
4
5
2
3
6
7
8
EXP/XPRO_PB27 [7]
EXP_PD29 [9]
EXP/XPRO_PD15 [9]
EXP_PE13 [9]
EXP_PD19 [9]
EXP_PC19 [8]
EXP_PC21 [8]
EXP_PC23 [8]
EXP/XPRO_PC25 [8]
EXP_PE0 [9]
EXP_PD21 [9]
EXP_PB1 [7]
EXP_PD31 [9]
EXP_PD23 [9]
EXP_PB11 [7]
EXP_PB5 [7]
EXP_PD25 [9]
EXP/XPRO_PD11 [9]
EDBG_ID_05 [14]
EXP_PD9 [9]
EDBG_ID_07 [14]
EXP_PE31 [9]
EXP_PD27 [9]
EXP/XPRO_PE30 [9]
EDBG_DGI_TWCK [14]
EXP_PB4 [7]
EXP/XPRO_PE29 [9]
EDBG_DGI_TWD [14]
EXP_PB3 [7]
AREF [7]
EXP/XPRO_PB20 [7]
EXP_PE6 [9]
EXP/XPRO_PB18 [7]
EXP_PE7 [9]
EXP/XPRO_PB19 [7]
EXP_PE8 [9]
EXP/XPRO_PB21 [7]
EDBG_SPI_NCS [14]
EXP/XPRO_PE21 [9]
EXP/XPRO_PE22 [9]
EXP_PE23 [9]
EXP/XPRO_PE18 [9]
EDBG_DGI_GPIO0 [14]
EXP/XPRO_PE19 [9]
EDBG_DGI_GPIO1 [14]
EXP_PB22 [7]
EXP/XPRO_PC1 [8]
EXP_PE20 [9]
EDBG_DGI_GPIO2 [14]
EXP_PE15 [9]
EDBG_DGI_GPIO3 [14]
EXP/XPRO_PC26 [8]
EXP_PB1 [7]
EXP/XPRO_PC25 [8]
EXP/XPRO_PC0 [8]
EXP/XPRO_PE27 [9]
EXP/XPRO_PE26 [9]
EXP/XPRO_PD17 [9]
EXP_PD16 [9]
EXP/XPRO_PD13 [9]
EXP_PD12 [9]
EXP_TWD0_PA30 [7]
EXP/XPRO_PC3 [8]
EXP_TWCK0_PA31 [7]
EXP/XPRO_PC2 [8]
VCC_3V3 EXP_5V
[7]
[14]
EXP/XPRO_PB18
EDBG_SPI_MISO
[7]
[14]
EXP/XPRO_PB20
EDBG_SPI_SCK
SPI1_MISO
S P
NRST_3V3
I 1 _ S P C K
1
3
5
2
4
6
S P I 1 _ M O S I
EXP/XPRO_PB19 [7]
EDBG_SPI_MOSI [14]
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4.2.15.2 Functions Available Through the Arduino Headers
The multiplexing of the SAMA5D44 I/Os (standard parallel I/O and up to three peripheral functions per pin) makes it possible to route alternate signals via Arduino extension headers. To enable these signals, SAMA5D44 PIO multiplexing must be properly configured. For more details, refer to
of this document and the section PIO Controller (PIO) in the SAMA5D4 Series datasheet.
In addition, on-board resistors may be unsoldered and moved to an alternate location to enable a different connection.
to
Table 4-11 , together with the connector schematics, provide the alternate signals available for use
with Arduino connectors.
T I P
How to read the tables
and
below, the information provided on alternate signals is read as follows:
Pin 3 of Jxx is normally connected to SAMA5D44 PD8 which has PCK0 as an alternate function.
By unsoldering R323 and soldering it on R324 footprint, pin 3 of J15 will be connected to SAMA5D44 PC4 which has SPI0_NPCS1, MCIO_CK and PCK1 as alternate functions.
Figure 4-25.
Jxx Connector
EXP_5V
[9]
[8]
EXP_PD8
EXP_PC4
1
3
Table 4-4.
Pin No.
3
Jxx Connector Signals
SAMA5D44 PIO Muxing Alternates
PD8 PCK0 – – PC4
On-board Alternates
SPI0_NPCS1 MCI0_CK PCK1
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27
Figure 4-26.
J6 Connector
VCC_3V3
[4] EXP_VBAT
[4,10,12,14] NRST_3V3
[4] EXP_5V
4
5
6
7
8
1
2
3
Table 4-5.
Pin No.
1
4
5
2
3
6
7
8
J6 Connector Signals
Signal
EXP_VBAT –
VCC_3V3
NRST_3V3
VCC_3V3
EXP_5V
–
–
–
–
GND
GND
NC
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
On-board Alternates
– –
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
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Figure 4-27.
J7 Connector
[7]
[8]
[8]
[8]
[8]
[8]
[9]
[9]
EXP_PB28
EXP/XPRO_PC27
EXP/XPRO_PC28
EXP/XPRO_PC29
EXP/XPRO_PC30
EXP_PC31
EXP_PE24
EXP_PE5
5
6
7
8
1
2
3
4
Table 4-6.
Pin No.
1
4
5
2
3
6
7
8
J7 Connector Signals
PB28
SAMA5D44 PIO Muxing Alternates
SPI2_NPCS3 TD0 PWMH1
PC27
PC28
PC29
PC30
AD0
AD1
AD2
AD3
SPI0_NPCS1
SPI0_NPCS2
SPI0_NPCS3
–
PWML0
PWML1
PWMFI0
PWMH0
PC31
PE24
PE5
AD4
NCS0
A5
–
RTS3
CTS3
PWMH1
–
–
–
–
–
–
–
–
–
–
On-board Alternates
– –
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
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Figure 4-28.
J8 Connector
[7]
[7]
[7]
[7]
[8]
[8]
[7]
[7]
EXP/XPRO_PB30
EXP/XPRO_PB29
EXP/XPRO_PB26
EXP_PB10
EXP/XPRO_PC0
EXP/XPRO_PC1
EXP/XPRO_PB14
EXP/XPRO_PB15
5
6
7
8
1
2
3
4
Table 4-7.
Pin No.
1
4
5
2
3
6
7
8
J8 Connector Signals
PB30
SAMA5D44 PIO Muxing Alternates
TWCK2 RF0
PB29
PB26
TWD2
PCK0
RD0
RK0
–
PWML1
PWMH0
PB10
PC0
PC1
PB14
PB15
G0_RX2
SPI0_MISO
SPI0_MOSI
G0_TX2
G0_TX3
PCK2
PWMH2
PWML2
SPI2_NPCS1
SPI2_NPCS2
PWML1
ISI_D8
ISI_D9
PWMH0
PWML0
On-board Alternates
–
–
–
–
No DAC available
No DAC available
No CAN available
No CAN available
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Figure 4-29.
J14 Connector
VCC_3V3 EXP_5V
[7]
[14]
EXP/XPRO_PB18
EDBG_SPI_MISO
[7]
[14]
EXP/XPRO_PB20
EDBG_SPI_SCK
SPI1_MISO
S P
NRST_3V3
I 1 _ S P C K
1
3
5
2
4
6
S P I 1 _ M O S I
EXP/XPRO_PB19 [7]
EDBG_SPI_MOSI [14]
Table 4-8.
Pin No.
1
2
3
4
5
6
J14 Connector Signals
SAMA5D44 PIO Muxing Alternates
PB18
5V
PB20
SPI1_MISO
–
SPI1_SPCK
D8
–
D10
–
–
–
PB19 nRST
GND
SPI1_MOSI
–
–
D9
–
–
–
–
–
–
–
–
–
–
–
On-board Alternates
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
EDBG
Alternate
DGI_SPI
–
DGI_SPI
DGI_SPI
–
–
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31
Figure 4-30.
J15 Connector
[9]
[8]
[7]
[9]
EXP_PD8
EXP_PC4
EXP_PB31
EXP_PD14
[9]
[9]
EXP_PE12
EXP_PD18
[8]
[8]
[8]
EXP_PC20
EXP_PC22
[8] EXP_PC24
EXP/XPRO_PC26
[9]
[9]
EXP_PE25
EXP_PD20
[9] EXP_PE28
[9]
[9]
EXP_PD30
EXP_PD22
[7]
[7]
[9]
EXP_PB3
EXP_PB4
EXP_PD24
[14]
[9] EXP_PD28
EDBG_ID_04
[14]
[9] EXP_PD10
EDBG_ID_06
[8] EXP/XPRO_PC3
[9] EXP_PD26
EXP_5V
17
19
21
23
25
27
29
9
11
13
15
1
3
5
7
31
33
35
18
20
22
24
26
28
30
10
12
14
16
2
4
6
8
32
34
36
EXP/XPRO_PB27 [7]
EXP_PD29 [9]
EXP/XPRO_PD15 [9]
EXP_PE13 [9]
EXP_PD19 [9]
EXP_PC19 [8]
EXP_PC21 [8]
EXP_PC23 [8]
EXP/XPRO_PC25 [8]
EXP_PE0 [9]
EXP_PD21 [9]
EXP_PB1 [7]
EXP_PD31 [9]
EXP_PD23 [9]
EXP_PB11 [7]
EXP_PB5 [7]
EXP_PD25 [9]
EXP/XPRO_PD11 [9]
EDBG_ID_05 [14]
EXP_PD9 [9]
EDBG_ID_07 [14]
EXP_PE31 [9]
EXP_PD27 [9]
Table 4-9.
Pin No.
1
2
5
6
3
4
9
10
7
8
11
12
PD14
PD15
PE12
PE13
PC20
PC19
J15 Connector Signals
SAMA5D44 PIO Muxing Alternates
5V
5V
–
–
– –
– –
PD8
PB27
PB31
PD29
PCK0
SPI1_NPCS3
–
SCK1
–
TK0
TF0
DIS
–
PWML0
CTS1
RTS1
A12
A13
ISI_D1
ISI_D0
CDETB
SPI2_SPCK
TIOA1
TIOB1
TF1
TK1
PWMH2
PWML2
PD18
PD19
5V
5V
PC4
–
On-board Alternates
– – –
SPI0_NPCS1 MCI0_CK
– –
PCK1
–
– SENSE0
– SENSE1
–
–
32 SAMA5D4 Xplained Ultra [USER GUIDE]
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29
30
31
32
25
26
27
28
33
34
35
36
Table 4-9.
Pin No.
13
14
15
16
21
22
23
24
17
18
19
20
PB3
PB11
PB4
PB5
PD28
PD11
PD10
PD9
PC26
PC25
PE25
PE0
PE28
PB1
PD30
PD31
J15 Connector Signals (Continued)
SAMA5D44 PIO Muxing Alternates
PC22
PC21
PC24
PC23
ISI_D3
ISI_D2
ISI_D5
ISI_D4
RF1
TD1
RK1
RD1
PCK1
ISI_D7
ISI_D6
NCS1
A0/NBS0
NWAIT
G0_RXCK
TWCK3
TWD3
SCK4
MCI0_CDB
RTS4
SCK2
UTXD1
URXD1
IRQ
CTS4
A19
ISI_PCK
SPI0_NPCS2
G0_TXER
G0_RX3
G0_CRS
G0_COL
SCK0
RTS0
PCK1
CTS2
RTS2
RXD2
TXD2
–
SPI2_MISO
PD20
PD21
– PD23
ISI_VSYNC
PWMH1
ISI_HSYNC
PCK2
–
PD24
PD25
–
PC3
PE31
GND
GND
CTS0
FIQ
SPI0_NPCS0
ADTRG
CDETA
–
PWML3
–
ISI_D11
–
PD26
On-board Alternates
– SENSE2
– SENSE3
– SENSE5
– SENSE6
– SENSE7
–
–
–
–
– SENSE8
–
–
–
–
–
–
–
–
–
–
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
33
Figure 4-31.
J17 Connector
6
5
4
3
2
1
10
9
8
7
EXP/XPRO_PE30 [9]
EDBG_DGI_TWCK [14]
EXP_PB4 [7]
EXP/XPRO_PE29 [9]
EDBG_DGI_TWD [14]
EXP_PB3 [7]
AREF [7]
EXP/XPRO_PB20 [7]
EXP_PE6 [9]
EXP/XPRO_PB18 [7]
EXP_PE7 [9]
EXP/XPRO_PB19 [7]
EXP_PE8 [9]
EXP/XPRO_PB21 [7]
EDBG_SPI_NCS [14]
EXP/XPRO_PE21 [9]
EXP/XPRO_PE22 [9]
Pin No.
10
9
6
5
8
7
2
1
4
3
Table 4-10.
J17 Connector Signals
PE30
PE29
SAMA5D44 PIO Muxing Alternates
DIBN
DIBP
UTXD0
URXD0
TWCK1
TWD1
AREF
GND
–
–
PB20 SPI1_SPCK
PB18 SPI1_MISO
–
–
D10
D8
–
–
PB4 RXD2 ISI_HSYNC
PB3 G0_TXER CTS2 ISI_VSYNC
–
–
– PE6
– PE7
On-board Alternates
G0_CRS
–
–
A6
A7
–
–
TIOA3
TIOB3
–
–
PWMFI1
PB19 SPI1_MOSI
PB21 SPI1_NPCS0
PE21
PE22
A23
A24
D9
D11
– PE8
– –
TIOA4 MCI1_DA1
TIOB4 MCI1_DA2
–
–
A8
–
–
–
TCLK3
–
–
–
PWML3
–
–
–
EDBG
Alternate
DGI_TWI
DGI_TWI
–
–
–
–
–
DGI_SPI
–
–
34 SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
Figure 4-32.
J18 Connector
6
7
8
1
2
3
4
5
EXP_PE23 [9]
EXP/XPRO_PE18 [9]
EDBG_DGI_GPIO0 [14]
EXP/XPRO_PE19 [9]
EDBG_DGI_GPIO1 [14]
EXP_PB22 [7]
EXP/XPRO_PC1 [8]
EXP_PE20 [9]
EDBG_DGI_GPIO2 [14]
EXP_PE15 [9]
EDBG_DGI_GPIO3 [14]
EXP/XPRO_PC26 [8]
EXP_PB1 [7]
EXP/XPRO_PC25 [8]
EXP/XPRO_PC0 [8]
Pin No.
1
2
5
6
3
4
7
8
Table 4-11.
J18 Connector Signals
PE23
PE18
SAMA5D44 PIO Muxing Alternates
A25
A18
TCLK4
TIOA5
MCI1_DA3
MCI1_CK
PE19 A19
PB22 SPI1_NPCS1
PE20
PE15
A20
A15
PC26
PC25
ISI_D7
ISI_D6
TIOB5
D12
TCLK5 MCI1_DA0
SCK3
TWCK3
TWD3
MCI1_CDA
– – – – –
– PC1
TIOA0
UTXD1
URXD1
PB1
On-board Alternates
SPI0_MOSI
G0_RXCK
PWML2
SCK2
ISI_D9
ISI_PCK
PC0 SPI0_MISO PWMH2 ISI_D8
EDBG
Alternate
–
–
–
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
35
Figure 4-33.
J19 Connector
5
6
7
8
1
2
3
4
EXP/XPRO_PE27 [9]
EXP/XPRO_PE26 [9]
EXP/XPRO_PD17 [9]
EXP_PD16 [9]
EXP/XPRO_PD13 [9]
EXP_PD12 [9]
EXP_TWD0_PA30 [7]
EXP/XPRO_PC3 [8]
EXP_TWCK0_PA31 [7]
EXP/XPRO_PC2 [8]
Table 4-12.
Pin No.
1
4
5
2
3
6
7
8
J19 Connector Signals
PE27
SAMA5D44 PIO Muxing Alternates
NWR1/NBS1 TXD4
PE26
PD17
PD16
PD13
NCS2
TXD1
RXD1
TXD0
RXD4
SPI2_NPCS0
DCENB
SPI2_MOSI
DCENA PD12
PA30
PA31
RXD0
TWD0
TWCK0
On-board Alternates
– – – – –
A18
– – – – –
– – – – –
– – – – –
– – – – –
SPI0_NPCS0 PWML3 ISI_D11
SPI0_SPCK PWMH3 ISI_D10
36 SAMA5D4 Xplained Ultra [USER GUIDE]
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4.2.15.3 SAMA5D44 Peripheral Functions Available Through Arduino Headers
provides details on access to the SAMA5D44 internal peripherals through the Arduino headers.
Note:
Only one function at a time can be selected for each pin (refer to Section 4.3.15
in this document and the
PIO controller section in SAMA5D4 Series datasheet).
Table 4-13.
Connector
J14
J7
J8
J17
PC30
PC31
PE24
PE5
PE30
PE29
AREF
GND
PB20
PB18
PB19
PB21
PE21
PE22
PB30
PB29
PB26
PB10
PC0
PC1
PB14
PB15
SAMA5D44 Peripheral Functions Available through the Arduino Headers
SAMA5D44 to Arduino
PB18
3v3/5v
System
Function PCK ISI
– – –
3.3V/5V
SSC SPI TWI
PB20
PB19 nRST
GND
PB28
PC27
PC28
PC29
– – –
– – – nRST
GND
– – –
– – –
TD0 SPI2_NPCS3
UART/
USART ANALOG
– – –
– – AD0
– – AD1
AD2
AREF
GND
–
–
–
–
–
–
–
–
–
–
– – –
– – –
– – –
– – –
– – –
– – –
–
–
– – –
– – –
PCK0
PCK2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
RF0
RD0
RK0
–
–
TWCK2
TWD2
ISI_D10
–
–
SPI0_MOSI
SPI0_SPCK
– – –
ISI_HSYNC
ISI_VSYNC
–
–
–
–
–
–
– –
TWCK1
TWD1
– – –
– – –
RXD2
CTS2
–
–
– – –
– – –
–
–
–
–
–
–
–
–
–
–
AD3
AD4
–
–
–
–
PWMH1
PWML0
PWML1
PWMFI0
–
–
– – –
– – –
– –
–
–
MISC
PWMH0
PWMH1
–
–
– –
SAMA5D4 Xplained Ultra [USER GUIDE]
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37
Table 4-13.
Connector
J18
J19
SAMA5D44 Peripheral Functions Available through the Arduino Headers (Continued)
PC26
PC25
PE27
PE26
PD17
PD16
PD13
PD12
PA30
PA31
SAMA5D44 to Arduino
PE23
PE18
PE19
PB22
PE20
PE15
–
–
–
–
–
–
–
–
–
–
–
–
–
–
PCK
–
–
–
–
–
–
–
–
–
–
–
–
System
Function
–
–
–
–
–
–
ISI_D8
ISI_PCK
–
–
–
–
–
–
ISI_D11
ISI_D10
ISI SSC SPI
– – –
– – –
– – –
ISI_D9 – SPI1_NPCS1
–
–
–
–
SPI2_NPCS1
SPI2_NPCS2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
SPI2_NPCS0
–
SPI2_MOSI
–
SPI0_NPCS0
SPI0_SPCK
TWCK3
TWD3
–
–
–
–
–
–
TWD0
TWCK0
–
–
–
–
TWI
–
–
UART/
USART
– – –
UTXD1
URXD1
TXD4
RXD4
TXD1
RXD1
TXD0
RXD0
–
–
ANALOG
–
–
–
–
–
–
–
–
–
–
MISC
PWMH2
–
–
–
–
–
–
–
PWML3
PWMH3
38 SAMA5D4 Xplained Ultra [USER GUIDE]
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Table 4-13.
Connector
J15
SAMA5D44 Peripheral Functions Available through the Arduino Headers (Continued)
SAMA5D44 to Arduino
5V
5V
PD8
PC19
PC22
PC21
PC24
PC23
PC26
PC25
PE25
PB27
PB31
PD29
PD14
PD15
PE12
PE13
PC20
PE0
PE28
PB1
PD30
PD31
PB3
PB11
PB4
PB5
PD28
–
–
–
–
–
–
–
–
System
Function
5V
5V
–
–
–
–
–
–
–
–
–
–
–
–
–
– –
– PCK1
–
–
–
–
PCK
–
–
PCK0/PC
K1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
– PCK1
– –
–
–
– PCK2
– –
ISI
–
–
–
ISI_D0
ISI_D3
ISI_D2
ISI_D5
ISI_D4
ISI_D7
ISI_D6
–
–
–
–
ISI_D1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
SSC
–
–
TK0
SPI
–
–
–
TWI
–
–
–
UART/
USART
–
–
TXD2
–
–
–
–
–
–
–
–
–
–
–
–
–
RF1
TD1
RK1
RD1
–
–
TF1
TK1
TF0 SPI1_NPCS3
– – –
– –
–
– SCK1
–
–
–
SPI2_SPCK
TWD0
TWCK0
CTS1
RTS1
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
SPI0_MOSI
SPI0_MISO
–
–
–
–
TWCK3
TWD3
–
–
UTXD1
URXD1
SCK4
CTS4
–
–
–
–
SPI0_NPCS0
SPI0_SPCK
– –
SPI0_NPCS2 –
–
–
–
–
–
–
–
–
–
–
–
–
RTS4
SCK2
–
–
CTS2
RTS2
RXD2
TXD2
SCK0
PD11
PD10
PD9
PC3
PE31
GND
GND
–
–
GND
–
–
–
GND
–
–
–
–
–
–
–
–
–
–
ISI_D11
–
–
–
–
–
–
–
–
–
SPI0_NPCS0
–
–
– –
– – –
– –
–
–
–
–
RTS0
CTS0
–
–
–
–
–
ANALOG
–
–
–
MISC
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
– PWMH1
– –
–
–
–
–
–
–
–
–
–
–
–
–
–
PWMH2
PWML2
–
–
–
–
–
–
PWML3
–
–
–
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
39
4.2.15.4 XPRO
The SAMA5D4-XULT board embeds three connectors to interface Xplained PRO wings.
Figure 4-34.
XPRO Connectors
VCC_5V
EXP_5V
XPRO Power
1
3
2
4
VCC_3V3
[14]
[8]
[9]
[8]
[7]
[7]
[8]
[7]
[7]
EDBG_ID_02
EXP/XPRO_PC27
EXP/XPRO_PE21
EXP/XPRO_PC2
EXP/XPRO_PB26
EXP/XPRO_PB29
EXP/XPRO_PC25
EXP/XPRO_PB21
EXP/XPRO_PB18
XPRO EXT1
ID02
AD0
TIOA4
PWMH3
PCK0
TWD2
URXD1
SPI1_NPCS0
SPI1_MISO
9
11
13
5
7
1
3
15
17
19
6
8
2
4
10
12
14
16
18
20
AD1
TIOB4
PWML3
SPI1_NPCS3
TWCK2
UTXD1
SPI1_MOSI
SPI1_SPCK
VCC_3V3
EXP/XPRO_PC28 [8]
EXP/XPRO_PE22 [9]
EXP/XPRO_PC3 [8]
EXP/XPRO_PB27 [7]
EXP/XPRO_PB30 [7]
EXP/XPRO_PC26 [8]
EXP/XPRO_PB19 [7]
EXP/XPRO_PB20 [7]
[14]
[8]
[9]
[8]
[7]
[9]
[9]
[9]
[9]
EDBG_ID_03
EXP/XPRO_PC29
EXP/XPRO_PE18
EXP/XPRO_PC0
EXP/XPRO_PB14
EXP/XPRO_PE29
EXP/XPRO_PE26
EXP/XPRO_PD17
EXP/XPRO_PD11
XPRO EXT2
ID03
AD2
TIOA5
PWMH2
SPI2_NPCS1
TWD1
RXD4
SPI2_NPCS0
SPI2_MISO
9
11
13
5
7
1
3
15
17
19
6
8
2
4
10
12
14
16
18
20
AD3
TIOB5
PWML2
SPI2_NPCS2
TWCK1
TXD4
SPI2_MOSI
SPI2_SPCK
VCC_3V3
EXP/XPRO_PC30 [8]
EXP/XPRO_PE19 [9]
EXP/XPRO_PC1 [8]
EXP/XPRO_PB15 [7]
EXP/XPRO_PE30 [9]
EXP/XPRO_PE27 [9]
EXP/XPRO_PD13 [9]
EXP/XPRO_PD15 [9]
XPRO Connectors
The standard extension headers include common signals. These are male 20-pin/100-mil/right-angled headers
(extension boards feature a female 20-pin straight header).
Figure 4-35.
XPRO Extension Headers
40 SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
4.3
PIO Usage and Interface Connectors
4.3.1
Power Supply
Figure 4-36.
Power Supply Connector J4
Table 4-14.
Pin
1
2
3
Power Supply Connector J4 Signal Description
Mnemonic Signal Description
Center pin
Spring blade
Fixing pin
+5V
GND
Floating
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
41
4.3.2
JTAG/ICE Connector
Figure 4-37.
JTAG J13
2 4 6 8 10 12 14 16 18 20
1 3 5 7 9 11 13 15 17 19
18
19
20
14
15
16
17
Table 4-15.
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
JTAG/ICE Connector J13 Signal Descriptions
Mnemonic
VTref. 3.3V power
Vsupply. 3.3V power
Signal Description
This is the target reference voltage (main 3.3V).
This pin is not connected in SAM-ICE
™
and reserved for compatibility with other equipment. Connected to main 3.3V.
nTRST TARGET RESET - Activelow output signal that resets the target
GND
TDI TEST DATA INPUT - Serial data output line, sampled on the rising edge of the TCK signal
GND
TMS TEST MODE SELECT
GND
TCK TEST CLOCK - Output timing signal, for synchronizing test logic and control register access
GND
JTAG Reset. Output from SAM-ICE to control the Reset signal on the target system.
Common ground
JTAG data input into target CPU
Common ground
JTAG mode set input into target CPU
Common ground
JTAG clock signal into target CPU
RTCK - Input Return test clock signal from the target
Common ground
Some targets having too slow system clock must synchronize the JTAG inputs to internal clocks. In present case such synchronization is unneeded and TCK merely looped back into RTCK.
Common ground GND
TDO JTAG TEST DATA OUTPUT -
Serial data input from the target
GND nSRST RESET
GND
RFU
GND
RFU
GND
JTAG data output from target CPU
Common ground
Active-low reset signal. Target CPU reset signal.
Common ground
This pin is not connected in SAM-ICE.
Common ground
This pin is not connected in SAM-ICE.
Common ground
42 SAMA5D4 Xplained Ultra [USER GUIDE]
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4.3.3
EDBG USB Type Micro-AB
Figure 4-38.
EDBG USB Type Micro-AB Connector J20
1 2 3 4 5
Table 4-16.
Pin
1
2
3
4
5
EDBG USB Type Micro-AB Connector J20 Signal Descriptions
Mnemonic Signal Description
Vbus
DM
5V power
Data minus
DP
ID
GND
Data plus
On-the-go identification
Common ground
4.3.4
USB Type A Dual Port
Figure 4-39.
USB Type A Dual Port J16
Table 4-17.
Pin
A1
A2
A3
A4
B1
B2
B3
B4
Mechanical pins
USB Type A Dual Port J16 Signal Descriptions
Mnemonic Signal Description
Vbus - USB_A
DM - USB_A
5V power
Data minus
DP - USB_A
GND
Vbus - USB_A
DM - USB_A
DP - USB_A
GND
Data plus
Common ground
5V power
Data minus
Data plus
Common ground
– Shield
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43
4.3.5
USB Micro-AB
Figure 4-40.
USB Host/Device Micro-AB Connector J11
1 2 3 4 5
Table 4-18.
Pin
1
2
3
4
5
USB Host/Device Micro-AB Connector J11 Signal Descriptions
Mnemonic
Vbus
DM
Signal Description
5V power
Data minus
DP
ID
GND
Data plus
On-the-go identification
Common ground
4.3.6
DEBUG Connector
Figure 4-41.
DEBUG Connector J1
Table 4-19.
Pin
1
4
5
2
3
6
DEBUG Connector J1 Signal Descriptions
Mnemonic
CTS3
TXD3 (Transmitted Data)
RXD3 (Received Data)
Power
RTS3
GND
PIO
PE5
PE17
PE16
–
PE24
–
Signal Description
Handshake input
RS232 serial data input signal
RS232 serial data output signal
5V/3.3V (selected by resistors)
Handshake output
Common ground
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4.3.7
SD/MMC Plus MCI0
Figure 4-42.
SD/MMC Socket J24
Table 4-20.
Pin
1
4
5
2
3
10
11
12
13
8
9
6
7
14
15
16
–
–
–
–
CD
DAT0
DAT1
DAT2
SD/MMC Socket J24 Signal Descriptions
Mnemonic
DAT3
CMD
VSS
VCC
CLK
WP
VSS
VSS
PIO
PE23
PE19
–
–
PE18
PE3
PE20
Signal Description
Data Bit
Command Line
Common ground
Supply Voltage 3.3V
Clock / Command Line
Card Detect
Data Bit
PE21
PE22
Data Bit
Data Bit
Not connected Data Bit
Not connected Data Bit
Not connected Data Bit
Not connected Data Bit
GND
–
–
Write Protection (deactivated)
Common ground
Common ground
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45
4.3.8
MicroSD MCI1
Figure 4-43.
MicroSD Socket J9
Table 4-21.
Pin
1
2
5
6
3
4
9
10
7
8
MicroSD Socket J9 Signal Descriptions
Mnemonic
DAT2
CD/DAT3
CMD
VCC
CLK
VSS
DAT0
DAT1
CD
GND
4.3.9
Ethernet ETH0 RJ45 Socket J12
Figure 4-44.
Ethernet RJ45 Socket J12
1 2 3 4 5 6 7 8
PIO
PC8
PC9
PC5
–
PC4
–
PC6
PC7
PE2
–
Signal Description
Data Bit 2
Card Detect / Data Bit 3
Command Line
Supply Voltage 3.3V
Clock / Command Line
Common ground
Data Bit 0
Data Bit 1
Card Detect
Common ground
RJ-45
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4.3.10 LCD Connector J2
Figure 4-45.
LCD Connector J2
10
11
12
13
8
9
6
7
4
5
2
3
Table 4-22.
Pin
1
LCD Connector J2 Signal Descriptions
Signal
ID_SYS
PIO
PE15 / ID00
Signal
ID
–
LCDDAT0
LCDDAT1
LCDDAT2
GND
PA0
PA1
PA2
GND
D0
D1
D2
LCDDAT3
–
LCDDAT4
LCDDAT5
LCDDAT6
LCDDAT7
–
LCDDAT8
PA3
GND
PA4
PA5
PA6
PA7
GND
PA8
D3
GND
D4
D5
D6
D7
GND
D8
LCDDAT9
LCDDAT10
LCDDAT11
–
LCDDAT12
LCDDAT13
LCDDAT14
LCDDAT15
–
LCDDAT16
LCDDAT17
LCDDAT18
LCDDAT19
–
LCDDAT20
LCDDAT21
LCDDAT22
26
27
28
29
30
22
23
24
25
18
19
20
21
14
15
16
17
PA9
PA10
PA11
GND
PA12
PA13
PA14
PA15
GND
PC14
PC13
PC12
PC11
GND
PC10
PC15
PE27
GND
D16
D17
D18
D19
GND
D20
D21
D22
D9
D10
D11
GND
D12
D13
D14
D15
Data line
GND
Data line
Data line
Data line
Data line
GND
Data line
Data line
Data line
Data line
GND
Data line
Data line
Data line
Data line
Data line
Data line
Data line
GND
Data line
Data line
Data line
RGB Interface Function
Extension module identification
GND
Data line
Data line
Data line
Data line
GND
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Alternate
EDBG_ID_01
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47
Table 4-22.
Pin
31
32
33
34
35
36
37
38
39
41
42
43
44
45
46
47
48
–
LCD Connector J2 Signal Descriptions (Continued)
Signal
LCDDAT23
LCDPCK
LCDVSYNC
LCDHSYNC
LCDDEN
SPI1_SPCK
SPI1_MOSI
SPI1_MISO
40 SPI1_NPCS2
LCDDISP
TWD0
TWCK0
GPIO
GPIO
LCDPWM
RESET
Main_5v/3v3
PIO
PE28
GND
PA28
PA26
PA27
PA29
PB20
PB19
PB18
PB23
PA25
PA30
PA31
PE9
PE10
PA26
–
VCC
Signal
D23
GND
PCLK
VSYNC/CS
SPI_MISO
SPI_CS
ENABLE
TWI_SDA
TWI_SCL
IRQ1
IRQ2
PWM
RGB Interface Function
Data line
GND
Pixel clock
Vertical sync
HSYNC/WE Horizontal sync
DATA_ENABLE/RE Data enable
SPI_SCK
SPI_MOSI
RESET
VCC
–
–
Alternate
–
–
–
–
–
–
–
–
Display enable signal
I2C data line (maXTouch ® )
I2C clock line (maXTouch) maXTouch interrupt line
Interrupt line for other I2C devices
Backlight control
Reset for both display and maXTouch –
3.3V or 5V supply (0R) –
–
–
–
–
–
–
AD3/YM PC30
AD2/YP PC29
AD1/XM PC28
AD0/XP PC27
49 Main_5v/3v3
50 GND
VCC
GND
VCC
GND
3.3V or 5V supply (0R)
GND
–
–
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4.3.11 HDMI Connector
Figure 4-46.
HDMI Type A Female Connector J5
Table 4-23.
HDMI Type A Female Connector J5 Signal Descriptions
Signal Pin No.
TMDS Data 2+
TMDS Data 2-
1
3
2
4
TMDS Data 1 Shield
TMDS Data 0+
TMDS Data 0-
TMDS Clock Shield
5
7
9
11
6
8
10
12
CEC (not connected)
SCL
GND
Hot Plug Detect
13
15
17
19
14
16
18
20
Signal
TMDS Data 2 Shield
TMDS Data 1+
TMDS Data 1-
TMDS Data 0 Shield
TMDS Clock +
TMDS Clock -
Not connected
SDA
+5V
DDC/CEC (GND)
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49
4.3.12 XPRO Power Connector
Figure 4-47.
XPRO Power Connector J21
2 4
1 3
Table 4-24.
XPRO Power Connector J21 Signal Descriptions
Signal Pin No.
EXP_5V 1
VCC_5V 3
2
4
4.3.13 XPRO Ext1 Connector
Figure 4-48.
XPRO Ext1 Connector J22
2 4 6 8 10 12 14 16 18 20
1 3 5 7 9 11 13 15 17 19
Signal
GND
VCC_3v3
Table 4-25.
TIOA4
PWMH3
PCK0
TWD2
URXD1
SPI1_NPCS0
XPRO Ext1 Connector J22 Signal Descriptions
Function
AD0
SAMA5D44
Pin
PC27
PE21
PC2
PB26
PB29
PC25
PB21
XPRO Signal
ID
ADC(+)
GPIO
PWM(+)
IRQ/GPIO
TWI_SDA
UART_RX
SPI_SS_A
1
3
5
7
9
11
13
15
Pin No.
10
12
14
16
6
8
2
4
SPI1_MISO PB18 SPI_MISO
– –
Note: 1. Used by the EDBG interface.
GND
17
19
18
20
XPRO Signal
GND
ADC(-)
GPIO
PWM(-)
SPI_SS_B/GPIO
TWI_SCL
UART_TX
SPI_MOSI
SPI_SCK
VCC 3v3
SAMA5D44
Function Pin
–
PC28
–
AD1
PE22
PC3
PB27
PB30
TIOBA4
PWML3
SPI1_NPCS3
TWCK2
PC26
PB19
PB20
–
UTXD1
SPI1_MOSI
SPI1_SPCK
–
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4.3.14 XPRO Ext2 Connector
Figure 4-49.
XPRO Ext2 Connector J23
2 4 6 8 10 12 14 16 18 20
1 3 5 7 9 11 13 15 17 19
Table 4-26.
XPRO Ext2 Connector J23 Signal Descriptions
Function
ID03
AD2
SAMA5D44
Pin
PC29
XPRO Signal
ID
ADC(+)
Pin No.
TIOA5
PWMH2
SPI2_NPCS1
TWD1
RXD4
SPI2_NPCS0
PE18
PC0
PB14
PE29
PE26
PD17
GPIO
PWM(+)
IRQ/GPIO
TWI_SDA
UART_RX
SPI_SS_A
5
7
9
11
13
15
1
3
10
12
14
16
6
8
2
4
SPI2_MISO PD11 SPI_MISO
– –
Note: 1. Used by the EDBG interface.
GND
17
19
18
20
XPRO Signal
GND
ADC(-)
GPIO
PWM(-)
SPI_SS_B/GPIO
TWI_SCL
UART_TX
SPI_MOSI
SPI_SCK
VCC 3v3
SAMA5D44
Function Pin
–
PC30
–
AD3
PE19
PC1
PB15
PE30
TIOB5
PWML2
SPI2_NPCS2
TWCK1
PE27
PD13
PD15
–
TXD4
SPI2_MOSI
SPI2_SPCK
–
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51
4.3.15 PIO Usage
The following tables provide the use of different PIO lines on the SAMA5D4-XULT, sorted by PIO lines.
Most of the signals can also be configured as either inputs or outputs from/to the processor.
Table 4-27.
PIO A Pin Assignment and Signal Description
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
Power Rail
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
Primary Signal
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
GPIO
GPIO
GPIO_CLK
GPIO
GPIO
GPIO
GPIO_CLK2
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
I/O Type
GPIO
GPIO
GPIO_CLK
GPIO_CLK
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
LCDDAT14
LCDDAT15
LCDDAT16
LCDDAT17
LCDDAT18
LCDDAT19
LCDDAT20
LCDDAT21
LCDDAT22
LCDDAT23
LCDPWM
LCDDISP
LCDVSYNC
LCDHSYNC
LCDPCK
LCDDEN
TWD0
TWCK0
Peripheral A
Signal
LCDDAT0
LCDDAT1
LCDDAT2
LCDDAT3
LCDDAT4
LCDDAT5
LCDDAT6
LCDDAT7
LCDDAT8
LCDDAT9
LCDDAT10
LCDDAT11
LCDDAT12
LCDDAT13
G1_MDC
G1_MDIO
PCK0
TD0
PWMH0
PWML0
PWMH1
PWML1
–
–
G1_TX0
G1_TX1
–
–
G1_RX2
G1_RX3
G1_TX2
G1_TX3
Peripheral B
Signal
–
–
G1_TXCK
G1_RXCK
G1_TXEN
G1_TXER
G1_CRS
–
–
–
G1_RXDV
G1_RXER
G1_RX0
G1_RX1
–
–
NTRST
–
–
–
–
–
SPI1_NPCS1
SPI1_NPCS2
SPI1_NPCS3
–
–
–
–
–
–
–
–
–
–
–
–
–
TCK
–
Peripheral C
Signal
TMS
–
–
–
–
–
52 SAMA5D4 Xplained Ultra [USER GUIDE]
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Table 4-28.
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
Power Rail
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO_CLK
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO_CLK
GPIO
GPIO
GPIO
GPIO
GPIO
I/O Type
GPIO_CLK
GPIO_CLK
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO_CLK
GPIO
GPIO
GPIO
GPIO
PIO B Pin Assignment and Signal Description
G0_TX1
G0_TX2
G0_TX3
G0_MDC
G0_MDIO
SPI1_MISO
SPI1_MOSI
SPI1_SPCK
SPI1_NPCS0
SPI1_NPCS1
SPI1_NPCS2
DRXD
DTXD
PCK0
SPI1_NPCS3
SPI2_NPCS3
TWD2
TWCK2
–
Peripheral A
Signal
G0_TXCK
G0_RXCK
G0_TXEN
G0_TXER
G0_CRS
G0_COL
G0_RXDV
G0_RXER
G0_RX0
G0_RX1
G0_RX2
G0_RX3
G0_TX0
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
Primary Signal
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
PB10
PB11
PB12
PB13
PB14
D15
RK0
TK0
TD0
D11
D12
D13
D14
–
SPI2_NPCS1
SPI2_NPCS2
–
–
D8
D9
D10
RD0
RF0
TF0
Peripheral B
Signal
–
SCK2
–
CTS2
RXD2
TXD2
–
–
–
–
PCK2
RTS2
–
–
–
–
TDI
TDO
PWMH0
PWML0
PWMH1
–
PWMH0
PWML0
–
–
–
–
–
PWML1
–
–
Peripheral C
Signal
–
ISI_PCK
–
ISI_VSYNC
ISI_HSYNC
PCK2
–
–
–
–
PWML1
PWMH1
–
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53
Table 4-29.
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
Power Rail
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
GPIO
GPIO
GPIO
GPIO
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
I/O Type
GPIO
GPIO
GPIO_CLK
GPIO
MCI_CLK
GPIO
GPIO
PIO C Pin Assignment and Signal Description
NRD/NANDOE
NWE/NANDWE
NCS3
NANDRDY
A21/NANDALE
A22/NANDCLE
ISI_D0
ISI_D1
ISI_D2
ISI_D3
ISI_D4
ISI_D5
ISI_D6
ISI_D7
AD0
AD1
AD2
AD3
AD4
Peripheral A
Signal
SPI0_MISO
SPI0_MOSI
SPI0_SPCK
SPI0_NPCS0
SPI0_NPCS1
D4
D5
D6
D7
D0
D1
D2
D3
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
Primary Signal
PC0
PC1
PC2
PC3
PC4
PC5
PC6
PC7
PC8
PC9
PC10
PC11
PC12
PC13
PC14
MCI0_DA7
–
–
–
–
–
TK1
TF1
TD1
RF1
RD1
RK1
TWD3
TWCK3
SPI0_NPCS1
SPI0_NPCS2
SPI0_NPCS3
–
–
Peripheral B
Signal
PWMH2
PWML2
PWMH3
PWML3
MCI0_CK
MCI0_CDA
MCI0_DA0
MCI0_DA1
MCI0_DA2
MCI0_DA3
MCI0_DA4
MCI0_DA5
MCI0_DA6
–
–
–
PCK1
URXD1
UTXD1
PWML0
PWML1
–
–
–
–
–
–
–
–
PWMFI0
PWMH0
PWMH1
–
–
–
–
–
–
–
–
Peripheral C
Signal
ISI_D8
ISI_D9
ISI_D10
ISI_D11
PCK1
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Table 4-30.
PIO D Pin Assignment and Signal Description
PIOD Mode Secure
Power Rail
VDDIOP
I/O Type
GPIO_CLK
Primary Signal
PD8
Peripheral A
Signal
PCK0
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
VDDIOP
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
GPIO
PD9
PD10
PD11
PD12
PD13
PD14
PD15
PD16
FIQ
CTS0
RTS0
RXD0
TXD0
CTS1
RTS1
RXD1
VDDIOP
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
VDDANA
VDDIOP
VDDIOP
VDDIOP
VDDIOP
GPIO
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO_ANA
GPIO_CLK
GPIO_CLK
GPIO
GPIO_CLK
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
–
–
–
–
TXD1
–
–
–
–
–
–
SCK0
SCK1
–
SPI0_NPCS2
SENSE3
SENSE4
SENSE5
SENSE6
SENSE7
SENSE8
SENSE9
–
DIS
–
PCK1
Peripheral B
Signal
–
–
CDETA
SPI2_MISO
DCENA
SPI2_MOSI
CDETB
SPI2_SPCK
DCENB
SPI2_NPCS0
SENSE0
SENSE1
SENSE2
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Peripheral C
Signal
–
–
–
–
–
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55
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOP
VDDIOP
VDDIOP
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
Power Rail
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
VDDIOM
EBI
EBI
EBI
EBI
EBI
EBI
DIB
DIB
GPIO
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
EBI
I/O Type
MCI_CLK
EBI
EBI
EBI
EBI
EBI
EBI
Table 4-31.
PIO E Pin Assignment and Signal Description
A23
A24
A25
NCS0
NCS1
NCS2
NWR1/NBS1
NWAIT
A17
A18
A19
A20
A13
A14
A15
A16
DIBP
DIBN
ADTRG
Peripheral A
Signal
A0/NBS0
A1
A2
A3
A4
A9
A10
A11
A12
A5
A6
A7
A8
PE23
PE24
PE25
PE26
PE27
PE28
PE29
PE30
PE31
PE15
PE16
PE17
PE18
PE19
PE20
PE21
PE22
Primary Signal
PE0
PE1
PE2
PE3
PE4
PE5
PE6
PE7
PE8
PE9
PE10
PE11
PE12
PE13
PE14
TIOA4
TIOB4
TCLK4
RTS3
SCK4
RXD4
TXD4
RTS4
TIOB1
TCLK1
SCK3
RXD3
TXD3
TIOA5
TIOB5
TCLK5
URXD0
UTXD0
–
Peripheral B
Signal
MCI0_CDB
MCI0_DB0
MCI0_DB1
MCI0_DB2
MCI0_DB3
CTS3
TIOA3
TIOB3
TCLK3
TIOA2
TIOB2
TCLK2
TIOA1
PWML2
PWMH3
TIOA0
TIOB0
TCLK0
MCI1_CK
MCI1_CDA
MCI1_DA0
MCI1_DA1
MCI1_DA2
MCI1_DA3
–
IRQ
A18
–
A19
TWD1
TWCK1
–
Peripheral C
Signal
CTS4
–
–
–
–
–
–
PWMFI1
PWML3
–
–
–
PWMH2
56 SAMA5D4 Xplained Ultra [USER GUIDE]
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4.4
SAMA5D4-XULT Board Schematics
This section contains the following schematics:
SAMA5D44 - SYS, PIOD, and PIOE
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
57
Figure 4-50.
Block diagram
58 SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
Expansion & XPRO Connectors
Figure 4-51.
PIO Muxing Table
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
59
Figure 4-52.
Power Supply
2
1
2
1
2
1
2
1
2
1
1
1
1
1
1
VCC GND
2
R19 R19 10K 10K
R18 R18 10K 10K
60 SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
EP
GP2
GP1
GP3
GA
14
28
29
2
33
Figure 4-53.
SAMA5D44 - Power
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
61
Figure 4-54.
SAMA5D44 - DDR2
G7
G3
G1
G9
C3
C1
A9
C7
E9
C9
M9
J9
E1
A1
R1
VDD2
VDD1
VDD3
VDD5
VDD4
VDDQ4
VDDQ3
VDDQ5
VDDQ2
VDDQ1
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ10
F8
F2
E7
H2
D8
D2
B2
H8
B8
A7
N1
J3
P9
E3
A3
VSS3
VSS2
VSS1
VSS5
VSS4
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ1
VSSQ3
VSSQ8
VSSQ7
VSSQ9
VSSQ10
G7
G3
G1
G9
C3
C1
A9
C7
E9
C9
M9
J9
E1
A1
R1
VDD2
VDD1
VDD3
VDD5
VDD4
VDDQ4
VDDQ3
VDDQ5
VDDQ2
VDDQ1
VDDQ9
VDDQ8
VDDQ7
VDDQ6
VDDQ10
B2
H8
H2
D8
D2
B8
A7
F8
F2
E7
N1
J3
P9
E3
A3
VSS3
VSS2
VSS1
VSS5
VSS4
VSSQ5
VSSQ4
VSSQ6
VSSQ2
VSSQ1
VSSQ3
VSSQ8
VSSQ7
VSSQ9
VSSQ10
62 SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
Figure 4-55.
SAMA5D44 - PIOA and PIOB
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
63
Figure 4-56.
SAMA5D44 - PIOC and Flash
2
1
R279 R279 10K 10K
2
1
64 SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
R372 R372
R399 R399 DNP(10K) DNP(10K)
10K 10K
Figure 4-57.
SAMA5D44 - SYS, PIOD, and PIOE
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
65
Figure 4-58.
JTAG, USB, DEBUG, and LCD
R11 R11
R12 R12
R15 R15
R10 R10
R14 R14
R13 R13 DNP(0R) DNP(0R)
68K 68K
68K 68K
DNP(68K) DNP(68K)
DNP(68K) DNP(68K)
DNP(0R) DNP(0R)
66 SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
6
8
SHD SHD
7
11
1
1
1
1
Figure 4-59.
HDMI
R30 R30 68K 68K
48
49
54
52
71
50
2
1
72
HPD
INT
SDA
SCL
CI2CA
CEC_A
CEC_D
DDCSCL
DDCSDA ePAD
VDDQ
TMODE
70
55
73
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
67
Figure 4-60.
Ethernet_ETH0_10/100M
R378 R378
R381 R381
R349 R349
10K 10K
10K 10K
10K 10K
R379 R379
R380 R380
R368 R368
R350 R350
R361 R361
10K 10K
10K 10K
10K 10K
10K 10K
10K 10K
2
1 4
3
68 SAMA5D4 Xplained Ultra [USER GUIDE]
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11
10
9
12
Figure 4-61.
HSMCI
1
R392 R392
R390 R390
R344 R344
R386 R386
R340 R340
R337 R337
68K 68K
68K 68K
10K 10K
10K 10K
68K 68K
68K 68K
R138 R138
R172 R172
R141 R141
R166 R166
R142 R142
R163 R163
R194 R194 10K 10K
68K 68K
68K 68K
68K 68K
68K 68K
10K 10K
DNP(68K) DNP(68K)
SAMA5D4 Xplained Ultra [USER GUIDE]
Atmel-44005C-ATARM-SAMA5D4-Xplained-Ultra-User Guide_11-Aug-15
69
Figure 4-62.
EDBG
TARGET_JTAG_TDO
TARGET_JTAG_TCK
TARGET_JTAG_TMS
TARGET_JTAG_TDI
EDBG_XOUT
EDBG_XIN
PC02
PC01
PC03
PC05
PC04
B7
A6
A7
K6
K5
A5
PC00 / PX14
PB06
PB04
PB07
PB02
PB01
PB00
PB03
PB11
PB10
PB09
PB08
C6
D6
D7
C5
C1
D5
B2
B1
B3
A3
C4
R131 R131 470R 470R
R56 R56
R412 R412 470R 470R
100K 1% 100K 1%
2.2K 1% 2.2K 1%
1K 1K
1K 1K
1K 1K
1K 1K
1K 1K
1K 1K
1K 1K
2.2K 1% 2.2K 1%
R108 R108
R110 R110
R109 R109
R103 R103
R102 R102
R105 R105
R106 R106
R415 R415
R414 R414
2
1
GNDCORE
VDDCORE
VDDIN_1
GNDANA
VDDANA
H8
J6
D9
F10
E10
GNDPLL
VDDIN_2
E6
C8
C3
F5
E2
H3
B5
E5
B6
J5
F6
F2
B10
D10
VDDIO_5
VDDIO_4
VDDIO_6
VDDIO_2
VDDIO_1
VDDIO_3
GNDIO_5
GNDIO_4
GNDIO_6
GNDIO_2
GNDIO_1
GNDIO_3
3
IO2 IO2
4
VCC VCC
IO1 IO1
2
GND GND
1
6
8
SHD SHD
7
11
70 SAMA5D4 Xplained Ultra [USER GUIDE]
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Figure 4-63.
Expansion and XPRO Connectors
R240 R240
R242 R242 DNP(0R) DNP(0R)
DNP(0R) DNP(0R)
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71
5.
Revision History
In the tables that follow, the most recent version of the document appears first.
Table 5-1.
SAMA5D4 Xplained Ultra User Guide Rev. 44005C Revision History
Doc. Date Changes
11-Aug-15
Updated
Modified
Modified
Section 4.2.2.2 “Power-up and Power-down Considerations” (title and content)
Table 5-2.
SAMA5D4 Xplained Ultra User Guide Rev. 44005B Revision History
Doc. Date Changes
28-Feb-15
Minor formatting and editorial changes throughout
Table 4-3 “DDR_CALN and DDR_CALP”
: added column header “Memory Type”
: corrected “two voltage lines are available: 3.3V by default and 5 VCC” to read
“two voltage lines are available: 3.3V and 5 VCC (default)”
Table 4-13 “SAMA5D44 Peripheral Functions Available through the Arduino Headers”
: changed column header “SAMA5D4 to Arduino” to “SAMA5D44 to Arduino”; added column header “System Function”
Table 4-20 “SD/MMC Socket J24 Signal Descriptions” : defined mnemonic for pins 15 and 16 as “VSS”
Table 4-21 “MicroSD Socket J9 Signal Descriptions”
: for pin 9, changed mnemonic from “CARD DETECT” to
“CD”; for pin 10, changed mnemonic from “PGND” to “GND”
Table 5-3.
SAMA5D4 Xplained Ultra User Guide Rev. 44005 Revision History
Doc. Rev.
Changes
44005A First issue.
72 SAMA5D4 Xplained Ultra [USER GUIDE]
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