TM-11-6625-2814-14-and-P
TM 11-6625-2814-14&P
TECHNICAL MANUAL
OPERATOR’S, ORGANIZATIONAL, DIRECT SUPPORT,
AND GENERAL SUPPORT MAINTENANCE
(INCLUDING REPAIR PARTS AND SPECIAL TOOLS LIST)
FOR
PATTERN GENERATOR PG-404
(STELMA MODEL PG-404)
HEADQUARTERS, DEPARTMENT OF THE ARMY
17 APRIL 1981
WARNING
Adequate ventilation should be provided while using TRICHLOROTRIFLUOROETHANE.
Prolonged breathing of vapor should be avoided. The solvent should not be used near heat or
on flame; the products of decomposition are toxic and irritating.
Since
TRICHLOROTRIFLUOROETHANE dissolves natural oils, prolonged contact with skin should be
avoided. When necessary, use gloves which the solvent cannot penetrate. If the solvent is taken
internally, consult a physician immediately.
CAUTION
Do not make more than one input connection at a time. Use only the appropriate input jack, and
leave the other input jack unconnected.
TM 11-6625-2814-14&P
This manual contains copyright material reproduced by permission of Stelma, Inc.
TECHNICAL MANUAL
}
No. 11-6625-2814-14&P
HEADQUARTERS
DEPARTMENT OF THE ARMY
WASHINGTON, DC, 17 April 1981
OPERATOR'S, ORGANIZATIONAL, DIRECT SUPPORT,
AND GENERAL SUPPORT MAINTENANCE
(INCLUDING REPAIR PARTS AND SPECIAL TOOLS LIST)
FOR
PATTERN GENERATOR PG-404
(STELMA MODEL PJ-404)
Current as of 24 September 1980
REPORTING ERRORS AND RECOMMENDING IMPROVEMENTS
You can help improve this manual. If you find any mistakes or if you know of a way to improve the
procedures, please let us know. Mail your letter, DA Form 2028 (Recommended Changes to Publications and
Blank Forms), or DA Form 2028-2 located in back of this manual direct to Commander, US Army
Communications and Electronics Materiel Readiness Command, ATTN.: DRSEME-MQ, Fort Monmouth, NJ
07703.
In either case, a reply will be furnished direct to you.
Table of Contents
Paragraph Page
INTRODUCTION
General
Scope .................................................................................................................................... 1-1
1-1
Index of Publications .............................................................................................................. 1-2
1-1
Maintenance Forms, Records, and Reports ............................................................................ 1-3
1-1
Reporting Equipment Improvement Recommendations (EIR) ................................................. 1-4
1-1
Administrative Storage ........................................................................................................... 1-5
1-1
Destruction of Army Electronics Materiel ................................................................................ 1-6
1-1
II. Description and Data
Purpose and Use.................................................................................................................... 1-7
1-1
Description............................................................................................................................. 1-8
1-1
CHAPTER 2. SERVICE UPON RECEIPT AND INSTALLATION
SECTION I. Preparation for Use
Unpacking.............................................................................................................................. 2-1
2-1
Electrical Connections............................................................................................................ 2-2
2-1
II. Installation Instructions
Operating the Pattern Generator............................................................................................. 2-3
2-1
Preliminary Setup................................................................................................................... 2-4
2-2
Operating Procedures ............................................................................................................ 2-5
2-2
Interpreting Indications ........................................................................................................... 2-6
2-2
Battery Charging Procedure ................................................................................................... 2-7
2-3
CHAPTER 3 PRINCIPLES OF OPERATION
General.................................................................................................................................. 3-1
3-1
Overall Function Description .................................................................................................. 3-2
3-1
Time Base Generator ............................................................................................................. 3-3
3-1
Distortion Generator............................................................................................................... 3-4
3-1
Address Counter .................................................................................................................... 3-5
3-4
Fox Message Generator ......................................................................................................... 3-6
3-4
Shift Register ......................................................................................................................... 3-7
3-4
Output Circuits ....................................................................................................................... 3-8
3-5
Polar Output Circuit................................................................................................................ 3-9
3-5
Power Supply Inverter ............................................................................................................ 3-10
3-5
High-Level Output Circuit ....................................................................................................... 3-11
3-5
Battery Test Circuit................................................................................................................. 3-12
3-6
This manual is an authentication of the manufacturer’s commercial literature which, through usage has been found to cover
the data required to operate and maintain this equipment. Since the manual has not been prepared in accordance with
military specifications and AR 310-3, the format has not been structured to consider levels of maintenance.
CHAPTER 1.
SECTION I.
i
TM 11-6625-2814-14&P
Paragraph
MAINTENANCE INSTRUCTIONS
Maintenance Practices ........................................................................................................... 4-1
Test Equipment Required ....................................................................................................... 4-2
Performance Test................................................................................................................... 4-3
Repair .................................................................................................................................... 4-4
Time Base Oscillator Frequency Adjustment .......................................................................... 4-5
Strapping Option .................................................................................................................... 4-6
APPENDIX A. REFERENCES....................................................................................................................... 4-6
APPENDIX B. COMPONENTS OF END ITEM LIST (Not applicable)
APPENDIX C ADDITIONAL AUTHORIZATION LIST (Not applicable)
APPENDIX D. MAINTENANCE ALLOCATION
SECTION
I Introduction............................................................................................................................
II. Maintenance Allocation Chart for Pattern Generator PG -404 .................................................
III. Tool and Test Equipment Requirements for Pattern Generator PG-404 ..................................
APPENDIX E REPAIR PARTS LIST
SECTION
I General..................................................................................................................................
II. Parts Number-National Stock Number Cross Reference Index ................................................
APPENDIX F EXPENDABLE SUPPLIES AND MATERIALS LIST (Not applicable)
Page
CHAPTER 4.
4-1
4-1
4-2
4-3
4-7
4-7
4-7
D-1
D-3
D-4
E-1
E-5
LIST OF ILLUSTRATIONS
Figure
1-1
2-1
3-1
3-2
4-1
4-2
4-3
4-4
4-5
FO-1
FO-2
Title
Pattern Generator, Model PG-404 ......................................................................................................
Pattern Generator--Front Top, and Back Views...................................................................................
Pattern Generator, Block Diagram......................................................................................................
Pattern Generator, Timing Diagram....................................................................................................
Pattern Generator, Wiring Diagram ....................................................................................................
Timing and Data Register Assembly A, Component Location Diagram ...............................................
Distortion and Message Generator Assembly A2, Component Location Diagram ................................
Pattern Generator, Top View, Component Location ............................................................................
Location Of Strapping Terminal and Resistor R23 Through R26 Assembly .........................................
Timing and data Register Assembly A1, Schematic Diagram..............................................................
Distortion and Message Generator Assembly A2, Schematic Diagram................................................
ii
Page
0-1
2-4
3-2
3-3
4-5
4-5
4-6
4-9
4-9
Located in
back, of
manual
TM 11-6625-2814-14&P
Figure 1-1. Pattern Generator Model PG-404.
0-1
TM 1I-6625-2814-14&P
CHAPTER 1
INTRODUCTION
Section I. GENERAL
Report (DISREP) (SF 361) as prescribed in AR 551-1.
Scope
38/NAVSUPINST 4610.33BAFR 75-18/MCO P4610.19C
This manual describes Pattern Generator (Stelma Model
and DLAR 4500.15.
PG-404) as a compact, portable, alternating current
battery-operated test set that generates various test
signal. This manual provides instructions for operation,
1-4.
Reporting
Equipment
Improvement
maintenance, and performance testing. Throughout this
Recommendations (EIR)
manual, the PG-404 is referred to as Pattern Generator.
If your Pattern Generator needs improvement, let us
know. Send us an EIR. You, the user, are the only one
1-2.
Indexes of Publications
who can tell us what you don't like about your equipment.
Let us know why you don’t like the design. Tell us why a
a. DA Pam 310-4. Refer to the latest edition
procedure is hard to perform. Put it on an SF 368
of DA Pan 310-4 to determine whether there are new
(Quality Deficiency Report). Mail it to Commander, US
editions, changes, or additional publications pertaining to
Army Communications and Electronics Materiel
the equipment.
Readiness Command, ATTN: DRSEL-ME-MQ, Fort
b. DA Pam 310-7 Refer to DA Pam 310-7 to
Monmouth, NJ 07703. Well send you a reply.
determine whether there are modification work orders
(MWO's) pertaining to the equipment.
1-5.
Administrative Storage
Administrative storage of equipment issued to and used
1-3.
Maintenance Forms, Records, and Reports
by Army activities will have preventive maintenance
a. Reports of Maintenance and Unsatisfactory
performed before storing.
When removing the
Equipment.
Department of the Army forms and
equipment
from
administrative
storage
, the performance
procedures used for equipment maintenance will be
test and adjustment procedure should be performed to
those prescribed by TM 38-750, The Army Maintenance
assure operational readiness. Original packing case may
Management System.
be used when repacking equipment for shipment for
b. Report
of
Item
and
Packaging
repair.
Discrepancies. Fill out and forward SF 364 (Report of
Discrepancy (ROD)) as prescribed in AR 735-11-2/DLAR
1-6.
Destruction of Army Electronics Materiel
4140.55/NAVMATINST
4355.73/AFR
400-54/MCO
Destruction of Army electronics materiel to prevent
4430.3E.
enemy use shall be in accordance with TM 750-244-2.
c. Discrepancy in Shipment Report (DISREP)
(SF 361). Fill out and forward Discrepancy in Shipment
Section II. DESCRIPTION AND DATA
1-7.
Purpose and Use
The Pattern Generator PG-404 is a compact, portable,
ac/battery-operated test set that generates various
telegraph test signal patterns hang predetermined and
controllable characteristics. The Pattern Generator is
designed for use with associated data measuring
instruments (such as Data Products’ Data Analyzer DA404) to test and evaluate performance of teletype-writer
and data communication systems or equipment. The
unit is illustrated (fig. 1-1) with its cover open and
closed.
1-8.
Description
a. Basically, the Pattern Generator consists of
four principal sections: sign pattern generator, distortion
generator, output circuits, and power supply.
(1) Signal Pattern Generator. The unit can
generate the following telegraph output signal patterns:
(a) Continuous Mark or Space.
(b) Reversals-alternate
Mark
and
Space bit in a serial stream.
(c) FOX message-a 5-level format and
(strap selectable) one or two 7-levels or one 8-level
format.
1-1
TM 11-6625-2814-14&P
(3) Output Circuit.
Pattern Generator
output circuits provide two levels of signal output:
(a) Low-level logis (±6 volts) which
may be internally stopped to conform with EIA standard
RS-232B or MIL-STD-188B.
(b) High-level
electronic
relay
closures for keying neutral telegraph loops.
(4) Power Supply.
The dc operating
voltages for the Pattern Generator are supplied by an
inverter circuit which receives power from an internal,
rechargeable 5-volt battery (batter operation), or from a
fullwave power supply (ac operation).
Recharging
current is supplied to the battery when the ac line cord is
connected to a 115-volt or 230-volt (strap selectable)
60Hz power source. The battery condition may be
checked by means of a front-panel indicator lamp and
switch.
b. The
Pattern
Generator
is
contained in a 2-piece, molded plastic carrying case
provided with a fold-away handle (fig. 1-1). All operating
controls and indicators, located on the top panel, are
protected by a sliding aluminum cover; when open, the
sliding cover permits access to the ac line cord storage
compartment in the Side of the unit. Output signal
connections are made at jacks on the unit's front pan; ac
power and neutral loop fuses are recessed in the bottom
of the unit. All Pattern Generator electronics are solidstate (including integrated circuits) and, except for the
power transformer and batteries, are constructed on two
printed-circuit (PC) cards (Assembly A and A2). For
access to internal components for maintenance and
repair, required, the upper portion of the carrying case
may easily be removed.
1 5 level (Baudot) Test Message
< ≡ ↓THE > QUICK > BROWN > FOX > JUMPS >
OVER > A > LAZY > DOG> ↑↑ 123467890 ↓ TEST
>
2 7-level IBM-BCD or Standard Selectic (Correspondence) Test Message
NL IL IL IL IL IL IL IL IL IL UC THE > QUICK >
BROWN > FOX > JUMPS> OVER > A > LAZY >
DOG > LC 1234567890.
3 8-Level (ASCII) Test Message
< ≡ DEL THE > QUICK > BROWN > FOX > JUMPS
> OVER > A > LAZY > DOG > 1234567890 >
U*U*U*U*
< Carriage return
≡Line feed
>Space
↓ (or UC) Letters shift
(upper case)
BLK BLANK
Symbol Legend
↑(or LC)
Figures shift (lower case)
NL
New line (carriage return,
line feed)
IL
Idle
DEL
Delete
(d) All output signal patterns are startstop and can be generated at any one of four switchselectable baud rates (customer specified). Internal
strapping options are provided to establish: ASCII, IBMBCD or IBM Correspondence (Standard Selectric) FOX
message outputs; even, odd, or no parity for 7- or 8-level
codes; a 1- or 2-unit stop pulse (Mark); bit rates; 115-or
230-volt ac power input; and output signal polarity.
(2) Distortion Generator. The unit can
provide output signal containing bias distortion in
amounts ranging from 0 to 37.5 percent, in 12.5 per cent
increments. The type of distortion introduced, switchselectable, may be Marking bias, Spacing bias, or
switched bias.
Table 1-1. Tabulated Data
Item
Description
OUTPUT SIGNALS:
Patterns
Mode
Stop-Bit
Baud Rates
Parity
DISTORTION:
Types
Amount
OUTPUT LEVELS:
High
Low
OPERATING MODES
Reversals.
Steady Mark or Steady Space.
5-level (Baudot) FOX message.
One (strap selectable) 7 - or 8-level Fox message:
ASCII(8-level)
IBM-BCD(7-level)
IBM Standard Selectric (Correspondence) (7-level)
Start-Stop.
1- or 2-unit, strap selectable for each rate.
Any four customer-specified speed from 37.5 to 600 baud.
Fox 7- or 8-level codes, odd, even, or none (strap selectable).
Marking bias, Spacing bias, and switched bias (alternate Mark/Space bias on a character basis).
0, 12.5, 25, and 37.5 percent.
Solid-state closure for neural loop keying, maximum 100ma at 300 volts. (External loop batteries required).
Unaffected by polarity of battery on tip/sleeve of NEUTRAL LOOP output jack.
Logic-level output (±6 volts) compatible with MIL-STD-188B or EIA standard RS-232B (strap selectable).
AC or battery.
1-2
TM 11-6625-2814-14&P
Table 1-1. Tabulated date-Continued
Description
Item
BATTERY MODE
OPERATING TIME
BATTERY CHARGING
TIME
POWER
REQUIREMENTS:
Ac
Battery
DIMENSIONS
(inches)
WEIGHT(pounds)
20 hours (approximate) continuous operation, with fully charged battery.
16 (approximate) from full discharge to charge condition with power off. Unit may be operated while
battery is being recharged (trickle charge).
115 or 230 (strap selectable) volts, 60 Hz.
5 volts, 85ma.
3-13/16 wide, 11-1/2 high, 3-5/8 deep.
3-1/2
1-3
TM 11-6625-2814-14&P
CHAPTER 2
SERVICE UPON RECEIPT AND INSTALLATION
Section I. PREPARATION FOR USE
factory wired strapping connections be changed; the
pattern generator contains strapping terminals for such
alternate configurations to satisfy requirements of
different system applications and uses.
Refer to
paragraph 4-6 for a description of the various strapping
options.
b. Output jacks for high-level (neutral) and
low-level (polar) signals are located on the unit's front
panel. The output jacks to be used depend on the type
of circuit being tested. Use a Western Electric plug Type
347 (or equivalent) for connections to the NEUTRAL
LOOP jack; use a Pomona Type MDP dual banana plug
(or equivalent for connections to the LOW LEVEL jacks.
c. The Pattern Generator provides solid-state
switching for the high-level output circuit; therefore, the
user must ensure that adequate current-limiting
resistance is present in the external loop circuits. The
high-level output circuit uses a diode-bridge configuration
to permit wiring of either polarity on the tip and sleeve of
the NEUTRAL LOOP telephone output jack, thus
eliminating the possibility of equipment damage.
2-1.
Unpacking
a. When shipped from the factory, the Pattern
Generator has all customer-specified wiring options
installed so that it may be placed immediately into
operation after it has been unpacked.
b
Remove the Pattern Generator from its
packing case, and carefully check for damage that may
have occurred during shipment. Immediately notify the
carrier or higher echelon of any damage to the
equipment.
NOTE
Do not destroy or discard the packing
case. It can be used when reshipping
the unit to the manufacturer or repair
facility in case of equipment damage
or malfunction.
2-2.
Electrical Connections
a. Use of the Pattern Generator with low-level
or neutral loop circuits requires proper external
connections be made to the front-panel jacks. Particular
applications may require that certain customer-specified
Section Il. INSTALLATIONS INSTRUCTIONS
output signal connections are made at the front panel (fig.
1-2). Fuses are located on the bottom of the unit.
2-3.
Operating the Pattern Generator
All controls and indicators used during normal operation
of the Pattern Generator are located on the top pan, and
Table 2-1. Controls, Indicators, Jacks and Fuses
Control Indicators
Jack or Fuse
DATA indicator lamp
PWR switch
BAT switch
TYPE DISTORTION
(BIAS) switches
MARK
SPACE
SW
PERCENT
DISTORTION switches
0
12.5
25
37.5
Function
Lights when Mark is generated. Functions with BAT switch to indicate condition of internal battery;
when BATT switch is depressed, lamp lights if battery has more than 0.5 operating hour remaining.
Depression applies power to unit.
When depressed, functions with DATA indicator lamp to indicate battery condition; may be used with
PWR switch depressed or released.
Introduces Marking bias distortion in output signal.
Introduces Spacing bias distortion in output signal.
Introduces switched bias distortion (alternate Mark/Space bias, on a character basis) in output
signal.
Introduces no distortion (0 percent) in output signal.
Introduce 12.5 percent bias distortion in output signal.
Introduces 25 percent bias distortion in output signal.
introduces 37.5 percent bias distortion in output signal.
2-1
TM 11-6625-2814-14&P
Table 2-1. Controls, indicator, Jacks, and Fuses--Continued
Control, Indicator,
Jack, or Fuse
RATE switches (four)
PATTERN switches:
5 LEV
8 LEV (or IBM 7
LEV)
REV
MARK
SPACE
LOW LEVEL jacks
(SIG and GND)
NEUTRAL LOOP
phonejack
F1 fuse
F2 fuse
Function
Each switch indicated baud rate of reversal and FOX message output signal.
Selects 5-level code (Baudot) FOX message output signal.
Selects 8 -level ASCII, or 7 -level IBM-BCD or Standard Selectric (Correspondence) message output
signal (established by customer-specified strap option).
Selects reversal (alternate Mark and Space) output signal. (Output distortion automatically reduced to
O percent if SW switch is also depressed.)
Selects steady Mark output signal.
Selects steady Space output signal.
Provides output connections for low-level (± 6-volt) output signal.
Provides output connection for high-level output signals .
Fuses ac power line.
Fuses high-level (neutral loop) output signal line.
2-4.
Preliminary Setup
The general procedure for setting up the Pattern Gen
erator, prior to operating the unit, is described below
a. Make certain that the correct internal
strapping connections (paras 4-6) have been made for the
given application.
b. Determine whether the mode of operation
will be ac or battery.
cord to 150 or 230-.volt (as required), 60Hz power source.
(2) For battery mode, check the condition
of the internal battery by depressing the BAT switch and
observing the DATA indicator lamp. Use the chart below
as a guide to determine whether the battery's condition
will permit battery operation.
(1) For the ac mode, connect the ac line
Data Indicator Lamp
Light Intensity Level
Dark (lamp does not light)
Dim (same as when a Mark is being generated)
Bright
Battery Condition
Completely discharge output voltage too low to operate unit.
Almost fully discharge; battery should be recharged.
Output voltage can operate unit for at least 0.5 hour.
No distortion can be introduced in the
output pattern if the REV and SW
switches are both depressed.
d. Turn ON the Pattern Generator by
depressing the PWR switch. Check that DATA indicator
lamp:
(1) goes ON if a steady Mark (positive)
output pattern has been selected (If steady Space has
been selected, the DATA indicator lamp should not go
ON);
(2) blinks intermittently if 5-, 7- or 8-level,
or reversals has been selected.
2-5.
Operating Procedures
After performing the preliminary setup, use the procedure
outlined below as a guide for operating the Pattern
Generator.
a. Select the output pattern by depressing the
appropriate PATTERN switch.
NOTE
Steady Mark and Space output patterns are not affected
by the RATE, PERCENT DISTORTION, and TYPE
DISTORTION (BIAS) switches.
b
Select the baud rate of the output pattern by
depressing the desired RATE switch.
c. If distortion is to be introduced in the output
pattern, select the appropriate type and amount of
distortion by depressing the appropriate TYPE
DISTORTION (BIAS) and PERCENT DISTORTION
switches, respectively. The PERCENT DISTORTION 0
switch must be depressed if no distortion is to be
introduced in the output pattern.
2-6.
Interpreting Indications
After performing the operating procedures described
above, the Pattern Generator will be operational for the
conditions established. Changes may be made in output
pattern characteristics (e.g, percent distortion, type
distortion, etc.) while the unit is in operation. During long
periods of battery operation, occasionally check battery
condition, by means of the
NOTE
2-2
TM 11-6625-2814-14&P
time, the internal battery receives a trickle charge which
helps restore the battery and maintain it in a charged
condition. After long periods of battery operation, it is
recommended that the battery recharged to restore to a
fully charged condition.
CAUTION
DO NOT permit extensive periods of
discharge, or the life of the battery will
be reduced.
To preserve battery
charge, always turn OFF power when
the unit is not in use.
BAT switch and DATA indicator lamp. There may be a
momentary spike introduced in the high-level output loop
when the battery is checked.
2-7.
Battery Charging Procedure
When fully charge, the battery can supply power to
operate the unit contiguously for approximately 20 hours.
If the battery discharges completely, it can be brought to
full charge in approximately 16 hours by turning OFF the
unit and connecting the line cord to an ac outlet.
Operation of the unit can be immediately restored even
when the battery has been completely discharged by
inserting the ac line cord into a power outlet. During this
2-3
TM 11-6625-2814-14&P
Figure 2-1. Pattern Generator--Front, Top and Back Views.
2-4
TM 11-6625-2814-14&P
CHAPTER 3
PRINCIPLES OF OPERATION
3-1.
General
occur at the proper time (for the baud-rate selected) after
Pattern Generator operation is described in the following
the Mark-to-Space (S) transition (true shift pulses are
paragraphs, on an over-all bias, using a block diagram to
always generated for M/S transitions).
illustrate interrelationships of major function sections.
(2) If Marking bias is selected, the
Since most Pattern Generator circuits are unrepairable
distortion generator produces RS pulses that cause the
IC modules, details are provided only for circuits
SIM transition to occur earlier than where the true shift
containing discrete components.
would normally take place.
(3) For Spacing bias, the RS pulse
3-2.
Overall Functional Description
produces a SIM transition at a point later than where the
The Pattern Generator block diagram (fig. 3-1) shows
true shift would normally take place.
major functional sections, and principle control signals
(4) Switched bias produces the same
and data paths; power supply and switch control details
effect, alternately introducing Marking and Spacing bias,
are omitted, for simplification. Abbreviated sign names
on a character-by-character basis.
between functional locks are the same as those shown
(5) Percent distortion is the amount of time
on the schematic diagrams provided in the Maintenance
that the Mark bias or Space bias RS pulse is shifted in
section of this manual.
time (earlier or later) with respect to the true-shift point.
b. Circuit Operation. The shift control circuit in
3-3.
Time Base Generator
the distortion generator assures that RS pulses, whether
The time base generator produces four frequency-stable
true shift or distortion (true) shift, occur at the proper
outputs from which all timing, gating, and is distortion
intervals for the selected baud-rate.
generating signals are derived. A free-running, RC
(1) This circuit receives two inputs: (1) a
oscillator (the basic timing device) drives a frequency
pulse produced by ANDing CL, F1, F2, and (2) a bias
countdown circuit that provides clock (CL), F1, F2, and
select (BS from the shift register. As shown in the timing
F3 output at the correct frequencies for the selected baud
diagram (fig. 3-2) the CL, F1, F2 F3 pulse is generated
rate. As show in the timing diagram (fig. 3-2), F1, F2, F3
whenever a transition (MS or SM)is to occur in the data
and 1/2, 1/4, and 1/8, respectively, of the clock
output; the BS input is the next-to last bit in the data
frequency.
output shift register. Thus, by sensing each transition
a. These four output and (except for C) their
and determining whether the next pulse to be shifted out
complements are used by the distortion generator circuits
on the line is to be a M/S or an S/M transition, the circuit
to produce time- controllable shift pulses for the data
can generate a true-shift or trueshift output. True-shift
output shift register.
outputs, which always occur on M/S transitions or when
b. The CL output is applied directly to the shift
zero distortion has been selected, are coupled directly
register for use as a left shift (LS), or parallel enter
through a shift pulse selected circuit to the RS input of
signal, after the shift register has been emptied.
the shift register. Trueshift outputs, produced by SIM
transitions when other than zero distortion has been
3-4.
Distortion Generator
selected, are applied as an enabling input to a
Under the control of the TYPE DISTORTION and
Mark/Space bias generator.
PERCENT DISTORTION switches, the distortion
(2) The type and amount of distortion
generator uses the four outputs from the time base
provided are controlled by the Mark/Space bias
generator to produce time-controllable right (se) shift
generator circuit which functions only if a true-shift input
(RS) pulses for the data-output shift register.
is present, indicating that a SM transition containing
a. Distortion Selection. Bias distortion can
some value of distortion is to occur. Once enabled, the
only be introduced in the Space-to-Mark transition of the
circuit may produce Mark bias or Space bias, depending
shift register data output DO, see timing diagram, fig. 3on the selected TYPE DISTORTION switch. If the
2.
MARK switch is depressed, the Mark bias generator is
(1) When zero distortion is selected, the
distortion generator produces a true" RS pulse that
causes the data output Space-to-Mark (S/M) transition to
3-1
TM 11-6625-2814-14&P
Figure 3-1. Pattern Generator, Block Diagram.
3-2
TM 11-6625-2814-14&P
Figure 3-2. Pattern Generator, Timing Diagram
3-3
TM 116-625-2814-14&P
(or IBM 7-LEV) and 5-LEV PATTERN switches.
a. Binary input required to generate the
various preprogrammed FOX message output (par 1-8)
are defined below.
enabled and the space bias generator is disabled (the
reverse is true if Spacing bias is selected). For switched
bias
operation, a flipflop alternately enables and disables
each circuit on a character-by-character basis.
(3) The amount of distortion produced is
established by the PERCENT DISTORTION switch
selected.
Except for zero distortion, each switch
provides various combinations of F1 and F2 input (as
well as their complements) to the Mark/Space bias
generator where they are combined with F3 (Marking
spacing only), F3 (Spacing only), and CL to produce time
variable distortion shift pulses. The truth table on the
timing diagram lists various CL, Fl, F2, F3 combinations
that produce the desired percent distortion; examples of
12.5 per cent Mark and Space bias RS pulses are also
shown on the timing diagram. Selecting higher distortion
values displays the Mark or Space bias RS pulses
further in time from the point where a true shift (zero
bias) normally take place.
(4) Distortion shift output pulses from the
Mark/Space bias generator, or true-shift output pulses
from the shift control circuit, are applied as RS inputs to
the shift register via a shift pulse select circuit. This
circuit provides a simple OR function, by gating through
whichever signal is present. Both signal cannot be
present at the same time since the two conditions for
establishing true or distortion shift are logical opposites
(M/S or S/M transition of next-to last bit in the shift
register, and selection of bias or no bias).
Binary Input
0-63
64-127
128-191
192-255
Code
Standard selectric (7-level)
IBM-BCD(7-level)
BAUDOT(5-level)
ASCII(8-level)
b. Since the six address input lines cannot
provide a binary count greater than 63, two additional
input (FC and FC1, representing the seventh and eighth
binary digits [64 and 128, respectively]) are supplied
from the 8-LEV (or IBM 7-LEV) and 5-LEV PATTERN
switches so that the FOX message generator produces
output codes other than standard Selectric.
(1) for IBM-BCD operation, line FC is
enabled; the count thus starts at 64 and is advanced
from 64 to 127 by the six address input lines.
(2) For Baudot operation, line FC1 is
enabled; the count, which starts at 128, is advanced to
191 by the six lines.
(3) In ASCII operation, FC and FC1 are
both enabled (128+ 64), so that the count starts at 192
and is run to 255.
NOTE
Baudot FOX messages are always
generated when
the 5-LEV pushbutton is depressed. However, only
one of the three other (7- or 8-level
codes is generated when the
applicable push-button is depressed,
as determined by customer-specified
strapping option.
c. To conserve power, the FOX message
generator is enabled only when the shift register has
been emptied and is therefore ready for the next parallel
entry. This is effected by suing the MC pulse, present
only when the shift register is empty, to enable FOX
message generator operation which then parallel-load
the shift register; once the register is loaded, the MC
pulse is removed and the FOX message generator
disabled until all the data-bits have been shifted out.
Serial data output (DO) from the hit register are
simultaneously applied to high-level and polar output
circuits. A top panel mounted DATA lamp in the data
output circuit lights when the output bit is a Mark
(positive).
3-5.
Address Counter
A 6-stage, ripple through, binary counter, this circuit
controls operation of the FOX message generator
whenever a 5-level, 7-level, or
8-level pattern is
selected (it is inhibited by RMS and RMS input from the
PATTERN switches, when steady Mark, steady Space, or
reversals output is output is selected). With the inhibit
removed, the address counter is advanced from a count
of 0 to 63, by message control (MC) clock inputs from
the shift register. A clock input is presented each time
the shift register is emptied, indicating that the latter is
ready to accept the next character, in parallel input form,
from the FOX message generator, at which time the MC
input advances the circuit count by 1 and the new output
address is applied to the FOX message generator via six
parallel lines. When the maximum count of 63 is
reached, the counter automatically restarts at O.
3-6.
Fox Message Generator
A preprogrammed, read-only memory device, this circuit
provides five (for Baudot, seven (for IBM-BCD or
Standard Selectric, or eight (for ASCII parallel data- bits
to the data output shift register for generation of Fox
messages. The programmed outputs are controlled by
the 6-bit parallel address input supplied from the address
counter, and two additional inputs provided via the 8-LEV
3-7.
Shift Register
Comprising three IC circuits, the 11-stage shift register
performs a parallel-to-serial conversion of the message
characters supplied from the FOX message generator.
The start-space bit, and a 1-unit StopMark bit, and a
strappable 2-unit stopMark bit are hard3-4
TM 11-6625-2814-14&P
damaging the output keying transistor.
b. Low-level (± 6 volts) output are supplied
from a 3-transistor polar keying circuit that performs
current-limiting ad has a low-impedance output. The
common-emitter output of the circuit is connected to the
LOW LEVEL SIG jack, and the return line is connected to
the LOW LEVEL-GND jack.
wired to the shift register. Only the five Baudot, seven
IBM-BCD or Standard Selectric, or eight ASCII data bit
are supplied from the FOX message generator Operation
of the shift register with 5-, 7-, or 8-level inputs-as well as
steady Mark, steady Space, or reversals-is controlled by
the applicable PATTERN switches.
a. In 5-, 7-, or 8-level operation, shifting the last
bit of a character onto the data output line is sensed by a
register empty detector, which then supplies an MC pulse
to the address counter and FOX message generator
(1). This pulse (1) enables generation of the
next FOX message character, and (2) is fed back to the
shift register where, with the LS (clock) input from the
time base generator, it enables entry of the next set of
parallel data-bits into the shift register. Shift pulse from
the distortion generator then shift the hard wired Space
serial input (Sin) through the register as data-bits are
transferred onto the data output line This process
continues until the last (stop-Mark) data bit is shifted out
(register empty and an MC pulse is generated to repeat
the entire procedure.
(2) A BS output, representing the next-tolast bit in the shift register, causes the distortion generator
produce true-shift or distortion-shift output as described
previously.
b. During 8-level operation, all three IC circuits
in the shift register are used. For 5-level operation, the
three stages of the second IC circuit are bypass (through
operation of the 5-LEV push-button) so that only the first
and last IC circuits are used. In the 7-level mode, a strap
option serves to bypass one stage of the second IC
circuit.
3-9.
Polar Output Circuit (See fig. FO-1 for
schematic diagram)
Serial data is applied to the polar output circuit through
pin 10 of inverter U6.
a. When a Mark (positive) signal appears at pin
11 of inverter U6, the output at pin 10 is grounded so that
Zener diode VR4, a 13 volt regular, does not conduct; the
Q4 base is held at - 10 volts, keeping Q4 cut off. Thus
the current flow through diodes CR16 and CR19 forwardbiases Zener diode VR5, cutting off Q5 and driving Q3
into saturation-to supply a ±6-volt output at the LOW
LEVEL SIG jack.
b. With a Space signal (ground at U6-11, output
at pin 10 rises to +10 volts. With sufficient reverse
breakdown voltage, the 13 volt drop across VR4 drives
Q4 into conduction-applying a potential of approximately 7 volts at the Q5 base and approximately -6 volts at the
Q3 base. This cuts off Q3 and drives Q5 into saturationproducing a -6-volt output at the LOW LEVEL-SIG jack.
c. Diodes CR17 and CR18 serve as currentlimits for Q3 and Q5, respectively.
Under normal
operating conditions, CR 17 and CR18 do not conduct
However, when the Q3 or Q4 emitter approaches a shortcircuit condition, the associated diode conducts, biasing
the transistor toward cutoff.
c. For steady Mark, Space, or reversals
operation only one of the three shift register ICs (that
containing the last four stages) is used, and the selected
PATTERN switch provides the proper input.
(1) For steady Mark or Space, the positive
voltage or the ground (respectively) applied to the IC
signal input is continuously shifted through the last four
stage of the register.
(2) For reversals, an inverter between the
fourth stage output and the signal input to the IC cause
Mark and Space signals to be shifted through the
register's last four stages in an alternating pattern.
3-10.
Power Supply Inverter (see fig. FO-1 for
schematic diagram)
This circuit, which receives a 5-volt dc input from the
battery, supplies +10- and -10-volt dc outputs for various
circuits on Pattern Generator assemblies A1 and A2.
Battery input is applied to astable multivibrator Q1-Q2,
which generates a 4 to 5kHz squarewave having a peakto-peak amplitude of approximately 20 volts.
This
squarewave is coupled through transformer T1 to bid
rectifier CR12-CR15, resulting in + 10- and -10-volt dc
outputs (from opposite sides of the bridge rectifier) that
are filtered by capacitors C4 through C7.
3-8.
Output Circuits
The Pattern Generator includes a high-level (neutral loop)
output circuit and a low-level (polar) output circuit. Both
circuits comprise discrete components and provide
outputs via jacks on the units front panel. ‘
a. The high-level output circuit consists of a
buffer amplifier, and a fuse-protected keying transistor
connected to the NEUTRAL LOOP output jack through a
full-wave diode bridge. The full--wave bridge permits
either polarity of the external loop to be connected to the
tip or sleeve of the NEUTRAL LOOP jack, without
3-11.
High-Level Output Circuit see fig. FO-2 for
schematic diagram)
Serial data is applied, via buffer Q2, to the high-level
output circuit comprising keying transistor Q1 and bridge
rectifier CR3-CR6. With BATT switch S2 re
3-5
TM 11-6625-2814-14&P
a. When BATT switch S2 is depressed, the 5volt battery: (1) provides collector voltage for Q3 through
BATT lamp DS1; and (2) is connected across 4.3-volt
Zener diode VR1 and resistor R32 in the Q3 base circuit.
If battery voltage exceeds 4.3 volts, VR1 conducts and
the resultant voltage drop across R22 turns ON Q3,
causing the DATA lamp to light. The higher the charge
condition of the battery, the more heavily Q3 conducts,
increasing the intensity of DATA lamp brightness.
b. If the battery is excessively discharged so
that its voltage does not exceed the VR1 breakdown
voltage, Q3 is cut off and the DATA lamp is not lighted.
c. Fuse F3, connected in series with the battery
across the 5 volts dc input (see fig. 4-1 for schematic
drawing), is provided as a safety precaution to protect the
battery in the event of an overload (short circuit)
condition.
leased, signals from Q2 are applied to Q1 through DATA
lamp DS1; with the switch depressed, signals are applied
from Q2 to Q1 through R39.
a. Keying transistor Q1 is connected to the tip
and sleeve of NEUTRAL LOOP jack J, through fuse F2
(which provides overload protection for Q1) and diode
bridge CR3-CR6 (which permits the external loop, using
either polarity, to be connected to the NEUTRAL LOOP
jack without damaging the keying transistor).
b. When a Mark (positive) signal is applied, Q1
conducts. If the external loop is connected + to - on the
tip and sleeve, respectively, of the NEUTRAL LOOP jack,
current flows through CR5, F2, Q1, and CR4. If the
polarity is reversed, current flows through CR3, F2, Q1,
CR4. When a Space signal is applied, Q1 is cut off,
opening the external loop.
3-12.
Battery Test Circuit
schematic diagram)
(see
fig.
FO-2
for
The battery test circuit comprises transistor Q3, BATT
switch S2, and DATA lamp DS1.
3-6
TM 11-6625-2814-14&P
CHAPTER 4
MAINTENANCE INSTRUCTIONS
making sure that the DATA lamp come through hole in
cover.
(9) Replace and tighten three securing
screws.
b. Fuse Replacement. To replace the ac input
or neutral loop fuses (bottom of the unit, see fig. 1-2),
unscrew the fuse-cap and extract the fuse (fuse is
equipped with two pin that plug into holder). Insert new
0.1- ampere fuse, and replace cap. To replace battery
fuse F3 (see fig. 4-4) proceed as follow
(1) Remove the three screws (two near the
carrying handle hinge, and one at rear of unit ) that fasten
top of Pattern Generator case to bottom of unit.
(2) Lift cover off unit, gently rocking over
back and forth, making sure not to force cover against
DATA lamp or pushbuttons in top of unit or output jacks in
front of unit.
(3) Remove four screws that fasten bottom
cover of Pattern Generator and remove cover.
(4) Remove fuse, located under battery
holder bracket, and insert new 1 ampere fuse.
(5) Replace and tighten bottom cover with
four securing screws.
(6) Carefully replace top cover, front first,
making sure that the DATA lamp comes through hole in
cover.
(7) Replace and tighten the three securing
screws.
4-1.
Maintenance Practices
Except for replacement of the battery and fuses, it is
recommended that the Pattern Generator be returned to
the factory for service. Where field service is necessary,
it should be performed only by an engineer or technician
thoroughly familiar with operation of the unit and
experienced with similar equipment. The performance
test described in paragraph 4-3 can serve to establish the
unit's general operation condition.
If the unit
malfunctions, signal trace using the waveforms shown in
figure 3-2 and the diagrams provided in figures 4-1, FO-1,
and FO-2.
Perform the frequency adjustments as
required, as described in paragraph 4-5. To select parity
mode, stop-Mark width, baud-rate, output phase, 7- or 8level code, and ac power input other than those factorystrapped, proceed as described in paragraph 4-6.
a. Battery Replacement. If the battery cannot
be brought up to a fully charged condition as described in
paragraph 2-7, replace the battery as described below.
(1) Remove the three screws (two near the
carrying handle hinges, and one at rear of unit) that fasten
top of Pattern Generator case to bottom of unit.
(2) Lift cover off unit, gently rocking cover
back and forth, making sure not to force cover against
DATA lamp or pushbuttons in top of unit or output jacks in
front of unit
(3) Remove battery from holder.
(4) Remove red plastic caps from each end
of battery.
(5) Unsolder wire from terminal on each
end of battery, and solder wires to replacement battery
(black to negative, white to positive).
(6) Replace plastic caps on battery.
(7) Replace battery in holder, being careful
not to pinch wires.
(8) Carefully replace top cover, front first,
4-2.
Test Equipment Required
The test equipment listed below is required for
maintenance of the Pattern Generator. Manufacturer and
model recommendations are typical; equivalent types
may be substituted.
The Common Name column
specifies the name by which each test equipment is
subsequently referred to.
Table 4-1. Test Equipment Required
Name
Electronic Frequency Counter, Hewlett-Pack Model HP,
5211A or
Oscilloscope , Tektronix Model 535, or equivalent
Common
Name
Counter
Multimeter, Simpson Model 2, or equivalent
Data Measuring Set, STELMA Model DMS-303A, or
equivalent
Multimeter
DMS-303A
Function
Measurement of time-base Frequencies and
equivalent rates
Waveform observation and measurement. Also
used for signal tracing
General voltage and resistance measurements.
Measurement of telegraph distortion.
teletype Printer Units (two require: 5-level code and 8level code
machines)
Teleprinter
Provide printed readout of 5- or 8-level FOX
Oscilloscope
test messages for verification of equipment ac
curacy.
4-1
TM 11-6625-2814-14&P
Table 4-1. Test Equipment Required-Continued
Common
Name
Data terminal
Name
Data Terminal, IBM Model 2741, or equivalent
Function
Provide printed readout of 7-level FOX test messages
for verification of equipment accuracy
separately. The performance test outlined below is
designed to check the unit in a logical series of separate
tests; successful completion of the test verifies
equipment operation capability and can serve to define
trouble symptoms.
4-3.
Performance Test
Since no one combination of control settings will provide
a comprehensive test of the Pattern Generator, a
thorough Performance Test requires that the various
functional sections of the unit be tested and evaluated
Table 4-2. Performance Test Table
Procedure
Normal Indication
BATTERY TEST
1. Depress BATT switch.
2. Observe DATA lamp.
3.
DATA lamp glows brightly. If it does not, recharge
battery for several hours before continuing tests.
Depress and release BAT switch.
NOTE
Continue remainder of test, with power cord plugged into ac outlet.
BAUD RATE TEST
1. connect counter to LOW LEVEL jacks.
2. Depress PERCENT DISTORTION - 0 switch.
3. Depress PATTERN-REV switch.
4. Depress PWR switch.
5. Depress RATE switch in sequence, and measure output frequency on counter after
each switch is depressed
.
OUTPUT CIRCUITS AND PATTERN TEST
1. Depress PERCENT DISTORTION - 0 switch.
2. Depress PATTERN-MARK switch.
3. Measure voltage at LOW LEVEL jacks with multimeter or oscilloscope.
4.
5.
Depress PATTERN-SPACE switch.
Repeat step 3, above.
6.
7.
8.
Depress any RATE switch.
Depress PATTERN-REV switch.
Connect oscilloscope to LOW LEVEL jacks, and observe wave shape of displayed
signals.
The frequencies measured by counter are one half the
baud-rate values marked on RATE switches. DATA
lamp blinks at selected baud-rate.
DATA lamp goes ON.
Test equipment indicates a steady + 6 volts if output
phase is strapped for positive MARK, or a steady -6
volts if output phase is strapped for negative Mark.
DATA lamp goes OFF.
Test equipment indicates a steady - 6 volts if output
phase is strapped for positive Mark, or a steady +6 volts
if output phase is strapped for negative Mark.
Oscilloscope displays a square wave having a peak-topeak amplitude of 12 volts (- 6 volts to + 6 volts) with
pulse-widths corresponding to value selected by RATE
switch (i.e., 1/baud-rate = pulse-width).
9. Release PWR switch.
10. Connect NEUTRAL LOOP output jack to 5-level Baudot teleprinter.
NOTE
External loop battery and loop-limiting resistor must be provide.
11. Depress PATTERN -5 LEV switch.
12. Depress PWR switch.
13. Turn ON power to the teleprinter, and observe printout
14. Depress PWR switch, turn OFF power to teleprinter, and disconnect pIug from
NEUTRAL LOOP jack.
15. Reverse loop-polarity connection, and repeat steps 10 through 14.
NOTE
Steps 16 through 21, steps 22 through 26, and steps 27 through 31
serve to check Pattern Generator performance in producing ASCII,
IMB-BCD, or Standard Selectric FOX message codes, respectively.
Use only the applicable steps for the Pattern Generator under test.
4-2
Teleprinter repeatedly prints 5-level Baudot FOX
message (see pars 1-8a(1)(c) 1 for 5-level FOX
message format).
TM 11-6625-2814-14&P
Table 4-2. Performance Test Table--Continued
Procedure
.Connect NEUTRAL LOOP jack to 8-level ASCH teleprinter.
NOTE
External loop battery and looplimiting resistor must be provided.
17. Depress PATTERN-8 LEV switch.
18. Depress PWR switch.
19. Turn ON power to teleprinter, and observe printout.
Normal Indication
16
Teleprinter repeatedly prints 8-level ASCII FOX message
(see para 1-8a(1)(c)3 for 8-level FOX message format).
20. Depress PWR switch, turn OFF power to teleprinter, and disconnect plug from
NEUTRAL LOOP jack.
21. Reverse loop-polarity connection, and repeat steps 16 through 20.
22. Connect LOW LEVEL output jacks to suitable data terminal using IBM-BCD
code.
23. Depress PATTERN-IBM 7 LEV switch.
24. Depress PWR switch.
25. Turn ON power to data terminal teleprinter, and observe printout.
26. Depress PWR switch, turn OFF power to data terminal teleprinter, and disconnect
plugs from LOW LEVEL jacks.
27. Connect LOW LEVEL output jacks to suitable data terminal using Standard
Selectric code.
28. Depress PATTERN-IBM 7-LEV switch.
29. Depress PWR switch.
30. Turn ON power to data terminal teleprinter, and observe printout.
31. Depress PWR switch, turn OFF power to data terminal teleprinter, and disconnect
plugs from LOW LEVEL jacks.
DISTORTION TEST
1. Connect DMS-303A to LOW LEVEL jack Adjust DMS-303A controls for
measurement of Marking bias on a low-level start-stop signal.
2. Depress TYPE DISTORTION (BIAS) -MARK switch.
3. Depress PERCENT DISTORTION - 0 switch.
4. Depress PATTERN- 5 LEV switch.
5. Depress PWR switch.
6. Turn ON power to DMS-303A, and measure Marking bias.
7. Depress PERCENT DISTORTION-12.5, -25, and -37.5 switches, sequence, and
measure Marking bias after each switch is depressed
8. Use same general procedure described above for measuring Spacing bias and
switched bias using TYPE DISTORTION(BIAS)-SPACE and-SW switches,
respectively.
4-4.
Teleprinter repeatedly prints 7-level IBM-BCD FOX message
(see para 1-8a(1)(c)2 for 7-level IBM-BCD FOX message
format).
Teleprinter repeated prints 7-level Standard Selectric FOX
message (see para 1-8a(1)(c)2 for 7-level Standard Selectric
FOX message format).
DMS-303A indicates 0 distortion.
Distortion indicated on DMS-303A is within 3 per cent of
selected PERCENT distortion switch.
Distortion indicated on DMS-303A same as for Marking bias
measurements.
mounted on the PC-cards and not otherwise identified by
front panel nomenclature are shown in figure 4-4. In most
cases, component replacement will not necessitate
recalibration or readjustment of the unit, if an exact
replacement part has been used. However, if any parts in
the time base oscillator on PC-card A1 are replaced,
perform the adjustment procedure provided below to
check for proper output frequencies.
Repair
Repair and replacement of Pattern Generator
components may be accomplished using standard
techniques and practices, including precautionary
measures required when replacing semiconductors and
integrated circuit.
Parts location diagrams for
components mounted on PC-cards A1 and A2 are shown
in figures 4-2 and 4-3; locations of components not
4-3
TM 11-6625-2814-14&P
Figure 4-1. Pattern Generator, Wiring Diagram.
4-4
TM 11-6625-2814-14&P
Figure 4-2. Timing and Data Register Assembly A1, Component Location Diagram.
4-5
TM 11-6625-2814-14&P
Figure 4-3. Distortion and Message Generator Assembly A-2, Component Location Diagram.
4-6
TM 11-6625-2814-14&P
on PC-card A1 (see fig. 4-2; the appropriate frequency for
each baud-rate is listed below (if the frequency for a
selected baud-rate is not as specified, adjust the
appropriate control to obtain the proper frequency-see
fig. 4-4 for locations of adjustment controls A1R1-A1R4).
4-5.
Time Base Oscillator Frequency Adjustment
The time base oscillator output frequency should be
checked or adjusted whenever an oscillator-circuit
component is replaced or an incorrect baud-rate output is
suspected. Take all frequency measurements with the
frequency counter connected to strapping terminal.
BaudRate
100
105
110
135
148
150
192
200
300
400
600
BaudFrequency (HZ)
Rate
(Meas. At Term. A1-K)
37.5
2400
40
2560
45
2912
50
3200
56
3637
61
3913
66
4267
70
4480
74
4749
75
4800
82
2400
96
3072
*Refer to RATE switch location for corresponding adjustment
Frequency (HZ)
(Meas. At Term.A1-K)
3200
3360
3520
4304
4752
4800
3072
3200
4800
3200
4800
Adjustment Control
A1R1
A1R2
A1R3
A1R4
control.
RATE Switch Location
Upper
Upper-Middle
Lower-Middle
Lower
Mark width options are charted below for the various
RATE switches.
4-6.
Strapping Options
Although the Pattern Generator is shipped from the
factory with all customer-specified strappings options
included, these options may be changed in the field to
satisfy requirements of different applications and uses.
PC-card A1 has strapping options to establish parity
mode, stop-Mark width, output phase, baud-rates, and ac
power input; strapping options may also be made
between PC-cards A1 and A2 to select the desired 8level code (ASCII) or 7-level code (IBM-BCD, or
Standard Selectric). The strapping connections required
to obtain the desired characteristics of these various
options are described below. Refer to figures 4-2 and 45 for location of strapping terminals on PC-card A1.
a. Parity Mode. Strapping options provide a
choice of odd parity, even parity, or no parity bit for the
7- or 8-level FOX test message characters; when no
parity is selected, the particular bit-position will always
contain a Mark. Strapping connections for the parity
mode options are as follows:
(1) For odd parity, strap terminal T to U.
(2) For even parity, strap terminal T to S.
(3) For no parity, strap terminal T to R.
b. Stop-Mark Width. Strapping terminals are
provided for each RATE switch so that a 1-unit or 2-unit
stop-mark can be programmed in the FOX test messages
at the selected baud-rate. Strap connections for stop-K
Stop-Mark
Width
1 Unit
Connect
Terminal:
A to F
2 Unit
1 Unit
A to E
B to F
2 Unit
1 Unit
B to E
C to F
2 Unit
1 Unit
C to E
D to F
2 Unit
D to E
RATE Switch
Position
Upper
Upper-middle
Lower-middle
Lower
c. Output Phase.
These strapping terminals
provide a means of establishing the Marking polarity
(positive Mark or negative Mark) of low-level output
signals. Strapping connections for the output phase
options are as follows:
(1) For positive (+6 volt) low-level Mark, strap
terminal X to W.
(2) For negative (-6 volt) low-level Mark, strap
terminal X to V.
d. Baud Rate. Strapping is provided to select the
baud-rate range of the four RATE switches. Each RATE
switch may be strapped to cover one of four baud-rate
ranges: 37.5 to 75, 75 to 150, 150 to 300,
4-7
TM 11 6625-2814-14&P
marking. Strapping connections for selecting baud-rate
ranges and conversion kit has part numbers are charted
below. After the conversion kit has been installed and the
strapping has been accomplished, make fine frequency
adjustment as described in paragraph 4-5.
and 300 to 600. In addition, a baud-rate conversion it
must be ordered from Data Products , STELMA
Telecommunications. This kit contains the proper value
for resistors R23 through R26 to obtain the desired baud
rate, and a push-button with the corresponding baud rate
RATE Switch Position
Upper
Baud-Rate Range
37.5-75
75 -150
150 -300
300-600
37.-75
75 -150
150 -300
300 -600
37.5-75
75 -150
150 -300
300 -600
37.5-75
75 -150
150 -300
300 -600
Upper-middle
Lower-middle
Lower
BaudRate
37.5
45
74
110
150
40
50
Conversion
Kit
Part No.
24007002
-000
-001
-02
-003
-004
-005
-006
Conversion
Kit
Part No.
24007002
-007
-008
-009
-010
-011
-012
-013
-014
. BaudRate
56
61
66
70
75
82
96
100
ASCII
BaudRate
105
135
148
192
200
300
400
600
IBM-BCD
To
A2-23
A2-7
A1-Z
Conversion
Kit
Part No
24007002
-015
-016
-017
-018
-019
-020
-021
-022
ASCII coded FOX message. Strapping connections for
selecting the desired 7- or 8-level code are charted
below.
e. 7- OR 8-Level Fox Message. In addition to
the 5-level(Baudot) FOX Message, the Pattern Generator
can also output ether one of two 7-level coded FOX
messages (IBM-BCD or Standard Selectric) or an 8-level
From
A1-23
A1-7
A1-AA
Strap Terminal:
G to N
G to M
G to L
G to K
H to N
H to M
H to L
H to K
I to N
I to M
I to L
I to K
J to N
J to M
J to L
J to K
From
A2-23
A1-7
A1-BB
To
A2-0
A2-7
A1-Z
Standard Selectric
From
To
A2-23
A2-0
NO. CONN.(A-1-7 to A2-7)
A1-BB
A1-Z
f.
AC Power Input. The Pattern Generator can operate with either a 115- or 230-volt ac input, depending on
power transformer T1 strapping; see fig. 4-4. To operate from:
(1) 115 volts, strap T1 terminals 1 to 2, and 3 to 4.
(2) 230 volts, strap T1 terminals 2 to 3.
4-8
TM 11-6625-2814-14&P
Figure 4-4. Pattern Generator, Top View, Component Location.
Figure 4-5. Location of Strapping Terminals and Resistor R23 Through R26 Assembly.
4-9
TM 11-6625-2814-14&P
APPENDIX A
REFERENCES
DA Pam 310-4
DA Pam 310-7
TM 38-750
TM 7-244-2
Index of Technical Publications: Technical Manuals, Technical Bulletins, Supply Manuals
(Types 7, 8, and 9), Supply Bulletins, and Lubrication Orders.
US Army Equipment Index of Modification Work orders.
The Amy Maintenance Management Stem (TAMMS).
Procedure for Destruction of Electronics Materiel to Prevent Enemy Use (Electronics
Command).
A-1
TM 11-6625-2814-14&P
APPENDIX D
MAINTENANCE ALLOCATION
Section I. INTRODUCTION
replace) or other maintenance actions (welding, grinding,
D-1.
General
riveting, straightening, facing, remaining, or resurfacing to
This appendix provides a summary of the maintenance
restore serviceability to an item by correcting specific
operations for the PG-404. It authorizes categories of
damage, fault malfunction, or failure in a part,
maintenance for specific maintenance functions on
subassembly, mode (component or assembly), end item,
repairable items and components and the tools and
or system.
equipment required to perform each function.
This
j.
Overhaul. That maintenance effort (service/
appendix may be used as an aid in planning maintenance
action) necessary to restore an item to a completely
operations.
serviceable operational condition as prescribed by
maintenance standards (i.e., DMWR) in appropriate
D-2.
Maintenance Function
technical publications. Overhaul is normally the highest
Maintenance functions will be limited to and defined as
degree of maintenance permitted by the Army. Overhaul
follows:
does not normally turn an item like new condition.
a. Inspect. To determine the serviceability of
k. Rebuild. Consists of those services/actions
an item by comparing its physical, mechanical, and/or
necessary for the restoration of unserviceable equipment
electrical characteristics with established standards
to a like new condition in accordance with original
through examination.
manufacturing standards. Rebuild is the highest degree
b. Test. To verify serviceability and to detect
of materiel maintenance applied to Army equipment. The
incipient failure by measuring the mechanical or electrical
rebuild operation includes the act of returning to zero
characteristic of an item and comparing those
those age measurements (hours , miles, etc.) considered
characteristics with prescribed standards.
in classifying Army equipment’s/components.
c. Service. Operations required periodically to
keep an item in proper operating condition, i.e., to clean
D-3.
Column Entries
(decontaminate), to preserve, to drain, to paint, or to
a. Column 1, Group Number. Column 1 lists
replenish fuel, lubricants, hydraulic fluids, or compressed
group numbers, the purpose of which is to identify
air supplies.
components, assemblies, subassemblies, and modules
d. Adjust. To maintain, within prescribed limits,
with the next higher assembly.
by brining into proper or exact position, or by setting the
b. Column 2, Component Assembly. Column 2
operation characteristics to the specified parameters.
contains the noun names of components, assemblies,
e. Align. To adjust specified variable elements
assemblies, and modules for which maintenance is
of an item to bring about optimum or desired
authorized.
performance.
c. Column , Maintenance Function Column 3
f.
Calibrate.
To determine and cause
lists the functions to be performed on the item listed in
corrections to be made or to be adjusted on instruments
column 2. When items are listed without maintenance
or test measuring and diagnostic equipment used in
functions, it is solely for purpose of having the group
precision measurement. Consists of comparisons of two
numbers in the MAC and RPSTL coincide.
instrument, one of which is a certified standard of known
d. Column 4, Maintenance Category. Column
accuracy, to detect and adjust any discrepancy in the
4 specifies, by the listing of a “work time” figure in the
accuracy of the instrument being compared.
appropriate subcolumns), the lowest level of maintenance
g. Install. The act of emplacing, seating, or
authorized or to perform the function is listed in column 3.
fixing into position an item, part , module (component or
This figure represents the active time required to perform
assembly) in a manner to allow the proper functioning of
that maintenance function at the indicated category of
the equipment or system.
maintenance. If the number or complexity of the tasks
h. Replace.
The act of substituting a
within the listed maintenance function
serviceable like type part, subassembly, or module
(component or assembly) for an unserviceable
counterpart.
I.
Repair. The application of maintenance
services (inspect, test, service, adjust, align, calibrate,
D-1
TM 11-6625-2814-14&P
a. Tool or Test Equipment Reference Code.
The numbers in this column coincide with the numbers
used in the tools and equipment column of the MAC.
The numbers indicate applicable tool or test equipment
for the maintenance functions.
b. Maintenance Category. The codes in this
column indicate the maintenance category allocated the
tool or test equipment.
c. Nomenclature. This column lists the noun
name and nomenclature of the tools and test equipment
required to perform the maintenance functions.
d. National NATO Stock Number. This column
lists the National NATO stock number of the specific tool
or test equipment.
e. Tool Number.
This column lists the
manufacturer’s page number of the tool followed by the
Federal Supply Code for manufacturers (-digit) in
parenthesis.
vary at different maintenance categories, appropriate
"work time" figures will be shown for each category. The
number of task-hour specified by the "work time” figure
represents the average time required to restore an item
(assembly, subassembly, component, module, end item,
or system) to a serviceable condition under typical field
operating conditions. This time includes preparation
time, troubleshooting time, and quality assurance, quality
control time in addition to the time required to perform
the specific task identified for the maintenance functions
authorized in the maintenance allocation chart.
Subcolumns of column 4 are as follows:
C--Operator Crew
O--Organizational
F--Direct Support
H--General Support
D--Depot
e. Column 5 Tools and Equipment. Column 5
specifies by code those common tool sets (not individual
tools) and special tools, test, and support equipment
needed to perform the designated function.
f.
Column 6, Remarks.
D-4.
Tool and Test Equipment Requirements (Sec
III)
D-5.
Remarks (Sec IV) (Not applicable)
(Next printed page is D-3)
D-2
TM 11-6625-2814-14&P
SECTION II MAINTENANCE ALLOCATION CHART
FOR
GENERATOR, PATTERN - PG-404
(1)
(2)
GROUP
NUMBER
00
COMPONENT ASSEMBLY
GENERATOR, PATTERN PG-404
(3)
MAINTENANCE
FUNCTION
Inspect
Test
Service
Repair
Repair
Overhaul
(4)
(5)
MAINTENANCE LEVEL
C
O
F
H
D
0.2
0.5
0.4
0.2
0.5
3.0
TOOLS AND
EQUIPMENT REMARKS
7
1 thru 6
7
7
6
1 thru 6
01
CHASSIS ASSEMBLY
Test
Repair
0.5
0.4
1 thru 5
6
0101
CIRCUIT CARD ASSEMBLY
(TIMING & REGISTER)
Inspect
Test
Repair
0.3
0.4
04
0 thru 1
6
CIRCUIT CARD ASSY
(DISTORTION & MESSAGE GENERATOR)
Inspect
Test
Repair
0.3
0.4
0.4
1 thru 5
6
CASE
Repair
0.5
6
0102
02
D-3
(6)
TM 11-6625-2814-14&P
SECTION III TOOL AND TEST EQUIPMENT REQUIREMENTS
FOR
GENERATOR, PATTERN - PG-404
TOOL OR TEST
EQUIPMENT
REF CODE
1
2
3
4
5
6
7
MAINTENANCE
CATEGORY
H, D
H, D
H, D
H, D
H, D
H, D
C
NOMENCLATURE
ANALYZER, DATA, TELEGRAPH TS-3378/G
COUNTER, ELECTRONIC, DIGITAL READOUT AN/USM-459
MULTIMETER AN/USM-223
OSCILLOSCOPE AN/USM-281C
TELETYPEWRITER TT-412/UG
TOOL KIT, ELECTRONIC EQUIPMENT TK-100/G
TOOLS AND TEST EQUIPMENT AVAILABLE TO THE
OPERATOR BECAUSE OF HIS/HER ASSIGNED MISSION.
*THE NATIONAL STOCK NUMBERS THAT ARE MISSING
FROM THIS LIST HAVE BEEN REQUESTED AND WILL BE
ADDED BY A CHANGE TO THE LIST UPON RECEIPT.
D-4
NATIONAL/NATO
STOCK NUMBER
PENDING
6625-01-061-8928
6625-00-999-7465
6625-00-106-9622
PENDING
5180-00-605-0079
TOOL
NUMBER
TM 11-6625-2814-14&P
APPENDIX E
REPAIR PARTS LIST
Section I. GENERAL
A complete list of replaceable Pattern Generator
for each entry, a brief description and the manufacturer
electronic part is provided below, by major assembly.
part and code numbers are provided. Manufacturer
Within each assembly breakdown, parts are listed in
codes are identified in the following table.
alphanumeric order, by reference designation symbol;
Table 5-1. Manufacturer Codes
Code. No.
01295
26483
34122
56289
70903
71400
75915
80294
81349
82389
83330
86684
96238
Manufacturer
Texas Instruments Inc., Semiconductor and Components Division, Dallas, Texas
Montsanto Co. Inc., West Caldwell, New Jersey
Marathon Battery Co., Coldpring, New York
Sprague Electric Co., North Adams, Massachusetts
Belden Corp., Chicago, Illinois
Bussmann Mfg., Division of McGraw Edison Co., St. Louis, Missouri
Littelfuse, Inc., Des Plaines, llinois
Bourns, Inc., Riverside, California
Military Specifications
Switchcraft, Inc., Chicago, Illinois
Herman H. Smith Inc., Brooklyn, New York
RCA Corp. Electronic Component, Harrison, New Jersey
STELMA, Inc., Stamford, Connecticut
Table 5-2. Replaceable Parts
PATTERN GENERATOR ASSEMBLY (97009000-000)
Ref
Design
A1
BT1
CR1, CR2
F1, F2
F3
R1
T1
W1
XF1, XF2
XF3
Mfr
Code No.
Description
ASSY, CHASSIS:
BATTERY, STORAGE: 4.8V
SEMICOND DIODE: silicon;
FUSE, CARTRIDGE: 1/10 amp;
FUSE, CARTRIDGE: 1 amp;
RESISTOR, FXD, COMP: 10 ohms, ± 5%, 1W;
TRANSFORMER, POWER:
CABLE ASSEMBLY, POWER, ELECTRICAL:
FUSEHOLDER:
FUSEHOLDER:
97009003-000
38929-10
1N645
GMW1-10
312001
RC32GF100J
43000290-000
17160S
HWA-AF
3823-1
Mfr
Part No.
96238
34122
81349
75915
75915
81349
96238
70903
71400
71400
CHASSIS ASSEMBLY A1 (97009003-0)
Ref
design
A1
A2
C1
DS1
J1
J2
J3
Q1
R2
Mfr
Part No.
Description
CKT CARD ASSY, Timing and data register;
CKT CARD ASSY, Distortion and message generator;
CAP., FXD, CERAMIC: 0.25uf, ± 20%, 500V;
DIODE: Red Emitting
JACK, TELEPHONE:
JACK, BANANA: Red;
JACK, BANANA: Black;
TRANSISTOR: NPN
RES, FXD, COMP: 1000 ohms, ± 5%, 1/2W;
CIRCUIT CARD ASSEMBLY A1A1, TIMING & DATA REGISTER (87009000-000)
E-1
87009000-00
87009010-000
5GA-S25
MV5022
N111
1508-102 RED
1508-103 BLK
ST213
RC20GF107J
Mfr
Code No
96238
96238
56289
26483
82389
83330
83330
96238
81349
TM 11-6625-2814-14&P
Table 5-2. Replaceable Part--Continued
CIRCUIT CARD ASSEMBLY A1A1, TIMING & DATA REGISTER (870090-000)
Ref
Design
CR1-CR15
CR16-CR19
C1
C2
C3
C4
C5
C6
C7
C8
C9
C10
Q1-Q3
Q4
Q5
R1-R4
R5
R6
R7
R8
R9
R10
R11, R12
R13, R14
R15, R16
R17
R18
R19
R20
R21, R22
R23-R26
S1, S2
T1
U1
U2
U3-U5
U6
VR1
VR2, VR3
VR4
VR5
CR1
CR2
CR3-CR6
C1
Q1
Q2
Q3
R1
R2
R3
R4
R5-R12
R13
R14
R15
R16
R17
R18
R19
Mfr
Part No.
Description
SEMICOND, DIODE: germanium;
SEMICOND, DIODE: silicon;
CAP, FXD, M1CA: 2000pf, ± 5%, 500V;
CAP., FXD, TANTALUM: 3.3uf, ±20%, 15V;
CAP., FXD, CERAMIC: 1000pf, ±20%, 1KV;
CAP., FXD, CERAMIC: 0.01uf, ±20 %, 100V;
CAP., FXD, TANTALUM: 10uf, ±20%, 20V;
Same as C4
Same as C5
Same as C2
CAP., FXD, CERAMIC: 0.005uf, ± 20%, 100V;
Same as C2
TRANSISTOR: NPN;
TRANSISTOR: NPN;
TRANSISTOR: PNP;
RES, VAR: 10, 000 ohms;
RES, FXD, FILM: 35.7K ohms, ±1%, 1/10W;
RES, FXD, FILM: 301, 000 ohms, ±1%, 1/8W;
RES, FXD, COMP: 470 ohm, ± 5%, 1/4W;
RES, FXD, COMP: 4700 ohms, ±5%, 1/4W;
RES, FXD, COMP: 22, 000 ohms, ±5%, 1/4W;
RES, FXD, COMP: 68, 000 ohms, ±5%, 1/4W;
RES, FXD, COMP: 39, 000 ohms, ±5%, 1/4W;
RES, FXD, COMP: 3900 ohms, ±5%, 1/4W;
RES, FXD, COMP: 7500 ohm, ±5%, 1/4W;
RES, FXD, COMP: 1K ohms, ±5%, 1/4W;
RES, FXD, COMP: 30, 000 ohms, ±5%, 1/4W;
RI, FXD, COMP: 5600 ohms, ±5%, 1/4W;
Same as R11
RES, FXD, COMP: 22 ohms, ±5%1/4W;
Factory Select (for baud rate)
SWITCH ASSEMBLY:
TRANSFORMER:
INTEGRATED CKT: 4-bit binary counter;
INTEGRATED CKT: cos/mos
gates;
INTEGRATED CKT: 4-bit shift register
INTEGRATED CKT: hex inverter
SEMICOND, DIODE: Zener;
SEMICOND, DIODE: Zener;
SEMICOND, DIODE: Zener;
Same as VR2
SEMICOND, DIODE: silicon;
SEMICOND, DIODE: germanium;
SEMICOND, DIODE: silicon;
CAP., FXD, TANTALUM: 2.2uf, ±20%, 20V;
TRANSISTOR: NPN;
TRANSISTOR: PNP;
Same as Q1
RES, FXD, COMP: 33, 000 ohms, ±5%, 1/4W;
RES, FXD, COMP: 15, 000 ohms, ±5%, 1/4W;
RES, FXD, COMP: 47, 000 ohms, ±5%, 1/4W;
RES, FXD, COMP: 24, 000 ohms, ±5%, 1/4W;
RES, FXD, COMP: 22, 000 ohms, ±5%, 1/4W;
RES, FXD, COMP: 10, 000 ohms, ±5%, 1/4W;
Same as R4
Same as R13
Same as R4
Same as R13
Same as R4
Same as R13
E-2
Mfr
Code No.
1N277
1N914
CM06FD202J03
CS13BD335M
C023B102E102M
C023B101F103M
CS13BE106M
81349
81349
56289
81349
56289
56289
81349
C023B101E502M
56289
2N2222
2N930
2N2907
3006P-1-103
RN55C3572F
RN55D3013F
RC07GF471J
RC07GF472J
RC07GF223J
RC07GF683J
RC07GF393J
RC07GF392J
RC07GF752J
RC07GF102J
RC07GF303J
RC07GF562J
81349
81349
81349
80294
81349
81349
81349
81349
81349
81349
81349
81349
81349
81349
81349
81349
RC07GF220J
81349
46027669-000
43000289-000
SN74L93N
CD4001AE
96238
96238
01295
86684
SN74L95N
SN74L04N
1N756A
1N759A
1N964B
01295
01295
81349
81349
81349
1N914
1N277
1N645
C13BE225M
2N2222
2N2907
81349
81349
81349
81349
81349
81349
RC07GF333J
RC07GF153J
RC07GF473J
RC07GF243J
RC07GF223J
RC07GF103J
81349
81349
81349
81349
81349
81349
TM 11-5525 2814-14&P
Table 6-2. Replaceable Parts-Continued
CIRCUIT CARD ASSEMBLY A1A1, TIMING & DATA REGISTER, (87009000-000)
Ref
Desig
R20
R21
R22
R23
R24
R25
R26
R27
R28
R29, R30
R31
R32
R33
R34
R35
R36-R38
R39
S1-S4
U1
U2
U3
U4
U5
U8
U7
U8
U9
U10
VR1
Mfr
Part No.
Description
Same as R4
Same as R13
Same as R4
Same as R13
Same as R4
Same as R13
Same as R4
Same as R13
Same as R4
Same as R1
RES, FXD, COMP: 27, 000 ohms, ±5%, 1/4W;
RES, FXD, COMP: 100 ohms, ±5%, 1/4W,
RES, FXD, COMP: 270 ohm, ±5%, 1/4W;
RES, FXD, COMP: 100 ohms, ±5%, 1/4W;
RES, FXD, COMP: 510 ohm, ±5%, 1/4W;
RES, FXD, COMP: 1000 ohms, ±5%, 1/4W;
RES, FXD, COMP: 680 ohms, ±5%, 1/4W;
SWITCH ASSEMBLY:
INTEGRATED CKT: read-only memory;
INTEGRATED CKT: 4-input NAND gate;
INTEGRATED CKT: dual J-K master-slave flip-flop;
INTEGRATED CKT: 3-input NAND gate;
INTEGRATED CKT: 2-input NAND gate;
Same as U3
INTEGRATED CKT: 2-input NAND gate;
Same as U3
Same as U5
INTEGRATED CKT: 4-bit binary counter;
SEMICOND, DIODE: Zener;
E-3
Mfr
Code No.
RC07GF273J
RC07GF101J
RC07GF271J
RC07GF101J
RC07GF511J
RC07GF102J
RC07GF681J
46027668-000
45010006-000
SN74L20N
SN74L73N
SN74L10N
SN74L03N
81349
81349
81349
81349
81349
81349
81349
96238
96238
01295
01295
01295
01295
SN74L00N
01295
SN74L93N
1N749A
01295
81349
TM 11-6625-2814-14&P
SECTION II. PART NUMBER -- NATIONAL STOCK NUMBER
CROSS REFERENCE INDEX
PART
NUMBER
FSCM
NATIONAL
STOCK
NUMBER
CD4001AE
CS13BE106M
CS13BE225M
CS13B101E502M
C023B1F103M
C023B102E102M
N111
RC07GF101J
RC07GF102J
RC07GF103J
RC07GF153J
RC07GF220J
RC07GF223J
RC07GF243J
RC07GF271J
RC07GF273J
RC07GF303J
RC07GF333J
RC07GF392J
RC07GF393J
RC07GF471J
86684
81349
81349
56289
56289
56289
82389
81349
81349
81349
81349
81349
81349
81349
81349
81349
81349
81349
81349
81349
81349
5962-00-169-4730
5910-00-433-5446
5910-00-007-2002
5910-00-110-7493
5910-00-810-4849
5910-00-126-1593
5935-00-941-3817
5905-00-683-7721
5905-00-681-6462
5905-00-683-2238
5905-00-681-8818
5905-00-755-8389
5905-00-687-0002
5905-00-721-0597
5905-00-725-6995
5905-00-686-3838
5905-00-803-2908
5905-00-686-3903
5905-00-682-4098
5905-00-686-3358
5905-00-120-9154
RC07GF472J
RC07GF473J
RC07GF511J
81349
81349
81349
5905-00-686-9998
5905-00-683-2246
5905-00-116-2394
RC07GF562J
RC07GF681J
RC07GF683J
RC07GF752J
RC07GF102J
RC32GF100J
RN55C3572F
81349
81349
81349
81349
81349
81349
81349
5905-00-691-0195
5905-00-727-8001
5905-00-681-8853
5905-00-682-4101
5905-00-195-6806
5905-00-279-1692
5905-00-982-0482
PART
NUMBER
RN55D3013F
SN74L00N
SN74L04N
SN74L10N
SN74L73N
SN74L93N
1N645
1N914
1N964B
3006P-1-103
3823-1
E-5
FSCM
NATIONAL
STOCK
NUMBER
81349
01295
01295
01295
01295
01295
81349
81349
81349
80294
71400
5905-00-733-1565
5962-00-400-9087
5962-00 497-1586
5962-00-169-4723
5962-00-167-3463
5962-00-274-4110
5961-00-577-6084
5961-00-022-5664
5961-00-752-6115
5905-00-243-1778
5920-00-137-4991
TM 11-6625-2814-14&P
E78807025
FO-1. Timing and Data Register Assembly A1, Schematic Diagram
TM 11-6625-2814-14&P
EL2PP006
FO-2. Distortion and Message Generator Assembly A2, Schematic Diagram.
TM 11-6625-2814-14&P
By Order of the Secretary of the Army
E. C. MEYER
General, United States Army
Chief of Staff
Official:
J. C. PENNINGTON
Major General, United States Army
The Adjutant General
DISTRIBUTION:
To be distributed in accordance with special mailing list.
PIN: 048443-000
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