High Speed, Low Noise Video Op Amp AD829 Data Sheet

High Speed, Low Noise Video Op Amp AD829 Data Sheet
High Speed, Low Noise
Video Op Amp
AD829
Data Sheet
GENERAL DESCRIPTION
The"% is a low noise (1.7 nV/√Hz), high speed op amp with
custom compensation that provides the user with gains of 1 to 20
while maintaining a bandwidth >50 MHz. Its 0.04° differential
phase and 0.02% differential gain performance at 3.58 MHz and
4.43 MHz, driving reverse-terminated 50 Ω or 75 Ω cables, makes
it ideally suited for professional video applications. The AD829
achieves its 230 V/µs uncompensated slew rate and 750 MHz
gain bandwidth while requiring only 5 mA of current from
power supplies.
The external compensation pin of the AD829 gives it
exceptional versatility. For example, compensation can be
selected to optimize the bandwidth for a given load and power
supply voltage. As a gain-of-2 line driver, the −3 dB bandwidth
can be increased to 95 MHz at the expense of 1 dB of peaking.
Its output can also be clamped at its external compensation pin.
The AD829 exhibits excellent dc performance. It offers a minimum
open-loop gain of 30 V/mV into loads as low as 500 Ω, a low input
voltage noise of 1.7 nV/√Hz, and a low input offset voltage of 1 mV
maximum. Common-mode rejection and power supply rejection
ratios are both 120 dB.
This op amp is also useful in multichannel, high speed data
conversion where its fast (90 ns to 0.1%) settling time is important.
In such applications, the AD829 serves as an input buffer for 8-bit to
10-bit ADCs and as an output I/V converter for high speed DACs.
CONNECTION DIAGRAM
8
OFFSET NULL
–IN 2
7
+VS
+IN 3
6
OUTPUT
5
CCOMP
OFFSET NULL 1
AD829
TOP VIEW
(Not to Scale)
–VS 4
NC
OFFSET
NULL
NC
OFFSET
NULL
NC
Figure 1. 8-Lead PDIP (N), CERDIP (Q), and SOIC (R)
3
2
1
20 19
18 NC
NC 4
–IN 5
+IN 7
17 +V
TOP VIEW
(Not to Scale)
16 NC
15 OUTPUT
14 NC
NC = NO CONNECT
NC
NC
10 11 12 13
CCOMP
9
–V
NC 8
00880-002
NC 6
AD829
NC
High speed
120 MHz bandwidth, gain = −1
230 V/µs slew rate
90 ns settling time to 0.1%
Ideal for video applications
0.02% differential gain
0.04° differential phase
Low noise
1.7 nV/√Hz input voltage noise
1.5 pA/√Hz input current noise
Excellent dc precision
1 mV maximum input offset voltage (over temperature)
0.3 µV/°C input offset drift
Flexible operation
Specified for ±5 V to ±15 V operation
±3 V output swing into a 150 Ω load
External compensation for gains 1 to 20
5 mA supply current
Available in tape and reel in accordance with EIA-481A standard
00880-001
FEATURES
Figure 2. 20-Terminal LCC
Operating as a traditional voltage feedback amplifier, the AD829
provides many of the advantages that a transimpedance amplifier
offer. A bandwidth >50 MHz can be maintained for a range of
gains through the replacement of the external compensation
capacitor. The AD829 and the transimpedance amplifier are both
unity-gain stable and provide similar voltage noise performance
(1.7 nV/√Hz); however, the current noise of the AD829
(1.5 pA/√Hz) is less than 10% of the noise of transimpedance
amplifiers. The inputs of the AD829 are symmetrical.
PRODUCT HIGHLIGHTS
1.
2.
3.
4.
5.
The input voltage noise of 2 nV/√Hz, current noise of
1.5 pA/√Hz, and 50 MHz bandwidth for gains of 1 to 20
make the AD829 an ideal preamp.
A differential phase error of 0.04 and a 0.02% differential
gain error, at the 3.58 MHz NTSC, 4.43 MHz PAL, and
SECAM color subcarrier frequencies, make the op amp an
outstanding video performer for driving reverse-terminated
50 Ω and 75 Ω cables to ±1 V (at their terminated end).
The AD829 can drive heavy capacitive loads.
Performance is fully specified for operation from ±5 V
to ±15 V supplies.
The AD829 is available in PDIP, CERDIP, and small outline
packages. Chips and MIL-STD-883B parts are also available.
The 8-lead SOIC is available for the extended temperature
range (−40°C to +125°C).
Rev. I
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2011 Analog Devices, Inc. All rights reserved.
AD829
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Test Circuits ..................................................................................... 11
General Description ......................................................................... 1
Theory of Operation ...................................................................... 12
Connection Diagram ....................................................................... 1
Externally Compensating the AD829...................................... 12
Product Highlights ........................................................................... 1
Shunt Compensation ................................................................. 12
Revision History ............................................................................... 2
Current Feedback Compensation ............................................ 13
Specifications..................................................................................... 3
Low Error Video Line Driver ................................................... 15
Absolute Maximum Ratings............................................................ 5
Thermal Characteristics .............................................................. 5
High Gain Video Bandwidth, 3-Op-Amp Instrumentation
Amplifier ..................................................................................... 16
Metallization Photo ...................................................................... 5
Outline Dimensions ....................................................................... 17
ESD Caution .................................................................................. 5
Ordering Guide .......................................................................... 19
Typical Performance Characteristics ............................................. 6
REVISION HISTORY
10/11—Rev. H to Rev. I
Change to Table 2 ............................................................................. 5
4/09—Rev. G to Rev. H
Changes to Features.......................................................................... 1
Changes to Quiescent Current Parameter, Table 1 ...................... 4
Changes to Table 2 ............................................................................ 5
Added Thermal Characteristics Section and Table 3 .................. 5
Updated Outline Dimensions ....................................................... 17
Changes to Ordering Guide .......................................................... 19
2/03—Rev. E to Rev. F
Renumbered Figures ......................................................... Universal
Changes to Product Highlights .......................................................1
Changes to Specifications .................................................................2
Changes to Absolute Maximum Ratings ........................................4
Changes to Ordering Guide .............................................................4
Updated Outline Dimensions ....................................................... 13
4/04—Rev. F to Rev. G
Added Figure 1; Renumbered Sequentially .................................. 4
Changes to Ordering Guide ............................................................ 5
Updated Table I ............................................................................... 11
Updated Figure 15 .......................................................................... 12
Updated Figure 16 .......................................................................... 13
Updated Outline Dimensions ....................................................... 14
Rev. I | Page 2 of 20
Data Sheet
AD829
SPECIFICATIONS
TA = 25°C and VS = ±15 V dc, unless otherwise noted.
Table 1.
Parameter
INPUT OFFSET VOLTAGE
Conditions
tMIN to tMAX
VS
±5 V,
±15 V
Min
AD829JR
Typ
Max
0.2
1
Min
AD829AR
Typ
Max
0.2
1
1
Offset Voltage Drift
INPUT BIAS CURRENT
0.3
3.3
7
3.3
7
±5 V,
±15 V
50
8.2
500
50
9.5
500
± 5 V,
±15 V
±5 V
0.5
30
±15 V
20
50
tMIN to tMAX
Offset Current Drift
OPEN-LOOP GAIN
VO = ±2.5 V,
RL = 500 Ω
RL = 150 Ω
tMIN to tMAX
VO = ±10 V,
RL = 1 kΩ
RL = 500 Ω
tMIN to tMAX
DYNAMIC PERFORMANCE
Gain Bandwidth Product
Full Power Bandwidth 1, 2
Slew Rate2
Settling Time to 0.1%
Phase Margin2
DIFFERENTIAL GAIN ERROR 3
DIFFERENTIAL PHASE ERROR3
COMMON-MODE REJECTION
POWER SUPPLY REJECTION
INPUT VOLTAGE NOISE
INPUT CURRENT NOISE
VO = 2 V p-p,
RL = 500 Ω
VO = 20 V p-p,
RL = 1 kΩ
RL = 500 Ω
RL = 1 kΩ
AV = –19
−2.5 V to
+2.5 V
10 V step
CL = 10 pF
RL = 1 kΩ
RL = 100 Ω,
CCOMP = 30 pF
RL = 100 Ω,
CCOMP = 30 pF
VCM = ±2.5 V
VCM = ±12 V
tMIN to tMAX
VS = ±4.5 V
to ±18 V
tMIN to tMAX
f = 1 kHz
f = 1 kHz
1
±5 V,
±15 V
±5 V,
±15 V
tMIN to tMAX
INPUT OFFSET CURRENT
AD829AQ/AD829S
Min Typ
Max
0.1
0.5
0.3
500
65
40
65
30
40
20
50
85
20
50
100
85
20
mV
µV/°C
3.3
7
µA
50
9.5
500
µA
nA
500
0.5
nA
nA/°C
65
V/mV
40
V/mV
V/mV
V/mV
500
30
100
0.5
0.3
0.5
20
Unit
mV
100
85
V/mV
V/mV
20
±5 V
±15 V
±5 V
600
750
25
600
750
25
600
750
25
MHz
MHz
MHz
±15 V
3.6
3.6
3.6
MHz
±5 V
±15 V
150
230
150
230
150
230
V/µs
V/µs
±5 V
65
65
65
ns
±15 V
±15 V
90
90
90
ns
±15 V
60
0.02
60
0.02
60
0.02
Degrees
%
±15 V
0.04
0.04
0.04
Degrees
120
120
dB
dB
dB
dB
±5 V
±15 V
100
100
96
98
120
120
100
100
96
98
120
94
±15 V
±15 V
120
120
100
100
96
98
120
94
1.7
1.5
2
Rev. I | Page 3 of 20
120
94
1.7
1.5
2
1.7
1.5
2
dB
nV/√Hz
pA/√Hz
AD829
Parameter
INPUT COMMON-MODE
VOLTAGE RANGE
Data Sheet
Conditions
VS
±5 V
Min
±15 V
OUTPUT VOLTAGE SWING
RL = 500 Ω
RL = 150 Ω
RL = 50 Ω
RL = 1 kΩ
RL = 500 Ω
Short-Circuit Current
INPUT CHARACTERISTICS
Input Resistance
(Differential)
Input Capacitance
(Differential) 4
Input Capacitance
(Common Mode)
CLOSED-LOOP OUTPUT
RESISTANCE
POWER SUPPLY
Operating Range
Quiescent Current
±5 V
±5 V
±5 V
±15 V
±15 V
±5 V,
±15 V
±3.0
±2.5
±12
±10
AV = +1,
f = 1 kHz
AD829JR
Typ
Max
+4.3
−3.8
+14.3
−13.8
±3.6
±3.0
±1.4
±13.3
±12.2
32
±12
±10
−3.8
+14.3
−13.8
±3.6
±3.0
±1.4
±13.3
±12.2
32
AD829AQ/AD829S
Min Typ
Max
+4.3
Unit
V
−3.8
+14.3
−13.8
±3.6
±3.0
±1.4
±13.3
±12.2
32
V
V
V
V
V
V
V
V
mA
±3.0
±2.5
±12
±10
13
13
kΩ
5
5
5
pF
1.5
1.5
1.5
pF
2
2
2
mΩ
±4.5
tMIN to tMAX
Number of
transistors
±3.0
±2.5
AD829AR
Typ
Max
+4.3
13
±5 V
5
±15 V
5.3
tMIN to tMAX
TRANSISTOR COUNT
Min
±18
6.5
8.0
6.8
8.3
46
±4.5
5
5.3
46
Full power bandwidth = slew rate/2 π VPEAK.
Tested at gain = 20, CCOMP = 0 pF.
3
3.58 MHz (NTSC) and 4.43 MHz (PAL and SECAM).
4
Differential input capacitance consists of 1.5 pF package capacitance plus 3.5 pF from the input differential pair.
1
2
Rev. I | Page 4 of 20
±18
6.5
8.0
6.8
9.0
±4.5
5
5.3
46
±18
6.5
8.7
6.8
9.0
V
mA
mA
mA
mA
Data Sheet
AD829
ABSOLUTE MAXIMUM RATINGS
METALLIZATION PHOTO
Table 2.
OFFSET NULL
1
Rating
±18 V
1.3 W
0.9 W
1.3 W
0.8 W
±6 V
Indefinite
+VS
7
OUTPUT
6
0.054
(1.37)
CCOMP
5
+IN
3
0°C to 70°C
−40°C to +125°C
−55°C to +125°C
300°C
Maximum internal power dissipation is specified so that TJ does not exceed
150°C at an ambient temperature of 25°C.
2
If the differential voltage exceeds 6 V, external series protection resistors
should be added to limit the input current.
–VS
4
00880-003
0.067 (1.70)
SUBSTRATE CONNECTED TO +VS
Figure 3. Metallization Photo; Contact Factory for Latest Dimensions,
Dimensions Shown in Inches and (Millimeters)
2.5
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL CHARACTERISTICS
2.0
PDIP
LCC
1.5
1.0
CERDIP
SOIC
0.5
00880-004
−65°C to +150°C
−65°C to +125°C
1
0
–55 –45 –35 –25 –15 –5
Table 3.
Package Type
8-Lead PDIP (N)
8-Lead CERDIP (Q)
20-Lead LCC (E)
8-Lead SOIC (R)
OFFSET NULL
8
–IN
2
MAXIMUM POWER DISSIPATION (W)
Parameter
Supply Voltage
Internal Power Dissipation1
8-Lead PDIP (N)
8-Lead SOIC (R)
8-Lead CERDIP (Q)
20-Terminal LCC (E)
Differential Input Voltage2
Output Short-Circuit Duration
Storage Temperature Range
8-Lead CERDIP (Q) and 20-Terminal LCC (E)
8-Lead PDIP (N) and 8-Lead SOIC (R)
Operating Temperature Range
AD829J
AD829A
AD829S
Lead Temperature (Soldering, 60 sec)
5
15 25 35 45 55 65 75 85 95 105 115 125
AMBIENT TEMPERATURE (°C)
θJA
100 (derates at 8.7 mW/°C)
110 (derates at 8.7 mW/°C)
77
125 (derates at 6 mW/°C)
Unit
°C/W
°C/W
°C/W
°C/W
Figure 4. Maximum Power Dissipation vs. Temperature
ESD CAUTION
Rev. I | Page 5 of 20
AD829
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
15
+VOUT
10
–VOUT
5
0
0
5
10
SUPPLY VOLTAGE (±V)
5.5
5.0
4.5
4.0
20
15
00880-008
QUIESCENT CURRENT (mA)
6.0
00880-005
0
Figure 5. Input Common-Mode Range vs. Supply Voltage
20
15
INPUT BIAS CURRENT (µA)
–5
15
+VOUT
10
–VOUT
5
00880-006
RL = 1kΩ
0
0
5
10
15
–4
VS = ±5V, ±15V
–3
–2
–60
20
–40
–20
SUPPLY VOLTAGE (±V)
Figure 6. Output Voltage Swing vs. Supply Voltage
20
40
60
80
TEMPERATURE (°C)
100
120
140
±15V
SUPPLIES
20
15
10
100
1k
LOAD RESISTANCE (Ω)
00880-007
±5V
SUPPLIES
5
10
AV = 20
CCOMP = 0pF
1
0.1
AV = 1
CCOMP = 68pF
0.01
0.001
1k
10k
Figure 7. Output Voltage Swing vs. Resistive Load
00880-010
CLOSED-LOOP OUTPUT IMPEDANCE (Ω)
100
25
0
10
0
Figure 9. Input Bias Current vs. Temperature
30
OUTPUT VOLTAGE SWING (V p-p)
10
SUPPLY VOLTAGE (±V)
Figure 8. Quiescent Current vs. Supply Voltage
20
MAGNITUDE OF THE OUTPUT VOLTAGE (V)
5
00880-009
INPUT COMMON-MODE RANGE (V)
20
10k
100k
1M
FREQUENCY (Hz)
10M
Figure 10. Closed-Loop Output Impedance vs. Frequency
Rev. I | Page 6 of 20
100M
Data Sheet
AD829
7
120
100
PHASE
VS = ±15V
5
VS = ±5V
80
GAIN
±15V
SUPPLIES
1kΩ LOAD
80
60
GAIN
±5V
SUPPLIES
500Ω LOAD
60
40
40
20
4
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
100
120
0
100
140
1k
10k
100k
1M
FREQUENCY (Hz)
10M
–20
100M
Figure 14. Open-Loop Gain and Phase vs. Frequency
Figure 11. Quiescent Current vs. Temperature
105
40
NEGATIVE
CURRENT LIMIT
100
35
OPEN-LOOP GAIN (dB)
POSITIVE
CURRENT LIMIT
30
25
20
VS = ±15V
95
VS = ±5V
90
85
15
–60
–40
–20
0
20
40
60
80
100
120
00880-015
80
VS = ±5V
00880-012
75
10
140
100
1k
LOAD RESISTANCE (Ω)
AMBIENT TEMPERATURE (°C)
10k
Figure 15. Open-Loop Gain vs. Resistive Load
Figure 12. Short-Circuit Current Limit vs. Ambient Temperature
120
65
VS = ±15V
AV = +20
CCOMP = 0pF
+SUPPLY
100
60
PSRR (dB)
–SUPPLY
55
80
60
50
45
–60
00880-013
40
–40
–20
0
20
40
60
80
100
120
00880-016
SHORT-CIRCUIT CURRENT LIMIT (mA)
0
CCOMP = 0pF
CCOMP = 0pF
20
1k
140
TEMPERATURE (°C)
10k
100k
1M
FREQUENCY (Hz)
10M
100M
Figure 16. Power Supply Rejection Ratio (PSRR) vs. Frequency
Figure 13. –3 dB Bandwidth vs. Temperature
Rev. I | Page 7 of 20
00880-014
3
–60
00880-011
20
–3dB BANDWIDTH (MHz)
PHASE (Degrees)
OPEN-LOOP GAIN (dB)
QUIESCENT CURRENT (mA)
100
6
AD829
Data Sheet
–70
120
VIN = 3V RMS
AV = –1
CCOMP = 30pF
CL = 100pF
–75
100
–80
–85
THD (dB)
CMRR (dB)
80
60
RL = 500Ω
–90
–95
–100
RL = 2kΩ
40
10k
100k
1M
FREQUENCY (Hz)
–110
100
100M
10M
300
1k
3k
10k
30k
100k
FREQUENCY (Hz)
Figure 17. Common-Mode Rejection Ratio (CMRR) vs. Frequency
Figure 20. Total Harmonic Distortion (THD) vs. Frequency
30
–20
VS = ±15V
RL = 1kΩ
AV = +20
CCOMP = 0pF
25
VIN = 2.25V RMS
AV = –1
RL = 250Ω
CL = 0pF
CCOMP = 30pF
–30
THIRD HARMONIC
20
THD (dB)
15
VS = ±5V
RL = 500Ω
AV = +20
CCOMP = 0pF
10
–40
–50
SECOND HARMONIC
–60
00880-018
5
0
1
10
00880-021
OUTPUT VOLTAGE (V p-p)
00880-020
20
1k
–105
00880-017
CCOMP = 0pF
–70
100
0
500k
1.0M
INPUT FREQUENCY (MHz)
2.0M
1.5M
FREQUENCY (Hz)
Figure 21. Second and Third THD vs. Frequency
Figure 18. Large Signal Frequency Response
5
10
4
2
1%
0.1%
1%
0.1%
0
ERROR
AV = –19
CCOMP = 0pF
–2
–4
–6
–8
–10
0
20
40
60
80
100
SETTLING TIME (ns)
120
140
4
3
2
1
0
10
160
00880-022
INPUT VOLTAGE NOISE (nV/ Hz)
6
00880-019
OUTPUT SWING FROM 0 TO ±V
8
100
1k
10k
100k
1M
FREQUENCY (Hz)
Figure 22. Input Voltage Noise Spectral Density
Figure 19. Output Swing and Error vs. Settling Time
Rev. I | Page 8 of 20
10M
Data Sheet
AD829
400
AV = +20
SLEW RATE 10% TO 90%
20mV
350
20ns
100%
SLEW RATE (V/µs)
90
RISE
300
VS = ±15V
FALL
250
RISE
200
10
FALL
0%
VS = ±5V
100
–60
–40
–20
0
20
40
60
80
TEMPERATURE (°C)
100
120
00880-028
00880-023
150
140
Figure 23. Slew Rate vs. Temperature
Figure 26. Gain-of-2 Follower Small Signal Pulse Response (See Figure 32)
0.03
0.043°
0.05
DIFFERENTIAL PHASE
100%
90
DIFFERENTIAL GAIN (%)
DIFFERENTIAL GAIN
0.01
50ns
10
0%
0.04
0.03
±5
00880-030
00880-024
DIFFERENTIAL PHASE (Degrees)
2V
0.02
±15
±10
SUPPLY VOLTAGE (V)
Figure 24. Differential Phase and Gain vs. Supply Voltage
200mV
Figure 27. Gain-of-20 Follower Large Signal Pulse Response (See Figure 33)
50ns
50mV
20ns
100%
90
10
10
0%
0%
00880-031
00880-027
90
Figure 25. Gain-to-2 Follower Large Signal Pulse Response (See Figure 32)
Figure 28. Gain-of-20 Follower Small Signal Pulse Response (See Figure 33)
Rev. I | Page 9 of 20
AD829
Data Sheet
200mV
50ns
20mV
90
10
10
0%
0%
00880-034
100%
90
00880-033
100%
20ns
Figure 29. Unity-Gain Inverter Large Signal Pulse Response (See Figure 34)
Figure 30. Unity-Gain Inverter Small Signal Pulse Response (See Figure 34)
Rev. I | Page 10 of 20
Data Sheet
AD829
TEST CIRCUITS
CCOMP
(EXTERNAL)
+VS
0.1µF
5
–
7
AD829
6
4
+
3
8
0.1µF
20kΩ
1
OFFSET
NULL
ADJUST
00880-025
2
–VS
Figure 31. Offset Null and External Shunt Compensation Connections
+15V
CCOMP
15pF
0.1µF
50Ω
CABLE
7
HP8130A
5ns RISE TIME
+
3
5
AD829
50Ω
50Ω
CABLE
50Ω
6
–
2
4
300kΩ
5pF
0.1µF
–15V
TEKTRONIX
TYPE 7A24
PREAMP
50Ω
00880-026
300kΩ
Figure 32. Follower Connection, Gain = 2
+15V
0.1µF
100Ω
2
FET
PROBE
7
–
AD829
5Ω
3
6
TEKTRONIX
TYPE 7A24
PREAMP
+
4
2kΩ
1pF
0.1µF
–15V
105kΩ
CCOMP = 0pF
00880-029
HP8130A
5ns RISE TIME
50Ω
CABLE 45Ω
Figure 33. Follower Connection, Gain = 20
5pF
300Ω
+15V
0.1µF
300Ω
2
7
–
50Ω
AD829
50Ω
3
6
5
+
4
50Ω
CABLE
CCOMP
15pF
0.1µF
–15V
Figure 34. Unity-Gain Inverter Connection
Rev. I | Page 11 of 20
TEKTRONIX
TYPE 7A24
PREAMP
50Ω
00880-032
50Ω
CABLE
HP8130A
5ns RISE TIME
AD829
Data Sheet
THEORY OF OPERATION
The AD829 is fabricated on the Analog Devices, Inc., proprietary
complementary bipolar (CB) process, which provides PNP and
NPN transistors with similar fTs of 600 MHz. As shown in
Figure 35, the AD829 input stage consists of an NPN differential
pair in which each transistor operates at a 600 µA collector current.
This gives the input devices a high transconductance, which in
turn gives the AD829 a low noise figure of 2 nV/√Hz at 1 kHz.
+VS
15Ω
OUTPUT
R
500Ω
EXTERNALLY COMPENSATING THE AD829
15Ω
–IN
The AD829 is stable with no external compensation for noise
gains greater than 20. For lower gains, two different methods of
frequency compensating the amplifier can be used to achieve
closed-loop stability: shunt and current feedback compensation.
1.2mA
OFFSET NULL
CCOMP
00880-035
–VS
SHUNT COMPENSATION
Figure 35. Simplified Schematic
The input stage drives a folded cascode that consists of a fast pair of
PNP transistors. These PNPs drive a current mirror that provides a
differential-input-to-single-ended-output conversion. The high
speed PNPs are also used in the current-amplifying output stage,
which provides a high current gain of 40,000. Even under heavy
loading conditions, the high fTs of the NPN and PNPs, produced
using the CB process, permit cascading two stages of emitter
followers while maintaining 60 phase margin at closed-loop
bandwidths greater than 50 MHz.
Figure 36 and Figure 37 show that shunt compensation has an
external compensation capacitor, CCOMP, connected between the
compensation pin and ground. This external capacitor is tied in
parallel with approximately 3 pF of internal capacitance at the
compensation node. In addition, a small capacitance, CLEAD, in
parallel with resistor R2, compensates for the capacitance at the
inverting input of the amplifier.
CLEAD
50Ω
COAX
CABLE
Two stages of complementary emitter followers also effectively
buffer the high impedance compensation node (at the CCOMP pin)
from the output so that the AD829 can maintain a high dc openloop gain, even into low load impedances (92 dB into a 150 Ω
load and 100 dB into a 1 kΩ load). Laser trimming and PTAT
biasing ensure low offset voltage and low offset voltage drift,
enabling the user to eliminate ac coupling in many applications.
0.1µF
R1
VIN
2
7
–
AD829
50Ω
3
VOUT
6
5
+
CCOMP
4
1kΩ
0.1µF
–VS
Figure 36. Inverting Amplifier Connection Using External Shunt
Compensation
For added flexibility, the AD829 provides access to the internal
frequency compensation node. This allows users to customize the
frequency response characteristics for a particular application.
+VS
50Ω
CABLE
0.1µF
VIN
3
7
+
AD829
50Ω
Unity-gain stability requires a compensation capacitance of 68 pF
(Pin 5 to ground), which yields a small signal bandwidth of
66 MHz and slew rate of 16 V/µs. The slew rate and gain
bandwidth product varies inversely with compensation
capacitance. Table 4 and Figure 37 show the optimum
compensation capacitance and the resulting slew rate for
a desired noise gain.
For gains between 1 and 20, choose CCOMP to keep the small signal
bandwidth relatively constant. The minimum gain that will still
provide stability depends on the value of the external
compensation capacitance.
R2
+VS
00880-036
+IN
2
4
VOUT
6
5
–
R2
1kΩ
CCOMP
CLEAD
0.1µF
–VS
R1
00880-037
C
12.5pF
An RC network in the output stage (see Figure 35) completely
removes the effect of capacitive loading when the amplifier
compensates for closed-loop gains of 10 or higher. At low
frequencies, and with low capacitive loads, the gain from the
compensation node to the output is very close to unity. In this case,
C is bootstrapped and does not contribute to the compensation
capacitance of the device. As the capacitive load increases, a pole
forms with the output impedance of the output stage, which
reduces the gain, and subsequently, C is incompletely
bootstrapped. Therefore, some fraction of C contributes to the
compensation capacitance, and the unity-gain bandwidth falls.
As the load capacitance is further increased, the bandwidth
continues to fall, and the amplifier remains stable.
Figure 37. Noninverting Amplifier Connection Using External Shunt
Compensation
Table 4 gives the recommended CCOMP and CLEAD values, as well
as the corresponding slew rates and bandwidth. The capacitor
values were selected to provide a small signal frequency response
with <1 dB of peaking and <10% overshoot. For Table 4, ±15 V
Rev. I | Page 12 of 20
Data Sheet
AD829
supply voltages should be used. Figure 38 is a graphical extension
of Table 4, which shows the slew rate/gain trade-off for lower
closed-loop gains, when using the shunt compensation scheme.
100
Slew Rate =
10
100
VS = ±15V
1
1
10
100
10
NOISE GAIN
SLEW RATE (V/µs)
SLEW RATE
00880-038
CCOMP (pF)
Because both fT and slew rate are functions of the same variables,
the dynamic behavior of an amplifier is limited. Because
1k
CCOMP
Figure 38. Value of CCOMP and Slew Rate vs. Noise Gain
CURRENT FEEDBACK COMPENSATION
2I
CCOMP
then
Slew Rate
fT
=4π
kT
q
This shows that the slew rate is only 0.314 V/µs for every megahertz of bandwidth. The only way to increase the slew rate is to
increase the fT, and that is difficult because of process limitations.
Unfortunately, an amplifier with a bandwidth of 10 MHz can
only slew at 3.1 V/µs, which is barely enough to provide a full
power bandwidth of 50 kHz.
The AD829 is especially suited to a form of current feedback
compensation that allows for the enhancement of both the full
power bandwidth and the slew rate of the amplifier. The voltage
gain from the inverting input pin to the compensation pin is
large; therefore, if a capacitance is inserted between these pins,
the bandwidth of the amplifier becomes a function of its feedback resistor and the capacitance. The slew rate of the amplifier
is now a function of its internal bias (2I) and the compensation
capacitance.
Bipolar, nondegenerated, single-pole, and internally
compensated amplifiers have their bandwidths defined as
fT =
CCOMP is the compensation capacitance.
re is the inverse of the transconductance of the input transistors.
kT/q approximately equals 26 mV at 27°C.
1
I
=
2 π re C COMP 2 π kT C
COMP
q
where:
fT is the unity-gain bandwidth of the amplifier.
I is the collector current of the input transistor.
Table 4. Component Selection for Shunt Compensation
Follower Gain
1
2
5
10
20
25
100
Inverter Gain
−1
−4
−9
−19
−24
−99
R1 (Ω)
Open
1k
511
226
105
105
20
R2 (Ω)
100
1k
2.0 k
2.05 k
2k
2.49
2k
CLEAD (pF)
0
5
1
0
0
0
0
CCOMP (pF)
68
25
7
3
0
0
0
Rev. I | Page 13 of 20
Slew Rate (V/µs)
16
38
90
130
230
230
230
−3 dB Small Signal Bandwidth (MHz)
66
71
76
65
55
39
7.5
AD829
Data Sheet
Because the closed-loop bandwidth is a function of RF and
CCOMP (see Figure 39), it is independent of the amplifier closedloop gain, as shown in Figure 41. To preserve stability, the time
constant of RF and CCOMP needs to provide a bandwidth of
<65 MHz. For example, with CCOMP = 15 pF and RF = 1 kΩ, the
small signal bandwidth of the AD829 is 10 MHz. Figure 40
shows that the slew rate is in excess of 60 V/µs. As shown in
Figure 41, the closed-loop bandwidth is constant for gains of
−1 to −4; this is a property of the current feedback amplifiers.
Figure 42 is an oscilloscope photo of the pulse response of a unitygain inverter that has been configured to provide a small signal
bandwidth of 53 MHz and a subsequent slew rate of 180 V/µs;
RF = 3 kΩ and CCOMP = 1 pF. Figure 43 shows the excellent pulse
response as a unity-gain inverter, this using component values
of RF = 1 kΩ and CCOMP = 4 pF.
5V
200ns
100%
90
RF
CCOMP
0.1µF
R1
7
VIN
2
–
5
AD829
C1*
50Ω
+VS
IN4148
3
+
–VS
<7pF
≥7pF
VOUT
RL
1kΩ
10
0%
0.1µF
CCOMP SHOULD NEVER EXCEED
15pF FOR THIS CONNECTION
00880-039
*RECOMMENDED VALUE
OF CCOMP FOR C1
6
4
00880-042
50Ω
COAX
CABLE
0pF
15pF
Figure 42. Large Signal Pulse Response of the Inverting Amplifier Using
Current Feedback Compensation, CCOMP = 1 pF, RF = 3 kΩ, R1 = 3 kΩ
Figure 39. Inverting Amplifier Connection Using Current Feedback
Compensation
10ns
100%
5V
200ns
90
100%
90
10
20mV
10
0%
00880-040
Figure 43. Small Signal Pulse Response of Inverting Amplified Using Current
Feedback Compensation, CCOMP = 4 pF, RF = 1 kΩ, R1 = 1 kΩ
Figure 40. Large Signal Pulse Response of Inverting Amplifier Using Current
Feedback Compensation, CCOMP = 15 pF, C1 = 15 pF RF = 1 kΩ, R1 = 1 kΩ
15
12
GAIN = –4
–3dB @ 8.2MHz
GAIN = –2
–3dB @ 9.6MHz
3
0
GAIN = –1
–3dB @ 10.2MHz
–3
–6
–9
–12
VIN = –30dBm
VS = ±15V
RL = 1kΩ
RF = 1kΩ
CCOMP = 15pF
C1 = 15pF
–15
100k
00880-041
CLOSED-LOOP GAIN (dB)
9
6
1M
10M
FREQUENCY (Hz)
00880-043
0%
100M
Figure 41. Closed-Loop Gain vs. Frequency for the Circuit of Figure 38
Rev. I | Page 14 of 20
Data Sheet
AD829
Figure 44 and Figure 45 show the closed-loop frequency
response of the AD829 for different closed-loop gains and
different supply voltages.
+15V
50Ω
COAX
CABLE
0.1µF
15
3
GAIN = –4
CCOMP = 2pF
12
+
AD829
50Ω
2
–
VOUT
6
5
4
GAIN = –2
CCOMP = 3pF
50kΩ
3pF
CCOMP
–15V
0.1µF
2kΩ
GAIN = –1
CCOMP = 4pF
0
00880-046
3
2kΩ
–3
Figure 46. Noninverting Amplifier Connection Using Current Feedback
Compensation
–6
VS = ±15V
RL = 1kΩ
RF = 1kΩ
VIN = –30dBm
–9
–12
00880-044
CLOSED-LOOP GAIN (dB)
9
6
50Ω
COAX
CABLE
50Ω
7
VIN
–15
1
10
FREQUENCY (MHz)
+15V
0.1µF
100
50Ω
COAX
75Ω CABLE
7
VIN
Figure 44. Closed-Loop Frequency Response for the Inverting Amplifier Using
Current Feedback Compensation
3
+
AD829
75Ω
2
–
VOUT
6
75Ω
4
5
30pF
CCOMP
–20
0.1µF
300Ω
–15V
300Ω
±5V
–26
±15V
Figure 47. Video Line Driver with a Flatness over Frequency Adjustment
–29
–32
LOW ERROR VIDEO LINE DRIVER
–35
–38
VIN = –20dBm
RL = 1kΩ
RF = 1kΩ
GAIN = –1
CCOMP = 4pF
–41
–44
00880-045
OUTPUT LEVEL (dB)
–23
OPTIONAL
2pF TO 7pF
FLATNESS
TRIM
00880-047
–17
–47
1
10
FREQUENCY (MHz)
100
Figure 45. Closed-Loop Frequency Response vs. Supply for the Inverting
Amplifier Using Current Feedback Compensation
The buffer circuit shown in Figure 47 drives a back-terminated
75 Ω video line to standard video levels (1 V p-p), with 0.1 dB
gain flatness to 30 MHz and with only 0.04° and 0.02% differential
phase and gain at the 4.43 MHz PAL color subcarrier frequency.
This level of performance, which meets the requirements for
high definition video displays and test equipment, is achieved
using only 5 mA quiescent current.
When a noninverting amplifier configuration using a current
feedback compensation is needed, the circuit shown in Figure 46 is
recommended. This circuit provides a slew rate twice that of the
shunt compensated noninverting amplifier of Figure 47 at the
expense of gain flatness. Nonetheless, this circuit delivers 95 MHz
bandwidth with 1 dB flatness into a back-terminated cable,
with a differential gain error of only 0.01% and a differential
phase error of only 0.015 at 4.43 MHz.
Rev. I | Page 15 of 20
AD829
Data Sheet
HIGH GAIN VIDEO BANDWIDTH, 3-OP-AMP
INSTRUMENTATION AMPLIFIER
The input amplifiers operate at a gain of 20, while the output
op amp runs at a gain of 5. In this circuit, the main bandwidth
limitation is the gain/bandwidth product of the output amplifier.
Extra care should be taken while breadboarding this circuit
because even a couple of extra picofarads of stray capacitance at the
compensation pins of A1 and A2 will degrade circuit bandwidth.
Figure 48 shows a 3-op-amp instrumentation amplifier circuit
that provides a gain of 100 at video bandwidths. At a circuit gain of
100, the small signal bandwidth equals 18 MHz into a FET probe.
Small signal bandwidth equals 6.6 MHz with a 50 Ω load. The
0.1% settling time is 300 ns.
3pF
+VIN
(G = 20)
5
2pF TO 8pF
SETTLING TIME
AC CMR ADJUST
3
A1
6
AD829
2
1kΩ
2kΩ
RG
210Ω
200Ω
1pF
2
A3
AD848
200Ω
3
5
2kΩ
6
2kΩ
(G = 5)
3pF
100Hz
1MHz
10MHz
970Ω
2
A2
AD829
+VIN
3
5
6
DC CMR
ADJUST
50Ω
INPUT
FREQUENCY CMRR
+VS
+15V
(G = 20)
64.6dB
44.7dB
23.9dB
PIN 7
10µF
0.1µF
1µF
0.1µF
10µF
0.1µF
1µF
0.1µF
COMM
3pF
CIRCUIT GAIN =
4000Ω
+1 5
RG
–15V
–VS
Figure 48. High Gain Video Bandwidth, 3-Op-Amp In-Amp Circuit
Rev. I | Page 16 of 20
EACH
AMPLIFIER
PIN 4
00880-048
1pF
Data Sheet
AD829
OUTLINE DIMENSIONS
5.00 (0.1968)
4.80 (0.1890)
1
5
6.20 (0.2441)
5.80 (0.2284)
4
1.27 (0.0500)
BSC
0.25 (0.0098)
0.10 (0.0040)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
SEATING
PLANE
0.50 (0.0196)
0.25 (0.0099)
1.75 (0.0688)
1.35 (0.0532)
45°
8°
0°
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
COMPLIANT TO JEDEC STANDARDS MS-012-AA
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
012407-A
8
4.00 (0.1574)
3.80 (0.1497)
Figure 49. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body (R-8)
Dimensions shown in millimeters and (inches)
0.400 (10.16)
0.365 (9.27)
0.355 (9.02)
8
5
1
4
0.280 (7.11)
0.250 (6.35)
0.240 (6.10)
0.100 (2.54)
BSC
0.060 (1.52)
MAX
0.210 (5.33)
MAX
0.015
(0.38)
MIN
0.150 (3.81)
0.130 (3.30)
0.115 (2.92)
SEATING
PLANE
0.022 (0.56)
0.018 (0.46)
0.014 (0.36)
0.325 (8.26)
0.310 (7.87)
0.300 (7.62)
0.195 (4.95)
0.130 (3.30)
0.115 (2.92)
0.015 (0.38)
GAUGE
PLANE
0.005 (0.13)
MIN
0.014 (0.36)
0.010 (0.25)
0.008 (0.20)
0.430 (10.92)
MAX
COMPLIANT TO JEDEC STANDARDS MS-001
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE OR HALF LEADS.
Figure 50. 8-Lead Plastic Dual In-Line Package [PDIP]
Narrow Body
(N-8)
Dimensions shown in inches and (millimeters)
Rev. I | Page 17 of 20
070606-A
0.070 (1.78)
0.060 (1.52)
0.045 (1.14)
AD829
Data Sheet
0.005 (0.13)
MIN
8
0.055 (1.40)
MAX
5
0.310 (7.87)
0.220 (5.59)
1
4
0.100 (2.54) BSC
0.320 (8.13)
0.290 (7.37)
0.405 (10.29) MAX
0.060 (1.52)
0.015 (0.38)
0.200 (5.08)
MAX
0.150 (3.81)
MIN
0.200 (5.08)
0.125 (3.18)
0.023 (0.58)
0.014 (0.36)
0.070 (1.78)
0.030 (0.76)
SEATING
PLANE
0.015 (0.38)
0.008 (0.20)
15°
0°
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 51. 8-Lead Ceramic Dual In-Line [CERDIP]
(Q-8)
Dimensions shown in inches and (millimeters)
0.200 (5.08)
REF
0.100 (2.54) REF
0.015 (0.38)
MIN
0.075 (1.91)
REF
0.095 (2.41)
0.075 (1.90)
19
18
0.358 (9.09)
0.342 (8.69)
SQ
0.358
(9.09)
MAX
SQ
0.088 (2.24)
0.054 (1.37)
0.011 (0.28)
0.007 (0.18)
R TYP
0.075 (1.91)
REF
0.055 (1.40)
0.045 (1.14)
3
20
4
0.028 (0.71)
0.022 (0.56)
1
BOTTOM
VIEW
0.050 (1.27)
BSC
8
14
13
9
45° TYP
0.150 (3.81)
BSC
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
Figure 52. 20-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-20-1)
Dimensions shown in inches and (millimeters)
Rev. I | Page 18 of 20
022106-A
0.100 (2.54)
0.064 (1.63)
Data Sheet
AD829
ORDERING GUIDE
Model 1
AD829AR
AD829AR-REEL
AD829AR-REEL7
AD829ARZ
AD829ARZ-REEL
AD829ARZ-REEL7
AD829JN
AD829JNZ
AD829JR
AD829JR-REEL
AD829JR-REEL7
AD829JRZ
AD829JRZ-REEL
AD829JRZ-REEL7
AD829AQ
AD829SQ
AD829SQ/883B
5962-9312901MPA
AD829SE/883B
5962-9312901M2A
AD829JCHIPS
AD829SCHIPS
AD829AR-EBZ
1
Temperature Range
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
−40°C to +125°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
−40°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
−55°C to +125°C
Package Description
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead PDIP
8-Lead PDIP
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead SOIC_N
8-Lead CERDIP
8-Lead CERDIP
8-Lead CERDIP
8-Lead CERDIP
20-Lead LCC
20-Lead LCC
Die
Die
Evaluation Board
Z = RoHS Compliant Part.
Rev. I | Page 19 of 20
Package Option
R-8
R-8
R-8
R-8
R-8
R-8
N-8
N-8
R-8
R-8
R-8
R-8
R-8
R-8
Q-8
Q-8
Q-8
Q-8
E-20-1
E-20-1
AD829
Data Sheet
NOTES
©2011 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D00880-0-10/11(I)
Rev. I | Page 20 of 20
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