5656
AN993
APPLICATION NOTE

ELECTRONIC BALLAST WITH PFC
USING L6574 AND L6561
by F. Sandrini, U. Moriconi and I. Dal Santo
The advent of dedicate IC for lamp ballast applications is replacing the old solutions based on bipolar
transistor driven by a saturable pulse transformer.
The L6574 is an innovative high performance ballast driver, designed in 600V BCD OFF-LINE technology, which ensures all the features needed to drive and control properly a fluorescent bulb. It is
provided with a built-in VCO and an OP-AMP, useful to implement a closed loop control of the lamp
current, therefore of the lamp power.
INTRODUCTION
Half bridge converter for electronic lamp ballast
Voltage fed series resonant half bridge inverters are currently used for fluorescent lamps (fig.1). This topology allows to easily operate in Zero Voltage Switching (ZVS) resonant mode, reducing the transistor
switching losses and the electromagnetic interference. Moreover, by varying the switching frequency it is
possible to modulate the current in the lamp, therefore the output power.
To design a cost effective, compact and smart electronic lamp ballast it could be used a dedicated IC
able to drive directly the power MOSFETs of the half bridge. Such controllers require a high voltage capability for the high side floating transistor driver.
Figure 1. Half Bridge topology
HV
DRIVER
LRES
CRES
D98IN819
Lamp requirements
To provide long life and to insure an efficient ignition of the lamp the cathodes must be preheated. In fact
the preheating of the filaments allows an easy strike of the lamp reducing ignition voltage. During preheating time the lamp is characterised by a high impedance and the current flows only in the filaments.
The resistance value of the filaments are strictly dependent on the lamp model. Typically these filaments
present a initial low value (a few Ohms) that will increase by 5 times during the preheating.
After the preheating time the lamp must be ignited, by increasing the voltage across it. The ignition voltage value also depends on the lamp type, and it increases with the aging. For a typical TL 58W it is not
much less than 1000V. Using a simple inverter, with a constant switching frequency, external circuitry
must be used (e.g. PTC or discrete timer). Instead with the ST L6574 smart controller both the preheating and the ignition functions are achieved by using simple resistors and a capacitor, which set all the
start-up procedure.
July 1999
1/15
AN993 APPLICATION NOTE
L6574 Ballast Driver
The L6574, whose internal block diagram is shown in fig.2, is an IC intended to drive two power MOS or
IGBT in half bridge topology, ensuring all the features needed to drive and control properly a fluorescent
bulb. The device is available in DIP16 and SO16N packages.
The most significant features of the L6574 concern the following points:
• high voltage rail up to 600V;
• dV/dt immunity ± 50 V/ns in full temperature range;
• driver current capability (250 mA source and 450 mA sink);
• switching times 80/40 ns rise fall with 1 nF load;
• CMOS shut down input;
• under voltage lock out;
• preheat and frequency shifting timing;
• sense OP AMP for closed loop control or protection features;
• high accuracy current controlled oscillator;
• integrated bootstrap diode;
• clamping on VS;
• SO16, DIP16 package.
Figure 2. Internal Block diagram of the L6574
H.V.
VS
OPOUT
OPINOPIN+
5
OP AMP
12
+
-
6
BOOTSTRAP
DRIVER
UV
DETECTION
7
Imin
V REF
DEAD
TIME
DRIVING
LOGIC
HVG
DRIVER
LEVEL
SHIFTER
RIGN
Imax
2
-
RPRE
CONTROL
LOGIC
3
Cf
Vthpre
+
HVG
14
OUT
11
LVG
10
GND
VTHE
8
-
+
-
+
EN1
VTHE
9
-
VCO
1
CPRE
2/15
15
LVG DRIVER
Ipre
VREF
+
VBOOT
VS
4
Ifs
16
D97IN493B
EN2
CBOOT
LOAD
AN993 APPLICATION NOTE
Device Pins Description
N.
Name
Function
1
CPRE
Preheat Timing Capacitor. The capacitor CPRE sets the preheating and the frequency shift
time, according to the relations: tPRE = KPRE ⋅ CPRE and tSH = KFS ⋅ CPRE (typ. KPRE = 1.5s/µF,
KFS = 0.15s/µF). This feature is obtained by charging CPRE with two different currents. During
tPRE this current is independent of the external components, so CPRE is charged up to 3.5 V
(preheat timing comparator threshold). During tSH the current depends on RPRE value (i.e. on
the difference between fPRE and fIGN). In this way tSH is always set at 0.1tPRE. In steady state
the voltage at pin 1 is 5V (see fig.5).
2
RPRE
Maximum Oscillation Frequency Setting. The resistance connected between this pin and
ground sets the fPRE value, fixing the difference between fPRE and fIGN (fPRE > fIGN). The
voltage at this pin is fixed at VREF =2V.
3
CF
4
RIGN
Minimum Oscillation Frequency Setting. The resistance connected between this pin and
ground sets the fIGN value. The voltage at this pin is fixed at VREF =2V.
5
OPout
Out of the operational amplifier. To implement a feedback control loop this pin can be
connected to the RIGN pin by means an appropriate circuitry.
6
OPin-
Inverting Input of the operational amplifier.
7
OPin+
Non Inverting Input of the operational amplifier.
8
EN1
Enable 1. This pin (active high), forces the device in a latched shutdown state (like in the
under voltage conditions). There are two ways to resume normal operation. The first is to
reduce the supply voltage below the undervoltage threshold and then increase it again until
the valid supply is recognised. The second is activating EN2 input. The enable 1 is especially
designed for strong fault (e.g. in case of lamp disconnection).
9
EN2
Enable 2. EN2 input (active high) restarts the start-up procedure (preheating and ignition
sequence). This features is useful if the lamp does not turn-on after the first ignition sequence.
10
GND
Ground.
11
LVG
Low Side Driver Output. This pin must be connected to the low side power MOSFET gate of
the half bridge. A resistor connected between this pin and the power MOS gate can be used
to reduce the peak current.
12
VS
Supply Voltage. This pin, connected to the supply filter capacitor, is internally clamped (15.6V
typical).
13
N.C.
Non Connected. This pin set a distance between the pins related to the HV and those related
to the LV side.
14
OUT
High Side Driver Floating Reference. This pin must be connected close to the source of the
high side power MOS or IGBT.
15
HVG
High Side Driver Output. This pin must be connected to the high side power MOSFET gate of
the half bridge. A resistor connected between this pin and the power MOS gate can be used
to reduce the peak current.
16
VBOOT
Bootstrapped Supply Voltage. Between this pin and VS must be connected the bootstrap
capacitor. A patented integrated circuitry replaces the external bootstrap diode, by means of a
high voltage DMOS, synchronously driven with the low side power MOSFET.
Oscillator Frequency Setting. The capacitor CF, along with to RPRE and RIGN, sets fPRE and
fING. In normal operation this pin shows a triangular wave.
3/15
AN993 APPLICATION NOTE
DEVICE BLOCK DESCRIPTION
The preheating control section and the bootstrap section are tightly connected to application design.
Here below there are some details on their working and how they have to be used.
Preheating and ignition section
L6574 turn on sequence is divided into three phases: preheating, ignition and normal operation (fig.3).
Preheating phase is characterised by the highest oscillation frequency (fmax) for a period Tpre. During ignition phase the frequency shifts from f max to fmin (that is the normal operation frequency) in a period Tsh.
Figure 3.
preheating phase
freq
ignition phase
fmax
normal operation
fmin
Tpre
Tsh
time
All the parameters specified above are set choosing properly few external components.
T pre and Tsh are set by means of the capacitor C pre that is connected at pin 1.
During the preheating time, Tpre, the capacitor Cpre is charged by means of a constant current Ipre internally generated, which doesn’t depend on the external components. The voltage across Cpre increases
linearly up to the ”preheating threshold”, in which the preheating phase finishes.
Tpre = Cpre
Vth
, where Vth = 3.5V and Ipre = 2.3µA
Ipre
That is to say:
Tpre = 1.5s/µF ⋅ Cpre
Figure 5. Timing Oscillator block
Figure 4. Timing block
Ifs
Ipre
TIMING
Imax
Imin
gm
Cpre
Cpre
4/15
DISCHARGE
Iosc
OSC
AN993 APPLICATION NOTE
After the preheating time the capacitor C pre is first quickly discharged, and then recharged by the current
Ifs, generating a second voltage ramp which fed a transconductance amplifier, as shown in fig.5 (the
switch is closed). Thus this voltage signal is converted in a growing current which is subtracted to Imax, to
produce the frequency shifting from fmax to fmin. The current which drives the oscillator to set the frequency during the shifting is equal to:
gmIfs


Iosc = Imin + (Imax − gmVCpre (t − Tpre)) = Imin + Imax −
(t − Tpre) [a]
C
pre


Where:
Imin =
VREF
Rign
, Imax =
VREF
, VREF = 2V
Rpre
Rign and Rpre are the resistors connected to pin 4 and pin 2.
At the end of preheating time (t = Tpre) L6574 oscillates at fmax, set by:
 1 + 1 

Rign Rpre
Iosc(Tpre) = Iosc(0) = Imin = Imax = VREF
That means that the preheating frequency depends on both Rpre and Rign.
At the end of the frequency shifting (t = Tpre + Tsh), the second term of eq.[a] decreases to zero and the
switching frequency is set only by Imin (i.e. Rign):
Io sc(Tsh) = Imin =
VREF
Rign
Since the second term of eq. [a] is equal to zero, we have:
Imax −
gmIfs
CpreImax
Tsh = 0 → Tsh =
[b]
Cp re
gmIfs
Note that there is not a fixed threshold of the voltage across Cpre in which the ignition phase finishes (i.e.
the end of the frequency shifting): T sh depends on Cpre, Imax, gm, and I fs (eq. [b]). This fact can be seen
also in fig.6. Making Tsh independent of Imax, the Ifs current has been designed to be a fraction of Imax,
so:
Ifs =
Cpre
Imax
CpreImax
→ Tsh =
→ Tsh =
→ Tsh = kfsCpre
K
gmImaxK
gm K
In this way the frequency shift time depends only by
the capacitor Cpre. The typical value of the kfs constant (Frequency Shift Timing Constant) is 0.15
s/µF, that is:
kfs = kpre/10.
So choosing Cpre both Tpre and Tsh are set.
The frequencies fmin and fmax depend on the resistors Rpre and Rign, but also on the capacitor C f (Oscillator frequency setting -> capacitor at pin 3). f min
is set choosing Cf and Rign, then with Rpre the ∆f =
f max - fmin is set. Simplified equations can be used:
fmin =
fmax =
Figure 6. Cpre voltage and frequency shifting
V(Cpre)
time
freq
preheating
ignition
1.41
Rign ⋅ Cf
1.41 ⋅ (Rpre + Rign)
Rpre ⋅ Rign ⋅ Cf
time
5/15
AN993 APPLICATION NOTE
These equation fit well with measured values, especiallyin the frequencies range 30 to 100kHz: in fig. 7
there is a comparison between fmin measured and
computed data (@Cf = 470pF).
Figure 7. Operating Frequency @ Cf = 470pF
120
measured values
computed values
100
parameter
set choosing
Tpre
Cpre
Tsh
Cpre
∆f = fmax - fmin
fmin
Rpre
fmin(kHz)
To summarise:
80
60
R ign & Cf
40
If Rpre is not connected at pin 2, there is no ∆f , so
fmax and fmin have the same value. Moreover there
is no Imax, that is to say there is no Ifs. In this case
20
40
60
80
100
120
Cpre is charged only once by Ipre = 2.3µA up to 3.5V
Rign (kW)
(fig 7: there is only the first voltage raising) . When
Cpre is discharged there is no current Ifs to charge it once more. If Rpre has been connected when preheating and ignition phases are ended, pin 1(Cpre) is at 4.8-5V with a current capability of few µA (1/6
IRpre). If Rpre is not connected, Cpre is at GND level in normal operation phase.
Bootstrap section
A bootstrap circuitry is needed to supply the high voltage section. This function is normally accomplished
by a high voltage fast recovery diode (fig. 8a). In the L6574 a patented integrated structure replaces the
external diode. It is realised by a high voltage DMOS, driven synchronously with the low side driver
(LVG), with in series a diode, as shown in fig. 8b
An internal charge pump (fig. b) provides the DMOS driving voltage .
The diode connected in series to the DMOS has been added to avoid undesirable turn on of it.
Cboot selection and charging:
To choose the proper Cboot value the external MOS can be seen as an equivalent capacitor. This capacitor Cext is related to the MOS total gate charge :
Cext =
Qgate
Vgate
The ratio between the capacitors Cext and Cboot is proportional to the cyclical voltage loss .
It has to be:
Cboot>>>Cext
e.g.: if Qgate is 30nC and Vgate is 10V, Cext is 3nF. With Cboot = 100nF the drop would be 300mV.
If HVG has to be supplied for a long time, the Cboot selection has to take into account also the leakage
losses.
The internal bootstrap driver gives great advantages: the external fast recovery diode can be avoided (it
usually has great leakage current). This structure can work only if Vout is close to GND (or lower) and in
the meanwhile the LVG is on. The charging time (Tcharge) of the Cboot is the time in which both conditions
are fulfilled and it has to be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS Rdson (typical value @25° is 150
Ohm). At low frequency this drop can be neglected. Anyway increasing the frequency it must be taken
in to account.
The following equation is useful to compute the drop on the bootstrap DMOS:
6/15
AN993 APPLICATION NOTE
Vdrop = IchargeRdson → Vdrop =
Qgate
Rdson
Tcharge
where Qgate is the gate charge of the external power MOS, Rdson is the on resistance of the bootstrap
DMOS, and Tcharge is the charging time of the bootstrap capacitor.
For example: using a power MOS with a total gate charge of 30nC the drop on the bootstrap DMOS is
about 1V, if the Tcharge is 5 µs. In fact:
Vdrop =
30nC
⋅ 150Ω ~0.9V
5µs
Vdrop has to be taken into account when the voltage drop on Cboot is calculated: if this drop is too high, or
there is not a sufficient charging time, an external diode can be used.
Figure 8. Bootstrap driver
DBOOT
VS
VBOOT
V BOOT
VS
H.V.
HVG
H.V.
HVG
CBOOT
VOUT
V OUT
TO LOAD
TO LOAD
LVG
a
CBOOT
LVG
b
EX_D99IN1056
DEMO APPLICATION DESCRIPTION
The design has been developed to drive a TL fluorescent lamp up to 58W. It is composed of two sections: the PFC, using the L6561 controller, and the ballast, based on the L6574 (see fig.9 and fig.10).
The application is provided with a current feedback, that allows power control (and in case the dimming
function) by varying the switching frequency during the normal lamp burning. The application is also provided with a safety circuitry, that acts in case of open load or faulty ignition of the lamp.
7/15
C2
220nF
400V
D99IN1064
R2
10.1K
2
8
C4 680nF
1
L6561
C3
10nF
3
6
R4
120K
R3
120K
NTC
5
R5
68K
R1
1.5M
4
7
R7
47K
R6 22
C5
100nF
R8
0.68
RSENSE
T1 1.24mH (E25*13*7)
10 Turns 1.3mm gapped
C1
220nF
630V
Bridge
R9
0.68
D1 BYT11600
R12
9.53K
R11
750K
R10
750K
Q1
STP6NB50
8/15
R15
1.5K
R14
4.7K
C7
22µF
450V
C6
4.7µF
25V
C8
100nF
R13
100K
D2
1N4148
DZ1
14V
R18
100K
D3
1N4148
C9
8.2nF
R17 9.1K
R19
100K
43
5
6
7
2
C11
680pF 630V
C20
100nF
R16 47
16
C14
1µF
R33 9.1K
1
L6574
C13
470pF
12
C12
100nF
10
R24
6.8K
9
8
11
14
15
C15
330nF
R23
47K
R22 22
R21
22
R20
47K
R25
0.68
Q2 STP4NB50/
STP6NB50
1N4148
D4
Q3 STP4NB50/
STP6NB50
Fuse
R26
390K
R32 20K
C16 1µF
R30
3.9K
LAMP
R29
750K
R28
750K
C17
100nF 250V
L1 2.1mH
R27
6.8K
C19
8.2nF
1500V
C18
100nF 250V
AN993 APPLICATION NOTE
Figure 9. Demo Application circuit
AN993 APPLICATION NOTE
Figure 10. PCB and components layout.
37mm
220mm
C
O
M
P
O
N
E
N
T
L
A
Y
O
U
T
C
O
M
P
B
A
C
K
L
A
Y
E
R
L
A
Y
E
R
9/15
AN993 APPLICATION NOTE
Power factor section
Even if the PFC stage is not strictly necessary for electronic ballast application, in this design it has been
introduced for the following reasons.
The front-end stage of conventional off-line converters, typically made up of a full wave rectifier bridge
with a capacitor filter, gets an unregulated DC bus from the AC mains. Therefore the instantaneous line
voltage is below the voltage on the capacitor most of the time, thus the rectifiers conduct only for a small
portion of each line half-cycle. The current drawn from the mains is then a series of narrow pulses
whose amplitude is 5-10 times higher than the resulting DC value.
Lots of drawbacks result from that: much higher peak and RMS current drawn from the line, distortion of
the AC line voltage, overcurrents in the neutral line of the three-phase systems and, after all, a poor utilisation of the power system’s energy capability.
This can be measured in terms of either Total Harmonic Distortion (THD), as norms provides for, or
Power Factor (PF), intended as the ratio between the real power (the one transferred to the output) and
the apparent power (RMS line voltage times RMS line current) drawn from the mains, which is more immediate. A traditional input stage with capacitive filter has a low PF (0.5-0.7) and a high THD (> 100%).
The new European norms and the International standard requirements have spurred the design of high
power factor ballasts and they are starting to impose a limit on the input current harmonic content. For
these reasons power factor corrector (PFC) is now diffusing in consumer and industrial lighting. With a
high power factor switching preregulator, interposed between the input rectifier bridge and the bulk filter
capacitor, the power factor will be improved (up to 0.99). The current capability is increased, the bulk capacitor peak current and the harmonic disturbances are reduced.
The L6561 is an IC intended to control PFC preregulators by using the transition mode technique and is
optimised for lamp ballast applications.
The operation can be summarised in the following description (for more information, see AN966). The
AC mains voltage, that can range from 85V to 265V, is rectified by a diodes bridge and delivered to the
boost converter. The input capacitor has been split in two parts (C1 and C2) to increase the performance
in terms of harmonic distortion (THD). In fact, due to the wide range supply and the possibility to change
the output power, the minimisation of the capacitor connected after the bridge, allows to reduce the
THD. The boost converter consists of a boost inductor (T1), a controlled power switch (Q1), a catch diode (D1), an output capacitor (C7) and, obviously, a control circuitry (see fig.3).
The PFC section has been designed to supply a 400V DC and a power of 60W.
Ballast Section
The regulated voltage is delivered to the ballast section. The ballast is based on the high performances
L6574, which is an OFF-LINE half bridge driver designed in 600V BCD technology. It adds to the full integrated half bridge driver topology a built-in voltage controlled oscillator (VCO), a preheating start-up
procedure and an operational amplifier dedicated to the feedback loop. To avoid cross conduction of the
power MOSFETs or IGBTs, the internal logic ensures a minimum dead time.
The load consists of a series resonant circuit (L1-C19) with the lamp connected across the capacitor
(C19). This topology allows to operate in Zero Voltage Switching, to reduce the transistor switching
losses and the electromagnetic interference generated by the output wiring of the lamp.
The blocking capacitor (C17//C18) allows to obtain a zero average lamp current. In steady state the voltage across these capacitors is as high as half the high voltage bus, that is about 200V.
Preheating and ignition sequence
The turn-on sequence can be divided in three phases: preheating, ignition and normal lamp burning.
The preheating of the lamp filaments is achieved by a high switching frequency fPRE, about 60 kHz, set
by RPRE = R13 + R14 + R15 and CF = C13, to ensure that a current flows in the filaments without lamp ignition. In fact the initial voltage applied across the lamp is below the strike potential. The duration of the
preheating period tPRE is set by the capacitor CPRE = C14. The choice of this time is strictly dependent on
the lamp type. In the application tPRE has been set at 1.5 sec.
The ignition sequence begins after tPRE. The switching frequency decreases towards the resonance
point (L1-C19), increasing the voltage across the lamp, and causing the ignition. The time interval in
which the frequency shifts, t SH, amounts to t SH = tPRE/10 = 150ms. At the end of tSH the frequency
reaches 31 kHz (R19-C13), and then the current feedback loop is activated.
10/15
AN993 APPLICATION NOTE
Current feedback loop
The current control is achieved by varying the switching frequency of the VCO. Since controlling the average current in the lamp means controlling the output power, it is quite easy to perform dimming function. The OP-AMP compares the low-pass filtered half-bridge current, shunted by R25, with a reference,
achieved by a partition of the voltage at pin 2 (VPIN2 = 2 V). This set-point could be changed by the trimmer R14, to perform the dimming function. The OP-AMP output is connected to RING pin by D3 and R18.
The diode D3 is necessary to avoid that the switching frequency decreases below the value set by R19.
At start-up the voltage across R25 (fig.11) remains low until the lamp ignition. So the inverting input of
OP-AMP (pin 6) stays low too, while the non inverting input (pin 7) is set at a constant voltage (setpoint) by the divider R13 , R14 and R15.
Therefore the OP-AMP output (pin 5) remains high (5V) until the lamp ignition, and D3 is off. In this condition the L6574 oscillates at fPRE.
As the lamp strikes on (after tPRE and tSH), the average voltage across R25 increases and the feedback
is able to regulate the lamp current.
Figure 11. Current feedback loop
Q3
STP4NB50/
STP6NB50
C9 8.2nF
R33 9.1K
Figure 12. Cpre waveform (Ch1) and OP AMP
output (Ch2)
R18 100K
R19 100K
D3
1N4148
R25
0.68
6
5
7
+
RIGN
4
D98IN818A
Start-up and supply
The start-up procedure is very important in an application that contains two different sections.
The ballast section starts before the PFC, avoiding any extra-voltage at the PFC section output, and so
the L6561 dynamic OVP activation (see AN966). This behaviour is guaranteed under all conditions because the VS turn-on threshold of L6574 is lower than the L6561 one.
At start-up the L6574 is powered by the resistor (R 3 + R4). This resistor must be chosen so as to ensure
the ”before start-up current” of both the L6561 and L6574.
When the ballast section is running, the charge pump (C11, R16, D2 and DZ1) allows to supply both the
devices. The resistor R16 allows to reduce the peak current.
Safety circuitry
In normal operation the inductive load ensures a zero voltage switching mode, but if the lamp is disconnected the switching losses in the power MOSFETs will increase considerably. To prevent this occurrence a safety circuitry has been designed. When the lamp is connected the EN1 input (pin 8) of the
L6574 is held close to ground by the series of R27, the lamp filament and R25 . If the lamp is not present
EN1 is pulled up to VS by R26, forcing the L6574 in a latched shutdown state. To resume normal operation it is necessary to turn off the ballast and then turn it on again.
A second alarm has been designed to protect the application against the extra voltages which would
arise if the lamp did not strike after the ignition sequence, because of an old lamp. A partition of this ex11/15
AN993 APPLICATION NOTE
tra voltage is rectified and delivered to the EN2 input (pin 9) of the L6574, restarting the start-up procedure (preheat and ignition sequence).
Figure 13. Open load safety circuit
Figure 14. Extra voltage safety circuit
L1 2.1mH
+VS
C17
100nF
250V
LAMP
C19
8.2nF
1500V
R26
390K
LAMP
R28
750K
EN1 (PIN8)
R27
6.8K
R25
0.68
C18
100nF
250V
C19
8.2nF
1500V
R29
750K
D4 1N4148
EN2 (PIN9)
C16
1uF
R32
20K
R24
6.8K
C15
330nF
R30
3.9K
D98IN816A
R25
0.68
D98IN817
DESIGN HINTS
Inductance and capacitors evaluation
To design an application with L6574 a preliminary evaluation of the components can be done only fixing
the lamp type and its electrical characteristics.
We can summarise this evaluation process in few marks, but this is an ”iterative” process, because we
have to do some assumptions that have to be checked at the end of the process. A simplified schematic
can well represent the load:
Figure 15. Lamp Simplified Schematic
L
lamp
L
C
r
rr
C
r
Cb
Cb
In fig. 15 r is the lamp filament resistance, rr is the operating lamp equivalent resistance ( when the lamp
is off or during preheating rr is an open circuit).
First of all we have to evaluate a proper inductance value.
L has to give the right current value to the lamp when it is already ignited and is working (”choke” induc12/15
AN993 APPLICATION NOTE
tance). So it depends on the current required by the lamp , that is to say on the lamp operating wattage
and voltage, on the operating frequency fmin, but also on the voltage across L and the lamp (Vb). The
greater Vb variation, the greater inductance in order to give a constant current to the lamp. Vb variations
are due to the High Voltage Bus variations and to the ripple on half battery capacitor (Cb). The ripple depends on Cb size, and we have to do a proper hypothesis on it to estimate Vb variation. Taking into account all these data and hypothesis, we can do some simplifying assumption: during operating condition
the most of the current flows into the lamp, not into C, and all the power delivered to the system is delivered to the lamp. Vlamp is the operating voltage across the lamp and Plamp is the operating lamp wattage,
so a good approximation to conduct the choke inductance is:
L=
Vb (Vb − Vl amp)
VL
→
⋅
Plamp 2 ⋅ π ⋅ fmin
IL ⋅ 2 ⋅ π ⋅ f
The second step is the evaluation of the capacitance across the lamp (C).
When the lamp is not yet ignited, C has to allow a sufficient current to flow into the lamp filament in order
to have a proper preheating. The power to be delivered to the lamp filaments (Pfil), the preheating frequency, the lamp filament resistance r and the maximum voltage to be applied across C without causing
lamp ignition are constraints that help to evaluate the capacitor size. Setting the current through the
lamp filament and the max. voltage across the capacitor, you have a capacitor range of values.
C = IC ⋅
1
→√
Pfil ⋅ 2 ⋅ π ⋅ f 1 ⋅ V
2 ⋅ π ⋅ f ⋅ VC
pre
Cmax
r
VCmax < Vignition
Those values of L, Cb and C have to be corrected in order to have standard and commercial components values. Using these values and lamp equivalent resistances the transfer functions during preheating and operating condition can be calculate.
The preheating transfer function allows to see if moving towards the resonant frequency (L-C) there is a
frequency at which the voltage across the lamp enables its ignition, and this frequency has to be between fmax and fmin. The transfer function gain depends also on r, but r changes greatly during preheating (also 3-4 times) and this has to be considered (see fig.16).
Figure 16. Preheating Transfer Function
Vlamp
Vin
F=F(L,C,[email protected])
F=F(L,C,[email protected])
freq
1/2∗π∗ sqrt(L∗ C)
fmin
fpre
frequency shifting during Tsh
13/15
AN993 APPLICATION NOTE
The operating transfer function allows to check if we have an operating voltage across the lamp (at f =
fmin) that is similar to the one used to evaluate L (fig. 17).
Figure 17. Operating Transfer Function
Vlamp
Vin
freq
f = f(L,C,rr)
fmin
If one of these condition is not verified, the evaluation process has to be restarted changing the initial
hypothesis: i.e. changing the frequencies, or the assumption on Cb ripple. If this everything is OK, the
values found can be used , and a preliminary stage of design can be concluded: to better set the components and the frequencies values experiments are needed, also to verify the initial assumptions, and in
case to reiterate another step of evaluation process with better assumptions.
The following flow chart can help the iteration process:
Figure 18. Iterative Process
DATA:
operating lamp elec.characteristic
HVB
HYPOTHESIS:
fmin
Cb
L evaluation
DATA:
ignition and preheating lamp elec.characteristic
HYPOTHESIS:
fpre
C evaluation
Transfer preheating funct.
OK
Transfer operating funct.
OK
check on board
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OK
AN993 APPLICATION NOTE
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subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
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