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No part of this material may be reproduced or duplicated in any form or by any means without the written
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this
material or due to its application or use in any product or circuit and, further, there is no representation that
this material is applicable to products requiring high level reliability, such as, medical products. Moreover,
no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or
copyright infringement of a third party. This material or portions thereof may contain technology or the
subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Control
Law of Japan and may require an export license from the Ministry of International Trade and Industry or
other approval from another government agency.
✽ In this manual, Zilog's Z80-CPU or its equivalent shall be called Z80, Intel's 8085A or its equivalent shall
be called 8085 and Motorola's MC6809 and MC6802 or their equivalents shall be called 6809 and 6802,
respectively.
® stands for registered trade mark.
All other product names mentioned herein are trademarks and/or registered trademarks of their respective owners.
© Seiko Epson Corporation 1999 All rights reserved.
CONTENTS
CONTENTS
1. OVERVIEW ................................................................................................................................................................. 1
2. FEATURES ................................................................................................................................................................. 1
3. BLOCK DIAGRAM ....................................................................................................................................................... 2
4. PINOUTS ..................................................................................................................................................................... 3
5. PIN DESCRIPTION ..................................................................................................................................................... 4
5.1. SED1335F0A/0B Pin Summary ........................................................................................................................... 4
5.2. Pin Functions ..................................................................................................................................................... 5
5.2.1. Power supply ......................................................................................................................................... 5
5.2.2. Oscillator ................................................................................................................................................ 5
5.2.3. Microprocessor interface ........................................................................................................................ 5
5.2.4. Display memory control ......................................................................................................................... 6
5.2.5. LCD drive signals ................................................................................................................................... 7
6. SPECIFICATIONS ....................................................................................................................................................... 7
6.1. Absolute Maximum Ratings ............................................................................................................................... 7
6.2. SED1335 ............................................................................................................................................................ 8
6.3. SED1335F Timing Diagrams ........................................................................................................................... 10
6.3.1. 8080 family interface timing ................................................................................................................. 10
6.3.2. 6800 family interface timing ................................................................................................................. 11
6.3.3. Display memory read timing ................................................................................................................ 12
6.3.4. Display memory write timing ................................................................................................................ 13
6.3.5. SLEEP IN command timing ................................................................................................................. 15
6.3.6. External oscillator signal timing ............................................................................................................ 16
6.3.7. LCD output timing ................................................................................................................................ 17
7. PACKAGE DIMENSIONS ......................................................................................................................................... 19
7.1. SED1335F0A .......................................................................................................................................................................................... 19
7.2. SED1335F0B .......................................................................................................................................................................................... 19
8. INSTRUCTION SET .................................................................................................................................................. 20
8.1. The Command Set ........................................................................................................................................... 20
8.2. System Control Commands ............................................................................................................................. 21
8.2.1. SYSTEM SET ...................................................................................................................................... 21
8.2.1.1. C ........................................................................................................................................... 21
8.2.1.2. M0 ......................................................................................................................................... 21
8.2.1.3. M1 ......................................................................................................................................... 21
8.2.1.4. M2 ......................................................................................................................................... 22
8.2.1.5. W/S ....................................................................................................................................... 22
8.2.1.6. IV .......................................................................................................................................... 23
8.2.1.7. FX ......................................................................................................................................... 24
8.2.1.8. WF ........................................................................................................................................ 25
8.2.1.9. FY ......................................................................................................................................... 25
8.2.1.10. C/R ....................................................................................................................................... 25
8.2.1.11. TC/R ..................................................................................................................................... 26
8.2.1.12. L/F ........................................................................................................................................ 26
8.2.1.13. AP ......................................................................................................................................... 27
8.2.2. SLEEP IN ............................................................................................................................................. 27
8.3. Display Control Commands ............................................................................................................................. 28
8.3.1. DISP ON/OFF ...................................................................................................................................... 28
8.3.1.1. D ........................................................................................................................................... 28
8.3.1.2. FC ......................................................................................................................................... 28
8.3.1.3. FP ......................................................................................................................................... 28
8.3.2. SCROLL ............................................................................................................................................... 29
8.3.2.1. C ........................................................................................................................................... 29
8.3.2.2. SL1, SL2 ............................................................................................................................... 30
SED1335 Series
Technical Manual
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CONTENTS
8.3.3. CSRFORM ........................................................................................................................................... 34
8.3.3.1. CRX ...................................................................................................................................... 34
8.3.3.2. CRY ...................................................................................................................................... 34
8.3.3.3. CM ........................................................................................................................................ 34
8.3.4. CSRDIR ............................................................................................................................................... 34
8.3.5. OVLAY ................................................................................................................................................. 35
8.3.5.1. MX0, MX1 ............................................................................................................................. 35
8.3.5.2. DM1, DM2 ............................................................................................................................ 36
8.3.5.3. OV ........................................................................................................................................ 36
8.3.6. CGRAM ADR ....................................................................................................................................... 36
8.3.7. HDOT SCR .......................................................................................................................................... 37
8.3.7.1. D0 to D2 ............................................................................................................................... 37
8.4. Drawing Control Commands ............................................................................................................................ 37
8.4.1. CSRW .................................................................................................................................................. 37
8.4.2. CSRR ................................................................................................................................................... 38
8.5. Memory Control Commands ............................................................................................................................ 38
8.5.1. MWRITE .............................................................................................................................................. 38
8.5.2 MREAD ................................................................................................................................................ 39
9. DISPLAY CONTROL FUNCTIONS ........................................................................................................................... 40
9.1. Character Configuration ................................................................................................................................... 40
9.2. Screen Configuration ....................................................................................................................................... 42
9.2.1. Screen configuration ............................................................................................................................ 42
9.2.2. Display address scanning .................................................................................................................... 42
9.2.3. Display scan timing .............................................................................................................................. 45
9.3. Cursor Control .................................................................................................................................................. 46
9.3.1. Cursor register function ........................................................................................................................ 46
9.3.2. Cursor movement ................................................................................................................................ 46
9.3.3. Cursor display layers ........................................................................................................................... 46
9.4. Memory to Display Relationship ...................................................................................................................... 48
9.5. Scrolling ........................................................................................................................................................... 51
9.5.1. On-page scrolling ................................................................................................................................. 51
9.5.2. Inter-page scrolling .............................................................................................................................. 51
9.5.3. Horizontal scrolling ............................................................................................................................... 52
9.5.4. Bidirectional scrolling ........................................................................................................................... 53
9.5.5. Scroll units ........................................................................................................................................... 53
10. CHARACTER GENERATOR .................................................................................................................................... 54
10.1. CG Characteristics ........................................................................................................................................... 54
10.1.1. Internal character generator ................................................................................................................. 54
10.1.2. External character generator ROM ...................................................................................................... 54
10.1.3. Character generator RAM .................................................................................................................... 54
10.2. CG Memory Allocation ..................................................................................................................................... 55
10.3. Setting the Character Generator Address ........................................................................................................ 56
10.3.1. M1 = 1 .................................................................................................................................................. 56
10.3.2. CG RAM addressing example ............................................................................................................. 57
10.4. Character Codes .............................................................................................................................................. 58
11. MICROPROCESSOR INTERFACE .......................................................................................................................... 59
11.1. System Bus Interface ....................................................................................................................................... 59
11.1.1. 8080 series .......................................................................................................................................... 59
11.1.2. 6800 series .......................................................................................................................................... 59
11.2. Microprocessor Synchronization ...................................................................................................................... 59
11.2.1. Display status indication output ........................................................................................................... 59
11.2.2. Internal register access ........................................................................................................................ 59
11.2.3. Display memory access ....................................................................................................................... 59
11.3. Interface Examples .......................................................................................................................................... 61
11.3.1. Z80 to SED1335 series interface ......................................................................................................... 61
11.3.2. 6802 to SED1335 series interface ....................................................................................................... 61
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SED1335 Series
Technical Manual
CONTENTS
12. DISPLAY MEMORY INTERFACE ............................................................................................................................. 62
12.1. Static RAM ....................................................................................................................................................... 62
12.2. Supply Current during Display Memory Access ............................................................................................... 63
13. OSCILLATOR CIRCUIT ............................................................................................................................................ 63
14. STATUS FLAG .......................................................................................................................................................... 63
15. RESET ....................................................................................................................................................................... 65
16. APPLICATION NOTES ............................................................................................................................................. 65
16.1. Initialization Parameters ................................................................................................................................... 65
16.1.1. SYSTEM SET instruction and parameters ........................................................................................... 65
16.1.2. Initialization example ............................................................................................................................ 66
16.1.3. Display mode setting example 1: combining text and graphics .......................................................... 72
16.1.4. Display mode setting example 2: combining graphics and graphics .................................................. 73
16.1.5. Display mode setting example 3: combining three graphics layers .................................................... 75
16.2. System Overview ............................................................................................................................................. 76
16.3 System Interconnection ................................................................................................................................... 77
16.3.1. SED1335F ........................................................................................................................................... 77
16.4. Smooth Horizontal Scrolling ............................................................................................................................. 79
16.5. Layered Display Attributes ............................................................................................................................... 80
16.5.1. Inverse display ..................................................................................................................................... 80
16.5.2. Half-tone display .................................................................................................................................. 80
16.5.2.1. Menu pad display ................................................................................................................. 80
16.5.2.2. Graph display ....................................................................................................................... 81
16.5.3. Flashing areas ..................................................................................................................................... 81
16.5.3.1. Small area ............................................................................................................................ 81
16.5.3.2. Large area ............................................................................................................................ 81
16.6. 16 × 16-dot Graphic Display ............................................................................................................................. 81
16.6.1. Command usage .................................................................................................................................. 81
16.6.2. Kanji character display ......................................................................................................................... 81
17. INTERNAL CHARACTER GENERATOR FONT ....................................................................................................... 84
18. GLOSSARY OF TERMS ........................................................................................................................................... 85
Request for Information on SED1335 Series ................................................................................................................... 86
SED1335 Series
Technical Manual
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OVERVIEW/FEATURES
1. OVERVIEW
2. FEATURES
The SED1335 series is a controller IC that can display
text and graphics on LCD panel.
The SED1335 series can display layered text and graphics, scroll the display in any direction and partition the
display into multiple screens.
The SED1335 series stores text, character codes and bitmapped graphics data in external frame buffer memory.
Display controller functions include transferring data
from the controlling microprocessor to the buffer memory,
reading memory data, converting data to display pixels
and generating timing signals for the buffer memory,
LCD panel.
The SED1335 series has an internal character generator
with 160, 5 × 7 pixel characters in internal mask ROM.
The character generators support up to 64, 8 × 16 pixel
characters in external character generator RAM and up to
256, 8 × 16 pixel characters in external character generator ROM.
• Text, graphics and combined text/graphics display
modes
• Three overlapping screens in graphics mode
• Up to 640 × 256 pixel LCD panel display resolution
• Programmable cursor control
• Smooth horizontal and vertical scrolling of all or part
of the display
• 1/2-duty to 1/256-duty LCD drive
• Up to 640 × 256 pixel LCD panel display resolution
memory
• 160, 5 × 7 pixel characters in internal mask-programmed character generator ROM
• Up to 64, 8 × 16 pixel characters in external character
generator RAM
• Up to 256, 8 × 16 pixel characters in external character
generator ROM
• 6800 and 8080 family microprocessor interfaces
• Low power consumption—3.5 mA operating current
(VDD = 3.5V), 0.05 µA standby current
• Package
line-up
SED1335F0A
SED1335F0B
Package
QFP5-60 pin
QFP6-60 pin
• 2.7 to 5.5 V (SED1335F)
SED1335 Series
Technical Manual
EPSON
1
BLOCK DIAGRAM
3. BLOCK DIAGRAM
Character
Generator ROM
Input/Output
Register
Display
Address
Controller
Refresh
Counter
Dot Counter
Character
Generator
ROM
Layered
Controller
Oscillator
D0 to D7
A0, CS
RD, WR
RES
SEL0
SEL1
XD0 to XD3
LCD Controller
Microprocessor Interface
2
XSCL
YSCL, YD, YDIS
VRD, VWR (SED1335F/1336F)
VR/W (SED1330F)
Video RAM Interface
Cursor
Address
Controller
LCD
VD0 to VD7
VCE
VA0 to VA15
Character
Generator RAM
LP, WF
Video RAM
EPSON
XG
XD
SED1335 Series
Technical Manual
PINOUTS
4. PINOUTS
◊SED1335F0B
XG
SEL1
SEL2
WR
RD
NC
NC
RES
VRD
VCE
VWR
VA0
VA1
VA2
VA3
VA4
VA5
VA6
VA7
VD4
VD5
VD6
VD7
YSCL
YD
YDIS
WF
LP
VSS
XSCL
XECL
XD0
XD1
XD2
◊SED1335F0A
XD
CS
A0
VDD
D0
D1
60
1
5
6
45
40
SED1335FOA
30
Index
10
29
15
20
VA8
VA9
VA10
VA11
VA12
VA13
NC
VA14
VA15
VD0
VD1
VD2
SED1335 Series
Technical Manual
VD3
VD2
VD1
VD0
VA15
VA14
VA13
VA12
VA11
VA10
VA9
VA8
VA7
VA6
NC
45
46
31
30
SED1335F0B
Index
60
1
16
15
XD3
D7
D6
D5
D4
D3
D2
D1
D0
VDD
A0
CS
XD
XG
SEL1
VA5
VA4
VA3
VA2
VA1
VA0
VWR
VCE
VRD
RES
NC
NC
RD
WR
SEL 2
D7
XD3
XD2
XD1
XD0
XECL
XSCL
VSS
LP
WF
YDIS
YD
YSCL
VD7
VD6
VD5
VD4
VD3
D2
D3
D4
D5
D6
50
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PIN DESCRIPTION
5.
PIN DESCRIPTION
5.1. SED1335F0A/0B Pin Summary
Name
VA0 to VA15
VWR
VCE
VRD
RES
NC
Type
VRAM address bus
Output
Output
Output
Input
—
VRAM write signal
Memory control signal
VRAM read signal
Reset
No connection
8080 family: Read signal
6800 family: Enable clock (E)
8080 family: Write signal
6800 family: R/W signal
8080 or 6800 family interface
select
8080 or 6800 family interface
select
Oscillator connection
Oscillator connection
Chip select
Data type select
2.7 to 5.5V supply
50
13
Input
WR
51
14
Input
SEL2
52
15
Input
SEL1
53
16
Input
XG
XD
CS
A0
VDD
54
55
56
57
58
59 to 60
1 to 6
7 to 10
11
12
13
14
15
17
18
19
20
21
Input
Output
Input
Input
Supply
22 to 29
Input/output
30 to 33
34
35
36
37
38
Output
Output
Output
Supply
Output
Output
16
39
Output
17
18
19 to 26
40
41
42 to 49
Output
Output
Input/output
XD0 to XD3
XECL
XSCL
VSS
LP
WF
YDIS
YD
YSCL
VD0 to VD7
EPSON
Description
Output
RD
D0 to D7
4
Number
SED1335F0B
1 to 6
50 to 59
7
8
9
10
11, 12, 60
SED1335F0A
27 to 28
30 to 43
44
45
46
47
28, 48, 49
Data bus
X-driver data
X-driver enable chain clock
X-driver data shift clock
Ground
Latch pulse
Frame signal
Power-down signal when display is
blanked
Scan start pulse
Y-driver shift clock
VRAM data bus
SED1335 Series
Technical Manual
PIN DESCRIPTION
5.2. Pin Functions
5.2.1. Power supply
Pin Name
VDD
VSS
Function
2.7 to 5.5V supply.
This may be the same supply as the controlling microprocessor.
Ground
Note: The peak supply current drawn by the SED1335 series may be up to ten times the average supply current. The power
supply impedance must be kept as low as possible by ensuring that supply lines are sufficiently wide and by placing 0.47 µF
decoupling capacitors that have good high-frequency response near the device’s supply pins.
5.2.2. Oscillator
Pin Name
XG
XD
Function
Crystal connection for internal oscillator (See section 13). This pin can be driven by an external
clock source that satisfies the timing specifications of the EXT φ0 signal (See section 6.3.6).
Crystal connection for internal oscillator. Leave this pin open when using an external clock
source.
5.2.3. Microprocessor interface
Pin Name
D0 to D7
SEL1, SEL2
Function
Tristate input/output pins. Connect these pins to an 8- or 16-bit microprocessor bus.
Microprocessor interface select pin. The SED1335 series supports both 8080 family
processors (such as the 8085 and Z80®) and 6800 family processors (such as the 6802
and 6809).
SEL1
0
SEL2*
0
Interface
8080 family
A0
A0
RD
RD
WR
WR
CS
CS
1
0
6800 family
A0
E
R/W
CS
Note: SEL1 should be tied directly to VDD or VSS to prevent noise. If noise does appear on SEL1, decouple it to ground using a
capacitor placed as close to the pin as possible.
SED1335 Series
Technical Manual
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PIN DESCRIPTION
Pin Name
Function
8080 family interface
A0
A0
RD
WR
0
1
0
0
1
1
Status flag read
Display data and cursor address read
Function
0
1
0
Display data and parameter write
1
1
0
Command write
6800 family interface
RD or E
A0
R/W
E
Function
0
1
1
1
1
1
Status flag read
Display data and cursor address read
0
0
1
Display data and parameter write
1
0
1
Command write
When the 8080 family interface is selected, this signal acts as the active-LOW read strobe. The
SED1335 series output buffers are enabled when this signal is active.
When the 6800 family interface is selected, this signal acts as the active-HIGH enable clock.
Data is read from or written to the SED1335 series when this clock goes HIGH.
When the 8080 family interface is selected, this signal acts as the active-LOW write strobe. The
bus data is latched on the rising edge of this signal.
WR or R/W
When the 6800 family interface is selected, this signal acts as the read/write control signal. Data
is read from the SED1335 series if this signal is HIGH, and written to the SED1335 series if it
is LOW.
CS
Chip select. This active-LOW input enables the SED1335 series. It is usually connected
to the output of an address decoder device that maps the SED1335 series into the memory
space of the controlling microprocessor.
RES
This active-LOW input performs a hardware reset on the SED1335 series. It is a
Schmitt-trigger input for enhanced noise immunity; however, care should be taken to ensure
that it is not triggered if the supply voltage is lowered.
5.2.4. Display memory control
The SED1335 series can directly access static RAM and
PROM. The designer may use a mixture of these two
Pin Name
VA0 to VA15
VD0 to VD7
VWR
6
types of memory to achieve an optimum trade-off between low cost and low power consumption.
Function
16-bit display memory address. When accessing character generator RAM or ROM, VA0 to
VA3, reflect the lower 4 bits of the SED1335 series’s row counter.
8-bit tristate display memory data bus. These pins are enabled when VR/W is LOW.
Active-LOW display memory write control output.
VRD
Active-LOW display memory read control output.
VCE
Active-LOW static memory standby control signal. VCE can be used with CS.
EPSON
SED1335 Series
Technical Manual
PIN DESCRIPTION/SPECIFICATIONS
5.2.5. LCD drive signals
In order to provide effective low-power drive for LCD
matrixes, the SED1335 series can directly control both
the X- and Y-drivers using an enable chain.
Pin Name
Function
XD0 to XD3
4-bit X-driver (column drive) data outputs. Connect these outputs to the inputs of the X-driver
chips.
XSCL
XECL
LP
WF
YSCL
YD
YDIS
The falling edge of XSCL latches the data on XD0 to XD3 into the input shift registers of the
X-drivers. To conserve power, this clock halts between LP and the start of the following display
line (See section 6.3.7).
The falling edge of XECL triggers the enable chain cascade for the X-drivers.
Every 16th clock pulse is output to the next X-driver.
LP latches the signal in the X-driver shift registers into the output data latches. LP is a fallingedge triggered signal, and pulses once every display line.
Connect LP to the Y-driver shift clock on modules.
LCD panel AC drive output. The WF period is selected to be one of two values with SYSTEM
SET command.
The falling edge of YSCL latches the data on YD into the input shift registers of the
Y-drivers. YSCL is not used with driver ICs which use LP as the Y-driver shift clock.
YD is the data pulse output for the Y drivers. It is active during the last line of each frame, and
is shifted through the Y drivers one by one (by YSCL), to scan the display’s common
connections.
Power-down output signal. YDIS is HIGH while the display drive outputs are active.
YDIS goes LOW one or two frames after the sleep command is written to the SED1335
series. All Y-driver outputs are forced to an intermediate level (de-selecting the display
segments) to blank the display. In order to implement power-down operation in the LCD unit,
the LCD power drive supplies must also be disabled when the display is disabled by YDIS.
6. SPECIFICATIONS
6.1. Absolute Maximum Ratings
Parameter
Supply voltage range
Input voltage range
Power dissipation
Operating temperature range
Storage temperature range
Soldering temperature (10 seconds). See note 1.
Symbol
VDD
VIN
PD
Topg
Tstg
Tsolder
Rating
–0.3 to 7.0
–0.3 to VDD + 0.3
300
–20 to 75
–65 to 150
260
Unit
V
V
mW
°C
°C
°C
Notes:
1. The humidity resistance of the flat package may be reduced if the package is immersed in solder. Use a soldering technique
that does not heatstress the package.
2. If the power supply has a high impedance, a large voltage differential can occur between the input and supply voltages. Take
appropriate care with the power supply and the layout of the supply lines. (See section 6.2.)
3. All supply voltages are referenced to VSS = 0V.
SED1335 Series
Technical Manual
EPSON
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SPECIFICATIONS
6.2. SED1335
VDD = 4.5 to 5.5V, VSS = 0V, Ta = –20 to 75°C
Parameter
Symbol
Condition
Rating
Unit
min
4.5
typ
5.0
max
5.5
VI = VDD. See note 5.
2.0
—
—
0.05
6.0
2.0
V
µA
VI = VSS. See note 5.
See note 4.
—
—
0.10
11
5.0
15
µA
mA
V
Supply voltage
Register data retention voltage
VDD
VOH
Input leakage current
Output leakage current
I LI
ILO
Operating supply current
Iopr
Quiescent supply current
IQ
Sleep mode,
VOSC1 = VCS = VRD = VDD
—
0.05
20.0
µA
Oscillator frequency
External clock frequency
Oscillator feedback resistance
TTL
HIGH-level input voltage
LOW-level input voltage
f OSC
f CL
Rf
Measured at crystal,
47.5% duty cycle.
See note 6.
1.0
1.0
0.5
—
—
1.0
10.0
10.0
3.0
MHz
MHz
MΩ
0.5V DD
—
VDD
V
VSS
—
0.2V DD
V
HIGH-level output voltage
VOHT
2.4
—
—
V
LOW-level output voltage
VOLT
IOL = 5.0 mA. See note 1.
—
—
VSS + 0.4
V
CMOS
HIGH-level input voltage
LOW-level input voltage
HIGH-level output voltage
VIHC
VILC
VOHC
See note 2.
See note 2.
0.8V DD
VSS
—
—
VDD
0.2V DD
V
V
LOW-level output voltage
Open-drain
LOW-level output voltage
Schmitt-trigger
Rising-edge threshold voltage
VOLC
IOH = 1.6 mA. See note 2.
—
—
—
—
VSS + 0.4
V
V
VOLN
IOL = 6.0 mA.
—
—
VSS + 0.4
V
Falling-edge threshold voltage
VT–
0.5V DD
0.2V DD
0.7V DD
0.3V DD
0.8V DD
0.5V DD
V
V
VIHT
VILT
VT+
See note 1.
See note 1.
IOH = –5.0 mA.
See note 1.
IOH = –2.0 mA. See note 2. VDD – 0.4
See note 3.
See note 3.
Notes:
1. D0 to D7, A0, CS, RD, WR, VD0 to VD7, VA0 to VA15, VRD, VWR and VCE are TTL-level inputs.
2. SEL1 is CMOS-level inputs. YD, XD0 to XD3, XSCL, LP, WF, YDIS are CMOS-level outputs.
3. RES is a Schmitt-trigger input. The pulsewidth on RES must be at least 200 µs. Note that pulses of more than a few seconds
will cause DC voltages to be applied to the LCD panel.
4. fOSC = 10 MHz, no load (no display memory), internal character generator, 256 × 200 pixel display. The operating
supply current can be reduced by approximately 1 mA by setting both CLO and the display OFF.
5. VD0 to VD7 and D0 to D7 have internal feedback circuits so that if the inputs become high-impedance, the input
state immediately prior to that is held. Because of the feedback circuit, input current flow occurs when the
inputs are in an intermediate state.
6. Because the oscillator circuit input bias current is in the order of µA, design the printed circuit board so as to
reduce leakage currents.
8
EPSON
SED1335 Series
Technical Manual
SPECIFICATIONS
VDD = 2.7 to 4.5 V, VSS = 0 V, Ta = –20 to 75˚C unless otherwise noted
Rating
Parameter
Symbol
Condition
Unit
min
typ
max
Supply voltage
VDD
2.7
3.5
4.5
V
Register data retention voltage
VOH
2.0
—
6.0
V
Input leakage current
ILI
VI = VDD. See note 5.
—
0.05
2.0
µA
Output leakage current
ILO
VI = VSS. See note 5.
—
0.10
5.0
µA
Operating supply current
Iopr
VDD = 3.5 V. See note 4.
—
3.5
—
See note 4.
—
—
7.0
Sleep mode,
VOSC1 = VCS = VRD = VDD
—
0.05
20.0
µA
Measured at crystal,
1.0
—
8.0
MHz
Quiescent supply current
Oscillator frequency
IQ
fOSC
mA
External clock frequency
fCL
47.5% duty cycle.
1.0
—
8.0
MHz
Oscillator feedback resistance
Rf
See note 6.
0.7
—
3.0
MΩ
HIGH-level input voltage
VIHT
See note 1.
0.5 VDD
—
VDD
V
LOW-level input voltage
VILT
See note 1.
VSS
—
0.2 VDD
V
HIGH-level output voltage
VOHT
IOH = –3.0 mA. See note 1.
2.4
—
—
V
LOW-level output voltage
VOLT
IOL = 3.0 mA. See note 1.
—
—
VSS + 0.4
V
HIGH-level input voltage
VIHC
See note 2.
0.8 VDD
—
VDD
V
LOW-level input voltage
VILC
See note 2.
VSS
—
0.2 VDD
V
HIGH-level output voltage
VOHC
IOH = –2.0 mA. See note 2.
VDD – 0.4
—
—
V
LOW-level output voltage
VOLC
IOH = 1.6 mA. See note 2.
—
—
VSS + 0.4
V
VOLN
IOL = 6.0 mA.
—
—
VSS + 0.4
V
TTL
CMOS
Open-drain
LOW-level output voltage
Schmitt-trigger
Rising-edge threshold voltage
VT+
See note 3.
0.5 VDD
0.7 VDD
0.8 VDD
V
Falling-edge threshold voltage
VT–
See note 3.
0.2 VDD
0.3 VDD
0.5 VDD
V
Notes
1. D0 to D7, A0, CS, RD, WR, VD0 to VD7, VA0 to VA15, VRD, VWR and VCE are TTL-level inputs.
2. SEL1 is CMOS-level inputs. YD, XD0 to XD3, XSCL, LP, WF, YDIS are CMOS-level outputs.
3. RES is a Schmitt-trigger input. The pulsewidth on RES must be at least 200 µs. Note that pulses of more than a few seconds will
cause DC voltages to be applied to the LCD panel.
4.
fOSC = 10 MHz, no load (no display memory), internal character generator, 256 × 200 pixel display.
The operating supply current can
be reduced by approximately 1 mA by setting both CLO and the display OFF.
5. VD0 to VD7 and D0 to D7 have internal feedback circuits so that if the inputs become high-impedance, the input state immediately
prior to that is held. Because of the feedback circuit, input current flow occurs when the inputs are in an intermediate state.
6. Because the oscillator circuit input bias current is in the order of µA, design the printed circuit board so as to reduce leakage currents.
SED1335 Series
Technical Manual
EPSON
9
SPECIFICATIONS
6.3. SED1335F Timing Diagrams
6.3.1. 8080 family interface timing
AO, CS
tAW8
tAH8
tCYC8
WR, RD
tCC
tDH8
tDS8
D0 to D7
(Write)
tACC8
tOH8
D0 to D7
(Read)
Ta = –20 to 75°C
Signal
A0, CS
WR, RD
Symbol
tAH8
tAW8
tCYC8
tCC
tDS8
D0 to D7
tDH8
tACC8
tOH8
Parameter
Address hold time
Address setup time
System cycle time
VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V
min
max
min
max
10
—
10
—
0
—
0
—
See note.
See note.
—
—
Strobe pulsewidth
Data setup time
Data hold time
RD access time
Output disable time
120
120
5
—
10
—
—
—
50
50
150
120
5
—
10
—
—
—
80
55
Unit
Condition
ns
ns
ns
ns
ns
ns
ns
ns
CL = 100pF
Note: For memory control and system control commands:
tCYC8 = 2tC + tCC + tCEA + 75 > tACV + 245
For all other commands:
tCYC8 = 4tC + tCC + 30
10
EPSON
SED1335 Series
Technical Manual
SPECIFICATIONS
6.3.2. 6800 family interface timing
E
tCYC6
tAW6
tEW
R/W
tAH6
A0, CS
tDH6
tDS6
D0 to D7
(Write)
tACC6
tOH6
D0 to D7
(Read)
Note: tCYC6 indicates the interval during which CS is LOW and E is HIGH.
Ta = –20 to 75°C
Signal
Symbol
A0,
CS,
R/W
tCYC6
D0 to D7
E
t AW6
t AH6
t DS6
tDH6
t OH6
tACC6
t EW
Parameter
VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V
min
max
min
max
Unit
System cycle time
Address setup time
Address hold time
Data setup time
See note.
—
—
—
—
See note.
0
0
100
10
0
120
—
—
—
—
ns
ns
ns
ns
Data hold time
Output disable time
Access time
Enable pulsewidth
0
10
—
120
—
50
85
—
0
10
—
150
—
75
130
—
ns
ns
ns
ns
Condition
CL =
100 pF
Note: For memory control and system control commands:
tCYC6 = 2tC + tEW + tCEA + 75 > tACV + 245
For all other commands:
tCYC6 = 4tC + tEW + 30
SED1335 Series
Technical Manual
EPSON
11
SPECIFICATIONS
6.3.3. Display memory read timing
EXTΦ0
tC
tW
tCE
tW
VCE
tCYR
VA0 to VA15
tASC
tAHC
tRCH
VR/W
tRCS
tCEA
tCE3
tOH2
tACV
VD0 to VD7
Ta = –20 to 75°C
Signal
Symbol
EXT φ0
tC
tW
VCE
tCE
tCYR
VA0 to
VA15
tASC
tAHC
tRCS
VRD
tRCH
VD0 to
VD7
12
tACV
tCEA
tOH2
tCE3
Parameter
Clock period
VCE HIGH-level
pulsewidth
VCE LOW-level
pulsewidth
VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V
min
max
min
max
100
—
125
—
Unit
ns
tC – 50
—
tC – 50
—
ns
2tC – 30
—
2tC – 30
—
ns
Read cycle time
3tC
—
3t C
—
Address setup time to
—
tC – 100
—
tC – 70
falling edge of VCE
Address hold time from
—
2tC – 40
—
2tC – 30
falling edge of VCE
Read cycle setup time to
tC – 45
—
tC – 60
—
falling edge of VCE
Read cycle hold time
—
0.5tC
—
0.5tC
from rising edge of VCE
Address access time
—
3tC – 100
—
3tC – 115
VCE access time
—
2tC – 80
—
2tC – 90
Output data hold time
0
—
0
—
VCE to data off time
0
—
0
—
EPSON
Condition
ns
ns
ns
CL = 100
pF
ns
ns
ns
ns
ns
ns
SED1335 Series
Technical Manual
SPECIFICATIONS
6.3.4. Display memory write timing
tC
EXT φ O
tW
tCE
VCE
tASC
tCA
tAHC
VA0 to VA15
tAS tWSC
tWHC
tAH2
VR/W
tDH2
tDSC
tDHC
VD0 to VD7
SED1335 Series
Technical Manual
EPSON
13
SPECIFICATIONS
Ta = –20 to 75°C
Signal
Symbol
EXT φ0
tC
tW
VCE
Unit
100
—
125
—
ns
tC – 50
—
tC – 50
—
ns
VCE LOW-level
pulsewidth
2tC – 30
—
2tC – 30
—
ns
tCYW
Write cycle time
3tC
—
3t C
—
ns
2tC – 30
—
2tC – 40
—
ns
tC – 70
—
tC – 110
—
ns
0
—
0
—
ns
0
—
0
—
ns
10
—
10
—
ns
tC – 80
—
tC – 115
—
ns
2tC – 20
—
2tC – 20
—
ns
—
tC – 125
—
ns
—
2tC – 30
—
ns
50
5
50
ns
t ASC
t CA
tAS
t AH2
tWSC
VWR
t WHC
tDSC
VD0 to
VD7
Clock period
VCE HIGH-level
pulsewidth
VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V
min
max
min
max
t CE
tAHC
VA0 to
VA15
Parameter
t DHC
tDH2
Address hold time from
falling edge of VCE
Address setup time to
falling edge of VCE
Address hold time from
rising edge of VCE
Address setup time to
falling edge of VWR
Address hold time from
rising edge of VWR
Write setup time to
falling edge of VCE
Write hold time from
falling edge of VCE
Data input setup time to
tC – 85
falling edge of VCE
Data input hold time
2tC – 30
from falling edge of VCE
Data hold time from
5
rising edge of VWR
Condition
CL = 100
pF
Note: VD0 to VD7 are latching input/outputs. While the bus is high impedance, VD0 to VD7 retain the write data until the data read
from the memory is placed on the bus.
14
EPSON
SED1335 Series
Technical Manual
SPECIFICATIONS
6.3.5. SLEEP IN command timing
VCE
SLEEP IN write
SYSTEM SET write
tWRL
tWRD
WR
(Command input)
YDIS
Ta = –20 to 75°C
Signal
Symbol
t WRD
WR
tWRL
Parameter
VCE falling-edge delay
time
YDIS falling-edge delay
time
VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V
min
max
min
max
Unit
See note 1.
—
See note 1.
—
ns
—
See note 2.
—
See note 2.
ns
Condition
CL = 100
pF
Notes:
1. tWRD = 18tC + tOSS + 40 (tOSS is the time delay from the sleep state until stable operation)
2. tWRL = 36tC × [TC/R] × [L/F] + 70
SED1335 Series
Technical Manual
EPSON
15
SPECIFICATIONS
6.3.6. External oscillator signal timing
tRCL
tFCL
EXTφ0
tWL
tWH
tC
Ta = –20 to 75°C
Signal
Symbol
tRCL
tFCL
EXT φ0
tWH
tWL
tC
Parameter
External clock rise time
External clock fall time
External clock
HIGH-level pulsewidth
External clock
LOW-level pulsewidth
External clock period
VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V
min
max
min
max
—
15
—
15
—
15
—
15
Unit
ns
ns
See note 1. See note 2. See note 1. See note 2.
ns
See note 1. See note 2. See note 1. See note 2.
ns
100
—
125
—
Condition
ns
Notes:
16
1.
(tC – tRCL – tFCL) ×
475
< tWH, tWL
1000
2.
(tC – tRCL – tFCL) ×
525
> tWH, tWL
1000
EPSON
SED1335 Series
Technical Manual
SPECIFICATIONS
6.3.7. LCD output timing
The following characteristics are for a 1/64 duty cycle.
Row
62
63
64
1
2
3
4
60
61
62
63
64
LP
1 frame time
YD
WF
WF
1 line time
Row 64
Row 2
Row 1
LP
XSCL
XD0 to XD3 (14) (15)
tr
(16)
(1)
(15) (16)(1) (2) (3)
tWX
(15) (16)
(1)
tCX
tf
XSCL
tDS
tDH
tLS
XD0 to XD3
tWL
tLD
LP
tDHY
tDF
WF(B)
YD
SED1335 Series
Technical Manual
EPSON
17
SPECIFICATIONS
Ta = –20 to 75°C
Signal
Symbol
tr
tf
XSCL
t CX
t WX
XD0 to
XD3
tDH
t DS
LP
t WL
t LD
WF
YD
tDF
tLS
18
tDHY
Rise time
Fall time
Shift clock cycle time
VDD = 4.5 to 5.5V VDD = 2.7 to 4.5V
min
max
min
max
—
30
—
40
—
30
—
40
4t C
—
4t C
—
XSCL clock pulsewidth
X data hold time
2tC – 60
2tC – 50
—
—
2tC – 60
2tC – 50
—
—
ns
ns
X data setup time
2tC – 100
—
2tC – 105
—
ns
Latch data setup time
LP pulsewidth
2tC – 50
4tC – 80
—
—
2tC – 50
4tC – 120
—
—
ns
ns
0
—
—
50
0
—
—
50
ns
ns
2tC – 20
—
2tC – 20
—
ns
Parameter
LP delay time from XSCL
Permitted WF delay
Y data hold time
EPSON
Unit
Condition
ns
ns
ns
CL =
100 pF
SED1335 Series
Technical Manual
PACKAGE DIMENSIONS
7. PACKAGE DIMENSIONS
Unit: mm
7.1. SED1335F0A
7.2. SED1335F0B
◊QFP5-60 pin
◊QFP6-60 pin
25.6 ± 0.4
17.6 ± 0.4
20.0 ± 0.1
14.0 ± 0.2
54
36
45
31
46
55
1
23
2.7 ± 0.1
0.35 ± 0.1
16
60
0.15 ± 0.05
2.7 ± 0.1
1.0 ± 0.1
17.6 ± 0.4
Index
24
6
14.0 ± 0.2
29
5
19.6 ± 0.4
30
Index
14.0 ± 0.1
60
1
0.15 ± 0.05
30
35
15
0.8 ± 0.15
0.35 ± 0.15
0 to 12°
0 to 12°
1.5 ± 0.3
0.8 ± 0.3
2.8
SED1335 Series
Technical Manual
1.8
EPSON
19
INSTRUCTION SET
8. INSTRUCTION SET
8.1. The Command Set
Table 1. Command set
Code
Class
Command
Hex Command Description
No. of
Bytes
Section
Initialize device and
display
8
8.2.1
RD WR A0 D7 D6 D5 D4 D3 D2 D1 D0
System
control
Display
control
Drawing
control
Memory
control
40
Command
Read
Parameters
SYSTEM SET
1
0
1
0
1
0
0
0
0
0
0
SLEEP IN
1
0
1
0
1
0
1
0
0
1
1
53 Enter standby mode
0
8.2.2
1
8.3.1
10
8.3.2
DISP ON/OFF
1
0
1
0
1
0
1
1
0
0
D
58, Enable and disable dis59 play and display flashing
SCROLL
1
0
1
0
1
0
0
0
1
0
0
44
CSRFORM
1
0
1
0
1
0
1
1
1
0
1
5D Set cursor type
2
8.3.3
0
Set start address of char5C
acter generator RAM
2
8.3.6
0
8.3.4
1
8.3.7
CGRAM ADR
1
0
1
0
1
0
1
1
1
CSRDIR
1
0
1
0
1
0
0
1
1
HDOT SCR
1
0
1
0
1
0
1
1
OVLAY
1
0
1
0
1
0
1
1
0
Set display start address
and display regions
4C
CD CD
Set direction of cursor
to
1 0
movement
4F
Set horizontal scroll
0 1 0 5A
position
CSRW
1
0
1
0
1
0
0
0
1
1
0
Set display overlay
format
46 Set cursor address
2
8.4.1
CSRR
1
0
1
0
1
0
0
0
1
1
1
47 Read cursor address
2
8.4.2
MWRITE
1
0
1
0
1
0
0
0
0
1
0
42 Write to display memory
—
8.5.1
1
Read from display
43
memory
—
8.5.2
MREAD
1
0
1
0
1
0
0
0
0
0
1
1
1
5B
1
8.3.5
Notes:
1. In general, the internal registers of the SED1335 series are modified as each command parameter is input. However,
the microprocessor does not have to set all the parameters of a command and may send a new command before all parameters
have been input. The internal registers for the parameters that have been input will have been changed but the remaining
parameter registers are unchanged.
2-byte parameters (where two bytes are treated as 1 data item) are handled as follows:
a. CSRW, CSRR: Each byte is processed individually. The microprocessor may read or write just the low byte of the cursor
address.
b. SYSTEM SET, SCROLL, CGRAM ADR: Both parameter bytes are processed together. If the command is changed after
half of the parameter has been input, the single byte is ignored.
2. APL and APH are 2-byte parameters, but are treated as two 1-byte parameters.
20
EPSON
SED1335 Series
Technical Manual
INSTRUCTION SET
8.2. System Control Commands
8.2.1. SYSTEM SET
Initializes the device, sets the window sizes, and selects
the LCD interface format. Since this command sets the
basic operating parameters of the SED1335 series, an
incorrect SYSTEM SET command may cause other
commands to operate incorrectly.
MSB
LSB
D7
D6
D5
D4
D3
D2
D1
D0
A0
WR
RD
C
0
1
0
0
0
0
0
0
1
0
1
P1
0
0
IV
1
W/S
M2
M1
M0
0
0
1
P2
WF
0
0
0
0
0
0
1
P3
0
0
0
0
0
0
1
FX
FY
P4
C/R
0
0
1
P5
TC/R
0
0
1
P6
L/F
0
0
1
P7
APL
0
0
1
P8
APH
0
0
1
Figure 1. SYSTEM SET instruction
8.2.1.1. C
This control byte performs the following:
1. Resets the internal timing generator
2. Disables the display
3. Cancels sleep mode
Parameters following P1 are not needed if only canceling sleep mode.
8.2.1.2. M0
Selects the internal or external character generator ROM.
The internal character generator ROM contains 160, 5 ×
7 pixel characters, as shown in figure 70. These characters are fixed at fabrication by the metallization mask.
The external character generator ROM, on the other
hand, can contain up to 256 user-defined characters.
M0 = 0: Internal CG ROM
M0 = 1: External CG ROM
SED1335 Series
Technical Manual
Note that if the CG ROM address space overlaps the
display memory address space, that portion of the display
memory cannot be written to.
8.2.1.3. M1
Selects the memory configuration for user-definable characters. The CG RAM codes select one of the 64 codes
shown in figure 46.
M1 = 0: No D6 correction.
The CG RAM1 and CG RAM2 address spaces are not
contiguous, the CG RAM1 address space is treated as
character generator RAM, and the CG RAM2 address
space is treated as character generator ROM.
M1 = 1: D6 correction.
The CG RAM1 and CG RAM2 address spaces are
contiguout and are both treated as character generator
RAM.
EPSON
21
INSTRUCTION SET
8.2.1.4. M2
Selects the height of the character bitmaps. Characters
more than 16 pixels high can be displayed by creating a
bitmap for each portion of each character and using the
SED1335 series graphics mode to reposition them.
M2 = 0: 8-pixel character height (2716 or equivalent
ROM)
M2 = 1: 16-pixel character height (2732 or equivalent
ROM)
EI
8.2.1.5. W/S
Selects the LCD drive method.
W/S = 0: Single-panel drive
W/S = 1: Dual-panel drive
X driver
X driver
YD
Y driver
LCD
Figure 2. Single-panel display
EI
X driver
X driver
YD
Upper Panel
Y driver
Lower Panel
X driver
X driver
Figure 3. Above and below two-panel display
22
EPSON
SED1335 Series
Technical Manual
INSTRUCTION SET
EI
X driver
X driver
X driver
X driver
YD
Y driver
Left Panel
Right Panel
Figure 4. Left-and-right two-panel display
Note
There are no Seiko Epson LCD units in the configuration shown in Figure 4.
Table 2. LCD parameters
Parameter
W/S = 0
W/S = 1
IV = 1
IV = 0
IV = 1
IV = 0
C/R
TC/R
L/F
C/R
TC/R
L/F
C/R
TC/R
L/F
C/R
TC/R
L/F
SL1
00H to L/F
(L/F) / 2
(L/F) / 2
SL2
00H to L/F
C/R
TC/R (See note 1.)
L/F
00H to L/F + 1
(See note 2.)
00H to L/F + 1
(See note 2.)
(L/F) / 2
(L/F) / 2
SAD1
SAD2
SAD3
SAD4
Cursor movement range
First screen block
First screen block
First screen block
First screen block
Second screen block Second screen block Second screen block Second screen block
Third screen block
Third screen block
Third screen block
Third screen block
Invalid
Invalid
Fourth screen block
Continuous movement over whole screen
Fourth screen block
Above-and-below configuration:
continuous movement over whole screen
Notes:
1. See table 26 for further details on setting the C/R and TC/R parameters when using the HDOT SCR command.
2. The value of SL when IV = 0 is equal to the value of SL when IV = 1, plus one.
8.2.1.6. IV
Screen origin compensation for inverse display. IV is
usually set to 1.
The best way of displaying inverted characters is to
Exclusive-OR the text layer with the graphics background layer. However, inverted characters at the top or
SED1335 Series
Technical Manual
left of the screen are difficult to read as the character
origin is at the top-left of its bitmap and there are no
background pixels either above or to the left of these
characters.
EPSON
23
INSTRUCTION SET
The IV flag causes the SED1335 series to offset the text
screen against the graphics back layer by one vertical
pixel. Use the horizontal pixel scroll function (HDOT
SCR) to shift the text screen 1 to 7 pixels to the right. All
characters will then have the necessary surrounding background pixels that ensure easy reading of the inverted
characters.
See Section 10.5 for information on scrolling.
IV = 0: Screen top-line correction
IV = 1: No screen top-line correction
Display start point
8.2.1.7. FX
Define the horizontal character size. The character width
in pixels is equal to FX + 1, where FX can range from 00
to 07H inclusive. If data bit 3 is set (FX is in the range 08
to 0FH) and an 8-pixel font is used, a space is inserted
between characters.
Table 3. Horizontal character size selection
FX
HEX
IV
Back layer
1 dot
HDOT SCR
D3 D2 D1 D0
[FX] character width
(pixels)
00
01
0
0
0
0
0
0
0
1
1
2
↓
↓
↓
↓
↓
↓
07
0
1
1
1
8
Character
Dots 1 to 7
Figure 5. IV and HDOT SCR adjustment
Since the SED1335 series handles display data in 8-bit
units, characters larger than 8 pixels wide must be formed
from 8-pixel segments. As Figure 6 shows, the remainder
of the second eight bits are not displayed. This also
applies to the second screen layer.
In graphics mode, the normal character field is also eight
pixels. If a wider character field is used, any remainder in
the second eight bits is not displayed.
FX
FX
FY
8 bits
8 bits
FY
8 bits
Address A
8 bits
Address B
Non-display area
Figure 6. FX and FY display addresses
24
EPSON
SED1335 Series
Technical Manual
INSTRUCTION SET
8.2.1.8. WF
Selects the AC frame drive waveform period. WF is
usually set to 1.
WF = 0: 16-line AC drive
WF = 1: two-frame AC drive
In two-frame AC drive, the WF period is twice the frame
period.
In 16-line AC drive, WF inverts every 16 lines.
Although 16-line AC drive gives a more readable display,
horizontal lines may appear when using high LCD drive
voltages or at high viewing angles.
8.2.1.10. C/R
Sets the address range covered by one display line, that is,
the number of characters less one, multiplied by the
number of horizontal bytes per character.
C/R can range from 0 to 239.
For example, if the character width is 10 pixels, then the
address range is equal to twice the number of characters,
less 2. See Section 16.1.1 for the calculation of C/R.
[C/R] cannot be set to a value greater than the address
range. It can, however, be set smaller than the address
range, in which case the excess display area is blank. The
number of excess pixels must not exceed 64.
8.2.1.9. FY
Sets the vertical character size. The height in pixels is
equal to FY + 1.
FY can range from 00 to 0FH inclusive.
Set FY to zero (vertical size equals one) when in graphics
mode.
Table 4. Vertical character size selection
HEX
00
01
↓
07
↓
0E
0F
D3
0
0
↓
0
↓
1
1
FY
D2 D1 D0
0
0
0
0
0
1
↓
↓
↓
1
1
1
↓
↓
↓
1
1
0
1
1
1
[FY] character
height (pixels)
1
2
↓
8
↓
15
16
Table 5. Display line address range
HEX
00
D7
0
D6
0
D5
0
01
↓
4F
↓
EE
EF
0
↓
0
↓
1
1
0
↓
1
↓
1
1
0
↓
0
↓
1
1
SED1335 Series
Technical Manual
C/R
D4
0
0
↓
0
↓
0
0
D3
0
D2
0
D1
0
D0
0
0
↓
1
↓
1
1
0
↓
1
↓
1
1
0
↓
1
↓
1
1
1
↓
1
↓
0
1
EPSON
[C/R] bytes per display line
1
2
↓
80
↓
239
240
25
INSTRUCTION SET
8.2.1.11. TC/R
Sets the length, including horizontal blanking, of one
line. The line length is equal to TC/R + 1, where TC/ R can
range from 0 to 255.
TC/R must be greater than or equal to C/R + 4. Provided
this condition is satisfied, [TC/R] can be set according to
the equation given in section 16.1.1 in order to hold the
frame period constant and minimize jitter for any given
main oscillator frequency, fOSC.
Table 6. Line length selection
HEX
D7
D6
D5
00
01
0
0
0
0
0
0
↓
52
↓
FE
FF
↓
0
↓
1
1
↓
1
↓
1
1
↓
0
↓
1
1
TC/R
D4
[TC/R] line length (bytes)
D3
D2
D1
D0
0
0
0
0
0
0
0
0
0
1
1
2
↓
1
↓
1
1
↓
0
↓
1
1
↓
0
↓
1
1
↓
1
↓
1
1
↓
0
↓
0
1
↓
83
↓
255
256
8.2.1.12. L/F
Sets the height, in lines, of a frame. The height in lines is
equal to L/F + 1, where L/F can range from 0 to 255.
Table 7. Frame height selection
HEX
00
D7
0
D6
0
D5
0
01
↓
7F
↓
FE
0
↓
0
↓
1
0
↓
1
↓
1
0
↓
1
↓
1
FF
1
1
1
L/F
D4
0
[L/F] lines per frame
D3
0
D2
0
D1
0
D0
0
0
↓
1
↓
1
0
↓
1
↓
1
0
↓
1
↓
1
0
↓
1
↓
1
1
↓
1
↓
0
2
↓
128
↓
255
1
1
1
1
1
256
1
If W/S is set to 1, selecting two-screen display, the
number of lines must be even and L/F must, therefore, be
an odd number.
26
EPSON
SED1335 Series
Technical Manual
INSTRUCTION SET
8.2.1.13. AP
Defines the horizontal address range of the virtual screen.
APL is the least significant byte of the address.
APL
AP7
AP6
AP5
AP4
AP3
AP2
AP1
AP0
APH
AP15
AP14
AP13
AP12
AP11
AP10
AP9
AP8
Figure 7. AP parameters
Table 8. Horizontal address range
Hex code
APH
Blank data is sent to the X-drivers, and the Y-drivers have
their bias supplies turned off by the YDIS signal. Using
the YDIS signal to disable the Y-drivers guards against
any spurious displays.
The internal registers of the SED1335 series maintain
their values during the sleep state. The display memory
control pins maintain their logic levels to ensure that the
display memory is not corrupted.
The SED1335 series can be removed from the sleep state
by sending the SYSTEM SET command with only the P1
parameter. The DISP ON command should be sent next
to enable the display.
[AP] addresses
per line
APL
0
0
0
0
0
0
↓
0
↓
F
0
↓
0
↓
F
0
↓
5
↓
F
1
↓
0
↓
E
1
↓
80
↓
216 – 2
F
F
F
F
216 – 1
MSB
C
0
LSB
1
0
1
0
0
1
1
Figure 9. SLEEP IN instruction
Display area
C/R
Display memory limit
AP
Figure 8. AP and C/R relationship
8.2.2. SLEEP IN
Places the system in standby mode. This command has no
parameter bytes. At least one blank frame after receiving
this command, the SED1335F halts all internal operations, including the oscillator, and enters the sleep state.
SED1335 Series
Technical Manual
1. The YDIS signal goes LOW between one and two
frames after the SLEEP IN command is received.
Since YDIS forces all display driver outputs to go to
the deselected output voltage, YDIS can be used as a
power-down signal for the LCD unit. This can be
done by having YDIS turn off the relatively highpower LCD drive supplies at the same time as it
blanks the display.
2. Since all internal clocks in the SED1335 series are
halted while in the sleep state, a DC voltage will be
applied to the LCD panel if the LCD drive supplies
remain on.
If reliability is a prime consideration, turn off the
LCD drive supplies before issuing the SLEEP IN
command.
3. Note that, although the bus lines become high impedance in the sleep state, pull-up or pull-down resistors
on the bus will force these lines to a known state.
EPSON
27
INSTRUCTION SET
8.3. Display Control Commands
8.3.1. DISP ON/OFF
8.3.1.3. FP
Turns the whole display on or off. The single-byte parameter enables and disables the cursor and layered screens,
and sets the cursor and screen flash rates. The cursor can
be set to flash over one character or over a whole line.
Each pair of bits in FP sets the attributes of one screen
block, as follows.
MSB
The display attributes are as follows:
Table 10. Screen block attribute selection
LSB
FP1
FP0
FP3
FP2
FP5
0
0
FP4
0
1
8.3.1.1. D
1
0
Turns the display ON or OFF. The D bit takes precedence over the FP bits in the parameter.
D = 0: Display OFF
D = 1: Display ON
1
1
C
0
1
0
1
1
0
0
D
P1 FP5 FP4 FP3 FP2 FP1 FP0 FC1 FC0
Figure 10. DISP ON/OFF parameters
8.3.1.2. FC
Enables/disables the cursor and sets the flash rate. The
cursor flashes with a 70% duty cycle (ON/OFF).
First screen block (SAD1)
Second screen block (SAD2,
SAD4). See note.
Third screen block (SAD3)
OFF (blank)
No flashing
Flash at fFR/32 Hz
ON
(approx. 2 Hz)
Flash at fFR/4 Hz
(approx. 16 Hz)
Note
If SAD4 is enabled by setting W/S to 1, FP3 and FP2
control both SAD2 and SAD4. The attributes of
SAD2 and SAD4 cannot be set independently.
Table 9. Cursor flash rate selection
FC1
0
0
FC0
0
1
1
0
1
1
Cursor display
OFF (blank)
No flashing
Flash at fFR/32 Hz
ON
(approx. 2 Hz)
Flash at fFR/64 Hz
(approx. 1 Hz)
Note: As the MWRITE command always enables the cursor,
the cursor position can be checked even when performing consecutive writes to display memory while the
cursor is flashing.
28
EPSON
SED1335 Series
Technical Manual
INSTRUCTION SET
8.3.2. SCROLL
8.3.2.1. C
Sets the scroll start address and the number of lines per
scroll block. Parameters P1 to P10 can be omitted if not
required. The parameters must be entered sequentially as
shown in Figure 11.
MSB
LSB
C
0
1
0
0
0
1
0
0
P1
A7
A6
A5
A4
A3
A2
A1
A0 (SAD 1L)
P2
A15 A14 A13 A12 A11 A10
A9
A8 (SAD 1H)
P3
L7
L6
L5
L4
L3
L2
L1
L0 (SL 1)
P4
A7
A6
A5
A4
A3
A2
A1
A0 (SAD 2 L)
P5
A15 A14 A13 A12 A11 A10
A9
A8 (SAD 2H)
P6
L7
L6
L5
L4
L3
L2
L1
L0 (SL 2)
P7
A7
A6
A5
A4
A3
A2
A1
A0 (SAD 3L)
P8
A15 A14 A13 A12 A11 A10
A9
A8 (SAD 3H)
P9
A7
A2
A1
A0 (SAD 4L)
P10 A15 A14 A13 A12 A11 A10
A9
A8 (SAD 4H)
A6
A5
A4
A3
Figure 11. SCROLL instruction parameters
Note: Set parameters P9 and P10 only if both two-screen
drive (W/S = 1) and two-layer configuration are selected. SAD4 is the fourth screen block display start
address.
SED1335 Series
Technical Manual
EPSON
29
INSTRUCTION SET
Table 11. Screen block start address selection
SL1, SL2
[SL] screen lines
HEX
00
L7
0
L6
0
L5
0
L4
0
L3
0
L2
0
L1
0
L0
0
01
0
0
0
0
0
0
0
1
2
↓
7F
↓
0
↓
1
↓
1
↓
1
↓
1
↓
1
↓
1
↓
1
↓
128
↓
FE
↓
1
↓
1
↓
1
↓
1
↓
1
↓
1
↓
1
↓
0
↓
255
FF
1
1
1
1
1
1
1
1
256
8.3.2.2. SL1, SL2
SL1 and SL2 set the number of lines per scrolling screen.
The number of lines is SL1 or SL2 plus one. The relation-
1
ship between SAD, SL and the display mode is described
below.
Table 12. Text display mode
W/S
Screen
First screen block
Second screen block
First Layer
Second Layer
SAD1
SAD2
SL1
SL2
SAD3 (see note 1)
Set both SL1 and SL2 to L/F + 1
if not using a partitioned screen.
Third screen block (partitioned screen)
Screen configuration example:
SAD2
SAD1
SL2
0
SL1
Character display page 1
Graphics display page 2
SAD3
Character display page 3
Layer 2
Layer 1
30
EPSON
SED1335 Series
Technical Manual
INSTRUCTION SET
Table 12. Text display mode (continued)
W/S
Screen
First Layer
SAD1
Upper screen
SL1
SAD3
Lower screen
(See note 2.)
Set both SL1 and SL2 to ((L/F) / 2 + 1).
Screen configuration example:
Second Layer
SAD2
SL2
SAD4
(See note 2.)
SAD2
SAD1
1
SL1
Graphics display page 2
Character display page 1
SAD3
Graphics display page 4
(SAD4)
Character display page 3
Layer 1
Layer 2
Notes:
1. SAD3 has the same value as either SAD1 or SAD2, whichever has the least number of lines (set by SL1 and SL2).
2. Since the parameters corresponding to SL3 and SL4 are fixed by L/F, they do not have to be set in this mode.
SED1335 Series
Technical Manual
EPSON
31
INSTRUCTION SET
Table 13. Graphics display mode
W/S
Screen
First Layer
Second Layer
SAD1
SAD2
Two-layer composition
SL1
SL2
SAD3 (see note 3.)
Set both SL1 and SL2 to
Upper screen
L/F + 1 if not using a
partitioned screen
Screen configuration example:
Third Layer
SAD2
SAD1
SL2
0
SL1
Graphics display page 2
Character display page 1
SAD3
Character display page 3
Layer 1
Layer 2
SAD1
SL1 = L/F + 1
Screen configuration example:
Three-layer configuration
SAD2
SL2 = L/F + 1
SAD3
SAD2
SAD1
SAD3
—
Graphics display page 3
SL2
0
SL1
Graphics display page 2
Graphics display page 1
Layer 1
32
EPSON
Layer 3
Layer 2
SED1335 Series
Technical Manual
INSTRUCTION SET
Table 13. Graphics display mode (continued)
W/S
Screen
First Layer
Second Layer
SAD1
SAD2
Upper screen
SL1
SL2
SAD3
SAD4
Lower screen
(See note 2.)
(See note 2.)
Set both SL1 and SL2 to ((L/F) / 2 + 1).
Screen configuration example (See note 3.):
Third Layer
—
—
SAD2
SAD1
1
SL1
Graphics display page 2
Graphics display page 1
SAD3
Graphics display page 4
Graphics display page 3
Layer 1
Layer 2
Notes:
1. SAD3 has the same value as either SAD1 or SAD2, whichever has the least number of lines (set by SL1 and SL2).
2. Since the parameters corresponding to SL3 and SL4 are fixed by L/F, they do not have to be set.
3. If, and only if, W/S = 1, the differences between SL1 and (L/F + 1) / 2, and between SL2 and (L/F + 1) / 2, are blanked.
SL1
Upper Panel
L
Lower Panel
Graphics
L/2
Figure 12. Two-panel display height
SED1335 Series
Technical Manual
EPSON
33
INSTRUCTION SET
8.3.3. CSRFORM
Character start point
Sets the cursor size and shape. Although the cursor is
normally only used in text displays, it may also be used in
graphics displays when displaying special characters.
MSB
0
0 1 2 3 4 5 6 •
•
•
1
2
LSB
3
C
0
1
0
1
1
1
0
1
4
P1
0
0
0
0
X3
CRX
X2
X1 X0
P2
CM
0
0
0
Y3
CRY
Y2
Y1 Y0
5
6
7
8
Figure 13. CSRFORM parameter bytes
9
CRX = 5 dots
CRY = 9 dots
CM = 0
8.3.3.1. CRX
Sets the horizontal size of the cursor from the character
origin. CRX is equal to the cursor size less one. CRX must
be less than or equal to FX.
Table 14. Horizontal cursor size selection
CRX
HEX X3 X2 X1 X0
0
0
0
0
0
8.3.3.3. CM
Sets the cursor shape. Always set CM to 1 when in
graphics mode.
CM = 0: Underscore cursor
CM = 1: Block cursor
[CRX] cursor width
(pixels)
1
1
↓
4
↓
E
0
↓
0
↓
1
0
↓
1
↓
1
0
↓
0
↓
1
1
↓
0
↓
0
2
↓
9
↓
15
F
1
1
1
1
16
Figure 14. Cursor size and position
8.3.4. CSRDIR
Sets the direction of automatic cursor increment. The
cursor can move left or right one character, or up or down
by the number of bytes specified by the address pitch, AP.
When reading from and writing to display memory, this
automatic cursor increment controls the display memory
address increment on each read or write.
8.3.3.2. CRY
Sets the location of an underscored cursor in lines, from
the character origin. When using a block cursor, CRY sets
the vertical size of the cursor from the character origin.
CRY is equal to the number of lines less one.
MSB
C
LSB
0
1
0
0
1
1
CD1 CD2
Figure 15. CSRDIR parameters
Table 15. Cursor height selection
HEX
0
1
↓
8
↓
E
F
CRY
Y3 Y2 Y1 Y0
0
0
0
0
0
0
0
1
↓
↓
↓
↓
1
0
0
0
↓
↓
↓
↓
1
1
1
0
1
1
1
1
10
[CRY] cursor height
(lines)
Illegal
2
↓
9
↓
15
16
–AP
–1
+1
01
00
+AP
11
Figure 16. Cursor direction
34
EPSON
SED1335 Series
Technical Manual
INSTRUCTION SET
Table 16. Cursor shift direction
C
4CH
CD1
0
CD0
0
Shift direction
Right
4DH
4EH
4FH
0
1
1
1
0
1
Left
Up
Down
Note: Since the cursor moves in address units even if FX ≥ 9,
the cursor address increment must be preset for movement in character units. See Section 9.3.
8.3.5. OVLAY
Selects layered screen composition and screen text/ graphics mode.
MSB
LSB
C
0
1
0
P1
0
0
0
1
1
0
1
1
OV DM2 DM1 MX1 MX0
Figure 17. OVLAY parameters
8.3.5.1. MX0, MX1
MX0 and MX1 set the layered screen composition method,
which can be either OR, AND, Exclusive-OR or PriorityOR. Since the screen composition is organized in layers
and not by screen blocks, when using a layer divided into
two screen blocks, different composition methods cannot
be specified for the individual screen blocks.
The Priority-OR mode is the same as the OR mode unless
flashing of individual screens is used.
Table 17. Composition method selection
MX1
0
MX0
0
Function
L1 ∪ L2 ∪ L3
Composition Method
OR
0
1
(L1 ⊕ L2) ∪ L3
Exclusive-OR
1
1
0
1
(L1 ∩ L2) ∪ L3
L1 > L2 > L3
AND
Priority-OR
Applications
Underlining, rules, mixed text and graphics
Inverted characters, flashing regions,
underlining
Simple animation, three-dimensional
appearance
Notes:
L1: First layer (text or graphics). If text is selected, layer L3 cannot be used.
L2: Second layer (graphics only)
L3: Third layer (graphics only)
SED1335 Series
Technical Manual
EPSON
35
INSTRUCTION SET
Layer 1
Layer 2
Layer 3
Visible display
1
EPSON
EPSON OR
2
EPSON
EPSON Exclusive OR
3
EPSON
4
EPSON
SON AND
EPSON Prioritized OR
Figure 18. Combined layer display
Notes:
L1: Not flashing
L2: Flashing at 1 Hz
L3: Flashing at 2 Hz
8.3.5.2. DM1, DM2
DM1 and DM2 specify the display mode of screen blocks
1 and 3, respectively.
DM1/2 = 0: Text mode
DM1/2 = 1: Graphics mode
Note 1: Screen blocks 2 and 4 can only display graphics.
Note 2: DM1 and DM2 must be the same, regardless of
the setting of W/S.
8.3.5.3. OV
Specifies two- or three-layer composition in graphics
mode.
OV = 0: Two-layer composition
OV = 1: Three-layer composition
Set OV to 0 for mixed text and graphics mode.
8.3.6. CGRAM ADR
Specifies the CG RAM start address.
MSB
LSB
C
0
1
0
1
1
1
0
0
P1
A7
A6
A5
A4
A3
A2
A1
A0 (SAGL)
P2
A15 A14 A13 A12 A11 A10
A9
A8 (SAGH)
Figure 19. CGRAM ADR parameters
Note
See section 10 for information on the SAG parameters.
36
EPSON
SED1335 Series
Technical Manual
INSTRUCTION SET
Table 18. Scroll step selection (continued)
8.3.7. HDOT SCR
While the SCROLL command only allows scrolling by
characters, HDOT SCR allows the screen to be scrolled
horizontally by pixels. HDOT SCR cannot be used on
individual layers.
MSB
P1
HEX
00
LSB
D2 D1 D0
0
0
0
Number of pixels
to scroll
0
01
0
0
1
1
C
0
1
0
1
1
0
1
0
02
↓
0
↓
1
↓
0
↓
2
↓
P1
0
0
0
0
0
D2
D1
D0
06
07
1
1
1
1
0
1
6
7
Figure 20. HDOT SCR parameters
M
8.3.7.1. D0 to D2
Specifies the number of pixels to scroll. The C/R parameter has to be set to one more than the number of
horizontal characters before using HDOT SCR. Smooth
scrolling can be simulated if the controlling microprocessor repeatedly issues the HDOT SCR command to the
SED1335 series. See Section 9.5 for more information on
scrolling the display.
B
A
Z
A
X
B
Z
A
Y
X
B
Display width
M=0
Y
X
N=0
Y
N
M/N is the number of bits (dots) that parameter 1 (P1)
is incremented/decremented by.
Figure 21. Horizontal scrolling
8.4. Drawing Control Commands
8.4.1. CSRW
The 16-bit cursor address register contains the display
memory address of the data at the cursor position as
shown in Figure 22.
Note that the microprocessor cannot directly access the
display memory.
The MREAD and MWRITE commands use the address
in this register.
MSB
LSB
C
0
1
0
0
0
1
1
0
P1
A7
A6
A5
A4
A3
A2
A1
A0 (CSRL)
P2
A15 A14 A13 A12 A11 A10
A9
A8 (CSRH)
Figure 22. CSRW parameters
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Technical Manual
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37
INSTRUCTION SET
The cursor address register can only be modified by the
CSRW command, and by the automatic increment after
an MREAD or MWRITE command. It is not affected by
display scrolling.
If a new address is not set, display memory accesses will
be from the last set address or the address after previous
automatic increments.
8.4.2. CSRR
Reads from the cursor address register. After issuing the
command, the data read address is read twice, for the low
byte and then the high byte of the register.
MSB
LSB
C
0
1
0
0
0
1
1
1
P1
A7
A6
A5
A4
A3
A2
A1
A0 (CSRL)
P2
A15 A14 A13 A12 A11 A10
A9
A8 (CSRH)
Figure 23. CSRR parameters
8.5. Memory Control Commands
8.5.1. MWRITE
The microprocessor may write a sequence of data bytes
to display memory by issuing the MREAD command and
then writing the bytes to the SED1335 series. There is no
need for further MWRITE commands or for the micro-
processor to update the cursor address register after each
byte as the cursor address is automatically incremented
by the amount set with CSRDIR, in preparation for the
next data write.
MSB
C
0
LSB
1
0
0
0
0
1
0
P1
P2
n≥1
Pn
Figure 24. MWRITE parameters
Note:
P1, P2, ..., Pn: display data.
38
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SED1335 Series
Technical Manual
INSTRUCTION SET/TV MODE
8.5.2. MREAD
Puts the SED1335 series into the data output state.
Each time the microprocessor reads the buffer, the cursor
address is incremented by the amount set by CSRDIR and
the next data byte fetched from memory, so a sequence of
data bytes may be read without further MREAD commands or by updating the cursor address register.
If the cursor is displayed, the read data will be from two
positions ahead of the cursor.
MSB
C
0
LSB
1
0
0
0
0
1
1
P1
P2
n≥1
Pn
Figure 25. MREAD parameters
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Technical Manual
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DISPLAY CONTROL FUNCTIONS
9. DISPLAY CONTROL FUNCTIONS
9.1. Character Configuration
The origin of each character bitmap is in the top left
corner as shown in Figure 29. Adjacent bits in each byte
are horizontally adjacent in the corresponding character
image.
Although the size of the bitmap is fixed by the character
generator, the actual displayed size of the character field
can be varied in both dimensions.
Character starting point
FX
D7
Character
height
FY
Space
Character width
to
D0
R0
0
1
1
1
0
0
0
0
R1
1
0
0
0
1
0
0
0
R2
1
0
0
0
1
0
0
0
R3
1
0
0
0
1
0
0
0
R4
1
1
1
1
1
0
0
0
R5
1
0
0
0
1
0
0
0
R6
1
0
0
0
1
0
0
0
R7
0
0
0
0
0
0
0
0
R8
0
0
0
0
0
0
0
0
R9
0
0
0
0
0
0
0
0
R10
0
0
0
0
0
0
0
0
R11
0
0
0
0
0
0
0
0
R12
0
0
0
0
0
0
0
0
R13
0
0
0
0
0
0
0
0
R14
0
0
0
0
0
0
0
0
R15
0
0
0
0
0
0
0
0
Space
data
Space
data
Space
Figure 26. Example of character display ([FX] ≤ 8) and generator bitmap
If the area outside the character bitmap contains only
zeros, the displayed character size can easily be increased
by increasing FX and FY, as the zeros ensure that the
extra space between displayed characters is blank.
40
The displayed character width can be set to any value up
to 16 even if each horizontal row of the bitmap is two
bytes wide.
EPSON
SED1335 Series
Technical Manual
DISPLAY CONTROL FUNCTIONS
Horizontal
non-display
area
FX
Character
Height
FY
16 dots
Space
Vertical
non-display
area
8 dots
8 dots
Character width
Space
Figure 27. Character width greater than one byte wide ([FX] = 9)
Note: The SED1335 series does not automatically insert spaces between characters. If the displayed character size is
8 pixels or less and the space between character origins is nine pixels or more, the bitmap must use two bytes per row,
even though the character image requires only one.
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41
DISPLAY CONTROL FUNCTIONS
9.2. Screen Configuration
9.2.1. Screen configuration
The basic screen configuration of the SED1335 series is
as a single text screen or as overlapping text and graphics
screens. The graphics screen uses eight times as much
display memory as the text screen.
Figure 28 shows the relationship between the virtual
screens and the physical screen.
A/P
C/R
0000H
Character
memory area
0800H
07FFH
Display
memory
window
Graphics
memory area
47FFH
(0,YM)
(XW,YM)
(X,Y)
(XM,YM)
Y
(0,0)
X
(XM,0)
Figure 28. Virtual and physical screen relationship
9.2.2. Display address scanning
The SED1335 series scans the display memory in the
same way as a raster scan CRT screen. Each row is
scanned from left to right until the address range equals
C/R. Rows are scanned from top to bottom.
In graphics mode, at the start of each line, the address
counter is set to the address at the start of the previous line
plus the address pitch, AP.
42
In text mode, the address counter is set to the same start
address, and the same character data is read, for each row
in the character bitmap. However, a new row of the
character generator output is used each time. Once all the
rows in the character bitmap have been displayed, the
address counter is set to the start address plus AP and the
next line of text is displayed.
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SED1335 Series
Technical Manual
DISPLAY CONTROL FUNCTIONS
1
•
•
•
8
9
•
•
•
16
17
•
•
•
24
•
•
•
•
SAD
SAD + 1
SAD + 2
SAD + C/R
SAD + AP
SAD + AP
+1
SAD + AP
+2
SAD + AP
+ C/R
SAD + 2AP
C/R
W/S = 0, FX = 8, FY = 8
Figure 29. Character position parameters
Note: One byte of display memory corresponds to one character.
1
SAD
SAD +1
SAD + 2
SAD + C/R
2
SAD + AP
SAD + AP
+1
SAD + AP
+2
SAD + AP
+ C/R
3
SAD + 2AP
Line 1
SAD
SAD +1
SAD + 2
AP
•
•
•
•
•
•
•
•
SAD + C/R
Line 2
SAD + AP
SAD + AP + 1
AP
SAD + AP + C/R
SAD + 2AP
Line 3
C/R
W/S = 0, FX = 8
Figure 30. Character parameters vs. memory
Note: One bit of display memory corresponds to one pixel.
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DISPLAY CONTROL FUNCTIONS
1
SAD1
SAD1 + 1
SAD1 + 2
SAD1 + C/R
SAD1 + AP
SAD1 + AP
+1
SAD1 + AP
+2
SAD1 + AP
+ C/R
SAD3 + 2
SAD3 + C/R
SAD3 + AP
+2
SAD3 + AP
+ C/R
•
•
•
8
9
•
•
•
16
17
SAD1 + 2AP
•
•
•
24
25
•
•
•
(L/F)/2 = β
β+1
SAD3 + 1
•
•
•
β+8
β+9
SAD3 + AP
•
SAD3 + AP
+1
•
•
β + 16
β + 17
SAD3 + 2AP
•
•
•
β + 24
β + 25
•
•
•
•
(L/F)
C/R
W/S = 1, FX = 8, FY = 8
Figure 31. Two-panel display address indexing
Note
In two-panel drive, the SED1335 series reads line 1 and line β + 1 as one cycle. The upper and lower panels
are thus read alternately, one line at a time.
44
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SED1335 Series
Technical Manual
DISPLAY CONTROL FUNCTIONS
9.2.3. Display scan timing
Figure 32 shows the basic timing of the SED1335 series.
One display memory read cycle takes nine periods of the
system clock, φ0 (fOSC ). This cycle repeats (C/R + 1)
times per display line.
When reading, the display memory pauses at the end of
each line for (TC/R - C/R) display memory read cycles,
though the LCD drive signals are still generated. TC/R
may be set to any value within the constraints imposed by
C/R, fOSC , fFR , and the size of the LCD panel, and it may
be used to fine tune the frame frequency. The microprocessor may also use this pause to access the display
memory data.
φ0
T0
T1
Display read cycle interval
T2
VCE
Character read interval
Character generator
read interval
Graphics read interval
VA
Figure 32. Display memory basic read cycle
Display period
TC/R
Divider frequency
period
C/R
Frame
period
Line 1
O
R
2
O
R
3
O
R
•
•
•
•
•
(L/F)
O
R
LP
Figure 33. Relationship between TC/R and C/R
Note: The divider adjustment interval (R) applies to both the upper and lower screens even if W/S = 1. In this case, LP is active
only at the end of the lower screen’s display interval.
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DISPLAY CONTROL FUNCTIONS
9.3. Cursor Control
9.3.1. Cursor register function
The SED1335 series cursor address register functions as
both the displayed cursor position address register and
the display memory access address register. When accessing display memory outside the actual screen memory,
the address register must be saved before accessing the
memory and restored after memory access is complete.
Although the cursor is normally displayed for character
data, the SED1335 series may also display a dummy
cursor for graphical characters. This is only possible if the
graphics screen is displayed, the text screen is turned off
and the microprocessor generates the cursor control address.
D=1
Cursor display
address register
FC1 = 0
Cursor register
Cursor ON
FC0 = 1
Address pointer
Figure 34. Cursor addressing
FP1 = 0
Note that the cursor may disappear from the display if the
cursor address remains outside the displayed screen
memory for more than a few hundred milliseconds.
FP0 = 0
9.3.2. Cursor movement
FP3 = 0
On each memory access, the cursor address register
changes by the amount previously specified with CSRDIR,
automatically moving the cursor to the desired location.
FP2 = 1
Block screen 2 (graphics
screen) ON
Figure 35. Cursor display layers
9.3.3. Cursor display layers
Although the SED1335 series can display up to three
layers, the cursor is displayed in only one of these layers:
Two-layer configuration: First layer (L1)
Three-layer configuration: Third layer (L3)
The cursor will not be displayed if it is moved outside the
memory for its layer. Layers may be swapped or the
cursor layer moved within the display memory if it is
necessary to display the cursor on a layer other than the
present cursor layer.
46
Block screen 1 (character
screen) OFF
Consider the example of displaying Chinese characters
on a graphics screen. To write the display data, the cursor
address is set to the second screen block, but the cursor is
not displayed. To display the cursor, the cursor address is
set to an address within the blank text screen block.
Since the automatic cursor increment is in address units,
not character units, the controlling microprocessor must
set the cursor address register when moving the cursor
over the graphical characters.
EPSON
SED1335 Series
Technical Manual
DISPLAY CONTROL FUNCTIONS
8 dots 8 dots
8 dots 8 dots
Block cursor
18 dots
Auto shift
Auto shift
Auto shift
Cursor address preset
Figure 36. Cursor movement
If no text screen is displayed, only a bar cursor can be
displayed at the cursor address.
If the first layer is a mixed text and graphics screen and the
cursor shape is set to a block cursor, the SED1335 series
SED1335 Series
Technical Manual
automatically decides which cursor shape to display. On
the text screen it displays a block cursor, and on the
graphics screen, a bar cursor.
EPSON
47
DISPLAY CONTROL FUNCTIONS
9.4. Memory to Display Relationship
The SED1335 series supports virtual screens that are
larger than the physical size of the LCD panel address
range, C/R. A layer of the SED1335 series can be considered as a window in the larger virtual screen held in
display memory. This window can be divided into two
blocks, with each block able to display a different portion
of the virtual screen.
This enables, for example, one block to dynamically
scroll through a data area while the other acts as a status
message display area. See Figure 37 and 38.
AP
C/R
SAD1
W/S = 0
SAD3
Character page 1
SAD1
Character page 3
SAD3
Display page 1
W/S = 1
Display page 1
Display page 3
SAD2
Layer 1
SAD4
Graphics page 2
SAD2
Layer 1
Graphics page 2
SAD4
Display page 2
Display page 2
Display page 4
C/R
Layer 2
Layer 2
CG RAM
SAD1
C/R
Character page 1
SAD1
Display page 1
SAD3
Display page 3
C/R
SAD3 Character page 3
Layer 1
SAD2
C/R
SAD2
Display page 2
Graphics page 2
Layer 2
SAD3
C/R
Graphics page 3
C/R
SAD3
SAD2
SAD1
Display page 3
SAD2
Graphics page 2
Display page 2
Display page 1
C/R
SAD1
Layer 1
Graphics page 1
Layer 2
Layer 3
Figure 37. Display layers and memory
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SED1335 Series
Technical Manual
DISPLAY CONTROL FUNCTIONS
AP
0000H
SAD1
FX
FY
CRY
CSRA
CRX
Display
window
L/F
Virtual display
memory limit
C/R
FX = Horizontal character field ≤ 16 dots
FY = Vertical character field ≤ 16 dots
CRX = Horizontal cursor size ≤ 16 dots
CRY = Vertical cursor size ≤ 16 dots
C/R = Characters per row ≤ 240 bytes
L/F = Lines per frame ≤ 256 bytes
AP = Address pitch ≤ 64 Kbytes
FFFFH
Figure 38. Display window and memory
SED1335 Series
Technical Manual
EPSON
49
50
Back layer
Character
code
SAG
SAD2
SAD1
EPSON
F000
4A00
4800
4440
2800
2000
SL2
0800
0300
0400
SL1
0000
D7
Character generator
ROM
Not used
Character generator
RAM
Page 2
Page 1
Page 2
Page 1
to
D0
to
01110000
10001000
10001000
10001000
11111000
10001000
10001000
00000000
D0
1FFF
0080
02FF
0000
#4800
1
2
3
4
5
6
#4807
D0
Example of character A
70
88
88
88
F8
88
88
00
HEX D7
χ
γ
β
α
Y
X
C
B
A (Code)
D7
(MSB)
D7
ABC
α
Magnified image
(LSB)(MSB)
D0 D7
Display
XY
β
(LSB)
D0
DISPLAY CONTROL FUNCTIONS
Figure 39. Memory map and magnified characters
SED1335 Series
Technical Manual
DISPLAY CONTROL FUNCTIONS
9.5. Scrolling
The controlling microprocessor can set the SED1335
series scrolling modes by overwriting the scroll address
registers SAD1 to SAD4, and by directly setting the
scrolling mode and scrolling rate.
Since the SED1335 series does not automatically erase
the bottom line, it must be erased with blanking data when
changing the scroll address register.
9.5.1. On-page scrolling
The normal method of scrolling within a page is to move
the whole display up one line and erase the bottom line.
Display memory
AP
C/R
Before scrolling
ABC
SAD1
WXYZ
ABC
WXYZ
789
789
SAD3
After scrolling
WXYZ
789
Blank
SAD1
WXYZ
789
Blank
Figure 40. On-page scrolling
9.5.2. Inter-page scrolling
Scrolling between pages and page switching can be
performed only if the display memory capacity is greater
than one screen.
Display memory
AP
C/R
Before scrolling
After scrolling
ABC
SAD1
WXYZ
789
WXYZ
789
ABC
WXYZ
SAD1
789
ABC
WXYZ
789
Figure 41. Inter-page scrolling
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DISPLAY CONTROL FUNCTIONS
9.5.3. Horizontal scrolling
The display can be scrolled horizontally in one-character
units, regardless of the display memory capacity.
Display memory
Display
Before scrolling
ABC
123
XYZ
SAD1
ABC
123
XYZ
AP
C/R
After scrolling
BC
23
XYZ1
SAD1
ABC
123
XYZ
Figure 42. Horizontal wraparound scrolling
52
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SED1335 Series
Technical Manual
DISPLAY CONTROL FUNCTIONS
9.5.4. Bidirectional scrolling
Bidirectional scrolling can be performed only if the
display memory is larger than the physical screen both
horizontally and vertically. Although scrolling is normally done in single-character units, the HDOT SCR
command can be used to scroll horizontally in pixel units.
Single-pixel scrolling both horizontally and vertically
can be performed by using the SCROLL and HDOT SCR
commands. See Section 16.4
Display memory
Before scrolling
AP
BC
EFG
TUV
12
A BC
EFG
TUV
C/R
After scrolling
FG
TUV
12 34
567
89
ABC
E FG
TUV
1234
56
1234
56 7
89
Figure 43. Bidirectional scrolling
9.5.5. Scroll units
Tale 19. Scroll units
Mode
Vertical
Text
Characters
Graphics
Pixels
Horizontal
Pixels or
characters
Pixels
Note that in a divided screen, each block cannot be independently scrolled horizontally in pixel units.
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53
CHARACTER GENERATOR
10. CHARACTER GENERATOR
10.1. CG Characteristics
10.1.1. Internal character generator
10.1.3. Character generator RAM
The internal character generator is recommended for
minimum system configurations containing a SED1335
series, display RAM, LCD panel, single-chip microprocessor and power supply. Since the internal character
generator uses a CMOS mask ROM, it is also recommended for low-power applications.
• 5 × 7-pixel font (See Section 17.)
• 160 JIS standard characters
• Can be mixed with character generator RAM (maximum of 64 CG RAM characters)
• Can be automatically spaced out up to 8 × 16 pixels
The user can freely use the character generator RAM for
storing graphics characters. The character generator RAM
can be mapped by the microprocessor anywhere in display memory, allowing effective use of unused address
space.
• Up to 8 × 8-pixel characters (M2 = 0) or 8 × 16
characters (M2 = 1)
• Up to 256 characters if mapped at F000H to FFFFH
(64 if used together with character generator ROM)
• Can be mapped anywhere in display memory address
space if used with the character generator ROM
• Mapped into the display memory address space at
F000H to F7FFH if not used with the character generator ROM (more than 64 characters are in the CG
RAM). Set SAG0 to F000H and M1 to zero when
defining characters number 193 upwards.
10.1.2. External character generator ROM
The external CG ROM can be used when fonts other than
those in the internal ROM are needed. Data is stored in the
external ROM in the same format used in the internal
ROM. (See Section 10.3.)
• Up to 8 × 8-pixel characters (M2 = 0) or 8 × 16-pixel
characters (M2 = 1)
• Up to 256 characters (192 if used together with the
internal ROM)
• Mapped into the display memory address space at
F000H to F7FFH (M2 = 0) or F000H to FFFFH (M2
= 1)
• Characters can be up to 8 × 16-pixels; however, excess
bits must be set to zero.
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CHARACTER GENERATOR
10.2. CG Memory Allocation
Since the SED1335 series uses 8-bit character codes, it
can handle no more than 256 characters at a time. However, if a wider range of characters is required, character
generator memory can be bank-switched using the
CGRAM ADR command.
Built–in CG ROM
(160 characters,
5 × 7 pixels max)
M0 = 1
CG RAM n
CG RAM 2
CG RAM
CG RAM 1
SAG
(64 characters max, 8 × 16 pixels max)
Basic CG space
(256 characters,
8 × 16 pixels max)
256 characters max
M1 = 0
CG RAM
CG ROM
M0 = 1
256 characters max
M1 = 0
Built-in CG ROM
(160 characters,
5 × 7 pixels max)
CG RAM n
CG RAM 2
CG RAM
ADR
CG RAM
CG RAM 1
(64 characters max, 8 × 16 pixels max)
Figure 44. Internal and external character mapping
Note that there can be no more than 64 characters per bank.
Table 20. Character mapping
Item
Parameter
Internal/external character generator selection
1 to 8 pixels
M0
M2 = 0
Character field height
M2 = 1
Graphics mode (8 bits × 1 line)
9 to 16 pixels
Greater than 16 pixels
Internal CG ROM/RAM select
External CG ROM/RAM select
CG RAM bit 6 correction
CG RAM data storage address
External CG ROM
address
SED1335 Series
Technical Manual
192 characters or less
More than 192 characters
Automatic
Remarks
Determined by the
character code
M1
Specified with CG RAM ADR
Can be moved anywhere in the
command
display memory address space
Other than the area of Figure 49
Set SAG to F000H and overly
SAG and the CG ROM table
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55
CHARACTER GENERATOR
10.3. Setting the Character Generator Address
The CG RAM addresses in the VRAM address space are
not mapped directly from the address in the SAG register.
The data to be displayed is at a CG RAM address
calculated from SAG + character code + ROW select
address. This mapping is shown in Table 21 and 22.
Table 21. Character fonts, number of lines ≤ 8 (M2 = 0, M1 = 0)
SAG
A15 A14 A13 A12 A11 A10
Character code
+ROW select address
0
0
CG RAM address
0
0
0
0
0
0
0
0
D7
0
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
D6
0
D5
0
D4
0
D3
0
D2
0
D1
0
D0
0
0
R2
0
R1
0
R0
VA15 VA14 VA13 VA12 VA11 VA10 VA9 VA8 VA7 VA6 VA5 VA4 VA3 VA2 VA1 VA0
Table 22. Character fonts, 9 ≤ number of lines ≤ 16 (M2 = 1, M1 = 0)
SAG
Character code
0
0
0
0
D7
D6
A9
D5
A8
D4
A7
D3
A6
D2
A5
D1
A4
D0
A3
0
A2
0
A1
0
A0
0
0
0
0
0
0
0
0
0
0
0
0
0
R3
R2
R1
R0
A15 A14 A13 A12 A11 A10
+ROW select address
CG RAM address
VA15 VA14 VA13 VA12 VA11 VA10 VA9 VA8 VA7 VA6 VA5 VA4 VA3 VA2 VA1 VA0
Row
R3
R2
R1
R0
Row 0
0
0
0
0
Row 1
0
0
0
1
Row 2
0
0
1
0
Line 1
Line 2
Row 7
0
1
1
1
Row 8
1
0
0
0
Row 14
1
1
1
0
Row 15
1
1
1
1
Figure 45. Row select address
Note: Lines = 1: lines in the character bitmap ≤ 8
Lines = 2: lines in the character bitmap ≥ 9
10.3.1. M1 = 1
The SED1335 series automatically converts all bits set in
bit 6 of character code for CG RAM 2 to zero. Because of
this, the CG RAM data areas become contiguous in
display memory.
56
When writing data to CG RAM:
• Calculate the address as for M1 = 0.
• Change bit 6 of the character code from “1” to “0”.
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SED1335 Series
Technical Manual
CHARACTER GENERATOR
10.3.2. CG RAM addressing example
• Define a pattern for the “A” in Figure 26.
• The CG RAM table start address is 4800H.
• The character code for the defined pattern is 80H (the
first character code in the CG RAM area).
As the character code table in Figure 46 shows, codes
80H to 9FH and E0H to FFH are allocated to the CG RAM
and can be used as desired. 80H is thus the first code for
CG RAM. As characters cannot be used if only using
graphics mode, there is no need to set the CG RAM data.
Table 23. Character data example
CGRAM AD
5CH
P1
P2
00H
40H
Reverse the CG RAM address calculation to calculate SAG
CSRDIR
4CH
Set cursor shift direction to right
CSRW
P1
P2
46H
00H
48H
CG RAM start address is 4800H
MWRITE
P
P2
42H
70H
88H
Write ROW 0 data
P3
88H
P4
P5
88H
F8H
P6
88H
P7
P8
P8
88H
00H
00H
↓
P16
↓
00H
SED1335 Series
Technical Manual
Write ROW 1 data
Write ROW 2 data
Write ROW 3 data
Write ROW 4 data
Write ROW 5 data
Write ROW 6 data
Write ROW 7 data
Write ROW 8 data
↓
Write ROW 15 data
EPSON
57
CHARACTER GENERATOR
10.4. Character Codes
The following figure shows the character codes and the
codes allocated to CG RAM. All codes can be used by the
CG RAM if not using the internal ROM.
Upper 4 bits
Lower 4 bits
0
1
2
0
3
4
5
6
7
0 @ P
'
p
1
!
1
A Q
a
q
2
"
2
B
R
b
r
3
#
3
C
S
c
s
4
$
4
D
T
d
t
5
% 5
E
U
e
u
6
&
6
F
V
f
v
7
'
7
G W g
w
8
(
8
H
X
h
x
9
)
9
I
Y
i
y
A
*
:
J
Z
j
z
B
+
;
K
[
k
{
C
,
<
L
¥
l
|
D
.
=
M
]
m
}
E
-
>
N
^
n →
F
/
?
O
_
o ←
8
9
A
CG RAM1
B
C D
E
F
CG RAM2
M1 = 0
M1 = 1
Figure 46. On-chip character codes
58
EPSON
SED1335 Series
Technical Manual
MICROPROCESSOR INTERFACE
11. MICROPROCESSOR INTERFACE
11.1. System Bus Interface
SEL1, SEL2, A0, RD, WR and CS are used as control
signals for the microprocessor data bus. A0 is normally
connected to the lowest bit of the system address bus.
SEL1 and SEL2 change the operation of the RD and WR
pins to enable interfacing to either an 8080 or 6800 family
bus, and should have a pull-up or pull-down resistor.
With microprocessors using an 8080 family interface, the
SED1335 series is normally mapped into the I/O address
space.
11.1.1. 8080 series
Table 24. 8080 series interface signals
A0 RD WR
Function
0
0
1 Status flag read
Display data and cursor address
1
0
1
read
0
1
0 Display data and parameter write
1
1
0 Command write
11.2.1. Display status indication output
When CS, A0 and RD are LOW, D6 functions as the
display status indication output. It is HIGH during the
TV-mode vertical retrace period or the LCD-mode horizontal retrace period, and LOW, during the period the
controller is writing to the display. By monitoring D6 and
writing to the data memory only during retrace periods,
the display can be updated without causing screen flicker.
11.2.2. Internal register access
The SYSTEM SET and SLEEP IN commands can be
used to perform input/output to the SED1335 series
independently of the system clock frequency. These are
the only commands that can be used while the SED1335
series is in sleep mode.
11.1.2. 6800 series
Table 25. 6800 series interface signals
A0 R/W E
Function
0
1
1 Status flag read
Display data and cursor address
1
1
1
read
0
0
1 Display data and parameter write
1
0
1 Command write
11.2.3. Display memory access
11.2. Microprocessor Synchronization
The SED1335 series interface operates at full bus speed,
completing the execution of each command within the
cycle time, tCYC . The controlling microprocessor’s performance is thus not hampered by polling or handshaking
when accessing the SED1335 series.
SED1335 Series
Technical Manual
Display flicker may occur if there is more than one
consecutive access that cannot be ignored within a frame.
The microprocessor can minimize this either by performing these accesses intermittently, or by continuously
checking the status flag (D6) and waiting for it to become
HIGH.
The SED1335 series supports a form of pipelined processing, in which the microprocessor synchronizes its
processing to the SED1335 series timing. When writing,
the microprocessor first issues the MWRITE command.
It then repeatedly writes display data to the SED1335
series using the system bus timing. This ensures that the
microprocessor is not slowed down even if the display
memory access times are slower than the system bus
access times. See Figure 47.
When reading, the microprocessor first issues the MREAD
command, which causes the SED1335 series to load the
first read data into its output buffer. The microprocessor
then reads data from the SED1335 series using the system
bus timing. With each read, the SED1335 series reads the
next data item from the display memory ready for the next
read access. See Figure 48.
EPSON
59
MICROPROCESSOR INTERFACE
tCYC
WR
Microprocessor
Command write
Data write
Data write
D0 to D7
VR/W
VRW
Display memory
VD0 to VD7
Figure 47. Display memory write cycle
WR
tCYC
Command write
Microprocessor
RD
Data read
Data read
D0 to D7
VR/W
VRW
Display memory
VD0 to VD7
Figure 48. Display memory read cycle
Note
A possible problem with the display memory read cycle is that the system bus access time, tACC, does not
depend on the display memory access time, tACV. The microprocessor may only make repeated reads if the
read loop time exceeds the SED1335 series cycle time, tCYC. If it does not, NOP instructions may be inserted
in the program loop. tACC, tACV and tCYC limits are given in section 6.2.
60
EPSON
SED1335 Series
Technical Manual
MICROPROCESSOR INTERFACE
11.3. Interface Examples
11.3.1. Z80 to SED1335 series interface
IORQ
A0
A1
to
A15
Z80®
A0
Decoder
CS
SED1335
series
D0
to
D7
D0
to
D7
RD
RD
SEL 1
WR
WR
SEL 2
RES
RESET
RESET
Figure 49. Z80® to SED1335 series interface
Note: Z80® is a registered trademark of Zilog Corporation.
11.3.2. 6802 to SED1335 series interface
VMA
A0
A1
to
A15
6802
A0
Decoder
CS
SED1335
series
D0
to
D7
D0
to
D7
E
RD
SEL 1
R/W
WR
SEL 2
RESET
VDD
RES
RESET
Figure 50. 6802 to SED1335 series interface
SED1335 Series
Technical Manual
EPSON
61
DISPLAY MEMORY INTERFACE
12. DISPLAY MEMORY INTERFACE
12.1. Static RAM
The figure below shows the interface between an 8K × 8
static RAM and the SED1335 series. Note that bus
buffers are required if the bus is heavily loaded.
• SED1335F
Note
VA0 to VA12
A0 to A12
HC138
VA13 to VA15
A-C
Y
CE1
VDD
CE2 2764-pin
compatible
memory
SED1335
WRD
OE
VWR
VD0 to VD7
WE
I/O1 to I/O8
Note
Figure 51. Static RAM interface
Note: If the bus load is too much, use a bus buffer.
62
EPSON
SED1335 Series
Technical Manual
DISPLAY MEMORY INTERFACE/OSCILLATOR CIRCUIT/STATUS FLAG
12.2. Supply Current during Display Memory Access
The 24 address and data lines of the SED1335 series cycle
at one-third of the oscillator frequency, fOSC. The charge
and discharge current on these pins, IVOP, is given by the
equation below. When IVOP exceeds I OPR, it can be
estimated by:
IVOP ∝ C V f
where C is the capacitance of the display memory bus, V
is the operating voltage, and f is the operating frequency.
If VOPR = 5.0V, f = 1.0 MHz, and the display memory bus
capacitance is 1.0 pF per line:
IVOP ≤ 120 µA / MHz × pF
To reduce current flow during display memory accesses,
it is important to use low-power memory, and to minimize both the number of devices and the parasitic capacitance.
13. OSCILLATOR CIRCUIT
The SED1335 series incorporates an oscillator circuit. A
stable oscillator can be constructed simply by connecting
an AT-cut crystal and two capacitors to XG and XD, as
shown in the figure below. If the oscillator frequency is
increased, CD and CG should be decreased proportionally.
Note that the circuit board lines to XG and XD must be as
short as possible to prevent wiring capacitance from
changing the oscillator frequency or increasing the power
consumption.
SED1335 series
XG
XD
CD = 3 to 20 pF
CG
CD
CG = 2 to 18 pF
Load impedance = 700 Ω (max)
Figure 52. Crystal oscillator
14. STATUS FLAG
The SED1335 series has a single bit status flag.
D6: X line standby
D7
D0
X D6
X
X
X
X
X
X
X: Don’t care
The D6 status flag is HIGH for the TC/R-C/R cycles at the
end of each line where the SED1335 series is not reading
the display memory. The microprocessor may use this
period to update display memory without affecting the
display, however it is recommended that the display be
turned off when refreshing the whole display.
Figure 53. Status flag
LP
tTC/R
tm
tC/R
XSCL
Figure 54. C/R to TC/R time difference
CS
A0
RD
0
0
0
SED1335 Series
Technical Manual
D6 (flag)
0: Period of retrace lines
1: Period of display
EPSON
63
STATUS FLAG
Read Status Flag
No
D6 = 0?
Yes
Data Input
No
Data Input ?
Yes
Figure 55. Flowchart for busy flag checking
<Timing To Be Observed For Avoiding SED 1330 Series Write Noise>
• Precaution on the write timing to VRAM
LP
XSCL
5 × 9 × tOSC
Display memory write time
2 × 9 × tOSC
The allowable writing duration is since “5 × 9 × tOSC” has elapsed (tOSC = 1/fOSC: a cycle of the
oscillation frequency) from the positive going edge of LP up to {(TCR) – (C/R) – 7} × 9 × tOSC.
Currently employed D6 status flag reading method does
not identify the timing when the read D6 = Low took
place. Thus, negative going edge of LP should be used as
the interrupt signal when implementing the writing in
64
above timing.
If you try to access the display memory in other timing
than the above, flickering of the display screen will result.
EPSON
SED1335 Series
Technical Manual
RESET/APPLICATION NOTES
15. RESET
VDD
1ms reset pulse
RES
0.7 VDD
0.3 VDD
Figure 56. Reset timing
The SED1335 series requires a reset pulse at least 1 ms
long after power-on in order to re-initialize its internal
state.
For maximum reliability, it is not recommended to apply
a DC voltage to the LCD panel while the SED1335 series
is reset. Turn off the LCD power supplies for at least one
frame period after the start of the reset pulse.
The SED1335 series cannot receive commands while it is
reset. Commands to initialize the internal registers should
be issued soon after a reset.
During reset, the LCD drive signals XD, LP and FR are
halted.
A delay of 3 ms (maximum) is required following the
rising edges of both RES and VDD to allow for system
stabilization.
16. APPLICATION NOTES
16.1. Initialization Parameters
The parameters for the initialization commands must be
determined first. Square brackets around a parameter
name indicate the number represented by the parameter,
rather than the value written to the parameter register. For
example, [FX] = FX + 1.
16.1.1. SYSTEM SET instruction and
parameters
❒ FX
The horizontal character field size is determined from
the horizontal display size in pixels [VD] and the
number of characters per line [VC].
[VD] / [VC] ≤ [FX]
❒ C/R
C/R can be determined from VC and FX.
[C/R] = RND ([FX] / 8) × [VC]
where RND(x) denotes × rounded up to the next
highest integer. [C/R] is the number of bytes per line,
not the number of characters.
SED1335 Series
Technical Manual
❒ TC/R
TC/R must satisfy the condition [TC/R] ≥ [C/R] + 4.
❒ fOSC and fFR
Once TC/R has been set, the frame frequency, fFR, and
lines per frame [L/F] will also have been set. The
lower limit on the oscillator frequency fOSC is given
by:
fOSC ≥ ([TC/R] × 9 + 1) × [L/F] × fFR
❒ If no standard crystal close to the calculated value of
fOSC exists, a higher frequency crystal can be used and
the value of TC/R revised using the above equation.
❒ Symptoms of an incorrect TC/R setting are listed
below. If any of these appears, check the value of TC/
R and modify it if necessary.
• Vertical scanning halts and a high-contrast horizontal line appears.
• All pixels are on or off.
• The LP output signal is absent or corrupted.
• The display is unstable.
EPSON
65
APPLICATION NOTES
Table 26. Epson LCD unit example parameters
Product name and
resolution (X × Y)
[FX]
[FY]
[C/R]
TC/R
fOSC (MHz)
See Note 2.
256 × 64
[FX] = 6 pixels:
256 / 6 = 42 remainder 4
= 4 blank pixels
8 or 16, depending
on the screen
[C/R] = 42 = 2AH bytes:
C/R = 29H. When using HDOT
SCR, [C/R] = 43 bytes
2DH
1.85
512 × 64
[FX] = 6 pixels:
512 / 6 = 85 remainder 2
= 2 blank pixels
8 or 16, depending
on the screen
[C/R] = 85 = 55H bytes:
C/R = 54H. When using HDOT
SCR, [C/R] = 86 bytes
58H
3.59
256 × 128
[FX] = 8 pixels:
256 / 8 = 32 remainder 0
= no blank pixels
8 or 16, depending
on the screen
[C/R] = 32 = 20H bytes:
C/R = 19H. When using HDOT
SCR, [C/R] = 33 bytes
22H
2.90
512 × 128
[FX] = 10 pixels:
512 / 10 = 51 remainder 2
= 2 blank pixels
8 or 16, depending
on the screen
[C/R] = 102 = 66H bytes:
C/R = 65H. When using HDOT
SCR, [C/R] = 103 bytes
69H
8.55
Notes:
1. The remainder pixels on the right-hand side of the display are automatically blanked by the SED1335F. There is no need to
zero the display memory corresponding to these pixels.
2. Assuming a frame frequency of 60 Hz.
16.1.2. Initialization example
The initialization example shown in Figure 57 is for a
SED1335 series with an 8-bit microprocessor interface
bus and an Epson EG4810S-AR display unit (512 × 128
pixels).
Start
Clear first
memory layer
Supply on
Clear second
memory layer
SYSTEM SET
CSRW
SCROLL
CSR FORM
HDOT SCR
DISP ON
OVLAY
Output display
data
DISP OFF
Figure 57. Initialization procedure
Note: Set the cursor address to the start of each screen’s layer memory, and use MWRITE to fill the memory with space
characters, 20H (text screen only) or 00H (graphics screen only). Determining which memory to clear is explained in section
16.1.3.
66
EPSON
SED1335 Series
Technical Manual
APPLICATION NOTES
Table 27. Initialization procedure
No.
1
2
3
Command
Power-up
Supply
SYSTEM SET
C = 40H
P1 = 38H
P2 = 87H
P3 = 07H
P4 = 3FH
P5 = 49H
4
P6 = 7FH
P7 = 80H
P8 = 00H
SCROLL
C = 44H
P1 = 00H
P2 = 00H
P3 = 40H
P4 = 00H
P5 = 10H
P6 = 40H
P7 = 00H
P8 = 04H
Operation
M0: Internal CG ROM
M1: CG RAM is 32 characters maximum
M2: 8 lines per character
W/S: Two-panel drive
IV: No top-line compensation
FX: Horizontal character size = 8 pixels
WF: Two-frame AC drive
FY: Vertical character size = 8 pixels
C/R: 64 display addresses per line
TC/R: Total address range per line = 90
fOSC = 6.0 MHz, fFR = 70 Hz
L/F: 128 display lines
AP: Virtual screen horizontal size is 128 addresses
First screen block start address
Set to 0000H
Display lines in first screen block = 64
Second screen block start address
Set to 1000H
Display lines in second screen block = 64
Third screen block start address
Set to 0400H
(continued)
SED1335 Series
Technical Manual
EPSON
67
APPLICATION NOTES
Table 27. Initialization procedure (continued)
No.
Command
P9 = 00H
P10 = 30H
Operation
Fourth screen block start address
Set to 3000H
Display memory
(SAD1) 0000H
(SAD3) 0400H
1st display memory page
2nd display memory page
0800H
(SAD2) 1000H
3rd display memory page
(SAD4) 3000H
4th display memory page
5000H
5
6
7
8
HDOT SCR
C = 5AH
P1 = 00H
OVLAY
C = 5BH
P1 = 01H
DISP ON/OFF
C = 58H
P1 = 56H
Clear data in first layer
Set horizontal pixel shift to zero
MX 1, MX 0: Inverse video superposition
DM 1: First screen block is text mode
DM 2: Third screen block is text mode
D: Display OFF
FC1, FC0: Flash cursor at 2 Hz
FP1, FP0: First screen block ON
FP3, FP2: Second and fourth screen blocks ON
FP5, FP4: Third screen block ON
Fill first screen layer memory with 20H (space character)
(continued)
68
EPSON
SED1335 Series
Technical Manual
APPLICATION NOTES
Table 27. Initialization procedure (continued)
No.
9
Command
Clear data in second layer
Operation
Fill second screen layer memory with 00H (blank data)
Display
Character code in every position
1st layer
Blank code in every position
2nd layer
10
11
12
CSRW
C = 46H
P1 = 00H
P2 = 00H
CSR FORM
C = 5DH
P1 = 04H
P2 = 86H
DISP ON/OFF
C = 59H
Set cursor to start of first screen block
CRX: Horizontal cursor size = 5 pixels
CRY: Vertical cursor size = 7 pixels
CM: Block cursor
Display ON
Display
13
CSR DIR
C = 4CH
Set cursor shift direction to right
(continued)
SED1335 Series
Technical Manual
EPSON
69
APPLICATION NOTES
Table 27. Initialization procedure (continued)
No.
14
Command
MWRITE
C = 42H
P1 = 20H
P2 = 45H
P3 = 50H
P4 = 53H
P5 = 4FH
P6 = 4EH
Operation
‘’
‘E’
‘P’
‘S’
‘O’
‘N’
EPSON
15
16
17
18
19
CSRW
C = 46H
P1 = 00H
P2 = 10H
CSR DIR
C = 4FH
MWRITE
C = 42H
P1 = FFH
↓
P9 = FFH
CSRW
C = 46H
P1 = 01H
P2 = 10H
MWRITE
C = 42H
Set cursor to start of second screen block
Set cursor shift direction to down
Fill in a square to the left of the ‘E’
EPSON
Set cursor address to 1001H
(continued)
70
EPSON
SED1335 Series
Technical Manual
APPLICATION NOTES
Table 27. Initialization procedure (continued)
No.
20
Command
P1 = FFH
↓
P9 = FFH
CSRW
Operation
Fill in the second screen block in the second column of line 1
Repeat operations 18 and 19 to fill in the background under
‘EPSON’
↓
Inverse display
29
MWRITE
EPSON
30
31
32
SED1335 Series
Technical Manual
CSRW
C = 46H
P1 = 00H
P2 = 01H
CSR DIR
C = 4CH
MWRITE
C = 42H
P1 = 44H
P2 = 6FH
P3 = 74H
P4 = 20H
P5 = 4DH
P6 = 61H
P7 = 74H
P8 = 72H
P9 = 69H
P10 = 78H
P11 = 20H
P12 = 4CH
P13 = 43H
P14 = 44H
Set cursor to line three of the first screen block
Set cursor shift direction to right
‘D’
‘o’
‘t’
‘’
‘M’
‘a’
‘t’
‘r’
‘i’
‘x’
‘’
‘L’
‘C’
‘D’
Inverse display
EPSON
EPSON
Dot matrix LCD
71
APPLICATION NOTES
16.1.3. Display mode setting example 1: combining text and graphics
❒ Conditions
• 320 × 200 pixels, single-panel drive (1/200 duty
cycle)
• First layer: text display
• Second layer: graphics display
• 8 × 8-pixel character font
• CG RAM not required
❒ Display memory allocation
• First layer (text): 320/8 = 40 characters per line,
200/8 = 25 lines. Required memory size = 40 × 25
= 1000 bytes.
• Second layer (graphics): 320/8 = 40 characters per
line, 200/1 = 200 lines. Required memory size = 40
× 200 = 8000 bytes.
03E8H
2nd graphics layer
(8000 bytes)
0000H
1st character layer
(1000 bytes)
2327H
03E7H
Figure 58. Character over graphics layers
❒ Register setup procedure
SCROLL
C = 44H
P1 = 00H
P2 = 00H
P3 = C8H
P4 = E8H
P5 = 03H
P6 = C8H
P7 = XH
P8 = XH
P9 = XH
P10 = XH
SYSTEM SET TC/R calculation
C = 40H
P1 = 30H
fOSC = 6 MHz
P2 = 87H
fFR = 70 Hz
P3 = 07H
P4 = 27H
(1/6) × 9 × [TC/R] × 200 = 1/70
P5 = 2FH
[TC/R] = 48, so TC/R = 2FH
P6 = C7H
P7 = 28H
P8 = 00H
72
EPSON
SED1335 Series
Technical Manual
APPLICATION NOTES
CSR FORM
C = 5DH
P1 = 04H
P2 = 86H
OVLAY
C = 5BH
P1 = 00H
DISP ON/OFF
C = 59H
P1 = 16H
HDOT SCR
C = 5AH
P1 = 00H
X=
Don’t care
16.1.4. Display mode setting example 2: combining graphics and graphics
❒ Conditions
• 320 × 200 pixels, single-panel drive (1/ 200 duty
cycle)
• First layer: graphics display
• Second layer: graphics display
❒ Display memory allocation
• First layer (graphics): 320/8 = 40 characters per
line, 200/1 = 200 lines. Required memory size = 40
× 200 = 8000 bytes.
• Second layer (graphics): 320/8 = 40 characters per
line, 200/1 = 200 lines. Required memory size =
8000 bytes.
1F40H
2nd graphics layer
(8000 bytes)
0000H
1st graphics layer
(8000 bytes)
3E7FH
1F3FH
Figure 59. Two-layer graphics
SED1335 Series
Technical Manual
EPSON
73
APPLICATION NOTES
❒ Register setup procedure
CSR FORM
C = 5DH
P1 = 07H
P2 = 87H
SYSTEM SET TC/R calculation
C = 40H
P1 = 30H
fOSC = 6 MHz
P2 = 87H
fFR = 70 Hz
P3 = 07H
P4 = 27H
(1/6) × 9 × [TC/R] × 200 = 1/70
P5 = 2FH
[TC/R] = 48, so TC/R = 2FH
P6 = C7H
P7 = 28H
P8 = 00H
HDOT SCR
C = 5AH
P1 = 00H
OVLAY
C = 5BH
P1 = 0CH
SCROLL
C = 44H
P1 = 00H
P2 = 00H
P3 = C8H
P4 = 40H
P5 = 1FH
P6 = C8H
P7 = XH
P8 = XH
P9 = XH
P10 = XH
74
DISP ON/OFF
C = 59H
P1 = 16H
X = Don’t care
EPSON
SED1335 Series
Technical Manual
APPLICATION NOTES
16.1.5. Display mode setting example 3: combining three graphics layers
❒ Conditions
• 320 × 200 pixels, single-panel drive (1/200 duty
cycle)
• First layer: graphics display
• Second layer: graphics display
• Third layer: graphics display
❒ Display memory allocation
• All layers (graphics): 320/8 = 40 characters per
line, 200/1 = 200 lines. Required memory size = 40
× 200 = 8000 bytes.
3E80H
3rd graphics layer
(8000 bytes)
1F40H
2nd graphics layer
(8000 bytes)
0000H
1st graphics layer
(8000 bytes)
5DBFH
3E7FH
1F3FH
Figure 60. Three-layer graphics
❒ Register setup procedure
SCROLL
C = 44H
P1 = 00H
P2 = 00H
P3 = C8H
P4 = 40H
P5 = 1FH
P6 = C8H
P7 = 80H
P8 = 3EH
P9 = XH
P10 = XH
SYSTEM SET TC/R calculation
C = 40H
fOSC = 6 MHz
P1 = 30H
P2 = 87H
fFR = 70 Hz
P3 = 07H
P4 = 27H
(1/6) × 9 × [TC/R] × 200 = 1/70
P5 = 2FH
[TC/R] = 48, so TC/R = 2FH
P6 = C7H
P7 = 28H
P8 = 00H
SED1335 Series
Technical Manual
EPSON
75
APPLICATION NOTES
CSR FORM
C = 5DH
P1 = 07H
P2 = 87H
OVLAY
C = 5BH
P1 = 1CH
DISP ON/OFF
C = 59H
P1 = 16H
HDOT SCR
C = 5AH
P1 = 00H
X = Don’t care
16.2. System Overview
Figure 61 shows the SED1335 series in a typical system.
The microprocessor issues instructions to the SED1335
series, and the SED1335 series drives the LCD panel and
may have up to 64KB of display memory. Since all of the
LCD control circuits are integrated onto the SED1335
series, few external components are required to construct
a complete medium- resolution liquid crystal display.
SED1335 series
Microprocessor
Character
generator
Display
address
control
External character
generator memory
Display memory
address bus
Display memory
Display memory
data bus
LCD unit
Driver
control
Driver bus
Main
memory
Data bus
Address bus
Control bus
X driver
Y driver
X driver
X driver
LCD panel
Figure 61. System block diagram
76
EPSON
SED1335 Series
Technical Manual
APPLICATION NOTES
16.3. System Interconnection
16.3.1. SED1335F
10MHz crystal
HC138
XG
A0
A1
to
A7
A0
Decoder
CS
IORQ
Microprocessor
D0
to
D7
D0
to
D7
RD
WR
RESET
VA13
to
VA15
VCE
VRD
VA0
to
VA12
SED1335F
A
B
C
Y7
Y6
to
Y0
CS7
CS6
to
CS0
VA12
A0 to A12 WE
A0 to A12 WE
CS1
CS1
(RAM1)
D0 to D7
(RAM2)
CS2
OE
A0 to A11
OE
(CGROM)
CS2
D0 to D7
OE
D0 to D7
CE
VD0
to
VD7
XECL
XSCL
LP
WF
YDIS
YD
YSCL
RESET
RD
WR
RES
XD0
to
XD3
XD
LAT
DI
INH
FR
YSCL
LCD
POFF
V3
V4
VREG
E0
FR
EI
E0
LP
XSCL
ECL
D0
to
D3
FR
EI
V2
SED1600F
FR
EI
E1
E0
LP
XSCL
ECL
DO
D0
to
D3
V1
LP
XSCL
ECL
D0
to
D3
Power
supply
converter
V5
LCD UNIT
Figure 62. System interconnection diagram
SED1335 Series
Technical Manual
EPSON
77
APPLICATION NOTES
The SED1335 series layered screens and flexible scrolling facilities support a range of display functions and
reduces the load on the controlling microprocessor when
displaying underlining, inverse display, text overlaid on
graphics or simple animation.
These facilities are supported by the SED1335 series
ability to divide display memory into up to four different
areas.
❒ Character code table
• Contains character codes for text display
• Each character requires 8 bits
• Table mapping can be changed by using the scroll
start function
❒ Graphics data table
• Contains graphics bitmaps
• Word length is 8 bits
• Table mapping can be changed
78
❒ CG RAM table
• Character generator memory can be modified by
the external microprocessor
• Character sizes up to 8 × 16-pixels (16 bytes per
character)
• Maximum of 64 characters
• Table mapping can be changed
❒ CG ROM table
• Used when the internal character generator is not
adequate
• Can be used in conjunction with the internal character generator and external character generator
RAM
• Character sizes up to 8 × 16-pixels (16 bytes per
character)
• Maximum of 256 characters
• Fixed mapping at F000H to FFFFH
EPSON
SED1335 Series
Technical Manual
APPLICATION NOTES
16.4. Smooth Horizontal Scrolling
Figure 63 illustrates smooth display scrolling to the left.
When scrolling left, the screen is effectively moving to
the right, over the larger virtual screen.
Instead of changing the display start address SAD and
shifting the display by eight pixels, smooth scrolling is
achieved by repeatedly changing the pixel-shift parameter of the HDOT SCR command. When the display has
been scrolled seven pixels, the HDOT SCR pixel-shift
parameter is reset to zero and SAD incremented by one.
Repeating this operation at a suitable rate gives the
appearance of smooth scrolling.
HDOT SCR
parameter
SAD
To scroll the display to the right, the reverse procedure is
followed.
When the edge of the virtual screen is reached, the
microprocessor must take appropriate steps so that the
display is not corrupted. The scroll must be stopped or the
display modified.
Note that the HDOT SCR command cannot be used to
scroll individual layers.
SAD + 1
P1 = 00H
SAD + 2
Magnified
AP
P1 = 01H
SAD = SAD
P1 = 02H
Display
C/R
P1 = 03H
Virtual screen
P1 = 07H
P1 = 00H
SAD = SAD + 1
Not visible
Visible
Figure 63. HDOT SCR example
Note: The response time of LCD panels changes considerably at low temperatures. Smooth scrolling under these conditions may
make the display difficult to read.
SED1335 Series
Technical Manual
EPSON
79
APPLICATION NOTES
16.5. Layered Display Attributes
SED1335 series incorporates a number of functions for
enhanced displays using monochrome LCD panels. It
allows the display of inverse characters, half-intensity
MX1
Attribute
MX0
0
1
1
1
0
0
1
1
0
0
0
1
0
0
0
1
1
1
Reverse
Half-tone
Local flashing
Ruled line
menu pads and flashing of selected screen areas. These
functions are controlled by the OVLAY and DISP ON/
OFF commands.
Combined layer display
2ndt layer display
1st layer display
IV
EPSON
IV
EPSON
ME
Yes, No
ME
Yes, No
BL
Error
BL
RL
LINE
RL
LINE
Error
LINE
LINE
Figure 64. Layer synthesis
A number of means can be used to achieve these effects,
depending on the display configuration. These are listed
below. Note, however, that not all of these can be used in
the one layer at the same time.
16.5.1. Inverse display
The first layer is text, the second layer is graphics.
1. CSRW, CSDIR, MWRITE
Write is into the graphics screen at the area to be
inverted.
2. OVLAY: MX0 = 1, MX1 = 0
Set the combination of the two layers to ExclusiveOR.
3. DISP ON/OFF: FP0 = FP1 = 1, FP1 = FP3 = 0.
Turn on layers 1 and 2.
SAD1
16.5.2. Half-tone display
The FP parameter can be used to generate half-intensity
display by flashing the display at 17 Hz. Note that this
mode of operation may cause flicker problems with
certain LCD panels.
16.5.2.1. Menu pad display
Turn flashing off for the first layer, on at 17 Hz for the
second layer, and combine the screens using the OR
function.
1. OVLAY: P1 = 00H
2. DISP ON/OFF: P1 = 34H
SAD2
Half-tone
AB
AB
+
1st layer
2nd layer
Combined layer display
Figure 65. Half-tone character and graphics
80
EPSON
SED1335 Series
Technical Manual
APPLICATION NOTES
16.5.2.2. Graph display
To present two overlaid graphs on the screen, configure
the display as for the menu bar display and put one graph
on each screen layer. The difference in contrast between
the half- and full-intensity displays will make it easy to
distinguish between the two graphs and help create an
attractive display.
1. OVLAY: P1 = 00H
2. DISP ON/OFF: P1 = 34H
16.5.3. Flashing areas
16.5.3.1 Small area
To flash selected characters, the MPU can alternately
write the characters as character codes and blank characters at intervals of 0.5 to 1.0 seconds.
16.5.3.2. Large area
Divide both layer 1 and layer 2 into two screen blocks
each, layer 2 being divided into the area to be flashed and
the remainder of the screen. Flash the layer 2 screen
block at 2 Hz for the area to be flashed and combine the
layers using the OR function.
ABC
ABC
XYZ
XYZ
Figure 66. Localized flashing
16.6. 16 × 16-dot Graphic Display
16.6.1. Command usage
16.6.2. Kanji character display
This example shows how to display 16 × 16-pixel
characters. The command sequence is as follows:
CSRW
Set the cursor address.
CSRDIR Set the cursor auto-increment direction.
MWRITE Write to the display memory.
The program for writing large characters operates as
follows:
1. The microprocessor reads the character data from its
ROM.
2. The microprocessor sets the display address and
writes to the VRAM. The flowchart is shown in
Figure 69.
SED1335 Series
Technical Manual
EPSON
81
APPLICATION NOTES
A0 = 0
A0 = 1
O8 O7 O6 O5 O4 O3 O2 O1
O8 O7 O6 O5 O4 O3 O2 O1
0H
1H
2H
3H
4H
5H
6H
7H
8H
9H
AH
BH
CH
DH
EH
FH
(1)
(3)
(5)
(7)
(9)
(11)
(13)
(15)
(17)
(19)
(21)
(23)
(25)
(27)
(29)
(31)
(2)
(4)
(6)
(8)
(10)
(12)
(14)
(16)
(18)
(20)
(22)
(24)
(26)
(28)
(30)
(32)
1st column
2nd column
CG ROM output
(n) shows the CG ROM data
readout order
(Kanji ROM pattern)
Scan address A1 to A4
(6)
(4)
(2)
(19)
(17)
(15)
(13)
(11)
(9)
(7)
(5)
(3)
(1)
Data held in the microprocessor memory
2nd column
memory area
(4)
(2)
1st column
memory area
(3)
(1)
Data written into the SED1330 display memory
Figure 67. Graphics address indexing
82
EPSON
SED1335 Series
Technical Manual
APPLICATION NOTES
320 dots
Direction of cursor movement
(2)
(4)
(6)
(8)
(10)
(12)
(14)
(16)
(18)
(20)
(22)
(24)
(26)
(28)
(30)
(32)
(1)
(3)
(5)
(7)
(9)
(11)
(13)
(15)
(17)
(19)
(21)
(23)
(25)
(27)
(29)
(31)
240 dots
Figure 68. Graphics bit map
Start
Enable cursor downwards movement
Set column 1 cursor address
Using an external character generator ROM, and 8 × 16pixel font can be used, allowing a 16 × 16-pixel character
to be displayed in two segments. The external CG ROM
EPROM data format is described in Section 9.1. This will
allow the display of up to 128, 16 × 16-pixel characters.
If CG RAM is also used, 96 fixed characters and 32 bankswitchable characters can also be supported.
Write data
Set column 2 cursor address
Write data
End
Figure 69. 16 × 16-dot display flowchart
SED1335 Series
Technical Manual
EPSON
83
INTERNAL CHARACTER GENERATOR FONT
17. INTERNAL CHARACTER GENERATOR FONT
0
1
2
3
4
Character code bits 0 to 3
5
6
7
8
9 A
B
C
D
E
F
2
3
Character code bits 4 to 7
4
5
6
7
A
B
C
D
1
Figure 70. On-chip character set
Note
The shaded positions indecate characters that have the whole 6 × 8 bitmap blackened.
84
EPSON
SED1335 Series
Technical Manual
GLOSSARY OF TERMS
18. GLOSSARY OF TERMS
A
AP
C
CD
CG
CGRAM ADR
CM
C/R
CRX
CRY
CSR DIR
CSR FORM
CSRR
CSRW
DM
FC
fFR
fOSC
FP
FX
FY
G
GLC
HDOT SCR
IV
L/F
MREAD
MWRITE
MX
OV
OVLAY
P
R
RAM
ROM
SAD
SL
TC/R
VRAM
WF
W/S
SED1335 Series
Technical Manual
Address
Address pitch parameter
Character display mode
Cursor direction of movement parameter
Character generator
Character generator memory address
Cursor display shape parameter
Characters per row parameter
Horizontal cursor size parameter
Vertical cursor size parameter
Cursor direction of movement instruction
Cursor size, position and type instruction
Read cursor address register instruction
Write cursor address register instruction
Display mode parameter
Flashing cursor parameter
Frame frequency
Oscillator frequency
Screen flashing parameter
Horizontal character size parameter
Vertical character size parameter
Graphics display mode
Graphic line control unit
Horizontal scrolling by pixels instruction
Screen origin compensation for inverse display
Lines per frame instruction
Display memory read instruction
Display memory write instruction
Screen composition mode
Graphics layer select parameter
Screen layer mode instruction
Parameter
Row
Random access memory
Read only memory
Display scrolling start address parameter
Display scrolling length parameter
Length, including horizontal blanking, of one screen line
Display memory
Display drive waveform parameter
Windows per screen parameter
EPSON
85
GLOSSARY OF TERMS
Request for Information on SED1335 Series
Dated:__________, 19____
Name of the inquiring person:
Company:
The phenomenon occurred on:
Desired date of receiving the reply: ______________
Device name: SED1335F0A / SED1335F0B
Number of units of the device causing the phenomenon: __units
(Scope of occurrence: ___ / ___)
(Lot No.
Your address:
Your phone number:
)
Applications:
Documents in your current possession:
-
-
FAX:
-
-
Image plane size: ____ dots × ____ dots (single-plane drive/2-plane drive)
Using LCD module (manufacturer):
Frame frequency:
Hz.
Display mode (circle either one)
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - (1) First layer: Characters Two-part plane, Second layer: Graphics Single plane
(2) First layer: Characters Single plane,
Second layer: Graphics Single plane
(3) First layer: Characters Two-part plane, Second layer: Graphics Two-part plane
(4) First layer: Graphics Two-part plane, Second layer: Graphics Single plane
(5) First layer: Graphics Single plane,
Second layer: Graphics Single plane
(6) First layer: Graphics Single plane,
Second layer: Graphics Single plane,
(7) First layer: Graphics Two-part plane, Second layer: Graphics Two-part plane
- - - - - - - - - - - - - - - - - - < (1)' >
< (4)' >
Third layer: Graphics Single plane
Initialization parameter: Give in decimals or duodecimals.
- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - System setting
Scroll
HDOT SCR
CSRFORM
P1(IV, W/S, M2, M1, M0) =
P1(SADIL) =
P1
=
P1
=
P2(W/F, FX)
=
P2(SADIH) =
OVLAY
P2
=
P3(FY)
=
P3(SL1)
=
P1
=
P4(C/R)
=
P4(SAD2L) =
DISP ON/OFF
P5(TC/R)
=
P5(SAD2H) =
P1
=
P6(L/F)
=
P6(SL2)
=
CSRW
P7(APL)
=
P7(SAD3L) =
P1
=
P8(APH)
=
P8(SAD3H) =
P2
=
P9(SAD4L) =
CSR DIR
P10(SAD4H) =
C
=
Oscillation frequency:
MHz.
CPU:
Frame memory capacity:
(internal/external)
CPU clock:
Kb.
(using memory IC:
MHz.
, access time:
nsec.)
Descriptions of your inquiry (Give details such as what type of display is being sought for and which phenomenon is occurring.)
Attached documents (circuit diagram, timing chart, program list, or others)
86
EPSON
SED1335 Series
Technical Manual
International Sales Operations
AMERICA
ASIA
EPSON ELECTRONICS AMERICA, INC.
HEADQUARTERS
- HONG KONG, CHINA EPSON HONG KONG LTD.
1960 E. Grand Ave
El Segundo, CA 90245, U.S.A.
Phone : +1-310-955-5300
Fax : +1-310-955-5400
20/F., Harbour Centre, 25 Harbour Road
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Phone : +852-2585-4600
Fax : +852-2827-4346
Telex : 65542 EPSCO HX
SALES OFFICES
West
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San Jose, CA 95134, U.S.A.
Phone : +1-408-922-0200
Fax : +1-408-922-0238
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4F, Bldg., 27, No. 69, Gui Jing Road
Caohejing, Shanghai, CHINA
Phone : 21-6485-5552
Fax : 21-6485-0775
Central
1450 East American Lane Suite 1550
Schaumburg, IL 60173, U.S.A.
Phone : +1-847-517-7667
Fax : +1-847-517-7601
101 Virginia Street, Suite 290
Crystal Lake, IL 60014, U.S.A.
Phone : +1-815-455-7630
Fax : +1-815-455-7633
Northeast
301 Edgewater Place, Suite 120
Wakefield, MA 01880, U.S.A.
Phone : +1-781-246-3600
Fax : +1-781-246-5443
Southeast
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Raleigh, NC 27609, U.S.A.
Phone : +1-919-781-7667
Fax : +1-919-781-6778
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Alptaretta, GA 30005, U.S.A.
Phone : +1-770-754-4872
Fax : +1-770-753-0601
EUROPE
EPSON EUROPE ELECTRONICS GmbH
HEADQUARTERS
- TAIWAN, R.O.C. EPSON TAIWAN TECHNOLOGY & TRADING LTD.
10F, No. 287,Nanking East Road, Sec. 3
Taipei, TAIWAN, R.O.C.
Phone : 02-2717-7360
Fax : 02-2712-9164
Telex : 24444 EPSONTB
HSINCHU OFFICE
13F-3, No.295, Kuang-Fu Road, Sec. 2
HsinChu 300, TAIWAN, R.O.C.
Phone : 03-573-9900
Fax : 03-573-9169
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No. 1 Temasek Avenue, #36-00
Millenia Tower, SINGAPORE 039192
Phone : +65-337-7911
Fax : +65-334-2716
- KOREA SEIKO EPSON CORPORATION
KOREA OFFICE
50F, KLI 63 Bldg., 60 Yoido-Dong
Youngdeungpo-Ku, Seoul, 150-010, KOREA
Phone : 02-784-6027
Fax : 02-767-3677
Riesstrasse 15
80992 Muenchen, GERMANY
Phone : +49- (0) 89-14005-0
Fax : +49- (0) 89-14005-110
- JAPAN SEIKO EPSON CORPORATION
ELECTRONIC DEVICES MARKETING DIVISION
- GERMANY SALES OFFICE
Electronic Device Marketing Department
IC Marketing & Engineering Group
Breidenbachstrasse 46
D-51373 Leverkusen, GERMANY
Phone : +49- (0) 214-83070-0 Fax : +49- (0) 214-83070-10
- UNITED KINGDOM UK BRANCH OFFICE
G6 Doncastle House, Doncastle Road
Bracknell, Berkshire RG12 8PE, ENGLAND
Phone : +44- (0) 1344-381700 Fax : +44- (0) 1344-381701
- FRANCE FRENCH BRANCH OFFICE
1 Avenue de l’ Atlantique, LP 915 Les Conquerants
Z.A. de Courtaboeuf 2, F-91976 Les Ulis Cedex, FRANCE
Phone : +33- (0) 1-64862350 Fax : +33- (0) 1-64862355
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: +81-(0)42-587-5816
Fax: +81-(0)42-587-5624
ED International Marketing Department I
(Europe & U.S.A.)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: +81-(0)42-587-5812
Fax: +81-(0)42-587-5564
ED International Marketing Department II (Asia)
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: +81-(0)42-587-5814
Fax: +81-(0)42-587-5110
In pursuit of “Saving” Technology, Epson electronic devices.
Our lineup of semiconductors, liquid crystal displays and quartz devices
assists in creating the products of our customers’ dreams.
Epson IS energy savings.
SED 1335 Series
LCD Controller ICs
ELECTRONIC DEVICES MARKETING DIVISION
■ Electronic Devices Information on the EPSON WWW Server
http://www.epson.co.jp
First issue March, 1999
Printed in Japan H A
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