S6BP201A Datasheet
S6BP201A
ASSP
42V, 1A, Synchronous Buck-boost DC/DC Converter IC
Data Sheet (Preliminary)
Notice to Readers: This document states the current technical specifications regarding the Cypress
product(s) described herein. The Preliminary status of this document indicates that product qualification has
been completed, and that initial production has begun. Due to the phases of the manufacturing process that
require maintaining efficiency and quality, this document may be revised by subsequent versions or
modifications due to changes in technical specifications.
Publication Number S6BP201A_DS405-00032
CONFIDENTIAL
Revision 0.2
Issue Date September 4, 2015
v1.2
D a t a S h e e t
( P r e l i m i n a r y )
Notice On Data Sheet Designations
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advise readers of product information or intended specifications throughout the product life cycle, including
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“This document contains information on one or more products under development at Cypress
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Preliminary
The Preliminary designation indicates that the product development has progressed such that a commitment
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places the following conditions upon Preliminary content:
“This document states the current technical specifications regarding the Cypress product(s)
described herein. The Preliminary status of this document indicates that product qualification has
been completed, and that initial production has begun. Due to the phases of the manufacturing
process that require maintaining efficiency and quality, this document may be revised by subsequent
versions or modifications due to changes in technical specifications.”
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When a product has been in production for a period of time such that no changes or only nominal changes
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applies the following conditions to documents in this category:
“This document states the current technical specifications regarding the Cypress product(s)
described herein. Cypress Semiconductor Corp. deems the products to have been in sufficient
production volume such that subsequent versions of this document are not expected to change.
However, typographical or specification corrections, or modifications to the valid combinations
offered may occur.”
Questions regarding these document designations may be directed to your local sales office.
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S6BP201A
ASSP
42V, 1A, Synchronous Buck-boost DC/DC Converter IC
Data Sheet (Preliminary)
1.
Description
S6BP201A is a 1ch Buck-boost DC/DC converter IC with four built-in switching FETs. This IC is able to
supply up to 1.0A of load current within the very wide range from 2.5V to 42V in the input voltage. This IC
has an operation mode that is automatically changed to PFM operation during low load, which can achieve
super-high efficiency with a very low quiescent current 20 µA. It is possible to provide stable output voltage
from an automotive cold cranking and load dump, up to 42V, conditions within 1 ms transition time. As a
result, this IC is suitable for power supply solutions of automotive and Industrial applications.
This IC has the SYNC function, which is capable of selecting the SYNC_IN that is able to inputs an external
clock signal. When an external clock signal in the range from 200 kHz to 400 kHz is inputted, the FETs
perform the switching operation with synchronizing signal from an external clock. When an external clock
signal is not inputted, the FETs perform the switching operation from an internal clock. The internal clock
signal in the range from 200 kHz to 2.1 MHz can be set by an external resistor.
Since external voltage setting resistors and phase compensation capacitors are not required with this IC, it
can reduce the number of parts and a part mounting area.
This IC has five protection functions, input under voltage lockout (input UVLO), output under voltage
protection (output UVP), output over voltage protection (output OVP), output over current protection (output
OCP), and thermal shutdown (TSD).
Moreover, this IC has the power good (PG) function that indicates the state of the output voltage(VOUT pin).
When the output voltage reaches the PG voltage, the PG signal is outputted.
The VOUT output voltage of this product is selectable from the product lineup (refer to the "4. Product
Lineup").
Publication Number S6BP201A_DS405-00032
Revision 0.2
Issue Date September 4, 2015
This document states the current technical specifications regarding the Cypress product(s) described herein. The Preliminary status of this document indicates that product
qualification has been completed, and that initial production has begun. Due to the phases of the manufacturing process that require maintaining efficiency and quality, this
document may be revised by subsequent versions or modifications due to changes in technical specifications.
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2.
( P r e l i m i n a r y )
Features





Wide input voltage range
: 2.5V to 42V
Selectable output voltage (factory settable): 5.000V/5.050V/5.075V/5.100V/5.125V/5.150V/5.200V
Wide operating frequency range
: 200 kHz to 2.1 MHz
External synchronized clock range
: 200 kHz to 400 kHz
SYNC function
− SYNC_IN
: External clock input
(Not inputting an external clock, this IC operates by an internal clock)







Super-high efficiency by PFM operation (When setting MODE pin to a low level)
Automatic PWM/PFM switching operation and fixed PWM operation are selectable by MODE pin
Built-in switching FET
Synchronous current mode architecture
Shutdown current
: Lower than 1 µA
Quiescent current
: 20 µA
Power Good Monitor
− Output voltage monitoring by window comparator
− Power-on reset time
: 14 ms
 Soft start time without load dependence
 Enhanced protection functions
− Input under voltage lockout
− Output under voltage protection
− Output over voltage protection
− Output over current protection
− Thermal shutdown
: 0.9 ms (When switching frequency = 2.1 MHz)
: 95.5%
: 104.5%
 Small TSSOP16 package (exposed PAD) : 5 mm × 6.4 mm
3.
Applications




4
CONFIDENTIAL
Body Control Module (BCM)
Gateway module
Automotive applications
Industrial applications
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Table of Contents
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
16.
17.
18.
Description ..................................................................................................................................... 3
Features ......................................................................................................................................... 4
Applications .................................................................................................................................... 4
Product Lineup ............................................................................................................................... 6
Pin Assignment............................................................................................................................... 7
Pin Descriptions.............................................................................................................................. 7
Block Diagram ................................................................................................................................ 8
Absolute Maximum Ratings ............................................................................................................ 9
Recommended Operating Conditions........................................................................................... 10
Electrical Characteristics .............................................................................................................. 11
Functional Description .................................................................................................................. 13
11.1 Protection Function ........................................................................................................... 13
11.2 Protection Function Table ................................................................................................. 14
Application Circuit Example and Parts list .................................................................................... 15
Application Note ........................................................................................................................... 16
13.1 Setting the Operation Conditions ...................................................................................... 16
Usage Precaution ......................................................................................................................... 19
RoHS Compliance Information ..................................................................................................... 19
Ordering Information..................................................................................................................... 19
Package Dimensions .................................................................................................................... 20
Major Changes ............................................................................................................................. 21
Figures
Figure 5-1 Pin Assignment ......................................................................................................................... 7
Figure 7-1 Block Diagram ........................................................................................................................... 8
Figure 12-1 Application Circuit Example ................................................................................................... 15
Figure 13-1 FOSC vs RRT Measured Characteristic .................................................................................... 17
Figure 13-2 IVOUT vs VVIN .......................................................................................................................... 18
Tables
Table 6-1 Pin Descriptions .......................................................................................................................... 7
Table 11-1 Protection Function Table ....................................................................................................... 14
Table 12-1 Parts List................................................................................................................................. 15
Table 13-1 Operation State of DC/DC Convertor ..................................................................................... 16
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4.
( P r e l i m i n a r y )
Product Lineup
The VOUT output voltage of this product is set at the factory shipment. To order a product, select an item
from the product lineup blow.
Part Number(*1)
Order
Code
VOUT
Output
Voltage [V]
S6BP201A1AST2B000
1A
5.000
S6BP201A2AST2B000
2A
5.050
S6BP201A3AST2B000
3A
5.075
S6BP201A4AST2B000
4A
5.100
S6BP201A5AST2B000
5A
5.125
S6BP201A6AST2B000
6A
5.150
S6BP201A7AST2B000
7A
5.200
VOUT UVP Threshold
VOUT OVP Threshold
[%]
[%]
SYNC
Function
SYNC_IN
Falling
Rising
Rising
Falling
(Typ)
(Typ)
(Typ)
(Typ)
95.5
96.5
104.5
103.5
Power-on
Reset
Time[s]
14.0m
*1: Commercial sample (CS)
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5.
( P r e l i m i n a r y )
Pin Assignment
Figure 5-1 Pin Assignment
(Top view)
PGND1 :1
16: PGND2
LX1 :2
15: LX2
PVIN :3
14: VOUT
BST :4
13: FB
EP: GND
VIN :5
12: RT
ENA :6
11: SYNC
MODE :7
10: PG
VCC :8
9: GND
(SEC016)
6.
Pin Descriptions
Table 6-1 Pin Descriptions
Pin No.
Pin Name
I/O
1
PGND1
−
GND pin for built-in switching FET
Description
2
LX1
O
Inductor connection pin
3
PVIN
I
Power supply pin for PWM controller and switching FETs
4
BST
I
BST(Boost) capacitor connection pin
5
VIN
I
Power supply pin
6
ENA
I
DC/DC converter enable pin
7
MODE
I
8
VCC
O
9
GND
−
10
PG
O
PWM/PFM operation control pin
For the MODE pin setting, refer to "13.1 Setting the Operation Conditions"
LDO output pin of Internal reference voltage
VCC capacitor connection pin
GND pin
Open drain output pin for power good
When being used, connect PG pin to VCC pin or VOUT pin.
When not being used, leave PG pin open.
SYNC
I
12
RT
O
13
FB
I
Output voltage feedback pin
14
VOUT
O
DC/DC converter output pin
15
LX2
O
Inductor connection output pin.
16
PGND2
−
GND pin for built-in switching FET
EP
GND
−
GND pin
September 4, 2015, S6BP201A_DS405-00032-0v02-E
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External clock input pin
11
For the SYNC pin setting, refer to "13.1 Setting the Operation Conditions"
Timing resistor connection pin for internal clock (switching frequency)
For the resistance, refer to "13.1 Setting the Operation Conditions"
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7.
( P r e l i m i n a r y )
Block Diagram
Figure 7-1 Block Diagram
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8.
( P r e l i m i n a r y )
Absolute Maximum Ratings
Parameter
Power supply voltage (*1)
Terminal voltage (*1)
Symbol
PG output current
Rating
Min
Max
Unit
VVIN
VIN pin
−0.3
+48.0
V
VPVIN
PVIN pin
−0.3
+48.0
V
VVCC
VCC pin
−0.3
+6.9
V
VBST
BST pin
−0.3
+48.0
V
VLX1
LX1 pin
−2.0
+48.0
V
VLX2
LX2 pin
−2.0
+6.9
V
VFB
FB pin
−0.3
VVCC
V
VRT
RT pin
−0.3
VVCC
V
VMODE
MODE pin
−0.3
VVCC
V
VSYNC
SYNC pin
−0.3
VVCC
V
VENA
ENA pin
−0.3
+48.0
V
VPG
PG pin
−0.3
+6.9
V
Between BST–LX1 pins
−0.3
+6.9
V
−0.3
+0.3
V
−3
0
mA
0
3324 (*2)
mW
−55
+150
°C
VBST-LX
Difference voltage (*1)
Condition
VGND
Between GND–PGND1 pins
Between GND–PGND2 pins
IPG
PG pin
Power dissipation (*1)
PD
Ta ≤ ±25°C
Storage temperature
TSTG
−
*1: When PGND1 = PGND2 = GND = 0V
*2: When the product is mounted on 76.2 mm × 114.3 mm, four-layer FR-4 board
Warning:
1. Semiconductor devices may be permanently damaged by application of stress (including, without
limitation, voltage, current or temperature) in excess of absolute maximum ratings. Do not exceed any of
these ratings.
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9.
( P r e l i m i n a r y )
Recommended Operating Conditions
Parameter
Power supply voltage (*1)
Terminal voltage (*1)
Symbol
VVIN
Value
Min
Typ
Max
Unit
VIN
At start-up
5.0
12.0
42.0
V
pin
After start-up
2.5
12.0
42.0
V
VBST
BST pin
0.0
−
47.5
V
VLX1
LX1 pin
−1.0
+12.0
+42.0
V
VLX2
LX2 pin
−1.0
−
+5.5
V
VFB
FB pin
0.0
−
5.5
V
VMODE
MODE pin
0.0
−
5.5
V
VSYNC
SYNC pin
0.0
−
5.5
V
VENA
ENA pin
0.0
12.0
42.0
V
VPG
PG pin
0.0
−
5.5
V
Between BST−LX1 pins
0.0
−
5.5
V
−0.05
0.00
+0.05
V
VBST-LX1
Difference voltage (*1)
Condition
VGND
Between GND−PGND1 pins,
Between GND−PGND2 pins
PG output current
IPG
BST capacitance
CBST
PG pin (sink current)
Between BST−LX1 pins
VCC capacitance
CVCC
Between VCC−GND pins
Timing resistance
RRT
Operating ambient Temperature
Ta
Between RT−GND pins
When using internal clock
−
0
−
1
mA
0.068
0.100
0.470
µF
2.2
4.7
10.0
µF
22
−
270
kΩ
−40
+25
+125
°C
*1: When PGND1 = PGND2 = GND = 0V
Warning:
1. The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device's electrical characteristics are warranted when the device is
operated under these conditions.
2. Any use of semiconductor devices will be under their recommended operating condition.
3. Operation under any conditions other than these conditions may adversely affect reliability of device and
could result in device failure.
4. No warranty is made with respect to any use, operating conditions or combinations not represented on
this data sheet. If you are considering application under any conditions other than listed herein, please
contact sales representatives beforehand.
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10. Electrical Characteristics
VIN = PVIN = 12V, ENA = 5V
(Unless specified otherwise, these are the electrical characteristics under the recommended operating environment.)
Parameter
Symbol
VOUT output voltage
VVOUT
RFB
Value
Unit
Min
Typ
Max
IVOUT = 0A, When VVOUT = 5.000 (*1)
4.925
5.000
5.075
V
IVOUT = 0A, When VVOUT = 5.050 (*1)
4.975
5.050
5.125
V
IVOUT = 0A, When VVOUT = 5.075 (*1)
4.999
5.075
5.151
V
IVOUT = 0A, When VVOUT = 5.100 (*1)
5.024
5.100
5.176
V
IVOUT = 0A, When VVOUT = 5.125 (*1)
5.048
5.125
5.201
V
IVOUT = 0A, When VVOUT = 5.150 (*1)
5.073
5.150
5.227
V
IVOUT = 0A, When VVOUT = 5.200 (*1)
5.122
5.200
5.278
V
EN = 0V, Ta = +25°C
3.84
4.80
5.76
MΩ
DC/DC
RHSIDEFET1
LX1 = −30 mA (Between PVIN−LX1)
−
150
−
mΩ
converter
Switching FET
RLSIDEFET1
LX1 = 30 mA (Between LX1−PGND1)
−
150
−
mΩ
Block
on-resistance
RHSIDEFET2
LX2 = −30 mA (Between VOUT−LX2)
−
150
−
mΩ
RLSIDEFET2
LX2 = 30 mA (Between LX2−PGND2)
−
150
−
mΩ
ILEAK
−
−
−
5
µA
0.855
0.9
0.945
ms
PVIN ≥ 7.5V, Ta = 25°C
−
−
1.0(*2)
A
PVIN = 4.5V, Ta = 25°C
−
−
1.0(*2)
A
1.0(*2)
−
−
A
Buck-boost
FB input resistance
Condition
Switching FET
leakage current
Soft-start time
TSS
RRT = 22 kΩ
VOUT output current
IVOUT
Current limit
ILIMT
PVIN = 12V, L = 2.2µH
VVCC
5V LDO block
VCC output voltage
VIN = 12V
4.9
5.0
5.1
V
VIN UVLO
VIN UVLO falling threshold
VUVLOVINHL
VIN input voltage when falling
2.30
2.40
2.50
V
block
VIN UVLO rising threshold
VUVLOVINLH
VIN input voltage when rising
4.55
4.75
4.95
V
VCC UVLO
VCC UVLO falling threshold
VUVLOVCCHL
VCC input voltage when falling
2.30
2.40
2.50
V
block
VCC UVLO rising threshold
VUVLOVCCLH
VCC input voltage when rising
4.55
4.75
4.95
V
VENA
Enable voltage range
1.10
−
VVIN
V
VDSB
Disable voltage range
0.0
−
0.2
V
IENA
VENA = 12V
−
1
3
µA
0.0
−
0.4
V
2.0
−
VVOUT
V
ENA pin
Enable condition
ENA input current
MODE pin
MODE input voltage
VMODE_L
VMODE_H
MODE Input current
OSC block
Switching frequency
(SYNC_IN)
FOSC
operation
Fixed PWM operation
MODE = 5.0V
−
5
10
µA
RRT = 22 kΩ
2.0
2.1
2.2
MHz
RRT = 270 kΩ
180
200
220
kHz
VSYNC_L
−
0.0
−
0.4
V
VSYNC_H
−
2.0
−
VVOUT
V
SYNC input frequency
VSYNC_L
−
200
−
400
kHz
SYNC input duty ratio
VSYNC_H
−
+20
+50
+80
%
SYNC leakage current
ILKSYNC
−
5
10
µA
SYNC input threshold
SYNC block
IMODE
Automatic PWM/PFM switching
VSYNC = 5.0V
*1: Refer to "4. Product Lineup"
*2: The specification is guaranteed by design, not tested in production.
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VIN = PVIN = 12V, ENA = 5V
(Unless specified otherwise, these are the electrical characteristics under the recommended operating environment.)
Parameter
Symbol
VOUT UVP falling threshold
PGUVPHL
VOUT UVP rising threshold
PGUVPLH
VOUT OVP rising threshold
PGOVPLH
VOUT OVP falling threshold
PGOVPHL
PG block
(UVP, OVP)
voltage setting (*1)
Rising threshold for VOUT output
voltage setting (*1)
Rising threshold for VOUT output
voltage setting (*1)
Falling threshold for VOUT output
voltage setting (*1)
ILKPG
VPWRGD = 5.0V, VENA = 0V
Low level output voltage
VOLPG
IPGSINK = 1 mA
TPPG
At power shutdown
TRPG
At power good
at abnormal detection
Power-on reset time (*1)
Thermal
Shutdown temperature
block (TSD)
Supply current
Falling threshold for VOUT output
Leak current
Delay time
shutdown
Condition
TTSDH
−
Value
Unit
Min
Typ
Max
94.0
95.5
97.0
%
95.0
96.5
98.0
%
103.0
104.5
106.0
%
102.0
103.5
105.0
%
0
−
1
µA
0.025
0.05
0.15
V
−
7(*2)
12(*2)
µs
9.1
14.0
18.9
ms
−
°C
−
165
(*2)
TTSDL
Hysteresis
−
10(*2)
−
°C
Shutdown current
IVINSDN
VIN input current, VENA = 0V
−
1
5
µA
Quiescent current
IVINQ
−
20
40
µA
VIN input current, VENA = 12V,
IVOUT = 0A,
MODE/SYNC/PG Pins = OPEN
*1: Refer to "4. Product Lineup"
*2: The specification is guaranteed by design, not tested in production.
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11. Functional Description
11.1 Protection Function
Input Under Voltage Lockout (Input UVLO)
The input UVLO is the function that prevents a malfunction of this IC from the following status, and protects
poststage devices.
− Transitional state at start-up
− Momentary drop of power supply voltage
To prevent such a malfunction, this protection monitors the VIN input voltage and VCC voltage. When either
VIN or VCC voltage falls to the UVLO falling threshold, 2.4V (Typ), or lower, the IC stops the VOUT voltage
output and becomes UVLO status. When both VIN and VCC voltages reach the UVLO rising threshold,
4.75V (Typ), or higher, the IC is released from the UVLO state and returns to the normal operation.
Output Under Voltage Protection (Output UVP)
The output UVP is the function that monitors the voltage drop of the VOUT pin and notifies by the PG pin.
When the output voltage falls to the UVP falling threshold (PGUVPHL) for the output voltage setting or lower,
the PG voltage is fixed to the low level. The IC becomes the UVP status, but the switching operation is
maintained under the UVP status.
When the output voltage once again reaches the UVP rising threshold (PGUVPLH) for the output voltage
setting or higher, the IC is released from the UVP state and the PG voltage is fixed to the high level.
Output Over Voltage Protection (Output OVP)
The output OVP is the function that monitors the voltage rise of the VOUT pin and stops the switching
operations, which protects poststate devices from overvoltage. Also, the VOUT state is notified by the PG
pin.
When the output voltage rises to the OVP falling threshold (PGOVPLH) for the output voltage setting or higher,
the PG voltage is fixed to the low level. The IC becomes the OVP status, and the switching operations of the
high-side FETs are stopped. When the output voltage once again falls to the OVP falling threshold (PGOVPHL)
for the output voltage setting or lower, the IC is released from the OVP state and resumes the switching
operations. The PG voltage is fixed to the high level again.
Output Over Current Protection (Output OCP)
The output OCP is the function that limits the excessive current load and protects poststage devices.
Thermal Shutdown (TSD)
The TSD is the function that protects the IC from heat-destruction. When the junction temperature reaches
+165°C (Typ), the high-side and low-side switching FET are turned off and the IC becomes the TSD status.
When the junction temperature once again falls to +155°C (Typ) or lower, the IC is released from the TSD
state and restarts the power supply.
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11.2 Protection Function Table
The following table shows the state of each pin when each protection function operates.
Table 11-1 Protection Function Table
Function
ENA Pin
PG Pin
Setting
Output
DC/DC
Converter
Remarks
Operation
It is recommended to connect PG pin to
VCC pin or VOUT pin via a pull-up
Shutdown operation
L
Hi-Z(*1)
Shutdown
resistor.
When setting ENA pin to a low level, both
VCC pin and VOUT pin voltage drop to
0V. Therefore, PG pin outputs 0V.
Nominal operation
Input under voltage protection
(Input UVLO)
Output under voltage protection
(Output UVP)
Output over voltage protection
(Output OVP)
Output over current protection
(Output OCP)
Thermal shutdown
(TSD)
H
Hi-Z(*1)
Switching
−
After releasing UVLO state, this IC is
H
L
Shutdown
H
L
Switching
−
H
L
Shutdown
−
H
L
Switching
OCP operates to drop the output voltage.
H
L
Shutdown
automatically reset with soft start.
After releasing TSD state, this IC is
automatically reset with soft start.
*1: PG pin is formed as an open drain structure. The internal MOSFET is in the OFF state.
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12. Application Circuit Example and Parts list
Figure 12-1 Application Circuit Example
VIN
CVIN
0.1μF
VCC
CVCC
VOUT
4.7μF
VIN 5
3 PVIN
VCC 8
4 BST
FB 13
VIN
CPVIN
10μF
CBST
0.1μF
2 LX1
LLX
2.2μH
MODE
MODE 7
15 LX2
SYNC
SYNC 11
14 VOUT
ENA
ENA 6
RRT
22kΩ
RT 12
VOUT
VOUT
CVOUT_2
22μF
CVOUT_1
22μF
1 PGND1
GND 9
16 PGND2
GND EP
10 PG
RPG
1MΩ
VCC or VOUT
PG
FOSC = 2.1 MHz
When selecting “VOUT output voltage = 5.0V”
Table 12-1 Parts List
Symbol
Package Size
Item
Value
Part Number
Vendor
Ceramic capacitor
0.1 μF
CGA2B3X7R1H104K050BB
TDK
1.0×0.5×0.5
X7R, Rated Voltage: 50 Vdc
CPVIN
Ceramic capacitor
10 μF
CGA9N3X7R1H106K230KB
TDK
5.7×5.0×2.3
X7R, Rated Voltage: 50 Vdc
CVCC
Ceramic capacitor
4.7 μF
CGA4J3X7R1C475K125AB
TDK
2.0×1.25×1.25
X7R, Rated Voltage: 16 Vdc
Ceramic capacitor
22 μF
CGA6P1X7R1C226M250AC
TDK
3.2×2.5×2.5
X7R, Rated Voltage: 16 Vdc
DCR: 14.6 mΩ, IDC_MAX: 5.5A
CVIN,
CBST
CVOUT_1,
CVOUT_2
(W×L×H[mm])
Remarks
LLX
Inductor
2.2 μH
CLF7045T-2R2N-D
TDK
7.2×6.9×4.5
RRT
Resistor
22 kΩ
RK73H1JTTD2202F
KOA
0.8×1.6×0.45
−
RPG
Resistor
1 MΩ
RK73H1JTTD1004F
KOA
0.8×1.6×0.45
−
TDK: TDK Corporation
KOA: KOA Corporation
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13. Application Note
13.1 Setting the Operation Conditions
Operation State of DC/DC Convertor
The operation stage of DC/CD converter is set by both MODE pin and SYNC pin.
Table 13-1 Operation State of DC/DC Convertor
MODE
SYNC Pin
Pin
(Signal Input)
L (*3)
External clock input (*5)
L (*3)
H (*4)
Operation State of DC/DC Convertor
Automatic PWM/PFM switching operation from an internal clock
Fixed PWM operation with synchronizing signal from an external clock (*2)
H (*4)
Prohibition of use (*1)
L (*3)
Fixed PWM operation from an internal clock
External clock input (*5)
H (*4)
Fixed PWM operation with synchronizing signal from an external clock (*2)
Prohibition of use (*1)
*1: When setting SYNC pin to a high level, the quiescent current (IVINQ) is increased.
*2: Set the timing resistance (RRT) to 330 kΩ.
*3: Apply the GND1 or GND2 voltage.
*4: Apply the VOUT voltage.
*5: Apply the VOUT voltage at a high level. Apply the GND1 or GND2 voltage at a low level
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Setting of Switching Frequency (Internal Clock)
The switching frequency (internal clock) can be set by RT resistor, which value is the timing resistance (RRT),
connected to RT pin. Set the timing resistance in a range within the following graph.
Figure 13-1 FOSC vs RRT Measured Characteristic
FOSC vs RRT Measured Characteristic
2.5
FOSC [MHz]
2.0
1.5
1.0
0.5
0.0
0
100
200
RRT [kΩ]
300
400
S6BP201AGraph001
The reference value can be calculated by the following formula.
FOSC [Hz] ≈
FOSC
RRT
1
R RT × 21.7 × 10−12
: Switching frequency [Hz]
: Timing resistance [Ω]
Setting of Soft-start Time
The Soft-start time is determined by the timing resistance (RRT), the value of the resistor connected to RT
pin.
TSS [s] =
1
× 2 × 1024
FOSC
TSS
FOSC
: Soft-start time [s]
: Switching frequency [Hz]
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Consideration of VOUT Maximum Output Current
Make sure the VOUT maximum output current in a range within the following graph.
Figure 13-2 IVOUT vs VVIN
IVOUT vs VVIN
1.2
Ta=+25oC, FOSC=2.1MHz
Ta=+125oC, FOSC=2.1MHz
1.0
IVOUT [A]
0.8
0.6
0.4
0.2
0.0
0
1
2
3
4
5 6 7
VVIN [V]
8
9 10 11 12
S6BP201AGraph002
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14. Usage Precaution
Printed circuit board ground lines should be set up with consideration for common
impedance.
Take appropriate measures against static electricity.
− Containers for semiconductor materials should have anti−static protection or be made of conductive
material.
− After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
− Work platforms, tools, and instruments should be properly grounded.
− Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ in serial body and ground.
Do not apply negative voltages.
The use of negative voltages below −0.3V may make the parasitic transistor activated to the LSI, and can
cause malfunctions.
15. RoHS Compliance Information
This product has observed the standard of lead, cadmium, mercury, Hexavalent chromium, polybrominated
biphenyls (PBB), and polybrominated diphenyl ethers (PBDE).
16. Ordering Information
Order
Code
Part Number (*1)
Package
1A
S6BP201A1AST2B000
4A
S6BP201A4AST2B000
Plastic TSSOP16 (0.65 mm pitch), 16-pin
7A
S6BP201A7AST2B000
(SEC016)
ES
S6BP201AESET21000 (*2)
*1: Please contact our sales division for the part numbers (refer to "4. Product Lineup") not mentioned in this
table.
*2: This part number is used for the engineering sample (ES). Please contact our sales division for the order
code (refer to "4. Product Lineup").
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17. Package Dimensions
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18. Major Changes
Page
Section
Change Results
Preliminary 0.1
−
−
Initial release
Preliminary 0.2
12
10. Electrical
Characteristics
"(TSD)" was added in the table of "10. Electrical Characteristics".
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Colophon
The products described in this document are designed, developed and manufactured as contemplated for general use,
including without limitation, ordinary industrial use, general office use, personal use, and household use, but are not
designed, developed and manufactured as contemplated (1) for any use that includes fatal risks or dangers that, unless
extremely high safety is secured, could have a serious effect to the public, and could lead directly to death, personal injury,
severe physical damage or other loss (i.e., nuclear reaction control in nuclear facility, aircraft flight control, air traffic control,
mass transport control, medical life support system, missile launch control in weapon system), or (2) for any use where
chance of failure is intolerable (i.e., submersible repeater and artificial satellite). Please note that Cypress will not be liable to
you and/or any third party for any claims or damages arising in connection with above-mentioned uses of the products. Any
semiconductor devices have an inherent chance of failure. You must protect against injury, damage or loss from such failures
by incorporating safety design measures into your facility and equipment such as redundancy, fire protection, and prevention
of over-current levels and other abnormal operating conditions. If any products described in this document represent goods
or technologies subject to certain restrictions on export under the Foreign Exchange and Foreign Trade Law of Japan, the
US Export Administration Regulations or the applicable laws of any other country, the prior authorization by the respective
government entity will be required for export of those products.
Trademarks and Notice
The contents of this document are subject to change without notice. This document may contain information on a Cypress
product under development by Cypress. Cypress reserves the right to change or discontinue work on any product without
notice. The information in this document is provided as is without warranty or guarantee of any kind as to its accuracy,
completeness, operability, fitness for particular purpose, merchantability, non-infringement of third-party rights, or any other
warranty, express, implied, or statutory. Cypress assumes no liability for any damages of any kind arising out of the use of
the information in this document.
®
Copyright © 2015 Cypress Semiconductor Corp. All rights reserved. Cypress, the Cypress logo, Spansion , the Spansion
®
®
TM
TM
TM
TM
logo, MirrorBit , MirrorBit Eclipse , ORNAND , Easy DesignSim , Traveo and combinations thereof, are trademarks
and registered trademarks of Cypress Semiconductor Corp. in the United States and other countries. Bluetooth is a
trademark of Bluetooth SIG. Other names used are for informational purposes only and may be trademarks of their
respective owners.
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