Precision Low Drift 2.048 V/2.500 V SOT-23 Voltage Reference ADR380/ADR381

Precision Low Drift 2.048 V/2.500 V SOT-23 Voltage Reference ADR380/ADR381
Precision Low Drift 2.048 V/2.500 V
SOT-23 Voltage Reference
ADR380/ADR381
PIN CONFIGURATION
Initial accuracy: ±5 mV/±6 mV maximum
Initial accuracy error: ±0.24%/±0.24%
Low TCVOUT: 25 ppm/°C maximum
Load regulation: 70 ppm/mA
Line regulation: 25 ppm/V
Wide operating ranges
2.4 V to 18 V for ADR380
2.8 V to 18 V for ADR381
Low power: 120 μA maximum
High output current: 5 mA
Wide temperature range: −40°C to +85°C
Tiny 3-lead SOT-23 package with standard pinout
VIN 1
ADR380/
ADR381
3
GND
TOP VIEW
VOUT 2 (Not to Scale)
02175-001
FEATURES
Figure 1. 3-Lead SOT-23
(RT Suffix)
APPLICATIONS
Battery-powered instrumentation
Portable medical instruments
Data acquisition systems
Industrial process control systems
Hard disk drives
Automotive
GENERAL DESCRIPTION
The ADR380 and ADR381 are precision 2.048 V and 2.500 V
band gap voltage references featuring high accuracy, high
stability, and low power consumption in a tiny footprint.
Patented temperature drift curvature correction techniques
minimize nonlinearity of the voltage change with temperature.
The wide operating range and low power consumption make
them ideal for 3 V to 5 V battery-powered applications.
Table 1. ADR38x Products
Part Number
Nominal Output Voltage (V)
ADR380
ADR381
2.048
2.500
The ADR380 and ADR381 are micropower, low dropout
voltage (LDV) devices that provide a stable output voltage from
supplies as low as 300 mV above the output voltage. They are
specified over the industrial (−40°C to +85°C) temperature
range. The ADR380/ADR381 are available in the tiny 3-lead
SOT-23 package.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
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www.analog.com
Fax: 781.461.3113 ©2001–2010 Analog Devices, Inc. All rights reserved.
ADR380/ADR381
TABLE OF CONTENTS
Features .............................................................................................. 1
Theory of Operation ...................................................................... 11
Applications ....................................................................................... 1
Device Power Dissipation Considerations .............................. 11
Pin Configuration ............................................................................. 1
Input Capacitor ........................................................................... 11
General Description ......................................................................... 1
Output Capacitor........................................................................ 11
Revision History ............................................................................... 2
Applications Information .............................................................. 12
Specifications..................................................................................... 3
Stacking Reference ICs for Arbitrary Outputs ....................... 12
ADR380 Electrical Characteristics............................................. 3
ADR381 Electrical Characteristics............................................. 4
A Negative Precision Reference Without Precision Resistors
....................................................................................................... 12
Absolute Maximum Ratings............................................................ 5
Precision Current Source .......................................................... 12
Thermal Resistance ...................................................................... 5
Precision High Current Voltage Source .................................. 13
ESD Caution .................................................................................. 5
Outline Dimensions ....................................................................... 14
Typical Performance Characteristics ............................................. 6
Ordering Guide .......................................................................... 14
Terminology .................................................................................... 10
REVISION HISTORY
10/10—Rev. B to Rev. C
Deleted Figure 32 ............................................................................ 14
Changes to Ordering Guide .......................................................... 14
7/04—Rev. 0 to Rev. A
Updated Format .................................................................. Universal
Changes to Ordering Guide .......................................................... 16
Updated Outline Dimensions ....................................................... 16
1/09—Rev. A to Rev. B
Updated Format .................................................................. Universal
Changes to Table 7 ............................................................................ 5
Changes to Stacking Reference ICs for Arbitrary Outputs
Section, Figure 28, and Figure 29 ................................................. 12
Updated Outline Dimensions ....................................................... 14
Changes to Ordering Guide .......................................................... 14
Rev. C | Page 2 of 16
ADR380/ADR381
SPECIFICATIONS
ADR380 ELECTRICAL CHARACTERISTICS
VIN = 5.0 V, TA = 25°C, unless otherwise noted.
Table 2.
Parameter
Output Voltage
Initial Accuracy Error
Symbol
VOUT
VOERR
Conditions
Temperature Coefficient
TCVOUT
Minimum Supply Voltage Headroom
Line Regulation
Load Regulation
VIN – VOUT
ΔVOUT/DVIN
ΔVOUT/DILOAD
Quiescent Current
IIN
Voltage Noise
Turn-On Settling Time
Long-Term Stability
Output Voltage Hysteresis
Ripple Rejection Ratio
Short Circuit to GND
eN
tR
ΔVOUT
VOUT_HYS
RRR
ISC
−40°C < TA < +85°C
0°C < TA< 70°C
ILOAD ≤ 3 mA
VIN = 2.5 V to 15 V, −40°C < TA < +85°C
VIN = 3 V, ILOAD = 0 mA to 5 mA,
−40°C < TA < +85°C
No load
−40°C < TA < +85°C
0.1 Hz to 10 Hz
Min
2.043
−5
−0.24
Typ
2.048
5
3
300
10
100
Max
2.053
+5
+0.24
25
21
25
70
120
140
μA
μA
μV p-p
μs
ppm
ppm
dB
mA
5
20
50
40
85
25
1000 Hrs
fIN = 60 Hz
Unit
V
mV
%
ppm/°C
ppm/°C
mV
ppm/V
ppm/mA
VIN = 15.0 V, TA = 25°C, unless otherwise noted.
Table 3.
Parameter
Symbol
Output Voltage
Initial Accuracy Error
VOUT
VOERR
Temperature Coefficient
TCVOUT
Minimum Supply Voltage Headroom
Line Regulation
Load Regulation
VIN − VOUT
ΔVOUT/DVIN
ΔVOUT/DILOAD
Quiescent Current
IIN
Voltage Noise
Turn-On Settling Time
Long-Term Stability
Output Voltage Hysteresis
Ripple Rejection Ratio
Short Circuit to GND
eN
tR
ΔVOUT
VOUT_HYS
RRR
ISC
Conditions
−40°C < TA < +85°C
0°C < TA < 70°C
ILOAD ≤ 3 mA
VIN = 2.5 V to 15 V, −40°C < TA < +85°C
VIN = 3 V, ILOAD = 0 mA to 5 mA,
−40°C < TA < +85°C
No load
−40°C < TA < +85°C
0.1 Hz to 10 Hz
1000 Hrs
fIN = 60 Hz
Rev. C | Page 3 of 16
Min
Typ
Max
Unit
2.043
−5
−0.24
2.048
2.053
+5
+0.24
25
21
V
mV
%
ppm/°C
ppm/°C
mV
ppm/V
ppm/mA
5
3
300
10
100
5
20
50
40
85
25
25
70
120
140
μA
μA
μV p-p
μs
ppm
ppm
dB
mA
ADR380/ADR381
ADR381 ELECTRICAL CHARACTERISTICS
VIN = 5.0 V, TA = 25°C, unless otherwise noted.
Table 4.
Parameter
Symbol
Output Voltage
Initial Accuracy Error
VOUT
VOERR
Temperature Coefficient
TCVOUT
Minimum Supply Voltage Headroom
Line Regulation
Load Regulation
VIN − VOUT
ΔVOUT/DVIN
ΔVOUT/DILOAD
Quiescent Current
IIN
Voltage Noise
Turn-On Settling Time
Long-Term Stability
Output Voltage Hysteresis
Ripple Rejection Ratio
Short Circuit to GND
eN
tR
ΔVOUT
VOUT_HYS
RRR
ISC
Conditions
Min
Typ
Max
Unit
2.494
−6
−0.24
2.500
2.506
+6
+0.24
25
21
V
mV
%
ppm/°C
ppm/°C
mV
ppm/V
ppm/mA
−40°C < TA < +85°C
0°C < TA < 70°C
ILOAD ≤ 2 mA
VIN = 2.8 V to 15 V, −40°C < TA < +85°C
VIN = 3.5 V, ILOAD = 0 mA to 5 mA,
−40°C < TA < +85°C
No load
−40°C < TA < +85°C
0.1 Hz to 10 Hz
5
3
300
10
100
25
70
120
140
μA
μA
μV p-p
μs
ppm
ppm
dB
mA
5
20
50
75
85
25
1000 Hrs
fIN = 60 Hz
VIN = 5.0 V, TA = 25°C, unless otherwise noted.
Table 5.
Parameter
Symbol
Output Voltage
Initial Accuracy Error
VOUT
VOERR
Temperature Coefficient
TCVOUT
Minimum Supply Voltage Headroom
Line Regulation
Load Regulation
VIN − VOUT
ΔVOUT/DVIN
ΔVOUT/DILOAD
Quiescent Current
IIN
Voltage Noise
Turn-On Settling Time
Long-Term Stability
Output Voltage Hysteresis
Ripple Rejection Ratio
Short Circuit to GND
eN
tR
ΔVOUT
VOUT_HYS
RRR
ISC
Conditions
−40°C < TA < +85°C
0°C < TA < 70°C
ILOAD ≤ 2 mA
VIN = 2.8 V to 15 V, −40°C < TA < +85°C
VIN = 3.5 V, ILOAD = 0 mA to 5 mA,
−40°C < TA < +85°C
No load
−40°C < TA < +85°C
0.1 Hz to 10 Hz
1000 Hrs
fIN = 60 Hz
Rev. C | Page 4 of 16
Min
Typ
Max
Unit
2.494
−6
−0.24
2.500
2.506
+6
+0.24
25
21
V
mV
%
ppm/°C
ppm/°C
mV
ppm/V
ppm/mA
5
3
300
10
100
5
20
50
75
85
25
25
70
120
140
μA
μA
μV p-p
μs
ppm
ppm
dB
mA
ADR380/ADR381
ABSOLUTE MAXIMUM RATINGS
THERMAL RESISTANCE
Table 6.
Parameter1
Supply Voltage
Output Short-Circuit Duration to GND
VIN > 15 V
VIN ≤ 15 V
Storage Temperature Range
Operating Temperature Range
Junction Temperature Range
Lead Temperature (Soldering, 60 Sec)
1
θJA is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Rating
18 V
Table 7.
10 sec
Indefinite
−65°C to +150°C
−40°C to +85°C
−65°C to +150°C
300°C
Package Type
3-Lead SOT-23 (RT)
ESD CAUTION
Absolute maximum ratings apply at 25°C, unless otherwise noted.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. C | Page 5 of 16
θJA
333
Unit
°C/W
ADR380/ADR381
TYPICAL PERFORMANCE CHARACTERISTICS
2.054
60
2.052
50
TEMPERATURE +25°C
–40°C
+85°C
+25°C
SAMPLE 1
40
SAMPLE 2
FREQUENCY
2.048
SAMPLE 3
2.046
10
35
TEMPERATURE (°C)
60
85
0
–15 –13 –11 –9 –7 –5 –3 –1 1 3
PPM (°C)
02175-002
–15
Figure 2. ADR380 Output Voltage vs. Temperature
2.504
120
SUPPLY CURRENT (µA)
140
SAMPLE 1
2.500
SAMPLE 2
2.498
7
9
11 13 15
Figure 5. ADR381 Output Voltage Temperature Coefficient
2.506
2.502
5
02175-005
10
2.042
–40
SAMPLE 3
2.496
+85°C
+25°C
100
80
–40°C
60
40
20
–15
10
35
TEMPERATURE (°C)
60
85
0
2.5
02175-003
2.494
–40
Figure 3. ADR381 Output Voltage vs. Temperature
5.0
7.5
10.0
INPUT VOLTAGE (V)
12.5
15.0
02175-006
VOUT (V)
30
20
2.044
Figure 6. ADR380 Supply Current vs. Input Voltage
140
30
TEMPERATURE +25°C
–40°C
+85°C
+25°C
120
SUPPLY CURRENT (µA)
25
20
TOTAL NUMBER
OF DEVICES = 130
15
10
5
0
–11 –9 –7 –5 –3 –1
+85°C
+25°C
100
80
–40°C
60
40
20
1
3 5 7
PPM (°C)
9
11 13 15 17 19
0
2.5
02175-004
FREQUENCY
TOTAL NUMBER
OF DEVICES IN
SAMPLE = 450
Figure 4. ADR380 Output Voltage Temperature Coefficient
5.0
7.5
10.0
INPUT VOLTAGE (V)
12.5
Figure 7. ADR381 Supply Current vs. Input Voltage
Rev. C | Page 6 of 16
15.0
02175-007
VOUT (V)
2.050
ADR380/ADR381
5
70
ILOAD = 0mA TO 5mA
VIN = 2.8V TO 15V
50
LINE REGULATION (ppm/V)
LOAD REGULATION (ppm/mA)
60
VIN = 3V
40
30
VIN = 5V
20
4
3
2
1
–15
10
35
TEMPERATURE (°C)
60
85
0
–40
02175-008
0
–40
Figure 8. ADR380 Load Regulation vs. Temperature
–15
10
35
TEMPERATURE (°C)
60
85
02175-011
10
Figure 11. ADR381 Line Regulation vs. Temperature
70
0.8
ILOAD = 5mA
DIFFERENTIAL VOLTAGE (V)
LOAD REGULATION (ppm/mA)
60
VIN = 3.5V
50
40
VIN = 5V
30
20
0.6
+85°C
–40°C
0.4
+25°C
0.2
–15
10
35
TEMPERATURE (°C)
60
85
0
02175-009
0
–40
0
Figure 9. ADR381 Load Regulation vs. Temperature
1
2
3
LOAD CURRENT (mA)
4
5
02175-012
10
Figure 12. ADR380 Minimum Input/Output Differential Voltage vs.
Load Current
0.8
5
DIFFERENTIAL VOLTAGE (V)
4
3
2
1
0.6
+85°C
0.4
+25°C
0.2
0
–40
–15
10
35
TEMPERATURE (°C)
60
85
0
0
Figure 10. ADR380 Line Regulation vs. Temperature
1
2
3
LOAD CURRENT (mA)
4
5
02175-013
–40°C
02175-010
LINE REGULATION (ppm/V)
VIN = 2.5V TO 15V
Figure 13. ADR381 Minimum Input/Output Differential Voltage vs.
Load Current
Rev. C | Page 7 of 16
ADR380/ADR381
60
TEMPERATURE +25°C
–40°C
+85°C
+25°C
CBYPASS = 0µF
50
VOUT
FREQUENCY
40
1V/DIV
2
30
LINE INTERRUPTION
20
1
VIN
0.5V/DIV
0.5V/DIV
02175-017
0
–260 –200 –140 –80 –20 40 100 160 220 280 340 400
HYSTERESIS (ppm)
02175-014
10
TIME (10µs/DIV)
Figure 17. ADR381 Line Transient Response
Figure 14. ADR381 VOUT Hysteresis
CBYPASS = 0.1µF
VOUT
2µV/DIV
1V/DIV
2
1
LINE INTERRUPTION
0.5V/DIV
0.5V/DIV
02175-018
TIME (1s/DIV)
02175-015
1
TIME (10µs/DIV)
Figure 15. ADR381 Typical Noise Voltage, 0.1 Hz to 10 Hz
Figure 18. ADR381 Line Transient Response
CL = 0µF
VOUT
100µV/DIV
1V/DIV
2
1
LOAD OFF
VLOAD ON
2V/DIV
1
Figure 16. ADR381 Typical Noise Voltage, 10 Hz to 10 kHz
TIME (200µs/DIV)
Figure 19. ADR381 Load Transient Response with CL = 0 μF
Rev. C | Page 8 of 16
02175-019
TIME (10ms/DIV)
02175-016
ILOAD = 1mA
ADR380/ADR381
CBYPASS = 0.1µF
CL = 1nF
VOUT
CL = 40pF
ZOUT (10Ω/DIV)
1V/DIV
2
LOAD OFF
CL = 0.1µF
CL = 1µF
VLOAD ON
2V/DIV
1
TIME (200µs/DIV)
10
100
1k
10k
FREQUENCY (Hz)
100k
1M
02175-023
02175-020
ILOAD = 1mA
Figure 23. ADR381 Output Impedance vs. Frequency
Figure 20. ADR381 Load Transient Response with CL = 1 nF
150
CL = 100nF
100
VOUT
50
DRIFT (ppm)
1V/DIV
2
LOAD OFF
0
–50
VLOAD ON
2V/DIV
–100
ILOAD = 1mA
CONDITIONS: VIN = 6V IN A CONTROLLED
ENVIRONMENT 50°C ± 1°C
–150
02175-021
TIME (200µs/DIV)
0
100
Figure 21. ADR381 Load Transient Response with CL = 100 nF
200
300
400
500 600
HOURS
700
800
900
1000
02175-024
1
Figure 24. ADR380 Long-Term Drift
150
RL = 500Ω
100
50
DRIFT (ppm)
VOUT
2
2V/DIV
0
–50
VIN
5V/DIV
1
–100
Figure 22. ADR381 Turn-On/Turn-Off Response at 5 V
–150
0
100
200
300
400
500 600
HOURS
700
800
Figure 25. ADR381 Long-Term Drift
Rev. C | Page 9 of 16
900
1000
02175-025
TIME (200µs/DIV)
02175-022
CONDITIONS: VIN = 6V IN A CONTROLLED
ENVIRONMENT 50°C ± 1°C
ADR380/ADR381
TERMINOLOGY
Temperature Coefficient
The change of output voltage over the operating temperature
change and normalized by the output voltage at 25°C, expressed
in ppm/°C. The equation follows:
TCVOUT [ppm/°C] =
VOUT (T2 ) −VOUT (T1 )
VOUT (25°C) × (T2 − T1 )
Long-Term Stability
A typical shift in output voltage over 1000 hours at a controlled
temperature. Figure 24 and Figure 25 show a sample of parts
measured at different intervals in a controlled environment of
50°C for 1000 hours.
×106
ΔVOUT = VOUT (t 0 ) − VO UT (t 1 )
ΔVO UT [ppm] =
where:
VOUT (25°C) = VOUT at 25°C.
VOUT (T1) = VOUT at Temperature 1.
VOUT (T2) = VOUT at Temperature 2.
Line Regulation
The change in output voltage due to a specified change in input
voltage. It includes the effects of self-heating. Line regulation is
expressed in either percent per volt, parts-per-million per volt,
or microvolts per volt change in input voltage.
Load Regulation
The change in output voltage due to a specified change in load
current. It includes the effects of self-heating. Load regulation is
expressed in either microvolts per milliampere, parts-per-million
per milliampere, or ohms of dc output resistance.
VOUT (t 0 ) − VOUT (t 1 )
VO UT (t 0 )
× 10 6
where:
VOUT (t0) = VOUT at Time 0.
VOUT (t1) = VOUT after 1000 hours of operation at a controlled
temperature.
Note that 50°C was chosen because most applications run at a
higher temperature than 25°C.
Thermal Hysteresis
The change of output voltage after the device is cycled through
temperature from +25°C to −40°C to +85°C and back to +25°C.
This is a typical value from a sample of parts put through such
a cycle.
VOUT _ HYS = VOUT (25°C) −VOUT _ TC
VOUT _ HYS [ppm] =
VOUT (25°C) − VOUT _ TC
VOUT (25°C)
× 106
where:
VOUT (25°C) = VOUT at 25°C.
VOUT_TC = VOUT at 25°C after a temperature cycle from +25°C to
−40°C to +85°C and back to +25°C.
Rev. C | Page 10 of 16
ADR380/ADR381
THEORY OF OPERATION
Band gap references are the high performance solution for low
supply voltage and low power voltage reference applications, and
the ADR380/ADR381 are no exception. However, the uniqueness
of this product lies in its architecture. As shown in Figure 26,
the ideal zero TC band gap voltage is referenced to the output,
not to ground. The band gap cell consists of the PNP pair Q51
and Q52, running at unequal current densities. The difference
in VBE results in a voltage with a positive TC that is amplified
by the ratio of 2 × R58/R54. This PTAT voltage, combined with
the VBE of Q51 and Q52, produce the stable band gap voltage.
Reduction in the band gap curvature is performed by the ratio
of the two resistors, R44 and R59. Precision laser trimming and
other patented circuit techniques are used to further enhance
the drift performance.
VIN
Q1
R49
–
Q51
R53
R48
R60
TJ − TA
θ JA
where:
PD is the device power dissipation,
TJ and TA are junction and ambient temperatures, respectively.
θJA is the device package thermal resistance.
OUTPUT CAPACITOR
Q52
R61
GND
Figure 26. Simplified Schematic
02175-026
+
PD =
An input capacitor is not required on the ADR380/ADR381.
There is no limit for the value of the capacitor used on the input,
but a capacitor on the input improves transient response in
applications where the load current suddenly increases.
R58
R54
The ADR380/ADR381 are capable of delivering load currents to
5 mA with an input voltage that ranges from 2.8 V (ADR381 only)
to 15 V. When this device is used in applications with large input
voltages, take care to avoid exceeding the specified maximum
power dissipation or junction temperature that may result in
premature device failure. Use the following formula to calculate
a device’s maximum junction temperature or dissipation:
INPUT CAPACITOR
VOUT
R44
R59
DEVICE POWER DISSIPATION CONSIDERATIONS
The ADR380/ADR381 do not need an output capacitor for
stability under any load condition. Using an output capacitor,
typically 0.1 μF, removes any very low level noise voltage and does
not affect the operation of the part. The only parameter that
degrades by applying an output capacitor is turn-on time. (This
varies depending on the size of the capacitor.) Load transient
response is also improved with an output capacitor, which acts
as a source of stored energy for a sudden increase in load current.
Rev. C | Page 11 of 16
ADR380/ADR381
APPLICATIONS INFORMATION
STACKING REFERENCE ICs FOR ARBITRARY
OUTPUTS
Some applications may require two reference voltage sources,
which are a combined sum of standard outputs. The following
circuit shows how this stacked output reference can be
implemented:
VOUT
2
VOUT2
The circuit in Figure 28 avoids the need for tightly matched
resistors with the use of an active integrator circuit. In this
circuit, the output of the voltage reference provides the input
drive for the integrator. The integrator, to maintain circuit
equilibrium, adjusts its output to establish the proper relationship between the reference VOUT and GND. Thus, any negative
output voltage desired can be chosen by substituting for the
appropriate reference IC. A precaution should be noted with
this approach: although rail-to-rail output amplifiers work best
in the application, these operational amplifiers require a finite
amount (mV) of headroom when required to provide any load
current. The choice for the circuit’s negative supply should take
this issue into account.
U2
ADR380/
ADR381
C1
0.1µF
C2
1µF
GND
3
1
VOUT
VIN
2
VOUT1
U1
C3
0.1µF
ADR380/
ADR381
C4
1µF
R1
3.9kΩ
02175-027
GND
3
Figure 27. Stacking Voltage References with the ADR380/ADR381
Two ADR380s or ADR381s are used; the outputs of the individual references are simply cascaded to reduce the supply current.
Such configuration provides two output voltages: VOUT1 and
VOUT2. VOUT1 is the terminal voltage of U1, while VOUT2 is the
sum of this voltage and the terminal voltage of U2. U1 and U2
can be chosen for the two different voltages that supply the
required outputs.
While this concept is simple, a precaution is in order. Because
the lower reference circuit must sink a small bias current from
U2, plus the base current from the series PNP output transistor
in U2, the external load of either U1 or R1 must provide a path
for this current. If the U1 minimum load is not well-defined,
Resistor R1 should be used, set to a value that conservatively
passes 600 μA of current with the applicable VOUT1 across it. Note
that the two U1 and U2 reference circuits are locally treated as
macrocells, each having its own bypasses at input and output for
optimum stability. Both U1 and U2 in this circuit can source dc
currents up to their full rating. The minimum input voltage, VIN, is
determined by the sum of the outputs, VOUT2, plus the 300 mV
dropout voltage of U2.
1 V
IN
VIN
C1
1µF
C2
0.1µF
R4
1kΩ
VOUT 2
C4
1µF
U1
ADR380/
ADR381
GND
+5V
R3
100kΩ
C3
1µF
U2
A1
+V
–V
3
R5
100Ω
–VREF
OP195
02175-028
VIN
–5V
Figure 28. Negative Precision Voltage Reference Using No Precision Resistors
PRECISION CURRENT SOURCE
Many times in low power applications, the need arises for a
precision current source that can operate on low supply voltages.
As shown in Figure 29, the ADR380/ADR381 can be configured
as a precision current source. The circuit configuration illustrated
is a floating current source with a grounded load. The reference
output voltage is bootstrapped across RSET (R1 + P1), which sets
the output current into the load. With this configuration, circuit
precision is maintained for load currents in the range from the
reference supply current, typically 90 μA to approximately 5 mA.
C1
1µF
A NEGATIVE PRECISION REFERENCE WITHOUT
PRECISION RESISTORS
1
VIN
C2
0.1µF
VIN
VOUT
U1
ADR380/
ADR381
GND
3
In many current-output CMOS DAC applications where the
output signal voltage must be of the same polarity as the
reference voltage, it is often required to reconfigure a currentswitching DAC into a voltage-switching DAC through the use
of a 1.25 V reference, an op amp, and a pair of resistors. Using
a current switching DAC directly requires an additional operational amplifier at the output to reinvert the signal. A negative
voltage reference is then desirable from the point that an additional
operational amplifier is not required for either reinversion
Rev. C | Page 12 of 16
2
C3
1µF
ISY
ADJUST
R1
P1
IOUT
RL
Figure 29. Precision Current Source
02175-029
1
VIN
(current-switching mode) or amplification (voltage-switching
mode) of the DAC output voltage. In general, any positive voltage
reference can be converted into a negative voltage reference
through the use of an operational amplifier and a pair of matched
resistors in an inverting configuration. The disadvantage to this
approach is that the largest single source of error in the circuit is
the relative matching of the resistors used.
ADR380/ADR381
VIN
R1
100kΩ
In some cases, the user may want higher output current delivered
to a load and still achieve better than 0.5% accuracy from the
ADR380/ADR381. The accuracy for a reference is normally
specified on the data sheet with no load. However, the output
voltage changes with load current.
The circuit in Figure 30 provides high current without compromising the accuracy of the ADR380/ADR381. By op amp action,
VOUT follows VREF with very low drop in R1. To maintain circuit
equilibrium, the op amp also drives the N-Channel MOSFET
Q1 into saturation to maintain the current needed at different
loads. R2 is optional to prevent oscillation at Q1. In such an
approach, hundreds of milliamps of load current can be achieved,
and the current is limited by the thermal limitation of Q1. VIN =
VOUT + 300 mV.
8V TO 15V
1
VIN
VOUT
U1
ADR380/
ADR381
2
+V
A1
–V
AD820
C1
0.001µF
Q1
2N7002
R2
100Ω
VOUT
RL
GND
3
Figure 30. ADR380/ADR381 for Precision High Current Voltage Source
Rev. C | Page 13 of 16
02175-030
PRECISION HIGH CURRENT VOLTAGE SOURCE
ADR380/ADR381
OUTLINE DIMENSIONS
3.04
2.90
2.80
1.40
1.30
1.20
3
1
2
0.60
0.45
2.05
1.78
1.02
0.95
0.88
2.64
2.10
1.03
0.89
1.12
0.89
0.100
0.013
0.54
REF
GAUGE
PLANE
0.180
0.085
0.25
0.60 MAX
0.30 MIN
COMPLIANT TO JEDEC STANDARDS TO-236-AB
011909-C
0.51
0.37
SEATING
PLANE
Figure 31. 3-Lead Small Outline Transistor Package [SOT-23-3]
(RT-3)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADR380ARTZ-REEL7
ADR381ARTZ-R2
ADR381ARTZ-REEL7
1
2
Temperature Range
−40°C to +85°C
−40°C to +85°C
−40°C to +85°C
Package Description
3-Lead SOT-23
3-Lead SOT-23
3-Lead SOT-23
Z = RoHS Compliant Part, # denotes RoHS compliant product may be top or bottom marked.
Prior to Date Code 0542, the ADR380ARTZ-REEL7 parts were branded with R2A without the #.
Rev. C | Page 14 of 16
Package
Option
RT-3
RT-3
RT-3
Branding 2
R2D
R3A
R3A#
Output
Voltage
2.048
2.500
2.500
Ordering
Quantity
3,000
250
3,000
ADR380/ADR381
NOTES
Rev. C | Page 15 of 16
ADR380/ADR381
NOTES
©2001–2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D02175-0-10/10(C)
Rev. C | Page 16 of 16
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