Keithley 7021 Manual
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Instruction Manual
Model 7021
Multiplexer-Digital I/O Card
Contains Operating and Servicing Information
WARRANTY
Keithley Instruments, Inc. warrants this product to be free from defects in material and workmanship for a period of 1 year from date of
shipment.
Keithley Instruments, Inc. warrants the following items for 90 days from the date of shipment: probes, cables, rechargeable batteries,
diskettes, and documentation.
During the warranty period, we will, at our option, either repair or replace any product that proves to be defective.
To exercise this warranty, write or call your local Keithley representative, or contact Keithley headquarters in Cleveland, Ohio. You will
be given prompt assistance and return instructions. Send the product, transportation prepaid, to the indicated service facility. Repairs
will be made and the product returned, transportation prepaid. Repaired or replaced products are warranted for the balance of the original warranty period, or at least 90 days.
LIMITATION OF WARRANTY
This warranty does not apply to defects resulting from product modification without Keithley’s express written consent, or misuse of
any product or part. This warranty also does not apply to fuses, software, non-rechargeable batteries, damage from battery leakage, or
problems arising from normal wear or failure to follow instructions.
THIS WARRANTY IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED OR IMPLIED, INCLUDING ANY IMPLIED
WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR USE. THE REMEDIES PROVIDED HEREIN ARE
BUYER’S SOLE AND EXCLUSIVE REMEDIES.
NEITHER KEITHLEY INSTRUMENTS, INC. NOR ANY OF ITS EMPLOYEES SHALL BE LIABLE FOR ANY DIRECT, INDIRECT, SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OF ITS INSTRUMENTS AND
SOFTWARE EVEN IF KEITHLEY INSTRUMENTS, INC., HAS BEEN ADVISED IN ADVANCE OF THE POSSIBILITY OF
SUCH DAMAGES. SUCH EXCLUDED DAMAGES SHALL INCLUDE, BUT ARE NOT LIMITED TO: COSTS OF REMOVAL
AND INSTALLATION, LOSSES SUSTAINED AS THE RESULT OF INJURY TO ANY PERSON, OR DAMAGE TO PROPERTY.
Keithley Instruments, Inc. • 28775 Aurora Road • Cleveland, OH 44139 • 440-248-0400 • Fax: 440-248-6168 • http://www.keithley.com
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FRANCE:
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GREAT BRITAIN:
ITALY:
NETHERLANDS:
SWITZERLAND:
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Model 7021 Multiplexer-Digital I/O Card
Instruction Manual
©1997, Keithley Instruments, Inc.
All rights reserved.
Cleveland, Ohio, U.S.A.
First Printing, May 1997
Document Number: 7021-901-01 Rev. A
Manual Print History
The print history shown below lists the printing dates of all Revisions and Addenda created for this manual. The Revision
Level letter increases alphabetically as the manual undergoes subsequent updates. Addenda, which are released between Revisions, contain important change information that the user should incorporate immediately into the manual. Addenda are numbered sequentially. When a new Revision is created, all Addenda associated with the previous Revision of the manual are
incorporated into the new Revision of the manual. Each new Revision includes a revised copy of this print history page.
Revision A (Document Number 7021-901-01)........................................................................................ May 1997
All Keithley product names are trademarks or registered trademarks of Keithley Instruments, Inc.
Other brand and product names are trademarks or registered trademarks of their respective holders.
Safety Precautions
The following safety precautions should be observed before using
this product and any associated instrumentation. Although some instruments and accessories would normally be used with non-hazardous voltages, there are situations where hazardous conditions
may be present.
This product is intended for use by qualified personnel who recognize shock hazards and are familiar with the safety precautions required to avoid possible injury. Read the operating information
carefully before using the product.
The types of product users are:
Responsible body is the individual or group responsible for the use
and maintenance of equipment, and for ensuring that operators are
adequately trained.
Operators use the product for its intended function. They must be
trained in electrical safety procedures and proper use of the instrument. They must be protected from electric shock and contact with
hazardous live circuits.
Maintenance personnel perform routine procedures on the product
to keep it operating, for example, setting the line voltage or replacing consumable materials. Maintenance procedures are described in
the manual. The procedures explicitly state if the operator may perform them. Otherwise, they should be performed only by service
personnel.
Service personnel are trained to work on live circuits, and perform
safe installations and repairs of products. Only properly trained service personnel may perform installation and service procedures.
Exercise extreme caution when a shock hazard is present. Lethal
voltage may be present on cable connector jacks or test fixtures. The
American National Standards Institute (ANSI) states that a shock
hazard exists when voltage levels greater than 30V RMS, 42.4V
peak, or 60VDC are present. A good safety practice is to expect that hazardous voltage is present in any unknown circuit before measuring.
Users of this product must be protected from electric shock at all
times. The responsible body must ensure that users are prevented
access and/or insulated from every connection point. In some cases,
connections must be exposed to potential human contact. Product
users in these circumstances must be trained to protect themselves
from the risk of electric shock. If the circuit is capable of operating
at or above 1000 volts, no conductive part of the circuit may be
exposed.
As described in the International Electrotechnical Commission
(IEC) Standard IEC 664, digital multimeter measuring circuits
(e.g., Keithley Models 175A, 199, 2000, 2001, 2002, and 2010)
measuring circuits are Installation Category II. All other instruments’ signal terminals are Installation Category I and must not be
connected to mains.
Do not connect switching cards directly to unlimited power circuits.
They are intended to be used with impedance limited sources.
NEVER connect switching cards directly to AC mains. When connecting sources to switching cards, install protective devices to limit fault current and voltage to the card.
Before operating an instrument, make sure the line cord is connected to a properly grounded power receptacle. Inspect the connecting
cables, test leads, and jumpers for possible wear, cracks, or breaks
before each use.
For maximum safety, do not touch the product, test cables, or any
other instruments while power is applied to the circuit under test.
ALWAYS remove power from the entire test system and discharge
any capacitors before: connecting or disconnecting cables or jumpers, installing or removing switching cards, or making internal
changes, such as installing or removing jumpers.
Do not touch any object that could provide a current path to the
common side of the circuit under test or power line (earth) ground.
Always make measurements with dry hands while standing on a
dry, insulated surface capable of withstanding the voltage being
measured.
Do not exceed the maximum signal levels of the instruments and accessories, as defined in the specifications and operating information, and as shown on the instrument or test fixture panels, or
switching card.
When fuses are used in a product, replace with same type and rating
for continued protection against fire hazard.
Chassis connections must only be used as shield connections for
measuring circuits, NOT as safety earth ground connections.
If you are using a test fixture, keep the lid closed while power is applied to the device under test. Safe operation requires the use of a
lid interlock.
If a
screw is present, connect it to safety earth ground using the
wire recommended in the user documentation.
The ! symbol on an instrument indicates that the user should refer to the operating instructions located in the manual.
The
symbol on an instrument shows that it can source or measure 1000 volts or more, including the combined effect of normal
and common mode voltages. Use standard safety precautions to
avoid personal contact with these voltages.
The WARNING heading in a manual explains dangers that might
result in personal injury or death. Always read the associated information very carefully before performing the indicated procedure.
The CAUTION heading in a manual explains hazards that could
damage the instrument. Such damage may invalidate the warranty.
Instrumentation and accessories shall not be connected to humans.
Before performing any maintenance, disconnect the line cord and
all test cables.
To maintain protection from electric shock and fire, replacement
components in mains circuits, including the power transformer, test
leads, and input jacks, must be purchased from Keithley Instruments. Standard fuses, with applicable national safety approvals,
may be used if the rating and type are the same. Other components
that are not safety related may be purchased from other suppliers as
long as they are equivalent to the original component. (Note that selected parts should be purchased only through Keithley Instruments
to maintain accuracy and functionality of the product.) If you are
unsure about the applicability of a replacement component, call a
Keithley Instruments office for information.
To clean the instrument, use a damp cloth or mild, water based
cleaner. Clean the exterior of the instrument only. Do not apply
cleaner directly to the instrument or allow liquids to enter or spill
on the instrument.
MODEL 7021 SPECIFICATIONS
ANALOG MULTIPLEXER SPECIFICATIONS
DIGITAL I/O SPECIFICATIONS
MULTPLEXER CONFIGURATION: Independent 1 × 12 and 1 × 18
multiplex banks. Adjacent banks can be connected together.
Jumpers can be removed to isolate any bank from the backplane.
CONTACT CONFIGURATION: 2-pole Form A (HI, LO).
MAXIMUM SIGNAL: 110V DC, 110V rms, 155V peak between any
two inputs or chassis, 1A switched, 30VA (resistive load).
CONTACT LIFE: Cold Switching: 108 closures.
Maximum Signal Levels: 105 closures.
CHANNEL RESISTANCE (per conductor): <1.25Ω.
CONTACT POTENTIAL: <3µV per channel contact pair
<9µV per single contact
OFFSET CURRENT: <100pA.
ACTUATION TIME: <3ms.
ISOLATION:1
Bank:
>109Ω, <25pF.
Channel to Channel: >109Ω, <50pF.
Differential:
Configured as 1×12: >109Ω, <100pF.
Configured as 1×18: >109Ω, <150pF.
Configured as 1×30: >109Ω, <200pF.
Common Mode:
Configured as 1×12: >109Ω, <200pF.
Configured as 1×18: >109Ω, <250pF.
Configured as 1×30: >109Ω, <350pF.
1
CROSSTALK (1MHz, 50Ω Load): <–40dB.
INSERTION LOSS1 (50Ω Source, 50Ω Load): <0.25dB below 1MHz,
<3dB below 10MHz.
RELAY DRIVE CURRENT (per relay): 16mA.
1 Specifications apply with no more than one channel closed.
DIGITAL I/O CAPABILITY: 10 independent inputs.
10 independent outputs.
OUTPUT:
Configuration: 10 open collector drivers with factory installed
10kΩ pull-up resistors. Each driver has an internal flyback diode.
Pull-Up Voltage: 5V internally supplied, external connection provided for user supplied voltage up to 42V max. Outputs short circuit protected up to 25V.
Maximum Sink Current: Per Channel: 250mA.
Per Card: 1A.
Logic: Hardware user configurable for negative or positive true
logic levels.
INPUT:
Configuration: 10 inputs with internal 10kΩ pull-up resistors
provided. Input resistors can be set for pull-up or pull-down
configuration.
MAXIMUM VOLTAGE LEVEL: 42V peak.
LOGIC: Positive true.
GENERAL
CONNECTOR TYPE: 96-pin male DIN connector.
ENVIRONMENT: Operating: 0° to 50°C, up to 35°C <80% RH.
Storage: –25° to 65°C.
EMC: Conforms with European Union Directive 89/336/EEC
EN 55011, EN 50082-1, EN 61000-3-2 and 61000-3-3, FCC part 15
class B.
SAFETY: Conforms with European Union Directive 73/23/EEC
EN 61010-1, UL 3111-1.
Specifications subject to change without notice.
Multiplexer Configuration
Digital I/O Configuration
Bank A
VEXT
5V
5V
HI
LO
12 Channels
HI
HI
Output
LO
HI
J
Backplane
Output
GND
J
Input
10K
LO
LO
J
10K
10K
J
GND
Bank B
HI
Output Channel 1 of 10
LO
18 Channels
HI
HI
Output
LO
LO
J
HI
J
Backplane
LO
Input Channel 1 of 10
Table of Contents
1
General Information
Introduction .......................................................................................................................................................... 1-1
Features ............................................................................................................................................................... 1-1
Warranty information.......................................................................................................................................... 1-2
Manual addenda .................................................................................................................................................. 1-2
Safety symbols and terms ................................................................................................................................... 1-2
Specifications ...................................................................................................................................................... 1-2
Unpacking and inspection ................................................................................................................................... 1-2
Inspection for damage ................................................................................................................................. 1-2
Handling precautions ................................................................................................................................... 1-2
Shipping contents ........................................................................................................................................ 1-2
Instruction manual....................................................................................................................................... 1-3
Repacking for shipment ...................................................................................................................................... 1-3
Optional accessories............................................................................................................................................ 1-3
2
Multiplexer Configuration
Introduction ......................................................................................................................................................... 2-1
Basic multiplexer configurations ........................................................................................................................ 2-1
Multiplexer bank-to-bank jumpers............................................................................................................... 2-2
Backplane jumpers ....................................................................................................................................... 2-2
Typical multiplexer switching schemes ............................................................................................................... 2-3
Single-ended switching ................................................................................................................................ 2-3
Differential switching................................................................................................................................... 2-4
Sensing ......................................................................................................................................................... 2-4
SMU connections ......................................................................................................................................... 2-5
Multiplexer expansion.......................................................................................................................................... 2-5
Multiple-card switching systems ................................................................................................................. 2-5
Mainframe multiplexer expansion ............................................................................................................... 2-8
i
3
Digital I/O Configuration
Introduction ......................................................................................................................................................... 3-1
Digital outputs ..................................................................................................................................................... 3-1
Controlling pull-up devices ................................................................................................................................. 3-1
Controlling devices using pull-up resistors ......................................................................................................... 3-2
Digital inputs ....................................................................................................................................................... 3-3
4
Card Connections and Installation
Introduction ......................................................................................................................................................... 4-1
Handling precautions........................................................................................................................................... 4-1
Multiplexer connections ...................................................................................................................................... 4-2
Backplane row jumpers ............................................................................................................................... 4-2
Bankplane row jumper removal .................................................................................................................. 4-2
Bankplane row jumper installation.............................................................................................................. 4-2
Bank-to-bank jumpers ..................................................................................................................................4-3
Digital I/O connections........................................................................................................................................ 4-3
Voltage source jumper................................................................................................................................. 4-3
Pull-up resistors ........................................................................................................................................... 4-4
Configuring digital I/O output logic............................................................................................................ 4-4
Configuring digital I/O input pull-up resistance ......................................................................................... 4-5
Multi-pin (mass termination) connector card ...................................................................................................... 4-5
Typical multiplexer connection schemes ............................................................................................................ 4-9
Single-card system..................................................................................................................................... 4-10
Two-card system ....................................................................................................................................... 4-11
Two-mainframe system ............................................................................................................................. 4-12
Typical digital I/O connection schemes ............................................................................................................ 4-14
Output connection schemes....................................................................................................................... 4-14
Input connection scheme ........................................................................................................................... 4-15
Model 7021 installation and removal ................................................................................................................ 4-16
Card installation..........................................................................................................................................4-16
Card removal ..............................................................................................................................................4-16
5
Operation
Introduction ......................................................................................................................................................... 5-1
Power limits......................................................................................................................................................... 5-1
Analog multiplexer maximum signal levels................................................................................................ 5-1
Digital I/O maximum signal levels.............................................................................................................. 5-1
Mainframe control of the card ............................................................................................................................. 5-1
Channel assignments ................................................................................................................................... 5-2
Closing and opening channels ..................................................................................................................... 5-4
Scanning channels ....................................................................................................................................... 5-4
Reading input channels................................................................................................................................ 5-4
IEEE-488 bus operation .............................................................................................................................. 5-5
Multiplexer switching examples.......................................................................................................................... 5-6
Resistor testing ............................................................................................................................................ 5-6
Transistor testing ....................................................................................................................................... 5-10
Testing with matrix-digital I/O cards .........................................................................................................5-12
ii
Measurement considerations.............................................................................................................................
Path isolation.............................................................................................................................................
Magnetic fields..........................................................................................................................................
Radio frequency interference ....................................................................................................................
Ground loops.............................................................................................................................................
Keeping connectors clean .........................................................................................................................
AC frequency response .............................................................................................................................
6
5-13
5-13
5-14
5-14
5-14
5-15
5-15
Service Information
Introduction ......................................................................................................................................................... 6-1
Handling and cleaning precautions ..................................................................................................................... 6-1
Performance verification..................................................................................................................................... 6-2
Environmental conditions ........................................................................................................................... 6-2
Recommended equipment........................................................................................................................... 6-2
Multiplexer connections.............................................................................................................................. 6-2
Channel resistance tests .............................................................................................................................. 6-3
Offset current tests ...................................................................................................................................... 6-4
Contact potential tests ................................................................................................................................. 6-6
Bank and channel-to-channel isolation tests ............................................................................................... 6-7
Differential and common-mode isolation tests ......................................................................................... 6-11
Channel functionality test ................................................................................................................................. 6-13
Special handling of static-sensitive devices...................................................................................................... 6-13
Principles of operation ...................................................................................................................................... 6-14
Block diagram ........................................................................................................................................... 6-14
ID data circuits .......................................................................................................................................... 6-15
Multiplexer relay control .......................................................................................................................... 6-15
Multiplexer relay power control................................................................................................................ 6-16
Digital I/O output channel control ............................................................................................................ 6-16
Digital I/O input channel control .............................................................................................................. 6-16
Power-on safeguard................................................................................................................................... 6-16
Troubleshooting ................................................................................................................................................ 6-17
Troubleshooting equipment ...................................................................................................................... 6-17
Troubleshooting access ............................................................................................................................. 6-17
Troubleshooting procedure ....................................................................................................................... 6-18
7
Replaceable Parts
Introduction ......................................................................................................................................................... 7-1
Parts lists .............................................................................................................................................................. 7-1
Ordering information .......................................................................................................................................... 7-1
Factory service .................................................................................................................................................... 7-1
Component layouts and schematic diagrams ...................................................................................................... 7-1
Index
iii
List of Illustrations
2
Matrix Configuration
Figure 2-1
Figure 2-2
Figure 2-3
Figure 2-4
Figure 2-5
Figure 2-6
Figure 2-7
Figure 2-8
Figure 2-9
Figure 2-10
Figure 2-11
Figure 2-12
Model 7021 simplified schematic ............................................................................................................... 2-1
Dual 1 × 12 and 1 × 18 multiplexer configuration (jumpers not installed).................................................. 2-2
One 1 × 30 multiplexer configuration (jumpers installed)........................................................................... 2-2
Model 7001/7002 analog backplane ........................................................................................................... 2-2
Bank connections to backplane................................................................................................................... 2-3
Single-ended switching example ................................................................................................................ 2-3
Differential switching example ................................................................................................................... 2-4
Sensing example ......................................................................................................................................... 2-4
SMU connections ........................................................................................................................................ 2-5
Two separate multiplexer systems .............................................................................................................. 2-6
Multiplexer input expansion example......................................................................................................... 2-7
Mixed card type example ............................................................................................................................ 2-8
3
Digital I/O Configuration
Figure 3-1
Figure 3-2
Figure 3-3
Output configuration for pull-up devices.................................................................................................... 3-1
Output configuration using pull-up resistance ............................................................................................ 3-2
Input configuration...................................................................................................................................... 3-3
4
Card Connections and Installation
Figure 4-1
Figure 4-2
Figure 4-3
Figure 4-4
Figure 4-5
Figure 4-6
Figure 4-7
Backplane row jumpers............................................................................................................................... 4-2
Bank-to-bank jumper locations .................................................................................................................... 4-3
Bank-to-bank jumper installation................................................................................................................. 4-3
Voltage source jumper for output channels ................................................................................................ 4-3
Voltage source jumper installation ............................................................................................................. 4-4
Digital I/O output logic location ................................................................................................................. 4-4
Digital I/O output logic selection................................................................................................................ 4-4
v
Figure 4-8
Figure 4-9
Figure 4-10
Figure 4-11
Figure 4-12
Figure 4-13
Figure 4-14
Figure 4-15
Figure 4-16
Figure 4-17
Figure 4-18
Figure 4-19
Figure 4-20
Digital I/O input pull-up resistance selection .............................................................................................. 4-5
Multi-pin connector card terminal identification ........................................................................................ 4-6
Typical round cable connection techniques ................................................................................................ 4-8
Model 7011-MTR connector pinout............................................................................................................ 4-9
Model 7011-KIT-R (with cable) assembly.................................................................................................. 4-9
Single-card system example ...................................................................................................................... 4-10
Two-card system example......................................................................................................................... 4-11
Two-mainframe system example .............................................................................................................. 4-13
Digital output, solenoid control................................................................................................................. 4-14
Digital output, motor control..................................................................................................................... 4-14
Digital output, logic device control ........................................................................................................... 4-15
Digital input, monitoring micro-switches.................................................................................................. 4-15
Model 7021 card installation in Model 7001 ............................................................................................ 4-16
5
Operation
Figure 5-1
Figure 5-2
Figure 5-3
Figure 5-4
Figure 5-5
Figure 5-6
Figure 5-7
Figure 5-8
Figure 5-9
Figure 5-10
Figure 5-11
Figure 5-12
Figure 5-13
Figure 5-14
Model 7001 channel status display.............................................................................................................. 5-2
Model 7002 channel status display (slot 1) ................................................................................................. 5-2
Display organization for multiplexer channels............................................................................................ 5-3
Model 7021 programming channel assignments......................................................................................... 5-3
Two-wire resistance testing......................................................................................................................... 5-7
Four-wire resistance testing......................................................................................................................... 5-8
Low resistance testing ............................................................................................................................... 5-10
Configuration for current gain and common-emitter test.......................................................................... 5-11
Typical common-emitter characteristics ................................................................................................... 5-12
Connecting model 7021 and model 7022 cards together .......................................................................... 5-12
Path isolation resistance ............................................................................................................................ 5-13
Voltage attenuation by path isolation resistance ....................................................................................... 5-13
Power line ground loops............................................................................................................................ 5-14
Eliminating ground loops .......................................................................................................................... 5-14
6
Service Information
Figure 6-1
Figure 6-2
Figure 6-3
Figure 6-4
Figure 6-5
Figure 6-6
Figure 6-7
Figure 6-8
Figure 6-9
Figure 6-10
Figure 6-11
Path resistance test connections................................................................................................................... 6-3
Offset current test connections .................................................................................................................... 6-5
Contact potential test connections ............................................................................................................... 6-6
Bank isolation test connections ................................................................................................................... 6-7
Channel-to-channel isolation test connections ............................................................................................ 6-8
Differential isolation test connections ....................................................................................................... 6-11
Common-mode isolation test connections................................................................................................. 6-12
Testing an input or output channel ............................................................................................................ 6-13
Model 7021 block diagram........................................................................................................................ 6-14
Start and stop sequences............................................................................................................................ 6-15
Transmit and acknowledge sequence ........................................................................................................ 6-15
vi
List of Tables
4
Card Connections and Installation
Table 4-1
Table 4-2
Mass termination accessories...................................................................................................................... 4-5
Pin designation identification...................................................................................................................... 4-7
5
Operation
Table 5-1
Paired channels in four-wire resistance example ........................................................................................ 5-9
6
Service Information
Table 6-1
Table 6-2
Table 6-3
Table 6-4
Table 6-5
Table 6-6
Verification equipment ............................................................................................................................... 6-2
Bank isolation test summary ....................................................................................................................... 6-9
Channel-to-channel isolation test summary .............................................................................................. 6-10
Differential and common-mode isolation testing...................................................................................... 6-13
Recommended troubleshooting equipment............................................................................................... 6-17
Troubleshooting procedure ........................................................................................................................ 6-18
7
Replaceable Parts
Table 7-1
Table 7-2
Table 7-3
Relay card for Model 7021 parts list............................................................................................................ 7-2
Mass terminated connector card for Model 7021 parts list.......................................................................... 7-4
Model 7011-KIT-R 96-pin female DIN connector kit parts list .................................................................. 7-4
vii
1
General Information
Introduction
Features
This section contains general information about the Model
7021 multiplexer-digital I/O card.
The Model 7021 has two-pole, independent 1 × 12 and 1 × 18
multiplex banks and ten independent inputs and outputs for
both multiplexer and digital I/O capabilities. Some of the key
features include:
The Model 7021 consists of a multi-pin (mass termination)
connector card and a relay card. Any external test circuit connections are made via the 96-pin male DIN connector on the
connector card. Keithley offers a variety of optional accessories at the end of this section that can be used to make connections to the connector card.
The rest of Section 1 is arranged in the following manner:
•
Features
•
Warranty information
•
Manual addenda
•
Safety symbols and terms
•
Specifications
•
Unpacking and inspection
•
Optional accessories
•
Low contact potential and offset current for minimal effects on low-level signals.
•
Easy jumper configuration for one or two multiplex
banks.
•
Backplane jumpers. Cutting jumpers disconnects multiplexer bank outputs from the Model 7001/7002 analog
backplane.
•
Model 7011-KIT-R connector assembly kit that includes
a 96-pin female DIN connector that will mate directly to
the connector on the Model 7021 or to a standard 96-pin
male DIN bulkhead connector (see Model 7011-MTR).
This connector uses solder cups for connections to external circuitry and includes an adapter for a round cable
and the housing.
1-1
General Information
Warranty information
Specifications
Warranty information is located on the inside front cover of
this instruction manual. Should your Model 7021 require
warranty service, contact the Keithley representative or authorized repair facility in your area for further information.
When returning the card for repair, be sure to fill out and include the service form at the back of this manual in order to
provide the repair facility with the necessary information.
Model 7021 specifications are found at the front of this manual. These specifications are exclusive of the mainframe
specifications.
Unpacking and inspection
Inspection for damage
Manual addenda
Any improvements or changes concerning the multiplexerdigital I/O card or manual will be explained in an addendum
included with the card. Addenda are provided in a page replacement format. Simply replace the obsolete pages with
the new pages.
The Model 7021 is packaged in a resealable, anti-static bag
to protect it from damage due to static discharge and from
contamination that could degrade its performance. Before removing the card from the bag, observe the following precautions on handling.
Handling precautions
Safety symbols and terms
1.
The following symbols and terms may be found on an instrument or used in this manual.
2.
The !
symbol on an instrument indicates that the user
should refer to the operating instructions located in the instruction manual.
The
symbol on an instrument shows that high voltage
may be present on the terminal(s). Use standard safety precautions to avoid personal contact with these voltages.
The WARNING heading used in this manual explains dangers that might result in personal injury or death. Always
read the associated information very carefully before performing the indicated procedure.
The CAUTION heading used in this manual explains hazards that could damage the card. Such damage may invalidate the warranty.
1-2
Always grasp the card by the side edges and shields.
Do not touch the board surfaces or components.
When not installed in a Model 7001/7002 mainframe,
keep the card in the anti-static bag and store it in the
original packing carton.
After removing the card from its anti-static bag, inspect it for
any obvious signs of physical damage. Report any such damage to the shipping agent immediately.
Shipping contents
The following items are included with every Model 7021
order:
•
Model 7021 Multiplexer-Digital I/O Card
•
Model 7011-KIT-R 96-Pin Female DIN Connector Kit
•
Model 7021 Instruction Manual
•
Additional accessories as ordered
General Information
Instruction manual
Optional accessories
The Model 7021 Instruction Manual is three-hole drilled so
it can be added to the three-ring binder of the Model 7001 or
Model 7002 Instruction Manual. After removing the plastic
wrapping, place the manual in the binder following the mainframe instruction manual. Note that a manual identification
tab is included and should precede the Model 7021 instruction manual.
The following accessories are available for use with the
Model 7021:
If an additional instruction manual is required, order the
manual package, Keithley part number 7021-901-01. The
manual package includes an instruction manual and any pertinent addenda.
Model 7011-MTR  This 96-pin male DIN bulkhead connector uses solder cups for connections to external circuitry.
It will mate to the Model 7011-KIT-R connector and Model
7011-MTC-2 cable assembly.
Model 7011-MTC-2  This two-meter round cable assembly is terminated with a 96-pin female DIN connector on
each end. It will mate directly to the connector on the Model
7021 and to a standard 96-pin male DIN bulkhead connector
(see Model 7011-MTR).
Repacking for shipment
Should it become necessary to return the Model 7021 for repair, carefully pack the unit in its original packing carton, or
the equivalent, and include the following information:
•
Advise as to the warranty status of the card.
•
Write ATTENTION REPAIR DEPARTMENT on the
shipping label.
•
Fill out and include the service form located at the back
of this manual.
1-3
2
Multiplexer Configuration
Introduction
Basic multiplexer configurations
This section covers the basics for multiplexer switching and
is arranged as follows:
•
Basic multiplexer configurations — Covers the basic
multiplexer configurations: dual 1 × 12 and 1 × 18 configuration and single 1 × 30 configuration. The significance of the backplane jumpers is also covered here.
•
Typical multiplex switching schemes — Explains some
of the basic ways a multiplexer can be used to source or
measure. Covers single-ended switching, differential
(floating) switching, sensing, and SMU connections.
•
Multiplexer expansion — Discusses the various configurations that are possible by using multiple cards.
Bank A
1
6 11 16 21 26
2
7 12 17 22 27
3
8 13 18 23 28
4
9 14 19 24 29
5
10 15 20 25 30
Bank B
Input (1 of 30)
HI LO
Switching Topology
for all Channels
HI
LO
Bank
A simplified schematic of the Model 7021 multiplex banks is
shown in Figure 2-1. It is organized as two multiplex banks:
1 × 12 and 1 × 18. Bank A has 12 inputs and one output, and
bank B has 18 inputs and one output. Two-pole switching is
provided for each multiplexer input, with HI and LO
switched. The two banks can be jumpered together to expand
multiplexer inputs, and backplane jumpers provide bank
connections to an adjacent card installed in a Model 7001/
7002 mainframe.
HI
LO
HI
LO
A
Jumpers Bank-to-Bank
Jumpers
B
HI
LO
HI
LO
Backplane Jumpers
(to 7001/7002
Analog Backplane)
Note: Factory configuration shown.
Figure 2-1
Model 7021 simplified schematic
2-1
Multiplexer Configuration
Multiplexer bank-to-bank jumpers
Backplane jumpers
Jumpers are installed on the connector card to connect multiplex banks together to form a 1 × 30 multiplexer. Each
jumper set connects two adjacent banks together. These
jumper sets are included with the Model 7021.
There are four pairs of backplane jumpers located on the relay card. With the jumpers installed, the multiplex banks of
one card connect to the multiplex banks of a second card
through the analog backplane of the Model 7001/7002 mainframe, which expands the number of inputs. With the jumpers removed (cut), the multiplexer is isolated from another
card installed in the mainframe.
The bank-to-bank jumpers allow you to configure the multiplexer in a variety of ways. Typical multiplexer configurations include:
•
Dual 1 × 12 and 1 × 18 multiplex banks; no jumpers installed (Figure 2-2).
•
One 1 × 30 multiplex bank; all bank-to-bank jumpers installed (Figure 2-3).
Refer to Section 4 for information on installing bank-to-bank
jumpers.
The three-pole analog backplane of the Model 7001/7002
mainframe is shown in Figure 2-4. The GUARD connection
of the analog backplane is found only on the mainframe and
is not used with the Model 7021 or Model 7022 card.
Through this analog backplane, the banks of a Model 7021
installed in one slot can be connected to the banks (or rows)
of a compatible card installed in an adjacent slot.
Model 7001/7002
Inputs
Card 1
1
2
Bank A
Output A
2
12
2
1
Output B
2
18
H
Figure 2-2
Dual 1 × 12 and 1 × 18 multiplexer configuration (jumpers
not installed)
1
2
12
2
Bank A
2
Output A
2
1
Bank B
18
2
2
2
Jumpers
Figure 2-3
One 1 × 30 multiplexer configuration (jumpers installed)
2-2
H
L
G
G
Bank B
H
L
L
G
G
H
L
Bank C
H
L
G
G
H
Inputs
Bank A
L
H
2
Bank B
Card 2
Analog
Backplane
2
Bank D
H
L
L
G
G
H = High
L = Low
G = Guard
Figure 2-4
Model 7001/7002 analog backplane
Multiplexer Configuration
NOTE
Figure 2-5 shows how each bank of the Model 7021 is connected to the backplane. Notice that since the Model 7021 is
a two-pole card, there is no connection made to the GUARD
terminal of the backplane. The Model 7021 is shipped from
the factory with the backplane jumpers installed.
The Model 7001/7002 does not provide an
analog backplane for the non-701X/702X/
703X series cards. As a result, any of these
cards installed in one slot in the mainframe is electrically isolated from any card
installed in the other slot. The only way to
connect a Model 7021 to one of these
cards is to wire them together.
7001/7002
Analog
Backplane
7021
Bank
(1 of 2)
H
H
L
L
H = High
L = Low
Backplane
Jumpers
G = Guard
Typical multiplexer switching schemes
G
Figure 2-5
Bank connections to backplane
Removing (cutting) the backplane jumpers isolates the card
from the backplane, and subsequently, any card installed in
an adjacent slot. For information on removing the jumpers,
refer to Section 4.
The following paragraphs describe some basic switching
schemes that are possible with a two-pole switching multiplexer. These switching schemes include some various
shielding configurations to help minimize noise pickup in
sensitive measurement applications. These shields are shown
connected to chassis ground. For some test configurations,
shielding may prove to be more effective connected to circuit
common. Chassis ground is accessible at the rear panel of the
Model 7001/7002 mainframe.
Single-ended switching
In the single-ended switching configuration, the source or
measure instrument is connected to the DUT through a single pathway as shown in Figure 2-6. The instrument is connected to the output of one of the banks, and the DUT is
shown connected to one of the inputs for that bank.
Bank A
Bank B
Optional
Shield
H
HI
Out
LO
Source or
Measure
In
DUT
L
7021
Figure 2-6
Single-ended switching example
2-3
Multiplexer Configuration
Differential switching
Sensing
The differential or floating switching configuration is shown
in Figure 2-7. The advantage of using this configuration is
that the terminals of the source or measure instrument are not
confined to the same pathway. Each terminal of the instrument can be switched to any available input in the test system.
Figure 2-8 shows how the multiplexer can be configured to
use instruments that have sensing capability. The main
advantage of using sensing is to cancel the effects of switch
card path resistance (<1.25Ω) and the resistance of external
cabling. Whenever path resistance is a consideration, sensing
should be used.
Bank A
H
HI
Out
In
L
DUT
H
LO
Out
In
L
Bank B
Source or
Measure
7021
Figure 2-7
Differential switching example
Source HI
Sense HI
Bank A
H
Out L
In
DUT
Sense LO
Source LO
H
Out L
In
Bank B
7021
Source or
Measure
Figure 2-8
Sensing example
2-4
Multiplexer Configuration
SMU connections
Multiple-card switching systems
Figure 2-9 shows how to connect a Keithley Model 236, 237,
or 238 Source Measure Unit to the multiplexer. By using triax cables that are unterminated at one end, the driven guard
and chassis ground are physically extended all the way to the
card.
The Model 7001/7002 switch system mainframes can accommodate two and ten cards, respectively. The following
paragraphs use a two-card system to illustrate multiple-card
switching configurations.
Multiplexer expansion
With the use of additional switching cards and mainframes,
larger systems can be configured. Each Model 7001 switch
system mainframe can accommodate up to two cards, and up
to six mainframes can be connected together. With this
switch system, up to 12 cards can be configured. Each Model
7002 switch system mainframe can accommodate up to ten
cards. And, by connecting up to six Model 7002 mainframes,
60 cards can be configured. The limits on the number of
cards in the Model 7001/7002 are due to triggering.
Bank A
H
Output HI
Guard
Out L
In
DUT
H
Sense HI
Guard
Out L
In
Bank B
7021
Sense LO
Output LO
Output LO
WARNING: Hazardous voltages may be present on
GUARD. Make sure all cable shields are
properly insulated before applying power.
Triax
Cables (3)
236/237/238
Figure 2-9
SMU connections
2-5
Multiplexer Configuration
Separate switching systems
Multiplexer input expansion
Two single-card systems can be configured by removing the
backplane jumpers from one of the cards. The two cards will
be controlled by the same mainframe, but they will be electrically isolated from each other. Figure 2-10 shows an example using two Model 7021 cards.
You can double the number of multiplexer inputs by installing two “as shipped” Model 7021s in the Model 7001/7002
mainframe. By leaving the backplane jumpers installed, the
multiplex banks of the card installed in slot 1 (CARD 1) are
automatically connected to the multiplex banks of the card
installed in slot 2 (CARD 2) through the analog backplane.
7001/7002
Analog Backplane
Card 1
Card 2
7021
Bank A
7021
1
6
11
16
21
26
1
6
11
16
21
26
2
7
12
17
22
27
2
7
12
17
22
27
3
8
13
18
23
28
3
8
13
18
23
28
4
9
14
19
24
29
4
9
14
19
24
29
5
10
15
20
25
30
5
10
15
20
25
30
Bank B
1x12 and 1x18 Multiplexers
Figure 2-10
Two separate multiplexer systems
2-6
Backplane
Jumpers
Removed
1x12 and 1x18 Multiplexers
Multiplexer Configuration
Figure 2-11 shows an example of input expansion. Each
Model 7021 card is configured with dual 1 × 12 and 1 × 18
multiplex banks. By connecting the banks together (via the
Model 7001/7002 analog backplane), the resultant multiplexer system has 24 inputs for bank A and 36 inputs for
bank B. Notice that if all the bank-to-bank jumpers (for both
cards) were installed, the result would be a single 1 × 60
multiplexer.
Figure 2-12 shows a possible switching system using a matrix and a multiplexer. The backplane jumpers for both the
matrix and multiplexer must be installed. This allows matrix
rows to be connected to multiplex banks. On the multiplex
banks, the bank-to-bank jumpers must be removed to maintain isolation between the matrix rows. See the instruction
manual for the Model 7022 for complete information on the
matrix.
Mixing card types
Different types of cards can be used together to create some
unique switching systems. For example, you could have a
Model 7021 multiplexer-digital I/O card installed in one slot
and a Model 7022 matrix-digital I/O card installed in an adjacent slot.
7001/7002
Analog Backplane
Card 1
Card 2
7021
Bank A
7021
1
6
11
16
21
26
1
6
11
16
21
26
2
7
12
17
22
27
2
7
12
17
22
27
3
8
13
18
23
28
3
8
13
18
23
28
4
9
14
19
24
29
4
9
14
19
24
29
5
10
15
20
25
30
5
10
15
20
25
30
Bank B
Backplane
Jumpers
Installed
Dual 1x24 and 1x36 Multiplexer
Figure 2-11
Multiplexer input expansion example
2-7
Multiplexer Configuration
1
Card 1
Card 2
7022
7021
Columns
2 3 4
Inputs
5
6
1
6
11
16
21
26
2
7
12
17
22
27
3
8
13
18
23
28
4
9
14
19
24
29
5
10
15
20
25
30
1
Bank A
2
Rows
3
4
5
5x6 Matrix
Notes:
Dual 1x12 and 1x18 Mux
1. Models 7021 and 7022 backplane jumpers must be
removed from rows 2 and 4.
2. Model 7021 bank-to-bank jumpers must be removed.
Figure 2-12
Mixed card type example
Mainframe multiplexer expansion
Twelve- or 60-card multiplexer systems are possible by
connecting six Model 7001 or six Model 7002 mainframes,
respectively. Each Model 7021 added to the system provides
30 additional inputs. The limits on the number of cards in the
Model 7001/7002 switch system are due to triggering.
Section 4 explains how to connect a test system using two
mainframes.
2-8
Bank B
3
Digital I/O Configuration
Introduction
when the channel is turned off (open). Refer to Section 4 to
configure the logic to your requirement.
This section covers the basic digital input and output configurations for the Model 7021. Connection information for
these configurations is provided in Section 4 of this manual,
while operation (front panel and IEEE-488 bus) is explained
in Section 5.
Controlling pull-up devices
Digital outputs
Output channels are user configurable for negative (low) or
positive (high) true logic. That is, the output can be high or
low when the channel is turned on (closed) depending upon
user configuration. Conversely, the output can be high or low
Typically, the digital outputs are used to provide drive for relatively high current devices such as solenoids, relays, and
small motors. The configurations for these applications are
shown in Figure 3-1. Figure 3-1 allows you to use an external
voltage source (V) for devices that require a higher voltage
(42V maximum). An internal jumper is used to select the internal pull-up voltage. At the factory, the internal 5V source
is selected.
7021
V
Jumper
VEXT
5V
10kΩ
Solenoid or
relay coil
Note: Setup uses an
external voltage
source (42V maximum).
Driver
Figure 3-1
Output configuration for pull-up devices
3-1
Digital I/O Configuration
Each output channel uses a fly-back diode for protection
when switching an inductive device, such as a solenoid coil.
This diode diverts the potentially damaging fly-back voltage
away from the driver.
CAUTION
Failure to set J201 to the Vext position
when using external pull-up voltages
may result in damage to the output
drivers.
Controlling devices using pull-up resistors
When interfacing outputs to high-impedance devices (i.e.
logic devices), internal pull-up resistors are used to achieve
the appropriate logic level. Figure 3-2 shows the output configuration using the 10kΩ pull-up resistor (RP).
The configuration in Figure 3-2 uses the internal 5V source
as the high logic level. If you need a higher logic level, you
can place the jumper in the alternate position and apply an
external voltage (via VEXT).
7021
+V
Jumper
VEXT
5V
RP
10kΩ
A
B
Driver
Figure 3-2
Output configuration using pull-up resistance
3-2
GND
Or
gate
Logic
device
Y
Digital I/O Configuration
Digital inputs
When the resistor is connected to ground, the channel is
pulled low. Thus, with nothing connected to the channel, the
input is pulled low to ground which displays the channel as
off.
Input channels use positive true logic but can be pulled up or
pulled down based on the configuration of the pull-up resistor. Each channel uses a 10kΩ pull-up resistor (R1). The pullup resistors can be pulled up to 5V or pulled down to ground
depending on the positioning of the jumper on the input logic
bank. Refer to Section 4 for more information. Figure 3-3
shows the resistor being pulled up to 5V.
The digital input is compatible with external TTL logic.
Each built-in pull-up resistor provides level shifting so devices such as micro-switches can be monitored. Each input
has a protection network that clamps the input at 5.7V. This
allows logic levels up to 42V peak to be monitored.
When the resistor is connected to 5V, the channel is pulled
high. Thus, with nothing connected to the channel, the input
is pulled high to 5V which displays the channel as on.
7021
5V
R1
R2
10kΩ
R1 = Pull-up resistor
R2 = Input protection resistor
10kΩ
INPUT
GND
Figure 3-3
Input configuration
3-3
Digital I/O Configuration
3-4
4
Card Connections and
Installation
Introduction
•
Typical digital I/O connection schemes — Provides
some typical connection schemes for output solenoid,
relay, motor, and logic device control and for input
micro-switch monitoring.
•
Model 7021 installation and removal — Provides the
procedures to install and remove the Model 7021 card
from the Model 7001/7002 mainframe.
WARNING
The procedures in this section are intended only for qualified service personnel. Do not perform these procedures
unless qualified to do so. Failure to recognize and observe normal safety precautions could result in personal injury
or death.
The information in this section is arranged as follows:
•
Handling precautions — Explains precautions that
must be followed to prevent contamination to the card.
Contamination could degrade the performance of the
card.
•
Multiplexer connections — Covers the basics for connecting external circuitry to the connector card.
•
Digital I/O connections — Explains the voltage source
jumpers, pull-up resistors, output logic, and input resistance and how to configure them.
•
Multi-pin (mass termination) connector card — Covers the basic connections to the 96-pin DIN male connector and identifies each terminal.
•
Typical multiplexer connection schemes — Provides
some typical connection schemes for single card, twocard and two-mainframe system configurations.
Handling precautions
To maintain high impedance isolation, care should be taken
when handling the relay and connector cards to avoid contamination from such foreign materials as body oils. Such
contamination can substantially lower leakage resistances,
thus degrading performance.
To avoid possible contamination, always grasp the relay and
connector cards by the side edges or shields. Do not touch
the board surfaces or components. On connectors, do not
touch areas adjacent to the electrical contacts. Dirt buildup
over a period of time is another possible source of contamination. To avoid this problem, operate the mainframe and
card in a clean environment.
If a card becomes contaminated, it should be thoroughly
cleaned as explained in Section 6.
4-1
Card Connections and Installation
Multiplexer connections
Backplane row jumper removal
The following paragraphs provide the basic information
needed to connect your external test circuitry to the multiplexer. The removal and installation of the backplane row
jumpers on the relay card and the bank-to-bank jumpers on
the connector card are included.
Perform the following steps to remove the backplane row
jumpers:
WARNING
The following connection information is
intended to be used by qualified service
personnel. Failure to recognize and observe standard safety precautions could
result in personal injury or death.
1. If mated together, separate the relay card from the connector card by removing the mounting screw and then
pulling the two cards away from each other. Remember
to only handle the cards by the edges and shields to
avoid contamination.
2. Use Figure 4-1 to locate the jumper(s) to be removed.
3. It is not necessary to physically remove the jumpers
from the PC board. Using a pair of wire cutters, cut one
lead of each jumper.
Backplane row jumpers
Backplane row jumper installation
The Model 7001/7002 mainframe has an analog backplane
that allows the multiplex banks of a Model 7021 to be internally connected to a compatible switching card installed in
the adjacent slot (See Section 2 for details).
Referring to Figure 4-1 for jumper locations, perform the following steps to install the backplane row jumpers:
The backplane row jumpers for the card are located on the relay card as shown in Figure 4-1. The card is shipped from the
factory with the jumpers installed.
7021 Relay Card
W100
W101
W102
W103
W104
W105
W106
W107
Figure 4-1
Backplane row jumpers
4-2
Jumpers
1. If mated together, separate the relay card from the connector card by removing the mounting screw and then
pulling the two cards away from each other. Remember
to only handle the cards by the edges and shields to
avoid contamination.
2. Physically remove a cut jumper by unsoldering it from
the PC board.
3. Install a new #22 AWG jumper wire (Keithley P/N J-15)
and solder it to the PC board.
4. Remove the solder flux from the PC board. The cleaning
procedure is explained in Section 6.
Card Connections and Installation
J205
J204
5V
Vext
J201
Figure 4-2
Bank-to-bank jumper locations
Bank-to-bank jumpers
Digital I/O connections
As explained in Section 2, the multiplex banks can be connected together (using plug-in jumpers) to form large multiplexers. The locations of the bank-to-bank jumper terminals
for the connector card are shown in Figure 4-2.
Voltage source jumper
On the illustration, the two terminal pairs are labeled J204
and J205. J204 is used to connect the HI terminals of the
banks. J205 is used to connect the LO terminals of the banks.
Referring to Figure 4-2 for jumper locations, perform the following steps to install or remove bank-to-bank jumpers:
1. If mated together, separate the relay card from the connector card by removing the mounting screw and pulling the two cards away from each other. Remember to
only handle the cards by the edges and shields to avoid
contamination.
2. Refer to Figure 4-2 to determine which jumpers to install or remove.
3. Using Figure 4-3 as a guide, install the jumpers on, or
remove the jumpers from, the appropriate terminal
pairs.
Digital output uses the internal +5V source as the high logic
level. If higher voltages are required, a user-supplied voltage
can be used (42V maximum). At the factory, the internal
jumper is set to use the internal +5V source.
CAUTION
Failure to set J201 to the Vext position
when using external pull-up voltages
may result in damage to the output
drivers.
A plug-in jumper for the bank allows you to select the internal +5V source or an external source. In Figure 4-4, the
banks are using the external voltage source.
5V
J201
Vext
Jumper
U203
Jumper Terminal
Pair
31
32
33
34
U201
35
36
37
38
39
40
U202
Figure 4-4
Voltage source jumper for output channels
Figure 4-3
Bank-to-bank jumper installation
4-3
Card Connections and Installation
The voltage source jumper is located on the connector board
as shown in Figure 4-2. Figure 4-5 shows how the plug-in
jumper is installed on J201.
Jumper
Figure 4-5
Voltage source jumper installation
HIGH
LOW
INPUT LOGIC
B. 5V Source Selected
DOWN
UP
J100
A. External Source Selected
+5V
OUTPUT
LOGIC
VEXT
J101
+5V
WARNING: USER SUPPLIED LETHAL VOLTAGES MAY BE
PRESENT ON CONNECTORS OR P.C. BOARD.
VEXT
Jumper
Pull-up resistors
When interfacing outputs to high-impedance devices (i.e.,
logic devices), pull-up resistors are used to achieve the appropriate logic level. These resistors are installed at the factory.
Figure 4-6
Digital I/O output logic location
Jumper
Configuring digital I/O output logic
Referring to Figure 4-6 for the digital I/O output logic location, perform the following steps to configure J101:
1. If mated together, separate the relay card from the connector card by removing the mounting screw and then
pulling the two cards away from each other. Remember
to only handle the cards by the edges and shields to
avoid contamination.
2. Locate J101 on the relay board. Refer to Figure 4-6.
3. Determine if you require positive (high) or negative
(low) logic.
4. Install the plug-in jumper in the appropriate position as
shown in Figure 4-7.
Low
High
A. High Selected
Jumper
Low
High
B. Low Selected
Figure 4-7
Digital I/O output logic selection
4-4
Card Connections and Installation
Configuring digital I/O input pull-up resistance
Referring to Figure 4-6 for digital I/O input pull-up resistance location, perform the following steps to configure
J100:
1. If mated together, separate the relay card from the connector card by removing the mounting screw and then
pulling the two cards away from each other. Remember
to only handle the cards by the edges and shields to
avoid contamination.
2. Locate J100 on the relay board. Refer to Figure 4-6.
3. Determine if you require pull-up (5V) or pull-down
(ground) input logic.
4. Install the plug-in jumper in the appropriate position as
shown in Figure 4-8.
Jumper
Down
Multi-pin (mass termination) connector
card
Since connections to external circuitry are made at the 96-pin
male DIN bulkhead connector, there is no need to separate
the connector card from the relay card. If the connector card
is separated from the relay card, carefully mate them together. Make sure to handle the cards by the edges and shields to
avoid contamination.
Keithley has a variety of cable and connector accessories
available to accommodate connections from the connector
card to test instrumentation and DUTs (devices under test).
In general, these accessories, which are summarized in Table
4-1, utilize a round cable assembly for connections.
Table 4-1
Mass termination accessories
Model
Description
7011-KIT-R
96-pin female DIN connector and housing for round cable (provided with the
Model 7021 card).
7011-MTC-2
Two-meter round cable assembly terminated with a 96-pin female DIN connector on each end.
7011-MTR
96-pin male DIN bulkhead connector.
Up
A. Pull-down Resistance
Selected
Jumper
Terminal identification for the DIN connector of the multipin connector card is provided by Figure 4-9 and Table
4-2. This connector will mate to a 96-pin female DIN connector.
Down
Up
B. Pull-up Resistance Selected
Figure 4-8
Digital I/O input pull-up resistance selection
Pins of the Model 7021 mass termination connector can be
identified in one of three ways:
•
Multiplex banks (A and B).
•
Connector designation, consisting of rows a-c and columns 1-32.
•
Schematic and component layout designation (1-96).
4-5
Card Connections and Installation
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1
5V
c
b
a
10K
View from pin side of connector
Input Channel
10K
GND
2 2a
1
2
3
4
5
6
7
8
9
10
Schematic
Designator
3
5
7
35
37
39
65
67
69
71
Connector
Designator
3a
5a
7a
3b
5b
7b
1c
3c
5c
7c
1
1a Short pins
1 (1a) and 33 (1b)
to close output
33 relays
1b
41
9b
VEXT
5V
34 2b
9
9a
10K
Output
Channel
31
32
33
34
35
36
GND
37
2 2a
38
39
40
Schematic
Designator
4
6
8
36
38
40
66
68
70
72
75 L
11c
13
13a H
74 L
10c
14
14a H
46 L
14b
47
15b H
79 L
15c
19
19a H
80 L
16c
18
18a H
50 L
18b
53
21b H
85 L
21c
23
23a H
84 L
20c
24
24a H
56 L
24b
57
25b H
89 L
25c
29
29a H
90 L
26c
28
28a H
60 L
28b
Channel 1
4-6
15
15a H
10
10a
11
11a
16
16a H
42
10b
73
9c
48 L
16b
49
17b H
94
30c
96
32c
81 L
17c
78 L
14c
51
19b H
82 L
18c
20
20a H
Channel 6
52 L
20b
22
22a H
Channel 7
54 L
22b
55
23b H
Channel 11
87 L
23c
25
25a H
Channel 12
86 L
22c
27
27a H
Channel 16
88 L
24c
26
26a H
Channel 17
58 L
26b
59
27b H
Channel 21
91 L
27c
61
29b H
Channel 22
93 L
29c
31
31a H
Channel 26
Figure 4-9
Multi-pin connector card terminal identification
77 L
13c
83 L
19c
21
21a H
Channel 2
Channel 27
44 L
12b
45
13b H
76 L
12c
17
17c H
Connector
Designator
4a
6a
8a
4b
6b
8b
2c
4c
6c
8c
Bank A
43
11b H
Shield
Connection
Bank B
12
12a H
Output A
95
H 31c
92 L
28c
30
30a H
L 63
31b
62 L
30b
Channel 3
Channel 4
Channel 5
Channel 8
Channel 9
Channel 10
Channel 13
Channel 14
Channel 15
Channel 18
Channel 19
Channel 20
Channel 23
Channel 24
Channel 25
Channel 28
Channel 29
Channel 30
Output B
64
H 32b
L 32
32a
Card Connections and Installation
Table 4-2
Pin designation identification
Conn. Schem.
Mux
desig. desig.
terminal
1a-32c 1-96
Bank A Chan 1, HI
11b
43
Chan 1, LO
11c
75
Chan 2, HI
13a
13
Chan 2, LO
10c
74
Bank B Chan 3, HI
12a
12
Chan 3, LO
12b
44
Chan 4, HI
13b
45
Chan 4, LO
13c
77
Chan 5, HI
15a
15
Chan 5, LO
12c
76
Bank A Chan 6, HI
14a
14
Chan 6, LO
14b
46
Chan 7, HI
15b
47
Chan 7, LO
15c
79
Bank B Chan 8, HI
17a
17
Chan 8, LO
14c
78
Chan 9, HI
16a
16
Chan 9, LO
16b
48
Chan 10, HI
17b
49
Chan 10, LO 17c
81
Bank A Chan 11, HI
19a
19
Chan 11, LO 16c
80
Chan 12, HI
18a
18
Chan 12, LO 18b
50
Bank B Chan 13, HI
19b
51
Chan 13, LO 19c
83
Chan 14, HI
21a
21
Chan 14, LO 18c
82
Chan 15, HI
20a
20
Chan 15, LO 20b
52
Inter
1a
1
Inter
1b
33
Conn. Schem.
Mux
desig. desig.
terminal
1a-32c 1-96
Bank A Chan 16, HI
21b
53
Chan 16, LO 21c
85
Chan 17, HI
23a
23
Chan 17, LO 20c
84
Bank B Chan 18, HI
22a
22
Chan 18, LO 22b
54
Chan 19, HI
23b
55
Chan 19, LO 23c
87
Chan 20, HI
25a
25
Chan 20, LO 22c
86
Bank A Chan 21, HI
24a
24
Chan 21, LO 24b
56
Chan 22, HI
25b
57
Chan 22, LO 25c
89
Bank B Chan 23, HI
27a
27
Chan 23, LO 24c
88
Chan 24, HI
26a
26
Chan 24, LO 26b
58
Chan 25, HI
27b
59
Chan 25, LO 27c
91
Bank A Chan 26, HI
29a
29
Chan 26, LO 26c
90
Chan 27, HI
28a
28
Chan 27, LO 28b
60
Bank B Chan 28, HI
29b
61
Chan 28, LO 29c
93
Chan 29, HI
31a
31
Chan 29, LO 28c
92
Chan 30, HI
30a
30
Chan 30, LO 30b
62
Shield
9a
9
Shield
9b
41
Mux
terminal
OUT A, HI
OUT A, LO
OUT B, HI
OUT B, LO
DIG OUT 31
DIG OUT 32
DIG OUT 33
DIG OUT 34
DIG OUT 35
DIG OUT 36
DIG OUT 37
DIG OUT 38
DIG OUT 39
DIG OUT 40
DIG IN 1
DIG IN 2
DIG IN 3
DIG IN 4
DIG IN 5
DIG IN 6
DIG IN 7
DIG IN 8
DIG IN 9
DIG IN 10
nc
nc
nc
nc
nc
nc
Gnd
Vext
Conn. Schem.
desig. desig.
1a-32c 1-96
31c
95
31b
63
32b
64
32a
32
4a
4
6a
6
8a
8
4b
36
6b
38
8b
40
2c
66
4c
68
6c
70
8c
72
3a
3
5a
5
7a
7
3b
35
5b
37
7b
39
1c
65
3c
67
5c
69
7c
71
10a
10
11a
11
10b
42
9c
73
30c
94
32c
96
2a
2
2b
34
4-7
Card Connections and Installation
Typical connection techniques
NOTE
It is recommended that external circuitry
be connected (plugged in) after the Model
7021 is installed in the Model 7001/7002
mainframe and with the mainframe power
off. Installation is covered at the end of
this section.
All external circuitry, such as instrumentation and DUTs,
that you wish to connect to the card must be terminated with
a single 96-pin female DIN connector. The following connection techniques provide some guidelines and suggestions
for wiring your circuitry.
WARNING
Output relays  The multi-pin connector card uses a relay
for each of the output banks. These output relays are normally open to prevent any hazardous voltages (via the mainframe backplane) from appearing on the pins of the male
DIN connector. The output relays will only close when the
Model 7011-MTC-2 cable assembly is connected to the card.
If building your own cable assembly, you must make sure
that it shorts pins 1a to 1b of the card connector (Figure 4-11)
when it is mated to the card. Shorting pins 1a to 1b allows the
output relays to close.
Before beginning any wiring procedures, make sure all power is off and
any stored energy in external circuitry is
discharged.
WARNING
When wiring a connector or device
under test, do not leave any exposed
wires or connections. No conductive
part of the circuit may be exposed. Properly cover the conductive parts, or death
by electric shock may occur.
A)
Round cable assemblies  Figure 4-10 shows typical
round cable connection techniques using accessories available from Keithley.
Wire instrumentation
and DUT to bulkhead
connector (See Table 4-2
and Figures 4-9 and 4-11
for terminal identification)
Multi-Pin
Connector
Card
7011-MTC-2
cable
7011-MTR
assembly
bulkhead connector
B)
Multi-Pin
Connector
Card
Wire directly to
instrumentation
and DUT
7011-MTC-2
(Cut in Half)
C)
Wire directly to
instrumentation
and DUT
Multi-Pin
Connector
Card
Cable
7011-Kit-R
Connector Kit
Notes: Figure 4-12 provides an exploded view showing
how the connector (with cable) is assembled.
Cable Hitachi p/n N2807-P/D-50TAB is a
50-conductor cable. Two of these cables
can be used to supply 100 conductors.
Figure 4-10
Typical round cable connection techniques
4-8
Card Connections and Installation
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
c
b
a
View from solder
cup side of
connector
Note: See Figure 4-9 for terminal identification.
Figure 4-11
Model 7011-MTR connector pinout
In Figure 4-10A, connections are accomplished using a
Model 7011-MTC-2 cable and a Model 7011-MTR bulkhead connector. The two-meter round cable is terminated
with a 96-pin female DIN connector at each end. This cable
mates directly to the multi-pin connector card and to the
bulkhead connector. The bulkhead connector has solder cups
to allow direct connection to instrumentation and DUT. Figure 4-11 provides pinout for the bulkhead connector. The
view shown is from the solder cup end of the connector.
In Figure 4-10B, connections are accomplished using a
Model 7011-MTC-2 cable assembly that is cut in half. The
96-pin female DIN connector on one end of the cable mates
directly to the multi-pin connector card. The unterminated
end of the cable is wired directly to instrumentation and
DUT. The other half of the cable assembly could be used for
a second switching card.
In Figure 4-10C, connections are accomplished using a
custom-built cable assembly that consists of a Model
7011-KIT-R connector and a suitable round cable. Hitachi
cable p/n N2807-P/D-50TAB is a 50-conductor round cable.
Two of these cables can be used to provide 100 conductors.
The connector has solder cups to accommodate the individual wires of the unterminated cable. Figure 4-12 provides an
exploded view of the connector assembly and shows how the
cable is connected. For further Model 7011-KIT-R assembly
information, refer to the packing list provided with the kit.
The connector end of the resultant cable assembly mates
directly to the multi-pin connector card. The unterminated
end of the cable assembly is wired directly to instrumentation and DUT.
Figure 4-12
Model 7011-KIT-R (with cable) assembly
Typical multiplexer connection schemes
The following information provides some typical connection
schemes for single-card, two-card, and two-mainframe system configurations. Connection schemes for the multi-pin
connector card use some of the techniques presented in the
Multiplexer connections paragraph. Keep in mind that these
are only examples to demonstrate various ways to wire a test
system. Connection details for the connector card are provided in the Multi-pin (mass termination) connector card paragraph.
4-9
Card Connections and Installation
Single-card system
Figure 4-13 shows how external connections can be made to a
single-card system that uses the multi-pin connector card. This
single-card system is configured as dual 1 × 12 and 1 × 18
multiplex banks.
Instrumentation and DUTs are hard-wired to the Model
7011-MTR male bulkhead connector. This connector has
solder cups that will accept wire size up to #24 AWG. The
test system is connected to the multiplexer using the Model
7011-MTC-2 round cable assembly. This cable mates directly to both the external bulkhead connector and the Model
7021. Notice that the bulkhead connector is shown mounted
to a fixture to help keep the cabling stable during the test.
7021
HI and LO to
Bank A
Fixture for
Bulkhead
Connector
Instrument
HI and LO to
Bank B
Instrument
64 Individual Conductors
7011-MTC-2
Cable Assembly
7011-MTR
Bulkhead
Connector
1
12 1
18
DUT Test Fixture
1
1
12
12
Instruments
DUTs
1
1
18
18
7021
Simplified Equivalent Circuit
Figure 4-13
Single-card system example
4-10
Card Connections and Installation
Two-card system
When using a single-card system, make sure that the card remains electrically isolated from any other switching cards.
There are several ways to ensure isolation for a single card in
the Model 7001/7002 mainframe:
Figure 4-14 shows a system using two Model 7021 cards installed in one Model 7001/7002 mainframe to configure a
single 1 × 60 multiplexer system. Each card is configured as
a single 1 × 30 multiplexer. To accomplish this, all bank-tobank jumpers (both cards) are installed to connect banks A
and B together. By leaving the backplane jumpers of both
cards installed, the banks of card 1 are connected to the
banks of card 2 through the analog backplane of the mainframe resulting in the 1 × 60 configuration.
1. Vacate the adjacent slot in the mainframe. If there is a
Model 70XX card installed in the other slot, remove it.
2. Remove the backplane jumpers on the card. This will
disconnect the card from the analog backplane of the
mainframe.
3. Remove the backplane jumpers from the switching card
installed in the adjacent slot.
Instrument
HI and LO to
Banks A and B
7001/7002
7011-MTC-2
Cable Assembly
(Cut in half to
provide two cables)
7021
7021
1
31
30
C
A
R
D
1
C
A
R
D
2
60
DUT Test Fixture
Card 1 (1x30)
1
1
Instruments
30
DUTs
Notes: 1. All bank-to-bank jumpers
(both cards) must be installed.
2. Backplane jumpers (both
cards) must be installed.
30
Card 2 (1x30)
31
31
60
60
7001/7002
Analog
Backplane
Single 1x60 Multiplexer
Simplified Equivalent Circuit
Figure 4-14
Two-card system example
4-11
Card Connections and Installation
Figure 4-14 shows how external connections can be made for
the multi-pin connector cards. In this example, a single Model 7011-MTC-2 round cable assembly is cut in half to provide two cables, each of which is unterminated at one end.
The unterminated ends of the two cables are hard-wired to
instrumentation and DUT as shown in the drawing. The other
ends of these cables mate directly to the Model 7021 cards.
Two-mainframe system
Figure 4-15 shows a system using three multiplexer cards installed in two Model 7001/7002 mainframes to configure a
single 1 × 90 multiplexer system. Each card is configured as
a single 1 × 30 multiplexer. To accomplish this, bank-to-bank
jumpers of all three cards must be installed to connect banks
A and B together.
By leaving the backplane jumpers of the cards in mainframe
1 installed, the banks of card 1 are connected to the banks of
card 2 through the analog backplane of the Model 7001/7002
mainframe resulting in a 1 × 60 configuration. External bank
connections from the instrument to the card in the second
mainframe connect the banks of all three cards together to
form the 1 × 90 multiplexer system. This system is similar to
the two-card system (see previous paragraph) except that a
third card (installed in a second mainframe) is added.
4-12
Card Connections and Installation
Figure 4-15 shows the connection scheme for the multi-pin
connector cards. External circuit connections to the Model
7001/7002 mainframe 1 are identical to the ones used for the
two-card system. The third card (installed in Model 7001/
7002 mainframe 2) shows how a custom-built cable can be
used to make connections to external circuitry. A suitable
round cable can be terminated with a 96-pin female DIN
connector (Model 7011-KIT-R) with two lengths of Hitachi
cable P/N N2807-P/D-50TAB. This cable contains 50 conductors; two lengths provide 100 conductors. This cable will
mate to the Model 7021. The unterminated end of the cable
is connected directly to the instrumentation and DUT. Notice
that the bank connections for the third card are made at the
instruments.
4-13
Card Connections and Installation
DUT Test Fixture
61
7011-Kit-R
Connector Kit
90
7001/7002 #2
Cable
C
A
R
D
1
7021
Not Used
C
A
R
D
2
Trigger Link
I
N
O
U
T
Instrument
Trigger
Link
Cable
7001/7002 #1
7021
7011-MTC-2
Cable Assembly
(Cut in half to
provide two cables)
1
30
DUT Test Fixture
7021
31
C
A
R
D
1
C
A
R
D
2
Trigger Link
I
N
O
U
T
60
7001/7002 #1
Card 1 (1x30)
1
1
Instruments
30
30
Card 2 (1x30)
31
31
60
60
DUTs
7001/7002 #2
61
90
7001/7002
Analog
Backplane
External
Bank
Connections
Card 1 (1x30)
61
90
Single 1x90 Multiplexer
Simplified Equivalent Circuit
4-14
Notes: 1. Backplane jumpers for both cards installed
in 7001/7002 #1 must be installed.
2. All bank-to-bank jumpers, on all three
cards, must be installed.
Card Connections and Installation
Figure 4-15
Two-mainframe system example
Typical digital I/O connection schemes
Motor control — Figure 4-17 shows a digital output connection scheme to control small 12V dc motors. An external
12V source is used to provide the necessary voltage level. A
motor is turned on when the corresponding output channel is
turned on (closed).
7021
Motors
Output connection schemes
VEXT
The following examples show output connections from the
card to external circuitry and summarize the required internal connections on the card. Each example assumes negative
true logic is used. To configure for positive true logic, refer
to the Configuring digital I/O output logic paragraph.
Solenoid control — Figure 4-16 shows a digital output connection scheme to control solenoids. This example assumes
that an external 24V source is being used. A solenoid is energized when the corresponding output channel is turned on
(closed).
7021
+
12V
–
M
M
OUT 39
OUT 40
GND
Solenoids
VEXT
+
24V
–
OUT 31
Internal connections:
External voltage source (VEXT) selected.
Figure 4-17
Digital output, motor control
OUT 32
OUT 33
Logic device control — Figure 4-18 shows a digital output
connection scheme to control a logic device. This example
assumes that an internal +5V voltage source is being used.
GND
Internal connections:
External voltage source (VEXT) selected.
Figure 4-16
Digital output, solenoid control
The logic device is a demultiplexer (DMUX). The binary
pattern (value) seen at the input of the DMUX (lines A, B,
and C) determines which DMUX output line (Y0 through
Y7) is selected (pulled low). For example, with channels 31,
32, and 33 off (open), lines A, B and C are high. The binary
7 at the DMUX input (A = 1, B = 1 and C = 1) selects (pulls
low) output Y7. If channel 32 is turned on (closed), line B
goes low. The binary 5 seen at the DMUX input (1, 0, 1) selects (pulls low) Y5.
4-15
Card Connections and Installation
+5V
Logic Device
7021
OUT 31
OUT 32
OUT 33
A
74LS138
DMUX
B
Y0
Y1
Y2
C
Y3
Y4
VCC
GND
Y5
Y6
GND
Y7
G2A
Internal connections:
Internal voltage source (+5V) used.
Figure 4-18
Digital output, logic device control
Microswitches
7021
Input connection scheme
IN 1
Figure 4-19 shows a digital input connection scheme to monitor the state of micro-switches. With a switch open and the input resistor configured for pull up, as shown in Figure 4-19A,
the corresponding input channel is pulled high by the internal
input resistor. As a result, the input channel is high (appears as
a bar on the Model 7001 display or a lit LED on the Model
7002). When a switch is closed, the corresponding input channel is pulled low to ground. As a result, the input channel is
low (appears as a single dot on the Model 7001 display or an
unlit LED on the Model 7002).
IN 2
With a switch open and the input resistance configuration set
to pull down, as shown in Figure 4-19B, the corresponding
input channel is pulled low by the internal input resistor. As
a result, the input channel is low. When a switch is closed, the
corresponding input channel is pulled high. As a result, the
input channel is high.
For more information on configuring pull-up resistance, refer to the Configuring digital I/O input pull-up resistance
paragraph.
IN 3
GND
A. Input resistor is set to pull up.
Microswitches
7021
IN 1
IN 2
IN 3
+V
B. Input resistor is set to pull down.
4-16
Card Connections and Installation
stored energy in external circuitry is discharged.
Figure 4-19
Digital input, monitoring micro-switches
Model 7021 installation and removal
1. Mate the connector card to the relay card if they are separated. Install the supplied 4-40 screw at the end of the
card to secure the assembly. Make sure to handle the
cards by the edges and shields to prevent contamination.
2. Facing the rear panel of the mainframe, select the slot
(CARD 1 or CARD 2) that you wish to install the Model
7021 card in.
3. Referring to Figure 4-20, feed the Model 7021 card into
the desired slot so the edges of the relay card ride in the
rails.
4. With the ejector arms in the unlocked position, push the
Model 7021 card all the way into the mainframe until
the arms engage into the ejector cups. Then push both
arms inward to lock the card into the mainframe.
This following paragraphs explain how to install and remove
the Model 7021 card from the Model 7001/7002 mainframe.
WARNING
Installation or removal of the Model
7021 is to be performed by qualified service personnel. Failure to recognize and
observe standard safety precautions
could result in personal injury or death.
CAUTION
To prevent contamination to the multiplexer card that could degrade performance, only handle the card by the
edges and shields.
WARNING
To avoid electric shock that could result
in injury or death, make sure to properly
install and tighten the safety ground
screw shown in Figure 4-20.
Card installation
Perform the following steps to install the Model 7021 card in
the Model 7001/7002 mainframe:
WARNING
Turn off power from all instrumentation
(including the Model 7001/7002 mainframe) and disconnect their line cords.
Make sure all power is removed and
Screw
Unlock card
5. Install the screw shown in Figure 4-20.
Card removal
To remove the Model 7021 card, first unloosen the safety
ground screw, unlock the card by pulling the latches outward, and then pull the card out of the mainframe. Remem-
Ejector
Arms (2)
Screw
Lock card
Figure 4-20
Model 7021 card installation in Model 7001
4-17
Card Connections and Installation
ber to handle the card by the edges and shields to avoid
contamination that could degrade performance.
4-18
5
Operation
Introduction
Digital I/O maximum signal levels
The information in this section is formatted as follows:
To ensure proper operation and prevent damage to the card,
never exceed the following power limits:
•
Power limits — Summarizes the maximum power limits of the Model 7021 multiplexer-digital I/O card.
•
Mainframe control of the card — Summarizes programming steps to control the card from the Model
7001/7002 switch system mainframe.
•
Multiplexer switching examples — Provides some
typical applications for using the Model 7021.
•
Measurement considerations — Reviews a number of
considerations when using the Model 7021 to make
measurements.
Output channels
Maximum user-supplied pull-up voltage: 42V
Maximum sink current:
Per channel: 250mA
Per card: 1A
Input channels
Maximum voltage level: 42V peak
Mainframe control of the card
Power limits
CAUTION
To prevent damage to the card, do not
exceed the maximum signal level specifications of the card.
The following information pertains to the Model 7021. It
assumes that you are familiar with the operation of the
Model 7001/7002 mainframe—whichever is used.
If you are not familiar with the operation of the mainframe in
use, proceed to Getting Started (Section 3) of the Model
7001 or Model 7002 Instruction Manual after reading the
following information.
Analog multiplexer maximum signal levels
To prevent overheating or damage to the relays, never exceed
the following maximum signal levels: 110V DC or rms,
155V peak between any two inputs or chassis, 1A switched,
30VA (resistive load).
5-1
Operation
7001 Display
CARD 1
1
2
3
4
5
CARD 2
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
= Open Channel
= Closed Channel
Figure 5-1
Model 7001 channel status display
Channel assignments
The Model 7001 has a channel status display (Figure 5-1)
that provides the real-time state of each available channel.
The left portion of the display is for slot 1 (Card 1), and the
right portion is for slot 2 (Card 2). For the Model 7002,
channel status LED grids are used for the ten slots. The
LED grid for slot 1 is shown in Figure 5-2.
7002 LED DISPLAY
SLOT 1
1
2
3
4
COLUMN
5 6 7
8
9 10
1
ROW
2
3
4
= OPEN CHANNEL
= CLOSED CHANNEL
Figure 5-2
Model 7002 channel status display (slot 1)
Organization of the channel status display for each slot is
shown in Figure 5-3. The card contains 40 channels and is
made up of two multiplex banks (Bank A and B) totaling 30
channels and ten digital output channels as shown in the
illustration.
The multiplex banks can be jumpered to the backplane of
the mainframe to expand multiplexer inputs.
All digital input and output channels are isolated from the
backplane of the mainframe. With the mainframe in the normal display state, the status (on or off) of the output channels is displayed. When the mainframe is in the read input
channels mode, the status (on or off) of the input channels is
displayed.
5-2
The hardware for the digital output channels is user configurable for negative or positive true logic. That is, depending
on the user configuration, the output can go high or be
pulled low when the channel is turned on (closed) or off
(open). To configure output logic, refer to Section 4.
Input channels use positive true logic but can be configured
to pull up or pull down. Thus, a channel can be pulled high
or pulled low when the input is open depending on the
jumper configuration. Input channels will be displayed as
high (on) when the input has a high logic level applied.
Conversely, an input channel will be displayed as low (off)
when a low logic level is applied.
To control the card from the mainframe, each multiplexer input and digital output must have a unique channel assignment. The channel assignments for the card are provided in
Figure 5-4. Each channel assignment is made up of the slot
designator (1 or 2) and the channel (1 to 40). For the Model
7002, the slot designator can be from 1 to 10 since there are
10 slots. To be consistent with Model 7001/7002 operation,
the slot designator and channel are separated by an exclamation point (!). Some examples of channel assignments are as
follows:
CHANNEL 1!1 = Slot 1, Channel 1 (Input 1 of Bank A)
CHANNEL 1!40 = Slot 1, Channel 40 (Output 40 of Digital
I/O)
CHANNEL 2!23 = Slot 2, Channel 23 (Input 13 of Bank B)
CHANNEL 2!36 = Slot 2, Channel 36 (Output 36 of Digital
I/O)
These channels are displayed and controlled from the normal
display state of the mainframe. If currently in the menu structure, return to the normal display state by pressing EXIT.
Operation
Bank-Input
Channel
Digital
Output
Channels
A-1
A-2
B-1
B-2
B-3
A-3
A-4
B-4
B-5
B-6
1
2
3
4
5
6
7
8
9
10
A-5
A-6
B-7
B-8
B-9
A-7
A-8
B-10
B-11
B-12
11
12
13
14
15
16
17
18
19
20
A-9
A-10
B-13
B-14
B-15
A-11
A-12
B-16
B-17
B-18
21
22
23
24
25
26
27
28
29
30
OUT-1
OUT-2
OUT-3
OUT-4
OUT-5
OUT-6
OUT-7
OUT-8
OUT-9
OUT-10
31
32
33
34
35
36
37
38
39
40
Figure 5-3
Display organization for multiplexer channels
A. Slot 1
(Card 1)
B. Slot 2
(Card 2)
1
2
3
4
5
6
7
8
9
10
1!1
1!2
1!3
1!4
1!5
1!6
1!7
1!8
1!9
1!10
1!11
1!12
1!13
1!14
1!15
1!16
1!17
1!18
1!19
1!20
1!21
1!22
1!23
1!24
1!25
1!26
1!27
1!28
1!29
1!30
1!31
1!32
1!33
1!34
1!35
1!36
1!37
1!38
1!39
1!40
1
2
3
4
5
6
7
8
9
10
2!1
2!2
2!3
2!4
2!5
2!6
2!7
2!8
2!9
2!10
2!11
2!12
2!13
2!14
2!15
2!16
2!17
2!18
2!19
2!20
2!21
2!22
2!23
2!24
2!25
2!26
2!27
2!28
2!29
2!30
2!31
2!32
2!33
2!34
2!35
2!36
2!37
2!38
2!39
2!40
Examples:
1!18 = Slot 1, Channel 18 (Input 10, Bank B)
2!36 = Slot 2, Channel 36 (Output 36, Digital I/O)
Figure 5-4
Model 7021 programming channel assignments
5-3
Operation
Closing and opening channels
NOTE
This procedure applies to multiplexer
channels (channels 1!1 through 1!30) and
digital output channels (1!31 through
1!40). Digital input channels are read only.
A channel is turned on (closed) by keying in the channel assignment and pressing CLOSE. For example, to turn on
(close) channel 36 (Output 36 of Digital I/O) of a card installed in slot 2, key in the following channel list and press
CLOSE:
SELECT CHANNELS 2!36
The above closed channel can be turned off (opened) by
pressing OPEN or OPEN ALL. The OPEN key turns off
(opens) only the channels specified in the channel list, and
OPEN ALL turns off (opens) all channels.
NOTE
For the Model 7002 mainframe, you can
use the light pen to turn output channels on
and off.
The following display is an example of a channel list that
consists of several channels:
SELECT CHANNELS 2!1, 2!3, 2!22-2!25
Notice that channel entries are separated by commas (,). A
comma is inserted by pressing ENTER or the right cursor
key ( ). The channel range is specified by using the hyphen
(-) key to separate the range limits. Pressing CLOSE will
close all the channels specified in the channel list. Pressing
OPEN (or OPEN ALL) will open the channels.
Channel patterns can also be used in a channel list. This allows you to control specific bit patterns for logic circuits.
Example:
SELECT CHANNELS 2!1, M1
Pressing CLOSE will turn on channel 2!1 and the channels
that make up channel pattern M1. Refer to the mainframe
instruction manual for information on defining channel
patterns.
5-4
Scanning channels
Channels are scanned by creating a scan list and configuring
the Model 7001/7002 to perform a scan. The scan list is created in the same manner as a channel list (See the Closing
and opening channels paragraph). However, the scan list is
specified from the SCAN CHANNELS display mode. (The
SCAN LIST key toggles between the channel list and the
scan list.) The following shows an example of a scan list:
SCAN CHANNELS 2!1, 2!3, 2!21-2!25
When a scan is performed, the channels specified in the scan
list will be scanned in the order that they are presented in
the scan list.
Channel patterns can also be used in a scan list. This allows
you to control specific bit channels or bit patterns. For
example:
SCAN CHANNELS M1, M2, M3, M4
When M1 is scanned, the channels that make up channel
pattern M1 will turn on. When M2 is scanned, the M1 channels will turn off and the channels that make up M2 will turn
on. M3 and M4 are scanned in a similar manner. Refer to
the instruction manual for the mainframe for information on
defining channel patterns.
A manual scan can be performed by using the RESET default conditions of the Model 7001/7002. RESET is selected
from the SAVESETUP menu of the main MENU. When
RESET is performed, the mainframe is configured for an infinite number of manual scans. The first press of STEP takes
the mainframe out of the idle state. The next press of STEP
will close the first channel specified in the scan list. Each
subsequent press of STEP will select the next channel in the
scan list.
Reading input channels
Input channels are read from the READ-I/O-CARD option
of the CARD CONFIG MENU of the mainframe. This
menu is accessed by pressing the CARD key. In this “read input channels” display mode, the mainframe displays the realtime state of each input channel.
Input channels use positive true logic but can be configured
to pull up or pull down. Open inputs will read high (on) if inputs are configured for pull up. Conversely, open inputs will
read low (off) when configured for pull down. To configure
pull-up resistance, refer to Section 4.
Operation
Perform the following steps to configure the mainframe to
display the digital input channels.
1. Press the CARD CONFIGURATION key to display the
CARD CONFIG MENU.
2. Use the and keys to place the cursor on READ-I/
O-CARD and press ENTER.
Model 7001 mainframe — The real-time state (on or off)
of each input channel is provided on the first row of the
display. Only digital I/O input channels are displayed.
Model 7002 mainframe — The real-time state (on or
off) of each input channel is provided on the first row of
the appropriate LED display grid. Use the TYPE option
of the CARD CONFIG MENU if you do not know
which slot the card is installed in.
3. Use the EXIT key to exit from the “read input channels”
display mode.
NOTE
With input channels displayed, you can
turn off (open) all other channels by pressing OPEN ALL.
IEEE-488 bus operation
Bus operation is demonstrated using Microsoft QuickBASIC
4.5, the Keithley KPC-488.2 (or Capital Equipment Corporation) IEEE interface and the HP-style Universal Language
Driver (CECHP). Refer to “QuickBASIC 4.5 Programming”
in the mainframe manual for details on installing the Universal Language Driver, opening driver files and setting the input terminal. Program statements assume that the primary
address of the mainframe is 07.
Turning channels on and off
The following SCPI commands are used to turn multiplexer
and digital I/O output channels on and off:
:CLOSe <list>
:OPEN <list>|ALL
Turn on specified channels
Turn off specified (or all) channels.
The following program statement turns on channels 1!1, 1!4
through 1!6, and the channels that make up channel pattern
M1.
PRINT #1, "output 07; clos (@ 1!1, 1!4:1!6, M1)"
Notice that the colon (:) is used to separate the range limits.
Either of the following statements turns off channels 1!1, 1!4
through 1!6, and the channels of M1:
PRINT #1, "output 07; open (@ 1!1, 1!4:1!6, M1)"
PRINT #1, "output 07; open all"
Scanning output channels
There are many commands associated with scanning. However, it is possible to configure a scan using as little as four
commands. These commands are listed as follows:
*RST
:TRIGger:COUNt:AUTo ON
:ROUTe:SCAN <list>
:INIT
The first command resets the mainframe to a default scan
configuration. The second command automatically sets the
channel count to the number of channels in the scan list, the
third command defines the scan list, and the fourth command
takes the Model 7001/7002 out of the idle state.
The following program fragment will perform a single scan
of channels 1 through 4 of slot 1 and the channels that make
up channel pattern M1:
PRINT
PRINT
PRINT
PRINT
#1,
#1,
#1,
#1,
"output
"output
"output
"output
07;
07;
07;
07;
*rst"
trig:coun:auto on"
scan (@ 1!1:1!4, M1)"
init"
The first statement selects the *RST default configuration for
the scan. The second statement sets channel count to the
scan-list-length (5). The third statement defines the scan list,
and the last statement takes the mainframe out of the idle
state. The scan is configured to start as soon as the :INIT
command is executed.
When the above program fragment is run, the scan will be
completed in approximately 240 milliseconds (3msec delay
for channel closures and 3msec delay for each open), which
is too fast to view from the front panel. An additional relay
delay can be added to the program to slow down the scan for
viewing. The program is modified by adding a statement to
slow down the scan. Also, a statement is added to the beginning of the program to ensure that all channels are open before the scan is started. The two additional statements are
indicated in bold typeface.
PRINT
PRINT
PRINT
PRINT
PRINT
PRINT
#1,
#1,
#1,
#1,
#1,
#1,
"output
"output
"output
"output
"output
"output
07;
07;
07;
07;
07;
07;
open all"
*rst"
trig:coun:auto on"
trig:del 0.5"
scan (@ 1!1:1!4, M1)"
init"
The first statement opens all channels, and the fourth statement sets a 1/2 second delay after each channel closes.
5-5
Operation
Reading digital I/O input channels
The following SCPI commands are used to read the status of
digital I/O input channels:
:SENSe2:DATA? <list>
:SENSe3:DATA? <list>
:SENSe4:DATA? <list>
:SENSe5:DATA? <list>
:SENSe6:DATA? <list>
:SENSe7:DATA? <list>
:SENSe8:DATA? <list>
:SENSe9:DATA? <list>
:SENSe10:DATA? <list>
:SENSe11:DATA? <list>
Read input channels; slot 1
Read input channels; slot 2
Read input channels; slot 3
Read input channels; slot 4
Read input channels; slot 5
Read input channels; slot 6
Read input channels; slot 7
Read input channels; slot 8
Read input channels; slot 9
Read input channels; slot 10
The conventional form for the <list> parameter includes the
slot and input channel number. However, for these commands you do not need to include the slot number. For example, you can send either of the following two commands to
read input channel 2 in slot 6:
:SENSe7:DATA? (@6!2) or :SENSe7:DATA? (@2)
After the mainframe is addressed to talk, the response message will indicate the state of each listed input channel. A returned “0” indicates that the channel is off (open), and a
returned “1” indicates that the channel is on (closed).
The following program fragment reads channel 3 of a digital
I/O card installed in slot 1:
PRINT #1, "output 07; sens2:data? (@3)"
PRINT #1, "enter 07"
LINE INPUT #2, A$
PRINT A$
5-6
The first statement reads input channel 3 (slot 1). The second
statement addresses the mainframe to talk (sends response
message to computer). The third statement reads the response message, and the last statement displays the message
(0 or 1) on the computer CRT.
The above program fragment is modified to read all 10 digital I/O input channels in slot 1 as follows. The modified statement is shown in bold typeface.
PRINT #1, "output 07; sens2:data? (@1:10)"
PRINT #1, "enter 07"
LINE INPUT #2, A$
PRINT A$
The response message will include a “0” (off) or “1” (on) for
each of the 10 input channels (i.e., “0, 0, 0, 1, 0..... 0, 1”).
Multiplexer switching examples
This paragraph presents some typical applications for the
Model 7021. These include resistor testing and transistor
testing. It also shows how to use the Model 7021 with a matrix-digital I/O card (Model 7022).
Resistor testing
The Model 7021 can be used to test a large number of resistors using only one test instrument or group of instruments.
Such tests include two-wire and four-wire resistance measurements using a DMM and low-resistance measurements
using a current source and sensitive digital voltmeter, as discussed in the following paragraphs.
Operation
Two-wire resistance tests
Figure 5-5 shows a typical test setup for making two-wire
resistance measurements. The Model 7021 provides the
switching function, while the resistance measurements are
made by a Model 2000 DMM. Since only two-pole switching is required for this application, one Model 7021 card can
be used to switch up to 30 resistors (additional multiplex
banks can be added, if desired, by adding more cards).
Accuracy of measurements can be optimized by minimizing
stray resistance.
Make connecting wires as short as possible to minimize
path resistance. Another technique is to short one of the
multiplexer inputs, close the shorted channel, and then
enable the DMM zero feature to cancel path resistance.
Leave zero enabled for the entire test.
7021
1
1
HI
LO
POWER
30
MODEL 2000 DMM
30
Single 1x30 MUX
DUTs
(30)
A. Test Configuration
Ω
Model 2000
DMM
R
7021
DUT
B. Simplified Equivalent Circuit
Figure 5-5
Two-wire resistance testing
5-7
Operation
Four-wire resistance tests
leads minimizes the effects of voltage drops across the test
leads. Note, however, that an extra two poles of switching are
required for each resistor tested. For this reason, only 12 resistors per card can be tested using this configuration because two channels must close at the same time.
More precise measurements over a wider range of system and
DUT conditions can be obtained by using the four-wire measurement scheme shown in Figure 5-6. Here, separate sense
leads from the Model 2000 DMM are routed through the
multiplexer to the resistor under test. The extra set of sense
7021
Input HI
Sense
Ω 4 Wire
HI
1
1
12
12
HI
DUTs
(12)
LO
POWER
Model 2000
DMM
Input LO
13
Sense
Ω 4 Wire
LO
24
Dual 1x12 MUX
A. Test Configuration
Note: Jumpers between Banks A
and B are removed.
Input HI
Sense Ω 4 Wire HI
Ω
R
Sense Ω 4 Wire LO
Input LO
Model 2000
DMM
7021
B. Simplified Equivalent Circuit
Figure 5-6
Four-wire resistance testing
5-8
DUT
Operation
Although the four-wire connection scheme minimizes problems caused by voltage drops, there is one other potentially
troublesome area associated with low resistance measurements: thermal EMFs caused by the relay contacts. In order
to compensate for thermal EMFs, the offset-compensated
ohms feature of the Model 2000 DMM should be used.
Table 5-1
Paired channels in four-wire resistance example
Device
under test
Channel
pair
Connection
designations
1
1 and 3
Bank A, In 1 and
Bank B, In 3
2
2 and 4
Bank A, In 2 and
Bank B, In 4
Low-level resistance measurements
Many times, it is necessary to make resistance measurements with either lower voltage sensitivity or higher currents than are available with ordinary DMMs. Examples of
cases where low-level resistance measurements may be necessary include the testing of PC board traces, contacts, bus
bars, and low resistance shunts.
Figure 5-7 shows a typical test configuration for a switching
system capable of testing a number of low resistance
devices. The Model 220 Current Source forces current
through the device under test, while the Model 182 Sensitive Digital Voltmeter measures the resulting voltage across
the device.
3
6 and 5
Bank A, In 6 and
Bank B, In 5
4
7 and 8
Bank A, In 7 and
Bank B, In 8
5
11 and 9
Bank A, In 11 and
Bank B, In 9
6
12 and 10
Bank A, In 12 and
Bank B, In 10
Since low voltage levels are being measured, thermal EMF
offsets generated by relay and connector contacts will have a
detrimental effect on measurement accuracy unless steps are
taken to avoid them. (The Model 7021 has been designed to
keep relay EMF at a minimal level.) Thermal EMF effects
can be virtually eliminated by taking two voltage measurements, E1 and E2, the first with the current, I, flowing in one
direction, and the second with a current, I, of the same magnitude, flowing in the opposite direction. The resistance can
then be calculated as follows:
7
16 and 13
Bank A, In 16 and
Bank B, In 13
E2 – E1
R = --------------2I
8
17 and 14
Bank A, In 17 and
Bank B, In 14
9
21 and 15
Bank A, In 21 and
Bank B, In 15
10
22 and 18
Bank A, In 22 and
Bank B, In 18
11
26 and 19
Bank A, In 26 and
Bank B, In 19
12
27 and 20
Bank A, In 27and
Bank B, In 20
Note that reversing the current source polarity will result in
a 2× accuracy specification change. To avoid this problem,
matrix switching could be added to the test system to
reverse the current. See Section 4.
5-9
Operation
7021
HI
182 Input
Model 182
LO
1
1
12
12
DUTs
(12)
220 Output
HI
1
LO
12
220 Current Source
Dual 1x12 MUX
182
Nanovoltmeter
V
R
220 Current
Source
7021
DUT
Figure 5-7
Low resistance testing
Transistor testing
Typical transistor tests that can be performed with the aid of
the Model 7021 include current gain tests, leakage tests, as
well as tests to determine the common-emitter characteristics of the device. The following paragraphs discuss these
tests and give typical equipment configurations for the tests.
Current gain tests
The DC or static common-emitter current gain of a transistor can be determined by biasing the transistor for a specific
value of base current, IB, and then measuring the collector
current, IC. The DC common-emitter current gain, β, of the
transistor is then determined as follows:
I
β = ----CIB
5-10
Figure 5-8 shows the test configuration and equivalent circuit for the current gain test. The Model 224 Current Source
is used to source the base current, IB. The Model 230 Voltage Source supplies the collector-emitter voltage, VCE, and
the collector current, IC, is measured by the Model 2000
DMM. Switching among the transistors being tested is performed by the Model 7021.
Operation
7021
Measure
IC
HI
Amps
LO
1
B
C
POWER
Model 2000
DMM
E
12
Output
1
Common
12
LO
Source
VCE
B
HI
C
E
1
Model 230
Voltage Source
DUT (12)
12
Output
Dual 1x12 MUX
Source
IB
Note: Bank B channels 13 through
18 are not used.
Model 224
Current Source
A. Test Configuration
IC
DUT
VCE
V
2000
DMM
IB
+
224
Current
Source
-
230 Voltage
Source
B. Simplified Equivalent Circuit
Figure 5-8
Configuration for current gain and common-emitter test
In order to perform the current gain test, the voltage source
is first set to the desired value of VCE. The current source is
then set to a base current value that will result in the desired
value of IC as measured by the DMM. The current gain can
then be calculated as outlined in the previous paragraph.
In order to reduce errors caused by voltage burden, use a
higher current range on the Model 2000 DMM. Doing so
will result in the loss of one or two decades of resolution,
but 3 1/2 or 4 1/2-digit resolution will probably be adequate
for most situations.
5-11
Operation
Common-emitter characteristic tests
Common-emitter characteristics are determined by setting
the base current, IB, to specific values. At each IB value, the
collector-emitter voltage, VCE, is swept across the desired
range at specific intervals, and the collector current, IC, is
then measured. When the data results are plotted, the
result is the familiar family of common-emitter curves
(Figure 5-9).
10
8
+80 µa
6
+60 µa
The same test configuration used for current gain tests can
be used for measuring common-emitter characteristics. The
Model 224 is used to set the base current, IB, to the desired
values. The Model 230 Voltage Source provides the collector-emitter voltage, VCE, and the Model 2000 DMM measures the collector current, IC.
Testing with matrix-digital I/O cards
The Model 7021 can be added to a matrix switching system
to enhance the test capabilities of that system. The following paragraphs discuss an overall multiplexer/matrix
switching system and also briefly outline a typical test that
can be made with such a system.
Multiplexer and matrix card connections
Ic
ma
Figure 5-10 shows a typical system using Model 7022 and
7021 cards together. In this instance, the multiplexer-digital
I/O card is configured as dual 1 × 12 and 1 × 18 multiplexers. Note that the rows of the matrix-digital I/O card are
connected to the banks of the multiplexer-digital I/O card
through the analog backplane of the mainframe; no external
wiring is necessary to connect the two cards together.
4
+40µa
2
+20 µa
IB =0
0
1
2
3
V
CE
4
5
, volts
Figure 5-9
Typical common-emitter characteristics
Backplane
Jumpers
2
DUTs
(12)
2
2
DUTs
(18)
2
1
12
2
1
18
2
Instruments
A
1
B
2
Rows
7021
Multiplexer
Banks
3
4
Note: The 7021 Bank-to-Bank
jumpers must be removed.
5
7001/7002 3-Pole
General Purpose
Backplane
Figure 5-10
Connecting model 7021 and model 7022 cards together
5-12
7022 Matrix Rows
Operation
In this application, the DUTs are connected to the bank
inputs on the multiplexer and allow a large number of DUTs
to be switched through the matrix-digital I/O card. Also, the
instruments are connected to the columns on the matrix-digital I/O card. This particular configuration is best suited for
applications requiring a large number of DUTs to be connected to several instruments. In other cases, the test configuration may call for a large number of instruments and few
DUTs. In those situations, the instruments would be connected to the multiplexer inputs, and the DUTs would be
connected to the columns.
R DUT
R PATH
Many measurements made with the Model 7021 are subject
to various effects that can seriously affect low-level measurement accuracy. The following paragraphs discuss these effects and ways to minimize them.
Path isolation
Any differential isolation capacitance affects DC measurement settling time as well as AC measurement accuracy.
Thus, it is often important that such capacitance be kept as
low as possible. Although the distributed capacitance of the
multiplexer-digital I/O card is generally fixed by design,
there is one area where you do have control over the capacitance in your system: the connecting cables. To minimize capacitance, keep all cables as short as possible.
Measure
Instrument
7021 Mux
Card
R DUT
= Source Resistance of DUT
E DUT
= Source EMF of DUT
R PATH
= Path Isolation Resistance
R IN
= Input Resistance of Measuring Instrument
Figure 5-11
Path isolation resistance
The path isolation is simply the equivalent impedance
between any two test paths in a measurement system. Ideally, the path isolation should be infinite, but the actual
resistance and distributed capacitance of cables and connectors results in less than infinite path isolation values for
these devices.
Path isolation resistance forms a signal path that is in parallel with the equivalent resistance of the DUT, as shown in
Figure 5-11. For low-to-medium device resistance values,
path isolation resistance is seldom a consideration; however,
it can seriously degrade measurement accuracy when testing
high-impedance devices. The voltage measured across such
a device, for example, can be substantially attenuated by the
voltage divider action of the device source resistance and
path isolation resistance, as shown in Figure 5-12. Also,
leakage currents can be generated through these resistances
by voltage sources in the system.
V
E DUT
DUT
Measurement considerations
R IN
R DUT
E DUT
E OUT =
R PATH
E DUT R PATH
R DUT + R PATH
Figure 5-12
Voltage attenuation by path isolation resistance
5-13
Operation
Magnetic fields
When a conductor cuts through magnetic lines of force, a
very small current is generated. This phenomenon will
frequently cause unwanted signals to occur in the test
leads of a switching multiplexer system. If the conductor
has sufficient length, even weak magnetic fields like those
of the earth can create sufficient signals to affect low-level
measurements.
Two ways to reduce these effects are: (1) reduce the lengths
of the test leads, and (2) minimize the exposed circuit area.
In extreme cases, magnetic shielding may be required. Special metal with high permeability at low flux densities (such
as mu metal) is effective at reducing these effects.
Even when the conductor is stationary, magnetically
induced signals may still be a problem. Fields can be produced by various signals such as the AC power line voltage.
Large inductors such as power transformers can generate
substantial magnetic fields, so care must be taken to keep
the switching and measuring circuits a good distance away
from these potential noise sources.
At high current levels, even a single conductor can generate
significant fields. These effects can be minimized by using
twisted pairs, which will cancel out most of the resulting
fields.
Many instruments incorporate internal filtering that may
help to reduce RFI effects in some situations. In some cases,
additional external filtering may also be required. Keep in
mind, however, that filtering may have detrimental effects on
the desired signal.
Ground loops
When two or more instruments are connected together, care
must be taken to avoid unwanted signals caused by ground
loops. Ground loops usually occur when sensitive instrumentation is connected to other instrumentation with more than
one signal return path such as power line ground. As shown
in Figure 5-13, the resulting ground loop causes current to
flow through the instrument LO signal leads and then back
through power line ground. This circulating current develops
a small but undesirable voltage between the LO terminals of
the two instruments. This voltage will be added to the source
voltage, affecting the accuracy of the measurement.
Signal Leads
Instrument 1
Instrument 2
Ground Loop
Current
Power Line Ground
Radio frequency interference
Radio Frequency Interference (RFI) is a general term used
to describe electromagnetic interference over a wide range
of frequencies across the spectrum. Such RFI can be particularly troublesome at low signal levels, but it can also affect
measurements at high levels if the problem is of sufficient
severity.
RFI can be caused by steady-state sources such as radio or
TV signals or some types of electronic equipment (microprocessors, high speed digital circuits, etc.), or it can result
from impulse sources, as in the case of arcing in high-voltage environments. In either case, the effect on the measurement can be considerable if enough of the unwanted signal
is present.
RFI can be minimized in several ways. The most obvious
method is to keep the equipment and signal leads as far
away from the RFI source as possible. Shielding the switching card, signal leads, sources, and measuring instruments
will often reduce RFI to an acceptable level. In extreme
cases, a specially constructed screen room may be required
to sufficiently attenuate the troublesome signal.
5-14
Instrument 3
Figure 5-13
Power line ground loops
Figure 5-14 shows how to connect several instruments
together to eliminate this type of ground loop problem.
Here, only one instrument is connected to power line
ground.
Instrument 1
Instrument 2
Instrument 3
Power Line Ground
Figure 5-14
Eliminating ground loops
Operation
Ground loops are not normally a problem with instruments
having isolated LO terminals. However, all instruments in
the test setup may not be designed in this manner. When in
doubt, consult the manual for all instrumentation in the test
setup.
Keeping connectors clean
As is the case with any high-resistance device, the integrity
of connectors can be damaged if they are not handled properly. If connector insulation becomes contaminated, the
insulation resistance will be substantially reduced, affecting
high-impedance measurement paths.
If the connector insulators should become contaminated, either by inadvertent touching, or from airborne deposits, they
can be cleaned with a cotton swab dipped in clean methanol.
After thoroughly cleaning, they should be allowed to dry for
several hours in a low-humidity environment before use, or
they can be dried more quickly using dry nitrogen.
AC frequency response
The AC frequency response of the Model 7021 is important
in test systems that switch AC signals. Refer to the specifications at the front of this manual.
Oils and salts from the skin can contaminate connector
insulators, reducing their resistance. Also, contaminants
present in the air can be deposited on the insulator surface.
To avoid these problems, never touch the connector insulating material. In addition, the multiplexer-digital I/O card
should be used only in clean, dry environments to avoid
contamination.
5-15
Operation
5-16
6
Service Information
WARNING
The information in this section is intended only for qualified service personnel. Some of the procedures may expose
you to hazardous voltages that could result in personal injury or death. Do not
attempt to perform these procedures
unless you are qualified to do so.
Introduction
This section contains information necessary to service the
Model 7021 multiplexer-digital I/O card and is arranged as
follows:
•
Handling and cleaning precautions — Discusses handling precautions and methods to clean the card should
it become contaminated.
•
Performance verification — Covers the procedures
necessary to determine if the multiplexer meets stated
specifications.
•
Functionality test — Provides a test procedure to determine if a digital I/O input or output channel is functioning properly.
•
Special handling of static-sensitive devices — Reviews precautions necessary when handling static-sensitive devices.
•
Principles of operation — Briefly discusses circuit operation.
•
Troubleshooting — Presents some troubleshooting
tips for the Model 7021 including relay replacement
precautions.
Handling and cleaning precautions
Because of the high impedance areas on the Model 7021,
care should be taken when handling or servicing the card to
prevent possible contamination, which could degrade performance. The following precautions should be taken when servicing the card.
Do not store or operate the card in an environment where
dust could settle on the circuit board. Use dry nitrogen gas to
clean dust off the board if necessary.
Handle the card only by the edges and shields. Do not touch
any board surfaces, components, or connectors. Do not touch
areas adjacent to electrical contacts. When servicing the
card, wear clean cotton gloves.
If making solder repairs on the circuit board, use an
OA-based (organic activated) flux. Remove the flux from the
work areas when the repair is complete. Use pure water
along with plenty of clean cotton swabs or a clean soft brush
to remove the flux. Take care not to spread the flux to other
areas of the circuit board. Once the flux has been removed,
swab only the repaired area with methanol, then blowdry the
board with dry nitrogen gas.
After cleaning, the card should be placed in a 50°C low humidity environment for several hours before use.
6-1
Service Information
Performance verification
Environmental conditions
The following paragraphs discuss performance verification
procedures for the Model 7021, including path resistance,
offset current, contact potential, and isolation.
All verification measurements should be made at an ambient
temperature between 18° and 28°C and at a relative humidity
of less than 70%.
With the Model 7021’s backplane jumpers installed, the performance verification procedures must be performed with
only one card (the one being checked) installed in the Model
7001/7002 mainframe. These conditions do not apply if the
backplane jumpers are removed.
Recommended equipment
Table 6-1 summarizes the equipment necessary for performance verification, along with an application for each unit.
Multiplexer connections
CAUTION
Contamination will degrade the performance of the card. To avoid contamination, always grasp the card by the side
edges and shields. Do not touch the connectors and do not touch the board surfaces or components. On plugs and
receptacles, do not touch areas adjacent
to the electrical contacts.
The following information summarizes methods that can be
used to connect test instrumentation to the card. Detailed
connection information is provided in Section 4.
One method to make instrument connections to the card is by
hard-wiring a 96-pin female DIN connector and then mating
it to the connector on the Model 7021. Input and output
shorting connections can also be done at the connector. The
connector in the Model 7011-KIT-R connection kit
(Table 4-1) can be used for this purpose. Pin identification
for the connector is provided by Figure 4-9 and Table 4-2.
NOTE
Failure of any performance verification
test may indicate that the card is contaminated. See the Handling and cleaning precautions paragraph to clean the card.
Table 6-1
Verification equipment
Description
Model
Specifications
Applications
DMM
Keithley Model 2000
100Ω; 0.01%
Path resistance
Electrometer w/voltage source
Keithley Model
6517A
20pA, 200pA; 1%
100V source; 0.15%
Offset current, path isolation
Sensitive Digital Voltmeter
Keithley Model 182
3mV; 60ppm
Contact potential
Triax cable (unterminated)
Keithley Model 7025

Offset current
Low thermal cable
(unterminated)
Keithley Model 1484

Contact potential
6-2
Service Information
4. Set the Model 2000 to the 100Ω range and connect the
four test leads to the INPUT and INPUT Ω 4 WIRE
jacks.
5. Short the four test leads together and zero the Model
2000. Leave zero enabled for the entire test.
6. Connect INPUT HI and INPUT Ω 4 WIRE HI of the
Model 2000 to the common terminal (jumper on bank A
inputs). It is recommended that the physical connections
be made at the inputs of bank A, as shown in Figure 6-1.
7. Connect INPUT LO and INPUT Ω 4 WIRE LO to the
HI (H) terminal of bank A.
8. Install the Model 7021 in slot 1 (CARD 1) of the Model
7001/7002.
9. Turn on the Model 7001/7002 and program it to close
channel 1!1 (bank A, input 1). Verify that the resistance
of this path is <1.25Ω.
10. Open channel 1!1 and close channel 1!2 (bank A, input
2). Verify that the resistance of this path is <1.25Ω.
11. Using the basic procedure in steps 9 and 10, check the
resistance of bank A HI (H) terminal paths for the rest of
the bank A inputs (channels 1!6, 1!7, 1!11, 1!12, 1!16,
1!17, 1!21, 1!22, 1!26, and 1!27).
12. Turn off the Model 7001/7002 and move the INPUT LO
and INPUT Ω 4 WIRE LO test leads to the LO (L) terminal of bank A.
13. Repeat steps 9 through 11 to check the LO (L) terminal
paths of bank A (channels 1!1, 1!2, 1!6, 1!7, 1!11, 1!12,
1!16, 1!17, 1!21, 1!22, 1!26, and 1!27).
14. Repeat the basic procedure in steps 1 through 13 for
bank B (channels 1!3-1!5, 1!8-1!10, 1!13-1!15, 1!181!20, 1!23-1!25, and 1!28-1!30).
WARNING
When wiring a connector and device
under test, do not leave any exposed
wires or connections. No conductive
part of the circuit may be exposed. Properly cover the conductive parts, or death
by electric shock may occur.
CAUTION
After making solder connections to a
connector, remove solder flux as explained in the Handling and cleaning
precautions paragraph. Failure to clean
the solder connections could result in
degraded performance and prevent the
card from passing verification tests.
Before pre-wiring any connectors or plugs, study the following test procedures to fully understand the connection requirements.
Channel resistance tests
Referring to Figure 6-1, perform the following steps to verify
that each contact of every relay is closing properly and that
the resistance is within specification.
1. Turn off the Model 7001/7002 if it is on.
2. Turn on the Model 2000 and allow it to warm up for one
hour before making measurements.
3. Connect all input terminals of bank A together to form
one common terminal, as shown in Figure 6-1.
Input Ω 4 Wire HI
Model 2000
(Measure 4-Wire Ohms)
HI
Input HI
Input LO
LO
POWER
Input Ω 4 Wire LO
1
A
Jumpers
11
7
6
2
12
21
17
16
26
22
27
H
L
3
B
9
8
5
4
15
14
13
10
19
18
Bank
Outputs
30
29
28
25
24
23
20
H
L
H
L
H
L
H
L
H
L H
Note: Connections are set
up to test Bank A HI.
L H
L
H
L
H
L
H
L H
L
H
L H
L
H
L
H
L
H
L
H
L
H
L
H
L
Bank Inputs
Model 7021
Figure 6-1
Path resistance test connections
6-3
Service Information
Offset current tests
These tests check leakage current between HI (H) and LO
(L) (differential offset current) and from HI (H) and LO (L)
to chassis (common-mode offset current) of each pathway. In
general, these tests are performed by measuring the leakage
current with an electrometer. In the following procedure, the
Model 6517A is used to measure the leakage current.
Referring to Figure 6-2, perform the following procedure to
check offset current:
1. Turn off the Model 7001/7002 if it is on, and remove any
jumpers or wires connected to the card.
2. Connect the triax cable to the Model 6517A, but do not
connect it to the card at this time.
3. Turn on the Model 6517A and allow the unit to warm up
for two hours before testing. After warm up, select the
200pA range, enable zero check, and zero correct the instrument. Leave zero correct enabled for the entire procedure.
4. Connect the triax cable to bank A HI and LO, as shown
in Figure 6-2A.
5. Install the Model 7021 in slot 1 (CARD 1) of the mainframe.
6. Turn on the Model 7001/7002.
6-4
7. Program the unit to close channel 1!1 (bank A, input 1).
8. On the Model 6517A, disable zero check and allow the
reading to settle. Verify that the reading is <100pA. This
measurement is the offset (leakage) current of the pathway.
9. Enable zero check on the Model 6517A and open channel 1!1 from the front panel of the mainframe.
10. Repeat the basic procedure in steps 7 through 9 to check
the rest of the pathways of bank A (channels 1!2, 1!6,
1!7, 1!11, 1!12, 1!16, 1!17, 1!21, 1!22, 1!26, and 1!27).
11. Turn off the mainframe and change the electrometer
connections to bank B.
12. Repeat the basic procedure in steps 7 through 10 to
check the bank B inputs (channels 1!3-1!5, 1!8-1!10,
1!13-1!15, 1!18-1!20, 1!23-1!25, and 1!28-1!30).
13. Turn off the Model 7001/7002 and change the electrometer connections, as shown in Figure 6-2B. Note that
electrometer HI is connected to HI and LO of the bank
A output, which are jumpered together. Electrometer
LO is connected to chassis.
14. Turn on the Model 7001/7002.
15. Repeat steps 7 through 12 to check that the commonmode offset current is <100pA.
Service Information
Model 7025
Unterminated
Triax Cable
Model 6517A
(Measure Current)
WARNING:NO INTERNAL OPERATOR SERVICABLE PARTS,SERVICE BY QUALIFIED PERSONNEL ONLY.
90-110V
105-125V
Note: Setup shown is configured
to test Bank A pathways for
offset current.
180-220V
210-250V
115V
!
!
CAUTION:FOR CONTINUED PROTECTION AGAINST FIRE HAZARD,REPLACE FUSE WITH SAME TYPE AND RATING.
Bank Inputs
HI
(Red)
A
1
2
6
7
11
12
16
17
21
22
26
27
LO
(Blk)
B
3
4
5
8
9
10
13
14
15
18
19
20
H
L H
L H
L
H
L
H
L H
L
H
L
H
L
H
L
H
L H
L H
H
L
24
23
L H
L H
L H
L H
30
29
28
25
L H
L H
H
L
Bank
Outputs
L
Model 7021
A) Differential
Model 7025
Unterminated
Triax Cable
Model 6517A
(Measure Current)
WARNING:NO INTERNAL OPERATOR SERVICABLE PARTS,SERVICE BY QUALIFIED PERSONNEL ONLY.
90-110V
105-125V
Note: Setup shown is configured
to test Bank A pathways for
offset current.
180-220V
210-250V
115V
!
!
CAUTION:FOR CONTINUED PROTECTION AGAINST FIRE HAZARD,REPLACE FUSE WITH SAME TYPE AND RATING.
Bank Inputs
HI
(Red)
LO
(Blk)
A
1
2
6
7
11
12
16
17
21
22
26
27
B
3
4
5
8
9
10
13
14
15
18
19
20
H
L H
L H
Short
L
H
L
H
L H
L
H
L
H
L
H
L H
L H
L H
H
L
24
23
L H
L H
25
L H
29
28
L H
L H
30
L H
H
L
Bank
Outputs
L
Model 7021
B) Common-Mode
Figure 6-2
Offset current test connections
6-5
Service Information
Contact potential tests
7. Install the Model 7021 in the Model 7001/7002 slot 1,
and turn on the mainframe.
8. Allow Models 7001/7002, 7021, and 182 to warm up for
two hours.
9. Select the 3mV range on the Model 182.
10. Press REL READING on the Model 182 to null out internal offsets. Leave REL READING enabled for the
entire procedure.
11. Turn off the mainframe. Remove the Model 7021 from
slot 1. Cut the short on bank B output HI to LO.
12. Install the Model 7021 in mainframe slot 1, and turn
power on.
13. Wait 15 minutes.
14. Program the mainframe to close channel 1!1.
15. After settling, verify that reading on the Model 182 is
<3µV. This measurement represents the contact potential of the pathway.
16. From the mainframe, open channel 1!1.
17. Repeat steps 14 through 16 for all 30 channels.
These tests check the EMF generated by each relay contact
pair (H and L) for each pathway. The tests consist of using a
sensitive digital voltmeter (Model 182) to measure the contact potential.
Referring to Figure 6-3, perform the following procedure to
check contact potential of each path:
1. Turn off the Model 7001/7002 if it is on.
2. Place jumpers between banks A and B.
3. Turn on the Model 182 and allow the unit to warm up to
achieve rated accuracy.
4. Place a short between HI to LO on each input (channels
1!1-1!30).
5. Place a short between HI to LO on output bank B (long
enough to cut with wire cutters).
6. Connect the Model 182 input leads to HI and LO on output bank A using copper wires.
KEITHLEY
182 SENSITIVE DIGITAL VOLTMETER
Model 1484
Low Thermal Cable
(Unterminated)
TRG
SRQ
REM
TALK
LSTN
Low thermal short.
Clean, high purity
copper (1 of 30)
Model 182
Jumpers
Bank Inputs
HI
A 1
2
11
7
6
17
16
12
21
22
26
27
H
L
LO
3
B
H
4
L H
5
L H
8
L
H
9
L
H
10
L H
Note: Setup shown is configured
to test Bank A and B
relays for contact potential.
Figure 6-3
Contact potential test connections
6-6
13
L
H
14
L
H
15
L H
18
L H
19
L H
20
L H
23
L H
Model 7021
24
L H
25
L
H
28
L H
29
L H
30
L H
H
L
Bank
Outputs
L
Low thermal short.
Clean, high purity
copper (1 of 1)
Service Information
Bank and channel-to-channel isolation tests
4. Install the Model 7021 in slot 1 (CARD 1) and turn on
the mainframe.
Bank isolation tests check the leakage resistance between adjacent banks. Channel-to-channel isolation tests check the
leakage resistance between a bank output connection and a
bank input connection with an adjacent bank input relay
closed. In general, the tests are performed by applying a voltage (100V) across the leakage resistance and then measuring
the current. The isolation resistance is then calculated as R =
V/I. In the following procedure, the Model 6517A functions
as both a voltage source and an ammeter. In the R function,
the Model 6517A internally calculates the resistance from
the known voltage and current levels and displays the resistive value.
WARNING
The following steps use hazardous
voltage (100V). Be sure to remove power
from the circuit before making
connection changes.
5. Place the Model 6517A in the R measurement function.
6. Turn on and program the Model 7001/7002 to close channels 1!1 and 1!4 (bank A, input 1 and bank B, input 4).
7. On the Model 6517A, source +100V.
8. After allowing the reading on the Model 6517A to settle,
verify that it is >1GΩ (109Ω). This measurement is the
leakage resistance (bank isolation) between bank A, input 1 and bank B, input 4.
9. Using Table 6-2 as a guide, repeat the basic procedure of
steps 6 through 8 for the rest of the path pairs (test numbers 2 through 12 in the table).
10. Turn off the Model 6517A voltage source.
Perform the following steps to check bank and channel-tochannel isolation:
1. Turn off the Model 7001/7002 if it is on, and remove any
jumpers or test leads connected to the card.
2. Turn on the Model 6517A and allow the unit to warm up
for two hours before testing.
3. Connect the electrometer to the Model 7021, as shown
in Figure 6-4. Make sure the voltage source is off. Also,
make sure there are no other connections to the card.
Model 7025
Unterminated
Triax Cable
Ground Link
Removed
Banana to
Banana Cable
Source V and
Measure V/I
WARNING:NO INTERNAL OPERATOR SERVICABLE PARTS,SERVICE BY QUALIFIED PERSONNEL ONLY.
90-110V
105-125V
115V
!
180-220V
210-250V
!
Model 6517A
CAUTION:FOR CONTINUED PROTECTION AGAINST FIRE HAZARD,REPLACE FUSE WITH SAME TYPE AND RATING.
Note: Setup shown is configured
to test isolation between
Bank A and Bank B.
Bank Inputs
HI
1
A
2
6
7
11
12
16
17
22
21
26
27
(Red)
H
L
3
B
4
5
8
9
10
13
14
15
18
19
20
23
24
25
28
29
Bank
Outputs
30
H
L
H
L H
Unterminated
Banana Cables
L H
L
H
L
H
L H
L H
L
H
L
H
L H
L H
L
H
L H
L H
L H
L
H
L H
L H
L
Model 7021
Figure 6-4
Bank isolation test connections
6-7
Service Information
NOTE
14. On the Model 6517A, source 100V.
15. After allowing the reading on the Model 6517A to settle,
verify that it is >1GΩ (109Ω).
16. Turn off the Model 6517A voltage source.
17. Using Table 6-3 as a guide, perform tests 2 through 11
for the remaining bank A inputs. Remember to move
bank input connections as indicated in the table.
18. Use Table 6-3 (test numbers 12 through 28) and the
above procedure to test bank B inputs.
Refer to the following procedure to check
channel-to-channel isolation.
11. Turn off the mainframe and connect the Model 6517A to
the card as shown in Figure 6-5.
12. Install the Model 7021 in slot 1 and turn on the mainframe.
13. Program the mainframe to close channel 1!2 (bank A,
input 2). Make sure all other channels are open.
Ground Link
Removed
Banana to
Model 7025
Banana Cable
Unterminated
Triax Cable
Source V and
Measure V/I
WARNING:NO INTERNAL OPERATOR SERVICABLE PARTS,SERVICE BY QUALIFIED PERSONNEL ONLY.
90-110V
105-125V
180-220V
210-250V
115V
!
!
Model 6517A
CAUTION:FOR CONTINUED PROTECTION AGAINST FIRE HAZARD,REPLACE FUSE WITH SAME TYPE AND RATING.
Unterminated
Banana Cables
HI
(Red)
1
A
2
6
7
11
12
Note: Setup shown is configured
to test isolation between
path 1!1 and 1!2.
Bank Inputs
16
17
22
21
26
27
H
L
3
B
4
5
8
9
10
13
14
15
18
19
20
23
24
25
28
29
Bank
Outputs
30
H
L
Jumper
H
L H
L H
L
H
L
H
L H
L
H
L
H
L
H
L H
L H
Model 7021
Figure 6-5
Channel-to-channel isolation test connections
6-8
L H
L H
L H
L H
L H
L H
L H
L
Service Information
Table 6-2
Bank isolation test summary
Test
number
Bank isolation
Test equipment location
Channels closed*
1
Bank A, Input 1 to Bank B, Input 4
Bank A and Bank B
1!1 and 1!4
2
Bank A, Input 2 to Bank B, Input 5
Bank A and Bank B
1!2 and 1!5
3
Bank A, Input 6 to Bank B, Input 8
Bank A and Bank B
1!6 and 1!8
4
Bank A, Input 7 to Bank B, Input 9
Bank A and Bank B
1!7 and 1!9
5
Bank A, Input 11 to Bank B, Input 10
Bank A and Bank B
1!11 and 1!10
6
Bank A, Input 12 to Bank B, Input 13
Bank A and Bank B
1!12 and 1!13
7
Bank A, Input 16 to Bank B, Input 14
Bank A and Bank B
1!16 and 1!14
8
Bank A, Input 17 to Bank B, Input 15
Bank A and Bank B
1!17 and 1!15
9
Bank A, Input 21 to Bank B, Input 18
Bank A and Bank B
1!21 and 1!18
10
Bank A, Input 22 to Bank B, Input 19
Bank A and Bank B
1!22 and 1!19
11
Bank A, Input 26 to Bank B, Input 20
Bank A and Bank B
1!26 and 1!20
12
Bank A, Input 27 to Bank B, Input 23
Bank A and Bank B
1!27 and 1!23
*Assumes Model 7021 is installed in slot 1 of mainframe. Programmed as slot (1) and channel.
6-9
Service Information
Table 6-3
Channel-to-channel isolation test summary
Test
number
Test equipment location
1
2
3
4
5
6
7
8
9
10
11
Bank A, Input 1 to Bank A, Input 2
Bank A, Input 2 to Bank A, Input 6
Bank A, Input 6 to Bank A, Input 7
Bank A, Input 7 to Bank A, Input 11
Bank A, Input 11 to Bank A, Input 12
Bank A, Input 12 to Bank A, Input 16
Bank A, Input 16 to Bank A, Input 17
Bank A, Input 17 to Bank A, Input 21
Bank A, Input 21 to Bank A, Input 22
Bank A, Input 22 to Bank A, Input 26
Bank A, Input 26 to Bank A, Input 27
Bank A and Input 1
Bank A and Input 2
Bank A and Input 6
Bank A and Input 7
Bank A and Input 11
Bank A and Input 12
Bank A and Input 16
Bank A and Input 17
Bank A and Input 21
Bank A and Input 22
Bank A and Input 26
1!2
1!6
1!7
1!11
1!12
1!16
1!17
1!21
1!22
1!26
1!27
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Bank B, Input 3 to Bank B, Input 4
Bank B, Input 4 to Bank B, Input 5
Bank B, Input 5 to Bank B, Input 8
Bank B, Input 8 to Bank B, Input 9
Bank B, Input 9 to Bank B, Input 10
Bank B, Input 10 to Bank B, Input 13
Bank B, Input 13 to Bank B, Input 14
Bank B, Input 14 to Bank B, Input 15
Bank B, Input 15 to Bank B, Input 18
Bank B, Input 18 to Bank B, Input 19
Bank B, Input 19 to Bank B, Input 20
Bank B, Input 20 to Bank B, Input 23
Bank B, Input 23 to Bank B, Input 24
Bank B, Input 24 to Bank B, Input 25
Bank B, Input 25 to Bank B, Input 28
Bank B, Input 28 to Bank B, Input 29
Bank B, Input 29 to Bank B, Input 30
Bank B and Input 3
Bank B and Input 4
Bank B and Input 5
Bank B and Input 8
Bank B and Input 9
Bank B and Input 10
Bank B and Input 13
Bank B and Input 14
Bank B and Input 15
Bank B and Input 18
Bank B and Input 19
Bank B and Input 20
Bank B and Input 23
Bank B and Input 24
Bank B and Input 25
Bank B and Input 28
Bank B and Input 29
1!4
1!5
1!8
1!9
1!10
1!13
1!14
1!15
1!18
1!19
1!20
1!23
1!24
1!25
1!28
1!29
1!30
*Assumes Model 7021 is installed in slot 1 of mainframe. Programmed as slot (1) and channel.
6-10
Channel
closed*
Channel-to-channel isolation
Service Information
Differential and common-mode isolation tests
3. On the Model 6517A, set the voltage source for +100V.
Make sure the voltage source is off.
4. Place the Model 6517A in the R measurement function.
5. Make sure the Model 6517A voltage source is off and
connect the electrometer to bank A as shown in Figure
6-6.
6. Install the Model 7021 in slot 1 (CARD 1), and turn on
the mainframe.
7. Make sure all the relays are open.
8. On the Model 6517A, source 100V.
9. After allowing the reading on the Model 6517A to settle,
verify that it is >1GΩ (109Ω). This measurement is the
differential leakage resistance (isolation) of bank A.
10. Turn off the Model 6517A voltage source.
11. Program the mainframe to close channel 1!1 (bank A,
input 1).
12. On the Model 6517A, source +100V.
13. After allowing the reading on the Model 6517A to settle,
verify that it is also >1GΩ (109Ω). This measurement
checks the differential isolation of input 1.
These tests check the leakage resistance (isolation) between
HI (H) and LO (L) (differential) and from HI (H) and LO (L)
to chassis (common-mode) of every bank and channel. In
general, the test is performed by applying a voltage (100V)
across the terminals and then measuring the leakage current.
The isolation resistance is then calculated as R = V/I. In the
following procedure, the Model 6517A functions as a voltage source and an ammeter. In the R function, the Model
6517A internally calculates the resistance from the known
voltage and current levels and displays the resistance value.
Perform the following steps to check differential and common mode isolation:
1. Turn off the Model 7001/7002 mainframe if it is on, and
remove any jumpers and test leads connected to the
card.
2. Turn on the Model 6517A and allow the unit to warm up
for two hours for rated accuracy.
WARNING
The following steps use high voltage
(100V). Be sure to remove power from
the circuit before making connection
changes.
Ground Link
Removed
Banana to
Model 7025
Banana Cable
Unterminated
Triax Cable
Source V and
Measure V/I
WARNING:NO INTERNAL OPERATOR SERVICABLE PARTS,SERVICE BY QUALIFIED PERSONNEL ONLY.
90-110V
105-125V
180-220V
210-250V
115V
!
!
Model 6517A
CAUTION:FOR CONTINUED PROTECTION AGAINST FIRE HAZARD,REPLACE FUSE WITH SAME TYPE AND RATING.
Unterminated
Banana Cable
HI
1
A
2
6
7
11
12
Note: Setup shown is configured
to test isolation between
HI and LO of Bank A.
Bank Inputs
16
17
22
21
26
27
H
(Red)
L
3
B
4
5
8
9
10
13
14
15
18
19
20
23
24
25
28
29
Bank
Outputs
30
H
L
H
L H
L H
L
H
L
H
L H
L
H
L
H
L
H
L H
L H
L H
L H
L H
L H
L H
L H
L H
L
Model 7021
Figure 6-6
Differential isolation test connections
6-11
Service Information
NOTE
14. Using Table 6-4 as a guide, repeat the basic procedure in
steps 10 through 13 to test the rest of the inputs of bank
A (test numbers 3 through 13 of the table).
15. Use Table 6-4 (test numbers 14 through 32) and steps 5
through 13 to test bank B.
16. Turn off the Model 6517A voltage source.
Ground Link
Removed
Banana to
Model 7025
Banana Cable
Unterminated
Triax Cable
90-110V
105-125V
17. Turn off the mainframe, and connect the electrometer to
the Model 7021 as shown in Figure 6-7.
18. Repeat steps 3 through 15 to check common-mode isolation. Verify that each reading is >1GΩ (109Ω).
Source V and
Measure V/I
WARNING:NO INTERNAL OPERATOR SERVICABLE PARTS,SERVICE BY QUALIFIED PERSONNEL ONLY.
180-220V
210-250V
115V
!
Refer to Figure 6-7 for the following procedure to check common-mode isolation.
!
Model 6517A
CAUTION:FOR CONTINUED PROTECTION AGAINST FIRE HAZARD,REPLACE FUSE WITH SAME TYPE AND RATING.
Unterminated
Banana Cable
Jumper
HI
1
A
2
6
7
11
12
Note: Setup shown is configured
to test isolation between
Bank A and chassis ground.
Bank Inputs
16
17
22
21
26
27
H
(Red)
L
3
B
4
5
8
9
10
13
14
18
15
19
20
23
24
25
28
29
Bank
Outputs
30
H
L
H
L H
L H
L
H
L
H
L H
L
H
L
H
L
H
L H
L H
Model 7021
Figure 6-7
Common-mode isolation test connections
6-12
L H
L H
L H
L H
L H
L H
L H
L
Service Information
Table 6-4
Differential and common-mode isolation testing
Test
number
Differential or
common-mode
isolation
Channel
closed*
1
2
3
4
5
6
7
8
9
10
11
12
13
Bank A
Bank A, Input 1
Bank A, Input 2
Bank A, Input 6
Bank A, Input 7
Bank A, Input 11
Bank A, Input 12
Bank A, Input 16
Bank A, Input 17
Bank A, Input 21
Bank A, Input 22
Bank A, Input 26
Bank A, Input 27
None
1!1
1!2
1!6
1!7
1!11
1!12
1!16
1!17
1!21
1!22
1!26
1!27
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Bank B
Bank B, Input 3
Bank B, Input 4
Bank B, Input 5
Bank B, Input 8
Bank B, Input 9
Bank B, Input 10
Bank B, Input 13
Bank B, Input 14
Bank B, Input 15
Bank B, Input 18
Bank B, Input 19
Bank B, Input 20
Bank B, Input 23
Bank B, Input 24
Bank B, Input 25
Bank B, Input 28
Bank B, Input 29
Bank B, Input 30
None
1!3
1!4
1!5
1!8
1!9
1!10
1!13
1!14
1!15
1!18
1!19
1!20
1!23
1!24
1!25
1!28
1!29
1!30
output can be high (positive) or low (negative) when the
channel is turned on, depending on the logic configuration.
3. Place the mainframe in the “read input channels” display mode. Verify on the display that the input channel
is off (open).
4. On the mainframe, turn off (open) the output channel
and verify on the display that the input channel turns on
(closes).
5. On the mainframe, return the instrument to the normal
display mode and verify on the display that the output
channel is off (open).
Output Channel
Input Channel
OUT
IN
GND
GND
Internal connections:
Internal voltage source (+5V) selected.
Pull-up resistor installed.
Figure 6-8
Testing an input or output channel
Special handling of static-sensitive devices
CMOS and other high-impedance devices are subject to possible static discharge damage because of the high-impedance
levels involved. When handling such devices, use the precautions listed below.
NOTE
In order to prevent damage, assume that all
parts are static-sensitive.
*Assumes Model 7021 is installed in slot 1 of mainframe. Programmed as slot (1) and channel.
Channel functionality test
1. As shown in Figure 6-8, connect the suspect input or
output channel to an output or input channel that is
known to be functioning properly. The internal 5V supply must be used.
2. From the front panel of the mainframe, turn on (close)
the output channel. Verify that the display indicates that
the output channel is on (closed). Keep in mind that the
1. Such devices should be transported and handled only in
containers specially designed to prevent or dissipate
static buildup. Typically, these devices will be received
in anti-static containers made of plastic or foam. Keep
these parts in their original containers until ready for installation or use.
2. Remove the devices from their protective containers
only at a properly grounded workstation. Also, ground
yourself with an appropriate wrist strap while working
with these devices.
3. Handle the devices only by the body; do not touch the
pins or terminals.
6-13
Service Information
4. Any printed circuit board into which the device is to be
inserted must first be grounded to the bench or table.
5. Use only anti-static type de-soldering tools and
grounded-tip soldering irons.
Principles of operation
Block diagram
Figure 6-9 shows a simplified block diagram of the Model
7021. Key elements include the ROM, which contains card
ID and configuration information, multiplexer relay drivers
and relays, and digital I/O output channel drivers and digital
I/O input channel registers. These various elements are discussed in the following paragraphs.
The following paragraphs discuss the basic operating principles for the Model 7021 and can be used as an aid in troubleshooting the card. Schematic drawings 7021-106 and 7021172 are located in Section 7.
OUTCLOCK
OUTDATA
To Mainframe
Relay
Drivers
STROBE
ENABLE
Relay
Channels
1-30
User
connections
U106U109
+3.5V (Steady State)
+5.7 (≈ 100 msec during
relay actuation)
OUTCLOCK
OUTDATA
To Mainframe
STROBE
ENABLE
INDATA
From
Mainframe
INCLOCK
IDCLK
6-14
User
connections
U105
and
U106
In 1
Input
Channel
Registers
U101
and
U102
ROM
IDDATA
U110
Figure 6-9
Model 7021 block diagram
Output
Channels
31-40
In 2
Relay
Power
Control
Q100, Q101
U114, U115
STROBE
ENABLE
To/From
Mainframe
Output
Channel
Drivers
In 10
+6V, +15V
Service Information
ID data circuits
Upon power-up, card identification information from each
card is read by the mainframe. This ID data includes such information as card ID, hardware settling time, and relay and
channel configuration information.
ID data is contained within an on-card EEPROM (U110). In
order to read this information, the sequence described below
is performed on power-up.
1. The IDDATA line (pin 5 of U110) is set from high to low
while the IDCLK line (pin 6 of U110) is held high. This
action initiates a start command to the ROM to transmit
data serially to the mainframe (Figure 6-10).
2. The mainframe sends the ROM address location to be
read over the IDDATA line. The ROM then transmits an
acknowledge signal back to the mainframe, and it then
transmits data at that location back to the mainframe
(Figure 6-11).
3. The mainframe then transmits an acknowledge signal,
indicating that it requires more data. The ROM will then
sequentially transmit data after each acknowledge signal it receives.
4. Once all data is received, the mainframe sends a stop
command, which is a low-to-high transition of the IDDATA line with the IDCLK line held high (Figure 6-10).
Multiplexer relay control
Card relays are controlled by serial data transmitted via the
relay DATA line. A total of five bytes for each card are shifted in serial fashion into latches located in the card relay driver ICs. The serial data is clocked in by the CLK line. As data
overflows one register, it is fed out the Q’s line of the register
down the chain.
Once all five bytes have shifted into the card, the STROBE
line is set high to latch the relay information into the Q outputs of the relay drivers, and the appropriate relays are energized (assuming the driver outputs are enabled, as discussed
below). Note that a relay driver output goes low to energize
the corresponding relay.
IDCLK
IDDATA
Start Bit
Stop Bit
Figure 6-10
Start and stop sequences
IDCLK
1
8
9
IDDATA
(Data output
from mainframe
or ROM)
IDDATA
(Data output
from mainframe
or ROM)
Start
Acknowledge
Figure 6-11
Transmit and acknowledge sequence
6-15
Service Information
Multiplexer relay power control
A relay power control circuit, made up of U114, U115,
Q100, Q101, and associated components, keeps power dissipated in relay coils at a minimum, thus reducing possible
problems caused by thermal EMFs.
During steady-state operation, the relay supply voltage, +V,
is regulated to +3.5V to minimize coil power dissipation.
When a relay is first closed, the STROBE pulse applied to
U114 changes the parameters of the relay supply voltage regulator, Q100, allowing the relay supply voltage, +V, to rise to
+5.7V for about 100msec. This brief voltage rise ensures that
relays close as quickly as possible. After the 100msec period
has elapsed, the relay supply voltage (+V) drops back down
to its nominal steady-state value of +3.5V.
Digital I/O output channel control
Digital output channels are controlled by serial data transmitted from the mainframe to the card via the OUTDATA
line. A total of two bytes are shifted in a serial fashion into
latches located in the output channel driver ICs. The serial
data is clocked in by the OUTCLK line. As data overflows
one register, it is fed out the Q’s line of the register down the
chain.
Once all bytes have shifted into the card, the STROBE line
is set high to latch the output channel information into the Q
outputs of the output channel drivers. Note that a channel
driver output can go low or high when it is turned on (closed)
depending on its logic configuration.
Digital I/O input channel control
The mainframe reads digital input channels of the I/O card
from a serial, two-byte data stream (via INDATA line).
Digital inputs are applied in a parallel fashion to the two input channel registers (U102 contains eight channels and
U101 contains two channels). When the digital inputs are
read, the STROBE line goes high to latch the input channel
information. The INCLOCK line then clocks out the information as a serial, two-byte data stream (via INDATA line)
to the mainframe. As data empties from the lead register
(U101), it is replaced by data via the Q7 line of the registers
down the chain.
6-16
Power-on safeguard
NOTE
The power-on safeguard circuit discussed
below is actually located on the digital
board in the mainframe.
A power-on safeguard circuit, made up of a D-type flip-flop
and associated components ensures that relays and digital I/O
output channels do not randomly energize on power-up and
power-down. This circuit disables all relays and output channels (all relays and output channels are open) during powerup and power-down periods.
The PRESET line on the D-type flip-flop is controlled by the
68302 microprocessor, while the CLK line of the D-type
flip-flop is controlled by a VIA port line on the 68302 processor. The Q output of the flip-flop drives each card relay/output channel driver IC enable pin (U105-U109, pin 8).
When the 68302 microprocessor is in the reset mode, the
flip-flop PRESET line is held low, and Q out immediately
goes high, disabling all relays and output channels (driver IC
enable pins are high). After the reset condition elapses
(≈200msec), PRESET goes high while Q out stays high.
When the first valid STROBE pulse occurs, a low logic level
is clocked into the D-type flip-flop, setting Q out low and enabling all relay drivers and output channel drivers simultaneously. Note that Q out stays low, (enabling relay drivers
and output channel drivers) until the 68302 processor goes
into a reset condition.
Service Information
Troubleshooting
Troubleshooting equipment
WARNING
Lethal voltages are present within the
Model 7001/7002 mainframe. Some of
the procedures may expose you to hazardous voltages. Observe standard safety precautions for dealing with live
circuits. Failure to do so could result in
personal injury or death.
CAUTION
Table 6-5 summarizes recommended equipment for troubleshooting the Model 7021.
Table 6-5
Recommended troubleshooting equipment
Description
Manufacturer
and model
Application
Multimeter
Keithley 2000
Measure DC voltages
Oscilloscope
TEK 2243
View logic waveforms
Observe the following precautions when
troubleshooting or repairing the card:
Troubleshooting access
To avoid contamination, which could
degrade card performance, always handle the card only by the handle and side
edges. Do not touch edge connectors,
board surfaces, or components on the
card. Also, do not touch areas adjacent
to electrical contacts on connectors.
Use care when removing relays from the
PC board to avoid pulling traces away
from the circuit board. Before attempting to remove a relay, use an appropriate de-soldering tool, such as a solder
sucker, to clear each mounting hole
completely free of solder. Each relay pin
must be free to move in its mounting
hole before removal. Also, make certain
that no burrs are present on the ends of
the relay pins.
In order to gain access to the relay card top surface to measure voltages under actual operation conditions, perform the
following steps:
1.
2.
3.
4.
Disconnect the connector card from the relay card.
Remove the mainframe cover.
Install the relay card in the CARD 1 slot location.
Turn on Model 7001/7002 power to measure voltages
(see the Troubleshooting procedure paragraph).
6-17
Service Information
Troubleshooting procedure
Table 6-6 summarizes multiplexer-digital I/O card troubleshooting.
Table 6-6
Troubleshooting procedure
Step
Item/component
Required condition
Comments
1
GND pad
All voltages referenced to digital ground
(GND pad).
2
Q100, pin 2
+6VDC
Relay voltage.
3
U101, pin 16
+5VDC
Logic voltage.
4
R135
+15VDC
Relay bias voltage.
5
Q100, pin 3
+3.5VDC*
Regulated relay voltage.
6
U110, pin 6
IDCLK pulses
During power-up only.
7
U110, pin 5
IDDATA pulses
During power-up only.
8
U106, pin 7
STROBE pulse
End of relay update sequence.
9
U106, pin 2
CLK pulses
During relay update sequence only.
10
U106, pin 3
DATA pulses
During relay update sequence only.
11
U105-U109, pins 10-18
Low with relay energized; high
with relay de-energized.
Relay driver outputs.
*+3.5VDC present at +V pad under steady-state conditions. This voltage rises to +5.7VDC for about 100msec when relay configuration is changed.
6-18
7
Replaceable Parts
Introduction
Factory service
This section contains replacement parts information, schematic diagrams, and component layout drawings for the
Model 7021.
If the card is to be returned to Keithley Instruments for repair,
perform the following:
Parts lists
Parts lists for the various circuit boards are included in tables
integrated with schematic diagrams and component layout
drawings for the boards. Parts are listed alphabetically in order of circuit designation.
1. Complete the service form at the back of this manual
and include it with the card.
2. Carefully pack the card in the original packing carton.
3. Write ATTENTION REPAIR DEPT on the shipping
label.
NOTE
It is not necessary to return the mainframe
with the card.
Ordering information
To place an order, or to obtain information concerning replacement parts, contact your Keithley representative or the
factory (see inside front cover for addresses). When ordering
parts, be sure to include the following information:
1.
2.
3.
4.
5.
Card model number 7021
Card serial number
Part description
Circuit description, if applicable
Keithley part number
Component layouts and schematic
diagrams
Component layout drawings and schematic diagrams are included on the following pages integrated with the parts lists:
Table 7-1 — Parts List, Relay Card for 7021.
7021-100 — Component Layout, Relay Card for 7021.
7021-106 — Schematic, Relay Card for 7021.
7-1
Replaceable Parts
NOTE
The Model 7021 and 7022 use the same
relay card; only the connector cards are
different.
Table 7-2 — Parts List, Mass Terminated Connector Card for
7021.
7021-170 — Component Layout, Mass Terminated Connector Card for 7021.
7021-172 — Schematic, Mass Terminated Connector Card
for 7021.
Table 7-3 — Parts List, Model 7011-KIT-R 96-pin Female
DIN Connector Kit.
Table 7-1
Relay card for Model 7021 parts list
Circuit
designation
Description
2-56X3/16 PHILLIPS PAN HEAD SCREW
(BOARD TO SHIELD)
2-56X5/8 PHILLIPS PAN HEAD FASTENER
(FOR P2001 TO STANDOFF AND SHIELD)
2-56X7/16 PHILLIPS PAN HEAD SCREW
(BOARD TO SHIELD)
4-40X3/16 PHILLIPS PAN HEAD SEMS SCREW (FOR Q100)
4-40 PEM NUT
EJECTOR ARM
IC, SERIAL EPROM, 24C01P
ROLL PIN (FOR EJECTOR ARMS)
SHIELD
STANDOFF, 2 CLEARANCE
Keithley
part no.
3-56X3/16PPH
FA-245-1
2-56X7/16PPH
4-40X3/16PPHSEM
FA-131
7011-301B
IC-737
DP-6-1
7011-305C
ST-204-1
C100-112,114,115,
118,121,122,125
C116,117,126
C119,127
C120
C123,124
CAP, 0.1µF, 20%, 50V, CERAMIC
C-365-.1
CAP, 150PF, 10%, 1000V, CERAMIC
CAP, 1µF, 20%, 50V, CERAMIC
CAP, 0.001µF, 20%, 500V, CERAMIC
CAP, 10µF, -20+100%, 25V, ALUM ELEC
C-64-150P
C-237-1
C-22-.001
C-314-10
CR100-119
DIODE, SILICON, IN4148 (D0-35)
RF-28
J100,101
J1002,1003
CONN, BERG
CONN, 48-PIN, 3-ROW
CS-339
CS-736-2
K100-129
RELAY, ULTRA-SMALL POLARIZED TF2E-5V
RL-149
P2001
CONN, 32-PIN, 2-ROW
CS-775-1
Q100
Q101
TRANS, NPN PWR, TIP31 (T0-220AB)
TRANS, N CHAN MOSPOW FET, 2N7000 (T0-92)
TG-253
TG-195
R100-130,132
R131
R133
R134,135
RES, 10K, 5%, 1/4W, COMPOSITION OR FILM
RES, 1K, 5%, 1/4W, COMPOSITION OR FILM
RES, 220K, 5%, 1/4W, COMPOSITION OR FILM
RES, 560, 10%, 1/2W, COMPOSITION
R-76-10K
R-76-1K
R-76-220K
R-1-560
7-2
Replaceable Parts
Table 7-1 (continued)
Relay card for Model 7021 parts list
Circuit
designation
R136
R137
R138
Description
RES, 2.49K, 1%, 1/8W, METAL FILM
RES, 1.15K, 1%, 1/8W, METAL FILM
RES, 1K, 1%, 1/8W, METAL FILM
Keithley
part no.
R-88-2.49K
R-88-1.15K
R-88-1K
S110
SOCKET
S0-72
ST1
STANDOFF, 4-40X0.812LG
ST-137-20
U100,103,104
U101,102
U105-109
U110
U111
U112
U113
U114
U115
IC, QUAD 2-INPUT EXCLUSIVE OR 74HCT86
IC, 8-BIT PARALLEL TO SERIAL, 74HCT165
IC, 8-BIT, SERIAL-IN LATCH DRIVER, 5841A
EPROM PROGRAM
IC, HEX INVERTER, 74HCT04
IC, QUAD 2 INPUT OR 74HCT32
IC, HIGH SPEED BUFFER, 74HC125
IC, RETRIG MONO MULTIVIB, 74HC123
IC, AJD SHUNT REGULATOR, TL431CLP
IC-707
IC-548
IC-536
7021-800A01
IC-444
IC-443
IC-451
IC-492
IC-677
VR100
DIODE, ZENER, 5.1V, IN751 (D0-7)
DZ-59
W100-107
JUMPER
J-15
7-3
Replaceable Parts
Table 7-2
Mass terminated connector card for Model 7021 parts list
Circuit
designation
Keithley
part no.
2-56X3/16PPH
2-56X3/8PPH
2-56X7/16PPH
4-40X1/4PPHSEM
Description
2-56X3/16 PHILLIPS PAN HEAD SCREW (FOR SHIELD)
2-56X3/8 PHILLIPS PAN HEAD SCREW (FOR BRACKET)
2-56X7/16 PHILLIPS PAN HEAD SCREW
4-40X1/4 PHILLIPS PAN HEAD SEMS SCREW
(CONNECTS RELAY BOARD TO CONNECTOR BOARD)
BRACKET
CONN, JUMPER
SHIELD
STANDOFF
7011-307
CS-476
7011-311A
ST-203-1
C201-204
CR201,202
CAP, 0.1µF, 20%, 50V, CERAMIC
DIODE, SILICON, IN4148 (D0-35)
C-365-.1
RF-28
J201,204,205
J202,203
J1004
CONN, BERG
CONN SHIM
CONN, 96-PIN, 3-ROW
CS-339
7011-309A
CS-514
K201,202
RELAY, ULTRA-SMALL POLARIZED TF2E-4.5V
RL-162
P1002,1003
CONNECTOR, 48-PIN, 3-ROW
CS-748-3
Q201
TRANS, NPN SILICON, 2N3904 (T0-92)
TG-47
R201-205,207210,212
R206
R211,213
RES, 10K, 5%, 1/4W, COMPOSITION OR FILM
R-76-10K
RES, 100K, 5%, 1/4W, COMPOSITION OR FILM
RES, 220, 10%, 1/2W, COMPOSITION
R-76-100K
R-1-220
U201-203
IC, 4-CHANNEL PWR DRIVER, 2549B
IC-1044
Table 7-3
Model 7011-KIT-R 96-pin female DIN connector kit parts list
Description
96-PIN FEMALE DIN CONNECTOR
BUSHING, STRAIN RELIEF
CABLE ADAPTER, REAR EXIT (INCLUDES TWO CABLE
CLAMPS)
CONNECTOR HOUSING
7-4
Keithley
part no.
CS-787-1
BU-27
CC-64
CS-788
4
3
2
1
LTR.
ECA NO.
A
19587
REVISION
ENG.
DATE
SZ
2/11/97
70 21 -1 70
NO.
RELEASED
ADDED NO POP NOTE FOR MODEL 7037,K201,K202
CR202,CR201,J204,J205,C204,R211,R206,R213,Q201
A1
D
D
TOP SIDE COMPONENTS (SIDE -06)
C
C
J1004
* R206
*
*
Q201
R213
*
K202
*
K201
*
CR202
*
*
R211
J202
J203
*
R202
*
*
CR201
C204
U202
U201
C202
R212
J205
J204
C201
R208
C203
R207
R210
R204
R203
P1003
J201
R205
R209
P1002
R201
U203
B
B
NOTE:
FOR COMPONENT INFORMATION, SEE PRODUCT STRUCTURE.
*DO NOT POPULATE THESE PARTS FOR MODEL 7037;
R211,C204,K202,CR202,Q201,R213,R206,CR201,K201,J204,J205.
A
A
MODEL
NEXT ASSEMBLY
QTY.
USED ON
DIM ARE IN IN. UNLESS OTHERWISE NOTED
DATE
1/6/97
SCALE
DIM. TOL. UNLESS OTHERWISE SPECIFIED
DRN
CAB
APPR.
XX=+.01
XXX=+.005
DO NOT SCALE THIS DRAWING
KEITHLEY
1:1
TITLE
COMPONENT LAYOUT,
CONNECTOR BOARD
KEITHLEY INSTRUMENTS INC.
CLEVELAND, OHIO 44139
4
3
2
ANG.=+1
FRAC.=+1/64
C
NO.
7021-170
1
PG
1 OF 1
4
3
2
1
70 21 -1 72
LTR.
ECA NO.
REVISION
ENG.
DATE
NO.
A
RELEASED
9.570
+.003
-.003
9.420
D
(8.720)
D
(6.363)
(5.960)
NOTES:
1. MUST COMPLY TO KEITHLEY SPECIFICATION #QS-354.
(2.463)
2. BOARD MUST BE FABRICATED USING UL APPROVED
MATERIAL AND PROCESSES.
.040
.150
3. SUBSTRATE: NEMA GRADE FR4
1 OZ.
BASE COPPER (OZ.):
2 OZ.
FINISHED COPPER PER SIDE (OZ.):
.150
BASE INNER LAYER COPPER (OZ.):
1 OZ.
FINISHED BOARD THICKNESS (IN.):
.062
+.007
-.003
4. SUPPLIED DATA:
ETCH PER ARTWORK:
7021-173-06,-05,-04,-03,-02,-01A
NA
DRILL PAD MASTER:
(.991)
(.990)
(.225)
FILE
NC DRILL:
7021-174-06,-01A
SOLDERMASK ARTWORK:
SOLDERMASK ARTWORK CONTAINS SELECTED AREAS OF
SOLDERMASK RELIEF ON GUARD TRACES.
7021-175-06A
SILKSCREEN ARTWORK:
(1.975)
5. SOLDERMASK: LEARONAL OR DYNACHEM PHOTOIMAGEABLE
6. SILKSCREEN COLOR: WHITE
-06
SIDES:
C
7. VENDOR UL APPROVAL LOGO ETCHING LOCATION.
(2.960)
C
8. VENDOR DATE CODE ETCHING LOCATION.
4.25
9. ELECTRICAL TEST VERIFICATION STAMP LOCATION.
10. QUOTING DATA:
PTH
TECHNOLOGY TYPE:
MINIMUM TRACE SIZE:
.010
MINIMUM PAD SIZE:
.025
.010
MINIMUM COPPER TO COPPER SPACING:
SEE NOTE #9 (SIDE -01)
SEE NOTE #7 (SIDE -01)
SEE NOTE #8 (SIDE -01)
9.72
B
B
HOLE SIZE LEGEND
/ FIGURE / HOLESIZE / QTY /
.015-P
73
.035-P
37
.040-P
269
.043-P
4
.110-P
2
.125-P
1
.128-P
4
.093-N
2
.104-N
2
.125-N
2
A
A
MODEL
NEXT ASSEMBLY
QTY.
USED ON
DIM ARE IN IN. UNLESS OTHERWISE NOTED
DATE
1/3/97
SCALE
DIM. TOL. UNLESS OTHERWISE SPECIFIED
DRN
CAB
APPR.
XX=+.01
XXX=+.005
DO NOT SCALE THIS DRAWING
KEITHLEY
1:1
TITLE
HOLESIZE
CONNECTOR BOARD
KEITHLEY INSTRUMENTS INC.
CLEVELAND, OHIO 44139
4
3
2
ANG.=+1
FRAC.=+1/64
C
NO.
7021-172
1
PG
1 OF 1
Index
A
AC frequency response 5-15
Analog multiplexer maximum signal
levels 5-1
Configuring digital I/O output
logic 4-4
Contact potential tests 6-6
Controlling devices using pull-up
resistors 3-2
Controlling pull-up devices 3-1
Current gain tests 5-10
B
Backplane jumpers 2-2
Backplane row jumper installation 4-2
Backplane row jumper removal 4-2
Backplane row jumpers 4-2
Bank and channel-to-channel isolation
tests 6-7
Bank-to-bank jumpers 4-3
Basic multiplexer configuration 2-1
Block diagram 6-14
C
Card installation 4-16
Card removal 4-16
Channel assignments 5-2
Channel functionality test 6-13
Channel resistance tests 6-3
Closing and opening channels 5-4
Common-emitter characteristics
curves 5-12
Component layouts and schematic
diagrams 7-1
Configuring digital I/O input pull-up
resistance 4-5
D
Differential and common-mode
isolation tests 6-11
Differential switching 2-4
Digital I/O connections 4-3
Digital I/O input channel control 6-16
Digital I/O maximum signal
levels 5-1
Digital I/O output channel
control 6-16
Digital inputs 3-3
Digital outputs 3-1
G
Ground loops 5-14
H
Handling and cleaning
precautions 6-1
Handling precautions 1-2, 4-1
I
ID data circuits 6-15
IEEE-488 bus operation 5-5
Input channels 5-1
Input connection scheme 4-15
Inspection for damage 1-2
Instruction manual 1-3
K
E
Keeping connectors clean 5-15
Environmental conditions 6-2
L
F
Low-level resistance
measurements 5-9
Factory service 7-1
Features 1-1
Four-wire resistance tests 5-8
i-1
M
P
T
Magnetic fields 5-14
Mainframe control of the card 5-1
Mainframe multiplexer expansion 2-8
Manual addenda 1-2
Measurement considerations 5-13
Mixing card types 2-7
Model 7021 installation and
removal 4-16
Multi-pin (mass termination)
connector card 4-5
Multiple-card switching systems 2-5
Multiplexer and matrix card
connections 5-12
Multiplexer bank-to-bank
jumpers 2-2
Multiplexer connections 4-2, 6-2
Multiplexer expansion 2-5
Multiplexer input expansion 2-6
Multiplexer relay control 6-15
Multiplexer relay power control 6-16
Multiplexer switching examples 5-6
Parts lists 7-1
Path isolation 5-13
Performance verification 6-2
Power-on safeguard 6-16
Power limits 5-1
Principles of operation 6-14
Pull-up resistors 4-4
Testing with matrix-digital I/O
cards 5-12
Transistor testing 5-10
Troubleshooting 6-17
Troubleshooting access 6-17
Troubleshooting equipment 6-17
Troubleshooting procedure 6-18
Turning channels on and off 5-5
Two-card system 4-11
Two-mainframe system 4-12
Two-wire resistance tests 5-7
Typical connection techniques 4-8
Typical digital I/O connection
schemes 4-14
Typical multiplexer connection
schemes 4-9
Typical multiplexer switching
schemes 2-3
O
Offset current tests 6-4
Optional accessories 1-3
Ordering information 7-1
Output channels 5-1
Output connection schemes 4-14
i-2
R
Radio frequency interference 5-14
Reading digital I/O input channels 5-6
Reading input channels 5-4
Recommended equipment 6-2
Repacking for shipment 1-3
Resistor testing 5-6
S
Safety symbols and terms 1-2
Scanning channels 5-4
Scanning output channels 5-5
Sensing 2-4
Separate switching systems 2-6
Shipping contents 1-2
Single-card system 4-10
Single-ended switching 2-3
Special handling of static-sensitive
devices 6-13
Specifications 1-2
SMU connections 2-5
U
Unpacking and inspection 1-2
V
Voltage source jumper 4-3
W
Warranty information 1-2
Service Form
Model No.
Serial No.
Date
Name and Telephone No.
Company
List all control settings, describe problem and check boxes that apply to problem.
❏
Intermittent
❏
Analog output follows display
❏
Particular range or function bad; specify
❏
❏
IEEE failure
Front panel operational
❏
❏
Obvious problem on power-up
All ranges or functions are bad
❏
❏
Batteries and fuses are OK
Checked all cables
Display or output (check one)
❏
❏
❏
Drifts
Unstable
Overload
❏
❏
Unable to zero
Will not read applied input
❏
❏
Calibration only
❏
Certificate of calibration required
Data required
(attach any additional sheets as necessary)
Show a block diagram of your measurement system including all instruments connected (whether power is turned on or not).
Also, describe signal source.
Where is the measurement being performed? (factory, controlled laboratory, out-of-doors, etc.)
What power line voltage is used?
Relative humidity?
Ambient temperature?
Other?
Any additional information. (If special modifications have been made by the user, please describe.)
Be sure to include your name and phone number on this service form.
°F
Keithley Instruments, Inc.
28775 Aurora Road
Cleveland, Ohio 44139
Printed in the U.S.A.
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