Mentor Graphics PCB Design Tools Support (英語版・PDF)

Mentor Graphics PCB Design Tools Support (英語版・PDF)
7. Mentor Graphics PCB Design Tools
Support
June 2012
QII52015-12.0.0
QII52015-12.0.0
This chapter discusses how the Quartus® II software interacts with the Mentor
Graphics® I/O Designer software and the DxDesigner software to provide a complete
FPGA-to-board design workflow.
With today’s large, high-pin-count and high-speed FPGA devices, good and correct
PCB design practices are essential to ensure correct system operation. The PCB design
takes place concurrently with the design and programming of the FPGA. The FPGA
or ASIC designer initially creates signal and pin assignments, and the board designer
must correctly transfer these assignments to the symbols in their system circuit
schematics and board layout. As the board design progresses, Altera recommends
reassigning pins to optimize the PCB layout. Ensure that you inform the FPGA
designer of the pin reassignments so that the new assignments are included in an
updated placement and routing of the design.
The Mentor Graphics I/O Designer software allows you to take advantage of the full
FPGA symbol design, creation, editing, and back-annotation flow supported by the
Mentor Graphics tools.
This chapter covers the following topics:
■
Performing design flow between the Quartus II software, the Mentor Graphics
I/O Designer software, and the DxDesigner software
■
Setting up the Quartus II software to create the design flow files
■
Creating an I/O Designer database project to incorporate the Quartus II software
signal and pin assignment data
■
Updating signal and pin assignment changes between the I/O Designer software
and the Quartus II software
■
Generating symbols in the I/O Designer software
■
Creating symbols in the DxDesigner software from the Quartus II software output
files without the use of the I/O Designer software
This chapter is intended for board design and layout engineers who want to start the
FPGA board integration while the FPGA is still in the design phase. Alternatively, the
board designer can plan the FPGA pin-out and routing requirements in the Mentor
Graphics tools and pass the information back to the Quartus II software for placement
and routing. Part librarians can also benefit from this chapter by learning how to use
output from the Quartus II software to create new library parts and symbols.
The procedures in this chapter require the following software:
■
The Quartus II software version 5.1 or later
■
DxDesigner software version 2004 or later
© 2012 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, HARDCOPY, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos
are trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance of its
semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any products and
services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information, product, or service
described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device specifications before relying
on any published information and before placing orders for products or services.
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Quartus II Handbook Version 13.1
Volume 2: Design Implementation and Optimization
June 2012
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7–2
Chapter 7: Mentor Graphics PCB Design Tools Support
FPGA-to-PCB Design Flow
■
Mentor Graphics I/O Designer software (optional)
f To obtain and license the Mentor Graphics tools and for product information, support,
and training, refer to the Mentor Graphics website (www.mentor.com).
FPGA-to-PCB Design Flow
You can create a design flow integrating an Altera® FPGA design from the Quartus II
software, and a circuit schematic in the DxDesigner software. Figure 7–1 shows the
design flow with and without the I/O Designer software.
Figure 7–1. Design Flow with and Without the I/O Designer Software
Start PCB Design
Start FPGA Design
Quartus II Software
Create or Change
Pin Assignments
Import Pin
Assignments
Using I/O
Designer?
Run I/O Assignment
Analysis
I/O Designer
No
Yes
Create or Update
I/O Designer
Database (.fpc)
Set Up to Generate
FPGA Xchange File (.fx)
Create or Change
Pin Assignments
Compile and Run
EDA Netlist Writer
.fx (1)
Regenerate .fx
Generate Symbol
DxDesigner
Create New or Open
Existing Project
.pin
Generate Symbol
Instantiate Symbol
in Schematic
Forward to Board
Layout Tool
Board Layout Tool
Layout & Route
FPGA
Changes?
Yes Back-Annotate
Changes
No
End
Note to Figure 7–1:
(1) The Quartus II software generates the .fx in the output directory you specify in the Board-Level page of the Settings dialog box. However, the
Quartus II software and the I/O Designer software can import pin assignments from an .fx located in any directory. Altera recommends working
with a backup .fx to prevent overwriting existing assignments or importing invalid assignments.
To perform the design flow shown in Figure 7–1, follow these steps:
1. In the Quartus II software, set up the board-level assignment settings to generate
an .fx for symbol generation.
2. Compile your design to generate the .fx and Pin-Out File (.pin). You can locate the
generated .fx and .pin files in the Quartus II project directory.
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June 2012
Altera Corporation
Chapter 7: Mentor Graphics PCB Design Tools Support
FPGA-to-PCB Design Flow
7–3
3. Create a board design with the DxDesigner software and the I/O Designer
software by performing the following steps:
a. Create a new I/O Designer database based on the .fx and the .pin files.
b. In the I/O Designer software, make adjustments to signal and pin assignments.
c. Regenerate the .fx in the I/O Designer software to export the I/O Designer
software changes to the Quartus II software.
d. Generate a single or fractured symbol for use in the DxDesigner software.
e. Add the symbol to the sym directory of a DxDesigner project, or specify a new
DxDesigner project with the new symbol.
f. Instantiate the symbol in your DxDesigner schematic and export the design to
the board layout tool.
g. Back-annotate pin changes created in the board layout tool to the DxDesigner
software and back to the I/O Designer software and the Quartus II software.
4. Create a board design with the DxDesigner software without the I/O Designer
software by performing the following steps:
a. Create a new DxBoardLink symbol with the Symbol wizard and reference the
.pin from the Quartus II software in an existing DxDesigner project.
b. Instantiate the symbol in your DxDesigner schematic and export the design to
a board layout tool.
1
You can update these symbols with design changes with or without the I/O Designer
software. If you use the Mentor Graphics I/O Designer software and you change
symbols with the DxDesigner software, you must reimport the symbols into
I/O Designer to avoid overwriting your symbol changes.
Performing Simultaneous Switching Noise (SSN) Analysis of Your FPGA
With the Quartus II software, you can extract pin assignment data and perform SSN
analysis of your design for designs targeting the Stratix III device family. You can
perform SSN analysis early in the board layout stage as part of your overall pin
planning process; however, you do not have to perform SSN analysis to generate pin
assignment data from the Quartus II software. You can use the SSN Analyzer tool in
the Quartus II software to optimize the pin assignments for better SSN performance.
f For more information about the SSN Analyzer, refer to the Simultaneous Switching
Noise (SSN) Analysis and Optimizations chapter in volume 2 of the Quartus II Handbook
and About the SSN Analyzer in Quartus II Help.
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Chapter 7: Mentor Graphics PCB Design Tools Support
Setting Up the Quartus II Software
Setting Up the Quartus II Software
You can transfer pin and signal assignments from the Quartus II software to the
Mentor Graphics tools by generating .pin and .fx files (refer to Figure 7–2). The .pin is
an output file generated by the Quartus II Fitter that contains pin assignment
information. You can use the Quartus II Pin Planner to set and change the
assignments contained in the .pin and then transfer the assignments to the Mentor
Graphics tools. You cannot, however, import pin assignment changes from the Mentor
Graphics tools into the Quartus II software with the .pin.
The .pin lists all used and unused pins on your selected Altera device. It also provides
the following basic information fields for each assigned pin on the device:
■
Pin signal name and usage
■
Pin number
■
Signal direction
■
I/O standard
■
Voltage
■
I/O bank
■
User or Fitter-assigned
The .fx is an input/output file generated by the Quartus II software and the I/O
Designer software that can be imported and exported from both programs. The .fx
generated by the Quartus II software lists only assigned pins and provides the
following advanced information fields for each pin on a device:
■
Pin number
■
I/O bank
■
Signal name
■
Signal direction
■
I/O standard
■
Drive strength (mA)
■
Termination enabling
■
Slew rate
■
IOB delay
■
Swap group
■
Differential pair type
The .fx generated by the I/O Designer software lists all pins, including unused pins.
In addition to the advanced information fields listed above, the .fx generated by the
Mentor Graphics I/O Designer software also includes the following information
fields:
■
Device pin name
■
Pin set
■
Pin set position
Quartus II Handbook Version 13.1
Volume 2: Design Implementation and Optimization
June 2012
Altera Corporation
Chapter 7: Mentor Graphics PCB Design Tools Support
Setting Up the Quartus II Software
■
Pin set group
■
Super pin set group
■
Super pin set position
7–5
f For more information about .fx files and the information fields added by the Mentor
Graphics software, refer to FPGA Xchange-Format File (.fx) Definition in Quartus II
Help and Mentor Graphics website (www.mentor.com) respectively.
The I/O Designer software can also read from or update a Quartus II Settings File
(.qsf). The design flow uses the .qsf in a similar manner to the .fx, but does not
transfer pin swap group information between the I/O Designer software and the
Quartus II software.
1
Because the .qsf contains additional information about your project that the Mentor
Graphics I/O Designer software does not use, Altera recommends using the .fx
instead of the .qsf.
h For more information about the .qsf, refer to Quartus II Settings File (.qsf) Definition in
Quartus II Help.
Generating a .pin File
The Quartus II software automatically generates the .pin after compiling your FPGA
design or during I/O assignment analysis.
To start I/O assignment analysis, on the Processing menu, point to Start and then
click Start I/O Assignment Analysis. The Quartus II Fitter generates the .pin and
places the file in your Quartus II design directory with the name <project name>.pin.
The Quartus II software cannot import assignments from an existing .pin.
Figure 7–2 shows how to generate .pin and .fx files.
Figure 7–2. Generating .pin and .fx Files (1)
Start FPGA Design
Quartus II Software
Create or Change
Pin Assignments
Import Pin
Assignments
Run I/O Assignment
Analysis
Set Up to Generate
.fx
Compile and Run
EDA Netlist Writer
.fx
.pin
Note to Figure 7–2:
(1) For more information about the full design flow, which includes the I/O Designer software, the DxDesigner software,
and the board layout tool flowchart details, refer to Figure 7–1.
June 2012 Altera Corporation
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Volume 2: Design Implementation and Optimization
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Chapter 7: Mentor Graphics PCB Design Tools Support
FPGA-to-Board Integration with the I/O Designer Software
f For more information about pin and signal assignment transfer and the files that the
Quartus II software can import and export, refer to the I/O Management chapter in
volume 2 of the Quartus II Handbook.
Generating an .fx File
You can generate an .fx in the Quartus II software for symbol generation in the
Mentor Graphics I/O Designer software.
h For more information about generating an .fx, refer to Generating FPGA
Xchange-Format Files for Use with Other EDA Tools in Quartus II Help.
Creating a Backup .qsf
To create a backup .qsf of your current pin assignments, follow these steps:
1. On the Assignments menu, click Import Assignments. The Import Assignments
dialog box appears.
2. In the Import Assignments dialog box, browse to your project and turn on Copy
existing assignments into <project name>.qsf.bak.
3. Click OK.
f For more information about pin and signal assignment transfer, and files the
Quartus II software can import and export, refer to the I/O Management chapter in
volume 2 of the Quartus II Handbook.
FPGA-to-Board Integration with the I/O Designer Software
The Mentor Graphics I/O Designer software allows you to integrate your FPGA and
PCB designs. Pin and signal assignment changes can be made anywhere in the design
flow with either the Quartus II Pin Planner or the I/O Designer software. The
I/O Designer software facilitates moving these changes, as well as synthesis,
placement, and routing changes, between the Quartus II software, an external
synthesis tool (if used), and a schematic capture tool such as the DxDesigner software.
This section describes how to use the I/O Designer software to transfer pin and signal
assignment information to and from the Quartus II software with an .fx, and how to
create symbols for the DxDesigner software.
Quartus II Handbook Version 13.1
Volume 2: Design Implementation and Optimization
June 2012
Altera Corporation
Chapter 7: Mentor Graphics PCB Design Tools Support
FPGA-to-Board Integration with the I/O Designer Software
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Figure 7–3 shows the design flow using the I/O Designer software.
Figure 7–3. Design Flow Using the I/O Designer Software
(1)
I/O Designer
Create or Update
.fpc
Create or Change
Pin Assignments
.fx
Regenerate .fx
Generate Symbol
DxDesigner
Create New or Open
Existing Project (2)
.pin
Generate Symbol (2)
Instantiate Symbol
in Schematic
Forward to Board
Layout Tool
Board Layout Tool
Layout and Route
FPGA
Changes?
Yes Back-Annotate
Changes
No
End
Notes to Figure 7–3:
(1) For more information about the full design flow including the Quartus II software flowchart details, refer to Figure 7–1
on page 7–2.
(2) These are DxDesigner software-specific steps in the design flow and are not part of the I/O Designer flow.
f For more information about the I/O Designer software, and to obtain usage, support,
and product updates, use the Help menu in the I/O Designer software or refer to the
Mentor Graphics website (www.mentor.com).
I/O Designer Database Wizard
An .fpc file stores all I/O Designer project information. You can create a new database
incorporating information for the .fx and .pin files generated by the Quartus II
software using the I/O Designer Database Wizard. You can also create a new, empty
database and manually add the assignment information. If there is no signal or pin
assignment information currently available, you can create an empty database
containing only a selection of the target device. This action is useful if you know the
signals in your design and the pins you want to assign. You can transfer this
information at a later time to the Quartus II software for placement and routing.
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FPGA-to-Board Integration with the I/O Designer Software
You can create an I/O Designer database with only a .pin or an .fx. However, if you
are only using a .pin, you cannot import any I/O assignment changes made in the
I/O Designer software back into the Quartus II software without first generating an
.fx. If an .fx creates the I/O Designer database, the database may not contain all the
available I/O assignment information. The .fx generated by the Quartus II software
only lists pins with assigned signals. Because the .pin lists all device pins—whether
signals are assigned to them or not—its use, along with the .fx, produces the most
complete set of information for creating the I/O Designer database.
If you skip a step in the following process, you can complete the skipped step later. To
return to a skipped step, on the Properties menu, click File. To create a new
I/O Designer database using the Database wizard, follow these steps:
1. Start the I/O Designer software. The Welcome to I/O Designer dialog box
appears. Select Wizard to create new database and click OK.
1
If the Welcome to I/O Designer dialog box does not appear, you can access
the wizard through the menu. To access the wizard, on the File menu, click
Database Wizard.
2. Click Next. The Define HDL source file page appears.
1
If no HDL files are available, or if the .fx contains your signal and pin
assignments, you can skip Step 3 and proceed to Step 4.
f For more information about creating and using HDL files in the Quartus II
software, refer to the Recommended HDL Coding Styles chapter in volume 1
of the Quartus II Handbook, or refer to the I/O Designer Help.
3. If you have created a Verilog HDL or VHDL file in your Quartus II software
design, you can add a top-level Verilog HDL or VHDL file in the I/O Designer
software. Adding a file allows you to create functional blocks or get signal names
from your design. You must create all physical pin assignments in I/O Designer if
you are not using an .fx or a .pin. Click Next. The Database Name page appears.
4. In the Database Name page, type your database file name. Click Next. The
Database Location window appears.
5. Add a path to the new or an existing database in the Location field, or browse to a
database location. Click Next. The FPGA flow page appears.
6. In the Vendor menu, click Altera.
7. In the Tool/Library menu, click Quartus II 5.0, or a later version of the Quartus II
software.
8. Select the appropriate device family, device, package, and speed (if applicable),
from the corresponding menus. Click Next. The Place and route page appears.
1
The Quartus II software version selections in the Tool/Library menu may
not reflect the version of the Quartus II software currently installed in your
system even if you are using the latest version of the I/O Designer
software. The I/O Designer software uses the version number selection in
this window to identify available or obsolete devices in that particular
version of the Quartus II software. If you are unsure of the version to select,
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Chapter 7: Mentor Graphics PCB Design Tools Support
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use the latest version listed in the menu. If the device you are targeting does
not appear in the device menu after making this selection, the device may
be new and not yet added to the I/O Designer software. For I/O Designer
software updates, contact Mentor Graphics or refer to their website
(www.mentor.com).
9. In the FPGAX file name field, type or browse to the backup copy of the .fx
generated by the Quartus II software.
10. In the Pin report file name field, type or browse to the .pin generated by the
Quartus II software. Click Next.
You can also select a .qsf for update. The I/O Designer software can update the
pin assignment information in the .qsf without affecting any other information in
the file.
1
You can select a .pin without selecting an .fx for import. The I/O Designer
software does not generate a .pin. To transfer assignment information to the
Quartus II software, select an additional file and file type. Altera
recommends selecting an .fx in addition to a .pin for transferring all the
assignment information in the .fx and .pin files.
1
In some versions of the I/O Designer software, the standard file picker may
incorrectly look for a .pin instead of an .fx. In this case, select All Files (*.*)
from the Save as type list and select the file from the list.
11. The Synthesis page appears. On the Synthesis page, you can specify an external
synthesis tool and a synthesis constraints file for use with the tool. If you do not
use an external synthesis tool, click Next.
f For more information about third-party synthesis tools, refer to Volume 3:
Verification of the Quartus II Handbook.
12. On the PCB Flow page, you can select an existing schematic project or create a
new project as a symbol information destination.
■
To select an existing project, select Choose existing project and click Browse
after the Project Path field. The Select project dialog box appears. Select the
project.
■
To create a new project, in the Select project dialog box, select Create new
empty project. Type the project file name in the Name field and browse to the
location where you want to save the file. Click OK.
If you have not specified a design tool to which you can send symbol information in
the I/O Designer software, click Advanced in the PCB Flow page and select your
design tool. If you select the DxDesigner software, you have the option to specify a
Hierarchical Occurrence Attributes (.oat) file to import into the I/O Designer
software. Click Next and then click Finish to create the database.
1
In I/O Designer version 2005 or later, the Update Wizard dialog box (refer to
Figure 7–7 on page 7–13) appears if you are creating the database with the Database
wizard. Use the Update Wizard dialog box to confirm creation of the I/O Designer
database using the selected .fx and .pin files.
June 2012 Altera Corporation
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Volume 2: Design Implementation and Optimization
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Chapter 7: Mentor Graphics PCB Design Tools Support
FPGA-to-Board Integration with the I/O Designer Software
Use the I/O Designer software and your newly created database to make pin
assignment changes, create pin swap groups, or adjust signal and pin properties in the
I/O Designer GUI (Figure 7–4).
Figure 7–4. Mentor Graphics I/O Designer Main Window
f For more information about using the I/O Designer software and the DxDesigner
software, refer to the Mentor Graphics website (www.mentor.com) or refer to the
I/O Designer software or the DxDesigner Help.
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Chapter 7: Mentor Graphics PCB Design Tools Support
FPGA-to-Board Integration with the I/O Designer Software
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Updating Pin Assignments from the Quartus II Software
As the design process continues, the FPGA designer must make changes to the logic
design in the Quartus II software that places signals on different pins after
recompiling the design, or manually with the Quartus II Pin Planner. These types of
changes must be carried forward to the circuit schematic and board layout tools to
ensure that signals connect to the correct pins on the FPGA. Updating the .fx and the
.pin files in the Quartus II software facilitates this flow (Figure 7–5).
Figure 7–5. Updating the I/O Designer Pin Assignments in the Design Flow
(1)
I/O Designer
Create or Update
.fpc
Create or Change
Pin Assignments
.fx
.pin
Regenerate .fx
Generate Symbol
Note to Figure 7–5:
(1) For more information about the full design flow, which includes the Quartus II software, the DxDesigner software,
and the board layout tool flowchart details, refer to Figure 7–1 on page 7–2.
To update the .fx in your selected output directory and the .pin in your project
directory after making changes to the design, perform one of the following tasks:
■
compile, or
■
start EDA Netlist Writer.
You must rerun the I/O Assignment Analyzer whenever you make I/O changes in
the Quartus II software. To rerun the I/O Assignment Analyzer, perform one of the
following tasks:
■
on the Processing menu, click Start Compilation, or
■
on the Processing menu, click Start I/O Assignment Analysis.
f For more information about setting up the .fx and running the I/O Assignment
Analyzer, refer to the I/O Management chapter in volume 2 of the Quartus II Handbook.
c If your I/O Designer database points to the .fx generated by the Quartus II software
instead of a backup copy of the file, updating the file in the Quartus II software
overwrites any changes made to the file by the I/O Designer software. If there are
I/O Designer assignments in the .fx that you want to preserve, create a backup copy
of the file before updating it in the Quartus II software, and verify that your
I/O Designer database points to the backup copy. To point to the backup copy,
perform the steps in the following section.
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FPGA-to-Board Integration with the I/O Designer Software
Whenever you update the .fx or the .pin in the Quartus II software, the I/O Designer
database imports the changes. You must set up the locations for the files in the
I/O Designer software.
1. To set up the file locations, on the File menu, click Properties. The project
Properties dialog box appears (Figure 7–6).
Figure 7–6. Project Properties Dialog Box
2. Under FPGA Xchange, click Browse to select the .fx file name and location.
3. To specify a Pin report file, under Place and Route, click Browse to select the .pin
file name and location.
After you have set up these file locations, the I/O Designer software monitors these
files for changes. If the .fx or .pin changes during the design flow, three indicators
flash red in the lower right corner of the I/O Designer GUI (refer to Figure 7–4 on
page 7–10). You can continue working or click on the indicators to open the
I/O Designer Update Wizard dialog box. If you have made changes to your design in
the Quartus II software that result in an updated .fx or .pin and the update indicators
do not flash or you have previously canceled an indicated update, manually open the
Update Wizard dialog box. To open the Update Wizard dialog box, on the File menu,
click Update.
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The I/O Designer Update Wizard dialog box lists the updated files associated with
the database (Figure 7–7).
Figure 7–7. Update Wizard Dialog Box
The paths to the updated files have yellow exclamation points and the Status column
shows Not updated, indicating that the database has not yet been updated with the
newer information contained in the files. A checkmark to the left of any updated file
indicates that the file updates the database. Turn on any files you want to use to
update the I/O Designer database, and click Next. If you are not satisfied with the
database update, on the Edit menu, click Undo.
1
You can update the I/O Designer database using the .fx and the .pin files
simultaneously. Turning on the .fx and the .pin files for update causes the Update
Wizard dialog box to provide options for using assignments from one file or the other
exclusively or merging the assignments contained in both files into the I/O Designer
database. Versions of the I/O Designer software older than version 2005 merge
assignments contained in multiple files.
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Chapter 7: Mentor Graphics PCB Design Tools Support
FPGA-to-Board Integration with the I/O Designer Software
Sending Pin Assignment Changes to the Quartus II Software
In the same way that the FPGA designer can make adjustments that affect the PCB
design, the board designer can make changes to optimize signal routing and layout
that must be applied to the FPGA. The FPGA designer can take these required
changes back into the Quartus II software to refit the logic to match the adjustments to
the pin-out. The I/O Designer software accommodates this reverse flow as shown in
Figure 7–8.
Figure 7–8. Updating the Quartus II Pin Assignments in the Reverse Design Flow
Start FPGA Design
Quartus II Software
Create or Change
Pin Assignments
Import Pin
Assignments
I/O Designer
Run I/O Assignment
Analysis
Set Up to Generate
.fx
Compile and Run
EDA
D Netlist Writer
r
Create or Update
.fpc
(1)
(1)
Create or Change
Pin Assignments
.fx
Regenerate .fx
Generate
r
Symbol
(2)
Notes to Figure 7–8:
(1) These are software-specific steps in the design flow and are not necessary for the reverse flow steps of the design.
(2) For more information about the full design flow, which includes the complete I/O Designer software, the DxDesigner
software, and the board layout tool flowchart details, refer to Figure 7–1 on page 7–2.
You can make pin assignment changes directly in the I/O Designer software, or the
software can automatically update changes made in a board layout tool that are
back-annotated to a schematic entry program such as the DxDesigner software. You
must update the .fx to reflect these updates in the Quartus II software. To perform this
update in the I/O Designer software, on the Generate menu, click FPGA Xchange
File.
c If your I/O Designer database points to the .fx generated by the Quartus II software
instead of a backup copy, updating the file from the I/O Designer software overwrites
any changes made to the file by the Quartus II software. If there are assignments from
the Quartus II software in the file that you want to preserve, create a backup copy of
the file before updating it in the I/O Designer software, and verify that your
I/O Designer database points to the backup copy. To point to the backup copy,
perform the steps in “Updating Pin Assignments from the Quartus II Software” on
page 7–11.
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You must import the updated .fx into the Quartus II software. To import the file,
follow these steps:
1. Start the Quartus II software and open your project.
2. On the Assignments menu, click Import Assignments.
3. In the File name box, click Browse and from the Files of type list, select FPGA
Xchange Files (*.fx).
4. Select the .fx and click Open.
5. Click OK.
Protecting Assignments in the Quartus II Software
To protect assignments in the Quartus II software, follow these steps:
1. Start the Quartus II software.
2. On the Assignments menu, click Import Assignments. The Import Assignments
dialog box appears.
3. Turn on Copy existing assignments into <project name>.qsf.bak before importing
before importing the .fx. This action automatically creates a backup copy of the
Quartus II constraints file that contains all your current pin assignments.
Generating Symbols for the DxDesigner Software
Along with circuit simulation, circuit board schematic creation is one of the first tasks
required in the design of a new PCB. Schematics must understand how the PCB
works, and to generate a netlist for a board layout tool for board design and routing.
The I/O Designer software allows you to create schematic symbols based on the
FPGA design exported from the Quartus II software.
Most FPGA devices contain hundreds of pins, requiring large schematic symbols that
may not fit on a single schematic page. Symbol designs in the I/O Designer software
can be split or fractured into various functional blocks, allowing multiple part
fractures on the same schematic page or across multiple pages. In the DxDesigner
software, these part fractures join together with the use of the HETERO attribute.
The I/O Designer software can generate symbols for use in various Mentor Graphics
schematic entry tools, and can import changes back-annotated by board layout tools
to update the database and feed updates back to the Quartus II software with the .fx.
This section discusses symbol creation specifically for the DxDesigner software.
You can create schematic symbols with the I/O Designer software in the following
ways:
■
Manually
■
Using the I/O Designer Symbol wizard
■
Importing previously created symbols from the DxDesigner software
The I/O Designer Symbol wizard can be used as a design base that allows you to
quickly create a symbol for manual editing at a later time. If you have created symbols
in a DxDesigner project and want to apply a different FPGA design to them, you can
manually import these symbols from the DxDesigner project. To import the symbols,
start the I/O Designer software, and on the File menu, click Import Symbol.
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f For more information about importing symbols from the DxDesigner software into an
I/O Designer database, refer to the I/O Designer Help.
Symbols created in the I/O Designer software are either functional, physical (PCB), or
both. Signals imported into the database, usually from Verilog HDL or VHDL files,
are the basis of a functional symbol. No physical device pins must be associated with
the signals to generate a functional symbol. This section focuses on board-level PCB
symbols with signals directly mapped to physical device pins through assignments in
either the Quartus II Pin Planner or in the I/O Designer database.
f For more information about manually creating, importing, and editing symbols in the
I/O Designer software, as well as the different types of symbols the software can
generate, refer to the I/O Designer Help.
Setting Up the I/O Designer Software to Work with the DxDesigner Software
To verify if you are set up to export symbols to a DxDesigner project, or to manually
set up the I/O Designer software to work with the DxDesigner software, you must set
the path to the DxDesigner executable, set the export type to DxDesigner, and set the
path to a DxDesigner project directory.
To set these options, follow these steps:
1. Start the I/O Designer software.
2. On the Tools menu, click Preferences. The Preferences dialog box appears.
3. Click Paths, double-click on the DxDesigner executable file path field, and click
Browse to select the location of the DxDesigner application (Figure 7–9).
4. Click Apply.
Figure 7–9. Path Preferences Dialog Box
5. Click Symbol Editor and click Export. In the Export type menu, under General,
select DxDesigner/PADS-Designer (Figure 7–10).
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6. Click Apply and click OK.
Figure 7–10. Symbol Editor Export Preferences
7. On the File menu, click Properties. The Properties dialog box appears.
8. Click the PCB Flow tab and click Path to a DxDesigner project directory.
9. Click OK.
If you do not have a new DxDesigner project in the Database wizard and a
DxDesigner project, you must create a new database with the DxDesigner software,
and point the I/O Designer software to this new project.
f For more information about creating and working with DxDesigner projects, refer to
the DxDesigner Help.
Creating Symbols with the Symbol Wizard
You can create, fracture, and edit FPGA symbols based on Altera devices with the
I/O Designer Symbol wizard. To create a symbol based on a selected Altera FPGA
device, follow these steps:
1. Start the I/O Designer software.
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2. Click Symbol Wizard in the toolbar, or on the Symbol menu, click Symbol
Wizard. The Symbol Wizard (1 of 6) page appears (Figure 7–11).
Figure 7–11. Symbol Wizard
3. On page 1 of the Symbol Wizard page, in the Symbol name field, type the symbol
name. The DEVICE and PKG_TYPE fields are automatically populated with the
device and package information. Under Symbol type, click PCB. Under Use
signals, click All.
4. Click Next. The Symbol Wizard (2 of 6) page appears.
1
If the DEVICE and PKG_TYPE fields are blank or incorrect, cancel the
Symbol wizard and select the correct device information. On the File menu,
click Properties. In the Properties window, click the FPGA Flow tab and
enter the correct device information.
5. On page 2 of the Symbol Wizard page, select fracturing options for your symbol.
If you are using the Symbol wizard to edit a previously created fractured symbol,
you must turn on Reuse existing fractures to preserve your current fractures.
Select other options on this page as appropriate for your symbol.
6. Click Next. The Symbol Wizard (3 of 6) page appears.
7. Additional fracturing options are available on page 3 of the Symbol Wizard page.
After selecting the necessary options, click Next. The Symbol Wizard (4 of 6) page
appears.
8. On page 4 of the Symbol Wizard page, select the options for the appearance of the
symbols. Select the necessary options and click Next. The Symbol Wizard (5 of 6)
page appears.
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9. On page 5 of the Symbol Wizard page, define what information you want to label
for the entire symbol and for individual pins. Select the necessary options and
click Next. The Symbol Wizard (6 of 6) page appears.
10. On the final page of the Symbol Wizard page, add additional signals and pins that
have not been placed in the symbol. Click Finish when you complete your
selections.
You can view your symbol and any fractures you created with the Symbol Editor
(Figure 7–12). You can edit parts of the symbol, delete fractures, or rerun the Symbol
wizard.
Figure 7–12. The I/O Designer Symbol Editor
If assignments in the I/O Designer database are updated, the symbols created in the
I/O Designer software automatically reflect these changes. Assignment changes can
be made in the I/O Designer software, with an updated .fx from the Quartus II
software, or from a back-annotated change in your board layout tool.
Exporting Symbols to the DxDesigner Software
After you have completed your symbols, export the symbols to your DxDesigner
project. To generate all the fractures of a symbol, on the Generate menu, click All
Symbols. To generate a symbol for the currently displayed symbol in Symbol Editor,
click Current Symbol Only. The /sym directory in your DxDesigner project saves
each symbol in the database as a separate file. The symbols can be instantiated in your
DxDesigner schematics.
f For more information about working with DxDesigner projects, refer to the
DxDesigner Help.
Scripting Support
The I/O Designer software features a command line Tcl interpreter. All commands
issued through the GUI in the I/O Designer software translate into Tcl commands run
by the tool. You can view the generated Tcl commands and run scripts, or type
individual commands in the I/O Designer Console window.
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This scripting support section includes commands that perform some of the
operations described in this chapter.
If you want to change the .fx from which the I/O Designer software updates
assignments, type the following command at an I/O Designer Tcl prompt:
set_fpga_xchange_file <file name>
You can type the following command to update the I/O Designer database with
assignment updates made in the Quartus II software after specifying the .fx:
update_from_fpga_xchange_file
You can type the following command to update the .fx with changes made to the
assignments in the I/O Designer software for transfer back into the Quartus II
software:
generate_fpga_xchange_file
You can type the following command if you want to import assignment data from a
.pin created by the Quartus II software:
set_pin_report_file -quartus_pin <file name>
You can run the I/O Designer Symbol wizard with the following command:
symbolwizard
You can set the DxDesigner project directory path where symbols are saved with the
following command:
set_dx_designer_project -path <path>
f For more information about Tcl scripting and Tcl scripting with the Quartus II
software, refer to the Tcl Scripting chapter in volume 2 of the Quartus II Handbook. For
more information about the Tcl scripting capabilities of the I/O Designer software as
well as a list of available commands, refer to the I/O Designer Help.
FPGA-to-Board Integration with the DxDesigner Software
The Mentor Graphics DxDesigner software is a design entry tool for schematic
capture. You can use it to create flat circuit schematics for all the PCB design types.
You can also use the DxDesigner software to create hierarchical schematics that
facilitate design reuse and a team-based design. You can use the DxDesigner software
in the design flow alone or in conjunction with the I/O Designer software. However,
if you use the DxDesigner software without the I/O Designer software, the design
flow is one-way, using only the .pin generated by the Quartus II software.
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You can only make signal and pin assignment changes in the Quartus II software and
these changes reflect as updated symbols in a DxDesigner schematic. You cannot
back-annotate changes made in a board layout tool or in a DxDesigner symbol to the
Quartus II software. Figure 7–13 shows the design flow without the I/O Designer
software.
Figure 7–13. Design Flow Without the I/O Designer Software
(1)
DxDesigner
Create New or Open
Existing Project
.pin
Generate Symbol
Instantiate in
Schematic
Forward to Board
Layout Tool
Note to Figure 7–13:
(1) For more information about the full design flow, which includes the Quartus II software, the I/O Designer software,
and the board layout tool flowchart details, refer to Figure 7–1 on page 7–2.
f For more information about the DxDesigner software, including usage, support,
training, and product updates, refer to the Mentor Graphics website
(www.mentor.com), or choose Schematic Design Help Topics in the DxDesigner Help.
DxDesigner Project Settings
New projects in the DxDesigner software are set up to create FPGA symbols by
default. However, if you are using the I/O Designer software with the DxDesigner
software, you must enable the DxBoardLink Flow options for complete support and
compatibility with the I/O Designer software.
You can enable the DxBoardLink flow design configuration during or after creating a
new DxDesigner project.
To enable the DxBoardLink flow design configuration when creating a new
DxDesigner project, follow these steps:
1. Start the DxDesigner software.
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2. On the File menu, click New and click the Project tab. The New dialog box
appears (Figure 7–14).
Figure 7–14. New Project Dialog Box
3. Click More. Turn on DxBoardLink (Figure 7–14).
1
To enable the DxBoardLink Flow design configuration in an existing
project, click Design Configurations in the Design Configuration toolbar
and turn on DxBoardLink (Figure 7–15).
Figure 7–15. DxBoardLink Design Configuration
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DxDesigner Symbol Wizard
You can create schematic symbols in the DxDesigner software manually or with the
Symbol wizard. The DxDesigner Symbol wizard is similar to the I/O Designer
Symbol wizard, but with fewer fracturing options.
FPGA symbols based on Altera devices can be created, fractured, and edited with the
DxDesigner Symbol wizard. To start the Symbol wizard, follow these steps:
1. Start the DxDesigner software.
2. Click Symbol Wizard in the toolbar, or on the File menu, click New. The New
window appears. Click the File tab and create a new file of type Symbol Wizard.
3. Type the new symbol name in the name field and click OK. The Symbol Wizard
page appears (Figure 7–16).
Figure 7–16. Wizard Task Selection
4. On the Wizard Task Selection page, choose to create a new symbol or modify an
existing symbol. If you are modifying an existing symbol, specify the library path
or alias, and select the existing symbol. If you are creating a new symbol, select
DxBoardLink for the symbol source. The DxDesigner block type defaults to
Module because the FPGA design does not have an underlying DxDesigner
schematic. Choose whether or not to fracture the symbol. After making your
selections, click Next. The New Symbol and Library Name page appears.
5. On the New Symbol and Library Name page, type a name for the symbol, an
overall part name for all the symbol fractures, and a library name for the new
library created for this symbol. By default, the part and library names are the same
as the symbol name. Click Next. The Symbol Parameters page appears.
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6. On the Symbol Parameters page, specify the appearance of the generated symbol
and how it matches up with the grid you have set in your DxDesigner project
schematic. After making your selections, click Next. The DxBoardLink Pin List
Import page appears (Figure 7–17).
Figure 7–17. DxBoardLink Pin List Import
7. On the DxBoardLink Pin List Import page, in the FPGA vendor list, select Altera
Quartus. In the Pin-Out file to import field, browse to and select the .pin from
your Quartus II design project directory. You can also select choices from the
Fracturing Scheme, Bus pin, and Power pin options. After making your selections,
click Next. The Symbol Attributes page appears.
8. On the Symbol Attributes page, select to create or modify symbol attributes for
use in the DxDesigner software. After making your selections, click Next. The Pin
Settings page appears.
9. On the Pin Settings page, make any final adjustments to pin and label location
and information. Each tabbed spreadsheet represents a fracture of your symbol.
After making your selections, click Save Symbol.
After creating the symbol, you can examine and place any fracture of the symbol in
your schematic. You can locate separate files of all the fractures you created in the
library you specified or created in the /sym directory in your DxDesigner project. You
can add the symbols to your schematics or you can manually edit the symbols or with
the Symbol wizard.
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Chapter 7: Mentor Graphics PCB Design Tools Support
Conclusion
1
7–25
Symbols created in the DxDesigner software can be edited and updated with newer
versions of the .pin generated by the Quartus II software. However, you cannot
fracture a symbol again because symbol fracturing is permanent. To create new
fractures for your design, create a new symbol in the Symbol wizard, and perform the
steps in “DxDesigner Symbol Wizard” on page 7–23.
f For more information about creating, editing, and instantiating component symbols
in DxDesigner, choose Schematic Design Help Topics from the Help menu in the
DxDesigner software.
Conclusion
Transferring a complex, high-pin-count FPGA design to a PCB for prototyping or
manufacturing is a daunting process that can lead to errors in the PCB netlist or
design, especially when multiple engineers are working on different parts of the
project. The design workflow available when using the Quartus II software with the
Mentor Graphics toolset assists the FPGA designer and the board designer in
preventing errors and focusing their attention on the design.
Document Revision History
Table 7–1 shows the revision history for this chapter.
Table 7–1. Document Revision History
Date
Version
Changes
June 2012
12.0.0
Removed survey link.
November 2011
10.0.2
Template update.
December 2010
10.0.1
Template update.
July 2010
10.0.0
November 2009
■
Removed Reference Document section.
■
General style editing.
■
Added a link to Help in “Performing Simultaneous Switching Noise (SSN) Analysis of
Your FPGA.”
■
Removed Figure 8–4 on page 8–9 and Figure 8–5 on page 8–11.
■
Updated “Generating an .fx File.”
■
Added minor information about simultaneous switching noise (SSN) analysis on
“Performing Simultaneous Switching Noise (SSN) Analysis of Your FPGA.”
■
General style editing.
■
Was chapter 6 in the 8.1.0 release.
■
Removed Figures that were numbered 6-4, 6-6, 6-7, and 6-8 in v8.1.0.
9.1.0
March 2009
9.0.0
November 2008
8.1.0
Changed to 8½” × 11” page size. No change to content.
May 2008
8.0.0
Updated references.
f For previous versions of the Quartus II Handbook, refer to the Quartus II Handbook
Archive.
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Quartus II Handbook Version 13.1
Volume 2: Design Implementation and Optimization
Chapter 7: Mentor Graphics PCB Design Tools Support
Document Revision History
June 2012
Altera Corporation
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