datasheet for MR27T6402L by LAPIS Semiconductor

datasheet for MR27T6402L by LAPIS Semiconductor
FEDR27T6402L-A02-02
Issue Date: Jan.06, 2009
MR27T6402L
4M–Word × 16–Bit or 8M–Word × 8–Bit
P2ROM
FEATURES
· 4,194,304-word × 16-bit / 8,388,608-word × 8-bit electrically
switchable configuration
· Access time
2.7 V to 3.6 V power supply 90 ns MAX
3.0 V to 3.6 V power supply 80 ns MAX
· Operating current
20 mA MAX (5MHz)
· Standby current
10 µA MAX
· Input/Output TTL compatible
· Three-state output
PACKAGES
· MR27T6402L-xxxTNZA3A
48-pin plastic TSOP (TSOP I 48-P-1220-0.50-1K)
Lead frame material: 42 alloy
P2ROM ADVANCED TECHNOLOGY
P2ROM stands for Production Programmed ROM. This
exclusive LAPIS Semiconductor technology utilizes factory
test equipment for programming the customers code into the
P2ROM prior to final production testing. Advancements in this
technology allows production costs to be equivalent to
MASKROM and has many advantages and added benefits over
the other non-volatile technologies, which include the
following;
A15
A14
A13
1
48 A16
2
47 BYTE#
3
46 VSS
A12
A11
A10
A9
A8
A19
A20
NC
NC
A21
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
4
45 D15/A–1
5
44 D7
6
43 D14
7
42 D6
8
41 D13
9
40 D5
10
39 D12
11
38 D4
12
37 VCC
13
36 D11
14
35 D3
15
34 D10
16
33 D2
17
32 D9
18
31 D1
19
30 D8
20
29 D0
21
28 OE#
22
27 VSS
23
26 CE#
24
25 A0
48TSOP(Type-I)
· Short lead time, since the P2ROM is programmed at the final stage of the production process, a large P2ROM
inventory "bank system" of un-programmed packaged products are maintained to provide an aggressive
lead-time and minimize liability as a custom product.
· No mask charge, since P2ROMs do not utilize a custom mask for storing customer code, no mask charges
apply.
· No additional programming charge, unlike Flash and OTP that require additional programming and handling
costs, the P2ROM already has the code loaded at the factory with minimal effect on the production throughput.
The cost is included in the unit price.
· Custom Marking is available at no additional charge.
· Pin Compatible with Mask ROM and some FLASH products.
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FEDR27T6402L-A02-02
MR27T6402L / P2ROM
BLOCK DIAGRAM
A–1
OE#
CE
OE
BYTE#
Row Decoder
CE#
Memory Cell Matrix
4M × 16-Bit or 8M × 8-Bit
Column Decoder
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
A14
A15
A16
A17
A18
A19
A20
A21
Address Buffer
× 8/× 16 Switch
Multiplexer
Output Buffer
D0
D2
D1
D4
D3
D6
D5
D8
D7
D10
D9
D12
D11
D14
D13
D15
In 8-bit output mode, these pins
are placed in a high-Z state and
pin D15 functions as the A-1
address pin.
PIN DESCRIPTIONS
Pin name
Functions
D15 / A–1
Data output / Address input
A0 to A21
Address inputs
D0 to D14
Data outputs
CE#
Chip enable input
OE#
Output enable input
BYTE#
Word / Byte select input
VCC
Power supply voltage
VSS
Ground
NC
No connect
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FEDR27T6402L-A02-02
MR27T6402L / P2ROM
FUNCTION TABLE
Mode
CE#
OE#
BYTE#
Read (16-Bit)
L
L
H
Read (8-Bit)
L
L
L
L
Output disable
D0 to D7
D8 to D14
DOUT
Hi–Z
2.7 V
to
3.6 V
L
L/H
Hi–Z
∗
H
∗
D15/A–1
DOUT
H
H
H
Standby
VCC
Hi–Z
L
∗
∗: Don’t Care (H or L)
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Operating temperature under bias
Storage temperature
Condition
Ta
Input voltage
VI
relative to VSS
Output voltage
VO
Power supply voltage
VCC
Power dissipation per package
PD
Output short circuit current
IOS
Unit
–40 to 85
°C
–55 to 125
°C
–0.5 to VCC+0.5
V
—
Tstg
Value
–0.5 to VCC+0.5
V
–0.5 to 5
V
Ta = 25°C
1.0
W
—
10
mA
RECOMMENDED OPERATING CONDITIONS
Parameter
VCC power supply voltage
Symbol
Condition
Typ.
2.7
—
3.6
V
2.2
—
VCC+0.5∗
V
–0.5∗∗
—
0.6
V
VCC
Input “H” level
VIH
Input “L” level
VIL
(Ta = –40 to 85°C)
Max.
Unit
Min.
VCC = 2.7 to 3.6 V
Voltage is relative to VSS.
∗ : Vcc+1.5V (Max.) when pulse width of overshoot is less than 10ns.
∗∗ : -1.5V (Min.) when pulse width of undershoot is less than 10ns.
PIN CAPACITANCE
Parameter
Symbol
Input
CIN1
BYTE#
CIN2
Output
COUT
Condition
VI = 0 V
VO = 0 V
Min.
(VCC = 3.0 V, Ta = 25°C, f = 1 MHz)
Typ.
Max.
Unit
—
—
12
—
—
200
—
—
12
pF
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FEDR27T6402L-A02-02
MR27T6402L / P2ROM
ELECTRICAL CHARACTERISTICS
DC CHARACTERISTICS
Parameter
(VCC = 2.7 V to 3.6 V, Ta = –40 to 85°C)
Min.
Typ.
Max.
Unit
Symbol
Condition
Input leakage current
ILI
VI = 0 to VCC
—
—
1
µA
Output leakage current
ILO
VO = 0 to VCC
—
—
1
µA
ICCSC
CE# = VCC
—
—
10
µA
ICCST
CE# = VIH
—
—
1
mA
—
—
20
mA
—
2.2
—
VCC+0.5∗
V
VCC power supply current
(Standby)
VCC power supply current
(Read)
ICCA
Input “H” level
VIH
CE# = VIL, OE# = VIH
f=5MHz
Input “L” level
VIL
—
–0.5∗∗
—
0.6
V
Output “H” level
VOH
IOH = –1 mA
2.4
—
—
V
Output “L” level
VOL
IOL = 2 mA
—
—
0.4
V
Voltage is relative to VSS.
∗ : Vcc+1.5V(Max.) when pulse width of overshoot is less than 10ns.
∗∗ : -1.5V(Min.) when pulse width of undershoot is less than 10ns.
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FEDR27T6402L-A02-02
MR27T6402L / P2ROM
AC CHARACTERISTICS
Parameter
(VCC = 2.7 V to 3.6 V, Ta = –40 to 85°C)
Min.
Max.
Unit
Symbol
Condition
tC
—
90
—
ns
tACC
CE# = OE# = VIL
—
90
ns
CE# access time
tCE
OE# = VIL
—
90
ns
OE# access time
tOE
CE# = VIL
—
30
ns
tCHZ
OE# = VIL
0
30
ns
Address cycle time
Address access time
Output disable time
Output hold time
Parameter
tOHZ
CE# = VIL
0
25
ns
tOH
CE# = OE# = VIL
0
—
ns
(VCC = 3.0 V to 3.6 V, Ta = –40 to 85°C)
Min.
Max.
Unit
Symbol
Condition
tC
—
80
—
ns
tACC
CE# = OE# = VIL
—
80
ns
CE# access time
tCE
OE# = VIL
—
80
ns
OE# access time
tOE
CE# = VIL
—
30
ns
Address cycle time
Address access time
Output disable time
Output hold time
tCHZ
OE# = VIL
0
20
ns
tOHZ
CE# = VIL
0
20
ns
tOH
CE# = OE# = VIL
0
—
ns
Measurement conditions
Input signal level ................................... 0 V / Vcc
Input timing reference level................... 1/2Vcc
Output load ........................................... 50 pF
Output timing reference level ................ 1/2Vcc
Output load
Output
50 pF
(Including scope and jig)
5/9
FEDR27T6402L-A02-02
MR27T6402L / P2ROM
TIMING CHART (READ CYCLE)
16-BIT READ MODE (BYTE# = VIH)
tC
tC
A0 to A21
tOH
tACC
tCE
CE#
tOE
tCHZ
tOH
OE#
tOHZ
tACC
D0 to D15
Valid Data
Valid Data
Hi-Z
Hi-Z
8-BIT READ MODE (BYTE# = VIL)
tC
tC
A-1 to A21
tOH
tACC
tCE
CE#
tOE
tCHZ
tOH
OE#
tOHZ
tACC
D0 to D7
Hi-Z
Valid Data
Valid Data
Hi-Z
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FEDR27T6402L-A02-02
MR27T6402L / P2ROM
PACKAGE DIMENSIONS
(Unit: mm)
Notes for Mounting the Surface Mount Type Package
The surface mount type packages are very susceptible to heat in reflow mounting and humidity absorbed in
storage.
Therefore, before you perform reflow mounting, contact ROHM’s responsible sales person for the product name,
package name, pin number, package code and desired mounting conditions (reflow method, temperature and
times).
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FEDR27T6402L-A02-02
MR27T6402L / P2ROM
REVISION HISTORY
Document
Page
Date
Previous
Edition
Current
Edition
FEDR27T6402L-A02-01
Oct. 21, 2008
–
–
Final edition 1
FEDR27T6402L-A02-02
Jan. 6, 2009
5
5
Measurement conditions:
Changed Input signal level from “0V/3V” to
“0V/Vcc”.
No.
Description
8/9
FEDR27T6402L-A02-02
MR27T6402L / P2ROM
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