TLE7810G

TLE7810G
Data Sheet, Rev. 3.01, April 2008
TLE7810G
Integrated double low-side switch, high-side/LED
driver, hall supply, wake-up inputs and LIN
communication with embedded MCU (16kB Flash)
Automotive Power
TLE7810G
Table of Contents
Table of Contents
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4
4.1
4.2
4.3
4.4
4.5
4.5.1
4.5.2
4.5.3
Operating Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SBC Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SBC Active Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SBC Active Mode “LIN Sleep” . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
LIN Receive-Only Mode (“LIN RxD-Only”) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SBC Sleep Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SBC Stop Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SBC Stop Mode with Cyclic Wake . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
LIN Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6
6.1
6.1.1
6.2
6.2.1
ADC Measurement Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage Measurement Calibration Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Temperature Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Temperature Measurement Calibration Concept . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7
Low Dropout Voltage Regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
8
SPI (Serial Peripheral Interface) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
9
Reset Behavior and Window Watchdog . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
10
Monitoring / Wake-Up Inputs MON1 … 5 and Wake-Up Event Signalling . . . . . . . . . . . . . . . . . . 27
11
Low Side Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
12
Supply Output for Hall Sensor Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
13
High-Side Switch as LED Driver (HS-LED) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
14
General Purpose I/Os (GPIO) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
15
Error Interconnect (ERR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
16
16.1
16.2
16.3
16.4
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
17
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
18
18.1
18.2
18.3
18.4
18.5
Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Hints for Unused Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Flash Program Mode via LIN-Fast-Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
19
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Data Sheet
2
10
11
11
12
12
13
13
14
15
17
17
17
18
18
34
34
35
35
36
49
49
49
50
50
50
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TLE7810G
Table of Contents
20
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Data Sheet
3
Rev. 3.01, 2008-04-15
Integrated double low-side switch, high-side/LED
driver, hall supply, wake-up inputs and LIN
communication with embedded MCU (16kB Flash)
1
TLE7810G
Overview
Relay Driver - System Basis Chip
•
•
•
•
•
•
•
•
•
•
Low-Dropout Voltage Regulator (LDO)
LIN Transceiver
Standard 16-bit SPI-Interface
2 × Low-Side Switches, e.g. as Relay Driver
2 × Supply e.g. for Hall Sensor Supply / LED Driver
5 × High-Voltage Wake-Up Inputs
Programmable. Window Watchdog & Power Saving Modes
Power-On and Undervoltage Reset Generator
Overtemperature Protection
Short Circuit Protection
PG-DSO-28-21
8-bit Microcontroller
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Compatible to 8051 μC Core
Two clocks per machine cycle
8kByte Boot ROM for test and Flash routines
LIN Bootloader (Boot ROM)
256 Byte RAM / 512 Byte XRAM
16kByte Flash Memory for Program Code & Data
On-Chip Oscillator
Power Saving Modes (slow-down & idle mode)
Programmable Watchdog Timer
10-bit A/D Converter, e.g. for Temperature & Vbat-Measurement
Three 16-bit Timers & Capture/Compare Unit
General Purpose I/Os, e.g. with PWM Functionality
On-Chip Debug Support (JTAG)
UART and Synchronous Serial Channel (SSC respective SPI)
General Characteristics
•
•
•
•
Package PG-DSO-28-21
Temperature Range TJ: -40 °C up to 150 °C
Green Package (RoHS compliant)
AEC Qualified
Type
Package
Marking
TLE7810G
PG-DSO-28-21
TLE7810G
Data Sheet
4
Rev. 3.01, 2008-04-15
TLE7810G
Overview
Description
This single-packaged solution incorporates an 8-bit state-of-the-art microcontroller compatible to the standard
8051 core with On-Chip Debug Support (OCDS), and a System-Basis-Chip (SBC). The SBC is equipped with LIN
transceiver, low-dropout voltage regulator (LDO) as well as two low-side switches (relay driver) and a high-side
driver e.g. for driving LEDs. An additional supply, e.g. to supply hall sensors (TLE 4966) is also available.
For Micro Controller Unit (MCU) supervision and additional protection of the circuit a programmable window
watchdog circuit with a reset feature, supply voltage supervision and integrated temperature sensor is
implemented on the SBC.
Microcontroller and LIN module offer low power modes in order to support terminal 30 connected automotive
applications. A wake-up from the low power mode is possible via a LIN bus message or wake-up inputs.
This integrated circuit is realized as Multi-Chip-Module (MCM) in a PG-DSO-28-21 package, and is designed to
withstand the severe conditions of automotive and industrial applications.
Note: A detailed description of the 8-bit microcontroller XC866 can be found in a dedicated User’s Manual and
Data Sheet.
Data Sheet
5
Rev. 3.01, 2008-04-15
TLE7810G
Block Diagram
2
Block Diagram
Vbat
SBC
8-bit µC
On-Chip
Oscillator
Supply Output
(Hall Sensor)
Voltage
Regulator
Low-Side
Switch 1
SPI
Diagnostic / Ctrl.
Low-Side
Switch 2
Watchdog
Reset
5* Wake-Up
Inputs
Temp. / Vbat
Measurement I/F
10-bit ADC
1* LED-Driver
LIN
Serial I/F
Flash
JTAG
GPIOs
Hall Sensor
I/F
LIN-Bus
* note: LED Driver and Wake-up input 5 share the same pin (MON5/HS_LED)
Figure 1
Data Sheet
Functional Block Diagram (Module Overview)
6
Rev. 3.01, 2008-04-15
TLE7810G
Pin Definitions and Functions
3
Pin Definitions and Functions
MON3
1
28
MON2
MON4
2
27
MON1
MON5 / HS_LED
3
26
VBAT_SENSE
LIN
4
25
VS
LS2
5
24
SUPPLY
LS1
6
23
VCC
GND
7
22
GND
RESET
8
21
GND
P0.3/SCLK_1/COUT63_1
9
20
VDDP
P0.4/MTSR_1/CC62_1
10
19
P2.1/CCPOS1_0/EXINT2/T13HR_2/TDI_1/CC62_3/AN1
P0.5/MRST_1/EXINT0_0/COUT62_1
11
18
P2.0/CCPOS0_0/EXINT1/T12HR_2/TCK_1/CC61_3/AN0
GND
12
17
P0.1/TDI_0/T13HR_1/RXD_1/EXF2_1/COUT61_1
VDDC
13
16
P0.2/CTRAP_2/TDO_0/TXD_1
TMS
14
15
P0.0/TCK_0/T12HR_1/CC61_1/CLKOUT/RXDO_1
Figure 2
TLE7810G
Pin Configuration
Pin No.
Symbol
27
28
1
2
3
Monitoring / Wake-Up Inputs; bi-level sensitive inputs used to monitor signals for
MON1,
example coming from an external switch panel
MON2,
MON3,
MON4,
MON5/HS_LED MON5 is combined with an LED Driver output
25
VS
Power Supply Input; recommendation to block to GND directly at the IC with
ceramic capacitor (ferrite bead for better EMC behavior)
26
VBAT_SENSE
Battery Voltage Sense Input; for connection to terminal 30 with external serial
resistor
23
VCC
Voltage Regulator Output; for internal supply (5 V); to stabilize block to GND with
an external capacitor; for external loads up to the specified value (see Table 13
“Operating Range” on Page 35)
8
RESET
Reset; output of SBC; “low active”; input for μController
Data Sheet
Function
7
Rev. 3.01, 2008-04-15
TLE7810G
Pin Definitions and Functions
Pin No.
Symbol
Function
4
LIN
LIN Bus; Bus Line for the LIN interface, according to ISO 9141 and LIN specification
1.3 and 2.0
24
SUPPLY
Supply Output; e.g. for Hall Sensor; controlled via SPI
5
LS2
Low Side Switch 2 Output; controlled via SPI
6
LS1
Low Side Switch 1 Output; controlled via SPI
9
P0.3
General Purpose I/O with PWM Functionality
(alternate function: SCK, see XC866 data sheet)
10
P0.4
General Purpose I/O with Capture and PWM Functionality
(alternate function: MTSR, see XC866 data sheet)
11
P0.5
General Purpose I/O with PWM Functionality
(alternate function: MRST and EXINT0 ,see XC866 data sheet)
13
VDDC
Voltage Regulator Output for μController Core (2.5 V); for connection of block
capacitor to GND; not to be used for external loads
14
TMS
Test Mode Select (JTAG)
15
P0.0
[TCK_0]
General Purpose I/O; see XC866 data sheet
(alternate function: JTAG Clock Input)
16
P0.2
[TDO_0]
General Purpose I/O; see XC866 data sheet
(alternate function: JTAG Serial Data Output; RxD1)
17
P0.1
[TDI_0]
General Purpose I/O; see XC866 data sheet
(alternate function: JTAG Serial Data Input; TxD1)
18
P2.0
General Purpose Input (digital/analog) with Capture Functionality; e.g. for Hall
Sensor (alternate function: EXINT1)
19
P2.1
General Purpose Input (digital/analog) with Capture Functionality; e.g. for Hall
Sensor (alternate function: EXINT2)
20
VDDP
Voltage Supply Input for μController I/Os (5 V); to be connected with VCC pin
–
RxD
LIN Transceiver Data Output; according to the ISO 9141 and LIN specification 1.3
and 2.0; LOW in dominant state; connected to µC General Purpose Input P1.0
–
TxD
LIN Transceiver Data Input; according to ISO 9141 and LIN specification 1.3 and
2.0; TxD has an internal pull-up; connected to µC General Purpose Input P1.1
–
DI
SPI Data Input; receives serial data from the control device; serial data transmitted
to DI is a 16-bit control word with the Least Significant Bit (LSB) transferred first: the
input has a pull-down and requires CMOS logic level inputs; DI will accept data on
the falling edge of CLK-signal; connected to µC General Purpose Input P1.3
–
DO
SPI Data Output; this tri-state output transfers diagnosis data to the control device;
the output will remain in the high-impedance state unless the device is selected by a
low on Chip-Select-Not (CSN); connected to µC General Purpose Input P1.4
(EXTINT0_1)
–
CLK
SPI Clock Input; clock input for shift register; CLK has an internal pull-down and
requires CMOS logic level inputs; connected to µC General Purpose Input P1.2
–
CSN
SPI Chip Select Not Input; CSN is an active low input; serial communication is
enabled by pulling the CSN terminal low; CSN input should only be transitioned when
CLK is low; CSN has an internal pull-up and requires CMOS logic level inputs;
connected to µC General Purpose Input P1.5
–
VAREF
Voltage Reference for ADC
Data Sheet
8
Rev. 3.01, 2008-04-15
TLE7810G
Pin Definitions and Functions
Pin No.
Symbol
Function
–
VA
ADC Measurement Output (analog); for chip temperature and battery voltage
measurement
–
ERR
Error Pin; bi-directional signal; ERR has an internal pull-up; low-active;
connected to µC General Purpose Input P3.6 (RSTOUT)
7
GND
Ground; including GND for LSx and LIN
12
Ground; corresponding GND to VDDC
21
Ground; VAGND (ADC) & corresponding GND to VDDP
22
Ground; VAGND (ADC); also GND for LDO and Measurement Interface
VS
25
VBAT_
SENSE
SUPPLY
24
VCC
GND
GND
VDDP
P2.1
P2.0
23
22
21
20
19
18
26
17
VAREF
V AREF
P0.2
16 [TDO_0]
MON1 27
MON2 28
SBC
MON3 1
MON4 2
MON5 /
HS_LED
3
VA
P2.7
TxD
P1.1
RxD
P1.0
CSN
P1.5
CLK
P1.2
DI
P1.3
DO
P1.4
ERR
P3.6
P0.0
15 [TCK_0]
8-Bit µC
12 GND
11 P0.5
5
LS2
Data Sheet
14 TMS
13 V DDC
LIN 4
Figure 3
P0.1
[TDI_0]
6
LS1
7
GND
8
RESET
9
P0.3
10
P0.4
Pinout and Module Interconnects
9
Rev. 3.01, 2008-04-15
TLE7810G
Operating Modes
4
Operating Modes
The TLE7810G incorporates several SBC operating modes, that are listed in Table 1.
Table 1
SBC Operating Modes
Functional Block
SBC Standby
Mode
SBC Active Mode SBC Stop Mode
SBC Sleep Mode
VCC, 5 V, LDO
ON
ON
OFF
ON
Window Watchdog
ON
ON
OFF / ON
OFF / ON2)
Monitoring / wake-up pins
ON / OFF3)
SPI-controlled
ON / OFF3)
ON / OFF3)
LS1,LS2 -switch
OFF
SPI-controlled
OFF
OFF
Supply Output
ON / OFF
HS-LED
3)
1)2)
3)
SPI-controlled
ON / OFF
OFF
OFF
SPI-controlled
OFF
OFF
16-bit SPI
ON
ON
ON
OFF
LIN wake-up via bus
message
ON
OFF
ON
ON
LIN Transmit
OFF
ON
OFF
OFF
LIN Receive
OFF
ON
OFF
OFF
RxD
Active low wake-up L / H
interrupt
Active low wake-up Active low wake-up
interrupt
interrupt
Measurement I/F
OFF
SPI-controlled
OFF
OFF
VAREF
OFF
ON (2.5V)
OFF
OFF
Voltage Monitoring at VS
and VBAT
OFF
ON
OFF
OFF
1) WD “off” when voltage-regulator output current below “watchdog disable current threshold”
2) WD default “off” in SBC Stop / Sleep Mode; WD can be active in order to generate period wake-ups of SBC
3) “ON / OFF” state is inherited from previous operating mode (“OFF” after POR and RESET)
The System-Basis-Chip (SBC) offers several operation modes that are controlled via three mode select bits MS0,
MS1 and MS2 within the SPI: SBC Active, Sleep and Stop mode, as well as LIN Receive-Only mode.
An overview of the operating modes and the operating mode transitions is indicated in Figure 4 below.
Note: It is possible to directly change from Stand-By to Stop or Sleep mode, however this might result in a higher
current consumption (~200µA). The higher current consumption will occur in case of a power up and in case
of a LIN wake-up from Stop and Sleep mode. To avoid this conditions its recommended to prior set Active
mode before changing to Stop or Sleep mode.
Data Sheet
10
Rev. 3.01, 2008-04-15
TLE7810G
Operating Modes
Start Up
Power Up
SBC Stand-By
SBC Stop Mode
MS2
1
MS1
1
MS0
1
SBC Sleep Mode
Vcc
ON
MS2
1
MS1
0
MS0
0
Vcc
OFF
SBC Active Mode
MS2
0
MS1
1
MS0
1
Vcc
ON
LIN Receive-Only
MS2
1
MS1
1
MS0
0
Vcc
ON
SBC Active Mode:
„LIN Sleep“
MS2
0
MS1
1
MS0
0
Vcc
ON
on wake-up / after reset
Figure 4
State Diagram “SBC Operation Modes”
4.1
SBC Standby Mode
After powering-up the SBC or wake-up from power-saving, it automatically starts-up in SBC Standby Mode,
waiting for the microcontroller to finish its startup and initialization sequences. However, this mode cannot be
selected via SPI command. From this transition mode the SBC can be switched via SPI command into the desired
operating mode. All modes are selected via SPI bits or certain operation conditions, e.g. external wake-up events.
4.2
SBC Active Mode
The SBC Active Mode is used to transmit and receive LIN messages and provides the sub-mode “LIN Sleep”.
Data Sheet
11
Rev. 3.01, 2008-04-15
TLE7810G
Operating Modes
4.3
SBC Active Mode “LIN Sleep”
In SBC Active Mode “LIN Sleep” the SBC’s current consumption is reduced by disabling the LIN transceiver.
This also means that the internal pull-up resistor of the LIN transceiver is turned off in SBC Active Mode “LIN
Sleep”. During this mode the LIN transceiver remains its wake-up capability in order to react on a remote frame or
wake-up pulse (specified in LIN Specification V2.0) from the master node or other slave nodes. In case of a wakeup event via LIN message the (internal) RxD is pulled “low” and the “bus wake-up bit” within the SPI status word
is set. However, the LIN transceiver needs to be activated by switching to “SBC Active Mode”.
4.4
LIN Receive-Only Mode (“LIN RxD-Only”)
The LIN Receive-Only Mode (“LIN RxD-Only”) is designed for a special test procedure to check the bus
connections. Figure 5 shows a network consisting of 5 nodes. Node 1 is the LIN master node, the others are LIN
slave nodes. If the connection between node 1 and node 3 shall be tested, the nodes 2, 4 and 5 are switched into
LIN Receive-Only Mode. Node 1 and node 3 are in Active Mode. If node 1 sends a message (“remote frame”),
node 3 is the only node which is physically able to reply to the remote frame. The other nodes have their outputs
drivers disabled.
The main difference between the SBC Active Mode and the LIN Receive-Only Mode is that the LIN transmit
stage is automatically turned-off in LIN Receive-Only-Mode. However, the LIN receiver is still active in both modes.
5
4
1
3
2
Figure 5
Data Sheet
Network Diagram “LIN Receive-Only Mode”
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Rev. 3.01, 2008-04-15
TLE7810G
Operating Modes
4.5
Power Saving Modes
4.5.1
SBC Sleep Mode
During SBC Sleep Mode (see Figure 6), the lowest power consumption is achieved, by having its main voltage
regulator switched-off. As the microcontroller cannot be supplied, the integrated window watchdog can be disabled
in Sleep Mode via a dedicated SPI control bit. However, it can be turned-on for periodically waking-up the system,
e.g. ECU, by generating a reset and automatically switching to SBC Standby Mode.
This mode is entered via SPI command, and turns-off the integrated LIN bus transceiver, main voltage regulator
as well as all switches. Upon a voltage level change at the monitoring / wake-up pins or by LIN message the SBC
Sleep Mode will be terminated and the SBC Standby Mode will automatically be entered (turning-on the LDO).
Note: Upon a wake-up via LIN message the (internal) RxD signal stays “low” until mode switch.
Note: If the Window Watchdog was not enabled in Sleep Mode the Window Watchdog starts after wake-up with a
“long open window” in SBC Standby Mode.
Note: In Sleep Mode with activated watchdog (see Table 2 “SPI Input Data Bits” on Page 21) the oscillator
remains turned on.
SBC Active Mode
MS2
0
MS1
1
MS0
0/1
SBC Standby Mode
Vcc
ON
Vcc
ON
„single“ µController SPI -Command:
- select SBC Sleep Mode via SPI Mode Bits
- window watchdog activation / deactivation via SPI
[can remain active as periodic reset timer ]
Start Up
Power Up
transition caused by :
- event at MONx inputs
- LIN message
[SPI indicates source]
SBC Sleep Mode
MS2
1
Figure 6
Data Sheet
MS1
0
MS0
0
Vcc
OFF
State Diagram “SBC Sleep Mode”
13
Rev. 3.01, 2008-04-15
TLE7810G
Operating Modes
4.5.2
SBC Stop Mode
The SBC Stop Mode has the advantage of reducing the current consumption to a minimum, while supplying the
microcontroller with its quiescent current during its power saving mode (“Stop”). This mode is entered via SPI
command, and turns-off the integrated bus transceivers and respective termination, but the voltage regulator for
the microcontroller supply remains active. A microcontroller in a power saving mode has the advantage over a
turned-off microcontroller to have a reduced reaction time upon a wake-up event.
A voltage level change at the monitoring/wake-up pins will, in contrast to the behavior in Sleep Mode, generate a
signal that indicates the wake-up event at the microcontroller in Power-Down Mode. This is realized via an
interconnect from the SPI of the SBC [DO] to the microcontroller [P1.4]. In case the wake-up event was a LIN
message, the respective RxD pin of the SBC and the SPI Data Out [DO] will be pulled “low”. RxD is pulled “low”
until mode switch, while DO stays “low” for two internal SBC cycles. (The microcontroller itself has to take care of
switching SBC modes after a wake-up event notification (see Figure 7).)
Note: The window watchdog is automatically disabled once the LDO output current goes below a specified
“watchdog current threshold”, unless the SPI setting “WD On/Off” prevents this (see Figure 10, Watchdog
disable current threshold, Table 14 and “Window Watchdog Reset Period Settings” on Page 23).
Note: If the Window Watchdog was not enabled in Stop Mode the Window Watchdog starts after wake-up with a
“long open window” in SBC Standby Mode.
SBC Active Mode
MS2
0
MS1
1
MS0
0/1
SBC Standby Mode
Vcc
ON
Vcc
ON
„single“ µController SPI -Command :
- select SBC Stop Mode via SPI Mode Bits
- window watchdog activation / deactivation via SPI
[„off“ once current consumption below threshold ]
Start Up
Power Up
transition caused by :
- event at MONx inputs
- LIN message
[SPI indicates source]
wake event notification [to µC]:
- LIN msg. => RxD + DO („low“)
- MONx => DO („low“)
SBC Stop Mode
MS2
1
Figure 7
Data Sheet
MS1
1
MS0
1
Vcc
ON
State Diagram “SBC Stop Mode”
14
Rev. 3.01, 2008-04-15
TLE7810G
Operating Modes
4.5.3
SBC Stop Mode with Cyclic Wake
The SBC Stop Mode has the advantage of reducing the current consumption to a minimum, while supplying the
microcontroller with its quiescent current during its power saving mode (“Stop”). This mode is entered via SPI
command, and turns-off the integrated LIN bus transceiver, but the voltage regulator remains active.
The SBC periodically generates a wake-up “low” pulse at DO (“interconnect signal”) that is connected to an
interrupt input [P1.4] of the microcontroller. This period can be defined via the “cyclic wake period” bit field within
the SPI register. This pulse at DO has a length of two internal SBC cycles.
In case of a detected wake-up event via LIN message or any of the MONx pins, DO stays “low” until the first valid
SPI command.
Note: The window watchdog is automatically disabled once the LDO output current goes below a specified
“watchdog current threshold”, unless the SPI setting “WD On/Off” prevents this (see Figure 10).
Note: A wake-up event via LIN message or via MONx inputs can happen independently of the cyclic wake phase.
Note: The Window Watchdog starts with a “long open window” after a mode switch, e.g. to SBC Active Mode.
SBC Active Mode
MS2
0
MS1
1
MS0
0/1
SBC Standby Mode
Vcc
ON
Vcc
ON
„single“ µController SPI -Command:
- select „cyclic wake timing“ via SPI Timing Bits
- select SBC Stop Mode via SPI Mode Bits
- window watchdog activation / deactivation via SPI
[„off“ once current consumption below threshold ]
Start Up
Power Up
select SBC
operating
mode
µC
STOP: Cyclic Wake
MS2
1
MS1
1
MS0
1
Vcc
ON
1)
transition caused by: 2)
- event at MONx inputs:
=> DO „low“
- LIN message
=> RxD + DO „low“
[SPI indicates source]
cyclic wake-up
µC wake-up inputs
NOTES:
1)
window watchdog activated
automatically once current
threshold is exceeded
Figure 8
Data Sheet
2)
wake-up via MONx inputs and
LIN message independent of cyclic
wake phase („asynchronous“)
State Diagram “SBC Stop Mode with Cyclic Wake”
15
Rev. 3.01, 2008-04-15
TLE7810G
LIN Transceiver
5
LIN Transceiver
The TLE7810G offers a LIN transceiver, which is compatible to ISO9141 and certified according to LIN
Specification 1.3 and 2.0 “Physical Layer”. The transceiver has a pull-up resistor of 30 kΩ implemented and is
protected against short to battery and short to GND.
The LIN transceiver has an implemented wake-up capability during operation in power saving modes. In Stop
Mode a wake-up event is indicated via (internal) RxD and DO signals, that are pulled “low”. Out of Sleep Mode a
wake-up event causes an automatic transition into Standby Mode and the (internal) RxD and DO signals are pulled
“low”. If the TxD input is pulled low for longer than the TxD dominant timeout the TxD input is ignored and the LIN
bus goes back to recessive state. This fail-safe feature in case of a permanent low TxD signal recovers if the TxD
pin is high for TxD dominant timeout recovery time.
For LIN automotive applications in the United States a dedicated mode by the name “Low Slope Mode” can be
used. This mode reduces the maximum data transmission rate of 20 kBaud to 10.4 kBaud by switching to a
different slew rate. By using this mode the EM noise emission can be reduced.
Data Sheet
16
Rev. 3.01, 2008-04-15
TLE7810G
ADC Measurement Interface
6
ADC Measurement Interface
The SBC measurement interface comprises a battery measurement unit (high voltage input Vbat_sense) and an onchip temperature sensor. A multiplexer is used to select the desired input channel that is connected to the ADC of
the μC. This multiplexer is controlled via the SPI interface. Also, the reference voltage VAREF is provided by the
SBC. The Vbat_sense input must be protected against voltage transients, like ISO pulses by a resistor in series to
terminal 30.
μC
SBC
VBAT_SENSE
VAREF
ADC Driver
Amplifier
Voltage
Attenuator
VA
P2.7
Mux
ADC
CA
On-Chip
Temperature
Sensor
AGND
Mode
Selection
Figure 9
Simplified Block Diagram of ADC Measurement Interface
6.1
Voltage Measurement
The input voltage is filtered and scaled down to the input voltage range of the ADC converter. The voltage
measurement output code of the ADC can be calculated using the following equation, where VSENS is the voltage
at the pin VBAT_SENSE and N the resolution of the ADC:
V SENS 1 N
C VSENS = round --------------- --- ( 2 – 1 ) , 0V ≤ V SENS ≤ V bat – f s
V AREF 8
(1)
The input voltage corresponding to the ADC output code CVSENS can be calculated with the following equation:
8 × V AREF
-×C
V SENS = -----------------------N
2 –1
6.1.1
(2)
VSENS
Voltage Measurement Calibration Concept
Best measurement accuracy can be obtained by applying the calibration function:
C VSENSCAL = round [ c 1 ( C VSENS – c 0 ) ]
(3)
CVSENS represents the ADC output code for the analog input voltage at the pin VBAT_SENSE. The correction
coefficients c1 and c0 correct for slope variations and offset errors of the measurement transfer function.
During the production test these calibration figures are calculated and stored in the flash memory of the
microcontroller.
Data Sheet
17
Rev. 3.01, 2008-04-15
TLE7810G
ADC Measurement Interface
Further details on the implementation of the calibration function and location of the calibration figures in Flash
memory can be found in a dedicated application note. The voltage measurement target parameters can be found
in “ADC Battery Voltage Measurement Interface, VBAT_SENSE” on Page 44.
6.2
Temperature Measurement
In the temperature measurement mode the typical internal analog output voltage of the on-chip temperature
sensor can be described with the first order approximation:
VA ≈ m0 – m1 × Tj
(4)
Where:
•
•
Tj is the junction temperature in Kelvin
moand m1 are typical linear fitting parameters
(see Table “ADC Temperature Measurement Interface” on Page 44)
The output code of the ADC is given by the following equation, where VAREF and N denote the ADC reference
voltage and the resolution of the ADC:
N
(2 – 1)
C A = round V A ( T j ) × -------------------- , V A ≤ V AREF
V AREF
(5)
The junction temperature TJ corresponding to the output code CA is given by:
C A ( T j ) × V AREF
1
T j = ------ m 0 – -------------------------------------N
m1
[unit: K]
2 –1
(6)
273.15 °C need to be subtracted to convert Tj [K] into Centigrade Scale [°C].
The temperature measurement target parameters can be found in“ADC Temperature Measurement Interface”
on Page 44.
6.2.1
Temperature Measurement Calibration Concept
Best measurement accuracy can be obtained by applying the calibration function:
T CAL = 586 + f 0 • 2 – 1 – [ 2 – 2 + f 1 • 2 – 10 ] C ( T j )
A
(7)
The calibration coefficients f0 / 1 are computed during the production test and stored in the flash memory of the
microcontroller.
The selection between battery voltage and temperature measurement is done via SPI bit (see “SPI (Serial
Peripheral Interface)” on Page 20).
Further details on the implementation of the calibration function and location of the calibration figures can be found
in a dedicated application note.
Data Sheet
18
Rev. 3.01, 2008-04-15
TLE7810G
Low Dropout Voltage Regulator
7
Low Dropout Voltage Regulator
The Low Drop-Out Voltage Regulator (LDO) has mainly been integrated in the TLE7810G in order to supply the
integrated microcontroller and several modules of the SBC.
Note: The LDO is not intended to be used as supply for external loads. However, it might be used as supply for
small external loads (see Table 13 “Operating Range” on Page 35).
In the event of a short circuit condition at the Vcc pin, a shutdown/reset of the TLE7810G may occur due to
overcurrent condition. This maximum output current for external loads is specified in the electrical characteristics.
The voltage regulator output is protected against overload and overtemperature.
An external reverse current protection is required at the pin VS to prevent the output capacitor at VCC from being
discharged by negative transients or low VS voltage.
Data Sheet
19
Rev. 3.01, 2008-04-15
TLE7810G
SPI (Serial Peripheral Interface)
8
SPI (Serial Peripheral Interface)
Control and status information between SBC and μC is exchanged via a digital interface, that is called “serial
peripheral interface” (SPI) on the SBC side, and “synchronous serial channel” (SSC) on the μC side. The 16-bit
wide Programming or Input Word of the SBC (see Table 2 to Table 8) is read in via the data input DI (with “LSB
first”), which is synchronized with the clock input CLK supplied by the μC. The Diagnosis or Output Word appears
synchronously at the data output DO (see Table 9).
The transmission cycle begins when the chip is selected by the Chip Select Not input CSN (“low” active). After the
CSN input returns from L to H, the word that has been read in becomes the new control word. The DO output
switches to tri-state status at this point, thereby releasing the DO bus for other usage.
The state of DI is shifted into the input register with every falling edge on CLK. The state of DO is shifted out of
the output register after every rising edge on CLK. The number of received input clocks is supervised by a modulo16 operation and the Input/Control Word is discarded in case of a mismatch.
This error is flagged by a “high” at the data output pin DO (interconnect to μC: P1.4) of the following SPI output
word before the first rising edge of the clock is received. Additionally the logic level of DO will be “OR-ed” with the
logic level of DI (P1.3).
Note: After wake-up from low-power modes the device needs to be set to Active Mode first before switches like
LS1, LS2, Supply Output and LED Driver can be turned on with the second SPI command.
MSB
Input
Data
LSB
15 14 13 12 11 10
WD
On/Off
Meas.
I/F
On/Off
9
8
7
6
5
Configuration Registers
ADC
Vbat/
Vtemp*
4
3
2
CS1
CS0
MS2
Configuration
Select
LIN Reset Reset
10.4k* Delay* Thres*
00
Reserved
LS2
LS1 HS-LED HS-LED Supply
OV/UV
Output
On/Off On/Off disable On /Off On/Off
01
Reserved
Cyclic Wake Timing*
Bit Position: 9 .. 5
10
MON5
On/Off*
Reserved
MON4
On/Off*
0**
MON3
On/Off*
MON2
On/Off*
MON1
On/ Off*
Window Watchdog Timing
Bit Position: 10 .. 5
11
1
MS1
0
MS0
Mode Selection
Bits
not valid
not valid
Active
LIN Sleep
Active
(Watchdog Trigger Register )
Sleep
* remains unchanged after Vcc-UV or WD-RESET
** if bit set to „1" command will be ignored
not valid
LIN RxD Only
Stop
Figure 10
Data Sheet
000
001
010
011
100
101
110
111
16-Bit SPI Input Data / Control Word
20
Rev. 3.01, 2008-04-15
TLE7810G
SPI (Serial Peripheral Interface)
Table 2
SPI Input Data Bits
BIT
Input Data
0
Mode Selection Bit 0 (MS0)
1
Mode Selection Bit 1 (MS1)
2
Mode Selection Bit 2 (MS2)
3
Configuration Selection Bit 0 (CS0)
4
Configuration Selection Bit 1 (CS1)
5 … 13
Configuration Register (meaning based on “Configuration Selection Bits”)
14
Measurement Interface “on” / “off” (setting only valid in active mode, in power saving modes the
Measurement interface is turned off)
15
Window Watchdog Stop/Sleep mode configuration “on” / “off” (the configuration is only valid for
Stop/Sleep mode, in Active mode the Window Watchdog is always on);
if “on” is set before Stop Mode is entered, watchdog remains active regardless of “watchdog disable
current threshold”
Table 3
Mode Selection Bits
MS2
MS1
MS0
Mode Selection: SBC Mode
0
0
0
“reserved” / not used
0
0
1
“reserved” / not used
0
1
0
SBC Active Mode: “LIN Sleep”
0
1
1
SBC Active Mode (LIN “on”)
1
0
0
SBC Sleep (LIN & VReg “off”)
1
0
1
“reserved” / not used
1
1
0
LIN Transceiver: LIN Receive-Only
1
1
1
SBC Stop Mode (LIN “off”)
Table 4
Configuration Selection Bits
CS1
CS0
Configuration Selection
0
0
General Configuration
0
1
Integrated Switch Configuration
1
0
Cyclic Wake Configuration
1
1
Window Watchdog Configuration
Data Sheet
21
Rev. 3.01, 2008-04-15
TLE7810G
SPI (Serial Peripheral Interface)
Table 5
General & Integrated Switch Configuration
Pos.
General Configuration1)
Integrated Switch Configuration2)
5
Reset Threshold: “default” or “SPI option”
(see Table 14: Reset Generator; Pin RESET)
Supply Output “on” / “off”
6
Reset Delay: “default” or “SPI option”
(see Table 14: Reset Generator; Pin RESET)
HS-LED “on” / “off”
7
LIN “Low Slope Mode” (10.4 kBaud)
HS-LED OV/UV disable
“0”: HS-LED will be turned off in case of Vbat OV/UV
“1”: HS-LED will not be turned off in case of Vbat
OV/UV
8
MON1 Input Activation
LS1 “on” / “off”
9
MON2 Input Activation
LS2 “on” / “off”
10
MON3 Input Activation
“reserved” / not used
11
MON4 Input Activation
“reserved” / not used
12
MON5 Input Activation
“reserved” / not used
13
ADC Measurement: Vbat / Vtemp
(“0” = Vbat; “1” = Vtemp)
“reserved” / not used
1) “1” = ON / enable, “0” = OFF / disable
2) “1” = ON, “0” = OFF
Cyclic Wake & Window Watchdog Period Settings1)2)
Table 6
Pos.
Cyclic Sense / Wake Config.
Window Watchdog Config.
5
Cyclic Period Bit 0 (T0)
Watchdog Period Bit 0 (T0)
6
Cyclic Period Bit 1 (T1)
Watchdog Period Bit 1 (T1)
7
Cyclic Period Bit 2 (T2)
Watchdog Period Bit 2 (T2)
8
Cyclic Period Bit 3 (T3)
Watchdog Period Bit 3 (T3)
9
Cyclic Period Bit 4 (T4)
Watchdog Period Bit 4 (T4)
10
“reserved” / not used
Watchdog Period Bit 5 (T5)
11
“reserved” / not used
“0” (mandatory)
12
“reserved” / not used
“reserved” / not used
13
“reserved” / not used
“reserved” / not used
1) “1” = ON, “0” = OFF
2) Cyclic wake and window watchdog period settings see Table 7 “Cyclic Wake Period Settings (Stop Mode only)” on
Page 23
Data Sheet
22
Rev. 3.01, 2008-04-15
TLE7810G
SPI (Serial Peripheral Interface)
Table 7
Cyclic Wake Period Settings (Stop Mode only)
T4
T3
T2
T1
T0
Cyclic Wake Period
0
0
0
0
0
Cyclic Wake “off”
0
0
0
0
1
16 ms
0
0
0
1
0
32 ms
0
0
0
1
1
48 ms
0
0
1
0
0
64 ms
0
0
1
0
1
80 ms
0
0
1
1
0
96 ms
…
…
…
…
…
… ms
1
1
1
1
1
496 ms
Table 8
Window Watchdog Reset Period Settings
T5
T4
T3
T2
T1
T0
Window Watchdog
Reset Period
0
0
0
0
0
0
“not a valid selection”
0
0
0
0
0
1
16 ms
0
0
0
0
1
0
32 ms
0
0
0
0
1
1
48 ms
0
0
0
1
0
0
64 ms
0
0
0
1
0
1
80 ms
0
0
0
1
1
0
96 ms
…
…
…
…
…
…
… ms
1
1
1
1
1
1
1008 ms
Table 9
SPI Output Data
Pos.
Output Data1)
Output Data after Wake-up2)
0
VCC Temperature Prewarning
VCC Temperature Prewarning
1
HS-LED fail (OC / OT)
HS-LED fail (OC / OT)
2
VINT-Fail (“active low”)
VINT-Fail (“active low”)
3
LS1/2 (OC / OT)
LS1/2 (OC / OT)
4
Window Watchdog Reset
Window Watchdog Reset
5
MON1 Logic Input Level
Wake-Up via MON1
6
MON2 Logic Input Level
Wake-Up via MON2
7
MON3 Logic Input Level
Wake-Up via MON3
8
MON4 Logic Input Level
Wake-Up via MON4
9
MON5 Logic Input Level
Wake-Up via MON5
10
“reserved” / not used
“reserved” / not used
11
LIN Failure
Bus Wake-Up via LIN Msg.
12
Vbat Range 1 (UV)3) [only “SBC Active Mode”]
Vbat Range 2 (OV) [only “SBC Active Mode”]
End of Cyclic Wake Period
13
Data Sheet
23
“low”4)
Rev. 3.01, 2008-04-15
TLE7810G
SPI (Serial Peripheral Interface)
Table 9
SPI Output Data (cont’d)
Pos.
Output Data1)
Output Data after Wake-up2)
14
Supply Output (OC / OT)
Supply Output (OC / OT)
15
VS UV5) [only “SBC Active Mode”]
“low”
1) “1” = ON / enable, “0” = OFF / disable, OC = overcurrent, UV = undervoltage,
OT = overtemperature (temp. shut-down)
2) “1” = ON, “0” = OFF, OC = overcurrent, UV = undervoltage, OT = overtemperature (temp. shut-down)
3) Becomes valid after start-up time for voltage monitoring
4) Voltage monitoring not active in SBC Standby Mode
5) This bit needs to be read twice to indicate an undervoltage condition (only for VS ramping down - bit15 set to “1”)
Table 10
Diagnostic, Protection and Safety Functions
Module
Function
Effect
Concept
Reset; see Table 11 “Reset
Behavior SBC” on Page 26
SPI status latched until
next read-out
OC2) at VCC
current limitation
–
voltage regulator
UV condition
(VS related)
Reset, see Table 11 “Reset
Behavior SBC” on Page 26
Condition occurs at VS
below operating range
VCC-UV
Reset, see Table 11 “Reset
Behavior SBC” on Page 26
–
WD only disabled if
WD enabled if
VCC-current > threshold
1)
Window Watchdog WD Failure
LDO (VReg)
WD current threshold
(Stop Mode)
VCC-current < threshold and
WD not enabled via SPI
OT3)
VCC-shutdown, Reset as soon as automatically enabled with
VCC falls below reset threshold, see thermal hysteresis
Table 11 “Reset Behavior SBC”
on Page 26
OT prewarning
SPI status output
SPI status latched until
next read-out
internal supply
[SBC]
(VS related)
VINT-UV
(internal) Reset; register settings
cleared; SPI status output; see
Table 11 “Reset Behavior SBC”
on Page 26
–
LS-Switches
OC, OT
LSx-shutdown; SPI status output;
signalization via ERR pin
re-activation via SPI
command; SPI status
latched until next read-out
microcontroller error
signalization (ERR)
LSx-shutdown; see “Error
re-activation via SPI
Interconnect (ERR)” on Page 33 command
OC, OT
Supply-shutdown; SPI status
output
Supply Output
Data Sheet
24
re-activation via SPI
command; SPI status
latched until next read-out
Rev. 3.01, 2008-04-15
TLE7810G
SPI (Serial Peripheral Interface)
Table 10
Diagnostic, Protection and Safety Functions (cont’d)
Module
Function
Effect
Concept
HS-LED
OC, OT
HS-LED-shutdown; SPI status
output
re-activation via SPI
command; SPI status
latched until next read-out
VBAT-UV
HS-LED-shutdown (optional), SPI
status output
re-activation via SPI
command; SPI status
latched until next read-out
VBAT-OV
HS-LED-shutdown (optional), SPI
status output
re-activation via SPI
command; SPI status
latched until next read-out
VBAT-UV
HS-LED-shutdown (optional), SPI
status output
SPI status latched until
next read-out
VBAT-OV
HS-LED-shutdown (optional), SPI
status output
SPI status latched until
next read-out
VS-Monitor
VS-UV
SPI status output
SPI status latched until
next read-out
LIN
LIN-Failure (OT, UV, TxD
time-out)
SPI status output
–
Wake-up
signalization via interconnect to μC –
(RxD and DO “low”) and SPI status
output
MONx-Inputs
Wake-up
signalization via interconnect to μC –
(DO “low”) and SPI status output
SPI
Failure Indicator
signalled at interconnect (DO “high” –
OR-ed with DI) once CSN is active
VBAT-Monitor
(at VBAT_SENSE pin)
1) WD (Window) Watchdog
2) OC overcurrent detection
3) OT overtemperature detection
Data Sheet
25
Rev. 3.01, 2008-04-15
TLE7810G
Reset Behavior and Window Watchdog
9
Reset Behavior and Window Watchdog
The SBC provides three different resets:
•
•
•
VINT-UV: reset of SBC upon undervoltage detection at internal supply voltage
VCC-UV: reset of SBC upon undervoltage detection at supply voltage (VCC)
Watchdog: reset of SBC caused by integrated window watchdog
Should the internal supply voltage become lower than the internal threshold the VINT-Fail SPI bit will be reset in
order to indicate the undervoltage condition (VINT-UV). All other SPI settings are also reset by this condition. The
VINT-Fail feature can also be used to give an indication that the system supply was disconnected and therefore a
pre-setting routine of the microcontroller has to be started.
When the VCC voltage falls below the reset threshold voltage VRTx for a time duration longer than the filter time tRR
the reset output is switched LOW and will be released after a programmable delay time (default setting for PowerOn-Reset) when VCC > VRTx. This is necessary for a defined start of the microcontroller when the application is
switched on after Power-On-Reset. As soon as an undervoltage condition of the output voltage (VCC < VRTx)
appears, the reset output is switched LOW again (VCC-UV). The reset delay time can be shortened via SPI bit.
Please refer to Figure 17.
Table 11
Reset Behavior SBC
Affected by Reset
VINT-UV
VCC-UV or Watchdog-Reset
Reset Pin
“low”
“low”
Watchdog Timer
long open window
long open window
Operating Mode
SBC Standby
SBC Standby
LS-Switches
“off”
“off”
Supply Output
“off”
“off”
HS-LED
“off”
“off”
Configuration Settings
Reset (“all bits cleared”)
see Figure 10 “16-Bit SPI Input Data / Control
Word” on Page 20
After the above described delayed reset (LOW to HIGH transition at RESET pin) the window watchdog circuit is
started by opening a long open window in SBC Standby Mode. The long open window allows the microcontroller
to run its initialization sequences and then to trigger the watchdog via the SPI. Within the long open window period
a watchdog trigger is detected as a write access to the “window watchdog period bit field” within the SPI control
word. The trigger is accepted when the CSN input becomes HIGH after the transmission of the SPI word.
A correct watchdog trigger results in starting the window watchdog by opening a closed window with a width of
50% of the selected window watchdog period. This period, selected via the SPI window watchdog timing bit field,
is programmable in a wide range. The closed window is followed by an open window with a width of 50% of the
selected period. The microcontroller has to service the watchdog by periodically writing to the window watchdog
timing bit field. This write access has to meet the open window. A correct watchdog service immediately results in
starting the next closed window.
Should the trigger signal not meet the open window a watchdog reset is generated by setting the reset output low.
Then the watchdog again starts by opening a long open window. In addition, a “window watchdog reset flag” is set
within the SPI to monitor a watchdog reset. For fail safe reasons the TLE7810G is automatically switched to SBC
Standby mode if a watchdog trigger failure occurs. This minimizes the power consumption in case of a permanent
faulty microcontroller. This “window watchdog reset flag” will be cleared by any access to the SPI.
When entering a low power mode the watchdog can be requested to be enabled via an SPI bit. In SBC Stop Mode
the watchdog is only turned off once the current consumption at VCC falls below the “watchdog current threshold”.
Data Sheet
26
Rev. 3.01, 2008-04-15
TLE7810G
Monitoring / Wake-Up Inputs MON1 … 5 and Wake-Up Event Signalling
10
Monitoring / Wake-Up Inputs MON1 … 5 and Wake-Up Event
Signalling
In addition to a wake-up from SBC Stop / Sleep Mode via the LIN bus line it is also possible to wake-up the
TLE7810G from low power mode via the monitoring/wake-up inputs. These inputs are sensitive to a transition of
the voltage level, either from high to low or vice versa. Monitoring is available in Active Mode and indicates the
voltage level of the inputs via SPI status bits.
A positive or negative voltage edge at MONx in SBC Sleep or Stop Mode results in signalling a wake-up event (via
SBC [DO] to μC [P1.4] interconnect). After a wake-up via MONx the first transmission of the SPI diagnosis word
in SBC Standby mode indicates the wake-up source. Further SPI status word transmissions show the logic level
at the monitoring input pins.
Note: Immediately before switching the TLE7810G into a SBC power saving mode the activated MONx are
initialized with the actual logic level detected at the MONx. In case a MONx is deactivated it can neither be
used as wake-up source nor can it be used to detect logic levels.
However, there should be a minimum delay of three times “CSN high time” (see Table “SPI Data Input
Timing1)” on Page 43) between activation of MONx and entering a power saving mode.
The monitoring input module consists of an input circuit with pull-up and pull-down current sources to define a
certain voltage level with open inputs and a filter function to avoid wake-up events caused by unwanted voltage
transients at the module inputs.
At a voltage level at the monitoring pins of VMON_th < VMONx < 5.5 V the pull-up current source becomes active,
while at 1 V < VMONx < VMON_th the pull-down sink is activated (see Figure 11) guaranteeing stable levels at the
monitoring/wake-up inputs. Below and above these voltage ranges the current is minimized to a leakage current
(see “Monitoring Inputs MONx” on Page 38).
Vs
MONx
+
-
tWK
1
Figure 11
Data Sheet
Monitoring Input Block Diagram
27
Rev. 3.01, 2008-04-15
TLE7810G
Monitoring / Wake-Up Inputs MON1 … 5 and Wake-Up Event Signalling
VMONth_min
IMON
VMONth_max
Pull-down
current
VMON
Pull-up
current
Figure 12
Data Sheet
Monitoring Input Characteristics
28
Rev. 3.01, 2008-04-15
TLE7810G
Low Side Switches
11
Low Side Switches
The low side switches LS1 and LS2 have been designed to drive relays, e.g. in window lift applications. The
continuous output current is dimensioned for 300mA (each) maximum. In SBC Active and LIN Receive-Only mode
the low side outputs can be switched on and off, respectively via an SPI input bit. Protection against overcurrent,
overtemperature and overvoltage conditions is integrated in the low-side drivers.
In case of a load current that is exceeding the overcurrent threshold both drivers are switched-off after a filter time.
A thermal protection circuit is included as well, and is switching-off the drivers in case the overtemperature
threshold is reached. In both cases the SPI diagnostic information is updated accordingly and the ERR
interconnect is pulled “low” for one internal cycle (see “SBC Oscillator” on Page 37). The drivers have to be
re-activated via SPI command. An overvoltage protection has been implemented by active clamping for inductive
loads preventing the occurrence of voltage peaks.
Moreover the switches are automatically disabled when a reset or watchdog reset occurs. However, the switches
are not automatically switched off in case of an overvoltage condition, e.g. load dump. If a double-failure occurs
at the same time causing an overcurrent (OC) or overtemperature (OT) condition, than the LSx are turned off in
order to protect the IC.
Note: In case one LSx is turned off due to an OC / OT condition the second LSx is turned off automatically (bidirectional ERR interconnect pulled “low”).
The LSx can also be switched off by the microcontroller by pulling the bi-directional ERR interconnect “low” for at
least one internal cycle (see “SBC Oscillator” on Page 37).
Data Sheet
29
Rev. 3.01, 2008-04-15
TLE7810G
Supply Output for Hall Sensor Supply
12
Supply Output for Hall Sensor Supply
The SUPPLY Output is intended to be used as Hall Sensor supply. In SBC Active and LIN Receive-Only mode
this output can be switched on and off, respectively via an SPI input bit.
Note: The SUPPLY Output needs to be turned-off prior to entering SBC Stop Mode via SPI command as it will
inherit the “on or off state” from the previous operation mode. In case of entering SBC Sleep Mode it is
turned-off automatically.
This output provides an output voltage limitation and is protected against overcurrent and overtemperature. The
protection mechanisms for the low-sides switches also apply for this high-side switch. In case of an overcurrent
shutdown the supply output can be re-activated via SPI command. In order to prevent an unintended shut-down
due to an overcurrent situation when a capacitive load is connected, a specified blanking time after switching-on
has been implemented and is applied directly after activation of this output.
Data Sheet
30
Rev. 3.01, 2008-04-15
TLE7810G
High-Side Switch as LED Driver (HS-LED)
13
High-Side Switch as LED Driver (HS-LED)
The high side output HS_LED is intended for driving LEDs or small lamps. This function and the wake-up function
via MON5 input are realized on the same pin (MON5/HS_LED). In SBC Active and LIN Receive-Only mode the
high side output can be switched on and off, respectively via an SPI input bit (automatically “off” in SBC Stop
Mode).
The high-side driver is protected against overcurrent and overtemperature. The HS-LED is automatically disabled
in case of an undervoltage (Vbat-UV) and overvoltage condition (Vbat-OV) and can only be re-activated via SPI
command. This HS-LED OV/UV feature can be disabled via SPI bit (see Table 5 “General & Integrated Switch
Configuration” on Page 22).
Data Sheet
31
Rev. 3.01, 2008-04-15
TLE7810G
General Purpose I/Os (GPIO)
14
General Purpose I/Os (GPIO)
The pins P0.3 / P0.4 / P0.5 and P2.0 / P2.1 provide general purpose functionality, like Hall Sensor inputs, PWM
output and capture. GPIOs P0.0, P0.1 and P0.2 are available in user mode only (alternate JTAG functionality).
For further information see dedicated XC866 User’s Manual and/or Data Sheet.
Data Sheet
32
Rev. 3.01, 2008-04-15
TLE7810G
Error Interconnect (ERR)
15
Error Interconnect (ERR)
The ERR interconnect provides a bi-directional error signalization. The ERR output (active low) immediately
signals that a low side switch LSx has been shut down due to overcurrent or overtemperature condition. If the ERR
signal is pulled “low” by the microcontroller for at least one internal cycle (see “SBC Oscillator” on Page 37), the
low side switches LS1/LS2 are turned off (see Table 10 “Diagnostic, Protection and Safety Functions” on
Page 24).
Data Sheet
33
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
16
General Product Characteristics
16.1
Absolute Maximum Ratings
Table 12
Absolute Maximum Ratings1)
Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Max.
-0.3
40
V
–
-0.3
5.5
V
–
VS - 40
40
V
also for pulses according to
ISO 7637; external series
resistor R > 1.0 kΩ required
VS - 40
VS + 0.3 V
MON5 input voltage limited
due to LED driver
functionality.
R > 1.0 kΩ required
Voltages
VS
VCC
VMONx
16.1.1
Supply voltage
16.1.2
Regulator output voltage
16.1.3
Input voltage at MON1-4
16.1.4
Input voltage at MON5/HS_LED VMON5
(output)
16.1.5
Input voltage at VBAT_SENSE
VBATSENSE VS - 40
40
V
also for pulses according to
ISO 7637; external series
resistor R > 1.0 kΩ required
16.1.6
Low-Side Switches LSx
VLSx
-0.3
VLSx_CL
V
limited by output clamping
voltage & clamping energy
16.1.7
SUPPLY Output
VSupply
-0.3
16.1.8
Logic input voltages (TMS, TCK, VI
TDI, CLKIN)
VS + 0.3 V
VCC +
V
-0.3
0.3
0 V < VS < 27 V
0 V < VCC < 5.5 V
Logic output voltage (TDO,
RESET)
VDRI,RD
16.1.10
LIN line bus input voltages
VS - 40
16.1.11
Electrostatic discharge voltage
“HBM” at pin LIN, MONx,
VBAT_SENSE vs. GND
Vbus
VESD
-4
Electrostatic discharge voltage
“HBM” at pin VDDC vs. GND
VESD
-600
Electrostatic discharge voltage
“HBM” at any other pin
VESD
-2
Electrostatic discharge voltage
“CDM” at any pin
VESD
-500
500
V
Charged device model;
according to AEC Q100-011
Rev-B
Tj
Tstg
-40
150
°C
–
-50
150
°C
–
16.1.9
16.1.12
16.1.13
16.1.14
-0.3
VCC +
–
V
0 V < VS < 27 V
0 V < VCC < 5.5 V
40
V
–
4
kV
0.3
EIA/JESD22-A114-B
C = 100 pF,
R = 1.5 kΩ
600
V
EIA/JESD22-A114-B
C = 100 pF; R = 1.5 kΩ
2
kV
EIA/JESD22-A114-B
C = 100 pF; R = 1.5 kΩ
Temperatures
16.1.15
Junction temperature
16.1.16
Storage temperature
1) Not subject to production test, specified by design.
Data Sheet
34
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
16.2
Functional Range
Table 13
Operating Range
Pos.
Parameter
Symbol
Limit Values
Min.
Max.
Unit
Conditions
40 V load dump; t ≤ 0.4 s;
27V jump start; t ≤ 60s;
VS (min) valid for ramp-down
16.2.1
Supply voltage
VS
3.9
27
V
16.2.2
Voltage range at LSx pins
VLSx
-0.3
27
V
40 V load dump; t ≤ 0.4s;
can withstand short circuit
to VS ≤ 20V
16.2.3
External output current at pin VCC ICC_ext
–
5
mA
external loads
16.2.4
Supply voltage slew rate
dVS/dt
-0.5
5
V/μs
–
16.2.5
Logic input voltage (TMS, TCK,
TDI, CLKIN)
VI
-0.3
VCC +
V
–
16.2.6
Output capacitor connected to
VCC pin
CCC
1
–
μF
ESR < 6 Ω
@ f = 10 kHz;
100 nF in parallel
recommended
16.2.7
SPI clock frequency
–
4
MHz
–
16.2.8
Junction temperature
-40
150
°C
–
16.2.9
Delay time for operating mode
change
fclk
Tj
tchmode
10
–
μs
min. time between 2 SPI
commands; CSN “high”
16.3
Thermal Resistance
Pos.
Parameter
0.3 V
Symbol
1)
Limit Values
Min.
Typ.
Max.
Unit
Conditions
16.3.1
Junction to Soldering Point
RthJSP
–
–
17
K/W
measured to pin
7,8,22
16.3.2
Junction to Ambient1)
RthJA
–
43
–
K/W
2)
1) Not subject to production test, specified by design
2) Specified RthJA value is according to Jedec JESD51-2,-7 at natural convection on FR4 2s2p board; The Product
(Chip+Package) was simulated on a 76.2 x 114.3 x 1.5 mm board with 2 inner copper layers (2 x 70µm Cu, 2 x 35µm Cu).
Data Sheet
35
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
16.4
Electrical Characteristics
Table 14
Electrical Characteristics
VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
–
24
30
Unit
Conditions
mA
Tj = -40 … 85 °C;
Current Consumption @ Pin VS
16.4.1
Current Consumption
IMCM_norm
(MCM): IMCM_norm = ISBC_AM
+ IµC_NM
SBC: active mode
μC: normal mode
16.4.2
Current Consumption
(SBC): SBC Active Mode
ISBC_AM
–
3
5
mA
Tj = -40 … 85 °C;
w/o data transmission;
only SBC; all switches “off”
16.4.3
Current Consumption
(μC): Normal Mode
IµC_NM
–
21
25
mA
Tj = -40 … 85 °C;
only μC
16.4.4
Quiescent Current
(MCM): STOP Mode
IMCM_Stop
–
60
95
μA
Tj = -40 … 85 °C;
IMCM = ISBC + IµC
16.4.5
SBC STOP Mode
with “cyclic wake”
ISBC_Stop
–
–
80
16.4.6
SBC STOP Mode
without “cyclic wake”
ISBC_Stop
–
50
65
16.4.7
μC Power Down Mode
10
30
Quiescent Current
(MCM): STANDBY
IµC_Stop
IMCM_Stby
–
16.4.8
–
–
95
μA
Tj = -40 … 85 °C;
IMCM = ISBC + IµC
16.4.9
μC Power Down Mode
10
30
16.4.10
SBC STANDBY Mode
50
65
16.4.11
SBC STANDBY Mode
250
800
μA
Quiescent Current @
Tj = -40 … 85 °C; Supply
Output (Hall Supply)
turned-off; after LIN
wake-up/power-up
16.4.12
Quiescent Current (MCM): IMCM_Sleep
Sleep Mode
25
40
μA
Tj = -40 … 85 °C;
IMCM = ISBC + IµC;
IµC_PWR_DWN –
ISBC_Stby
–
ISBC_Stby
–
–
Supply Output (Hall
Supply) turned-off
μC “turned-off”
Voltage Regulator; Pin VCC
16.4.13
Output voltage
VCC
4.9
5.0
5.1
V
1 mA < ICC < 45 mA;
5.5 V < VS < 27 V;
CL ≥ 1 μF; ESR < 6 Ω
16.4.14
Line regulation
ΔVCC
–
–
20
mV
16.4.15
Load regulation
ΔVCC
–
–
50
mV
16.4.16
Power supply ripple
rejection1)
PSRR
–
40
–
dB
5.5 V < VS < 27 V;
ICC = 1 mA
1 mA < ICC < 45 mA;
5.5 V < VS < 27 V
Vr = 1 Vpp; fr = 100 Hz;
CVCC = 1 μF
Data Sheet
36
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
Table 14
Electrical Characteristics (cont’d)
VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
16.4.17
Parameter
Output current limit
Symbol
ICCmax
Limit Values
Min.
Typ.
Max.
45
–
200
Unit
Conditions
mA
VCC = 4.5 V;
power transistor thermally
monitored
16.4.18
Drop voltage
VDR = VS - VCC
VDR
–
–
0.3
V
1 mA < ICC < 45 mA;
3.9 V < VS < 5.1 V
16.4.19
VCC thermal prewarning
TjPW
120
145
170
°C
1)
TjPW_hys
–
10
–
K
1)
TjSD
155
185
200
°C
1)
TjSD_hys
20
35
–
K
1)
TjSD/TjPW
–
1.25
–
–
1)
ON temperature
16.4.20
VCC thermal prewarning
hysteresis
16.4.21
VCC thermal shutdown
temperature
16.4.22
VCC thermal shutdown
hysteresis
16.4.23
VCC ratio of SD to PW
temp.
Under-/Overvoltage Detection @ Vbat_sense Pin
16.4.24
Undervoltage Threshold
“ramp-up”
VUVT_Vbat
7.1
7.65
8.2
V
indicated within SPI output
word; LED Driver turned
off
16.4.25
Undervoltage Threshold
“ramp-down”
VUVT_Vbat
6.8
7.25
7.65
V
indicated within SPI output
word; LED Driver turned
off
16.4.26
Undervoltage Threshold
hysteresis
VUVT_Vbat_hys –
400
–
mV
1)
16.4.27
Overvoltage Threshold
“ramp-up”
VOVT_Vbat
17.6
18.5
19.4
V
indicated within SPI output
word; LED Driver turned
off
16.4.28
Overvoltage Threshold
“ramp-down”
VOVT_Vbat
16.6
17.4
18.2
V
indicated within SPI output
word; LED Driver turned
off
16.4.29
Overvoltage threshold
hysteresis
VOVT_Vbat_hys –
1.1
–
V
1)
Undervoltage Detection @ VS Pin
16.4.30
Undervoltage threshold
“ramp-down”
VUVT_Vs
5.8
6.5
7.2
V
indicated within SPI output
word
16.4.31
Undervoltage threshold
hysteresis
VUVT_Vs_hys
–
250
–
mV
1)
tCYL
3.2
3.9
4.8
μs
SBC Oscillator
16.4.32
Internal cycling time
Data Sheet
internal oscillator
fOSC = 256 kHz (typ.)
37
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
Table 14
Electrical Characteristics (cont’d)
VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
VRT1
4.5
4.65
4.8
V
at pin VCC, default SPI
setting
VRT2
VRT1_hys
VRT2_hys
VRESET
3.0
3.15
3.3
V
at pin VCC, SPI option
20
90
–
mV
1)
20
90
–
mV
–
0.2
0.4
V
IRESET = 1 mA for
VCC = VRTx;
IRESET = 200 μA for
VRTx > VCC ≥ 1 V
0.7 ×
–
VCC +
V
–
VRESET = 0 V
VCC < VRT to
Reset Generator; Pin RESET
16.4.33
16.4.34
Reset threshold voltage
(for VCC UV condition
indication)
Reset threshold voltage
hysteresis
16.4.35
Reset low output voltage
16.4.36
Reset high output voltage VRESET
16.4.37
Reset pull-up current
16.4.38
Reset reaction time
IRESET
tRR
VCC
0.1
-20
-150
-500
μA
4
10
26
μs
RESET = “low”
16.4.39
Reset delay time
tRD1
4.0
5.0
6.0
ms
default SPI setting;
after Power-On-Reset
tRD2
0.4
0.5
0.6
ms
SPI setting option
51
64
77
ms
–
0.2
1
4
mA
only SBC Stop Mode
Watchdog Generator
16.4.40
16.4.41
tLW
Watchdog disable current IWDI,th
Long open window
threshold
Monitoring Inputs MONx
16.4.42
Wake-up/monitoring
threshold voltage
VMONth
3.7
4
4.3
V
in all SBC modes; without
serial resistor
(with RS: ΔV = IPD/PU × RS)
VS > 6.0 V (drops linearly
for VS < 6.0 V)
16.4.43
Threshold hysteresis
VMONth,hys
20
50
600
mV
without serial resistor RS
(with RS: ΔV = IPD/PU × RS)
16.4.44
Wake-up/monitoring filter
time
tMON
10
15
25
μs
–
16.4.45
Pull-up current
-10
-5
-1
μA
16.4.46
Pull-down current
1
5
10
μA
16.4.47
Input leakage current
(except MON5 due to
alternative LED supply
voltage functionality)
IPU, MONx
IPD, MONx
ILK,I
-2
0
2
μA
ILK,I
-2
0
2
μA
ILK_MON5,I
-5
0
2
μA
VMON_th < VMONx < 5.5 V
1 V < VMONx < VMON_th
0 V < VMONx < 1 V;
5.5 V < VMONx < 40 V
VMON = 40 V;VS = 0 V;
general: VMONx > VS
0 V < VMON5 < 1 V;
5.5 V < VMON5 < VS + 0.3 V
16.4.48
Input leakage current
MON5
Data Sheet
38
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
Table 14
Electrical Characteristics (cont’d)
VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
–
–
3.0
Unit
Conditions
Ω
TJ = 150 °C; VS > 4.5 V; ILS
Low Side Output LS1 / LS2
16.4.49
Static Drain-Source
ON-Resistance
RDSON LSx
= 200 mA
–
1.0
–
Ω
TJ = 25°C; VS > 4.5 V; ILS
= 200 mA
16.4.50
Output clamping voltage
VLSx_CL
40
45
50
V
output “off”; current pulse:
ILS1/2 = 100 mA; condition
during production test
16.4.51
Leakage current
IQLLSx
–
–
5
μA
VLSx = VS;
-40 °C < TJ < 85 °C
16.4.52
Switch ON time
tONLSx
–
15
40
μs
CSN high to LSx on;
resistive load 120 Ω
16.4.53
Switch OFF time
tOFFLSx
–
–
40
μs
CSN high to LSx off;
resistive load 120 Ω
16.4.54
Overcurrent shutdown
threshold
ISDLSx
600
800
1000
mA
to prevent shutdown at
overvoltage conditions
@ -40 °C higher limits
have been chosen2)
16.4.55
Overcurrent shutdown
filter time
tdSDLSx
10
18
26
μs
after continuos overcurrent
detection t > tdSDLSx
affected LSx will be
shutdown and overcurrent
condition will be indicated
via SPI output word
16.4.56
LS1/2 thermal shutdown
temp.
TjSD
155
–
200
°C
1)
16.4.57
LS1/2 thermal shutdown
temp. hysteresis
TjSD_hys
10
15
–
K
1)
16.4.58
Output Clamping Energy
at pins LSx
ECL
–
–
4
mJ
based on 250.000
switching cycles
Supply Output (Hall Sensor Supply)
16.4.59
Drop voltage
VS - VSupply
VDROP_Supply –
–
300
mV
16.4.60
Output voltage range
VSUPPLY
2.7
–
18.0
V
IQL_SUPPLY
tON_SUPPLY
tOFF_SUPPLY
ISD_SUPPLY
-5
–
–
μA
ISupply = -18 mA;
3.9 V < VS < 13.5 V
3.9 V < VS < 27.0 V;
for t < 0.4 s:
27.0 V < VS < 40.0 V;
VSupply = 0 V
–
–
200
μs
CSN high to SUPPLY
–
–
100
μs
CSN high to SUPPLY
-80
-40
-20
mA
–
16.4.61
Leakage current
16.4.62
Switch ON time
16.4.63
Switch OFF time
16.4.64
Overcurrent shutdown
threshold
Data Sheet
39
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
Table 14
Electrical Characteristics (cont’d)
VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
60
–
140
μs
–
16.4.65
Switch ON overcurrent
shutdown blanking time
tblank_ON
16.4.66
Shutdown filter time
tdSDHSUPPLY
10
18
26
μs
overcurrent will be
indicated/shutdown will be
initiated after continuous
detection of overcurrent
condition
16.4.67
Thermal shutdown temp.
155
175
200
°C
1)
16.4.68
Thermal shutdown temp.
hysteresis
TjSD_SUPPLY
TjSD
10
15
–
K
1)
–
20.0
Ω
–
8.5
–
Ω
IHS_LED
tONHS_LED
tOFFHS_LED
ISDHS_LED
-5
–
–
μA
TJ = 150 °C;
IHS-LED = -45 mA
TJ = 25°C;
IHS-LED = -45 mA
VHS_LED = 0 V
–
–
100
μs
CSN high to HS_LED on
–
–
100
μs
CSN high to HS_LED off
-120
-80
-50
mA
–
_SUPPLY
_SUPPLY_hys
LED Driver (HS-LED)
16.4.69
Static Drain-Source
ON-Resistance
RDSONHS_LED –
16.4.70
Leakage current
16.4.71
Switch ON time
16.4.72
Switch OFF time
16.4.73
Overcurrent shutdown
threshold
16.4.74
Overcurrent shutdown
filter time
tdSDHS_LED
10
18
26
μs
overcurrent will be
indicated/shutdown will be
initiated after continuous
detection of overcurrent
condition
16.4.75
Thermal shutdown temp.
155
175
200
°C
1)
16.4.76
Thermal shutdown temp.
hysteresis
TjSDHS_LED
TjSDHS_hys
–
10
–
K
1)
Receiver threshold
voltage, recessive to
dominant edge
Vbus,rd
0.42 × 0.48 × –
V
–
VS
VS
Receiver dominant state
Vbusdom
–
–
Receiver threshold
voltage, dominant to
recessive edge
Vbus,dr
–
Receiver recessive state
Vbusrec
0.58 × –
Vbuscent
0.475
× VS
LIN Bus Receiver
16.4.77
16.4.78
16.4.79
16.4.80
16.4.81
Receiver center voltage
Data Sheet
0.42 × V
VS
(LIN Spec 1.3 (2.0);
Line 10.1.9 (3.1.9))
0.52 × 0.58 × V
Vbus,rec < Vbus < 27 V
VS
VS
–
V
(LIN Spec 1.3 (2.0);
Line 10.1.10 (3.1.10))
0.525
× VS
V
(LIN Spec 1.3 (2.0);
Line 10.1.11 (3.1.11))
VS
40
0.5 ×
VS
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
Table 14
Electrical Characteristics (cont’d)
VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
16.4.82
Receiver hysteresis
Vbus,hys
Typ.
VS
Conditions
V
Vbus,hys =
Vbus,rec - Vbus,dom
Max.
0.02 × 0.04 × 0.1 ×
VS
Unit
VS
(LIN Spec 1.3 (2.0);
Line 10.1.12 (3.1.12))
16.4.83
16.4.84
Wake-up threshold
voltage
Vwake
0.4 ×
0.5 ×
0.6 ×
VS
VS
VS
RxD filter time
tRxD_filter
–
0.85
V
–
–
µs
1)
Note: RC filter between
LIN and RxD signal
LIN Bus Transmitter
16.4.85
Bus serial diode voltage
drop
Vserdiode
0.4
0.7
1.0
V
VTxD = high Level
16.4.86
Bus dominant output
voltage
Vbus,dom
–
–
1.2
V
VTxD = 0 V; VS = 7 V;
RL = 500 Ω;
(LIN Spec 1.3;
Line 10.1.13)
–
–
2.0
V
VS = 18 V;
RL = 500 Ω;
(LIN Spec 1.3;
Line 10.1.14)
16.4.87
Bus dominant output
voltage
Vbus,dom
0.6
–
–
V
VTxD = 0 V; VS = 7 V;
RL = 1 kΩ;
(LIN Spec 1.3;
Line 10.1.15)
16.4.88
16.4.89
Bus short circuit current
(current limitation)
Ibus,sc
Leakage current
Ibus,lk
0.8
–
–
V
VS = 18 V; RL = 1 kΩ;
(LIN Spec 1.3;
Line 10.1.16)
40
100
150
mA
Vbus,short = 18 V;
(LIN Spec 1.3 (2.0);
Line 10.1.4 (3.1.4))
-500
-140
–
μA
VS = 0 V; Vbus = -8 V
(LIN Spec 1.3 (2.0);
Line 10.1.7 (3.1.7))
–
10
25
μA
VS = 0 V; Vbus = 18 V
(LIN Spec 1.3 (2.0);
Line 10.1.8 (3.1.8))
-1
–
–
mA
VS = 18 V; Vbus = 0 V
(LIN Spec 1.3 (2.0);
Line 10.1.5 (3.1.5))
–
–
20
μA
VS = 8 V; Vbus = 18 V
(LIN Spec 1.3 (2.0);
Line 10.1.6 (3.1.6))
Data Sheet
41
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
Table 14
Electrical Characteristics (cont’d)
VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
16.4.90
Bus pull-up resistance
Rbus
20
30
60
kΩ
Active/Standby Mode
(LIN Spec 1.3 (2.0);
Line 10.2.2 (3.2.2))
16.4.91
LIN output current
Ilin
5
20
60
μA
Sleep mode; Vbus = 0 V
Dynamic LIN Transceiver Characteristics3)
16.4.92
Slew rate falling edge
Sfslope
-3
–
-1
V/μs
60% > Vbus > 40%;
1 μs < (τ = Rl × Cbus)
< 5 μs; VS = 13.5 V;
Active Mode
(LIN Spec 1.3;
Line 10.3.1)
16.4.93
Slew rate rising edge
Srslope
1
–
3
V/μs
40% < Vbus < 60%;
1 μs < (τ = Rl × Cbus)
< 5 μs; VS = 13.5 V;
Active Mode
(LIN Spec 1.3;
Line 10.3.1)
16.4.94
Slope symmetry
tslopesym
-5
–
5
μs
tfslope - trslope;
VS = 13.5 V
(LIN Spec 1.3;
Line 10.3.3)
16.4.95
Propagation delay
TxD LOW to bus
td(L),T
–
1
4
μs
(LIN Spec 1.3;
Line 10.3.6)
16.4.96
Propagation delay
TxD HIGH to bus
td(H),T
–
1
4
μs
(LIN Spec 1.3;
Line 10.3.6)
16.4.97
Propagation delay
Bus dominant to RxD
LOW
td(L),R
–
1
6
μs
CRxD = 20 pF;
RRxD = 2.4 kΩ
Propagation delay
Bus recessive to RxD
HIGH
td(H),R
Receiver delay symmetry
tsym,R
16.4.98
16.4.99
(LIN Spec 1.3;
Line 10.3.7)
–
1
6
μs
CRxD = 20 pF;
RRxD = 2.4 kΩ
(LIN Spec 1.3;
Line 10.3.7)
-2
–
2
μs
tsym,R = td(L),R - td(H),R
(LIN Spec 1.3;
Line 10.3.8)
16.4.100 Transmitter delay
symmetry
tsym,T
16.4.101 Wake-up delay time
twake
16.4.102 TxD dominant time out
Data Sheet
-2
–
2
μs
tsym,T = td(L),T - td(H),T
(LIN Spec 1.3;
Line 10.3.9)
ttimeout
30
100
150
μs
–
–
170
μs
6
12
20
ms
42
Tj ≤ 125 °C
Tj ≤ 150 °C
VTxD = 0 V
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
Table 14
Electrical Characteristics (cont’d)
VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
16.4.103 TxD dominant time out
recovery time
Symbol
ttorec
Limit Values
Unit
Conditions
Min.
Typ.
Max.
–
10
–
μs
VTxD = 5 V1)
Transfer Rate 20 kbit/s; 1 μs < τ = RL × Cbus < 5 μs
16.4.104 Duty cycle D1
D1
0.396
–
–
μs
duty cycle 1:
THRec(max) = 0.744 × VS;
THDom(max) = 0.581 × VS;
VS = 7.0 … 18 V;
tbit = 50 μs;
D1 = tbus_rec(min) / 2 tbit;
(LIN Spec 2.0;
Line 3.3.1)
16.4.105 Duty cycle D2
D2
–
–
0.581
μs
duty cycle 2:
THRec(min) = 0.422 × VS;
THDom(min) = 0.284 × VS;
VS = 7.6 … 18 V;
tbit = 50 μs;
D2 = tbus_rec(max) / 2 tbit;
(LIN Spec 2.0;
Line 3.3.2)
Transfer Rate 10.4 kbit/s; 1 μs < τ = RL × Cbus < 5 μs
16.4.106 Duty cycle D3
D3
0.417
–
–
μs
duty cycle 3:
THRec(max) = 0.778 × VS;
THDom(max) = 0.616 × VS;
VS = 7.0 … 18 V;
tbit = 96 μs;
D3 = tbus_rec(min) / 2 tbit;
(LIN Spec 2.0;
Line 3.4.1)
16.4.107 Duty cycle D4
D4
–
–
0.590
μs
duty cycle 4:
THRec(min) = 0.389 × VS;
THDom(min) = 0.251 × VS;
VS = 7.6 … 18 V;
tbit = 96 μs;
D4 = tbus_rec(max) / 2 tbit;
(LIN Spec 2.0;
Line 3.4.2)
16.4.108 Clock period
250
–
–
ns
–
16.4.109
125
–
–
ns
–
125
–
–
ns
–
125
–
–
ns
–
250
–
–
ns
–
250
–
–
ns
–
SPI Data Input Timing1)
16.4.110
16.4.111
16.4.112
16.4.113
tpCLK
Clock high time
tCLKH
Clock low time
tCLKL
Clock low before CSN low tbef
CSN setup time
tlead
CLK setup time
tlag
Data Sheet
43
Rev. 3.01, 2008-04-15
TLE7810G
General Product Characteristics
Table 14
Electrical Characteristics (cont’d)
VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
125
–
–
ns
–
50
–
–
ns
–
50
–
–
ns
–
–
–
50
ns
–
16.4.118 Input signal fall time at pin tfIN
DI, CLK and CSN
–
–
50
ns
–
16.4.119 Delay time for mode
tfIN
change from Normal Mode
to Sleep Mode
–
–
10
μs
–
tCSN(high)
10
–
–
μs
–
trDO
tfDO
tENDO
tDISDO
–
30
80
ns
–
30
80
ns
CL = 100 pF
CL = 100 pF
–
–
50
ns
low impedance
–
–
50
ns
high impedance
2.45
2.5
2.55
V
4)
tbeh
16.4.115 DI setup time
tDISU
16.4.116 DI hold time
tDIHO
16.4.117 Input signal rise time at pin trIN
16.4.114 Clock low after CSN high
DI, CLK and CSN
16.4.120 CSN high time
1)
Data Output Timing
16.4.121 DO rise time
16.4.122 DO fall time
16.4.123 DO enable time
16.4.124 DO disable time
ADC Measurement Interface (general)
16.4.125 ADC reference voltage
VAREF
interconnect
ADC Battery Voltage Measurement Interface, VBAT_SENSE
16.4.126 Max. measurement input
voltage (full scale)
Vbat_fs
19.2
20
20.8
V
–
16.4.127 Measurement input
impedance
Rbat_sense
0.8
1.6
2.2
MΩ
measurement I/F = on
16.4.128 Vbat_sense input filter
bandwidth
bw
–
50
–
kHz
1)
16.4.129 Measurement input
leakage current
Ibat_sense
-0.5
–
0.5
μA
measurement I/F = off;
16.4.130 Measurement accuracy
after μController-based
calibration
–
-300
–
300
mV
Vbat_sense = 13.5 V
4 < Vbat_sense < Vbat_fs;
VCC ≥ 4.5 V
16.4.131 Settling time
Tset
–
–
30
μs
4)
CSN high to settled
output voltage VA
ADC Temperature Measurement Interface
16.4.132 Temp. Measurement
Range
TJ
-40
–
150
°C
via on-chip sensor
16.4.133 Temp. sensor offset
voltage
m0
–
3.82
–
V
1)
16.4.134 Temp. coefficient
m1
–
5.94
–
mV/K
1)
Data Sheet
44
VA = m0 - m1 x TJ
Rev. 3.01, 2008-04-15
TLE7810G
Timing Diagrams
Table 14
Electrical Characteristics (cont’d)
VS = 13.5 V, Tj = -40 °C to +150 °C, all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Min.
Typ.
Max.
Unit
Conditions
16.4.135 Measurement accuracy
after μController-based
calibration
TJ
-15
–
15
°C
-40 °C < TJ < 150 °C
16.4.136 Settling time
Tset
–
–
30
μs
4)
1)
2)
3)
4)
after measurement
mode change; CSN “high”
to settled output voltage at
interconnect VA
Not subject to production test, specified by design.
normal operation continuous current should not exceed 300mA (for each low-side LS1 and LS2)
Production testing in 20 kbit/s mode
Tested on wafer level only.
17
Timing Diagrams
CSN high to low: DO is enabled. Status information transferred to output shift register
CSN
time
CSN low to high: data from shift register is transferred to output functions
CLK
time
Actual data
DI
FI
-
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
New data
FI
DI: will accept data on the falling edge of CLK signal
Previous status
DO
FO
-
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
- - - - - - - - - - - - - - - -
0 1
+ +
time
Actual status
FO
0
1
time
DO: will change state on the rising edge of CLK signal
e.g. HS switch
Old data
Actual data
time
Figure 13
Data Sheet
SPI-Data Transfer Timing
45
Rev. 3.01, 2008-04-15
TLE7810G
Timing Diagrams
Figure 14
SPI-Input Timing
tWD
tCWmax
tCWmin
closed window
tOWmax
tOWmin
open window
t / [tWDPER]
safe
trigger
area
Figure 15
Data Sheet
Watchdog Time-Out Definitions
46
Rev. 3.01, 2008-04-15
TLE7810G
Timing Diagrams
tCW
tCW
WD
Trigger
tCW
tOW
tOW
tCW +tOW
tOW
tLW
tLW
tLW
tCW
tCW
tOW
t RDx
Reset
Out
t
Watchdog
timer reset
t
normal
operation
Figure 16
timeout
(too long)
normal
operation
timeout
(too short)
normal
operation
Watchdog Timing Diagram
VCC
VRTx
t < tRR
tRD1
WD
Trigger
tLW
t LW
tCW
t OW
tLW
tCW
t
t
tRR
tRDx
Reset
Out
tRDx
t
Watchdog
timer reset
start up
normal operation
undervoltage
start up
t
Figure 17
Data Sheet
Reset Timing Diagram
47
Rev. 3.01, 2008-04-15
TLE7810G
Timing Diagrams
VCC
VTxD
GND
td(L),T
t
t d(H),T
VS
Vbus
Vbus,rd
Vbus,dr
GND
t
t d(H),R
td(L),R
VCC
0.7*VCC
VRxD
0.3*VCC
GND
t d(L),TR
Figure 18
Data Sheet
td(H),TR
t
LIN Dynamic Characteristics Timing Diagram
48
Rev. 3.01, 2008-04-15
TLE7810G
Application Information
18
Application Information
18.1
Application Diagram
Note: The following information is given as a hint for the implementation of the device only and shall not be
regarded as a description or warranty of a certain functionality, condition or quality of the device
LIN
GND
LIN
GND
MON1
MON2
1k
MON3
VBAT_SENSE
MON4
>1k
>1k
>1k
>1k
VS
VBAT
10uF
MON5/HS_LED
LS 1
M
TLE7810G
220nF
VDDC
100nF
VCC
LS 2
VDDP
Logic Level FET
e.g. IPD15No6S2L-64
1uF
PWM
SUPPLY
Double Hall
Sensor
e.g. TLE4966
Figure 19
Speed
Direction
CCPOS0
CCPOS1
Application Diagram
Note: This is a very simplified example of an application circuit. The function must be verified in the real application.
Note: For inverse-polarity protection / protection against ISO pulses the diode and the 10µF capacitor is required.
18.2
•
•
•
Hints for Unused Pins
SUPPLY: connect to VS
MON1/2/3/4: connect to GND or leave open
MON5/HS-LED, LIN: leave open
Data Sheet
49
Rev. 3.01, 2008-04-15
TLE7810G
Application Information
18.3
Flash Program Mode via LIN-Fast-Mode
For flash programming the transmission rate of the integrated LIN transceiver can be changed to maximum
115 kBaud via SPI command. A dedicated BROM routine of the XC866 takes care of periodically servicing the
watchdog during this LIN-Fast-Mode. Further details are available in the XC866 User’s Manual.
MSB
LSB
Input Data 15 14 13 12 11 10
9
8
7
6
5
4
3
2
1
0
LIN FLASH mode on
1
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
LIN FLASH mode off
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
Figure 20
LIN Flash mode SPI command
18.4
Thermal Resistance
TJ = TA + (PD × RthJA)
•
•
•
•
•
•
(8)
TJ = Junction temperature [°C]
TA = Ambient temperature [°C]
PD = Total chip power dissipation [W]
PINT = Chip internal power dissipation [W]
PIO = Power dissipation caused by I/O currents [W]
RthJA = Package thermal resistance [K/W]; junction-ambient
The total power dissipation can be calculated from:
PD = PINT + PIO
18.5
(9)
ESD Tests
Tests for ESD robustness according to IEC61000-4-2 “gun test” (150pF, 330Ω) have been performed. The results
and test condition are available in a test report.
Table 15
ESD “GUN test”
Performed Test
ESD at pin LIN, VS, MON4 versus GND
ESD at pin LIN, VS, MON4 versus GND
Result
≥ +8
≤ -8
Unit
Remarks
kV
1)
kV
1)
Positive pulse
Negative pulse
1) ESD susceptibility “ESD GUN” according LIN EMC 1.3 Test Specification, Section 4.3. (IEC 61000-4-2) -Tested by external
test house (IBEE Zwickau, EMC Test report Nr. ).
Data Sheet
50
Rev. 3.01, 2008-04-15
TLE7810G
Package Outlines
1.27
0.1
0.35 +0.15 2)
1
8˚ MAX.
7.6 -0.2 1)
0.4 +0.8
10.3 ±0.3
0.2 28x
28
0.35 x 45˚
0.23 +0.09
2.65 MAX.
2.45 -0.2
Package Outlines
0.2 -0.1
19
15
18.1 -0.4
1)
14
Index Marking
1)
2)
Does not include plastic or metal protrusion of 0.15 max. per side
Does not include dambar protrusion of 0.05 max. per side
GPS05123
Figure 21
PG-DSO-28-21 (Plastic Dual Small Outline Package)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
For further information on alternative packages, please visit our website:
http://www.infineon.com/packages.
Data Sheet
51
Dimensions in mm
Rev. 3.01, 2008-04-15
TLE7810G
Revision History
20
Revision History
Revision
Date
Changes
3.01
2008-04-15
Chapter 16.3 Thermal Resistance
- corrected RthJSP (16.3.1)
3.00
2008-04-04
Initial datasheet version
Data Sheet
52
Rev. 3.01, 2008-04-15
Edition 2008-04-15
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2008 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
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