advertisement
CYBLE-022001-00
EZ-BLE
TM
PRoC
TM
Module
General Description
The Cypress CYBLE-022001-00 is a fully certified and qualified module supporting Bluetooth
Low Energy (BLE) wireless communication. The CYBLE-022001-00 is a turnkey solution and includes onboard crystal oscillators, chip antenna, passive components, and Cypress PRoC™ BLE. Refer to the
CYBL10X6X datasheet for additional details on the capabilities of the PRoC BLE device used on this module.
The CYBLE-022001-00 supports a number of peripheral functions (ADC, timers, counters, PWM) and serial communication protocols (I
2
C, UART, SPI) through its programmable architecture. The CYBLE-022001-00 includes a royalty-free BLE stack compatible with Bluetooth 4.1 and provides up to 16 GPIOs in a small 10 × 10 × 1.80 mm package.
The CYBLE-022001-00 is a complete solution and an ideal fit for applications requiring BLE wireless connectivity.
Module Description
■
Module size: 10.0 mm ×10.0 mm × 1.80 mm (with shield)
■
Bluetooth 4.1 single-mode module
■
Industrial temperature range: –40 °C to +85 °C
■
32-bit processor (0.9 DMIPS/MHz) with single-cycle 32-bit multiply, operating at up to 48 MHz
■
128-KB flash memory, 16-KB SRAM memory
■
Watchdog timer with dedicated internal low-speed oscillator
(ILO)
■
Two-pin SWD for programming
■
Up to 16 GPIOs configurable as open drain high/low, pull-up/pull-down, HI-Z analog, HI-Z digital, or strong output
■
Certified to FCC, CE MIC, KC, and IC regulations
❐
❐
❐
❐
FCC ID: WAP2001
IC ID: 7922A-2001
MIC ID: 005-101007
KC ID: MSIP-CRM-Cyp-2001
■
Bluetooth SIG 4.1 qualified
❐
❐
QDID: 67366
Declaration ID: D026297
Power Consumption
■
TX output power: –18 dbm to +3 dbm
■
Received signal strength indicator (RSSI) with 1-dB resolution
■
TX current consumption of 15.6 mA (radio only, 0 dbm)
■
RX current consumption of 16.4 mA (radio only)
■
❐
❐
❐
Low power mode support
Deep Sleep: 1.3 µA with watch crystal oscillator (WCO) on
Hibernate: 150 nA with SRAM retention
Stop: 60 nA with XRES wakeup
Functional Capabilities
■
Up to 15 capacitive sensors for buttons or sliders with best-in-class signal-to-noise ratio (SNR) and liquid tolerance
■
12-bit, 1-Msps SAR ADC with internal reference, sample-and-hold (S/H), and channel sequencer
■
Two serial communication blocks (SCBs) supporting I
2
(master/slave), SPI (master/slave), or UART
C
■
Four dedicated 16-bit timer, counter, or PWM blocks
(TCPWMs)
■
Programmable low voltage detect (LVD) from 1.8 V to 4.5 V
■
I
2
S master interface
■
Bluetooth Low Energy protocol stack supporting generic access profile (GAP) Central, Peripheral, Observer, or
Broadcaster roles
■
Switches between Central and Peripheral roles on-the-go
■
Standard Bluetooth Low Energy profiles and services for interoperability
■
Custom profile and service for specific use cases
Benefits
The CYBLE-022001-00 module is provided as a turnkey solution, including all necessary hardware required to use BLE communication standards.
■
Proven, qualified, and certified hardware design ready to use
■
Small footprint (10 × 10 mm × 1.80 mm), perfect for space constrained applications
■
Reprogrammable architecture
■
Fully certified module eliminates the time needed for design, development and certification processes
■
Bluetooth SIG qualified with QDID and Declaration ID
■
Flexible communication protocol support
■
PSoC Creator™ provides an easy-to-use integrated design environment (IDE) to configure, develop, program, and test a
BLE application
Cypress Semiconductor Corporation
Document Number: 001-95662 Rev. *E
198 Champion Court San Jose
,
CA 95134-1709 408-943-2600
Revised February 23, 2016
CYBLE-022001-00
More Information
Cypress provides a wealth of data at www.cypress.com
to help you to select the right module for your design, and to help you to quickly and effectively integrate the module into your design.
■
Overview: EZ-BLE Module Portfolio , Module Roadmap
■
EZ-BLE PRoC Product Overview
■
PRoC BLE Silicon Datasheet
■
❐
❐
❐
❐
❐
❐
❐
❐
Application notes: Cypress offers a number of BLE application notes covering a broad range of topics, from basic to advanced level. Recommended application notes for getting started with
EZ-BLE modules are:
❐
AN96841 - Getting Started with EZ-BLE Module
AN94020 - Getting Started with PRoC BLE
AN97060 - PSoC
®
4 BLE and PRoC™ BLE - Over-The-Air
(OTA) Device Firmware Upgrade (DFU) Guide
AN91162 - Creating a BLE Custom Profile
AN91184 - PSoC 4 BLE - Designing BLE Applications
AN92584 - Designing for Low Power and Estimating Battery
Life for BLE Applications
AN85951 - PSoC
®
4 CapSense
®
Design Guide
AN95089 - PSoC
®
4/PRoC™ BLE Crystal Oscillator Selection and Tuning Techniques
AN91445 - Antenna Design and RF Layout Guidelines
■
■
Knowledge Base Articles
❐
KBA97279 - Pin Mapping Differences Between the
EZ-BLE™ PRoC™ Evaluation Board (CY-
BLE-022001-EVAL) and the BLE Pioneer Kit
(CY8CKIT-042-BLE)
❐
KBA97094 - RF Regulatory Certifications for EZ-BLE™
PRoC™ Module
KBA97095 - EZ-BLE™ Module Placement
❐
Technical Reference Manual (TRM):
❐
PRoC
®
BLE Technical Reference Manual
■
❐
❐
Development Kits:
❐
CYBLE-022001-EVAL , CYBLE-022001-00 Evaluation Board
CY8CKIT-042-BLE , Bluetooth
Kit
CY8CKIT-002 , PSoC
®
®
Low Energy (BLE) Pioneer
MiniProg3 Program and Debug Kit
■
Test and Debug Tools:
❐
CYSmart , Bluetooth
®
❐
LE Test and Debug Tool (Windows)
CYSmart Mobile , Bluetooth
(Android/iOS Mobile App)
®
LE Test and Debug Tool
PSoC
®
Creator
™ Integrated Design Environment (IDE)
PSoC Creator is an Integrated Design Environment (IDE) that enables concurrent hardware and firmware editing, compiling and debugging of PSoC 3, PSoC 4, PSoC 5LP, PSoC 4 BLE, PRoC BLE and EZ-BLE module systems with no code size limitations. PSoC peripherals are designed using schematic capture and simple graphical user interface (GUI) with over 120 pre-verified, production-ready PSoC Components™.
PSoC Components are analog and digital “virtual chips,” represented by an icon that users can drag-and-drop into a design and configure to suit a broad array of application requirements.
Bluetooth Low Energy Component
The Bluetooth Low Energy Component inside PSoC Creator provides a comprehensive GUI-based configuration window that lets you quickly design BLE applications. The Component incorporates a Bluetooth Core Specification v4.1 compliant BLE protocol stack and provides API functions to enable user applications to interface with the underlying Bluetooth Low Energy Sub-System (BLESS) hardware via the stack.
Technical Support
■
Frequently Asked Questions (FAQs) : Learn more about our BLE ECO System.
■
Forum : See if your question is already answered by fellow developers on the PSoC 4 BLE and PRoC BLE forums.
■
Visit our support page and create a technical support case or contact a local sales representatives . If you are in the United States, you can talk to our technical support team by calling our toll-free number: +1-800-541-4736. Select option 2 at the prompt.
Document Number: 001-95662 Rev. *E Page 2 of 38
CYBLE-022001-00
Contents
Overview............................................................................ 4
Module Description...................................................... 4
Pad Connection Interface ................................................ 6
Recommended Host PCB Layout ................................... 7
Power Supply Connections and Recommended External
Components.................................................................... 10
Power Connections ................................................... 10
Connection Options................................................... 10
External Component Recommendation .................... 10
Critical Components List ........................................... 12
Antenna Design......................................................... 12
Electrical Specification .................................................. 13
GPIO ......................................................................... 15
XRES......................................................................... 16
Digital Peripherals ..................................................... 19
Serial Communication ............................................... 21
Memory ..................................................................... 22
System Resources .................................................... 22
Environmental Specifications ....................................... 28
Environmental Compliance ....................................... 28
RF Certification.......................................................... 28
Environmental Conditions ......................................... 28
ESD and EMI Protection ........................................... 28
Regulatory Information .................................................. 29
FCC ........................................................................... 29
Industry Canada (IC) Certification ............................. 30
European R&TTE Declaration of Conformity ............ 30
MIC Japan ................................................................. 31
KC Korea................................................................... 31
Packaging........................................................................ 32
Ordering Information...................................................... 34
Part Numbering Convention ...................................... 34
Document Conventions ............................................. 35
Document History Page ................................................. 36
Sales, Solutions, and Legal Information ...................... 38
Worldwide Sales and Design Support....................... 38
Products .................................................................... 38
PSoC® Solutions ...................................................... 38
Cypress Developer Community................................. 38
Technical Support ..................................................... 38
Document Number: 001-95662 Rev. *E Page 3 of 38
CYBLE-022001-00
Overview
Module Description
The CYBLE-022001-00 module is a complete module designed to be soldered to the applications main board.
Module Dimensions and Drawing
Cypress reserves the right to select components (including the appropriate BLE device) from various vendors to achieve the BLE module functionality. Such selections will still guarantee that all height restrictions of the component area are maintained. Designs
Table 1. Module Design Dimensions
Dimension Item Specification
Module dimensions
Antenna location dimensions
Length (X) 10.00 ± 0.15 mm
Width (Y) 10.00 ± 0.15 mm
Length (X) 7.00 ± 0.15 mm
Width (Y) 5.00 ± 0.15 mm
PCB thickness
Shield height
Height (H) 0.50 ± 0.10 mm
Height (H) 1.10 ± 0.10 mm
Maximum component height Height (H) 1.30 mm typical (chip antenna)
Total module thickness (bottom of module to highest component) Height (H) 1.80 mm typical
See
Figure 1 on page 5 for the mechanical reference drawing for CYBLE-022001-00.
Document Number: 001-95662 Rev. *E Page 4 of 38
Figure 1. Module Mechanical Drawing
CYBLE-022001-00
Top View (See from Top)
Side View
Bottom View (Seen from Bottom)
Note
1. No metal should be located beneath or above the antenna area. Only bare PCB material should be located beneath the antenna area. For more information on recommended host PCB layout, see
“Recommended Host PCB Layout” on page 7.
Document Number: 001-95662 Rev. *E Page 5 of 38
CYBLE-022001-00
Pad Connection Interface
As shown in the bottom view of
Figure 1 on page 5, the CYBLE-022001-00 connects to the host board via solder pads on the back
of the module. Table 2 and Figure 2
detail the solder pad length, width, and pitch dimensions of the CYBLE-022001-00 module.
Table 2. Solder Pad Connection Description
Name Connections Connection Type
SP 21 Solder Pads
Pad Length Dimension
0.71 mm
Pad Width Dimension
0.41 mm
Pad Pitch
0.76 mm
Figure 2. Solder Pad Dimensions (Seen from Bottom)
To maximize RF performance, the host layout should follow these recommendations:
1. The ideal placement of the Cypress BLE module is in a corner of the host board with the chip antenna located at the far corner.
This placement minimizes the additional recommended keep out area stated in item 2. Please refer to AN96841 for module placement best practices.
2. To maximize RF performance, the area immediately around the Cypress BLE module chip antenna should contain an additional keep out area, where no grounding or signal traces are contained. The keep out area applies to all layers of the host board. The
recommended dimensions of the host PCB keep out area are shown in Figure 3 (dimensions are in mm).
Figure 3. Recommended Host PCB Keep Out Area Around the CYBLE-022001-00 Chip Antenna
Document Number: 001-95662 Rev. *E
Host PCB Keep Out Area Around Chip Antenna
Page 6 of 38
CYBLE-022001-00
Recommended Host PCB Layout
CYBLE-022001-00. Dimensions are in millimeters unless otherwise noted. Pad length of 0.91 mm (0.455 mm from center of the pad on either side) shown in
is the minimum recommended host pad length. The host PCB layout pattern can be completed using either
Figure 6 . It is not necessary to use all figures to complete the host PCB layout pattern.
Figure 4. Host Layout Pattern for CYBLE-022001-00 Figure 5. Module Pad Location from Origin
Top View (On Host PCB)
Top View (On Host PCB)
Document Number: 001-95662 Rev. *E Page 7 of 38
CYBLE-022001-00
Table 3. Module Solder Pad Location Figure 6. Solder Pad Reference Location
Solder Pad
(Center of Pad)
1
2
5
6
3
4
11
12
13
14
7
8
9
10
19
20
21
15
16
17
18
Location (X,Y) from
Origin (mm)
(0.26, 1.64)
(0.26, 2.41)
(0.26, 3.17)
(0.26, 3.93)
(0.26, 4.69)
(0.81, 9.74)
(1.57, 9.74)
(2.34, 9.74)
(3.10, 9.74)
(3.86, 9.74)
(4.62, 9.74)
(5.38, 9.74)
(6.15, 9.74)
(6.91, 9.74)
(7.67, 9.74)
(8.43, 9.74)
(9.19, 9.74)
(9.75, 8.50)
(9.75, 7.74)
(9.75, 6.98)
(9.75, 6.22)
Dimension from
Origin (mils)
(10.24, 64.57)
(10.24, 94.88)
(10.24, 124.80)
(10.24, 154.72)
(10.24, 184.65)
(31.89, 383.46)
(61.81, 383.46)
(92.13, 383.46)
(122.05, 383.46)
(151.97, 383.46)
(181.89, 383.46)
(211.81, 383.46)
(242.13, 383.46)
(272.05, 383.46)
(301.97, 383.46)
(331.89, 383.46)
(361.81, 383.46)
(383.86, 334.65)
(383.86, 304.72)
(383.86, 274.80)
(383.86, 244.88)
Document Number: 001-95662 Rev. *E Page 8 of 38
CYBLE-022001-00
Table 4 details the solder pad connection definitions and available functions for each connection pad. Table 4 lists the solder pads on
CYBLE-022001-00, the BLE device port-pin, and denotes whether the function shown is available for each solder pad. Each connection is configurable for a single option shown with a
✓
.
Table 4. Solder Pad Connection Definitions
Solder Pad
Number
1
2
Device
Port Pin
GND
P4.1
16
17
18
19
12
13
14
15
20
21
3
4
5
6
7
10
11
8
9
P5.1
P5.0
V
DDR
P1.6
P0.7
P0.4
P0.5
GND
P0.6
P1.7
V
DD
XRES
P3.5
P3.4
P3.7
P1.4
P1.5
P3.6
P4.0
UART SPI I
2
C TCPWM
Cap-
Sense
✓
(SCB1_CTS)
✓
(SCB1_MISO)
Ground Connection
✓
(TCPWM0_N)
✓
(Sensor/
C
TANK
)
✓
(SCB1_TX)
✓
(SCB1_SCLK)
✓
(SCB1_SCL)
✓
(TCPWM3_N)
✓
(Sensor)
✓
(SCB1_RX)
✓
(SCB1_SS0)
✓
(SCB1_SDA)
✓
(TCPWM3_P)
✓
(Sensor)
✓
✓
(SCB0_RTS)
(SCB0_CTS)
✓
✓
(SCB0_SS0)
(SCB0_SCLK)
Radio Power Supply (1.9V to 5.5V)
✓
(TCPWM3_P)
✓
(Sensor)
✓
(TCPWM2_N)
✓
(Sensor)
WCO
Out
ECO
Out LCD
✓
✓ ✓
✓
✓
✓
SWD
✓
(SWDCLK)
✓
(SCB0_RX)
✓
(SCB0_MOSI)
✓
(SCB0_SDA)
✓
(TCPWM1_P)
✓
(Sensor)
✓
(SCB0_TX)
✓
(SCB0_MISO)
✓
(SCB0_SCL)
✓
(TCPWM1_N)
✓
(Sensor)
Ground Connection
✓
(SCB0_RTS)
✓
(SCB0_SS0)
✓
(TCPWM2_P)
✓
(Sensor)
✓ ✓
✓
✓ ✓
(SWDIO)
✓
(SCB0_CTS)
✓
(SCB0_SCLK)
✓
(TCPWM3_N)
✓
(Sensor)
Digital Power Supply Input (1.71 to 5.5V)
✓
(SCB1_TX)
✓
(SCB1_RX)
✓
(SCB1_CTS)
External Reset Hardware Connection Input
✓
✓
(SCB1_SCL)
(SCB1_SDA)
✓
✓
✓
(TCPWM2_N)
(TCPWM2_P)
(TCPWM3_N)
✓
✓
✓
(Sensor)
(Sensor)
(Sensor)
✓
(SCB0_RX)
✓
(SCB0_MOSI)
✓
(SCB0_SDA)
✓
(TCPWM2_P)
✓
(Sensor)
✓
✓
(SCB0_TX)
✓
(SCB0_MISO)
✓
(SCB0_SCL)
✓
(TCPWM2_N)
✓
(Sensor)
✓
(SCB1_RTS)
✓
(SCB1_RTS)
✓
(SCB1_MOSI)
✓
(TCPWM3_P)
✓
(Sensor)
✓
(TCPWM0_P)
✓
(C
MOD
)
✓
✓
✓
✓
✓
✓
✓
✓
GPIO
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
✓
Notes
2. TCPWM stands for timer, counter, and PWM. If supported, the pad can be configured to any of these peripheral functions.
3. The main board needs to connect both GND connections (Pad 1 and Pad 10) on the module to the common ground of the system.
4. When using the capacitive sensing functionality, Pad 2 (P4.1) can be connected to a C
TANK
capacitor (located off of Cypress BLE Module). C
Tank
should be used if implementing a shield layer on the capacitive sensor. If used, this capacitor should be placed as close to the module as possible.
5. When using the capacitive sensing functionality, Pad 21 (P4.0) must be connected to a C
MOD
capacitor (located off of Cypress BLE Module). The value of this capacitor is 2.2 nF and should be placed as close to the module as possible.
6. If the I
2
S feature is used in the design, the I
2
S pins shall be dynamically routed to the appropriate available GPIO by PSoC Creator
Document Number: 001-95662 Rev. *E Page 9 of 38
CYBLE-022001-00
Power Supply Connections and Recommended External Components
Power Connections
The CYBLE-022001-00 contains two power supply connections,
VDD and VDDR. The VDD connection supplies power for both digital and analog device operation. The VDDR connection supplies power for the device radio.
VDD accepts a supply range of 1.71 V to 5.5 V. VDDR accepts a supply range of 1.9 V to 5.5 V. These specifications can be found in
. The maximum power supply ripple for both power connections on the module is 100 mV, as shown in
The power supply ramp rate of VDD must be equal to or greater than that of VDDR.
External Component Recommendation
In either connection scenario, it is recommended to place an external ferrite bead between the supply and the module connection. The ferrite bead should be positioned as close as possible to the module pin connection.
Figure 7 details the recommended host schematic options for a
single supply scenario. The use of one or two ferrite beads will depend on the specific application and configuration of the
CYBLE-022001-00.
Figure 8 details the recommended host schematic for an
independent supply scenario.
The recommended ferrite bead value is 330
, 100 MHz. (Murata
BLM21PG331SN1D).
Connection Options
Two connection options are available for any application:
1. Single supply: Connect VDD and VDDR to the same supply.
2. Independent supply: Power VDD and VDDR separately.
Figure 7. Recommended Host Schematic Options for a Single Supply Option
Single Ferrite Bead Option
Two Ferrite Bead Option
Figure 8. Recommended Host Schematic for an Independent Supply Option
Document Number: 001-95662 Rev. *E Page 10 of 38
The CYBLE-022001-00 schematic is shown in
.
Figure 9. CYBLE-022001-00 Schematic Diagram
CYBLE-022001-00
Document Number: 001-95662 Rev. *E Page 11 of 38
CYBLE-022001-00
Critical Components List
Table 5 details the critical components used in the CYBLE-022001-00 module.
Table 5. Critical Component List
Silicon
Crystal
Crystal
Antenna
Component Reference Designator
U1
Y1
Y2
E1
Description
68-pin WLCSP Programmable Radio-on-Chip (PRoC) with BLE
24.000 MHz, 10PF
32.768 kHz, 12.5PF
2.4 – 2.5 GHz chip antenna
Antenna Design
datasheet. The Cypress module performance improves many of these characteristics. For more information, see
.
Table 6. Chip Antenna Specifications
Item
Chip Antenna Manufacturer
Chip Antenna Part Number
Frequency Range
Peak Gain
Average Gain
Return Loss
Johanson Technology Inc.
2450AT18B100
2400 – 2500 MHz
0.5 dBi typical
-0.5 dBi typical
9.5 dB minimum
Description
Document Number: 001-95662 Rev. *E Page 12 of 38
CYBLE-022001-00
Electrical Specification
Table 7 details the absolute maximum electrical characteristics for the Cypress BLE module.
Table 7. CYBLE-022001-00 Absolute Maximum Ratings
Parameter
V
DDD_ABS
V
CCD_ABS
V
DDD_RIPPLE
V
GPIO_ABS
I
GPIO_ABS
I
GPIO_injection
LU
Description
Analog, digital, or radio supply relative to V
(V
SSD
= V
SSA
)
SS
Direct digital core voltage input relative to V
SSD
Maximum power supply ripple for V input voltage
DD
and V
DDR
GPIO voltage
Maximum current per GPIO
GPIO injection current: Maximum for V
IH and minimum for V
IL
< V
SS
> V
DD
Pin current for latch up
Min
–0.5
–0.5
–
–0.5
–25
–0.5
–200
Typ
–
–
–
–
–
–
Max Units
6
Details/Conditions
V Absolute maximum
1.95
100
V Absolute maximum mV
3.0V supply
Ripple frequency of 100 kHz to 750 kHz
V
DD
+0.5
V Absolute maximum
25 mA Absolute maximum
0.5
200 mA mA
Absolute maximum current injected per pin
–
Table 8 details the RF characteristics for the Cypress BLE module.
Table 8. CYBLE-022001-00 RF Performance Characteristics
Parameter Description Min
RF
O
RX
S
F
R
G
P
G
Avg
RL
RF output power on ANT
RF receive sensitivity on ANT
Module frequency range
Peak gain
Average gain
Return loss
–18
–
2400
–
–
–
Typ
0
–87
–
0.5
–0.5
–10.5
Max Units
3
– dBm
2480 MHz
–
–
– dBi dBi dB
Details/Conditions
Guaranteed by design simulation
–
–
–
–
list the module level electrical characteristics for the CYBLE-022001-00. All specifications are valid for –40
°C
TA 85 °C and TJ 100 °C, except where noted. Specifications are valid for 1.71 V to 5.5 V, except where noted.
Table 9. CYBLE-022001-00 DC Specifications
V
V
Parameter
DD1
DD2
V
DDR1
V
DDR2
Description
Power supply input voltage
Power supply input voltage unregulated
Radio supply voltage (radio on)
Radio supply voltage (radio off)
Active Mode, V
DD
= 1.71 V to 5.5 V
Min
1.8
1.71
1.9
1.71
Typ
–
1.8
–
–
Max
5.5
1.89
5.5
5.5
Units
V
V
V
V
Details/Conditions
With regulator enabled
Internally unregulated supply
–
–
I
DD3
I
DD4
Execute from flash; CPU at 3 MHz
Execute from flash; CPU at 3 MHz
–
–
1.7
–
–
–
V
DD
= 3.3 V mA T = –40 °C to 85 °C
Execute from flash; CPU at 6 MHz – 2.5
– I
DD5
I
DD6
I
DD7
Execute from flash; CPU at 6 MHz
Execute from flash; CPU at 12 MHz
–
–
–
4
–
–
V
DD
= 3.3 V mA T = –40 °C to 85 °C
V
DD
= 3.3 V
Document Number: 001-95662 Rev. *E Page 13 of 38
CYBLE-022001-00
Table 9. CYBLE-022001-00 DC Specifications (continued)
I
Parameter
DD8
Description
Execute from flash; CPU at 12 MHz
I
DD9
Execute from flash; CPU at 24 MHz
I
DD10
I
DD11
Execute from flash; CPU at 24 MHz
Execute from flash; CPU at 48 MHz
I
DD12
Execute from flash; CPU at 48 MHz
Sleep Mode, V
DD
= 1.8 to 5.5 V
I
DD13
IMO on
Sleep Mode, V
DD
and V
DDR
= 1.9 to 5.5 V
I
DD14
ECO on
Deep-Sleep Mode, V
DD
= 1.8 to 3.6 V
I
DD15
WDT with WCO on
I
DD16
I
DD17
WDT with WCO on
WDT with WCO on
I
I
DD18
Deep-Sleep Mode, V
DD
= 1.71 to 1.89 V (Regulator Bypassed)
DD19
I
DD20
WDT with WCO on
WDT with WCO on
WDT with WCO on
Hibernate Mode, V
DD
= 1.8 to 3.6 V
I
DD27
GPIO and reset active
I
DD28
GPIO and reset active
Hibernate Mode, V
DD
= 3.6 to 5.5 V
I
DD29
GPIO and reset active
I
DD30
GPIO and reset active
Stop Mode, V
DD
= 1.8 to 3.6 V
I
DD33
Stop-mode current (V
DD
)
Min
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
I
DD34
I
DD35
I
DD36
Stop-mode current (V
DDR
)
Stop-mode current (V
DD
)
Stop-mode current (V
DDR
)
Stop Mode, V
DD
= 3.6 to 5.5 V
I
DD37
Stop-mode current (V
DD
)
I
DD38
I
DD39
I
DD40
Stop-mode current (V
DDR
)
Stop-mode current (V
DD
)
Stop-mode current (V
DDR
)
–
–
–
–
–
–
–
Typ
–
7.1
–
13.4
–
–
–
150
–
–
–
–
–
–
–
20
40
–
–
1.5
–
–
–
–
–
–
–
–
Max
–
–
Units Details/Conditions
mA T = –40 °C to 85 °C mA
T = 25 °C,
V
DD
= 3.3 V mA T = –40 °C to 85 °C
V
DD
= 3.3 V mA T = –40 °C to 85 °C
– mA
T = 25 °C, V
DD
= 3.3 V,
SYSCLK = 3 MHz
–
–
–
–
–
–
– mA T = 25 °C, V
DD
= 3.3 V,
SYSCLK = 3 MHz
µA
T = 25 °C,
V
DD
= 3.3 V
µA T = –40 °C to 85 °C
µA
T = 25 °C,
V
DD
= 5 V
µA T = –40 °C to 85 °C
µA T = 25 °C
µA T = –40 °C to 85 °C
–
–
–
– nA
T = 25 °C,
V
DD
= 3.3 V nA T = –40 °C to 85 °C nA
T = 25 °C,
V
DD
= 5 V nA T = –40 °C to 85 °C
–
–
–
–
–
– nA
–- nA
T = 25 °C,
V
DD
= 3.3 V
T = 25 °C,
V
DDR
= 3.3 V nA T = –40 °C to 85 °C
– nA
T = –40 °C to 85 °C,
V
DDR
= 1.9 V to 3.6 V nA nA
T = 25 °C,
V
DD
= 5 V
T = 25 °C,
V
DDR
= 5 V nA T = –40 °C to 85 °C nA T = –40 °C to 85 °C
Document Number: 001-95662 Rev. *E Page 14 of 38
CYBLE-022001-00
Table 10. AC Specifications
Parameter
F
CPU
T
SLEEP
Description
CPU frequency
Wakeup from Sleep mode
T
DEEPSLEEP
T
HIBERNATE
T
STOP
Wakeup from Deep-Sleep mode
Wakeup from Hibernate mode
Wakeup from Stop mode
Min
DC
–
–
–
–
Typ
–
0
–
–
–
Max
48
–
25
2
2
Units Details/Conditions
MHz 1.71 V
V
DD
5.5 V
µs Guaranteed by characterization
µs
24-MHz IMO. Guaranteed by characterization ms Guaranteed by characterization ms XRES wakeup
GPIO
Table 11. GPIO DC Specifications
Parameter
V
IH
V
IL
V
OH
V
OL
R
PULLUP
R
PULLDOWN
I
IL
I
IL_CTBM
C
IN
V
HYSTTL
V
HYSCMOS
I
DIODE
I
TOT_GPIO
Description
Input voltage HIGH threshold
LVTTL input, V
DD
< 2.7 V
LVTTL input, V
DD
>= 2.7 V
Input voltage LOW threshold
LVTTL input, V
DD
< 2.7 V
LVTTL input, V
DD
>= 2.7 V
Output voltage HIGH level
Output voltage HIGH level
Output voltage LOW level
Output voltage LOW level
Output voltage LOW level
Pull-up resistor
Pull-down resistor
Input leakage current (absolute value)
Input leakage on CTBm input pins
Input capacitance
Input hysteresis LVTTL
Input hysteresis CMOS
Current through protection diode to
V
DD
/V
SS
Maximum total source or sink chip current
Min
0.7 × V
DD
0.7 × V
DD
2.0
–
–
–
Typ Max
– –
– –
– –
– 0.3 × V
DD
– 0.3× V
DD
– 0.8
Units
V
V
V
V
V
V
Details/Conditions
CMOS input
–
–
–
–
V
DD
–0.6 – – V
V
DD
–0.5
– – V
– – 0.6
V
–
–
3.5
3.5
–
–
–
25
0.05 × V
DD
–
–
5.6
5.6
–
–
–
40
0.6
0.4
8.5
8.5
2
4
7
–
V
I
OH
= 4 mA at 3.3-V V
DD
I
OH
= 1 mA at 1.8-V V
DD
I
OL
= 8 mA at 3.3-V V
DD
I
OL
= 4 mA at 1.8-V V
DD
I
OL
= 3 mA at 3.3-V V
DD
–
V k
k
– nA 25 °C, V
DD
= 3.3 V nA – pF – mV V
DD
> 2.7 V
– – 1 –
µA mA
–
–
Note
7. V
IH
must not exceed V
DD
+ 0.2 V.
Document Number: 001-95662 Rev. *E Page 15 of 38
CYBLE-022001-00
Table 12. GPIO AC Specifications
F
F
F
F
Parameter
T
RISEF
T
FALLF
T
RISES
T
FALLS
F
GPIOUT1
GPIOUT2
GPIOUT3
GPIOUT4
GPIOIN
Description
Rise time in Fast-Strong mode
Fall time in Fast-Strong mode
Rise time in Slow-Strong mode
Fall time in Slow-Strong mode
GPIO Fout; 3.3 V
V
DD
Fast-Strong mode
5.5 V
GPIO Fout; 1.7 V
V
DD
Fast-Strong mode
3.3 V
GPIO Fout; 3.3 V
V
DD
Slow-Strong mode
5.5 V
GPIO Fout; 1.7 V
V
DD
Slow-Strong mode
3.3 V
GPIO input operating frequency
1.71 V
V
DD
5.5 V
Min
2
2
10
10
–
–
–
–
–
–
–
–
–
Table 13. OVT GPIO DC Specifications (P5_0 and P5_1 Only)
I
IL
V
Parameter
OL
Description
Input leakage (absolute value).
V
IH
> V
DD
Output voltage LOW level
Min
–
–
Typ
–
–
Typ
–
–
–
–
–
Table 14. OVT GPIO AC Specifications (P5_0 and P5_1 Only)
Parameter
T
RISE_OVFS
T
FALL_OVFS
Description
Output rise time in Fast-Strong mode
Output fall time in Fast-Strong mode
Min
1.5
1.5
T
RISESS
Output rise time in Slow-Strong mode 10
Typ
–
–
–
T
F
F
FALLSS
GPIOUT1
GPIOUT2
Output fall time in Slow-Strong mode
GPIO F
OUT
; 3.3 V
V
DD
5.5 V
Fast-Strong mode
GPIO F
OUT
; 1.71 V
V
DD
3.3 V
Fast-Strong mode
10
–
–
–
–
–
XRES
Table 15. XRES DC Specifications
Parameter
V
IH
V
IL
R
PULLUP
C
IN
V
HYSXRES
I
DIODE
Description
Input voltage HIGH threshold
Input voltage LOW threshold
Pull-up resistor
Input capacitance
Input voltage hysteresis
Current through protection diode to
V
DD
/V
SS
Max
12
12
60
60
33
16.7
7
3.5
48
Max
10
0.4
Max
12
12
60
60
24
16
Units
ns ns ns ns
MHz
MHz
MHz
MHz
Details/Conditions
3.3-V V
DDD
, C
LOAD
= 25 pF
3.3-V V
DDD
, C
LOAD
= 25 pF
3.3-V V
DDD
, C
LOAD
= 25 pF
3.3-V V
DDD
, C
LOAD
= 25 pF
90/10%, 25 pF load, 60/40 duty cycle
90/10%, 25 pF load, 60/40 duty cycle
90/10%, 25 pF load, 60/40 duty cycle
90/10%, 25 pF load, 60/40 duty cycle
MHz 90/10% V
IO
Units
µA
V
Details/Conditions
25°C, V
DD
= 0 V, V
IH
= 3.0 V
I
OL
= 20 mA, V
DD
> 2.9 V
Units
ns ns ns ns
MHz
MHz
Details/Conditions
25-pF load, 10%–90%, V
DD
=3.3 V
25-pF load, 10%–90%, V
DD
=3.3 V
25 pF load, 10%-90%,
V
DD
= 3.3 V
25 pF load, 10%-90%,
V
DD
= 3.3 V
90/10%, 25 pF load, 60/40 duty cycle
90/10%, 25 pF load, 60/40 duty cycle
Min
0.7 × V
DDD
–
3.5
–
–
Typ
–
Max
–
– 0.3 × V
DDD
5.6
8.5
3
100
–
–
Units Details/Conditions
V CMOS input
V CMOS input k
pF mV
–
–
–
– – 100 µA –
Document Number: 001-95662 Rev. *E Page 16 of 38
CYBLE-022001-00
Table 16. XRES AC Specifications
T
Parameter
RESETWIDTH
Description
Reset pulse width
Temperature Sensor
Table 17. Temperature Sensor Specifications
Parameter
T
SENSACC
Description
Temperature-sensor accuracy
SAR ADC
Table 18. SAR ADC DC Specifications
Parameter
A_RES
A_CHNIS_S
Resolution
Description
Number of channels - single-ended
A-CHNKS_D Number of channels - differential
A-MONO
A_GAINERR
A_OFFSET
A_ISAR
A_VINS
A_VIND
A_INRES
A_INCAP
VREFSAR
Monotonicity
Gain error
Input offset voltage
Current consumption
Input voltage range - single-ended
Input voltage range - differential
Input resistance
Input capacitance
Trimmed internal reference to SAR
Min
1
Min
–5
Min
–
–
–
–
–
–
–
V
SS
V
SS
–
–
–1
Typ
–
Typ
–
–
–
–
–
–
Max
Typ
±1
–
Units
µs
Max
5
Max
12
8
4
–
±0.1
2
– 1
–
–
– V
DDA
– V
DDA
– 2.2
10
1
Details/Conditions
Units
°C
–
Details/Conditions
–40 to +85 °C
% mV mA
V
V k
pF
%
Units
bits
Details/Conditions
8 full-speed
Diff inputs use neighboring I/O
Yes
With external reference
Measured with 1-V
V
REF
Percentage of Vbg
(1.024 V)
Table 19. SAR ADC AC Specifications
Parameter
A_PSRR
A_CMRR
A_SAMP
Fsarintref
A_SNR
A_BW
A_INL
A_INL
A_INL
Description
Power-supply rejection ratio
Min
70
Typ
–
Max
–
Common-mode rejection ratio
Sample rate
SAR operating speed without external ref. bypass
Signal-to-noise ratio (SNR)
Input bandwidth without aliasing
Integral nonlinearity. V
DD
1 Msps
= 1.71 V to 5.5 V,
Integral nonlinearity. V
DDD
1 Msps
= 1.71 V to 3.6 V,
Integral nonlinearity. V
DD
500 Ksps
= 1.71 V to 5.5 V,
65
–
–1.7
–1.5
–1.5
66
–
– –
–
–
–
1
100
–
–
–
A_SAMP/2
– 2
– 1.7
– 1.7
Units
Details/
Conditions
dB Measured at 1-V reference dB
Msps 806 Ksps for More Part
Numbers devices
Ksps 12-bit dB F kHz
LSB V
LSB V
LSB V
IN
= 10 kHz
REF
REF
REF
= 1 V to V
= 1 V to V
DD
= 1.71 V to V
DD
DD
Document Number: 001-95662 Rev. *E Page 17 of 38
CYBLE-022001-00
Table 19. SAR ADC AC Specifications (continued)
Parameter Description
A_dnl
A_DNL
A_DNL
A_THD
Differential nonlinearity. V
DD
5.5 V, 1 Msps
= 1.71 V to
Differential nonlinearity. V
DD
3.6 V, 1 Msps
= 1.71 V to
Differential nonlinearity. V
DD
5.5 V, 500 Ksps
= 1.71 V to
Total harmonic distortion
CSD
CSD Block Specifications
Parameter
V
CSD
IDAC1
IDAC1
IDAC2
IDAC2
SNR
Description
Voltage range of operation
DNL for 8-bit resolution
INL for 8-bit resolution
DNL for 7-bit resolution
INL for 7-bit resolution
Ratio of counts of finger to noise
Min
–1
–1
–1
–
Min
1.71
–1
–3
–1
–3
5
Typ
–
–
–
–
–
–
Typ
–
Max
2.2
– 2
– 2.2
– –65
Units
Details/
Conditions
LSB V
REF
= 1 V to V
DD
LSB V
REF
= 1.71 V to V
DD
LSB V
REF
= 1 V to V
DD dB F
IN
= 10 kHz
I
I
I
I
DAC1_CRT1
DAC1_CRT2
DAC2_CRT1
DAC2_CRT2
Output current of IDAC1 (8 bits) in High range
Output current of IDAC1 (8 bits) in Low range
Output current of IDAC2 (7 bits) in High range
Output current of IDAC2 (7 bits) in Low range
–
–
–
–
612
306
305
153
–
–
–
–
Max
5.5
1
3
–
1
3
Units
V
LSB
LSB
LSB
LSB
Ratio
Details/
Conditions
Capacitance range of
9 pF to 35 pF, 0.1-pF sensitivity. Radio is not operating during the scan
µA
µA
µA
µA
Document Number: 001-95662 Rev. *E Page 18 of 38
CYBLE-022001-00
Digital Peripherals
Timer
Table 20. Timer DC Specifications
Parameter
I
TIM1
I
TIM2
I
TIM3
Description
Block current consumption at 3 MHz
Block current consumption at 12 MHz
Block current consumption at 48 MHz
Table 21. Timer AC Specifications
Parameter
T
TIMFREQ
T
CAPWINT
T
CAPWEXT
T
TIMRES
T
TENWIDINT
T
TENWIDEXT
T
TIMRESWINT
T
TIMRESEXT
Description
Operating frequency
Capture pulse width (internal)
Capture pulse width (external)
Timer resolution
Enable pulse width (internal)
Enable pulse width (external)
Reset pulse width (internal)
Reset pulse width (external)
Counter
Table 22. Counter DC Specifications
Parameter
I
CTR1
I
CTR2
I
CTR3
Description
Block current consumption at 3 MHz
Block current consumption at 12 MHz
Block current consumption at 48 MHz
Table 23. Counter AC Specifications
Parameter
T
CTRFREQ
T
CTRPWINT
T
CTRPWEXT
T
CTRES
T
CENWIDINT
T
CENWIDEXT
T
CTRRESWINT
T
CTRRESWEXT
Description
Operating frequency
Capture pulse width (internal)
Capture pulse width (external)
Counter Resolution
Enable pulse width (internal)
Enable pulse width (external)
Reset pulse width (internal)
Reset pulse width (external)
Min
–
–
–
Typ
–
–
–
Max
42
130
535
Units Details/Conditions
µA 16-bit timer
µA 16-bit timer
µA 16-bit timer
Min
F
CLK
2 × T
CLK
2 × T
CLK
T
CLK
2 × T
CLK
2 × T
CLK
2 × T
CLK
2 × T
CLK
–
–
–
Typ
–
–
–
–
–
Max
48
–
–
–
–
–
–
–
Units
MHz ns ns ns ns ns ns ns
Details/Conditions
Min
–
–
–
Typ
–
–
–
Max
42
130
535
Units Details/Conditions
µA
16-bit counter
µA 16-bit counter
µA 16-bit counter
Min
F
CLK
2 × T
CLK
2 × T
CLK
T
CLK
2 × T
CLK
2 × T
CLK
2 × T
CLK
2 × T
CLK
–
–
–
–
–
Typ
–
–
–
–
–
–
–
–
Max
48
–
–
Units
MHz ns ns ns ns ns ns ns
Details/Conditions
Document Number: 001-95662 Rev. *E Page 19 of 38
CYBLE-022001-00
Pulse Width Modulation (PWM)
Table 24. PWM DC Specifications
Parameter
I
PWM1
I
PWM2
I
PWM3
Description
Block current consumption at 3 MHz
Block current consumption at 12 MHz
Block current consumption at 48 MHz
Table 25. PWM AC Specifications
Parameter
T
PWMFREQ
T
PWMPWINT
T
PWMEXT
T
PWMKILLINT
T
PWMKILLEXT
T
PWMEINT
T
PWMENEXT
T
PWMRESWINT
T
PWMRESWEXT
Description
Operating frequency
Pulse width (internal)
Pulse width (external)
Kill pulse width (internal)
Kill pulse width (external)
Enable pulse width (internal)
Enable pulse width (external)
Reset pulse width (internal)
Reset pulse width (external)
LCD Direct Drive
Table 26. LCD Direct Drive DC Specifications
Parameter
I
LCDLOW
Description
Operating current in low-power mode
I
I
C
LCDCAP
LCD
OFFSET
LCDOP1
LCDOP2
LCD capacitance per segment/common driver
Long-term segment offset
LCD system operating current
V
BIAS
= 5 V
LCD system operating current
V
BIAS
= 3.3 V
Table 27. LCD Direct Drive AC Specifications
Parameter
F
LCD
LCD frame rate
Description
Min
–
–
–
Min
F
CLK
2 × T
CLK
2 × T
CLK
2 × T
CLK
2 × T
CLK
2 × T
CLK
2 × T
CLK
2 × T
CLK
2 × T
CLK
–
–
–
–
Typ
–
–
–
–
–
Min
–
–
–
–
–
Min
10
Typ
–
–
–
Typ
50
Typ
17.5
500
20
2
2
–
–
–
–
Max
48
–
–
–
–
Max
42
130
535
Units Details/Conditions
µA 16-bit PWM
µA 16-bit PWM
µA 16-bit PWM
Max
150
Units
MHz ns ns ns ns ns ns ns ns
Units
Hz
Details/Conditions
–
–
–
Max
–
5000
Units Details/Conditions
µA 16 × 4 small segment display at 50 Hz pF mV mA 32 × 4 segments. 50 Hz at
25 °C mA 32 × 4 segments
50 Hz at 25 °C
Details/Conditions
Document Number: 001-95662 Rev. *E Page 20 of 38
CYBLE-022001-00
Serial Communication
Table 28. Fixed I
2
C DC Specifications
Parameter
I
I2C1
I
I2C2
I
I2C3
I
I2C4
Description
Block current consumption at 100 kHz
Block current consumption at 400 kHz
Block current consumption at 1 Mbps
I
2
C enabled in Deep-Sleep mode
Table 29. Fixed I
2
C AC Specifications
Parameter
F
I2C1
Bit rate
Description
Min
–
–
–
–
Min
–
Typ
–
–
–
–
Typ
–
Max
50
155
390
1.4
Max
400
Units
µA
µA
µA
µA
Units
kHz
Details/Conditions
–
–
–
–
Details/Conditions
Table 30. Fixed UART DC Specifications
Parameter
I
UART1
I
UART2
Description
Block current consumption at 100 kbps
Block current consumption at 1000 kbps
Min
–
–
Typ
–
–
Max
55
312
Units
µA
µA
Details/Conditions
–
–
Table 31. Fixed UART AC Specifications
Parameter
F
UART
Bit rate
Description Min
–
Table 32. Fixed SPI DC Specifications
Parameter
I
SPI1
I
SPI2
I
SPI3
Description
Block current consumption at 1 Mbps
Block current consumption at 4 Mbps
Block current consumption at 8 Mbps
Table 33. Fixed SPI AC Specifications
Parameter
F
SPI
Description
SPI operating frequency (master; 6x over sampling)
Min
–
–
–
Table 34. Fixed SPI Master Mode AC Specifications
Parameter
T
DMO
T
T
DSI
HMO
Description
MOSI valid after SCLK driving edge
MISO valid before SCLK capturing edge
Full clock, late MISO sampling used
Previous MOSI data hold time
Table 35. Fixed SPI Slave Mode AC Specifications
T
DMI
T
DSO
Parameter
T
T
T
DSO_ext
HSO
SSELSCK
Description
MOSI valid before SCLK capturing edge
MISO valid after SCLK driving edge
MISO Valid after SCLK driving edge in external clock mode. V
DD
< 3.0 V
Previous MISO data hold time
SSEL valid to first SCK valid edge
Min
–
20
0
Min
–
Typ
–
Typ
–
–
–
Typ
–
Max
1
Max
360
560
600
40
–
–
0
Max
Min
100
8
Units
Mbps
Units
µA
µA
µA
Units
MHz
Typ
–
–
–
–
–
Details/Conditions
Details/Conditions
Details/Conditions
Typ Max Units
– 18 ns
–
–
–
– ns ns
Details/Conditions
–
Full clock, late MISO sampling
Referred to Slave capturing edge
Max
–
42 + 3 × T
50
–
–
–
–
–
–
–
CPU
Units
ns ns ns ns ns
Document Number: 001-95662 Rev. *E Page 21 of 38
CYBLE-022001-00
Memory
Table 36. Flash DC Specifications
Parameter
V
PE
T
WS48
T
WS32
T
WS16
Description
Erase and program voltage
Number of Wait states at 32–48 MHz
Number of Wait states at 16–32 MHz
Number of Wait states for 0–16 MHz
Min
1.71
2
1
0
Typ
–
–
–
–
Max
5.5
–
–
–
Units
V
Details/Conditions
–
CPU execution from flash
CPU execution from flash
CPU execution from flash
Table 37. Flash AC Specifications
Parameter
T
T
T
T
T
ROWWRITE
ROWERASE
ROWPROGRAM
BULKERASE
DEVPROG
F
END
F
RET
F
RET2
Description
Row (block) write time (erase and program)
Row erase time
Row program time after erase
Bulk erase time (128 KB)
Total device program time
Flash endurance
Flash retention. T
A
55 °C, 100 K P/E cycles
Flash retention. T
A
85 °C, 10 K P/E cycles
System Resources
Power-on-Reset (POR)
Table 38. POR DC Specifications
Parameter
V
RISEIPOR
V
FALLIPOR
V
IPORHYST
Description
Rising trip voltage
Min
0.80
Falling trip voltage 0.75
Hysteresis 15
Min
–
–
–
–
–
100 K
20
10
Table 39. POR AC Specifications
Parameter
T
PPOR_TR
Description
Precision power-on reset (PPOR) response time in Active and Sleep modes
Min
–
Table 40. Brown-Out Detect
Parameter
V
FALLPPOR
V
FALLDPSLP
Description
BOD trip voltage in Active and Sleep modes
BOD trip voltage in Deep Sleep
Min
1.64
1.4
Table 41. Hibernate Reset
V
Parameter
HBRTRIP
Description
BOD trip voltage in Hibernate
Min
1.1
Typ
–
Max
–
Typ
–
–
–
–
–
–
–
–
Typ
–
–
–
Typ
–
Typ
–
–
Max Units
20 ms
Details/Conditions
Row (block) = 128 bytes
13
7 ms ms
–
–
35 ms
25 seconds
–
–
– cycles years years
–
–
–
–
–
Max
1.45
1.40
200
Units
V
V mV
Max Units
1 µs
Max Units
– V
– V
Units
V
Details/Conditions
–
–
–
Details/Conditions
–
Details/Conditions
–
–
Details/Conditions
–
Note
8. It can take as much as 20 ms to write to flash. During this time, the device should not be reset, or flash operations will be interrupted and cannot be relied on to have completed. Reset sources include the XRES pin, software resets, CPU lockup states and privilege violations, improper power supply levels, and watchdogs. Make certain that these are not inadvertently activated.
Document Number: 001-95662 Rev. *E Page 22 of 38
CYBLE-022001-00
Voltage Monitors (LVD)
Table 42. Voltage Monitor DC Specifications
Parameter
V
LVI1
V
LVI2
V
LVI3
V
LVI4
V
LVI5
V
LVI6
V
LVI7
V
LVI8
V
LVI9
V
LVI10
V
LVI11
V
LVI12
V
LVI13
V
LVI14
V
LVI15
V
LVI16
LVI_IDD
Description
LVI_A/D_SEL[3:0] = 0000b
LVI_A/D_SEL[3:0] = 0001b
LVI_A/D_SEL[3:0] = 0010b
LVI_A/D_SEL[3:0] = 0011b
LVI_A/D_SEL[3:0] = 0100b
LVI_A/D_SEL[3:0] = 0101b
LVI_A/D_SEL[3:0] = 0110b
LVI_A/D_SEL[3:0] = 0111b
LVI_A/D_SEL[3:0] = 1000b
LVI_A/D_SEL[3:0] = 1001b
LVI_A/D_SEL[3:0] = 1010b
LVI_A/D_SEL[3:0] = 1011b
LVI_A/D_SEL[3:0] = 1100b
LVI_A/D_SEL[3:0] = 1101b
LVI_A/D_SEL[3:0] = 1110b
LVI_A/D_SEL[3:0] = 1111b
Block current
Table 43. Voltage Monitor AC Specifications
T
Parameter
MONTRIP
Description
Voltage monitor trip time
SWD Interface
Table 44. SWD Interface Specifications
Parameter
F_SWDCLK1
F_SWDCLK2
Description
3.3 V
V
DD
5.5 V
1.71 V
V
DD
3.3 V
T_SWDI_SETUP T = 1/f SWDCLK
T_SWDI_HOLD T = 1/f SWDCLK
T_SWDO_VALID T = 1/f SWDCLK
T_SWDO_HOLD T = 1/f SWDCLK
Min
1.71
1.76
1.85
1.95
2.05
2.15
2.24
2.34
2.44
2.54
2.63
2.73
2.83
2.93
3.12
4.39
–
Min
–
Typ
1.75
1.80
1.90
2.00
2.10
2.20
2.30
2.40
2.50
2.60
2.70
2.80
2.90
3.00
3.20
4.50
–
Typ
–
Max
1.79
1.85
1.95
2.05
2.15
2.26
2.36
2.46
2.56
2.67
2.77
2.87
2.97
3.08
3.28
4.61
100
Max
1
Units
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
µA
Units
µs
Details/Conditions
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Details/Conditions
–
Min
–
–
0.25 × T
0.25 × T
–
1
–
–
–
Typ
–
–
–
Max
14
7
–
–
0.5 × T
–
Units Details/Conditions
MHz SWDCLK
1/3 CPU clock frequency
MHz SWDCLK
1/3 CPU clock frequency ns ns
–
– ns ns
–
–
Document Number: 001-95662 Rev. *E Page 23 of 38
CYBLE-022001-00
Internal Main Oscillator
Table 45. IMO DC Specifications
Parameter
I
IMO1
I
IMO2
I
IMO3
I
IMO4
I
IMO5
Description
IMO operating current at 48 MHz
IMO operating current at 24 MHz
IMO operating current at 12 MHz
IMO operating current at 6 MHz
IMO operating current at 3 MHz
Table 46. IMO AC Specifications
Parameter
F
IMOTOL3
F
IMOTOL3
Description
Frequency variation from 3 to 48 MHz
IMO startup time
Internal Low-Speed Oscillator
Table 47. ILO DC Specifications
Parameter
I
ILO2
Description
ILO operating current at 32 kHz
Table 48. ILO AC Specifications
Parameter
T
STARTILO1
F
ILOTRIM1
Description
ILO startup time
32-kHz trimmed frequency
Table 49. ECO Trim Value Specification
Parameter
ECO
TRIM
Description
24-MHz trim value
(firmware configuration)
BLE Subsystem
Table 50. BLE Subsystem
Min
–
–
–
–
–
Min
–
–
Min
–
Min
–
15
Value
0x00003FFA
Parameter Description Min
RF Receiver Specification
RXS, IDLE RX sensitivity with idle transmitter
RXS, DIRTY
RX sensitivity with idle transmitter excluding Balun loss
RX sensitivity with dirty transmitter
RXS, HIGHGAIN
PRXMAX
CI1
RX sensitivity in high-gain mode with idle transmitter
Maximum input power
Cochannel interference,
Wanted signal at –67 dBm and Interferer at FRX
–10
–
–
–
–
–
Typ
–
12
Typ
0.3
Typ
–
32
Typ
–
–
–
–
–
–89
–91
–87
–91
–1
9
1000
Max
Max
1.05
Max
2
Max
325
225
180
150
±2
50
–
–
–
–70
–
–
21
Units
µA
µA
µA
µA
µA
Units
%
µs
Units
µA
Units
ms kHz dBm dBm dBm dBm dBm dB
Details/Conditions
–
–
–
–
–
Details/Conditions
With API-called calibration
–
Details/Conditions
–
Details/Conditions
–
–
Details/Conditions
Optimum trim value that needs to be loaded to register
CY_SYS_XTAL_BLERD_BB_XO_CAPTRIM_REG
Typ Max Units
Details/
Conditions
Guaranteed by design simulation
RF-PHY Specification
(RCV-LE/CA/01/C)
RF-PHY Specification
(RCV-LE/CA/06/C)
RF-PHY Specification
(RCV-LE/CA/03/C)
Document Number: 001-95662 Rev. *E Page 24 of 38
CYBLE-022001-00
CI2
CI3
CI4
CI5
CI3
Parameter
OBB1
OBB2
OBB3
OBB4
IMD
RXSE1
Description
Adjacent channel interference
Wanted signal at –67 dBm and Interferer at FRX ±1 MHz
Adjacent channel interference
Wanted signal at –67 dBm and Interferer at FRX ±2 MHz
Adjacent channel interference
Wanted signal at –67 dBm and Interferer at
FRX ±3 MHz
Adjacent channel interference
Wanted Signal at –67 dBm and Interferer at Image frequency (F
IMAGE
)
Adjacent channel interference
Wanted signal at –67 dBm and Interferer at Image frequency (F
IMAGE
± 1 MHz)
Out-of-band blocking,
Wanted signal at –67 dBm and Interferer at F = 30–2000 MHz
Out-of-band blocking,
Wanted signal at –67 dBm and Interferer at F = 2003–2399 MHz
Out-of-band blocking,
Wanted signal at –67 dBm and Interferer at F = 2484–2997 MHz
Out-of-band blocking,
Wanted signal a –67 dBm and Interferer at F = 3000–12750 MHz
Intermodulation performance
Wanted signal at –64 dBm and 1-Mbps
BLE, third, fourth, and fifth offset channel
Receiver spurious emission
30 MHz to 1.0 GHz
Min
–
–
–
–
–
–30
–35
–35
–30
–50
–
– RXSE2 Receiver spurious emission
1.0 GHz to 12.75 GHz
RF Transmitter Specifications
TXP, ACC
TXP, RANGE
RF power accuracy
RF power control range
TXP, 0dBm
TXP, MAX
TXP, MIN
F2AVG
F1AVG
Output power, 0-dB Gain setting (PA7)
Output power, maximum power setting
(PA10)
Output power, minimum power setting
(PA1)
Average frequency deviation for
10101010 pattern
Average frequency deviation for
11110000 pattern
–
–
–
–
–
185
225
Typ
3
–29
–39
–20
–30
–27
–27
–27
–27
–
–
–
0
3
±1
20
–18
–
250
Max
15
–
–
–
–
–
–
–
–
–
–57
–47
–
–
–
–
–
–
275
Units
dB
Details/
Conditions
RF-PHY Specification
(RCV-LE/CA/03/C) dB dB
RF-PHY Specification
(RCV-LE/CA/03/C)
RF-PHY Specification
(RCV-LE/CA/03/C) dB dB dBm dBm
RF-PHY Specification
(RCV-LE/CA/03/C)
RF-PHY Specification
(RCV-LE/CA/03/C)
RF-PHY Specification
(RCV-LE/CA/04/C)
RF-PHY Specification
(RCV-LE/CA/04/C) dBm dBm dBm dBm dBm
RF-PHY Specification
(RCV-LE/CA/04/C)
RF-PHY Specification
(RCV-LE/CA/04/C)
RF-PHY Specification
(RCV-LE/CA/05/C)
100-kHz measurement bandwidth
ETSI EN300 328 V1.8.1
1-MHz measurement bandwidth
ETSI EN300 328 V1.8.1
dB dB dBm dBm dBm kHz kHz
RF-PHY Specification
(TRM-LE/CA/05/C)
RF-PHY Specification
(TRM-LE/CA/05/C)
Document Number: 001-95662 Rev. *E Page 25 of 38
CYBLE-022001-00
EO
Parameter
FTX, ACC
FTX, MAXDR
Description
Eye opening =
F2AVG/F1AVG
Frequency accuracy
Maximum frequency drift
FTX, INITDR
FTX, DR
Initial frequency drift
Maximum drift rate
IBSE1
IBSE2
TXSE1
TXSE2
In-band spurious emission at 2-MHz offset
In-band spurious emission at
3-MHz offset
Transmitter spurious emissions
(average), <1.0 GHz
Transmitter spurious emissions
(average), >1.0 GHz
RF Current Specifications
IRX Receive current in normal mode
IRX_RF
IRX, HIGHGAIN
ITX, 3dBm
Radio receive current in normal mode
Receive current in high-gain mode
TX current at 3-dBm setting (PA10)
ITX, 0dBm
ITX_RF, 0dBm
ITX_RF, 0dBm
TX current at 0-dBm setting (PA7)
Radio TX current at 0 dBm setting (PA7)
Radio TX current at 0 dBm excluding
Balun loss
TX current at –3-dBm setting (PA4) ITX,-3dBm
ITX,-6dBm
ITX,-12dBm
TX current at –6-dBm setting (PA3)
TX current at –12-dBm setting (PA2)
ITX,-18dBm TX current at –18-dBm setting (PA1)
Iavg_1sec, 0dBm Average current at 1-second BLE connection interval
Min
0.8
–
–
–
–
–
–
–
–
–
–
–
–
–150
–50
–20
–20
–
–
–
–
15.5
14.5
13.2
12.5
17.1
18.7
16.4
21.5
20
16.5
15.6
14.2
Typ
–
–
–
–
–
–
–
–
–
Max
–
150
50
20
20
–20
-30
-55.5
-41.5
–
–
–
–
–
–
–
–
–
–
–
–
Iavg_4sec, 0dBm Average current at 4-second BLE connection interval
– 6.1
–
General RF Specifications
FREQ RF operating frequency
CHBW
DR
IDLE2TX
Channel spacing
On-air data rate
BLE.IDLE to BLE. TX transition time
2400
–
–
–
–
2
1000
120
2482
–
–
140 mA mA mA mA
µA mA mA mA mA mA mA mA kHz kHz kHz kHz/
50 µs dBm dBm dBm dBm
Units
Details/
Conditions
RF-PHY Specification
(TRM-LE/CA/05/C)
RF-PHY Specification
(TRM-LE/CA/06/C)
RF-PHY Specification
(TRM-LE/CA/06/C)
RF-PHY Specification
(TRM-LE/CA/06/C)
RF-PHY Specification
(TRM-LE/CA/06/C)
RF-PHY Specification
(TRM-LE/CA/03/C)
RF-PHY Specification
(TRM-LE/CA/03/C)
FCC-15.247
FCC-15.247
µA
MHz
MHz kbps
µs
Measured at V
DDR
Measured at V
DDR
Guaranteed by design simulation
TXP: 0 dBm; ±20-ppm master and slave clock accuracy.
For empty PDU exchange
TXP: 0 dBm; ±20-ppm master and slave clock accuracy.
For empty PDU exchange
Document Number: 001-95662 Rev. *E Page 26 of 38
Parameter Description
IDLE2RX BLE.IDLE to BLE. RX transition time
RSSI Specifications
RSSI, ACC RSSI accuracy
RSSI, RES
RSSI, PER
RSSI resolution
RSSI sample period
Min
–
Typ
75
–
–
–
±5
1
6
Max
120
–
–
–
Units
µs dB dB
µs
CYBLE-022001-00
Details/
Conditions
Document Number: 001-95662 Rev. *E Page 27 of 38
CYBLE-022001-00
Environmental Specifications
Environmental Compliance
This Cypress BLE module is built in compliance with the Restriction of Hazardous Substances (RoHS) and Halogen Free (HF) directives. The Cypress module and components used to produce this module are RoHS and HF compliant.
RF Certification
The CYBLE-022001-00 module is certified under the following RF certification standards:
■
FCC: WAP2001
■
CE
■
IC: 7922A-2001
■
MIC: 005-101007
■
KC: MSIP-CRM-Cyp-2001
Environmental Conditions
describes the operating and storage conditions for the Cypress BLE module.
Table 51. Environmental Conditions for CYBLE-022001-00
Description
Operating temperature
Operating humidity (relative, non-condensation)
Thermal ramp rate
Storage temperature
Storage temperature and humidity
ESD: Module integrated into system
Components
Minimum Specification
-40 °C
5%
–
–40 °C
–
–
Maximum Specification
85 °C
85%
3 °C/minute
85 °C
85 ° C at 85%
15 kV Air
2.2 kV Contact
ESD and EMI Protection
Exposed components require special attention to ESD and electromagnetic interference (EMI).
A grounded conductive layer inside the device enclosure is suggested for EMI and ESD performance. Any openings in the enclosure near the module should be surrounded by a grounded conductive layer to provide ESD protection and a low-impedance path to ground.
Device Handling: Proper ESD protocol must be followed in manufacturing to ensure component reliability.
Note
9. This does not apply to the RF pins (ANT, XTALI, and XTALO). RF pins (ANT, XTALI, and XTALO) are tested for 500-V HBM.
Document Number: 001-95662 Rev. *E Page 28 of 38
CYBLE-022001-00
Regulatory Information
FCC
FCC NOTICE:
The device CYBLE-022001-00, including the antenna 2450AT18B100 from Johanson Technology, complies with Part 15 of the FCC
Rules. The device meets the requirements for modular transmitter approval as detailed in FCC public Notice DA00-1407.transmitter
Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation.
CAUTION:
The FCC requires the user to be notified that any changes or modifications made to this device that are not expressly approved by
Cypress Semiconductor may void the user's authority to operate the equipment.
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference in a residential installation. This equipment generates uses and can radiate radio frequency energy and, if not installed and used in accordance with the instructions, may cause harmful interference to radio communications. However, there is no guarantee that interference will not occur in a particular installation.
If this equipment does cause harmful interference to radio or television reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interference by one or more of the following measures:
■
Reorient or relocate the receiving antenna.
■
Increase the separation between the equipment and receiver.
■
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
■
Consult the dealer or an experienced radio/TV technician for help
LABELING REQUIREMENTS:
The Original Equipment Manufacturer (OEM) must ensure that FCC labelling requirements are met. This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Cypress Semiconductor FCC identifier for this product as well as the FCC Notice above. The FCC identifier is FCC ID: WAP2001.
In any case the end product must be labeled exterior with "Contains FCC ID: WAP2001"
ANTENNA WARNING:
This device is tested with a standard SMA connector and with the antennas listed below. When integrated in the OEMs product, these fixed antennas require installation preventing end-users from replacing them with non-approved antennas. Any antenna not in the following table must be tested to comply with FCC Section 15.203 for unique antenna connectors and Section 15.247 for emissions.
RF EXPOSURE:
To comply with FCC RF Exposure requirements, the Original Equipment Manufacturer (OEM) must ensure to install the approved antenna in the previous.
The preceding statement must be included as a CAUTION statement in manuals, for products operating with the approved antennas
instructions about the integrated radio module is not allowed.
The radiated output power of CYBLE-022001-00 with the chip antenna mounted (FCC ID: WAP2001) is far below the FCC radio frequency exposure limits. Nevertheless, use CYBLE-022001-00 in such a manner that minimizes the potential for human contact during normal operation.
End users may not be provided with the module installation instructions. OEM integrators and end users must be provided with transmitter operating conditions for satisfying RF exposure compliance.
Document Number: 001-95662 Rev. *E Page 29 of 38
CYBLE-022001-00
Industry Canada (IC) Certification
CYBLE-022001-00 is licensed to meet the regulatory requirements of Industry Canada (IC),
License: IC: 7922A-2001
Manufacturers of mobile, fixed or portable devices incorporating this module are advised to clarify any regulatory questions and ensure compliance for SAR and/or RF exposure limits. Users can obtain Canadian information on RF exposure and compliance from www.ic.gc.ca.
This device has been designed to operate with the antennas listed in
Table 6 on page 12, having a maximum gain of 0.5 dBi. Antennas
not included in this list or having a gain greater than 0.5 dBi are strictly prohibited for use with this device. The required antenna impedance is 50 ohms. The antenna used for this transmitter must not be co-located or operating in conjunction with any other antenna or transmitter.
IC NOTICE:
The device CYBLE-022001-00 including the antenna 2450AT18B100 from Johanson technology, complies with Canada RSS-GEN
Rules. The device meets the requirements for modular transmitter approval as detailed in RSS-GEN. Operation is subject to the following two conditions: (1) This device may not cause harmful interference, and (2) This device must accept any interference received, including interference that may cause undesired operation.
IC RADIATION EXPOSURE STATEMENT FOR CANADA
This device complies with Industry Canada licence-exempt RSS standard(s). Operation is subject to the following two conditions: (1) this device may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of the device.
Le présent appareil est conforme aux CNR d'Industrie Canada applicables aux appareils radio exempts de licence. L'exploitation est autorisée aux deux conditions suivantes : (1) l'appareil ne doit pas produire de brouillage, et (2) l'utilisateur de l'appareil doit accepter tout brouillage radioélectrique subi, même si le brouillage est susceptible d'en compromettre le fonctionnement.
LABELING REQUIREMENTS:
The Original Equipment Manufacturer (OEM) must ensure that IC labelling requirements are met. This includes a clearly visible label on the outside of the OEM enclosure specifying the appropriate Cypress Semiconductor IC identifier for this product as well as the IC
Notice above. The IC identifier is 7922A-2001. In any case, the end product must be labeled in its exterior with "Contains IC:
7922A-2001"
European R&TTE Declaration of Conformity
Hereby, Cypress Semiconductor declares that the Bluetooth module CYBLE-022001-00 complies with the essential requirements and other relevant provisions of Directive 1999/5/EC. As a result of the conformity assessment procedure described in Annex III of the
Directive 1999/5/EC, the end-customer equipment should be labeled as follows:
All versions of the CYBLE-022001-00 in the specified reference design can be used in the following countries: Austria, Belgium,
Cyprus, Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, Poland, Portugal, Slovakia, Slovenia, Spain, Sweden, The Netherlands, the United Kingdom, Switzerland, and Norway.
Document Number: 001-95662 Rev. *E Page 30 of 38
CYBLE-022001-00
MIC Japan
CYBLE-022001-00 is certified as a module with type certification number 005-101007. End products that integrate CYBLE-022001-00 do not need additional MIC Japan certification for the end product.
End product can display the certification label of the embedded module.
Model Name: EZ‐BLE PRoC Module
Part Number: CYBLE‐022001‐00
Manufactured by Cypress Semiconductor.
005‐101007
KC Korea
CYBLE-022001-00 is certified for use in Korea with certificate number MSIP-CRM-Cyp-2001.
Document Number: 001-95662 Rev. *E Page 31 of 38
CYBLE-022001-00
Packaging
Table 52. Solder Reflow Peak Temperature
Module Part Number
CYBLE-022001-00
Package
21-pad SMT
Maximum Peak Temperature Maximum Time at Peak Temperature No. of Cycles
260 °C 30 seconds 2
Table 53. Package Moisture Sensitivity Level (MSL), IPC/JEDEC J-STD-2
Module Part Number
CYBLE-022001-00
Package
21-pad SMT
MSL
MSL 3
The CYBLE-022001-00 is offered in tape and reel packaging.
Figure 10 details the tape dimensions used for the CYBLE-022001-00.
Figure 10. CYBLE-022001-00 Tape Dimensions
details the orientation of the CYBLE-022001-00 in the tape as well as the direction for unreeling.
Figure 11. Component Orientation in Tape and Unreeling Direction
Document Number: 001-95662 Rev. *E Page 32 of 38
details reel dimensions used for the CYBLE-022001-00.
Figure 12. Reel Dimensions
CYBLE-022001-00
The CYBLE-022001-00 is designed to be used with pick-and-place equipment in an SMT manufacturing environment. The center-of-mass for the CYBLE-022001-00 is detailed in
.
Figure 13. CYBLE-022001-00 Center of Mass
Document Number: 001-95662 Rev. *E Page 33 of 38
CYBLE-022001-00
Ordering Information
The CYBLE-022001-00 part number and features are listed in the following table.
Part Number
CYBLE-022001-00
CPU
Speed
(MHz)
48
Flash
Size
(KB)
128
CapSense SCB TCPWM
Yes 2 4
12-Bit
SAR
ADC
I
2
S
1 Msps Yes
Part Numbering Convention
The part numbers are of the form CYBLE-ABCDEF-GH where the fields are defined as follows.
LCD
Yes
Package Packing
21-SMT Tape and
Reel
For additional information and a complete list of Cypress Semiconductor BLE products, contact your local Cypress sales representative. To locate the nearest Cypress office, visit our website.
U.S. Cypress Headquarters Address
U.S. Cypress Headquarter Contact Info
Cypress website address
198 Champion Court, San Jose, CA 95134
(408) 943-2600 http://www.cypress.com
Document Number: 001-95662 Rev. *E Page 34 of 38
CYBLE-022001-00
Acronyms
FCC
GPIO
IC
IDE
KC
MIC
PCB
RX
QDID
SMT
Acronym
BLE
Bluetooth SIG
CE
CSA
EMI
ESD
TCPWM
TUV
TX
Description
Bluetooth Low Energy
Bluetooth Special Interest Group
European Conformity
Canadian Standards Association electromagnetic interference electrostatic discharge
Federal Communications Commission general-purpose input/output
Industry Canada integrated design environment
Korea Certification
Ministry of Internal Affairs and Communications (Japan) printed circuit board receive qualification design ID surface-mount technology; a method for producing electronic circuitry in which the components are placed directly onto the surface of PCBs timer, counter, pulse width modulator (PWM)
Germany: Technischer Überwachungs-Verein (Technical Inspection Association) transmit
°C kV mA mm mV
µA
µm
MHz
GHz
V
Document Conventions
Units of Measure
Symbol Unit of Measure
degree Celsius kilovolt milliamperes millimeters millivolt microamperes micrometers megahertz gigahertz volt
Document Number: 001-95662 Rev. *E Page 35 of 38
CYBLE-022001-00
Document History Page
Document Title: CYBLE-022001-00 EZ-BLE™ PRoC™ Module
Document Number: 001-95662
Revision ECN
Orig. of
Change
Submission
Date
**
*A
*B
*C
4662055
4679323
4710754
4812402
DSO
DSO
DSO
DSO
Description of Change
02/18/2015 Preliminary datasheet for CYBLE-022001-00 module.
:
Updated Module Dimensions and Drawing
:
Updated Figure 1 (Updated Module Pad Assignment).
Updated Recommended Host PCB Layout :
Updated title to “Module Solder Pad Connection Dimensions”.
Changed Pad 10 from NC to GND.
Updated Power Supply Connections and Recommended External Components :
Updated External Component Recommendation :
Updated Figure 7 (Changed Pad 10 from NC to GND).
Updated Figure 8 (Changed Pad 10 from NC to GND).
Updated Figure 9 (Changed Pad 10 from NC to GND).
04/01/2015 Updated Title Page heading to “EZ-BLE
TM
PRoC
TM respectively in all instances across the document.
:
Module
Replaced terms “pre-certified” with “certified” and “pre-qualified” with “qualified”
Changed GPIO number from “12” to “16”.
Added QDID and Declaration ID under “Bluetooth SIG 4.1 qualified item.
Updated Stop mode as “60 nA with XRES wakeup” under “Low Power mode support” item.
Updated Functional Capabilities :
Change number of capacitive sensors supported from 9 to 13.
Updated Electrical Specification
:
:
Updated details in “Details/Conditions” column of T
STOP
parameter to “XRES wakeup”.
:
Added “QDID”.
06/23/2015 Changed status from “Preliminary” to “Final”.
:
Added identification numbers for FCC, IC, KC, and MIC regulatory agencies.
Updated Functional Capabilities :
Change number of capacitive sensors supported from 13 to 15.
Updated Power Supply Connections and Recommended External Components :
:
Updated description.
Updated Figure 9 (To final design schematic).
Updated Electrical Specification
:
Update
:
Changed typical value of I
DD15
Updated Ordering Information :
No change in part numbers. from 1.3 uA to 1.5uA.
Added Part Numbering Convention .
.
:
Added “SMT”.
Document Number: 001-95662 Rev. *E Page 36 of 38
CYBLE-022001-00
Document Title: CYBLE-022001-00 EZ-BLE™ PRoC™ Module
Document Number: 001-95662
*D 5058970 DSO
12/14/2015 Updated General Description
:
Added reference and link to PRoC BLE silicon datasheet.
:
Updated Module Dimensions and Drawing
:
Updated Figure 1 (to improve clarity and viewing).
Updated Pad Connection Interface
:
Updated description
Updated Figure 2 (to improve clarity and viewing).
Updated Figure 3 (to improve clarity and viewing).
Updated Recommended Host PCB Layout :
Updated Figure 4 (to improve clarity and viewing
Added Figure 5 (to show solder pad location from module origin).
Updated Table 3 (to provide the location to the center of each solder pad from the
origin (in mm and mils)).
(to provide the location to the center of each solder pad from the origin (in mm and mils)).
Updated Electrical Specification
:
.
:
Added Pulse Width Modulation (PWM)
:
.
Updated Industry Canada (IC) Certification
:
Added French translation for IC Radiation Exposure Statement For Canada in accordance with IC requirements.
:
.
.
Completing Sunset Review.
*E 5148398 DSO
02/23/2016 Updated Module Description :
Re-ordered descriptions. No change to content.
:
Updated Module Dimensions and Drawing
:
Updated Figure 1 (change orientation to match PSoC Creator).
Updated Pad Connection Interface
:
Updated Figure 2 (change orientation to match PSoC Creator).
Updated Figure 3 (change orientation to match PSoC Creator).
Updated Recommended Host PCB Layout :
Updated Figure 4 (change orientation to match PSoC Creator).
Updated Figure 5 (change orientation to match PSoC Creator).
Updated Figure 6 (change orientation to match PSoC Creator).
Added additional information with respect to the functional capabilities for each solder pad.
Updated Power Supply Connections and Recommended External Components :
Updated Figure 7 (change orientation to match PSoC Creator).
Updated Figure 8 (change orientation to match PSoC Creator).
Updated Figure 9 (change orientation to match PSoC Creator).
:
(change orientation to match PSoC Creator).
Document Number: 001-95662 Rev. *E Page 37 of 38
CYBLE-022001-00
Sales, Solutions, and Legal Information
Worldwide Sales and Design Support
Cypress maintains a worldwide network of offices, solution centers, manufacturer’s representatives, and distributors. To find the office closest to you, visit us at Cypress Locations .
Products
Automotive
Clocks & Buffers
Interface
Lighting & Power Control
Memory
PSoC
Touch Sensing
USB Controllers
Wireless/RF cypress.com/go/automotive cypress.com/go/clocks cypress.com/go/interface cypress.com/go/powerpsoc cypress.com/go/memory cypress.com/go/psoc cypress.com/go/touch cypress.com/go/USB cypress.com/go/wireless
PSoC
®
Solutions
psoc.cypress.com/solutions
PSoC 1 | PSoC 3 | PSoC 4 | PSoC 5LP
Cypress Developer Community
Community | Forums | Blogs | Video | Training
Technical Support
cypress.com/go/support
© Cypress Semiconductor Corporation 2015-2016. This document is the property of Cypress Semiconductor Corporation and its subsidiaries, including Spansion LLC ("Cypress"). This document, including any software or firmware included or referenced in this document ("Software"), is owned by Cypress under the intellectual property laws and treaties of the United States and other countries worldwide. Cypress reserves all rights under such laws and treaties and does not, except as specifically stated in this paragraph, grant any license under its patents, copyrights, trademarks, or other intellectual property rights. If the Software is not accompanied by a license agreement and you do not otherwise have a written agreement with Cypress governing the use of the Software, then Cypress hereby grants you under its copyright rights in the Software, a personal, non-exclusive, nontransferable license (without the right to sublicense) (a) for Software provided in source code form, to modify and reproduce the Software solely for use with Cypress hardware products, only internally within your organization, and (b) to distribute the Software in binary code form externally to end users (either directly or indirectly through resellers and distributors), solely for use on Cypress hardware product units. Cypress also grants you a personal, non-exclusive, nontransferable, license (without the right to sublicense) under those claims of Cypress's patents that are infringed by the Software (as provided by Cypress, unmodified) to make, use, distribute, and import the Software solely to the minimum extent that is necessary for you to exercise your rights under the copyright license granted in the previous sentence. Any other use, reproduction, modification, translation, or compilation of the Software is prohibited.
CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS DOCUMENT OR ANY SOFTWARE, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes to this document without further notice. Cypress does not assume any liability arising out of the application or use of any product or circuit described in this document. Any information provided in this document, including any sample design information or programming code, is provided only for reference purposes. It is the responsibility of the user of this document to properly design, program, and test the functionality and safety of any application made of this information and any resulting product. Cypress products are not designed, intended, or authorized for use as critical components in systems designed or intended for the operation of weapons, weapons systems, nuclear installations, life-support devices or systems, other medical devices or systems (including resuscitation equipment and surgical implants), pollution control or hazardous substances management, or other uses where the failure of the device or system could cause personal injury, death, or property damage ("Unintended Uses"). A critical component is any component of a device or system whose failure to perform can be reasonably expected to cause the failure of the device or system, or to affect its safety or effectiveness. Cypress is not liable, in whole or in part, and Company shall and hereby does release Cypress from any claim, damage, or other liability arising from or related to all Unintended Uses of Cypress products. Company shall indemnify and hold Cypress harmless from and against all claims, costs, damages, and other liabilities, including claims for personal injury or death, arising from or related to any Unintended Uses of Cypress products.
Cypress, the Cypress logo, Spansion, the Spansion logo, and combinations thereof, PSoC, CapSense, EZ-USB, F-RAM, and Traveo are trademarks or registered trademarks of Cypress in the United
States and other countries. For a more complete list of Cypress trademarks, visit cypress.com. Other names and brands may be claimed as property of their respective owners.
Document Number: 001-95662 Rev. *E Revised February 23, 2016
All products and company names mentioned in this document may be the trademarks of their respective holders.
Page 38 of 38
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Cypress Semiconductor
:
CYBLE-022001-00ES CYBLE-022001-00
advertisement
* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project