LM4951A Wide Voltage Range 1.8 Watt Audio Amplifier With Short Circuit Protection FEATURES

LM4951A Wide Voltage Range 1.8 Watt Audio Amplifier With Short Circuit Protection FEATURES
LM4951A
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LM4951A
SNAS453C – AUGUST 2008 – REVISED APRIL 2013
Wide Voltage Range 1.8 Watt Audio Amplifier
With Short Circuit Protection
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FEATURES
DESCRIPTION
•
The LM4951A is an audio power amplifier designed
for applications with supply voltages ranging from
2.7V up to 9V. The LM4951A is capable of delivering
1.8W continuous average power with less than 1%
THD+N into a bridge connected 8Ω load when
operating from a 7.5VDC power supply.
1
23
•
•
•
•
•
•
•
Pop & Click Circuitry Eliminates Noise During
Turn-On and Turn-Off Transitions
Wide Supply Voltage Range: 2.7V to 9V
Low Current, Active-Low Shutdown Mode
Low Quiescent Current
Thermal Shutdown Protection
Short Circuit Protection
Unity-Gain Stable
External Gain Configuration Capability
APPLICATIONS
•
•
•
•
•
Portable Devices
Cell Phones
Laptop Computers
Computer Speaker Systems
MP3 Player Speakers
KEY SPECIFICATIONS
•
•
•
•
•
Boomer™ audio power amplifiers were designed
specifically to provide high quality output power with a
minimal amount of external components. The
LM4951A does not require bootstrap capacitors, or
snubber circuits.
The LM4951A features a low-power consumption
active-low shutdown mode. Additionally, the
LM4951A features an internal thermal shutdown
protection mechanism and short circuit protection.
The LM4951A contains advanced pop & click circuitry
that eliminates noises which would otherwise occur
during turn-on and turn-off transitions.
The LM4951A is unity-gain stable and can be
configured by external gain-setting resistors.
Wide Voltage Range 2.7V to 9V
Quiescent Power Supply Current (VDD = 7.5V)
2.5mA (typ)
Power Output BTL at 7.5V, 1% THD
1.8 W (typ)
Shutdown Current 0.01µA (typ)
Fast Turn on Time 25ms (typ)
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Boomer is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2008–2013, Texas Instruments Incorporated
LM4951A
SNAS453C – AUGUST 2008 – REVISED APRIL 2013
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Typical Application
Rf
VDD
Cs
1.0 PF
VDD
Ri
20k
Ci
0.39 PF
VIN
-
Vo-
AMPA
1k
Rc
CBYPASS
VIH
1.0 PF
+
CCHG
20k
Control
Bias
Bypass
8:
VIL
Shutdown
control
20k
Shutdown
+
AMPB
Vo+
GND
Figure 1. Typical Bridge-Tied-Load (BTL) Audio Amplifier Application Circuit
Connection Diagram
Top View
+
Bypass
1
10
VO
Shutdown
2
9
VDD
CCHG
3
8
NC
NC
4
7
GND
VIN
5
6
VO
-
Figure 2. WSON Package
See Package Number DPR0010A
Pin Name and Function
Pin Number
2
Name
1
Bypass
2
Shutdown
Function
Type
½ supply reference voltage bypass output. See sections POWER SUPPLY
BYPASSING and SELECTING EXTERNAL COMPONENTS for more
information.
Shutdown control active low signal. A logic low voltage will put the
LM4951A into Shutdown mode.
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Analog Output
Digital Input
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Pin Name and Function (continued)
Pin Number
Name
Function
Type
Input capacitor charge to decrease turn on time. See section Selecting
Value A For RCfor more information.
3
CCHG
Analog Output
4
NC
No connection to die. Pin can be connected to any potential.
No Connect
5
VIN
Single-ended signal input pin.
Analog Input
6
VO-
Inverting output of amplifier.
7
GND
8
NC
No connection to die. Pin can be connected to any potential.
Analog Output
Ground connection.
Ground
No Connect
9
VDD
Power supply.
10
VO+
Non-Inverting output of amplifier.
Power
Exposed DAP
NC
No connect. Pin must be electrically isolated (floating) or connected to
GND.
Analog Output
No Connect
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1) (2)
Supply Voltage
9.5V
−65°C to +150°C
Storage Temperature
−0.3V to VDD + 0.3V
Input Voltage
Power Dissipation (3)
Internally limited
ESD Rating (4)
ESD Rating
2000V
(5)
200V
Junction Temperature (TJMAX)
Thermal Resistance
150°C
θJA (WSON) (3)
Soldering Information
(1)
(2)
(3)
(4)
(5)
73°C/W
AN-1187 (Literature Number SNOA401)
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the s or other conditions beyond
those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditionsindicate conditions
at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect
to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature,
TA. The maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings,
whichever is lower. For the LM4951A typical application (shown in Figure 1) with VDD = 7.5V, RL = 8Ω mono-BTL operation the max
power dissipation is 1.42W. θJA = 73ºC/W.
Human body model, applicable std. JESD22-A114C.
Machine model, applicable std. JESD22-A115-A.
Operating Ratings (1) (2)
Temperature Range TMIN ≤ TA ≤ TMAX
−40°C ≤ T A ≤ +85°C
2.7V ≤ VDD ≤ 9V
Supply Voltage
(1)
(2)
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the s or other conditions beyond
those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditionsindicate conditions
at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect
to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
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Electrical Characteristics VDD = 7.5V (1) (2)
The following specifications apply for VDD = 7.5V, AV-BTL = 6dB, RL = 8Ω unless otherwise specified. Limits apply for TA =
25°C.
Parameter
LM4951A
Test Conditions
Typ (3)
Limit (4)
Units
(Limits)
mA (max)
IDD
Quiescent Power Supply Current
VIN = 0V, IO = 0A, RL = 8Ω BTL
2.5
4.5
ISD
Shutdown Current
VSD = GND (5)
0.01
5
µA (max)
VOS
Output Offset Voltage
5
30
mV (max)
VSDIH
Shutdown Voltage Input High
1.2
V (min)
VSDIL
Shutdown Voltage Input Low
RPULLDOWN
Pull-down Resistor on SD pin
TWU
Wake-up Time
CB = 1.0µF
TSD
Shutdown time
CB = 1.0µF
TSD
Thermal Shutdown Temperature
PO
Output Power
THD = 1% (max); f = 1kHz
RL = 8Ω Mono BTL
PO = 600mWRMS; f = 1kHz
THD+N
Total Harmonic Distortion + Noise
AV-BTL = 6dB
PO = 600mWRMS; f = 1kHz
AV-BTL = 26dB
εOS
Output Noise
PSRR
Power Supply Rejection Ratio
(1)
(2)
(3)
(4)
(5)
(6)
4
A-Weighted Filter, Ri = Rf = 20kΩ
Input Referred (6)
VRIPPLE = 200mVp-p, f = 217Hz,
CB = 1.0μF, Input Referred
0.4
V (max)
75
45
kΩ (min)
25
35
ms (max)
10
ms (max)
170
150
190
°C (min)
°C (max)
1.8
1.5
W (min)
0.07
0.5
% (max)
0.35
%
10
µV
66
56
dB (min)
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the s or other conditions beyond
those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditionsindicate conditions
at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect
to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of
product characterization and are not specified.
Datasheet min/max specification limits are ensured by test or statistical analysis.
Shutdown current is measured in a normal room environment. The Shutdown pin should be driven as close as possible to GND for
minimum shutdown current.
Noise measurements are dependent on the absolute values of the closed loop gain setting resistors (input and feedback resistors).
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Electrical Characteristics VDD = 3.3V (1) (2)
The following specifications apply for VDD = 3.3V, AV-BTL = 6dB, RL = 8Ω unless otherwise specified. Limits apply for TA =
25°C.
Parameter
Test Conditions
LM4951A
Typ (3)
Limit (4)
Units
(Limits)
mA (max)
IDD
Quiescent Power Supply Current
VIN = 0V, IO = 0A, RL = 8Ω BTL
2.5
4.5
ISD
Shutdown Current
VSHUTDOWN = GND (5)
0.01
2
µA (max)
VOS
Output Offset Voltage
3
30
mV (max)
VSDIH
Shutdown Voltage Input High
1.2
V (min)
VSDIL
Shutdown Voltage Input Low
0.4
V (max)
TWU
Wake-up Time
CB = 1.0µF
TSD
Shutdown time
CB = 1.0µF
10
ms (max)
PO
Output Power
THD = 1% (max); f = 1kHz
RL = 8Ω Mono BTL
280
230
mW (min)
0.07
0.5
% (max)
PO = 100mWRMS = 1kHz
THD+N
Total Harmonic Distortion + Noise
AV-BTL = 6dB
PO = 100mWRMS; f = 1kHz
AV-BTL = 26dB
εOS
Output Noise
PSRR
Power Supply Rejection Ratio
(1)
(2)
(3)
(4)
(5)
(6)
A-Weighted Filter, Ri = Rf = 20kΩ
Input Referred, (6)
VRIPPLE = 200mVp-p, f = 217Hz,
CB = 1μF, Input Referred
25
ms
0.35
%
10
µV
71
61
dB (min)
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of
device reliability and/or performance. Functional operation of the device and/or non-degradation at the s or other conditions beyond
those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditionsindicate conditions
at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect
to the ground pin, unless otherwise specified.
The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as
otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and
are not ensured.
Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of
product characterization and are not specified.
Datasheet min/max specification limits are ensured by test or statistical analysis.
Shutdown current is measured in a normal room environment. The Shutdown pin should be driven as close as possible to GND for
minimum shutdown current.
Noise measurements are dependent on the absolute values of the closed loop gain setting resistors (input and feedback resistors).
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Typical Performance Characteristics
10
THD+N vs Frequency
VDD = 3.3V, PO = 100mW, AV = 6dB
10
THD+N vs Frequency
VDD = 3.3V, PO = 100mW, AV = 26dB
5
2
1
THD+N (%)
THD+N (%)
1
0.5
0.2
0.1
0.1
0.05
0.02
0.01
20
200
2k
0.01
20
20k
Figure 4.
THD+N vs Frequency
VDD = 5V, PO = 400mW, AV = 6dB
THD+N vs Frequency
VDD = 5V, PO = 400mW, AV = 26dB
10
5
5
2
2
1
1
0.5
0.2
0.5
0.2
0.1
0.1
0.05
0.05
0.02
0.02
0.01
20
50 100 200 500 1k 2k
0.01
20
5k 10k 20k
FREQUENCY (Hz)
10
5k 10k 20k
Figure 3.
THD+N (%)
THD+N (%)
10
50 100 200 500 1k 2k
FREQUENCY (Hz)
FREQUENCY (Hz)
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
Figure 5.
Figure 6.
THD+N vs Frequency
VDD = 7.5V, PO = 600mW, AV = 6dB
THD+N vs Frequency
VDD = 7.5V, PO = 600mW, AV = 26dB
10
5
5
2
THD+N (%)
THD+N (%)
1
0.5
0.2
0.1
2
1
0.5
0.05
0.2
0.02
0.01
20
0.1
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
200
2k
20k
FREQUENCY (Hz)
Figure 7.
6
20
Figure 8.
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Typical Performance Characteristics (continued)
10
THD+N vs Output Power
VDD = 3.3V, f = 1kHz, AV = 6dB
THD+N vs Output Power
VDD = 3.3V, f = 1kHz, AV = 26dB
10
1
THD+N (%)
THD+N (%)
5
0.1
2
1
0.5
0.2
0.01
30m
10m
0.1
10m
500m
100m
20m
OUTPUT POWER (W)
30m 50m 70m 100m
300m 500m
40m 60m 80m
200m 400m
OUTPUT POWER (W)
Figure 9.
Figure 10.
THD+N vs Output Power
VDD = 5V, f = 1kHz, AV = 6dB
10
THD+N vs Output Power
VDD = 5V, f = 1kHz, AV = 26dB
10
5
5
2
THD+N (%)
THD+N (%)
1
0.5
0.2
0.1
2
1
0.5
0.05
0.2
0.02
0.01
10m
20m
50m 100m 200m
500m
0.1
10m 20m
1
OUTPUT POWER (W)
500m
1
OUTPUT POWER (W)
Figure 11.
10
50m 100m 200m
Figure 12.
THD+N vs Output Power
VDD = 7.5V, f = 1kHz, AV = 6dB
10
THD+N vs Output Power
VDD = 7.5V, f = 1kHz, AV = 26dB
5
5
1
THD+N (%)
THD+N (%)
2
0.5
0.2
0.1
2
1
0.5
0.05
0.2
0.02
0.01
10m 20m 50m 100m 200m 500m 1
2 3
0.1
10m 20m 50m 100m 200m 500m 1
2 3
OUTPUT POWER (W)
OUTPUT POWER (W)
Figure 13.
Figure 14.
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Typical Performance Characteristics (continued)
Power Supply Rejection vs Frequency
VDD = 3.3V, AV = 6dB, VRIPPLE = 200mVP-P
Input Terminated into 10Ω
Power Supply Rejection vs Frequency
VDD = 3.3V, AV = 26dB, VRIPPLE = 200mVP-P
Input Terminated into 10Ω
+0
-10
-20
PSRR (dB)
PSRR (dB)
-30
-40
-50
-60
-70
-80
-90
-100
20
50 100 200 500 1k 2k
+0
-2.5
-5
-7.5
-10
-12.5
-15
-17.5
-20
-22.5
-25
-27.5
-30
-32.5
-35
-37.5
-40
-42.5
-45
-47.5
-50
-52.5
-55
-57.5
-60
20
5k 10k 20k
Figure 16.
Power Supply Rejection vs Frequency
VDD = 5V, AV = 6dB, VRIPPLE = 200mVP-P
Input Terminated into 10Ω
Power Supply Rejection vs Frequency
VDD = 5V, AV = 26dB, VRIPPLE = 200mVP-P
Input Terminated into 10Ω
-10
-20
PSRR (dB)
PSRR (dB)
-30
-40
-50
-60
-70
-80
-90
-100
20
50 100 200 500 1k 2k
+0
-2.5
-5
-7.5
-10
-12.5
-15
-17.5
-20
-22.5
-25
-27.5
-30
-32.5
-35
-37.5
-40
-42.5
-45
-47.5
-50
-52.5
-55
-57.5
-60
20
5k 10k 20k
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 17.
Figure 18.
Power Supply Rejection vs Frequency
VDD = 7.5V, AV = 6dB, VRIPPLE = 200mVP-P
Input Terminated into 10Ω
Power Supply Rejection vs Frequency
VDD = 7.5V, AV = 26dB, VRIPPLE = 200mVP-P
Input Terminated into 10Ω
+0
-10
-20
PSRR (dB)
-30
PSRR (dB)
5k 10k 20k
Figure 15.
+0
-40
-50
-60
-70
-80
-90
-100
20
50 100 200 500 1k 2k
5k 10k 20k
+0
-2.5
-5
-7.5
-10
-12.5
-15
-17.5
-20
-22.5
-25
-27.5
-30
-32.5
-35
-37.5
-40
-42.5
-45
-47.5
-50
-52.5
-55
-57.5
-60
20
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 19.
8
50 100 200 500 1k 2k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 20.
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Typical Performance Characteristics (continued)
Noise Floor
VDD = 3.3V, AV = 6dB, Ri = Rf = 20kΩ
BW < 80kHz, A-weighted
Noise Floor
VDD = 3V, AV = 26dB, Ri = 20kΩ, Rf = 200kΩ
BW < 80kHz, A-weighted
30P
OUTPUT NOISE VOLTAGE (V)
OUTPUT NOISE VOLTAGE (V)
50P
40P
20P
10P
9P
8P
7P
6P
5P
4P
3P
2P
150P
120P
100P
95P
90P
85P
82P
75P
72P
65P
62P
55P
52P
50P
1P
20
50 100 200 500 1k 2k
20
5k 10k 20k
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 21.
Figure 22.
Noise Floor
VDD = 5V, AV = 6dB, Ri = Rf = 20kΩ
BW < 80kHz, A-weighted
Noise Floor
VDD = 5V, AV = 26dB, Ri = 20kΩ, Rf = 200kΩ
BW < 80kHz, A-weighted
30P
OUTPUT NOISE VOLTAGE (V)
OUTPUT NOISE VOLTAGE (V)
50P
40P
20P
10P
9P
8P
7P
6P
5P
4P
3P
2P
150P
120P
100P
95P
90P
85P
82P
75P
72P
65P
62P
55P
52P
50P
1P
20
50 100 200 500 1k 2k
20
5k 10k 20k
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 23.
Figure 24.
Noise Floor
VDD = 7.5V, AV = 6dB, Ri = Rf = 20kΩ
BW < 80kHz, A-weighted
Noise Floor
VDD = 7.5V, AV = 26dB, Ri = 20kΩ, Rf = 200kΩ
BW < 80kHz, A-weighted
30P
OUTPUT NOISE VOLTAGE (V)
OUTPUT NOISE VOLTAGE (V)
50P
40P
20P
10P
9P
8P
7P
6P
5P
4P
3P
2P
150P
120P
100P
95P
90P
85P
82P
75P
72P
65P
62P
55P
52P
50P
1P
20
50 100 200 500 1k 2k
5k 10k 20k
20
50 100 200 500 1k 2k
5k 10k 20k
FREQUENCY (Hz)
FREQUENCY (Hz)
Figure 25.
Figure 26.
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Typical Performance Characteristics (continued)
Power Dissipation
vs Output Power
VDD = 3.3V, RL = 8Ω, f = 1kHz
Power Dissipation
vs Output Power
VDD = 7.5V, RL = 8Ω, f = 1kHz
1600
300
POWER DISSIPATION (mW)
POWER DISSIPATION (mW)
1400
250
200
150
100
50
1200
1000
800
600
400
200
0
0
0
50
100
150
200
250
0
300
200
400
600
800 1000 1200 1400
OUTPUT POWER (mW)
OUTPUT POWER (mW)
Figure 27.
Figure 28.
Supply Current
vs Supply Voltage
RL = 8Ω, VIN = 0V, Rsource = 50Ω
Clipping Voltage vs Supply Voltage
RL = 8Ω,
from top to bottom: Negative Voltage Swing; Positive
Voltage Swing
2.5
1.4
DROPOUT VOPLTAGE (V)
SUPPLY CURRENT (mA)
1.2
2
1.5
1
0.5
1
0.8
0.6
0.4
0.2
0
2
3
4
5
6
7
8
9
0
10
0
2
SUPPLY VOLTAGE (V)
6
8
10
Figure 30.
Output Power vs Supply Voltage
RL = 8Ω,
from top to bottom: THD+N = 10%, THD+N = 1%
Output Power vs Load Resistance
VDD = 3.3V, f = 1kHz
from top to bottom: THD+N = 10%, THD+N = 1%
4
450
3.5
400
OUTPUT POWER (mW)
OUTPUT POWER (mW)
Figure 29.
3
2.5
2
1.5
1
0.5
350
300
250
200
150
100
50
0
0
2.7 3 3.5 4 4.5 5 5.5 6 6.5 7 7.5 8 8.5 9
0
20
40
60
80
100
LOAD RESISTANCE (W)
SUPPLY VOLTAGE (V)
Figure 31.
10
4
SUPPLY VOLTAGE (V)
Figure 32.
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Typical Performance Characteristics (continued)
Output Power vs Load Resistance
VDD = 7.5V, f = 1kHz
from top to bottom: THD+N = 10%, THD+N = 1%
Frequency Response vs Input Capacitor Size
RL = 8Ω
from top to bottom: Ci = 1.0µF, Ci = 0.39µF, Ci = 0.039µF
3000
20
2500
12
OUTPUT LEVEL (dB)
OUTPUT POWER (mW)
16
2000
1500
1000
8
4
0
-4
-8
-12
-16
-20
500
-24
-28
0
8
16
32
48
64
80
20
96 112
LOAD RESISTANCE (W)
50 100 200 500
1k 2k
5k 10k 20k
FREQUENCY (Hz)
Figure 33.
Figure 34.
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APPLICATION INFORMATION
BRIDGE CONFIGURATION EXPLANATION
As shown in Figure 1, the LM4951A consists of two operational amplifiers that drive a speaker connected
between their outputs. The value of input and feedback resistors determine the gain of each amplifier. External
resistors Ri and Rf set the closed-loop gain of AMPA, whereas two 20kΩ internal resistors set AMPB's gain to -1.
Figure 1 shows that AMPA's output serves as AMPB's input. This results in both amplifiers producing signals
identical in magnitude, but 180° out of phase. Taking advantage of this phase difference, a load is placed
between AMPA and AMPB and driven differentially (commonly referred to as "bridge-tied load"). This results in a
differential, or BTL, gain of:
AVD = 2(Rf/ Ri)
(V/V)
(1)
Bridge mode amplifiers are different from single-ended amplifiers that drive loads connected between a single
amplifier's output and ground. For a given supply voltage, bridge mode has an advantage over the single-ended
configuration: its differential output doubles the voltage swing across the load. Theoretically, this produces four
times the output power when compared to a single-ended amplifier under the same conditions. This increase in
attainable output power assumes that the amplifier is not current limited and that the output signal is not clipped.
Under rare conditions, with unique combinations of high power supply voltage and high closed loop gain settings,
the LM4951A may exhibit low frequency oscillations.
Another advantage of the differential bridge output is no net DC voltage across the load. This is accomplished by
biasing AMP1's and AMP2's outputs at half-supply. This eliminates the coupling capacitor that single supply,
single-ended amplifiers require. Eliminating an output coupling capacitor in a typical single-ended configuration
forces a single-supply amplifier's half-supply bias voltage across the load. This increases internal IC power
dissipation and may permanently damage loads such as speakers.
POWER DISSIPATION
The LM4951A's dissipation when driving a BTL load is given by Equation 2. For a 7.5V supply and a single 8Ω
BTL load, the dissipation is 1.42W.
PDMAX-MONOBTL = 4(VDD) 2/ 2π2RL
(W)
(2)
The maximum power dissipation point given by Equation 2 must not exceed the power dissipation given by
Equation 3:
PDMAX = (TJMAX - TA) / θJA
(3)
The LM4951A's TJMAX = 150°C. In the SD package, the LM4951A's θJA is 73°C/W when the metal tab is soldered
to a copper plane of at least 1in2. This plane can be split between the top and bottom layers of a two-sided PCB.
Connect the two layers together under the tab with an array of vias. At any given ambient temperature TA, use
Equation 3 to find the maximum internal power dissipation supported by the IC packaging. Rearranging
Equation 3 and substituting PDMAX for PDMAX' results in Equation 4. This equation gives the maximum ambient
temperature that still allows maximum stereo power dissipation without violating the LM4951A's maximum
junction temperature.
TA = TJMAX - PDMAX-MONOBTLθJA (°C)
(4)
For a typical application with a 7.5V power supply and a BTL 8Ω load, the maximum ambient temperature that
allows maximum stereo power dissipation without exceeding the maximum junction temperature is 46°C for the
SD package.
TJMAX = PDMAX-MONOBTLθJA + TA (°C)
(5)
Equation 5 gives the maximum junction temperature TJMAX. If the result violates the LM4951A's maximum
junction temperature of 150°C, reduce the maximum junction temperature by reducing the power supply voltage
or increasing the load resistance. Further allowance should be made for increased ambient temperatures.
The above examples assume that a device is operating around the maximum power dissipation point. Since
internal power dissipation is a function of output power, higher ambient temperatures are allowed as output
power or duty cycle decreases.
12
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If the result of Equation 2 is greater than that of Equation 3, then decrease the supply voltage, increase the load
impedance, or reduce the ambient temperature. Further, ensure that speakers rated at a nominal 8Ω do not fall
below 6Ω. If these measures are insufficient, a heat sink can be added to reduce θJA. The heat sink can be
created using additional copper area around the package, with connections to the ground pins, supply pin and
amplifier output pins. Refer to the Typical Performance Characteristics curves for power dissipation information at
lower output power levels.
POWER SUPPLY BYPASSING
As with any power amplifier, proper supply bypassing is critical for low noise performance and high power supply
rejection. Applications that employ a voltage regulator typically use a 10µF in parallel with a 0.1µF filter
capacitors to stabilize the regulator's output, reduce noise on the supply line, and improve the supply's transient
response. However, their presence does not eliminate the need for a local 1.0µF tantalum bypass capacitance
connected between the LM4951A's supply pins and ground. Do not substitute a ceramic capacitor for the
tantalum. Doing so may cause oscillation. Keep the length of leads and traces that connect capacitors between
the LM4951A's power supply pin and ground as short as possible. Connecting a larger capacitor, CBYPASS,
between the BYPASS pin and ground improves the internal bias voltage's stability and improves the amplifier's
PSRR. The PSRR improvements increase as the bypass pin capacitor value increases. Too large, however,
increases turn-on time and can compromise the amplifier's click and pop performance. The selection of bypass
capacitor values, especially CBYPASS, depends on desired PSRR requirements, click and pop performance,
system cost, and size constraints.
MICRO-POWER SHUTDOWN
The LM4951A features an active-low micro-power shutdown mode. When active, the LM4951A's micro-power
shutdown feature turns off the amplifier's bias circuitry, reducing the supply current. The low 0.01µA typical
shutdown current is achieved by applying a voltage to the SHUTDOWN pin that is as near to GND as possible. A
voltage that is greater than GND may increase the shutdown current.
SELECTING EXTERNAL COMPONENTS
Input Capacitor Value Selection
Two quantities determine the value of the input coupling capacitor: the lowest audio frequency that requires
amplification and desired output transient suppression.
As shown in Figure 1, the input resistor (Ri) and the input capacitor (Ci) create a high-pass filter. The cutoff
frequency can be found using Equation 6.
fc = 1/2πRiCi (Hz)
(6)
As an example when using a speaker with a low frequency limit of 50Hz, Ci, using Equation 6 is 0.159µF with Ri
set to 20kΩ. The values for Ci and Ri shown in Figure 1 allow the LM4951A to drive a high efficiency, full range
speaker whose response extends down to 20Hz.
Selecting Value A For RC
The LM4951A is designed for very fast turn on time. The CCHG pin allows the input capacitor to charge quickly to
improve click/pop performance. RC protects the CCHG pin from any over/under voltage conditions caused by
excessive input signal or an active input signal when the device is in shutdown. The recommended value for RC
is 1kΩ. If the input signal is less than VDD+0.3V and greater than -0.3V, and if the input signal is disabled when in
shutdown mode, RC may be shorted out.
OPTIMIZING CLICK AND POP REDUCTION PERFORMANCE
The LM4951A contains circuitry that eliminates turn-on and shutdown transients ("clicks and pops"). For this
discussion, turn-on refers to either applying the power supply voltage or when the micro-power shutdown mode
is deactivated.
As the VDD/2 voltage present at the BYPASS pin ramps to its final value, the LM4951A's internal amplifiers are
configured as unity gain buffers. An internal current source charges the capacitor connected between the
BYPASS pin and GND in a controlled manner. Ideally, the input and outputs track the voltage applied to the
BYPASS pin.
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The gain of the internal amplifiers remains unity until the voltage on the bypass pin reaches VDD/2. As soon as
the voltage on the bypass pin is stable, there is a delay to prevent undesirable output transients (“click and
pops”). After this delay, the device becomes fully functional.
THERMAL SHUTDOWN AND SHORT CIRCUIT PROTECTION
The LM4951A has thermal shutdown and short circuit protection to fully protect the device. The thermal
shutdown circuit is activated when the die temperature exceeds a safe temperature. The short circuit protection
circuitry senses the output current. When the output current exceeds the threshold under a short condition, a
short will be detected and the output deactivated until the short condition is removed. If the output current is
lower than the threshold then a short will not be detected and the outputs will not be deactivated. Under such
conditions the die temperature will increase and, if the condition persist to raise the die temperature to the
thermal shutdown threshold, initiate a thermal shutdown response. Once the die cools the outputs will become
active.
RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT
Figures 2–4 show the recommended two-layer PC board layout that is optimized for the SD10A. This circuit is
designed for use with an external 7.5V supply 8Ω (min) speakers.
Demonstration Board Circuit
Figure 35. Demo Board Circuit
14
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Demonstration Board Layout
Figure 36. Top Silkscreen
Figure 37. Top Layer
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Figure 38. Bottom Layer
Bill Of Materials
Table 1. Bill Of Materials
Designator
Value
Tolerance
RIN1
20kΩ
1%
1/8W, 0805 Resistor
Part Description
R1
200kΩ
1%
1/8W, 0805 Resistor
RPULLUP
100kΩ
1%
1/8W, 0805 Resistor
R2
1kΩ
1%
1/8W, 0805 Resistor
R4, R5
0Ω
1%
1/8W, 0805 Resistor
Comments
CIN1
0.39μF
10%
Ceramic Capacitor, 25V, Size 1206
CSUPPLY
4.7μF
10%
16V Tantalum Capacitor, Size A
CBYPASS
1μF
10%
16V Tantalum Capacitor, Size A
C1
Not Used
0.100” 1x2 header, vertical mount
U1
16
Input, Output, Vdd/GND Shutdown
LM4951A, Mono, 1.8W, Audio Amplifier
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REVISION HISTORY
Rev
Date
1.0
08/13/08
Initial release.
Description
1.01
09/05/08
Text edits.
Changes from Revision B (April 2013) to Revision C
•
Page
Changed layout of National Data Sheet to TI format .......................................................................................................... 16
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PACKAGE OPTION ADDENDUM
www.ti.com
14-Feb-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
LM4951ASD/NOPB
ACTIVE
WSON
DPR
10
1000
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
4951ASD
LM4951ASDX/NOPB
ACTIVE
WSON
DPR
10
4500
Green (RoHS
& no Sb/Br)
CU SN
Level-1-260C-UNLIM
-40 to 85
4951ASD
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
14-Feb-2014
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
LM4951ASD/NOPB
WSON
DPR
10
1000
178.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
LM4951ASDX/NOPB
WSON
DPR
10
4500
330.0
12.4
4.3
4.3
1.3
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Oct-2013
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
LM4951ASD/NOPB
WSON
DPR
10
1000
210.0
185.0
35.0
LM4951ASDX/NOPB
WSON
DPR
10
4500
367.0
367.0
35.0
Pack Materials-Page 2
MECHANICAL DATA
DPR0010A
SDC10A (Rev A)
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