AS5C4009

AS5C4009
SRAM
AS5C4009
512K x 8 SRAM
Ultra Low Power SRAM
PIN ASSIGNMENT
AVAILABLE AS MILITARY
SPECIFICATION
(Top View)
32-Pin DIP, 32-Pin SOJ
& 32-Pin TSOP
• SMD 5962-956131,2
• MIL STD-8831
FEATURES
A18
1
32
Vcc
• Ultra Low Power with 2V Data Retention
(0.2mW MAX worst case Power-down standby)
• Fully Static, No Clocks
• Single +5V ±10% power supply
• Easy memory expansion with CE\ and OE\ options
• All inputs and outputs are TTL-compatible
• Three state outputs
• Operating temperature range:
Ceramic -55oC to +125oC & -40oC to +85oC
Plastic
-40oC to +85oC3
A16
2
31
A15
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/01
I/02
I/03
Vss
3
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A17
WE\
1. Not applicable to plastic package
2. Applies to CW package only.
3. Contact factory for -55oC to +125oC
OPTIONS
MARKING
• Timing
55ns access
-554
70ns access
-70
85ns access
-85
100ns access
-100
• Packages
Ceramic Dip (600 mil)
CW
Ceramic SOJ5
ECJ
Plastic TSOP
DG
• Options
2V data retention/very low power L
GENERAL DESCRIPTION
The AS5C4009 is organized as 524,288 x 8 SRAM utilizing a
special ultra low power design process. Micross’ pinout adheres to the
JEDEC standard for pinout on 4 megabit SRAMs. The evolutionary 32
pin version allows for easy upgrades from the 1 meg SRAM design.
For flexibility in memory applications, Micross offers chip enable
(CE\) and output enable (OE\) capabilities. These features can place
the outputs in High-Z for additional flexibility in system design.
This devices operates from a single +5V power supply and all
inputs and outputs are fully TTL-compatible.
Writing to these devices is accomplished when write enable
(WE\) and CE\ inputs are both LOW. Reading is accomplished when
WE\ remains HIGH and CE\ and OE\ go LOW. The device offers
a reduced power standby mode when disabled, by lowering VCC to
2V and maintaining CE\ = 2V. This allows system designers to meet
ultra low standby power requirements.
tions.
Function
Write Enable Input
Chip Select Input
Output Enable Input
Address Inputs
Data Inputs/Outputs
Power
Ground
For more products and information
please visit our web site at
www.micross.com
AS5C4009
Rev. 5.2 01/10
A13
A8
A9
A11
OE\
A10
CE\
I/08
I/07
I/06
I/05
I/04
No. 112
No. 502
No. 1002
4. For DG package, contact factory
5. Contact Factory
NOTE: Not all combinations of operating temperature, speed, data retention and low power are
necessarily available. Please contact the factory for availability of specific part number combina-
Pin Name
WE\
CE\
OE\
A0 - A18
I/O1 - I/O8
Vcc
Vss
4
5
6
7
8
9
10
11
12
13
14
15
16
Micross Components reserves the right to change products or specifications without notice.
1
SRAM
AS5C4009
FUNCTIONAL BLOCK DIAGRAM
Clk. gen.
Precharge circuit
A18
A16
A14
A12
A7
Memory Array
1024 rows
512 x 8 columns
Row
select
A6
A5
A4
A1
A0
I/O1
I/O Circuit
Data
cont
I/O8
Column Select
Data
cont
A9
A8
A13
A17 A15
A10 A11
A3
A2
CE\
WE\
Control
logic
OE\
AS5C4009
Rev. 5.2 01/10
Micross Components reserves the right to change products or specifications without notice.
2
SRAM
AS5C4009
ABSOLUTE MAXIMUM RATINGS*
Voltage on Vcc Supply Relative to Vss...................-.5V to +7.0V
Voltage on any pin Relative to Vss..........................-.5V to +7.0V
Storage Temperature ....................................-65°C to +150°C
Operating Temperature Range.............................-55oC to +125oC
Soldering Temperature Range...............................................260oC
Maximum Junction Temperature**....................................+150°C
Power Dissipation...................................................................1.0W
*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those
indicated in the operation section of this specification is
not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
** Junction temperature depends upon package type,
cycle time, loading, ambient temperature and airflow.
ELECTRICAL CHARACTERISTICS AND RECOMMENDED DC OPERATING CONDITIONS
(-55oC < TA < 125oC; Vcc = 5V +10%)
SYMBOL
ILI
MIN
-5
MAX
5
UNITS
μΑ
Output Leakage Current
(CE\=VIH or OE\=VIH or WE\=VIL, VIO=VSS to VCC)
ILO
-5
5
μΑ
Output Low Voltage (IOL = 2.1mA)
VOL
--
0.4
V
15
Output High Voltage (IOH = -1.0 mA)
VOH
2.4
--
V
15
Supply Voltage
VCC
4.5
5.5
V
15
Input High (Logic 1) Voltage
VIH
2.2
Vcc +0.5
V
1, 15
Input Low (Logic 0) Voltage
VIL
-0.5
0.8
V
2, 15
PARAMETER/CONDITION
Input Leakage Current (VIN = VSS to VCC)
SYM
-55
MAX
-70
-85
Cycle Time = Min., 100%
Duty Cycle, IIO = 0mA,
CE\ = VIL, VIN = VIH or VIL
Icc1
100
90
80
70
mA
TTL
CE\ = VIH,
Other inputs = VIL or VIH
ISB
6
6
6
6
mA
CMOS
CE\ = Vcc -0.2V,
Other inputs = 0 ~ Vcc
ISB1
0.75
0.75
0.75
0.75
mA
PARAMETER
CONDITIONS
Power Supply Current:
Operating
Power Supply Current:
Standby
AS5C4009
Rev. 5.2 01/10
NOTES
-100 UNITS NOTES
3
Micross Components reserves the right to change products or specifications without notice.
3
SRAM
AS5C4009
CAPACITANCE
CONDITIONS
PARAMETER
Input Capacitance
Input/Output Capactiance
TA = 25oC, f = 1MHz
VCC = 5V
SYMBOL
MAXIMUM
UNITS
NOTES
VIN=0V
CIN
8
pF
4
VIO=0V
CIO
10
pF
4
ELECTRICAL CHARACTERISTICS AND RECOMMENDED AC OPERATING CONDITIONS
(-55oC < TA < 125oC; Vcc = 5V +10%)
DESCRIPTION
SYM
-55
MIN MAX
-70
MIN MAX
-85
MIN MAX
-100
MIN MAX UNITS NOTES
READ Cycle
READ cycle Time
t RC
Address access time
t AA
55
70
85
100
ns
Chip Enable access time
t ACE
55
70
85
100
ns
Output hold from address change
t OH
10
10
10
10
ns
Chip Enable to output in Low-Z
t LZCE
10
10
10
10
ns
4,6
Chip disable to output in High-Z
t HZCE
ns
4,6
ns
4
4
55
70
20
85
25
100
30
ns
30
Chip Enable to power-up time
t PU
Chip disable to power-down time
t PD
55
70
85
100
ns
Output Enable access time
t AOE
30
35
40
45
ns
Output Enable to output in Low-Z
t LZOE
Output disable to output in High-Z
WRITE Cycle
t HZOE
0
0
5
0
5
20
0
5
25
5
30
30
ns
4,6
ns
4,6
WRITE cycle time
t WC
55
70
85
100
ns
Chip Enable to end of write
t CW
50
60
70
80
ns
Address valid to end of write
t AW
50
60
70
80
ns
Address setup time
t AS
0
0
0
0
ns
Address hold from end of write
t AH
0
0
0
0
ns
t WP1
50
60
70
80
ns
Data setup time
t DS
30
30
35
40
ns
Data hold time
t DH
0
0
0
0
ns
Write disable to output in Low-Z
t LZWE
5
5
5
5
ns
4,6
Write Enable to output in High-Z
t HZWE
ns
4,6
WRITE pulse width
AS5C4009
Rev. 5.2 01/10
25
25
30
30
Micross Components reserves the right to change products or specifications without notice.
4
SRAM
AS5C4009
AC TEST CONDITIONS
Input pulse levels ................................... Vss to 3.0V
Input rise and fall times ....................................... 3ns
Input timing reference levels ............................. 1.5V
Output reference levels ..................................... 1.5V
Output load ......................................... See Figures 1
50 167
ohms
ohms
Q
1.73V
C C=30pF
= 100pF
Fig. 1 Output Load Equivalent
NOTES
1.
2.
3.
4.
5.
6.
7.
8.
9.
Overshoot: Vcc +3.0V for pulse width < 20ms.
Undershoot: -3V for pulse width < 20ms.
ICC is dependent on output loading and cycle rates.
This parameter is guaranteed but not tested.
Test conditions as specified with the output loading
as shown in Fig. 1 unless otherwise noted.
At any given temperature and voltage condition,
tHZCE is less than tLZCE, and tHZWE is less than
tLZWE.
WE\ is HIGH for READ cycle.
Device is continuously selected. Chip enables and
output enables are held in their active state.
Address valid prior to, or coincident with, latest
occurring chip enable.
10. tRC = Read Cycle Time.
11. Chip enable and write enable can initiate and
terminate a WRITE cycle.
12. Output enable (OE\) is inactive (HIGH).
13. Output enable (OE\) is active (LOW).
14. ASI does not warrant functionality nor reliability of
any product in which the junction temperature
exceeds 150°C. Care should be taken to limit power to
acceptable levels.
15. All voltage referenced to Vss (GND).
DATA RETENTION ELECTRICAL CHARACTERISTICS
DESCRIPTION
VCC for Retention Data
CONDITIONS
SYMBOL
VDR
MIN
2
MAX
UNITS
V
CE\ > (VCC - 0.2V)
VCC = 2V
ICCDR
100
μA
VIN > (VCC - 0.2V)
VCC = 3V
ICCDR
200
μA
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
AS5C4009
Rev. 5.2 01/10
NOTES
tCDR
0
ns
4
tR
5
ms
4, 10
Micross Components reserves the right to change products or specifications without notice.
5
SRAM
AS5C4009
LOW VCC DATA RETENTION WAVEFORM
CE\ Controlled
VCC
4.5V
tSDR
tRDR
Data Retention
2.2V
VDR
CE\ > Vcc - 0.2V
CE\
GND
READ CYCLE NO. 1 1
(Address Controlled, CE\ = OE\ = VIL, WE\ = VIH)
tRC
ADDRESS
tAA
tOH
DATA OUT
Previous Data Valid
Data Valid
READ CYCLE NO. 2 2
(WE\ = VIH)
tRC
ADDRESS
tAA
tOH
tCO1
CE\
tHZ
tOE
OE\
tOHZ
DATA OUT
High-Z
tLZ
tOLZ
Data Valid
Don’t Care
Undefined
AS5C4009
Rev. 5.2 01/10
Micross Components reserves the right to change products or specifications without notice.
6
SRAM
AS5C4009
WRITE CYCLE NO. 1
(WE Controlled)
tWC
ADDRESS
tCW(4)
CE\
tAW
tWP(3)
WE\
tDW
tDH
Data Valid
DATA IN
tWHZ
DATA OUT
tOW
Data Undefined
WRITE CYCLE NO. 2
(Write Enabled Controlled)
tWC
ADDRESS
tCW(4)
CE\
tAW
tWP(3)
WE\
tDW
Data Valid
DATA IN
DATA OUT
NOTES:
AS5C4009
Rev. 5.2 01/10
tDH
High-Z
High-Z
1. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels.
2. At any given temperature adn voltage condition, tHZ (MAX) is less than tLZ (MIN) both for a given device and from device to
device interconnection.
3. A write occurs during the overlap of a low CE\ adn a low WE\. A write begins at the latest transistion among CE\ going Low and
WE\ going Low: A write end at the earliest transistion among CE\ going High and WE\ going High, tWP is measured from the
beginning of write to the end of write.
4. tCW is measured from the CE\ going Low to end of write.
5. tAS is measured from the address valid to the beginning of write.
6. tWR is measure from the end of write to the address change. tWR applied in case a write ends are CE\ or WE\ going High.
Micross Components reserves the right to change products or specifications without notice.
7
SRAM
AS5C4009
MECHANICAL DEFINITION*
Micross Case #112 (Package Designator CW)
D
A
L
L1
b
e
Pin 1
b1
E
b2
E1
SYMBOL
A
b
b1
b2
D
E
E1
e
L
L1
MICROSSPACKAGESPECIFICATIONS
MIN
MAX
0.089
0.111
0.016
0.020
0.045
0.055
0.008
0.012
1.585
1.615
0.585
0.605
0.590
0.610
0.090
0.110
0.040
0.060
0.125
0.175
*All measurements are in inches.
AS5C4009
Rev. 5.2 01/10
Micross Components reserves the right to change products or specifications without notice.
8
SRAM
AS5C4009
MECHANICAL DEFINITION*
Micross Case #502 (Package Designator ECJ)
A
b1
b2
e
D
L
D1
E1
b
A1
E
SYMBOL
A
A1
A2
b
D
D1
E
E2
e
L
L2
MICROSS SPECIFICATIONS
MIN
MAX
0.115
0.160
0.054
0.075
0.025
0.063
0.012
0.028
0.815
0.835
0 740
0.740
0 760
0.760
0.418
0.460
0.460
0.440
0.050 BSC
0.050
0.070
0.115
0.135
*All measurements are in inches.
AS5C4009
Rev. 5.2 01/10
Micross Components reserves the right to change products or specifications without notice.
9
SRAM
AS5C4009
MECHANICAL DEFINITION*
Micross Case #1002 (Package Designator DG)
0 - 8°
0.463±0.008
0.400 TYP
0.018 ~ 0.030
0.006 +0.004/-0.002
0.841 MAX
0.825 ± 0.004
0.039 ± 0.004
0.002 MIN
0.016 ± 0.004
0.037 TYP
0.047 MAX
0.004 MAX
0.050 TYP
*All measurements are in inches.
AS5C4009
Rev. 5.2 01/10
Micross Components reserves the right to change products or specifications without notice.
10
SRAM
AS5C4009
ORDERING INFORMATION
EXAMPLE: AS5C4009CW-55L/XT
Device Number
AS5C4009
AS5C4009
AS5C4009
AS5C4009
Package
Type
CW
CW
CW
CW
Speed
ns
-55
-70
-85
-100
EXAMPLE: AS5C4009DG-70/IT
Device Number
AS5C4009
AS5C4009
AS5C4009
AS5C4009
Package
Type
DG
DG
DG
DG
1
EXAMPLE: AS5C4009ECJ-85L/883C
Options** Process
L
L
L
L
Device Number
/*
/*
/*
/*
AS5C4009
AS5C4009
AS5C4009
AS5C4009
Package
Type
ECJ
ECJ
ECJ
ECJ
Speed
ns
-55
-70
-85
-100
1
Options** Process
L
L
L
L
/*
/*
/*
/*
2
Speed
ns
-55
-70
-85
-100
Options** Process
L
L
L
L
/*
/*
/*
/*
*AVAILABLE PROCESSES
IT = Industrial Temperature Range
XT = Extended Temperature Range
883C = Full Military Processing
-40oC to +85oC
-55oC to +125oC
-55oC to +125oC
** OPTIONS
L = 2V Data Retention/Ultra Low Power
NOTES:
1. All CSOJ devices, please consult factory. Not all combinations of operating temperature,
speed, data retention and low power are necessarily available. Please contact the factory for
availability of specific part number combinations.
2. Plastic devices not available as 883. For XT or 55ns devices, contact factory.
AS5C4009
Rev. 5.2 01/10
Micross Components reserves the right to change products or specifications without notice.
11
SRAM
AS5C4009
MICROSS TO DSCC PART NUMBER
CROSS REFERENCE
FOR 5962-95613
Package Designator CW
Micross Part #
AS5C4009CW-120/H
AS5C4009CW-120L/H
AS5C4009CW-100/H
AS5C4009CW-100L/H
AS5C4009CW-85/H
AS5C4009CW-85L/H
AS5C4009CW-70/H
AS5C4009CW-70L/H
SMD Part
5962-9561301HYA
5962-9561315HYA
5962-9561302HYA
5962-9561316HYA
5962-9561303HYA
5962-9561317HYA
5962-9561304HYA
5962-9561318HYA
AS5C4009CW-120/H
AS5C4009CW-120L/H
AS5C4009CW-100/H
AS5C4009CW-100L/H
AS5C4009CW-85/H
AS5C4009CW-85L/H
AS5C4009CW-70/H
AS5C4009CW-70L/H
5962-9561301HYC
5962-9561315HYC
5962-9561302HYC
5962-9561316HYC
5962-9561303HYC
5962-9561317HYC
5962-9561304HYC
5962-9561318HYC
* ASI part number is for reference only. Orders received referencing the SMD part number will be processed per the SMD.
AS5C4009
Rev. 5.2 01/10
Micross Components reserves the right to change products or specifications without notice.
12
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