FLIR ISC0403 Specifications

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FLIR ISC0403 Specifications | Manualzz

FLIR IS C0403

S ta nda rd 640x512 R O IC (15u mx15um P i xe l)

Version 100 – initial release Nov. 2004 for version 100 of the ROIC design

Version 200 – updated release per version 200 of the ROIC design – July 2005

ISC0403

Standard 640x512 ROIC

(15umx15um Pixel)

This presentation contains information that is proprietary to FLIR Systems.

Information is subject to change without notice.

1

FLIR IS C0403

S ta nda rd 640x512 R O IC (15u mx15um P i xe l)

ROIC

PARAMETER

SPECIFICATION

REQUIREMENT

COMMENTS

Array Configuration

Pixel Size in

Columns

Detector Impedance

640 x 512

15um

> 10x10 3 (Ohm.cm

2 ) Used for Simulation

Detector Capacitance ≤ 0.1pF Used for Simulation

Crosstalk

Signal Loss due to Fill Factor

Hybridization

< 20%

< 5%

Indium Bump

2

FLIR IS C0403

S ta nda rd 640x512 R O IC (15u mx15um P i xe l)

ISC0403 Specification and Requirements Review (1 of 6)

COMMENTS ROIC

PARAMETER

Array Configuration

Pixel Pitch in

Columns

Pixel Pitch in Rows

SPECIFICATION

REQUIREMENT

640 x 512

15um

15um

Input Polarity P-on-N

Input Configuration

Core Multiplexing

Configuration

Detector Impedance

Detector Capacitance

Direct Injection (DI)

Voltage Mode

≥ 10x10 3 (Ohm.cm

2 )

≤ 0.1pF

(Current Flows into Inputs) InSb,

InGaAs, HCT

Used for Simulation

Used for Simulation

Temperature of Operation 80K

(Liquid Nitrogen

Temperature)

All specification specified for 80K. Room temperature operation will have reduced performance

3

FLIR IS C0403

S ta nda rd 640x512 R O IC (15u mx15um P i xe l)

ISC0403 Specification and Requirements Review (2 of 6)

ROIC

PARAMETER

SPECIFICATION

REQUIREMENT

COMMENTS

Input Biases

Input Clocks

Input Clock

Outputs

VPOS

VPOSOUT

VPOSD

VPD

VNEG

VNEGOUT

VND

VREF

3.6V

3.6V

3.6V

3.6V

0.0V

0.0V

0.0V

1V

Name

CLK

LSYNC

FSYNC

DATA

RESET_B

Vhigh to Vlow

VPD to VND

VPD to VND

VPD to VND

VPD to VND

VPD to VND

10% to 90% in 10nS

Selectable 1, 2 or 4 with

Reference Output

Analog Positive Output

Positive Supply

Digital Positive for level shifter

Digital Positive

Note: VPD Voltage Should = VPOSOUT Voltage

Analog Negative

Output Neg Supply

Digital Negative

Analog Reference VREF1V

(Option: Internal or external reference)

 7 feedthroughs + 1 optional (VREF)

Master Clock

Line Sync

Frame Sync (Integ. Control)

Mode Control

Master Reset (optional)

 4 feedthroughs + 1 optional (RESET_B)

Default = 1 outputs

 4 feedthroughs + 1 optional reference

Minimum of 15 feedthroughs (4 outputs) + 3 optional VREF, RESET_B, OUTR

Minimum of 12 feedthroughs (1 output) + 3 optional VREF, RESET_B, OUTR

4

FLIR IS C0403

S ta nda rd 640x512 R O IC (15u mx15um P i xe l)

ISC0403 Specification and Requirements Review (3 of 6)

ROIC

PARAMETER

Power

Control Register

Functions

SPECIFICATION

REQUIREMENT

COMMENTS

No reference output

@ Max Tint @ Min Tint

≤ 35 mW

≤ 45 mW

≤ 62 mW

≤ 45 mW

≤ 54 mW

≤ 71 mW

1 Output

2 Outputs

4 Outputs

With 6 reference columns + one reference output

@ Max Tint @ Min Tint

≤41 mW

≤ 50 mW

≤ 67 mW

≤ 50 mW

≤ 59 mW

≤ 77 mW

1 Output

2 Outputs

4 Outputs

Programmable Test I/O

Anti-blooming control

Power Control

Master Current

Detector Bias Adj.

Invert/Revert

Windowing (programmable size and position) 1,

2 or 4 Outputs

Integration Mode (ITR, IWR, NDRO)

Reference Output Enable

Global Reset

Estimated Values

@ Max Tint @ Min Tint

32mW est 41mW est

41mW est 50mW est

57mW est 66mW est

Estimated Values

@ Max Tint @ Min Tint

37mW est 46mW est

46mW est 55mW est

62mW est 71mW est

Default = 1 outputs

5

FLIR IS C0403

S ta nda rd 640x512 R O IC (15u mx15um P i xe l)

Programmable

Test

Test Row Input

Unit Cell Test Injection

VET Circuit

Detector Bias

Adjust

-100mV to 500mV Adjustment

@ nominal current (1nA)

7 bit bias control

6

FLIR IS C0403

S ta nda rd 640x512 R O IC (15u mx15um P i xe l)

ISC0403 Specification and Requirements Review (4 of 6)

ROIC PARAMETER SPECIFICATION

REQUIREMENT

COMMENTS

Input Current From 10pA to 0.5nA

Input Charge Handling

Non- Linearity

Output Interface

Output Voltage Swing

≥ 6.5 x10 6 carriers

< ± 0.5%from least squares line fit

≥ 100k Ohms

≤ 15pF external capacitance

2.0V ± 0.2V

(Baseline ≈ 1.0V ± 0.1V)

Used for simulations

Depends on f number and background temperature

C

INT

+C

SH

=0.578pF at 2V  7.20x10

6 carriers

Output Voltage vs. Tint

Max Dev. from least squares fit over

10% to 80% of full range (unique range for each power setting)

25pF total load capacitance, including bond pad, bonding wire

With Defaults:

≈ 1.8V ± 0.2V Typical Output Range at 300k

≈ 2V ± 0.2V Typical Output Range at 80K

Noise Output Noise

Input referred noise

200uV

715 e-

Signal-to-Noise Ratio 80dB

RMS

Spec values are theoretical plus 10%

Without Detector or System Noise

7

FLIR IS C0403

S ta nda rd 640x512 R O IC (15u mx15um P i xe l)

ISC0403 Specification and Requirements Review (5 of 6)

COMMENTS ROIC

PARAMETER

SPECIFICATION

REQUIREMENT

Column Output Order 1

Output Mode Output A

2 Output Mode

Output A

Output B

4 Output Mode

Output A

Output B

Output C

Output D

Column 0,1,…,639

Column 0,2,…,638

Column 1,3,…,639

Column 0,4,…,636

Column 1,5,…,637

Column 2,6,…,638

Column 3,7,…,639

One Output Mode

Normal Readout Direction

Two Output Mode

Normal Readout Direction

Four Output Mode

Normal Readout Direction

Invert / Revert

Temperature Sensor

Reverse Order of Rows and/or Columns

0.75V ± 0.05V @ 300K

1.05V ± 0.05V at 77K

Select using

Control Register

Test/Temp Pad

Measured values on ISC0403_V1

 1 additional feedthrough

8

FLIR IS C0403

S ta nda rd 640x512 R O IC (15u mx15um P i xe l)

ISC0403 Specification and Requirements Review (6 of 6)

ROIC

PARAMETER

SPECIFICATION

REQUIREMENT

COMMENTS

Full Frame Rate

Pixel Rate 12MHz

1

Output ≥ 30 FPS

2

Output ≥ 60 FPS

4 Output ≥ 120 FPS

CLK rate = 6MHz

Output rate = 12MHz

Data Valid /

Settling

Time

Adjacent Pixel

Crosstalk (ROIC)

Settle to 0.1% @ T=80K in ≤ 55ns

Settle to 0.8% @ T=300K in ≤ 55ns

< 0.1% @ T=80K

< 0.8% @ T=300K

External load capacitance 15pF //

100kload

As simulated at room temp.

Non-Adjacent

Pixel Crosstalk

(ROIC)

Minimum Window

Size (Max Frame

Rate)

Die Size

< 0.1% @ T=80K

< 0.8% @ T=300K

4 columns x 4 Rows

8 columns x 4 Rows

16 columns x 4 Rows

12.5 mm x 11.43 mm

1 Output Mode (4.16kF/s) 2

Output Mode (4.16kF/s) 4

Output Mode (4.16kF/s)

Layout dimension (to scribe line edge)

NOT physical die size

Optical center offset ∆x=0, ∆y=+435um

9

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