Download datasheet for AK581024AS by Accutek Microcircuit Corporation

Download datasheet for AK581024AS by Accutek Microcircuit Corporation
AK581024AG / AK581024AS
1,048,576 x 8 bit CMOS
Dynamic Random Access Memory
ACCUTEK
MICROCIRCUIT
CORPORATION
DESCRIPTION
Front View
The Accutek AK581024 high density memory modules is a random
access memory organized in 1 Meg x 8 bit words. The assembly
consists of two 1 Meg x 4 DRAMs in surface mount packages
mounted to a printed circuit board. The module can be configured
as a leadless 30 pad SIMM or a leaded 30 pin SIP. This packaging
approach provides a better than 6 to 1 density increase over standard DIP packaging.
30-Pin SIM
+
+
30
1
The operation of the AK581024 is identical to two 1 Meg x 4 DRAMs.
The data input/output is brought out separately for each 1 Meg x 4
device, with common RAS, CAS and WE control. The OE pins are
tied to Vss which dictates the use of early-write cycles to prevent
contention of D and Q. Since the Write-Enable (WE) signal must always go low before CAS in a write cycle, Read-Write and
Read-Modify-Write operation is not possible.
30-Pin SIP
+
+
1
FEATURES
· 1 Meg x 8 bit organization
· 1.10 Watt active and 23.5 mWatt standby (max)
· Optional 30 Pad SIM (Single In-Line Module) or 30 Pin leaded
SIP (Single In-Line Package)
· Operating free air temperature: 00 to 700C
· JEDEC approved pinout
· Upward compatible with AK584096 and AK5816384
· Functionally and Pin compatible with AK481024
· Common CAS, RAS and WE control for eight DQ lines
· Separate CAS control for one separate pair of D and Q lines
· Available with access times of 60 to 100 nS
· 1024 refresh cycles/16ms, A0 to A9
PIN NOMENCLATURE
FUNCTIONAL DIAGRAM
PIN #
SYMBOL
PIN #
SYMBOL
1
Vcc
16
DQ5
Address Inputs
2
CAS
17
A8
Column Address Strobe
3
DQ1
18
A9
4
A0
19
NC
DQ6
DQ1 - DQ8
Data In/Data Out
A0 - A9
CAS
PIN ASSIGNMENT
RAS
Row Address Strobe
5
A1
20
WE
Write Enable
6
DQ2
21
WE
Vcc
5v Supply
7
A2
22
Vss
Vss
Ground
DQ7
NC
No Connect
8
A3
23
9
Vss
24
NC
10
DQ3
25
DQ8
11
A4
26
NC
MODULE OPTIONS
12
A5
27
RAS
13
DQ4
28
NC
Leadless SIM: AK581024ASP
14
A6
29
NC
15
A7
30
Vcc
Leaded SIP: AK581024AGP
EXAMPLES:
ORDERING INFORMATION
AK581024ASP-60
PART NUMBER CODING INTERPRETATION
Position
1
2
3
4
5
6
7
8
AK581024AGP-70
1 Meg x 8, Dynamic RAM, Leaded SIP, Page Mode Commercial,
70 nSEC AccessTime
MECHANICAL DIMENSIONS
Inches
0.260
0.240
0.085
0.075
0.325
0.275
0.505
0.495
+
1
+
1
0.100
T.P.
3.510
3.490
3.110
3.090
+
30
+
Product
AK = Accutek Memory
Type
4 = Dynamic RAM
5 = CMOS Dynamic RAM
6 = Static RAM
Organization/Word Width
1 = by 1 16 = by 16
4 = by 4 32 = by 32
8 = by 8 36 = by 36
9 = by 9
Size/Bits Depth
64 = 64K
4096 = 4 MEG
256 = 256K
8192 = 8 MEG
1024 = 1 MEG 16384 = 16
MEG
Package Type
G = Single In-Line Package (SIP)
S = Single In-Line Module (SIM)
D = Dual In-Line Package (DIP)
W = .050 inch Pitch Edge Connect
Z = Zig-Zag In-Line Package (ZIP)
Special Designation
P = Page Mode
N = Nibble Mode
K = Static Column Mode
W = Write Per Bit Mode
V = Video Ram
Separator
- = Commercial 00C to +700C
M = Military Equivalent Screened
(-550C to +1250C)
I = Industrial Temperature Tested
(-450C to +850C)
X = Burned In
Speed (first two significant digits)
DRAMS
SRAMS
60 = 60 nS
12 = 12 nS
70 = 70 nS
15 = 15 nS
80 = 80 nS
20 = 20 nS
1 Meg x 8, Dynamic RAM, Leadless SIM, Page Mode, Commercial,
60 nSEC Access Time
0.024
0.016
8
4
0.100
T.P.
7
3
0.100
TYP
6
2
0.505
0.495
5
1
0.100
TYP
0.200"
MAX
ACCUTEK
MICROCIRCUIT CORPORATION
5 NEW PASTURE ROAD
NEWBURYPORT, MA 01950-4040
PHONE: 978-465-6200 FAX: 978-462-3396
Email: [email protected]
Internet: www.accutekmicro.com
0.053
0.047
The numbers and coding on this page do not include all variations
available, but are shown as examples of the most widely used variations. Contact Accutek if other information is required.
Accutek reserves the right to make changes in specifications at any
time and without notice. Accutek does not assume any responsibility for the use of any circuitry described; no circuit patent licenses
are implied. Preliminary data sheets contain minimum and maximum limits based upon design objectives, which are subject to
change upon full characterization over the specific operating conditions.
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