Download datasheet for AOZ8818DI-05 by Alpha and Omega Semiconductor

Download datasheet for AOZ8818DI-05 by Alpha and Omega Semiconductor
AOZ8818
Ultra-Low Capacitance TVS Diode
General Description
Features
The AOZ8818 is a transient voltage suppressor array
designed to protect high speed data lines from damaging
ESD events.
 ESD protection for high-speed data lines:
This device incorporates 16 surge rated, low capacitance
steering diodes and a TVS in a single package. During
transient conditions, the steering diodes direct the
transient to either the positive side of the power supply
line or to ground.
The AOZ8818 provides a typical capacitance of 0.3 pF
and low insertion loss up to 6GHz providing greater
signal integrity, making it ideally suited for high speed
data line applications such as Digital TVs,
DVD players, Computing, set-top boxes and MDDI
applications in mobile computing devices.
The AOZ8818 comes in a RoHS compliant and Halogen
Free 2.5 mm x 1.0 mm x 0.55 mm DFN-10 package and
is rated -40 °C to +85 °C junction temperature range.
– IEC61000-4-2, level 4 (ESD) immunity test
– Air discharge: ±15 kV; contact discharge: ±15 kV
– IEC61000-4-4 (EFT) 40A (5/50 ns)
– IEC61000-4-5 (Lightning) 4 A (8/20 µs)
– Human Body Model (HBM) ±24 kV
 Array of surge rated diodes with internal TVS diode
 Small package saves board space
 Protects four I/O lines
 Low capacitance: 0.3 pF
 Low clamping voltage
 Low operating voltage: 3.3V, 5.0 V
Applications
 High speed serial ports
 Monitors and flat panel displays
 Set-top box
 Video graphics cards
 Digital Video Interface (DVI)
 Notebook computers
Typical Application
I/O1
I/O2
I/O3
I/O4
Rev. 1.0 November 2011
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Page 1 of 8
AOZ8818
Ordering Information
Part Number
Ambient Temperature Range
AOZ8818DI-03
-40 °C to +85 °C
AOZ8818DI-05
Package
Environmental
RoHS Compliant
Green Product
2.5 mm x 1.0 mm x 0.55 mm DFN-10
AOS Green Products use reduced levels of Halogens, and are also RoHS compliant.
Please visit www.aosmd.com/web/quality/rohs_compliant.jsp for additional information.
Pin Configuration
CH1
1
10 NC
CH2
2
9
NC
VN
3
8
VN
CH3
4
7
NC
CH4
5
6
NC
DFN-10
(Top View)
Absolute Maximum Ratings
Exceeding the Absolute Maximum ratings may damage the device.
Parameter
AOZ8818DI-03
Storage Temperature (TS)
-65°C to +150°C
ESD Rating per IEC61000-4-2, contact(1)
±15 kV
air(1)
±15 kV
Model(2)
±24 kV
ESD Rating per IEC61000-4-2,
ESD Rating per Human Body
AOZ8818DI-05
Notes:
1. IEC 61000-4-2 discharge with CDischarge = 150 pF, RDischarge = 330 Ω.
2. Human Body Discharge per MIL-STD-883, Method 3015 CDischarge = 100 pF, RDischarge = 1.5 kΩ.
Maximum Operating Ratings
Parameter
Rating
Junction Temperature (TJ)
Rev. 1.0 November 2011
-40 °C to +125 °C
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Page 2 of 8
AOZ8818
Electrical Characteristics
TA = 25°C unless otherwise s pecified. Specifications in BOLD indicate a temperature range of -40 °C to +85 °C.
Symbol
IPP
VCL(3)
VRWM(4)
IR
Parameter
Symbol
Maximum Reverse Peak Leakage Current
VBR
(5)
Parameter
Breakdown Voltage
Clamping Voltage @ IPP
IT
Test Current
Working Peak Reverse Voltage
CJ
Max. Capacitance @ VR = 0 and f = 1 MHz
Maximum Reverse Leakage Current
VRWM (V)
Max.
VBR (V)
Min.
IT = 100 µA
Device
Device
Marking
AOZ8818DI-03
G
3.3
3.5
AOZ8818DI-05
E
5.0
6.0
Notes:
3. Measurements performed using a 100 ns Transmission Line Pulse
(TLP) system.
VCL Max.
IR (µA)
Max.
CJ (pF)
IPP = 1 A
IPP = 12 A
1.0
5
17.5
0.30
0.45
1.0
6
18
0.30
0.45
Typ.
Max
5. VBR is measured at the pulse test current IT.
4. The working peak reverse voltage, VRWM, should be equal to or
greater than the DC or continuous peak operating voltage level.
Rev. 1.0 November 2011
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Page 3 of 8
AOZ8818
Typical Performance Characteristics
Forward Voltage vs. Forward Peak Pulse Current
0.00E+00
AOZ8818DI-3
7
-5.00E+00
AOZ8818DI-5
6
-1.00E+01
5
S21 (dB)
Forward Voltage (V)
I/O – Gnd Insertion Loss (S21) vs. Frequency
(tperiod = 100ns, tr = 1ns)
8
4
3
-1.50E+01
-2.00E+01
2
AOZ8818DI-3
-2.50E+01
AOZ8818DI-5
1
-3.00E+01
0
0
2
4
6
8
10
Forward Current, IPP (A)
12
14
1
10000
0
AOZ8818DI-3
AOZ8818DI-3
-20
AOZ8818DI-5
16
Insertion Loss (dB)
Clamping Voltage, VCL (V)
1000
Analog Crosstalk (I/O–I/O) vs. Frequency
(tperiod = 100ns, tr = 1ns)
18
100
Frequency (MHz)
Clamping Voltage vs. Peak Pulse Current
20
10
14
12
10
8
AOZ8818DI-5
-40
-60
-80
-100
6
4
-120
0
2
4
6
8
10
Peak Puse Current, IPP (A)
Rev. 1.0 November 2011
12
14
1
10
100
1000
10000
Frequency (MHz)
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Page 4 of 8
AOZ8818
High Speed PCB Layout Guidelines
Printed circuit board layout is the key to achieving the
highest level of surge immunity on power and data lines.
The location of the protection devices on the PCB is the
simplest and most important design rule to follow. The
AOZ8808DI devices should be located as close as
possible to the noise source. The AOZ8808DI device
should be placed on all data and power lines that enter or
exit the PCB at the I/O connector. In most systems, surge
pulses occur on data and power lines that enter the PCB
through the I/O connector. Placing the AOZ8808DI
devices as close as possible to the noise source ensures
that a surge voltage will be clamped before the pulse can
be coupled into adjacent PCB traces. In addition, the
PCB should use the shortest possible traces. A short
trace length equates to low impedance, which ensures
that the surge energy will be dissipated by the
AOZ8808DI device. Long signal traces will act as
antennas to receive energy from fields that are produced
by the ESD pulse. By keeping line lengths as short as
possible, the efficiency of the line to act as an antenna for
ESD related fields is reduced. Minimize interconnecting
line lengths by placing devices with the most interconnect
as close together as possible. The protection circuits
should shunt the surge voltage to either the reference or
chassis ground. Shunting the surge voltage directly to the
IC’s signal ground can cause ground bounce. The
clamping performance of TVS diodes on a single ground
PCB can be improved by minimizing the impedance with
relatively short and wide ground traces. The PCB layout
and IC package parasitic inductances can cause
significant overshoot to the TVS’s clamping voltage. The
inductance of the PCB can be reduced by using short
trace lengths and multiple layers with separate ground
and power planes. One effective method to minimize
loop problems is to incorporate a ground plane in the
PCB design.
The AOZ8808DI ultra-low capacitance TVS is designed
to protect four high speed data transmission lines from
transient over-voltages by clamping them to a fixed
reference. The low inductance and construction
minimizes voltage overshoot during high current surges.
When the voltage on the protected line exceeds the
reference voltage the internal steering diodes are forward
biased, conducting the transient current away from the
sensitive circuitry. The AOZ8808DI is designed for ease
of PCB layout by allowing the traces to run underneath
the device. The pinout of the AOZ8808DI is designed to
simply drop onto the IO lines of a High Definition
Multimedia Interface (HDMI) or USB 3.0 design without
having to divert the signal lines that may add more
parasitic inductance. Pins 1, 2, 4 and 5 are connected to
the internal TVS devices and pins 6, 7, 9 and 10 are no
connects. The no connects was done so the package can
be securely soldered onto the PCB surface.
Clock
Clock
SSRX+
SSRX+
Data0
Data0
SSRX–
SSRX–
Ground
Ground
Ground
Data1
Data1
SSTX+
SSTX+
Data2
Data2
SSTX–
SSTX–
Ground
Figure 3. Flow Through Layout for HDMI
Rev. 1.0 November 2011
Figure 4. Flow Through Layout for USB 3.0
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Page 5 of 8
AOZ8818
Package Dimensions, DFN 2.5mm x 1.0mm x 0.55mm, 10L
D
b1
b
e
E
5
L
TOP VIEW
Pin #1 Dot
by Marking
1
e
Pin #3 Identification R 0.130
BOTTOM VIEW
c
A
SIDE VIEW
A1
Dimensions in millimeters
RECOMMENDED LAND PATTERN
0.10
0.50
0.30
0.15
Min.
A
0.50
A1
b
0.00
0.15
b1
c
0.36
0.48
0.72
1.20 0.24
Symbols
D
2.45
E
e
0.95
L
0.33
Dimensions in inches
Nom.
0.55
Max.
0.60
Symbols
Min.
A
0.020
—
0.20
0.05
A1
b
0.000
0.25
0.006
0.40
0.152 Ref.
b1
c
2.50
D
0.096
E
e
0.037
L
0.013
2.55
1.00
1.05
0.50 BSC
0.38
0.43
Nom.
0.022
Max.
0.024
—
0.008
0.002
0.010
0.016
0.006 Ref.
0.098
0.100
0.039 0.041
0.020 BSC
0.015
0.017
0.20
0.40
Note:
1. Controlling dimension is millimeter. Converted inch dimensions are not necessarily exact.
Rev. 1.0 November 2011
www.aosmd.com
Page 6 of 8
AOZ8818
Tape and Reel Dimensions, DFN 2.5mm x 1.0mm x 0.55mm, 10L
Carrier Tape
P2
P1
D0
D1
E1
K0
E2 E
B0
Ref 5
P0
T
A0
A–A
Feeding Direction
UNIT: mm
Package
DFN 2.5x1.0
B0
2.62
0.05
A0
1.12
0.05
K0
0.70
0.05
D0
D1
E
ø1.55 ø0.55
8.00
0.05
0.05 +0.3/-0.1
Reel
E1
1.75
0.1
E2
3.50
0.05
P0
P1
4.00
0.10
4.0
0.10
P2
2.0
0.05
T
0.25
0.05
W1
S
M
K
N
G
R
H
W
UNIT: mm
Tape Size Reel Size
8mm
ø178
M
ø178.0
1.0
N
ø60.0
0.5
W
W1
H
S
K
E
R
11.80
0.5
9.0
0.5
ø13.0
+0.5 / –0.2
2.40
0.10
10.25
0.2
ø9.8
—
Leader / Trailer & Orientation
Trailer Tape
300mm Min.
Rev. 1.0 November 2011
Components Tape
Orientation in Pocket
www.aosmd.com
Leader Tape
500mm Min.
Page 7 of 8
AOZ8818
Part Marking
AOZ8818DI-03
(2.5 x 1.0 DFN)
GC12
Part Number Code
Assembly Lot Code
Week and Year Code
AOZ8818DI-05
(2.5 x 1.0 DFN)
EC12
Part Number Code
Assembly Lot Code
Week and Year Code
This datasheet contains preliminary data; supplementary data may be published at a later date.
Alpha & Omega Semiconductor reserves the right to make changes at any time without notice.
LIFE SUPPORT POLICY
ALPHA & OMEGA SEMICONDUCTOR PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL
COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS.
As used herein:
1. Life support devices or systems are devices or
systems which, (a) are intended for surgical implant into
the body or (b) support or sustain life, and (c) whose
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of
the user.
Rev. 1.0 November 2011
2. A critical component in any component of a life
support, device, or system whose failure to perform can
be reasonably expected to cause the failure of the life
support device or system, or to affect its safety or
effectiveness.
www.aosmd.com
Page 8 of 8
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