Diagonal 4.5mm (Type 1/4) CCD Image Sensor for PAL Color Video Cameras

ICX643BKA

Description

The ICX643BKA is an interline CCD solid-state image sensor suitable for PAL color video cameras with a diagonal 4.5mm (Type 1/4) system.

Compared with the conventional product ICX227AK, ICX227AZ, basic characteristics such as sensitivity are improved drastically.

This chip features a field period readout system and an electronic shutter with variable charge-storage time.

(Applications: Surveillance cameras, etc.)

Features

Æ High sensitivity (Approximately +6dB over ICX227AK, ICX227AZ)

Æ High resolution and low dark current

Æ Excellent anti-blooming characteristics

Æ Ye, Cy, Mg, and G complementary color mosaic filters on chip

Æ Continuous variable-speed shutter function

Æ No voltage adjustments

(Reset gate and substrate bias need no adjustment.)

Æ

Supply voltage: 12V

Æ

Reset gate: 3.3V drive

Æ

Horizontal register: 3.3V drive

Æ

Recommended range of exit pupil distance: –20 to –100mm

Package

14-pin DIP (Plastic)

* “Super HAD CCD II” is a trademark of Sony Corporation. The “Super HAD CCD II” is a version of Sony's high performance CCD

HAD (Hole-Accumulation Diode) sensor with realized sensitivity (typical) of 1000mV or more per 1

μm

2

(Color: F5.6/BW: F8 in

1s accumulation equivalent).

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

- 1 -

E09327A98

Device Structure

Æ Interline CCD image sensor

Æ Image size : Diagonal 4.5mm (Type 1/4)

Æ Number of effective pixels : 500 (H)

× 582 (V) approx. 0.29M pixels

Æ

Æ

Æ

Total number of pixels

Chip size

Unit cell size

: 537 (H)

× 597 (V) approx. 0.32M pixels

: 4.34mm (H)

× 3.69mm (V)

: 7.3

μm (H) × 4.7μm (V)

Æ Optical black

Æ Number of dummy bits

: Horizontal (H) direction: Front 7 pixels, rear 30 pixels

Vertical (V) direction : Front 14 pixels, rear 1pixel

: Horizontal: 16

Vertical : 1 (even fields only)

Æ

Substrate material : Silicon

Optical Black Position

(Top View)

Pin 1

1

V

14

7

Pin 8

H 30

ICX643BKA

- 2 -

ICX643BKA

USE RESTRICTION NOTICE

This USE RESTRICTION NOTICE (“Notice”) is for customers who are considering or currently using the CCD image sensor products (“Products”) set forth in this specifications book. Sony Corporation (“Sony”) may, at any time, modify this Notice which will be available to you in the latest specifications book for the Products. You should abide by the latest version of this Notice. If a Sony subsidiary or distributor has its own use restriction notice on the Products, such a use restriction notice will additionally apply between you and the subsidiary or distributor. You should consult a sales representative of the subsidiary or distributor of Sony on such a use restriction notice when you consider using the Products.

Use Restrictions

Æ

The Products are intended for incorporation into such general electronic equipment as office products, communication products, measurement products, and home electronics products in accordance with the terms and conditions set forth in this specifications book and otherwise notified by Sony from time to time.

Æ You should not use the Products for critical applications which may pose a life- or injury- threatening risk or are highly likely to cause significant property damage in the event of failure of the Products. You should consult your Sony sales representative beforehand when you consider using the Products for such critical applications. In addition, you should not use the Products in weapon or military equipment.

Æ Sony disclaims and does not assume any liability and damages arising out of misuse, improper use, modification, use of the Products for the above-mentioned critical applications, weapon and military equipment, or any deviation from the requirements set forth in this specifications book.

Design for Safety

Æ

Sony is making continuous efforts to further improve the quality and reliability of the Products; however, failure of a certain percentage of the Products is inevitable. Therefore, you should take sufficient care to ensure the safe design of your products such as component redundancy, anti-conflagration features, and features to prevent mis-operation in order to avoid accidents resulting in injury or death, fire or other social damage as a result of such failure.

Export Control

Æ If the Products are controlled items under the export control laws or regulations of various countries, approval may be required for the export of the Products under the said laws or regulations. You should be responsible for compliance with the said laws or regulations.

No License Implied

Æ The technical information shown in this specifications book is for your reference purposes only. The availability of this specifications book shall not be construed as giving any indication that Sony and its licensors will license any intellectual property rights in such information by any implication or otherwise. Sony will not assume responsibility for any problems in connection with your use of such information or for any infringement of third-party rights due to the same. It is therefore your sole legal and financial responsibility to resolve any such problems and infringement.

Governing Law

Æ This Notice shall be governed by and construed in accordance with the laws of Japan, without reference to principles of conflict of laws or choice of laws. All controversies and disputes arising out of or relating to this

Notice shall be submitted to the exclusive jurisdiction of the Tokyo District Court in Japan as the court of first instance.

Other Applicable Terms and Conditions

Æ The terms and conditions in the Sony additional specifications, which will be made available to you when you order the Products, shall also be applicable to your use of the Products as well as to this specifications book.

You should review those terms and conditions when you consider purchasing and/or using the Products.

- 3 -

ICX643BKA

Block Diagram and Pin Configuration

(Top View)

7

8

6

9

5 4 3 2 1

Cy

Mg

Cy

G

Cy

Mg

Ye

G

Ye

Mg

Ye

Cy

Mg

Cy

G

Cy

Mg

G

Horizontal Register

Ye

G

Ye

Mg

Ye

G

(Note)

(Note) : Photo sensor

10 11 12 13 14

Pin Description

Pin

No.

Symbol

1 V

φ

4

2 V

φ

3

3 V

φ

2

4 V

φ

1

5 NC

6 GND

7 V

OUT

Description

Vertical register transfer clock

Vertical register transfer clock

Vertical register transfer clock

Vertical register transfer clock

GND

Signal output

Pin

No.

Symbol

8 V

DD

9 GND

10

φSUB

11 V

L

12

φRG

13 H

φ

1

14 H

φ

2

Description

Supply voltage

GND

Substrate clock

Protective transistor bias

Reset gate clock

Horizontal register transfer clock

Horizontal register transfer clock

- 4 -

ICX643BKA

Absolute Maximum Ratings

Against

φSUB

Against GND

Against V

L

Between input clock pins

Storage temperature

Operating temperature

Item

V

DD

, V

OUT

, RG –

φSUB

V

φ

1

, V

φ

3

–

φSUB

V

φ

2

, V

φ

4

, V

L

–

φSUB

H

φ

1

, H

φ

2

, GND –

φSUB

V

DD

, V

OUT

, RG – GND

V

φ

1

, V

φ

2

, V

φ

3

, V

φ

4

– GND

H

φ

1

, H

φ

2

– GND

V

φ

1

, V

φ

3

– V

L

V

φ

2

, V

φ

4

, H

φ

1

, H

φ

2

, GND – V

L

Potential difference between vertical clock input pins

H

φ

H

φ

1

– H

φ

2

1

, H

φ

2

– V

φ

4

Ratings

–31 to +10

–36 to +14

–36 to +0.3

–31 to +0.3

–0.3 to +17

–7 to +14

–7 to +4.2

–0.3 to +20

–0.3 to +11 to +12

–5 to +5

–11 to +11

–30 to +80

–10 to +60

Unit

V

V

V

V

V

V

V

V

V

V

V

V

°

C

°

C

Remarks

*1

*1

When the clock width is less than 10

μs and clock duty factor is less than 0.1%, voltages up to 20V are guaranteed.

Bias Conditions

Supply voltage

Item

Protective transistor bias

Substrate clock

Reset gate clock

Symbol

V

DD

V

L

φSUB

φRG

Min.

11.64

Typ.

12.0

*1

*2

*2

Max.

12.36

Unit

V

Remarks

*1

*2

For the V

L

setting, use the V

VL

voltage of the vertical clock waveform or the same voltage as the V

L

power supply of the V driver.

Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated internally.

DC Characteristics

Supply current

Item Symbol

I

DD

Min.

Typ.

2.5

Max.

5

Unit Remarks mA

- 5 -

ICX643BKA

Clock Voltage Conditions

Item Symbol Min.

Typ.

Readout clock voltage

V

VT

V

VH1

, V

VH2

V

VH3

, V

VH4

V

VL1

, V

VL2

,

V

VL3

, V

VL4

V

φ

V

Vertical transfer clock voltage

Horizontal transfer clock voltage

V

VH3

– V

VH

V

VH4

– V

VH

V

VHH

V

VHL

V

VLH

V

VLL

V

φ

H

V

HL

V

φ

RG

Reset gate clock voltage

Substrate clock voltage

V

RGLH

– V

RGLL

V

RGL

– V

RGL m

V

φ

SUB

11.64

12.0

–0.05

–0.2

–5.5

4.3

–0.25

–0.25

3.0

–0.05

3.0

0

0

–5.0

5.0

3.3

0

3.3

16.14

17.0

5.55

0.1

0.1

0.3

0.3

0.3

0.3

3.6

0.05

3.6

0.4

0.5

17.86

Max.

Unit

Waveform diagram

12.36

V 1

0.05

0.05

–4.5

V

V

V

2

2

2

Remarks

V

VH

= (V

VH1

+ V

VH2

)/2

V

VL

= (V

VL3

+ V

VL4

)/2

V

φ

V

= V

VH n – V

VL n

(n = 1 to 4)

V

V

V

V

V

V

V

V

V

V

V

V

V

2

3

3

2

2

2

2

2

2

4

4

4

5

High-level coupling

High-level coupling

Low-level coupling

Low-level coupling

Input through 0.1

capacitance

μF

Low-level coupling

Low-level coupling

- 6 -

ICX643BKA

Clock Equivalent Circuit Constants

Capacitance between vertical transfer clock and GND

Item

Capacitance between vertical transfer clocks

Symbol

C

φ

V1

, C

φ

V3

C

φ

V2

, C

φ

V4

C

φ

V12

, C

φ

V34

C

φ

V23

, C

φ

V41

C

φ

V13

C

φ

V24

Capacitance between horizontal transfer clock and GND

C

φ

H1

Capacitance between horizontal transfer clocks C

φ

HH

, C

φ

H2

Capacitance between reset gate clock and GND C

φ

RG

Capacitance between substrate clock and GND C

φ

SUB

Vertical transfer clock series resistance

Vertical transfer clock ground resistance

Horizontal transfer clock series resistance

Reset gate clock series resistance

R

1

, R

2

, R

3

, R

4

R

GND

R

φ

H

R

φ

RG

Min.

Typ.

Max.

Unit Remarks

560

270 pF pF

180

100

100

100 pF pF pF pF

39

15

5

110

110

15

15

39 pF pF pF pF

Ω

Ω

Ω

Ω

Vφ

1

R

1

Cφ

V12

Vφ

2

R

2

Cφ

V41

Cφ

V24

R

4

Cφ

V1

Cφ

Cφ

V4

R

GND

Cφ

V3

Cφ

V34

V2

Cφ

V23

Cφ

V13

R

3

Vφ

4

Vφ

3

Vertical transfer clock equivalent circuit

Hφ

1

Rφ

H

Cφ

H1

Cφ

HH

Cφ

H2

Rφ

H

Hφ

2

Horizontal transfer clock equivalent circuit

φRG

Rφ

RG

Cφ

RG

Reset gate clock equivalent circuit

- 7 -

Drive Clock Waveform Conditions

1. Readout clock waveform

100%

90%

V

VT

10%

0% tr

2. Vertical transfer clock waveform

Vφ

1

V

VH1 V

VHH

V

VH

V

VHL

V

VHH

V

VHL twh tf

φM

2

φM

0V

Vφ

3

V

VHL

V

VHH

V

VH3

V

VHL

V

VHH

V

VH

ICX643BKA

V

VL

V

VL1

V

VLH

V

VLL

Vφ

2

V

VH2

V

VHL

V

VHH

V

VHH

V

VH

V

VHL

V

VL2

V

VLH

V

VL

V

VLL

V

VH

= (V

VH1

+ V

VH2

)/2

V

VL

= (V

VL3

+ V

VL4

)/2

V

φ

V

= V

VH n – V

VL n (n = 1 to 4)

V

VL3

V

VLL

V

VLH

V

VL

Vφ

4

V

VH

V

VHL

V

VHH

V

VH4

V

VHL

V

VHH

V

VL4

V

VLL

V

VLH

V

VL

- 8 -

ICX643BKA

3. Horizontal transfer clock waveform

tr twh tf

90%

Vφ

H twl

10%

V

HL

4. Reset gate clock waveform

tr twh tf

V

RGH twl

Point A

Vφ

RG

RG waveform

V

RGLH

V

RGLL

V

RGL m

Hφ

1

waveform

10%

V

RGL

V

RGLH

is the maximum value and V

RGLL

is the minimum value of the coupling waveform during the period from

Point A in the above diagram until the rising edge of RG.

In addition, V

RGL

is the average value of V

RGLH

and V

RGLL

.

V

RGL

= (V

RGLH

+ V

RGLL

)/2

V

RGH

is the minimum value during the interval twh,

V

φ

RG

= V

RGH

– V

RGL

V

RGL m is the negative overshoot level during the falling edge of RG.

5. Substrate clock waveform

100%

90%

φM

Vφ

SUB

φM

2

10%

V

SUB

0%

(Internally generated bias) tr twh tf

- 9 -

ICX643BKA

Clock Switching Characteristics

Item

Readout clock

Vertical transfer clock

During a video period

Horizontal transfer clock

During parallel-to-serial conversion

H

φ

1

H

φ

2

Symbol

V

T

V

φ

1

V

φ

3

, V

φ

2

,

, V

φ

4

H

φ twh twl tr tf

Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.

Unit Remarks

2.3

2.5

0.1

0.1

μs

During readout

41 46 41 46 6.5

9.5

5

6.5

250

9.5

ns ns

*1

*2

5.6

5.6

0.007

0.007

0.007

0.007

μs

Reset gate clock

Substrate clock

φRG

φSUB

11 14

1.5 1.65

76 80 6.0

0.5

5.0

ns

0.5

μs

When draining charge

*1

*2

When vertical transfer clock driver CXD1267AN is used.

When V

φ

H

= 3.0V. tf

≥ tr – 2ns, and the cross-point voltage (V

CR

) for the H

φ

1

rising side of the H

φ

1

and H

φ

2 waveforms must be at least V

φ

H

/2 [V].

- 10 -

ICX643BKA

Image Sensor Characteristics

(Ta = 25

°

C)

Sensitivity

Sensitivity ratio

Saturation signal

Smear

Item

Video signal shading

Uniformity between video signal channels

ΔSr

ΔSb

Dark signal

Dark signal shading

Ydt

ΔYdt

Flicker Y

Flicker R – Y

Flicker B – Y

Line crawl R

Fy

Fcr

Fcb

Lcr

Line crawl G

Line crawl B

Line crawl W

Lag

Lcg

Lcb

Lcw

Lag

Symbol

S

R

MgG

R

YeCy

Ysat

Sm

SHy

Min.

Typ.

Max.

Unit mV 1390 1850

1.08

1.2

1000

1.48

1.6

–105 –95

20 mV dB

%

25

5

3

2

5

10

10

2

1

3

3

3

0.5

%

%

%

%

%

%

% mV mV

%

%

%

%

9

9

9

10

7

8

6

6

Measurement method

1

2

2

3

Remarks

Ta = 60

°

C

4

5

5

Zone 0 and zone I

Zone 0, zone I, zone II and zone II’

Ta = 60

Ta = 60

°

°

C

C

10

10

10

11

Zone Definition of Video Signal Shading

H

8

9

500 (H)

V

10

6

9

H

8

582 (V)

V

10

Zone 0 and I

Zone II and II’

8

Ignored area

Effective pixel area

- 11 -

ICX643BKA

Measurement System

CCD

[∗A]

CCD signal output

C.D.S

AMP

LPF1

(3dB down 4MHz)

S/H

S/H

[∗Y]

Y signal output

LPF2

(3dB down 1MHz)

[∗C]

Chroma signal output

Note) Adjust the amplifier gain so that the gain between [*A] and [*Y], and between [*A] and [*C] equals 1.

- 12 -

ICX643BKA

Image Sensor Characteristics Measurement Method

Measurement conditions

1. In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions.

2. In the following measurements, the value of the Y signal output or the chroma signal output of the measurement system is used as the signal output based on the optical black level (OB) except spot pixels unless otherwise specified.

Color coding of this image sensor and Composition of luminance (Y) and chroma (color difference) signals

B

Cy

G

Cy

Mg

Ye

Mg

Ye

G

Cy

G

Cy

Mg

Ye

Mg

Ye

G

A 1

A 2

As shown in the figure on the left, fields are read out. The charge is mixed by pairs such as A1 and A2 in the A field

(pairs such as B in the B field).

As a result, the sequence of charges output as signals from the horizontal shift register (Hreg) is, for line A1,

(G + Cy), (Mg + Ye), (G + Cy), and (Mg + Ye).

Hreg

Color Coding Diagram

These signals are processed to form the Y signal and chroma (color difference) signal. The Y signal is formed by adding adjacent signals, and the chroma signal is formed by subtracting adjacent signals. In other words, the approximation:

Y = {(G + Cy) + (Mg + Ye)}

× 1/2

= 1/2 {2B + 3G + 2R} is used for the Y signal, and the approximation:

R – Y = {(Mg + Ye) – (G + Cy)}

= {2R – G} is used for the chroma (color difference) signal. For line A2, the signals output from Hreg in sequence are

(Mg + Cy), (G + Ye), (Mg + Cy), (G + Ye)

The Y signal is formed from these signals as follows:

Y = {(G + Ye) + (Mg + Cy)}

× 1/2

= 1/2 {2B + 3G + 2R}

This is balanced since it is formed in the same way as for line A1.

Similarly, the chroma (color difference) signal is approximated as follows:

– (B – Y) = {(G + Ye) – (Mg + Cy)}

= – {2B – G}

In other words, the chroma signal can be retrieved according to the sequence of lines from R – Y and

– (B – Y) in alternation. This is also true for the B field.

- 13 -

ICX643BKA

Definition of Standard Imaging Conditions

Æ Standard imaging condition I:

Use a pattern box (luminance: 706 cd/m 2 , color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity.

Æ Standard imaging condition II:

Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.

Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm.

Æ Standard imaging condition III:

Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles.

Use a testing standard lens (exit pupil distance –33mm) with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm.

1. Sensitivity

Set the measurement condition to standard imaging condition I. After setting the electronic shutter mode with a shutter speed of 1/500s, measure the Y signal (Y

S

) at the center of the screen, and substitute the value into the following formula.

S = Y

S

× (500/50) [mV]

2. Sensitivity ratio

Set the measurement condition to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, measure the Mg signal output (S

Mg

[mV]) and G signal output (S

G

[mV]), and Ye signal output (S

Ye

[mV]) and Cy signal output (S

Cy

[mV]) at the center of the screen with frame readout method. Substitute the values into the following formula.

R

MgG

= S

Mg

/S

G

R

YeCy

= S

Ye

/S

Cy

3. Saturation signal

Set the measurement condition to standard imaging condition II. After adjusting the luminous intensity to

10 times the intensity with average value of the Y signal output, 200mV, measure the minimum value of the Y signal.

4. Smear

Set the measurement condition to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to 500 times the intensity with average value of the Y signal output, 200mV.

Stop the readout clock and drain charges at the respective H blankings using the electronic shutter. Then measure the maximum value of the Y signal output (YSm [mV]) and substitute the value into the following formula.

Sm = 20

× log {(YSm/200) × (1/500) × (1/10)} [dB] (1/10V method conversion value)

5. Video signal shading

Set the measurement condition to standard imaging condition III. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the Y signal output is 200mV. Then measure the maximum (Ymax [mV]) and minimum (Ymin [mV]) values of the Y signal, and substitute the values into the following formula.

SHy = (Ymax – Ymin)/200

× 100 [%]

- 14 -

ICX643BKA

6. Uniformity between video signal channels

Set the measurement condition to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV. Then measure the maximum (Crmax, Cbmax [mV]) and minimum (Crmin, Cbmin [mV]) values of the R – Y and B – Y channels of the chroma signal, and substitute the values into the following formula.

ΔSr = | (Crmax – Crmin)/200 | × 100 [%]

ΔSb = | (Cbmax – Cbmin)/200 | × 100 [%]

7. Dark signal

Measure the average value of the Y signal output (Ydt [mV]) at the device ambient temperature of 60

°

C and the device in the light-obstructed state using the horizontal idle transfer level as a reference.

8. Dark signal shading

After measuring 7, measure the maximum (Ydmax [mV]) and minimum (Ydmin [mV]) values of the dark signal output, and substitute the values into the following formula.

ΔYdt = Ydmax – Ydmin [mV]

9. Flicker

(1) Fy

Set the measurement condition to standard imaging condition II. After adjusting the average value of the Y signal output to 200mV, measure the difference in the signal level between fields (

ΔYf [mV]), and substitute the value into the following formula.

Fy = (

ΔYf/200) × 100 [%]

(2) Fcr, Fcb

Set the measurement condition to standard imaging condition II. After adjusting the average value of the Y signal output to 200mV, insert an R or B filter, and then measure both the difference in the signal level between fields of the chroma signal (

ΔCr, ΔCb) as well as the average value of the chroma signal output (CAr, CAb). Substitute the values into the following formula.

Fci = (

ΔCi/CAi) × 100 [%] (i = r, b)

10. Line crawl

Set the measurement condition to standard imaging condition II. After adjusting the average value of the

Y signal output to 200mV, and then insert a white subject and R, G, and B filters and measure the difference between Y signal lines for the same field (

ΔYlw, ΔYlr, ΔYlg, ΔYlb [mV]). Substitute the values into the following formula.

Lci = (

ΔYli/200) × 100 [%] (i = w, r, g, b)

- 15 -

ICX643BKA

11. Lag

Adjust the Y signal output value generated by strobe light to 200mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Ylag), and substitute the value into the following formula.

Lag = (Ylag/200)

× 100 [%]

FLD

V1

Strobe light

timing

Output

Light

Y signal output 200mV Ylag (lag)

- 16 -

Hφ

2

Hφ

1

RG

12V

XSUB

XV2

XV1

XSG1

XV3

XSG2

XV4

7

8

5

6

9

10

3

4

1

2

22/20V

CXD1267AN

16

15

14

13

20

19

18

17

12

11

22/16V

1/35V

100k

0.1

3.3/16V

−5.0V

1 2 3 4 5 6 7

ICX643

(BOTTOM VIEW)

100

2SK523

3.9k

14 13 12

11

10 9 8

3.3/20V

0.01

1500p

1M

CCD OUT

0.1

ICX643BKA

Spectral Sensitivity Characteristics

(Excludes lens characteristics and light source characteristics)

1

0.9

0.8

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0

400 450 500 550

Wavelength [nm]

600

Center Readout Clock Timing Chart

Odd Field

V1

V2

V3

V4

2.5

31.1

0.3

1.2

1.5

2.5

2.0

Even Field

V1

V2

V3

V4

650 700

Unit: µs

- 18 -

V3

V4

CCD

OUT

V1

V2

FLD

VD

BLK

HD

582

581 1

2 4

3 5

6

1

2 4

3 5

6 582

581

2 4

1 3

6

5

2 4

1 3

6

5

3BKA X64 IC

0 - 2

490

495

500

1

2

3

5

10

25

30

15

20

1

2

3

5

10

15

16

1

2

3

5

7

1

2

3

5

nc l Sy nta rizo Ho

ICX643BKA

Notes On Handling

1. Static charge prevention

Image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures.

(1) Either handle bare handed or use non-chargeable gloves, clothes or material.

Also use conductive shoes.

(2) Use a wrist strap when handling directly.

(3) Install grounded conductive mats on the floor and working table to prevent the generation of static electricity.

(4) Ionized air is recommended for discharge when handling image sensors.

(5) For the shipment of mounted boards, use boxes treated for the prevention of static charges.

2. Soldering

(1) Make sure the temperature of the upper surface of the seal glass resin adhesive portion of the package does not exceed 80

°

C.

(2) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a 30W soldering iron with a ground wire and solder each pin in 2 seconds or less. For repairs and remount, cool sufficiently.

(3) To dismount an image sensor, do not use solder suction equipment. When using a desoldering tool, use a zero-cross ON/OFF type for the temperature control system and ground the controller.

3. Protection from dust and dirt

Image sensors are packed and delivered with care taken to protect the element glass surfaces from harmful dust and dirt. Clean glass surfaces with the following operations as required before use.

(1) Perform all lens assembly and other work in a clean room (class 1000 or less).

(2) Do not touch the glass surface with hand and make any object contact with it. If dust or other is stuck to a glass surface, blow it off with an air blower. (For dust stuck through static electricity, ionized air is recommended.)

(3) Clean with a cotton swab with ethyl alcohol if grease stained. Be careful not to scratch the glass.

(4) Keep in a dedicated case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences.

(5) When a protective tape is applied before shipping, remove the tape applied for electrostatic protection just before use. Do not reuse the tape.

4. Installing (attaching)

(1) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.)

Cover glass

50N 50N 1.2Nm

Package

Compressive strength Torsional torque

(2) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate.

- 21 -

ICX643BKA

(3) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to the other locations as a precaution.

(4) The notch of the package is used for directional index, and that can not be used for reference of fixing.

In addition, the cover glass and seal resin may overlap with the notch of the package.

(5) If the leads are bent repeatedly or metal, etc., strikes or rubs against the package surface, the plastic may chip or fragment and generate dust.

(6) Acrylate anaerobic adhesives are generally used to attach this product. In addition, cyanoacrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives to hold the product in place until the adhesive completely hardens. (reference)

(7) Note that the sensor may be affected when using visible light other than ultraviolet ray and infrared ray etc. on mounting it.

5. Others

(1) Do not expose to strong light (sun rays) for long periods, as color filters will be discolored.

(2) Exposure to high temperature or humidity will affect the product characteristics. Accordingly avoid storage or use in such conditions.

(3) Brown stains may be seen on the bottom or side of the package. But this does not affect the characteristics.

(4) This product is precision optical parts, so care should be taken not to apply excessive mechanical shocks or force.

(5) This package has 2 kinds of internal structure. However, their package outline, optical size, and strength are the same.

Structure A Structure B

Package

Chip

Lead frame

Cross section of lead frame

The cross section of lead frame can be seen on the side of the package for structure A.

- 22 -

14 pin DIP (400mil)

A

14

5.0

8 8

14

D

C

B

1.7

1.0

1.27

0.3

M

PACKAGE STRUCTURE

PACKAGE MATERIAL Plastic

LEAD TREATMENT

LEAD MATERIAL

PACKAGE MASS

DRAWING NUMBER

GOLD PLATING

42 ALLOY

0.60g

AS-D3-02(E)

V

H

1

8.9

10.0 ± 0.1

7

7.0

2.5

~

B'

0.3

0.46

7 1

1. “A” is the center of the effective image area.

2. The two points “B” of the package are the horizontal reference.

The point “B'” of the package is the vertical reference.

bottom of the package, and the top of the cover glass “D” are the height reference.

4. The center of the effective image area relative to “B” and “B'” is (H, V) = (5.0, 5.0) ± 0.15mm.

5. The rotation angle of the effective image area relative to H and V is ± 1˚.

6. The height from the bottom “C” to the effective image area is 1.41 ± 0.10mm.

The height from the top of the cover glass “D” to the effective image area is 1.94 ± 0.15mm.

7. The tilt of the effective image area relative to the bottom “C” is less than 25µm.

The tilt of the effective image area relative to the top “D” of the cover glass is less than 25µm.

8. The thickness of the cover glass is 0.75mm, and the refractive index is 1.5.

9. The notch of the package is used only for directional index, that must not be used for reference

of fixing.

10. Cover glass defect

Edge part

Length : no matter, Width : less than 0.5mm, Depth : less than the thickness of the glass.

Corner part

Length : less than 1.5mm, Depth : less than the thickness of the glass.