ae l6470dip28

ae l6470dip28
L6470
HTSSOP28
dSPIN™ fully integrated microstepping motor driver with motion
engine and SPI
Features
Operating voltage: 8 - 45 V
7.0 A out peak current (3.0 A r.m.s.)
Low R DS(on) Power MOSFETs
Programmable speed profile and positioning
Programmable power MOS slew rate
Up to 1/128 microstepping
Sensorless stall detection
SPI interface
Low quiescent and standby currents
Programmable non-dissipative overcurrent
protection on high and low-side
Two-levels of overtemperature protection
Applications
Bipolar stepper motors
Absolute maximum ratings
S y mbol
P ar a meter
T es t c ondi ti on
L ogic interface s upply volta ge
V DD
VS
Motor supply voltage
V GND, diff
VSA = V SB = V S
Differential voltage between AGND,
PGND and DGND
Va l ue
U ni t
5. 5
V
48
V
±0.3
B oots tra p pea k volta ge
55
V
Internal voltage regulator output pin
and logic supply voltage
3.6
V
VADCIN
Integrated ADC input voltage range
(ADCIN pin)
-0.3 to +3.6
V
V OSC
OSCIN and OSCOUT pin voltage
range
-0.3 to +3.6
V
Vout_diff
Differential voltage between VSA ,
OUT1 A, OUT2 A, PGND and V SB ,
OUT1 B , OUT2 B , PGND pins
48
V
-0. 3 to +5. 5
V
3
A
7
A
-40 to 150
°
C
-55 to 150
°
C
5
W
V SA = V SB = V S
L ogic inputs voltage range
V LOGIC
Iout (1)
R . m. s . output current
Iout_peak (1)
Pulsed output current
TPULSE < 1 ms
T OP
O pera ting junction temperature
P tot
Total power dissipation (TA = 25 ºC)
Ts
S tora ge tempera ture ra nge
(2)
Symbol
V DD
Parameter
16MHz
Oscillator
S TBY/R S T
O S CIN
O S C O U T ADC I N
Ext. O sc. driver
&
Clock gen.
VR E G
Motor supply voltage
ADC
3V
Voltage Reg.
V DD
Registers
HS
CS
Control
Logic
Logic supply voltage
V REG voltage imposed
by external source
A1
A2
S y mbol
HS
LS
HS
LS
R thJA
S TCK
VS A
HS
A2
LS
A1
A2
PGND
VS B
HS
V boot
VS B
HS
B1
B2
OUT1B
Temperature
sensing
C urrent DACs
&
Comparators
LS
B1
V
V REG
P a c k age
HTSSOP28
POWERSO36
T y p.
(1)
(2)
22
12
U ni t
°C/W
デンサが実装されています。
カッコ内は、端子番号または端子名を示します。
また、全ての端子は、2.54mmピッチにピン配置その
ままで引き出されていますので、ユニバーサル基板などで
自由に配線することができます。なお、基板には熱伝導性
に優れるECOOL(エクール)R1787を使用していま
す。
B2
PGND
C urrent
sensing
DGND
0
V
それぞれの端子の間近に0.1μFの積層セラミックコン
OUT2B
LS
V DD
SW
Thermal resistance junction-ambient
VS A
B1
B2
3.3
(13,27)は変換基板上で全て結線されています。
A2
B2
V
IC底面の放熱パッド(EPAD)とPGND端子
V boot
V boot
45
VSA(2,26)、VSB(12,16)、VDD(17)には
A1
B1
V
1. HTSSOP28 mounted on EVAL6470H rev 1.0 board: four-layer FR4 PCB with a dissipating copper surface
of about 40 cm2 on each layer and 15 via holes below the IC.
2. POWERSO36 mounted on EVAL6470PD rev 1.0 board: four-layer FR4 PCB with a dissipating copper
surface of about 40 cm2 on each layer and 22 via holes below the IC.
S DI
BU S Y/S YNC
P a r a meter
OUT2A
LS
3.2
45
Thermal data
OUT1A
LS
8
V REG,in
VADC
V
5
VSA = V SB = V S
V SA = V SB = V S
A1
HS
LS
S PI
S DO
HS
5 V logic outputs
Integrated ADC input voltage
(ADCIN pin)
Unit
3.3
Differential voltage between
V SA , OUT1 A, OUT2 A, PGND
and V SB , OUT1 B , OUT2 B ,
PGND pins
V B OOT
V boot
Value
3.3 V logic outputs
Vout_diff
Charge
pump
FLAG
CK
CP
Test condition
Logic interface supply voltage
VS
1. Maximum output current limit is related to metal connection
and bonding characteristics. Actual limit must satisfy maximum
thermal dissipation constraints.
2. HTSSOP28 mounted on EVAL6470H.
VDD
The L6470, realized in analog mixed signal
technology, is an advanced fully integrated
solution suitable for driving two-phase bipolar
stepper motors with microstepping. It integrates a
dual low RDS(on) DMOS full-bridge with all of the
power switches equipped with an accurate onchip current sensing circuitry suitable for nondissipative current control and overcurrent
protection. Thanks to a unique control system, a
true 1/128 steps resolution is achieved. The
digital control core can generate user defined
motion profiles with acceleration, deceleration,
speed or target position, easily programmed
through a dedicated registers set. All commands
and data registers, including those used to set
analogue values (i.e. current control value,
current protection trip point, deadtime, PWM
frequency, etc.) are sent through a standard 5Mbit/s SPI. A very rich set of protections (thermal,
low bus voltage, overcurrent, motor stall) allows
the design of a fully protected application, as
required by the most demanding motor control
applications.
Recommended operating conditions
V
V REG
V boot
参考資料
Description
AGND
R1787
Register map
Pin description
No.
HTSSOP
POWERSO
17
24
6
9
Na me
T y pe
F unc ti on
VDD
Power
Logic outputs supply voltage (pull-up reference)
VREG
Power
Internal 3 V voltage regulator output and 3.3 V
external logic supply
7
10
OSCIN
Analog input
Oscillator pin 1. To connect an external oscillator or
clock source. If this pin is unused, it should be left
floating.
8
11
OSCOUT
Analog output
Oscillator pin 2. To connect an external oscillator.
When the internal oscillator is used this pin can
supply 2/4/8/16 MHz. If this pin is unused, it should be
left floating.
10
13
CP
Output
Charge pump oscillator output
11
14
VBOOT
Supply voltage
Bootstrap voltage needed for driving the high-side
power DMOS of both bridges (A and B)
8
5
Address
[Hex]
Register name
h03
MAR K
Ma rk pos ition
SPEED
Current speed
h05
ACC
Acceleration
12
08A
125.5e-12 step/tick2 (2008
step/s2)
h06
DEC
Deceleration
12
08A
125.5e-12 step/tick2 (2008
step/s2)
R, WS
Maximum speed
10
041
248e-6 step/tick (991.8 step/s)
R, WR
MAX_SPEED
h08
MIN_SPEED
h15
FS_SPD
ADCIN
Analog input
Internal analog-to-digital converter input
VSA
Power supply
Full-bridge A power supply pin. It must be connected
to VSB.
h09
KVAL_HOLD
h0A
KVAL_RUN
12, 16
15, 16, 22, 23
VSB
Power supply
Full-bridge B power supply pin. It must be connected
to VSA.
h0B
KVAL_ACC
Power ground pin
h0C
KVAL_DEC
PGND
Ground
1
2, 3
OUT1A
Power output
28
35, 36
OUT2A
Power output
Full-bridge A output 2
14
17, 18
OUT1B
Power output
Full-bridge B output 1
15
20, 21
OUT2B
Power output
Full-bridge B output 2
9
12
AGND
Ground
Analog ground.
4
7
SW
21
28
DGND
Full-bridge A output 1
Logical input
External switch input pin. If not used the pin should be
connected to VDD.
Ground
Digital ground
By default, this BUSY pin is forced low when the
device is performing a command. Otherwise the pin
BUSY \SYNC Open drain output
can be configured to generate a synchronization
signal.
22
29
18
25
SDO
Logic output
Data output pin for serial interface
20
27
SDI
Logic input
Data input pin for serial interface
19
26
CK
Logic input
Serial interface clock
23
30
CS
Logic input
Chip select input pin for serial interface
24
31
FLAG
3
6
STBY\RST
25
32
EPAD
EPAD
STCK
Logic input
Exposed pad Ground
ST_SLP
h10
Minimum speed
Full-step speed
Holding K VAL
Constant speed K VAL
Acceleration starting
K VAL
Deceleration starting
K VAL
000000 0
R , WS
22
000000 0
R , WR
20
00000
13
000
027
R
R, WS
0 step/tick (0 step/s)
R, WS
150.7e-6 step/tick (602.7
step/s)
R, WR
8
29
0. 16· V S
R , WR
29
0. 16· V S
R , WR
8
29
0. 16· V S
R , WR
8
29
0. 16· V S
R , WR
Intersect speed
14
0408
Start slope
8
19
0.038% s/step
R, WH
FN_SLP_ACC
Acceleration final
slope
8
29
0.063% s/step
R, WH
FN_SLP_DEC
Deceleration final
slope
8
29
0.063% s/step
R, WH
1. 0
R , WR
3. 38A
R , WR
h11
K_THERM
4
0
ADC_OUT
ADC output
5
XX (2)
h13
O C D_T H
O C D thres hold
4
8
Step-clock input
0 step/tick (0 step/s)
8
h12
h14
R , WS
0
10
000
Thermal
compensation factor
Standby and reset pin. LOW logic level resets the
logic and puts the device into Standby mode. If not
used, it should be connected to VDD.
Internally connected to PGND, AGND and DGND pins
INT_SPEED
h0E
h0F
Status flag pin. An internal open drain transistor can
pull the pin to GND when a programmed alarm
Open drain output condition occurs (step loss, OCD, thermal prewarning or shutdown, UVLO, wrong command, nonperformable command)
Logic input
h0D
9
Remarks (1)
value
E L _P O S
h07
22
Reset
Hex
AB S _P O S
h04
C urrent pos ition
E lectrica l pos ition
Reset
h02
4, 5, 33, 34
1, 19
Len.
[bit]
h01
2, 26
27, 13
Register function
15.4e-6 step/tick (61.5 step/s)
R, WH
R
S TAL L _T H
S TAL L thres hold
7
40
2. 03A
R , WR
h16
STEP_MODE
Step mode
8
7
128 microsteps
R, WH
h17
ALARM_EN
Alarm enable
8
FF
All alarms enabled
R, WS
Internal oscillator, 2 MHz
OSCOUT clock, supply voltage
compensation disabled,
overcurrent shutdown enabled,
slew rate = 290 V/µs PWM
frequency = 15.6 kHz.
R, WH
h18
CONFIG
IC configuration
16
h19
STATUS
Status
16
h1A
RESERVED
Reserved address
h1B
RESERVED
Reserved address
2E88
High impedance state,
XXXX (2)
UVLO/Reset flag set.
R
1. R: readable, WH: writable only when outputs are in high impedance, WS: writable only when motor is stopped, WR: always
writable.
2. According to startup conditions.
Bipolar stepper motor control application using L6470
参考資料
Typical application values
Na me
C VS
C VSPOL
Va l ue
220 nF
100 µF
C REG
100 nF
C DD
100 nF
D1
C ha rge pump diodes
C BOOT
220 nF
C REGPOL
C DDPOL
47 µF
10 µF
C FLY
10 nF
R SW
100 Ω
RA
2.7 k Ω (VS = 36 V)
R PU
C SW
RB
39 kΩ
10 nF
62 kΩ (VS = 36 V)
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