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Cool LiteRunner-LX800
PC/104 CPU Board
Technical Manual
TME-104-CLR-LX800-R1V3.doc
Revision 1.3 / March 09
© LiPPERT Embedded Computers GmbH
Hans-Thoma-Str. 11
D-68163 Mannheim http://www.lippertembedded.com/
Technical Manual Cool LiteRunner-LX800
LiPPERT Document: TME-104-CLR-LX800-R1V3.doc Revision 1.3
Copyright © 2009 LiPPERT Embedded Computers GmbH, All rights reserved
Contents and specifications within this manual are subject of change without notice.
Trademarks
MS-DOS, Windows, Windows 95, Windows 98, Windows NT and Windows XP are trademarks of
Microsoft Corporation. PS/2 is a trademark of International Business Machines, Inc. Intel is a trademarks of Intel Corporation. Geode is a trademark of Advanced Micro Devices. PC/104 is a registered trademark of PC/104 Consortium. All other trademarks appearing in this document are the property of their respective owners.
Table of Contents
1 Overview
Ordering Information............................................................................. 3
Cool LiteRunner-LX800 Models ................................................................... 3
1
Pin1 Pin2BOTTOM (vertical mirrored)..................................................... 5
BOTTOM (vertical mirrored) ....................................................................... 6
2 Getting Started
Connector Locations .............................................................................. 7
7
Hardware Setup................................................................................... 11
3 Module Description
3.1
Processor............................................................................................. 12
12
3.2
Companion........................................................................................... 13
3.3
Graphics-Controller.............................................................................. 14
SVGA Configuration ................................................................................ 14
VGA Connector....................................................................................... 15
Flat Panel and LVDS Configuration ............................................................ 16
Flat Panel Connector 18 Bit ...................................................................... 16
LVDS Connector ..................................................................................... 17
1.3 i
Backlight Connector ................................................................................ 17
Display Voltage Jumpers.......................................................................... 18
3.4
Compact Flash Socket .......................................................................... 18
3.5
Ethernet Controller .............................................................................. 19
Ethernet Interface .................................................................................. 19
3.6
On Board Power Supply ....................................................................... 20
Power Connector .................................................................................... 20
3.7
EIDE Port ............................................................................................. 21
EIDE Connector ...................................................................................... 21
3.8
PS/2 Interface..................................................................................... 22
Keyboard and Mouse Connector................................................................ 22
3.9
USB 2.0 Ports....................................................................................... 22
USB 2.0 Connector 1............................................................................... 23
USB 2.0 Connector 2............................................................................... 23
USB 2.0 Connector 3/4............................................................................ 23
3.10
Serial Ports .......................................................................................... 24
COM1/2 ................................................................................................ 25
RS485-Termination Jumpers .................................................................... 25
3.11
IrDA Interface ..................................................................................... 26
3.12
Parallel Port LPT1 ................................................................................ 27
LPT1 Connector ...................................................................................... 27
3.13
LEMT functions .................................................................................... 28
3.14
Watchdog ............................................................................................ 28
3.15
Speaker ............................................................................................... 28
3.16
External Power-Button ........................................................................ 29
3.17
Reset-In Signal .................................................................................... 29
3.18
Supervisory ......................................................................................... 30
3.19
Mini-PCI BUS Interface ........................................................................ 31
3.20
PC/104 Bus Interface .......................................................................... 34
PC/104 Bus Connector............................................................................. 34
4 Using the Module 35
4.1
BIOS .................................................................................................... 35
1.3 ii
Configuring the XpressROM BIOS.............................................................. 35
Trouble Shooting BIOS Settings ................................................................ 43
4.2
Programming GPIO Signals ................................................................. 44
4.3
Programming Serial Port COM3 ........................................................... 45
4.4
LIVE LED Programming........................................................................ 46
4.5
Watchdog Programming ...................................................................... 47
4.6
Reading Temperatures......................................................................... 48
4.7
Drivers................................................................................................. 49
5 Address Maps 50
5.1
Memory Address Map........................................................................... 50
5.2
I/O Address Map ................................................................................. 51
5.3
Interrupts ............................................................................................ 52
5.4
DMA Channels...................................................................................... 52
5.5
PC/104 Bus Address Space.................................................................. 53
Appendix A, Contact Information A
Appendix B, Additional Information B
B.1
Additional Reading................................................................................. B
B.2
PC/104 .................................................................................................. B
Appendix C, Getting Help C
Appendix D, Revision History D
1.3 iii
Acronyms
ACPI
AES
APM
Advanced Configuration and Power Management Interface
Advanced Encryption Standard
Advanced Power Management
ATA Advanced Technology Attachment
BIOS Basic Input Output System
BPP Bits Per Pixel
Disc
CF Compact
COM Communication
CPU Central Processing Unit
CRT Cathode Ray Tube
CLR Cool
DAC Digital-to-Analog-Converter
DDR Double
DMA Direct Memory Access
DOT
EIDE
Dynamic Overclocking Technology
Enhanced Integrated Device Electronics
EMC Electromagnetic Compatibility
ETH Ethernet
FIFO First In First Out
FPU Floating Point Unit
FWH Firmware
GPIO General Purpose Input Output
HDD Hard Disk Drive
Circuit
IP Internet
IrDA Infrared Data Association
ISA
LCD Liquid
LED
Industry Standard Architecture
Display
Light Emitting Diode
LPC Low Pin Count
LVDS Low Voltage Differential Signaling
MAC Media Access Control
MMU
PCI
Memory Management Unit
Peripheral Component Interconnect
PE Potential
PME Power Management Event
Interface
PLL Phase-Locked
PS/2 Personal
Loop
System/2
PWR Power
SMB System Management Bus
SMC
SPI
SSD
System Management Controller
Serial Peripheral Interface
Solid State Drive
SVGA Super Video Graphics Array
TCP Transmission Control Protocol
TFT Thin-Film
TLB Translation Look-aside Buffer
UART Universal Asynchronous Receiver Transmitter
USB Universal Serial Bus
UDMA Ultra-Direct
UDP
VGA
User Datagram Protocol
Video Graphics Array
WDOG Watchdog
1.3 iv
1 Overview
1.1 Introduction
The Cool LiteRunner-LX800 (CLR-LX800) is a PC/104 board with AMD’s Geode™ LX processor and has a very good performance- power- ratio. The board comprises all peripherals needed for an embedded PC on a small 3.775" by 4.050" printed circuit board. On the top side it is fully plug-in compatible with the Cool LiteRunner 2.
The CLR-LX800 integrates a powerful yet efficient AMD Geode™ LX800 processor together with a
CS5536 I/O companion and a Super I/O chip to form a complete PC, with all the standard peripherals already onboard. There is a graphics controller with VGA and LVDS adapters to connect different sorts of display terminals. Backlighting is provided for LCD modules too.
Two fast 100/10BaseT Ethernet ports, two RS232/RS422/RS485 serial ports, one RS485/ IrDA serial port and four USB 2.0 host ports handle the communication with external devices. There are PS/2 connectors for keyboard and mouse as well as a parallel printer port available. An IDE ATA100 adapter allows connection of hard disk or CD drives. Applications that require non-moving storage can use a plugged compact flash in a mounted socket which is connected to the ATA-controller.
System expansion can easily be realized over PC/104 and I²C bus connectors.
The CLR-LX800 is powered by a 5V-only supply and supports ACPI, advanced power management and PCI power management. Security critical applications take advantage of the Geode LX processor, too. It has an on-chip AES 128-bit crypto acceleration block capable of 44 Mbps throughput on either encryption or decryption. The AES block runs asynchronously to the processor core and is DMA based.
The CLR-LX800 runs DOS, Windows, Linux and VxWorks operating systems.
Features
CPU
• AMD Geode™ LX [email protected] (500MHz)
• Cache Memory with:
• 64 KB/64 KB level 1 I/D caches
• TLB (Translation Look-aside Buffer):
• 128 KB level 2 cache
• Efficient Prefetch
Chipset
• AMD CS5536 companion device
Interfaces
• 2 x Ethernet 10/100BaseT
• Compact Flash Type III header
• ATA-6 EIDE (Ultra DMA-100)
• PS/2 Keyboard/Mouse
• AC97 Audio ports
• 4 x USB 2.0 ports
• 1 x RS485/IrDA port
• 2 x RS232/RS485, software selectable
• 1 x parallel port
Main Memory
• soldered 256MB DDR400
Extension slots
• 1 x 16-bit PC/104 with full DMA capability
• 1 x Mini PCI Slot
• SVGA monitor
• 18 Bit Flat Panel
• 18/24 Bit LVDS for displays
• MISC signals: external power button, I²C bus, speaker, external reset button, hardware monitoring and general purpose signals external battery connector
• Power supply
Other configurations are possible at high volumes.
1.3 1(53)
USB1
Audio
IDC 10
2.54 mm
EIDE
IDC 44
2.00 mm
CF
Socket
USB2/3
DF13 8 pin
1.25 mm
Block Diagram
COM1
RS232/485
IDC 10
2.54 mm
COM2
RS232/485
IDC 10
2.54 mm
PS/2-MS/KB
MISC
IDC 10
2.54 mm
FWH
DF13 10 pin
1.25 mm
Line Driver
LTC1334
Line Driver
LTC1334
PS/2
Audio Codec
ALC203
EIDE
TFT
IDC 30
2.00 mm
VGA
IDC 10
2.54 mm
LVDS DF14
2 x 10 pin
1.25 mm
Backlight
DF13 8 pin
1.25 mm
Transmitter
DS90C383B
Super I/O
ITE8712
SPI
SST FWH
SST25LF080A
LPT/ Parallel
IDC 26
2.54 mm
I/O Companion
CS5536
SMC
UPD78F0511GA
SMB
2 x USB
RS485
USB
ETH
Intel 82551IT
ETH
Intel 82551IT
PCI -> ISA
ITE8888
SUPERVISORY
I²C
GP I/O
COM3/ IrDA
LEDs
DF14 25 pin
1.25 mm
USB0
Ethernet1
IDC 10
2.54 mm
Ethernet2
IDC 10
2.54 mm
PC/104 Bus
PCI Mini-PCI slot
AMD Geode LX800
Memory
256 MB
CLR-LX800 PC/104- Diagram rev1v0 23042008CS
1.3 2(53)
1.2 Ordering Information
Cool LiteRunner-LX800 Models
Order number Description
702-0008-10 CLR-LX800 with LCD+VGA-CRT, AMD GEODE [email protected] (500 MHz), low power consumption, 256MB DDR SDRAM, 4x USB2.0, IrDA, RTC, Battery, EIDE,
Compact Flash socket, 3x COM, LPT (EPP/EPC), PS/2 Keyboard, PS/2 Mouse,
WDOG, LEMT, PC/104 bus, VGA controller and LVDS Interface,
2x Fast Ethernet 100/10BaseT
802-0008-10
902-0008-10
Operating temp. range: 0°C .. +60°C
CLR-LX800 with LCD+VGA-CRT, AMD GEODE [email protected] (500 MHz), low power consumption, 256MB DDR SDRAM, 4x USB2.0, IrDA, RTC, Battery, EIDE,
Compact Flash socket, 3x COM, LPT (EPP/EPC), PS/2 Keyboard, PS/2 Mouse,
WDOG, LEMT, PC/104 bus, VGA controller and LVDS Interface,
2x Fast Ethernet 100/10BaseT
Operating temp. range: -20°C .. +60°C
CLR-LX800 with LCD+VGA-CRT, AMD GEODE [email protected] (500 MHz), low power consumption, 256MB DDR SDRAM, 4x USB2.0, IrDA, RTC, Battery, EIDE,
Compact Flash socket, 3x COM, LPT (EPP/EPC), PS/2 Keyboard, PS/2 Mouse,
WDOG, LEMT, PC/104 bus, VGA controller and LVDS Interface,
2x Fast Ethernet 100/10BaseT
Operating temp. range: -40°C .. +85°C
Cable Sets and Accessories
Order number Description
863-0016-10 Adapter Cable Set
Power, PS/2 keyboard and mouse, Audio and USB, Ethernet and USB, Ethernet,
VGA-CRT, 2x USB, COM1, COM2, LPT, IDE (44 pin, 2mm), cable adapter 2.5" >
3.5", adapter 3.5" > 2.5"
Mini PCI extension boards
Order number Description
806-0005-10 Mini-PCI module, 2x firewire port, w/o cable.
Operating temp. range: -20°C .. +60°C
806-0006-10 Mini-PCI module, 2x COM (RS232/422/485), 2 cables.
Operating temp. range: -20°C .. +60°C
1.3 3(53)
1.3 Specifications
Electrical Specifications
Supply voltage
Rise time
Supply voltage tolerance
Inrush current
Supply current
+5 V DC
< 10 ms
± 5%**
8 A, 25 µS maximal 1,2 A (Memtest86 v1.70) ** typical 0,84 A (Windows XP idle mode) typical 0,045 A (suspend to ram mode)
Environmental Specifications
Operating:
Temperature range
Temperature change
Humidity (relative)
Pressure
0 … 60 °C (commercial version)
-20 … 60 °C (industrial version)
-40 … 85 °C (extended version) max. 10K / 30 minutes
10 … 90 % (non-condensing)
450 … 1100 hPa
Non-Operating/Storage/Transport:
Temperature range -40 … 85 °C and more t.b.d.
Temperature change
Humidity (relative) max. 10K / 30 minutes
5 … 95 % (non-condensing)
Pressure 450 … 1100 hPa
MTBF
MTBF at 25°C t.b.d.
* With that tolerance it is not mentioned that all plugged devices are running with.
** That rate of current is possible when only monitor, mouse and keyboard are plugged.
If there are connected additional peripheral devises the current rises up.
1.3 4(53)
1.4 Mechanical
Dimensions (LxW)
Height
Mounting
95.9 mm x 90.2 mm (including I/O extension) max. 14 mm on topside above PCB max. 12 mm on bottom side above PCB
4 mounting holes
Note: It is strongly recommend using plastic spacers instead of metal spacers to mount the board. With metal spacers, there is a possible danger to create a short circuit with the components located around the mounting holes.
This can damage the board!
TOP
1.3 5(53)
BOTTOM (vertical mirrored)
1.3 6(53)
2 Getting Started
2.1 Connector Locations
Top
COM1 LPT
EIDE
ETH2
ETH1/USB1 Audio/USB2
The connectors' pin 1 is marked RED
VGA PS/2
COM2
Mini-PCI
PC/104
PWR
1.3 7(53)
Bottom
USB3/4
PWR
PC/104
Recovery
Board
The connectors' pin 1 is marked RED
SUPERVISORY
LVDS Backlight
Compact
Flash
Socket
Flat Panel
1.3 8(53)
2.2 Jumper Locations
Jumper
Battery
Jumper
Termination
Serial Interface
Jumper
LVDS and Backlight
Power Supply
1.3 9(53)
2.3 LED indicators
The onboard LED indicators provide a very comfortable way to check the board’s status. The boot success, power status, IDE accesses, Watchdog and Ethernet accesses are all visible.
The LED indicators are located on top of the board, near the PC/104 connector.
SPD2 Yellow LED lights up if 100Mbit connection of Ethernet 2 is established.
ACT2
SPD1
Green LED shows the Ethernet 2 Link and Activity status.
The LED lights up when the Link is established and it flashes when there is any activity.
Yellow LED lights up if 100Mbit connection of Ethernet 1 is established.
ACT1
MAIN
SBY
Green LED shows the Ethernet 1 Link and Activity status.
The LED lights up when the Link is established and it flashes when there is any activity.
Mode
Red LED is constantly lit if the boot process is complete and the board is running regularly.
Red LED flashes when board goes into suspend mode.
Green LED lights up when Main Power is supplied.
Green LED lights up when Standby Power is supplied.
LIVE The user programmable LED is on at startup when the board transfers data from the bios. The signal is also located on the SUPERVISORY connector.
Chapter 4.4 shows a small program how to get access for activation.
IDE
WD
Yellow LED flashes when IDE activity is recognized.
Red LED lights up when Watchdog is active.
Can only be reset by a power off.
1.3 10(53)
2.4 Hardware Setup
Caution Be sure to observe the EMC security measures. Make sure you are always at the same potential as the module.
Caution Never connect or disconnect peripherals like HDD-, PCI- and ISA- devices while the board's power supply is connected and switched on!
Use the cable set provided by LiPPERT to connect the Cool LiteRunner-LX800 to a VGA monitor.
Connect either PS/2 or USB keyboard and mouse, respectively. Use the 44-wire cable to connect the harddisk. Make sure that the pins match their counterparts correctly and are not twisted! If you plan to use additional other peripherals, now is the time to connect them, too.
Connect a 5 volt, min. 1 amps power supply to the power connector and switch the power on.
Note The 1 amps value is the minimum you should have for the standard peripherals mentioned. If you want to use more and/or others, please plan your power budget first! The system will not work if there is not enough supply current for all your devices.
The display shows the BIOS messages. If you want to change the standard BIOS settings, press the
<F1> key to enter the BIOS menu. See chapter 4.1 for setup details.
If you need to load the BIOS default values, they can be automatically loaded at boot time. See chapter 4.1 about how to do it.
The Cool LiteRunner-LX800 boots from CD drive, Compact Flash, USB floppy, USB stick, or harddisk.
Provided that any of these is connected and contains a valid operating system image, the display then shows the boot screen of your operating system.
The Cool LiteRunner-LX800 does not need any cooling measures, neither at standard environment temperatures from 0 °C … +60 °C nor in the extended range of -40 °C ... +85 °C.
1.3 11(53)
3 Module Description
3.1 Processor
The AMD Geode LX [email protected] processor delivers one of the best performance per watt in the industry, providing x86 power and versatility to embedded products. Its architecture and high level of integration guarantees longer battery life and allows very small designs, while delivering full x86 functionality.
The AMD Geode LX 800 processor consumes a maximum power of 3.9W and 1.8W typical at 500
MHz, enabling systems that only need to be passively cooled.
The x86 compatibility allow designers to focus on developing end products that efficiently meet consumer needs without being concerned with software porting or compatibility issues.
Coupled with the AMD Geode™ CS5536 companion device, the combined chipset, which operates at
1.9W typical at 433MHz and at 2.4W typical at 500MHz, offers a complete set of features that deliver full desktop functionality to embedded and portable devices.
Internal block diagram of the LX 800 processor
Processor functional blocks are
• CPU Core
• GeodeLink™ Control Processor
• GeodeLink Interface Units
• GeodeLink Memory Controller
• Graphics Processor
• Display Controller
• Video Processor
• Video Input Port
1.3 12(53)
• GeodeLink PCI Bridge
• Security Block
For further information, please refer to the data book of the AMD Geode TM
LX 800
3.2 Companion
AMD Geode™ CS5536 companion device
The AMD Geode™ CS5536 companion device is designed to work with an integrated processor North
Bridge component such as the AMD Geode™ GX/LX processor. Together, the Geode GX/LX processor and Geode CS5536 companion device provide a system-level solution well suited for the highperformance and low-power needs of a host of embedded devices including digital set-top boxes, mobile computing devices, thin client applications, and single board computers.
The internal architecture uses a single, high-performance modular structure based on GeodeLink™ architecture. This architecture yields high internal speed (over 4 GB/s) data movement and extremely versatile internal power management. The GeodeLink™ architecture is transparent to application software. Communication with the Geode GX/LX processor is over a 33/66 MHz PCI bus.
The Geode CS5536 companion device incorporates many I/O functions, including some found in typical Super-I/O chips, simplifying many system designs. Since the graphics subsystem is entirely contained in the Geode GX/LX processor, system interconnect is simplified. The device contains state-of-the-art power management that enables systems, especially battery powered systems, to significantly reduce power consumption.
Audio is supported by an internal controller, designed to connect to multiple AC97 compatible codecs. An IR (infrared) port supports all popular IR communication protocols. The IR port is shared with one of two industry-standard serial ports that can reach speeds of 115.2 kbps. An LPC (low pin count) port is provided to facilitate connections to a Super-I/O should additional expansion, such as a floppy drive, be necessary, and/or to an LPC ROM for the system BIOS
The hard disk controller is compatible to the ATA-5 specification. The bus mastering IDE controller includes support for two ATA-compliant devices on one channel. The CS5536 companion device provides four Universal Serial Bus (USB) 2.0 compliant ports, supporting low speed, full speed, and high speed connections. All four ports are individually automatically associated with either the Open
Host Controller Interface (OHCI) or the Enhanced Host Controller Interface (EHCI) depending on the attached device type. A real-time clock (RTC) keeps track of time and provides calendar functions.
A suite of 82xx devices provides the legacy PC functionality required by most designs, including two
PIC's (programmable interrupt controllers), one PIT (programmable interval timer) with three channels, and DMA (direct memory access) functions. The CS5536 companion device contains eight
MFGPT's (multi-function general purpose timers) that can be used for a variety of functions. A number of GPIO's (general purpose input/outputs) are provided, and are assigned to system functions on power-up.
State-of-the-art power management features are attained with the division of the device into two internal power domains. The GPIO's and multi-function timers are distributed into each domain allowing them to act as wakeup sources for the device. The device provides full ACPI (Advanced
Configuration Power Interface) compliance and supports industry-standard Wakeup and Sleep modes.
1.3 13(53)
3.3 Graphics-Controller
The graphics controller is integrated in the Geode LX processor and does high performance 2Dgraphics handling. CRT monitors can be used as well as TFT- and LVDS displays. Therefore, two different connectors are on the board. It is possible to switch between CRT and TFT via BIOS or driver settings. It is possible to use a CRT and a TFT/LVDS display simultaneously
(depends on drivers setting).
The CLR-LX800 supports 3,3V and 5V TFT displays up to 18bit and LVDS displays with 18/24bit interfaces and unconventional signal configuration. The display type and resolution can be selected in BIOS setup:
Motherboard Device Configuration Æ Video and Flat Panel Configuration.
SVGA Configuration
Resolution Color Depth (bpp)
640 x 480
800 x 600
1024 x 768
1152x864
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16 or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
85
90
100
60
70
72
75
85
72
75
85
90
100
60
70
72
75
90
100
Refresh Rate
(Hz)
60
70
72
75
85
90
100
60
70
Dot Clock (MHz)
49.500
49.500
56.250
60.065
68.179
65.000
75.000
78.750
78.750
94.500
100.187
113.310
81.600
97.520
101.420
108.000
119.650
129.600
144.000
25.175
28.560
31.500
31.500
36.000
37.889
43.163
40.000
45.720
Min. GLIU Frequency
(MHz)
75
75
75
75
75
400
400
75
75
100
400
400
100
100
200
200
200
75
75
75
400
400
75
100
100
100
400
400
1.3 14(53)
Resolution Color Depth (bpp)
1280 x 1024
1600 x 1200
1920x1440
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
8, 16, or 24/32
Refresh Rate
(Hz)
60
70
72
75
85
90
100
60
70
72
75
85
90
100
60
70
72
75
85
Dot Clock (MHz)
108.000
129.600
133.500
135.000
157.500
172.800
192.000
162.000
189.000
198.000
202.500
229.500
251.182
280.640
234.000
278.400
288.000
297.000
341.349
Min. GLIU Frequency
(MHz)
200
200
200
200
200
400
400
200
200
233
233
266
400
400
266
400
400
400
400
VGA Connector
Connector type IDC10 pin header 2.54 mm
Pin Signal Pin Signal
1 Red 2 GND
3 Green 4 GND
5 Blue 6 GND
7 HSYNC 8 GND
9 VSYNC 10 GND
1.3 15(53)
Flat Panel and LVDS Configuration
Flat panel and LVDS have the same display options as shown in the table:
Setting
Flat Panel Type
Resolution
Data Bus Type
Refresh Rate
HSYNC Polarity
VSYNC Polarity
LP Active Period
Possible Values
Auto, TFT, LVDS
320x240, 640x480, 800x600, 1024x768,
1152x864, 1280x1024, 1600x1200
18/24 Bits, 2ppc
60 70, 72, 75, 85, 90, 100 Hz
High, Low
High, Low
Active Only Æ only active during SYNC
Free Running Æ always active
SHFCLK Active Period Active Only Æ only active during SYNC
Free Running Æ always active
To ease usage of these displays it’s possible to select the display and backlight supply voltages with the onboard voltage selector jumpers. (Jumper LVDS and Backlight, see below)
Flat Panel Connector 18 Bit
Connector type IDC30 pin header 2.00 mm
Pin Signal Pin Signal
1 GND 2 DOTCLK
3 HSYNC 4 VSYNC
5 GND 6 R0
7 R1 8 R2
9 R3 10 R4
11 R5 12 GND
13 G0 14 G1
15 G2 16 G3
17 G4 18 G5
19 GND 20 B0
21 B1 22 B2
23 B3 24 B4
25 B5 26 GND
29 VLCD-SW 30 GND
1.3 16(53)
LVDS Connector
Connector type Hirose DF13 20-pin header, single row
Pin Signal Pin Signal
2 SW-VDD 1 SW-VDD
4
GND 3 GND
6
TX3+
5
TX3-
8
TXCLK-
7
GND
10
GND
9
TXCLK+
12
TX2+
11
TX2-
14
TX1-
13
GND
16
GND
15
TX1+
18
TX0+
17
TX0-
20
DDC DATA
19
DDC CLK
Backlight Connector
Connector type Hirose DF13 8 pin, single row
Pin
1
Signal
2
3
+12 Volts
+12 Volts
4
5
+5 Volts
+5 Volts
6
7
ENABLE
VCC*
8
GND
GND
*That voltage can be selected over Jumper Backlight, shown on next page
1.3 17(53)
Display Voltage Jumpers
Jumper LVDS and Backlight
Connector type IDC6 jumper 2.00 mm.
Use a 2 mm jumper between 1-3 or 3-5 to select the backlight voltage.
Use a 2 mm jumper between 2-4 or 4-6 to select the display voltage.
Pin Signal Pin Signal
5 + 5 volts default jumper setting
Backlight
Jumper 1-3
Power supply +12V
LVDS
Jumper 2-4
Power supply +5V
3-5
+5V
4-6
+3.3V
Note An arrow marks Pin 1
3.4 Compact Flash Socket
On the bottom side of the board a compact flash socket is located that allows the use of compact flash cards instead of a hard disk. This socket is connected to the chipset's EIDE port. As default it is defined as Master. Master/Slave selection can be done in BIOS.
Compact flash cards are available as solid-state disks up to several Gbytes.
With the supported UDMA-4 mode and the latest CF cards there are data rates up to 40MByte/s possible.
1.3 18(53)
3.5 Ethernet Controller
On the board there are two Intel 82551IT Fast Ethernet Controllers mounted.
The 82551IT is an evolutionary addition to Intel’s family of 8255x controllers. It provides excellent performance by offloading TCP, UDP and IP checksums and supports TCP segmentation off-load for operations such as Large Send. The 82551IT provides an extended operating temperature in addition to all of the same capabilities and features as the 82551ER to address applications requiring a wider operating temperature range.
Its optimized 32-bit interface and efficient scatter-gather bus mastering capabilities enable the
82551IT to perform high speed data transfers over the PCI bus. This capability accelerates the processing of high level commands and operations, which lowers CPU utilization. Its architecture enables data to flow efficiently from the bus interface unit to the 3 KB Transmit and Receive FIFO's, providing the perfect balance between the wire and system bus. In addition, multiple priority queues are provided to prevent data underruns and overruns.
The 82551IT includes both a MAC and PHY. In also has a simple interface to the analog front end, which allows cost effective designs requiring minimal board real estate. The 82551IT is pin compatible with the 82559 family of controllers and is offered with software that provides backwards compatibility with previous 8255xER controllers.
Ethernet Interface
The Ethernet 1 connector is shared with USB 1 and I²C bus.
Connector type IDC10 pin header 2.54 mm
Pin Signal Pin Signal
1 ETH1-TX+ 2 ETH1-TX-
3 ETH1-RX+ 4 PE
7
9
USB0+
VCC_USB0
The Ethernet 2 connector uses a single connector
Connector type IDC10 pin header 2.54 mm
8
10
USB0-
USB-GND
Pin Signal Pin Signal
1 ETH2-TX+ 2 ETH2-TX-
3 ETH2-RX+ 4 PE
7 PE 8 PE
9 n.c. 10 n.c.
1.3 19(53)
3.6 On Board Power Supply
The on board power supply generates all necessary voltages from the single supply voltage of 5 volts. The generated 3.3 volts are available on the connectors "Flat Panel" and "LVDS".
Note This 3.3 V must not be used to supply external electronic devices with high power consumption like other PC/104 boards or displays.
Power Connector
Connector type JST B15B-EH-A 15 pin
Pin Signal (standard) Signal (5V only)
1 +5V
2 GND
+5V
GND
3 +5V
4 GND
5 +5V
6 n.c.
7 GND
8 GND
9 n.c.
10 n.c.
11 GND
12
13
+12V (only for PC104 slot and backlight power supply)
+12V (only for PC104 slot and backlight power supply)
14 GND
15 -12V (only for PC104 slot)
+5V
GND
+5V n.c.
GND
GND n.c n.c
GND n.c n.c
GND n.c
Note The default cable adapter supports the connection of
±
12V power supply.
If the 5V only power supply is required leave these pins open.
The board can also be supplied over PC/104- or PC/104 plus bus.
1.3 20(53)
3.7 EIDE Port
An EIDE (Enhanced Integrated Drive Electronics) port is provided by the chipset to connect one drive. The connected device must be set as slave.
To enhance the performance, this port has a 100 MB/s IDE controller in UDMA mode per the ATA-5 specification The EIDE port is available on a standard 44-pin header (2 mm) for 2.5" hard disks.
An adapter cable is available to connect standard EIDE devices with a 40 pin IDC header.
EIDE Connector
Connector type IDC44 pin header 2.00 mm
Pin Signal Pin Signal
1 Reset# 2 GND
3 Data7 4 Data8
5 Data6 6 Data9
7 Data5 8 Data10
9 Data4 10
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
Data3
Data2
Data1
Data0
GND
DRQ0
Write
Read
Ready
DACK0
IRQ
Address1
Address0
CS1
NC
+5 Volts
GND
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
Data11
Data12
Data13
Data14
Data15
NC
GND
GND
GND
CSEL
GND
IOCS16-
PD66
Address2
CS3
GND
+5 Volts
GND
1.3 21(53)
3.8 PS/2 Interface
PS/2-connectors for mouse and keyboard are shared with several system signals.
An adapter cable for the PS/2 devices is available.
Keyboard and Mouse Connector
Connector type IDC10 pin header 2.54 mm
Pin
1
3
5
7
9
Signal
KB Data
GND
Ext. Battery
Pin
6
8
10
Signal
KB Clock
+5 Volt Standby
Reset-In/ Power
Button
3.9 USB 2.0 Ports
Four standard USB 2.0 host ports are provided at the with CLR-LX800. The first is located on the
IDC10 header "Ethernet" and the second on the IDC10 header "Audio"
The other two ports are located on the separate DF13 8 pin header "USB".
An adapter cable for all ports is available to use standard USB devices
It is possible to use an USB keyboard under MSDOS without special driver software.
Note: Not all USB keyboard models are supported.
1.3 22(53)
USB 2.0 Connector 1
Connector type IDC10 pin header 2.54 mm
Pin
1
3
5
Signal
ETH1-TX+
ETH1-RX+
PE
Pin
2
4
6
Signal
ETH1-TX-
PE
ETH1-RX-
7 USB1+ 8 USB1-
9 VCC_USB1 10 USB-GND
USB 2.0 Connector 2
Connector type IDC10 pin header 2.54 mm
Pin Signal
1 USB2+
3 VCC_USB2
5 LINEIN-L
7 LINEOUT-L
9 MICROPHON
Pin Signal
2 USB2-
4 USB-GND
6 LINEIN-R
8 LINEOUT-R
10 GND-AUDIO
USB 2.0 Connector 3/4
Connector type DF13 8 pin header 1.25 mm
Pin Signal
1 VCC_USB3
2 USB3-
3 USB3+
4 USB-GND
5 USB-GND
6 USB4-
7 USB4+
8 VCC_USB4
1.3 23(53)
3.10 Serial Ports
The serial ports are located on two IDC10 headers "COM1" and "COM2". Adapter cables with standard DSUB-9 male connectors are available. The ports either work in RS232 or RS485 mode, selectable in BIOS. When entering Motherboard Device Configuration Æ Serial and Parallel
Device Configurations, COM Port 1 Mode and COM Port 2 Mode can be selected. Termination resistors for RS485 Mode can be set with Jumpers on pin headers as described in this chapter.
To enable transmitters of COM1 and COM2 in RS485 Mode set RTS signal to ‘1’.
The third serial Port is located at the supervisory connector see chapter 3.18.
COM Port 3 is a RS485-only interface and can be used in 2-wire and in 4-wire systems. In 2-wire systems only Half Duplex is possible, whereas in 4-wire systems both, Half- and Full-Duplex, mode can be used. In 2-wire systems or 4-wire systems with more than 1 transmitter the transmitter must be disabled in receive mode, and enabled in transmit mode. See chapter 4.3
for an example.
The serial ports are programmable in BIOS setup. When entering Motherboard Device
Configuration Æ Serial and Parallel Device Configurations, configuration of the serial ports is accessible.
The following settings are possible for COM1 and COM2:
• Disabled
• 3F8 / IRQ4 (base address / interrupt channel)
• 2F8 / IRQ3 (base address / interrupt channel)
• 3E8 / IRQ4 (base address / interrupt channel)
• 2E8 / IRQ3 (base address / interrupt channel)
The following for COM3: base address
• Disabled
• 3F8
• 2F8
• 3E8
• 2E8 interrupt channel
• IRQ5
• IRQ6
• IRQ7
• IRQ9
• IRQ10
• IRQ11
• IRQ15
1.3 24(53)
COM1/2
Connector type IDC10 pin header 2.54 mm
Pin RS232 RS485 Pin RS232 RS485
3 RXD RXD- 4 RTS TXD+
5 TXD TXD- 6 CTS Not used
7 DTR Not used
9 GND GND 10 +5 Volts +5 Volts
RS485-Termination Jumpers
Connector type IDC12 pin header 2.00 mm
Use 2 mm jumpers to terminate lines correctly.
There are two jumpers COM1 and COM2, respectively.
The RS485 termination jumpers are located at the bottom of the printed circuit board, see chapter 2.2
Pin Signal Pin Signal
1 TX+_COM1 2 TX-_COM1
3 RX+_COM1 4 RX-_COM1
5 TX+_COM2 6 TX-_COM2
7 RX+_COM2 8 RX-_COM2
9 TX+_COM3 10 TX-_COM3
11 RX+_COM3 12 RX-_COM3
Module side
RX+
+5V
10K
Jumper
RX-
When the jumper is set, the differential pairs are terminated with 120Ω between them.
(e.g. RX+ and RX-, on the right picture)
Additionally, positive/negative receive lines are pulled up/down with 10kΩ to 5V/GND in order to protect the transceivers of the Cool LiteRunner-LX800 from over voltages.
GND
It is recommended to protect the ports of the external device in the same way!
120
External device
10K
Caution: Termination Resistors should not be used in RS232 Mode!
Otherwise, the serial ports will not work.
1.3 25(53)
3.11 IrDA Interface
The IrDA interface signals IRRX and IRTX are located on the supervisory connector, see chapter
3.18. The IrDA interface shares its UART with COM3, the normal serial port 3 cannot be used at the same time as the IrDA interface.
To use the IrDA interface an external transmitter must be connected to the IrDA signals and the in
BIOS IrDA mode has to selected.
1.3 26(53)
3.12 Parallel Port LPT1
The parallel port is located on an IDC26 header. An adapter cable with a standard DSUB-25 female connector is available.
The parallel port is programmable in BIOS.
Entering Motherboard Device Configuration Æ Serial and Parallel Device Configurations, configuration of LPT1 is accessible.
LPT1 Parameter Possible Settings
Base Address Disabled, 0x378
0x3BC and 0x278 are not recommended, because of a possible conflict with the PCI to ISA Bridge
Mode Compatible, PS/2 Bi-directional, EPP 1.7, EPP 1.9
IRQ
DMA
Disabled, IRQ 5, IRQ 7, IRQ 9, IRQ 10, IRQ 11
None, Channel 1, Channel 3
LPT1 Connector
Connector type IDC26 pin header 2.54 mm
Pin Signal Pin Signal
3 Data0 4 Error
5 Data1 6 Init
9 Data3 10 GND
11 Data4 12 GND
13 Data5 14 GND
15 Data6 16 GND
17 Data7 18 GND
19 ACK 20 GND
21 Busy 22 GND
23 Paper GND
1.3 27(53)
3.13 LEMT functions
The onboard Microcontroller implements power sequencing and LEMT (LiPPERT Enhanced
Management Technology) functionality. The microcontroller communicates via the System
Management Bus with the CPU/Chipset. The following functions are implemented:
• Total operating hours counter
Counts the number of hours the module has been run in minutes.
• On-time minutes counter
Counts the seconds since last system start.
• Power cycles counter
• Watchdog Timer
Set / Reset / Disable Watchdog Timer.
• System Restart Cause
Power loss / Watchdog / External Reset.
• Flash area
1kB Flash area for customer data
• Protected Flash area
128 Bytes for Keys, ID's, etc. can stored in a write- and clear-protectable region.
• Board Identify
Vendor / Board / Serial number
3.14 Watchdog
A watchdog timer is integrated on-board and managed by the LEMT. There are two different possibilities for its activation. One event is caused by under voltage protection.
The watchdog LED get flashed after restart, but only if the power supply had stood over 4,2 Volts.
The other watchdog event is triggered by internal circuit of the ITE8712 Super I/O. It is possible to program the trigger duration, see chapter 4.3 for an example.
3.15 Speaker
The speaker signal is located on the IDC10 Header PS/2. A standard PC Speaker can be connected between the signal SPEAKER and VCCKB.
Pin Signal Pin
1 Speaker 2
Signal
Mouse Clock
3
5
Reset-In
KB Data
4
6
Mouse Data
KB Clock
7
9
GND
Ext. Battery
8 +5 Volt Standby
10 Power Button (default)/
Reset-In
1.3 28(53)
3.16 External Power-Button
The Power-Button signal is located on the IDC10 Header PS/2. To power up/down the board the signal Power-Button must be pulled to GND.
Connector type IDC10 pin header 2.54 mm
Pin
1
Signal
Speaker
Pin
2
Signal
Mouse Clock
3
5
Reset-In
KB Data
4
6
Mouse Data
KB Clock
7 GND 8
9 Ext. Battery 10
+5 Volt Standby
Power Button
3.17 Reset-In Signal
The "Reset-In" signal is located on the IDC10 Header PS/2. To reset the board, the signal "Reset-In" must be pulled to GND.
Connector type IDC10 pin header 2.54 mm
Pin
1
Signal
Speaker
Pin
2
Signal
Mouse Clock
3 Reset-In 4
5 KB Data 6
Mouse Data
KB Clock
7 GND 8
9 Ext. Battery 10
+5 Volt Standby
Power Button
1.3 29(53)
3.18 Supervisory
The Cool LiteRunner-LX800 provides a 25-pin Supervisory Connector on its bottom side.
The table below shows the assignment of the different signals.
Connector type DF14 25 pin header 1.25 mm, single row
Pin
1
Signal
5V / 10mA
Pin
2
Signal
3,3V / 15mA
3 GPIO30 1 4 GPIO31 1
5 GPIO32 1 6 GPIO33 1
7 GPIO34 1 8 GPIO35 1
9 GPIO36 1 10 GPIO37 1
11 Suspend-LED² 12 Live-LED²
15 ETH1 Infrared-Send
17 Infrared-Receive 18 I 2 C_CLK
19 I 2 C_DATA 20 IDE_LED#²
25 GND
Notes:
(1) See chapter 4.2 about GPIO programming
(2) Connect cathode of LED to this pin. An external resistor is required.
(3) Power Management Signal
1.3 30(53)
3.19 Mini-PCI BUS Interface
The Mini-PCI specification defines a small form factor daughter card for the 32bit PCI bus that can be used on CPU-boards in which standard PCI cards cannot be used due to mechanical constraints. A
CPU board with such a card can easily be enhanced with new functionality. The onboard Type IIIA
Mini-PCI Slot can be used to extend the system easily with peripheral functionality, like WLAN modules, Fire Wire-, Serial- and USB 2.0- ports.
Several Mini-PCI extension boards are available on request.
1.3 31(53)
Pin Signal Pin Signal
1 n.c. 2 n.c.
17 PCI_INTA# 18 5V
25 CLK_33_MPCI_R 26 PCI_RST#
27 GND 28 3.3V
29 REQ1_MPCI# 30 GNT1_MPCI#
31 3.3V 32 GND
33 PCI_AD31 34 PME#
35 PCI_AD29 36 n.c.
39 PCI_AD27 40 3.3V
41 PCI_AD25 42 PCI_AD28
45 PCI_C/BE3# 46 PCI_AD24
47 PCI_AD23 48 PCI_AD23
49 GND 50 GND
51 PCI_AD21 52 PCI_AD22
53 PCI_AD19 54 PCI_AD20
57 PCI_AD17 58 PCI_AD18
59 PCI_C/BE2# 60 PCI_AD16
61 PCI_IRDY# 62 GND
67 PCI_SERR# 68 PCI_STOP#
69 GND 70 3.3V
73 PCI_C/BE1# 74 GND
1.3 32(53)
Pin Signal Pin Signal
75 PCI_AD14 76 PCI_AD15
79 PCI_AD12 80 PCI_AD11
81 PCI_AD10 82 GND
87 PCI_AD07 88 3.3V
91 PCI_AD05 92 PCI_AD04
95 PCI_AD03 96 PCI_AD00
99 PCI_AD01 100 n.c.
101 GND 102 GND
105 n.c. 106 n.c.
107 n.c. 108 n.c.
109 n.c. 110 n.c.
111 n.c. 112 n.c.
113 GND 114 GND
115 n.c. 116 n.c.
117 GND 118 GND
119 GND 120 GND
121 n.c. 122 n.c.
Note: All VI/O pins are connected to +3.3V.
The maximum current is limited to 1.0 amp for each voltage.
1.3 33(53)
3.20 PC/104 Bus Interface
The PC/104 bus is a modification of the industry standard (ISA) PC bus specified in IEEE P996. The
PC/104 bus has different mechanics than P966 to allow the stacking of modules. The main features are:
• Supports programmable extra wait state for ISA cycles
• Supports I/O recovery time for back-to-back I/O cycles
The following table shows the pin assignment of the PC/104 connector.
Note: -5 V on the PC/104 connector is not supported on this board.
PC/104 Bus Connector
Pin A B
Pin
3
4
5
D6
D5
D4
+5V see note
IRQ9
-5V
D C 8 D1
DRQ2
-12V
ENDXFER
GND GND +12V
1 MEMCS16 SBHE
2 IOCS16 LA23
3 IRQ
4 IRQ
LA22
LA21
5 IRQ
6 IRQ
7 IRQ
8 DACK
LA20
LA19
LA18
LA17
9 DRQ
10 DACK
11 DRQ
12 DACK
13 DRQ
MEMR
MEMW
SD8
SD9
SD10
10 IOCHRDY KEY
11 AEN SMEMW
12 A19
13 A18
14 A17
15 A16
16 A15
17 A14
18 A13
19 A12
20 A11
21 A10
22 A9
SMEMR
IOW
IOR
DACK3
DRQ3
DACK1
DRQ1
REFRESH
SYSCLK
IRQ7
IRQ6
14 DACK
15 DRQ
SD11
SD12
16 +5V SD13
17 MASTER SD14
23 A8
24 A7
25 A6
26 A5
IRQ5
IRQ4
IRQ3
DACK2
18 GND SD15 27 A4 TC
GND GND BALE
1.3 34(53)
4 Using the Module
4.1 BIOS
The Cool LiteRunner-LX800 is delivered with a Insyde Technology XpressROM BIOS. The default setting guarantees a "ready to run" system, even without a BIOS setup backup battery.
The BIOS is located in flash memory and can be easily updated on board with software under DOS.
All setup changes of the BIOS are stored in the CMOS RAM. A copy of the CMOS RAM, excluding date and time, is stored in the flash memory. This means that even if the backup battery runs out of power, the BIOS settings are not lost. Only date and time will be reset to their default value.
The soldered battery will keep that information over 3 years without any activation of the board.
That depends on the use of the board. When power is up, the battery does not lose capacity.
With the Jumper "Battery", see chapter 2.2, the battery can be disconnected from the system.
Because of the flash storage in the BIOS the settings will keep their information after.
Except the Real Time Clock will not be up to date.
If the board should be stored for longer times, this is the best solution to save the capacity.
The battery loses 1% of its capacity over self-discharge per year without the jumper.
Configuring the XpressROM BIOS
Pressing <F1> on power up starts the BIOS setup utility.
On the screen there are three separated parts:
TOP
The part shows information over the current BIOS version. In brackets the name of the associate bin-file can be found. On the right side is the date when the file was built.
MIDDLE
Here are the different menus listed.
BOTTOM
A short information about the content of the selected menu is shown.
1.3 35(53)
Field Selection
To move between fields in Setup, use the keys listed below:
Key Function
Æ, Å, È, Ç
+, -
Enter
Move between fields
Selects next/previous values in fields
Go to the submenu for the field
Esc To previous field then to exit menu
In order to save your settings, select Save values and Exit and confirm with Y.
Should you want to discard everything, select Exit Without Save.
When troubleshooting a system, it is highly recommend to first restore the BIOS's factory settings before any debugging is done. This is achieved with Load Defaults in the main setup menu.
The Motherboard Device Configurations menu allows to configure the drives, LPC, DDMA, display, GPIO usage, and PCI configuration. The CPU's temperature can be read here, too.
1.3 36(53)
The Drive Configuration menu allows to configure connected EIDE devices.
An IDE device can be disabled that its power stays off after restart.
With the help of 80-Conductor Cable Sense the access system memory mode of an device is set.
For running a device in UDMA-4 mode a 80 pin cable is required. The GPIO 05 option should detect that automatically. If it does not, there is the option to select it manually too.
Hard Drive Setting
80-Conductor Cable Sense
Drive Modes
Options
GPIO 05, NONE, Force 40, Force 80
Auto, PIO0, PIO1, PIO2, PIO3, PIO4,
MDMA0, MDMA1, MDMA2, UDMA0,
UDMA1, UDMA2, UDMA3, UDMA4
1.3 37(53)
The Serial and Parallel Device Configurations menu allows to configure COM1, COM2, COM3 and LPT1.
COM-Ports 1 and 2 can be switched between RS232 and RS485. It is possible to chance the resource and interrupts of all ports.
Hard Drive Setting
Serial Port 1/2
Serial Port 3
Serial Mode
Parallel Port
Parallel Mode
Parallel IRQ
Parallel DMA
Options
Disabled, 0x3f8 IRQ 4, 0x2f8 IRQ 3,
0x3e8 IRQ4, 0x2e8 IRQ3
Disabled, 0x3f8, 0x2f8, 0x3e8 0x2e8
IRQ 5,6,7,9,10,11,15
SIR/CIR, RS485 16550 compatible,
RS485 extended
RS232, RS485
Disabled, 0x378, 0x278, 0x3BC
Compatible, PS/2 Bi-directional,
EPP 1.7, EPP 1.9, ECP
Disabled, IRQ5, IRQ7, IRQ9, IRQ10,
IRQ11
Channel 1, Channel 3, none
1.3 38(53)
The DDMA Configuration menu allows to activate the DMA Mode for Channel 0 to 7.
The Graphics Configuration menu allows to set up different displays and their several functions.
Possible options are mentioned in chapter 3.4.
1.3 39(53)
The PCI Configuration menu contents options about PCI interrupts and USB.
There the PCI-ports can be referred to an interrupt.
In the USB Settings the different controllers can be selected.
The port 4 can be changed to client mode.
The audio controller can be disabled if not needed.
System Clock/PLL Configuration lets you define the CPU and PLL settings.
1.3 40(53)
The Power Management menu gives control over power down modes supported.
Miscellaneous Configuration controls various other features
1.3 41(53)
ISA I/O and Memory Configuration allows setting the boards ISA memory and I/O map.
The menu Boot Order specifies the order in which the BIOS tries the various mass memory devices for a bootable operating system. Boot over LAN is also supported.
1.3 42(53)
Trouble Shooting BIOS Settings
It may happen that the BIOS is configured that the Cool LiteRunner-LX800 does not start at all. To repair this, the default values of the BIOS can be automatically loaded at boot time. To load these, the power must be switched on and off again within 2 seconds. This sequence must be repeated 5 times, then the default values get loaded by the BIOS.
Power
On
Off
1 2 3 4 5
≤ 2s
Pressing the Reset-Button five times while the system is booting achieves the same result.
1.3 43(53)
4.2 Programming GPIO Signals
The Cool LiteRunner-LX800 general purpose I/O signals (GPIO) are part of the ITE8712 SuperI/O.
They are located in Logical Device 7 of the Super I/O and can be programmed using in/out statements on Index/Data registers 2Eh/2Fh. GPIO's 1x belong to GPIO set #1, GPIO's 2x to set #2 and so on, up to set #5. The following lines show an example how to program GPIO Bank 3, whose signals are located on the SUPERVISORY connector.
The code is meant to be compiled using gcc under Linux.
#include <sys/io.h>
#include <stdio.h>
#define CONF_ADDR 0x2E
#define CONF_DATA 0x2F
#define GPIO_ADDR 0x1220 //port address
//**************************************************************
// InitGPIO: initialize GPIO Bank #3
// Parameter: mode: bit=1 -> set to GPIO
// dir: bit=1/0 -> set to output/input
// (char = 8 bit)
// Returns: -
//************************************************************* void InitGPIO(char mode,char dir)
{
// To set the SuperI/O into configuration mode, the sequence
// 0x87, 0x01, 0x55, 0x55 must be written to the configuration address.
outb(0x87, CONF_ADDR);
outb(0x01, CONF_ADDR);
outb(0x55, CONF_ADDR);
outb(0x55, CONF_ADDR);
// Enable Logical Device 7 for programming by writing 07h to
// register 07h of the SuperI/O:
outb(7, CONF_ADDR); //Set to logic device
outb(7, CONF_DATA); //Number of logic device
// Set GPIO-Set 3 Multifunction Pin Selection Register 27 to GPIO function
// and enable the "simple I/O" function
// Input: mode – each set bit represents a GPIO function
outb(0x27, CONF_ADDR); // set bank #3 to GPIO
outb(mode, CONF_DATA); // BIT: 1=GPIO , 0=other function
// Define the GPIO's data direction
// Input: dir – each set bit represents an output
outb(0xCA, CONF_ADDR); // set direction: output/input
outb(dir, CONF_DATA); // BIT: 1=output, 0=input
outb(0xBA, CONF_ADDR); // enable pull-ups if acting as output
outb(dir, CONF_DATA); // BIT: 1=pull up, 0=no pull up
} int main()
{
char value1=0x55,value2; //8 bit values
iopl(3); //get all I/O rights
InitGPIO(0xff,0xff); //Initialize GPIO:
//set all to GPIO and all to output
outb(value1, GPIO_ADDR); //write out value1
printf("Write=%x", value1);
value2 = inb(GPIO_ADDR); //read in value2
printf(", Read=%x\n", value2);
return 0;
}
For a more detailed description about programming the ITE8712 super I/O, please refer to chapter 8 of the datasheet.
1.3 44(53)
4.3 Programming Serial Port COM3
The transmitter of the RS485 interface must be disabled in receive mode, and enabled in transmit mode. The receiver has to be enabled in BIOS, by selecting the RS485 mode.
Therefore, setting GPIO2x of the ITE Super I/O
Bit 0 to ‘0’ Æ disables transmitter, ‘1’ Æ enables transmitter
The example is meant to be compiled using gcc under Linux.
#include <sys/io.h>
#include <stdio.h>
#define DATA_REG 0x1221 //Port addres for fast access to GPIO2x bank void Com3Transmitter(unsigned char ON)
{
unsigned char regval;
if(ON)
regval = inb(DATA_REG) | 1; // enable COM3 RS485, Bit 0 of GPIO2x
else
regval = inb(DATA_REG) & ~1; // disable COM3 RS485, Bit 1 of GPIO2x
outb(regval, DATA_REG);
printf("regval=%x inb=%x\n",regval,inb(DATA_REG));
} int main(int argc, char *argv[])
{
unsigned char value;
iopl(3);
if(argc == 2)
{
value = strtol(argv[1], (char**)NULL,10);
if(value == 0 || value == 1)
Com3Transmitter(value);
else
printf("ERROR: wrong value\n");
}
else
printf("USAGE: ./com3 <value>\nvalue = 0 -> OFF\nvalue = 1 -> ON\n");
return 0;
}
1.3 45(53)
4.4 LIVE LED Programming
The LIVE LED can be programmed by users. The cathode of the mounted LED is connected to a GPIO pin of the Super I/O. If the input has ground potential the LED is on.
That pin is set as simple I/O and can be easily reached over the port address.
The following program chances the state of the LIVE LED.
#include <stdio.h>
#include <sys/io.h>
#define PORT 0x1220 int main()
{
unsigned char DATA, LED;
iopl(3);
LED = inb(PORT) && 0x01; //Mask the BIT 0 of GPIO1x bank
DATA = inb(PORT);
if(LED == 0x01)
{
printf("\nLIVE LED was OFF\n");
outb(DATA - 1, PORT);
printf("...");
sleep(2);
printf("\nSwitched it ON\n");
}
else
{
printf("\nLIVE LED was ON\n");
outb(DATA + 1, PORT);
printf("...");
sleep(2);
printf("\nSwitched it OFF\n");
}
iopl(0);
return 0;
}
1.3 46(53)
4.5 Watchdog Programming
Since the Watchdog is disabled in delivery status, it must be set up for proper use.
The Watchdog is an internal feature of the ITE8712 Super I/O. If the Watchdog is activated and the timer is not set back within a programmed amount of time, the board does a system reset. In order to read back the watchdog event read Bit 0 of Watchdog status register 71h in LDN7.
The following program in C is an example how to test Watchdog function under DOS.
This routine is meant to be compiled using gcc under Linux.
#include <stdio.h>
#include <sys/io.h>
#include <unistd.h>
#define CONF_ADDR 0x2E
#define CONF_DATA 0x2F int main()
{
unsigned char i;
iopl(3);
outb(0x87, CONF_ADDR); // sets SIO in configuration mode (fix sequence:
// 0x87,0x01,x055,0x55)
outb(0x01, CONF_ADDR);
outb(0x55, CONF_ADDR);
outb(0x55, CONF_ADDR);
outb(0x07, CONF_ADDR); // LDN=0x07
outb(0x07, CONF_DATA);
outb(0x72, CONF_ADDR); // set time out value to seconds
outb(inb(CONF_DATA)|0x80, CONF_DATA);
outb(0x73, CONF_ADDR); //set time out:
outb(0x03, CONF_DATA); //0x03 -> 3 seconds
printf("Watchdog enabled. Press CTRL+C within 5 seconds to stop resetting.\n");
for(i=0; i<5; i++)
{
outb(0x73, CONF_ADDR); //reset time out
outb(0x03, CONF_DATA);
printf(".");
fflush(stdout);
sleep(1);
}
outb(0x73, CONF_ADDR);
outb(0x00, CONF_DATA); //deactivate watchdog
printf("\nWatchdog disabled\n");
iopl(0);
return 0;
}
1.3 47(53)
4.6 Reading Temperatures
There are temperature sensors available that allow measurement of the CPU's chip temperature as well as the boards ambient temperature. These are shown in the BIOS setup screens, see above.
This example is meant to be compiled using gcc under Linux.
#include <stdio.h>
#include <unistd.h>
#include <sys/io.h>
#define LPC_INDEX 0x295
#define LPC_DATA 0x296 int main()
{
char cputemp = 0;
char ambtemp = 0;
iopl(3);
//******* needed with BIOS prior version 7 ******
outb(0x51,LPC_INDEX); //thermal diode mode
outb(0x03,LPC_DATA);
outb(0x5C,LPC_INDEX); //unlock offset regs
outb(0x80,LPC_DATA);
outb(0x56,LPC_INDEX); //offset adjustment CPU
outb(0x70,LPC_DATA);
outb(0x57,LPC_INDEX); //offset adjustment Ambient
outb(0x3C,LPC_DATA);
outb(0x5C,LPC_INDEX); //lock offset regs
outb(0x00,LPC_DATA);
//******************************************
printf("Press CTRL+C to cancel!\nCPU AMBIENT\n");
while(1)
{
outb( 0x29,LPC_INDEX); //read out CPU temp
cputemp = inb(LPC_DATA);
outb( 0x2A,LPC_INDEX); //read out Ambient temp
ambtemp = inb(LPC_DATA);
printf("%3d %3d\r", cputemp, ambtemp); //printout to the screen
fflush(stdout);
sleep(1);
}
return 0;
}
1.3 48(53)
4.7 Drivers
Software drivers for sound, Ethernet, AES and graphics adapter are available for the CLR-LX800.
These drivers can be downloaded from LiPPERT's website http://www.lippertembedded.com
.
Follow the installation instructions that come with the drivers.
1.3 49(53)
5 Address Maps
This section describes the layout of the CPU memory and I/O address spaces.
Note Depending on enabled or disabled functions in the BIOS, other or more resources may be used
5.1 Memory Address Map
Address Range
1024K - 16384K
Address Range (Hex)
100000 - FFFFFF
Size
15360K
960K - 1023K F0000 - FFFFF 64K
932K
896K
768K
0K
- 935K
- 931K
- 24K
E9000 -
E0000 -
895K C8000 DFFFF
- 799K C0000 C7FFF
768K B8000
736K B0000
E9FFF
E8FFF
BFFFF
B7FFF
4K
36K
96K
32K
32K
32K
704K A0000 AFFFF
- 640K 0 - 9FFFF
64K
640K
Description
Extended Memory
System BIOS
Unused
ACPI
Unused
Mapped to ISA bus
Graphics BIOS
Color Text Memory
Monochrome Text Memory
Graphic Memory
Conventional Memory
1.3 50(53)
5.2 I/O Address Map
The system chip set implements a number of registers in I/O address space. These registers occupy the following map in the I/O space.
Address Range
0000 - 000F
0020 - 0021
002E - 002F
0040 - 0043
0048 - 004B
004E - 004F
0060 - 0060
0061 - 0061
0064 - 0064
0070 - 0073
0080 - 008F
0092 - 0092
00A0 - 00A1
00C0 - 00DF
00F0 - 00FF
0100 - 017F
0180 - 01BF
01C0 - 01CF
01F0 – 01FF
0200 - 027F
0279 - 0279
0295 - 0296
02F8 - 02FF
0300 - 033F
0340 - 035F
0378 - 037F
03B0 - 03BA
03C0 - 03DF
03F0 - 03F7
03F8 - 03FF
0480 - 048F
04D0 - 04D1
0A79 - 0A79
1200 - 1207
1220 - 1227
DF80 - DFFF
EFF0 - EFFF
Description
DMA-Controller
Programmable Interrupt controller
System
System timer
System timer
Super I/O
Keyboard
System speaker
Keyboard
System CMOS/Real-time clock
DMA-Controller
System
Programmable Interrupt controller
DDMA-Controller
Numeric Coprocessor
PCI-ISA Bridge Positive Decode Range 1
PCI-ISA Bridge Positive Decode Range 2
PCI-ISA Bridge Positive Decode Range 3
IDE Controller
PCI-ISA Bridge Positive Decode Range 4
ISA-PnP-Data port
LPC-Bus
COM2
PCI-ISA Bridge Positive Decode Range 5
PCI-ISA Bridge Positive Decode Range 6
LPT1
Advanced Micro Devices Win XP Graphics Driver
Advanced Micro Devices Win XP Graphics Driver
Standard-Floppy controller
COM1
DMA-Controller
Programmable Interrupt controller
ISAPnP-Data port
SPI-Flash
Simple-I/O (default)
Not used
Standard-Dual-Channel-PCI-IDE-Controller
1.3 51(53)
5.3 Interrupts
IRQ System Resource
0 Timer
2
3
4
5
6
7
8
(Secondary interrupt controller 2)
Serial port 2
Serial port 1
PCI INTC# (ETH0)
Serial port 3
Parallel port 1
Real time clock
10
11
12
13
14
15
PCI INTA# (Mini-PCI, AES, Grafik)
PCI INTB# (Mini-PCI, Audio)
PS/2 Mouse
Numeric coprocessor
Primary IDE channel
PCI INTD# (ETH1, USB)
Note Depending on the BIOS settings, it’s possible to reserve several IRQ’s for Mini PCI bus.
Devices over PCI- and LPC- bus cannot share one interrupt together!
LPC
LPC
PCI
PCI
LPC
BUS
-
-
LPC
-
-
LPC
PCI
PCI
LPC
PCI
PCI
PCI
5.4 DMA Channels
DMA Data width System Resource
3
4
8 bits Parallel Port
Reserved, Cascade Channel
1.3 52(53)
5.5 PC/104 Bus Address Space
The PC/104 bus address space mapping can be changed in the BIOS setup. The table shows the factory default values.
Range
I/O 0
I/O 1
I/O 2
I/O 3
I/O 4
I/O 5
Mem 0
Mem 1
Mem 2
Mem 3
Start Address End Address
100 17F
180 1BF
1C0
200
300
340
C8000
0D000
-
-
1DF
27F
33F
35F
CFFFF
DFFFF
Size Description
128 bytes IT8712 Positive Decode I/O Range 1
64 bytes IT8712 Positive Decode I/O Range 2
32 bytes IT8712 Positive Decode I/O Range 3
128 bytes IT8712 Positive Decode I/O Range 4
64 bytes
32 bytes
IT8712 Positive Decode I/O Range 5
IT8888 Positive Decode I/O Range 6
32 Kbytes Memory mapped to ISA
64 Kbytes Memory mapped to ISA
Disabled
Disabled
1.3 53(53)
Appendix A, Contact Information
Headquarters
LiPPERT Embedded Computers GmbH
Hans-Thoma-Straße 11
68163 Mannheim
Germany
Phone +49 621 4321410
Fax +49 621 4321430
E-mail [email protected]
Website www.lippertembedded.com
US Office
LiPPERT Embedded Computers, Inc.
5555 Glenridge Connector, Suite 200
Atlanta, GA 30342
USA
Phone
Fax
+1 (404) 459 2870
+1 (404) 459 2871
E-mail [email protected]
Website www.lippertembedded.com
1.3 A
Appendix B, Additional Information
B.1 Additional Reading
AMD Geode™ LX Processors Data Book
AMD Geode™ CS5536 Companion Device Data Book
Datasheet LPC interface ITE IT8712F, available at http://www.ite.com.tw
B.2 PC/104
A copy of the latest PC/104 can be obtained from the PC/104 Consortium's website at http://www.pc104.org
1.3 B
Appendix C, Getting Help
Should you have technical questions that are not covered by the respective manuals, please contact our support department at [email protected]
.
Please allow one working day for an answer!
Technical manuals as well as other literature for all LiPPERT products can be found in the Products section of LiPPERT's website www.lippertembedded.com. Simply locate the product in question and follow the link to its manual.
Returning Products for Repair
To return a product to LiPPERT for repair, you need to get a Return Material Authorization (RMA) number first.
Please print the RMA Request Form from http://www.lippertembedded.com/service/repairs.html
fill in the blanks and fax it to +49 621 4321430. We'll return it to you with the RMA number.
Deliveries without a valid RMA number are returned to sender at his own cost!
LiPPERT has a written Warranty and Repair Policy, which can be retrieved from http://www.lippertembedded.com/service/warranty.html
It describes how defective products are handled and what the related costs are. Please read this document carefully before returning a product.
1.3 C
Appendix D, Revision History
Filename Date Edited by Change
TME-104-CLR-LX800-R1V1
TME-104-CLR-LX800-R1V2
TME-104-CLR-LX800-R1V3
2008-01-08
2009-02-13
2009-03-11
CS
CS
CS
Ch. 1.4 dimensions added
Ch. 4.5 program failure corrected
Ch. 1.3, max. current corrected, footnote added
1.3 D
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