PHILIPS LC7.1E LA TV Service Manual

The PHILIPS LC7.1E LA is a color television set with a variety of features for enjoying your favorite shows and movies. The set has a built-in tuner for receiving both analog and digital television signals, and supports a variety of video and audio inputs. The LC7.1E LA also has a built-in loudspeaker system for enjoying your audio content, and offers different sound settings. The TV is equipped with a remote control and various buttons on the front panel.

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Colour Television

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Chassis

LC7.1E

LA

H_16940_000.eps

080307

Contents Page

Technical Specifications, Connections, and Chassis

Overview 2

Safety Instructions, Warnings, and Notes

Directions for Use

Mechanical Instructions 9

Service Modes, Error Codes, and Fault Finding 16

Block Diagrams, Test Point Overview, and

Waveforms

Wiring Diagram 32”

Wiring Diagram 37”-42”

Block Diagram Supply

Block Diagram Video

Block Diagram Audio

Block Diagram Control & Clock Signals

Test Point Overview SSB (Bottom Side)

I2C IC’s Overview

Supply Lines Overview

Circuit Diagrams and PWB Layouts

SSB: DC/DC

SSB: Tuner & Demodulator

SSB: Micro Processor

SSB: Video Processor

SSB: PNX2015: Audio Processor

SSB: YPBPR & Rear IO

SSB: I/O Scart 1 & 2

SSB: HDMI

SSB: Headphone Amp & Muting

SSB: Audio

SSB: SRP List

Side A/V Panel

Keyboard Control Panel

Diagram PWB

All rights reserved. No part of this publication may be reproduced, stored in a retrieval system or transmitted, in any form or by any means, electronic, mechanical, photocopying, or otherwise without the prior permission of Philips.

Published by WS 0763 BG CD Customer Service Printed in the Netherlands

Contents Page

Circuit Descriptions, Abbreviation List, and IC Data

Subject to modification EN 3122 785 16940

EN 2 1.

LC7.1E LA Technical Specifications, Connections, and Chassis Overview

1. Technical Specifications, Connections, and Chassis Overview

Index of this chapter:

1.1 Technical Specifications

1.2 Connection Overview

1.3 Chassis Overview

Notes:

• Figures can deviate due to the different set executions.

• Specifications are indicative (subject to change).

1.1 Technical Specifications

1.1.1

Vision

Display type

Screen size

Resolution (HxV pixels)

Min. contrast ratio

Min. light output (cd/m

)

Typ. response time (ms)

Viewing angle (HxV degrees)

Tuning system

TV Colour systems

Video playback

Supported computer formats

Supported video formats

Presets/channels

Tuner bands

: LCD

: 32” (82 cm), 16:9

: 42” (107 cm), 16:9

: 1366 x 768

: 4000:1 (32”)

: 5000:1 (42”)

: 500

: 8 (32”)

: 5 (42”)

: 178x178

: PLL

: PAL B/G, D/K, I

: SECAM B/G, D/K, L/L’

: NTSC

: PAL

: SECAM

: WXGA (1366x768)

: 640x480i - 1fH

: 720x576i - 1fH

: 640x480p - 2fH

: 720x576p - 2fH

: 1920x1080i - 2fH

: 1280x720p - 3fH

: 100 presets

: VHF

: UHF

: S-band

: Hyper-band

1.1.2

Sound

Sound systems

Equalizer

Maximum power (W

RMS

)

1.1.3

Miscellaneous

Power supply:

- Mains voltage (V

)

- Mains frequency (Hz)

: NICAM D/K, I, L/L’

: 2CS D/K, B/G

: 7-bands

: 2 x 10

Ambient conditions:

- Temperature range (

°C)

- Maximum humidity

Dimensions (WxHxD cm)

: +5 to +40

: 90% R.H.

Power consumption (values are indicative)

- Normal operation (W) :

≈ 140 (32”)

≈ 240 (42”)

- Stand-by (W) : < 1

: 80.5x54.6x11.5 (32”)

: 104.5x68.6x11.6 (42”)

Weight (kg)

: 220 - 240

: 50 / 60

: 15.5 (32”)

: 25 (42”)

Technical Specifications, Connections, and Chassis Overview

1.2 Connection Overview

LC7.1E LA 1.

EN 3

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270207

1.2.1

Note: The following connector colour abbreviations are used

(acc. to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, Gy=

Grey, Rd= Red, Wh= White, and Ye= Yellow.

Side Connections

EXT3: Headphone - Out

Bk - Headphone

EXT3: Cinch: Video CVBS - In, Audio - In

Rd - Audio R

Wh - Audio L

Ye - Video CVBS

0.5 V

RMS

/ 10 kohm

0.5 V

RMS

/ 10 kohm

1 V

/ 75 ohm

Figure 1-1 Side and rear I/O connections

32 - 600 ohm / 10 mW rt jq jq jq

10 - Easylink P50

11 - Video Green

12 - n.c.

13 - Ground Red

14 - Ground P50

15 - Video Red

16 - Status/FBL

0 - 5 V / 4.7 kohm

0.7 V

/ 75 ohm

Gnd

0.7 V

/ 75 ohm

0 - 0.4 V: INT

17 - Ground Video

18 - Ground FBL

1 - 3 V: EXT / 75 ohm

Gnd

19 - Video CVBS

20 - Video CVBS

1 V

/ 75 ohm

1 V

/ 75 ohm

21 - Shield Gnd

EXT3: S-Video (Hosiden): Video Y/C - In

1 - Ground Y Gnd

2 - Ground C

3 - Video Y

4 - Video C

Gnd

1 V

/ 75 ohm

0.3 V

P / 75 ohm j j

EXT2: Video YC - In, CVBS - In/Out, Audio - In/Out

20 2

1.2.2

Rear Connections

21 1

E_06532_001.eps

050404 jk j

H j j

H k j

EXT1: Video RGB - In, CVBS - In/Out, Audio - In/Out

20 2

Figure 1-3 SCART connector

21 1

E_06532_001.eps

050404

Figure 1-2 SCART connector

- Audio R

- Audio L

- Ground Audio

0.5 V

RMS

/ 1 kohm

0.5 V

RMS

/ 10 kohm

0.5 V

RMS

/ 1 kohm

Gnd

5 - Ground Blue Gnd

- Audio L

- Video Blue

0.5 V

RMS

/ 10 kohm

0.7 V

/ 75 ohm

8 - Function Select 0 - 2 V: INT

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3

9 - Ground Green Gnd k j k

H j j j

- Audio R

- Audio L

- Ground Audio

0.5 V

RMS

/ 1 kohm

0.5 V

RMS

/ 10 kohm

0.5 V

RMS

/ 1 kohm

Gnd

5 - n.c.

6 - Audio L 0.5 V

RMS

/ 10 kohm

7 - C-out 0.7

8 - Function Select 0 - 2 V: INT

4.5 - 7 V: EXT 16:9

9.5 - 12 V: EXT 4:3

9 - n.c.

10 - Easylink P50 0 - 5 V / 4.7 kohm

11 - n.c.

12 - n.c.

13 - n.c.

14 - Ground P50 Gnd

16 - Status/FBL

17 - Ground Video

0 - 0.4 V: INT

1 - 3 V: EXT / 75 ohm

Gnd

H j j

H k j k

H j k j jk

EN 4 1.

LC7.1E LA

18 - Ground FBL Gnd

19 - Video CVBS 1 V

/ 75 ohm

20 - Video CVBS/Y 1 V

/ 75 ohm

21 - Shield Gnd

Service Connector (UART)

1 - UART_TX Transmit

2 - Ground Gnd

3 - UART_RX Receive

Aerial - In

- IEC-type (EU) Coax, 75 ohm

Service Connector (ComPair)

1 - SDA-S I

C Data (0 - 5 V)

2 - SCL-S I

C Clock (0 - 5 V)

3 - Ground Gnd

HDMI 1 & 2: Digital Video, Digital Audio - In

18 2

E_06532_017.eps

250505

Figure 1-4 HDMI (type A) connector

Technical Specifications, Connections, and Chassis Overview

H k j

H k

H j

D jk j

1 - D2+ Data

2 - Shield Gnd

3 - D2- Data

4 - D1+ Data

5 - Shield Gnd

6 - D1- Data

7 - D0+ Data

8 - Shield Gnd

9 - D0- Data

11 - Shield Gnd

13 - n.c.

14 - n.c.

17 - Ground Gnd

18 - +5V

19 - HPD Hot Plug Detect

20 - Ground Gnd j jk

H j j

H j

H j j j j

H j

EXT4: Cinch: Video YPbPr - In, Audio - In

Gn - Video Y

Bu - Video Pb

Rd - Video Pr

Wh - Audio L

Rd - Audio R

1 V

/ 75 ohm

0.7 V

/ 75 ohm

0.7 V

/ 75 ohm

0.5 V

RMS

/ 10 kohm

0.5 V

RMS

/ 10 kohm jq jq jq jq jq

1.3 Chassis Overview

SIDE I/O PANEL

POWER SUPPLY UNIT

B SMALL SIGNAL

BOARD

CONTROL BOARD

LED PANEL

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Figure 1-5 PWB/CBA locations (32” models)

Technical Specifications, Connections, and Chassis Overview LC7.1E LA 1.

EN 5

SIDE I/O PANEL

POWER SUPPLY UNIT

SMALL SIGNAL

BOARD

CONTROL PANEL

LED PANEL

H_16940_008.eps

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Figure 1-6 PWB/CBA locations (42” models)

EN 6 2.

LC7.1E LA Safety Instructions, Warnings, and Notes

2. Safety Instructions, Warnings, and Notes

Index of this chapter:

2.1 Safety Instructions

2.2 Warnings

2.3 Notes

2.1 Safety Instructions

Safety regulations require the following during a repair:

• Connect the set to the Mains/AC Power via an isolation transformer (> 800 VA).

• Replace safety components, indicated by the symbol h, only by components identical to the original ones. Any other component substitution (other than original type) may increase risk of fire or electrical shock hazard.

Safety regulations require that after a repair, the set must be returned in its original condition. Pay in particular attention to the following points:

• Route the wire trees correctly and fix them with the mounted cable clamps.

• Check the insulation of the Mains/AC Power lead for external damage.

• Check the strain relief of the Mains/AC Power cord for proper function.

• Check the electrical DC resistance between the Mains/AC

Power plug and the secondary side (only for sets that have a Mains/AC Power isolated power supply):

Unplug the Mains/AC Power cord and connect a wire between the two pins of the Mains/AC Power plug.

Set the Mains/AC Power switch to the "on" position

(keep the Mains/AC Power cord unplugged!).

Measure the resistance value between the pins of the

Mains/AC Power plug and the metal shielding of the tuner or the aerial connection on the set. The reading should be between 4.5 Mohm and 12 Mohm.

Switch "off" the set, and remove the wire between the two pins of the Mains/AC Power plug.

• Check the cabinet for defects, to prevent touching of any inner parts by the customer.

2.2 Warnings

• All ICs and many other semiconductors are susceptible to electrostatic discharges (ESD w). Careless handling during repair can reduce life drastically. Make sure that, during repair, you are connected with the same potential as the mass of the set by a wristband with resistance. Keep components and tools also at this same potential. Available

ESD protection equipment:

– Complete kit ESD3 (small tablemat, wristband, connection box, extension cable and earth cable) 4822

310 10671.

– Wristband tester 4822 344 13999.

• Be careful during measurements in the high voltage section.

• Never replace modules or other components while the unit is switched "on".

• When you align the set, use plastic rather than metal tools.

This will prevent any short circuits and the danger of a circuit becoming unstable.

2.3 Notes

2.3.1

General

• Measure the voltages and waveforms with regard to the chassis (= tuner) ground (

H), or hot ground (I), depending on the tested area of circuitry. The voltages and waveforms shown in the diagrams are indicative. Measure them in the

Service Default Mode (see chapter 5) with a colour bar signal and stereo sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and picture carrier at 475.25 MHz for PAL, or

61.25 MHz for NTSC (channel 3).

• Where necessary, measure the waveforms and voltages with ( D) and without (E) aerial signal. Measure the voltages in the power supply section both in normal operation ( G) and in stand-by (F). These values are indicated by means of the appropriate symbols.

• Manufactured under license from Dolby Laboratories.

“Dolby”, “Pro Logic” and the “double-D symbol”, are trademarks of Dolby Laboratories.

2.3.2

Schematic Notes

• All resistor values are in ohms, and the value multiplier is often used to indicate the decimal point location (e.g. 2K2 indicates 2.2 kohm).

• Resistor values with no multiplier may be indicated with either an "E" or an "R" (e.g. 220E or 220R indicates 220 ohm).

• All capacitor values are given in micro-farads (

μ= x10 -6 ), nano-farads (n= x10 -9 ), or pico-farads (p= x10 -12 ).

• Capacitor values may also use the value multiplier as the decimal point indication (e.g. 2p2 indicates 2.2 pF).

• An "asterisk" (*) indicates component usage varies. Refer to the diversity tables for the correct values.

• The correct component values are listed in the Spare Parts

List. Therefore, always check this list when there is any doubt.

2.3.3

BGA (Ball Grid Array) ICs

Introduction

For more information on how to handle BGA devices, visit this

URL: www.atyourservice.ce.philips.com (needs subscription, not available for all regions). After login, select “Magazine”, then go to “Repair downloads”. Here you will find Information on how to deal with BGA-ICs.

BGA Temperature Profiles

For BGA-ICs, you must use the correct temperature-profile, which is coupled to the 12NC. For an overview of these profiles, visit the website www.atyourservice.ce.philips.com (needs subscription, but is not available for all regions)

You will find this and more technical information within the

"Magazine", chapter "Repair downloads".

For additional questions please contact your local repair help desk.

2.3.4

Lead-free Soldering

Due to lead-free technology some rules have to be respected by the workshop during a repair:

• Use only lead-free soldering tin Philips SAC305 with order code 0622 149 00106. If lead-free solder paste is required, please contact the manufacturer of your soldering equipment. In general, use of solder paste within workshops should be avoided because paste is not easy to store and to handle.

• Use only adequate solder tools applicable for lead-free soldering tin. The solder tool must be able:

– To reach a solder-tip temperature of at least 400°C.

– To stabilize the adjusted temperature at the solder-tip.

– To exchange solder-tips for different applications.

• Adjust your solder tool so that a temperature of around

360°C - 380°C is reached and stabilized at the solder joint.

Heating time of the solder-joint should not exceed ~ 4 sec.

Avoid temperatures above 400°C, otherwise wear-out of tips will increase drastically and flux-fluid will be destroyed.

Safety Instructions, Warnings, and Notes

To avoid wear-out of tips, switch “off” unused equipment or reduce heat.

• Mix of lead-free soldering tin/parts with leaded soldering tin/parts is possible but PHILIPS recommends strongly to

avoid mixed regimes. If this cannot be avoided, carefully clear the solder-joint from old tin and re-solder with new tin.

2.3.5

Alternative BOM identification

The third digit in the serial number (example:

AG2B0335000001) indicates the number of the alternative

B.O.M. (Bill Of Materials) that has been used for producing the specific TV set. In general, it is possible that the same TV model on the market is produced with e.g. two different types of displays, coming from two different suppliers. This will then result in sets which have the same CTN (Commercial Type

Number; e.g. 28PW9515/12) but which have a different B.O.M. number.

By looking at the third digit of the serial number, one can identify which B.O.M. is used for the TV set he is working with.

If the third digit of the serial number contains the number “1”

(example: AG1B033500001), then the TV set has been manufactured according to B.O.M. number 1. If the third digit is a “2” (example: AG2B0335000001), then the set has been produced according to B.O.M. no. 2. This is important for ordering the correct spare parts!

For the third digit, the numbers 1...9 and the characters A...Z can be used, so in total: 9 plus 26= 35 different B.O.M.s can be indicated by the third digit of the serial number.

Identification: The bottom line of a type plate gives a 14-digit serial number. Digits 1 and 2 refer to the production center (e.g.

AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers to the Service version change code, digits 5 and 6 refer to the production year, and digits 7 and 8 refer to production week (in example below it is 2006 week 17). The 6 last digits contain the serial number.

MODEL : 32PF9968/10

PROD.NO: AG 1A0617 000001

MADE IN BELGIUM

220-240V

50/60Hz

128W

VHF+S+H+UHF

S

BJ3.0E

E_06532_024.eps

130606

Figure 2-1 Serial number (example)

2.3.6

Board Level Repair (BLR) or Component Level Repair

(CLR)

If a board is defective, consult your repair procedure to decide if the board has to be exchanged or if it should be repaired on component level.

If your repair procedure says the board should be exchanged completely, do not solder on the defective board. Otherwise, it cannot be returned to the O.E.M. supplier for back charging!

2.3.7

Practical Service Precautions

• It makes sense to avoid exposure to electrical shock.

While some sources are expected to have a possible dangerous impact, others of quite high potential are of limited current and are sometimes held in less regard.

• Always respect voltages. While some may not be dangerous in themselves, they can cause unexpected reactions that are best avoided. Before reaching into a powered TV set, it is best to test the high voltage insulation.

It is easy to do, and is a good service precaution.

LC7.1E LA 2.

EN 7

EN 8 3.

LC7.1E LA

3. Directions for Use

You can download this information from the following websites: http://www.philips.com/support http://www.p4c.philips.com

4. Mechanical Instructions

Index of this chapter:

4.1 Cable Dressing

4.2 Service Positions

4.3 Assy/Panel Removal

4.4 Set Re-assembly

4.1 Cable Dressing

Mechanical Instructions LC7.1E LA 4.

EN 9

Notes:

• Figures below can deviate slightly from the actual situation, due to the different set executions.

• Follow the disassemble instructions in described order.

They apply to the 32” sets.

Figure 4-1 Cable dressing (32” models)

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EN 10 4.

LC7.1E LA Mechanical Instructions

Figure 4-2 Cable dressing (42” models)

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Mechanical Instructions LC7.1E LA

4.2.2

Aluminium Stands

4.2 Service Positions

For easy servicing of this set, there are a few possibilities created:

• The buffers from the packaging.

• Foam bars (created for Service).

• Aluminium service stands (created for Service).

Note: the aluminium service stands can only be used when the set is equipped with so-called “mushrooms”. Otherwise use the original stand that comes with the set.

4.2.1

Foam Bars

Required for sets

42”

EN 11

E_06532_019.eps

170504

Figure 4-4 Aluminium stands (drawing of MkI)

The new MkII aluminium stands (not on drawing) with order code 3122 785 90690, can also be used to do measurements, alignments, and duration tests. The stands can be

(dis)mounted quick and easy by means of sliding them in/out the "mushrooms". The new stands are backwards compatible with the earlier models.

Important: For (older) FTV sets without these "mushrooms", it is obligatory to use the provided screws, otherwise it is possible to damage the monitor inside!

E_06532_018.eps

171106

Figure 4-3 Foam bars

The foam bars (order code 3122 785 90580 for two pieces) can be used for all types and sizes of Flat TVs. See figure “Foam bars” for details. Sets with a display of 42” and larger, require

four foam bars [1]. Ensure that the foam bars are always supporting the cabinet and never only the display. Caution:

Failure to follow these guidelines can seriously damage the display!

By laying the TV face down on the (ESD protective) foam bars, a stable situation is created to perform measurements and alignments. By placing a mirror under the TV, you can monitor the screen.

4.3 Assy/Panel Removal

4.3.1

Rear Cover

Warning: Disconnect the mains power cord before you remove the rear cover.

Place the TV set upside down on a table top, using the foam bars (see part "Service Position").

Remove rear cover screws and the stand (if mounted).

Remove rear cover.

4.3.2

Keyboard Control Panel

Remove the rear cover, as described earlier.

Refer to fig. “Keyboard control panel“ below.

Remove the T10 parker screws [1].

Unplug connector [2].

Remove the unit.

Release clips [3] and remove the board.

When defective, replace the whole unit.

EN 12 4.

LC7.1E LA Mechanical Instructions

1 c

G_16850_007.eps

090207

Figure 4-5 Keyboard control panel

4.3.3

Side I/O Panel

Remove the rear cover, as described earlier.

Unplug connector [a].

Remove screws [b] and remove the complete module. One of the screws is T10 tapping, the other one is T10 parker.

See fig. “Side I/O module”.

Remove T10 parker screw [c]. See fig. “Side I/O panel 1”.

Push catch [d] (located at the underside of the bracket) and slide the unit to the right from its bracket [e]. See fig. “Side

I/O panel 2”.

To remove the PWB from its bracket, you have to lift the catch [f] loacted on top of the headphone connector. At the same time, slide the PWB out of its bracket [g]. See fig.

“Side I/O panel 3”.

When defective, replace the whole unit.

b (1x) a b (1x)

Figure 4-6 Side I/O module

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Figure 4-7 Side I/O panel [1/3] top side

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Figure 4-8 Side I/O panel [2/3] bottom side

Mechanical Instructions LC7.1E LA 4.

4.3.5

Mid-range Speakers

Remove the rear cover, as described earlier.

Refer to fig. “Mid-range speakers“ below.

Unplug connectors [1].

Remove T10 parker screws [2].

EN 13 f

Figure 4-9 Side I/O panel [3/3]

4.3.4

IR/LED Panel

Remove the rear cover, as described earlier.

Refer to fig. “IR/LED panel“ below.

Unplug connector(s) [1].

Release clip [2] and remove the board.

When defective, replace the whole unit.

G_16860_077.eps

010207

2 1

Figure 4-11 Mid-range speakers

4.3.6

Tweeters

Remove the rear cover, as described earlier.

Refer to fig. “Tweeters” below.

Unplug connectors [1].

Remove T10 parker screws [2].

G_16850_010.eps

110107

G_16850_009.eps

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2 1

G_16850_011.eps

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Figure 4-12 Tweeters

4.3.7

Small Signal Board (SSB)

Remove the rear cover, as described earlier.

Refer to fig. “SSB removal“ below.

Disconnect all cables [a] on the SSB.

Remove the T10 tapping screws [b] that hold the SSB. See

Figure “SSB removal”.

Remove the screws that hold the CINCH and HDMI connectors at the connector panel.

Lift the SSB from the set.

Figure 4-10 IR/LED panel b (3x) a a b (2x) b (3x) b (2x)

Figure 4-13 SSB removal

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EN 14 4.

LC7.1E LA Mechanical Instructions

4.3.8

Main Supply Panel

Remove the rear cover, as described earlier.

Refer to fig. “Main supply panel“ below.

Unplug cables [a].

Remove the fixation screws [b].

Take the board out (it hinges at the left side).

a a b (3x)

4.3.9

LCD Panel

Remove the rear cover, as described earlier.

Refer to fig. “LCD panel“ below.

Unplug the connectors on the Main Supply Panel [a] and the LED & IR board [c].

Unplug the outer connectors [d] from the mid-range loudspeakers.

Do NOT forget to unplug the LVDS connector [e] from the

SSB. Important: Be careful, as this is a very fragile connector!

Remove T10 parker screw [b] that holds the Side I/O module bracket.

Remove T10 parker screws [f] of the central sub-frame.

Remove LCD panel fixation screws [g] and lift the complete central sub-frame from the set (incl. the PSU, SSB, and

Side I/O boards and wiring).

Lift the LCD panel [7] from the front cabinet.

Figure 4-14 Main supply panel f (1x) g (2x)

G_16860_065.eps

010207 a e g (2x) f (3x) d f (2x)

Figure 4-15 LCD panel [1/2] b d c (1x)

G_16860_067.eps

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Mechanical Instructions LC7.1E LA 4.

EN 15

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Figure 4-16 LCD panel [2/2]

4.4 Set Re-assembly

To re-assemble the whole set, execute all processes in reverse order.

Notes:

• While re-assembling, make sure that all cables are placed and connected in their original position. See figure "Cable dressing".

• Pay special attention not to damage the EMC foams.

Ensure that EMC foams are mounted correctly (one is located above the LVDS connector on the display, between the LCD display and the metal sub-frame).

EN 16 5.

LC7.1E LA Service Modes, Error Codes, and Fault Finding

5. Service Modes, Error Codes, and Fault Finding

Index of this chapter:

5.5 The Blinking LED Procedure

5.7 Fault Finding and Repair Tips

5.1 Test Points

In the chassis schematics and layout overviews, the test points

(Fxxx) are mentioned. In the schematics, test points are indicated with a rectangular box around “Fxxx” or “Ixxx”, in the layout overviews with a “half-moon” sign.

As most signals are digital, it will be difficult to measure waveforms with a standard oscilloscope. Several key ICs are capable of generating test patterns, which can be controlled via

ComPair. In this way it is possible to determine which part is defective.

Perform measurements under the following conditions:

• Service Default Mode.

• Video: Colour bar signal.

• Audio: 3 kHz left, 1 kHz right.

5.2.1

General

Some items are applicable to all Service Modes or are general.

These are listed below.

Life Timer

During the life time cycle of the TV set, a life timer is kept. This life timer counts the normal operation hours, but not the Standby hours. The actual value of the life timer is displayed in SDM and CSM in a decimal value. Every two soft-resets should increase the hour by +1. Minimal five digits are displayed.

Software Identification, Version, and Cluster

The software identification, version, and cluster will be shown in the main menu display of SDM, SAM, and CSM.

The screen will show: “AAAABCD X.YY”, where:

• AAAA is the chassis name: LC71 for analogue range

(non-DVB), LC72 for digital range (DVB).

• B is the region indication: E= Europe, A= AP/China, U=

NAFTA, L= LATAM.

• C is the display indication: L= LCD, P= Plasma.

• D is the language/features indication: 1= standard, H=

1080p full HD.

• X is the main version number: The main version number is updated with a major change of specification (incompatible with the previous software version). Numbering will go from

1 - 9 then from A - Z.

– If the main version number changes, the new version number is written in the NVM

– If the main version number changes, the default settings are loaded

• YY is the sub version number: The sub version number is updated with a minor change (backwards compatible with the previous versions) Numbering will go from 00 - 99.

– If the sub version number changes, the new version number is written in the NVM

– If the NVM is fresh, the software identification, version, and cluster will be written to NVM

5.2 Service Modes

The Service Mode feature is split into four parts:

• Service Default Mode (SDM).

• Service Alignment Mode (SAM).

• Customer Service Mode (CSM) and Digital Customer

Service Mode (DCSM).

• Computer Aided Repair Mode (ComPair).

SDM and SAM offer features, which can be used by the Service engineer to repair/align a TV set. Some features are:

• A pre-defined situation to ensure measurements can be made under uniform conditions (SDM).

• Activates the blinking LED procedure for error identification when no picture is available (SDM).

• The possibility to overrule software protections when SDM was entered via the Service pins.

• Make alignments (e.g. white tone), (de)select options, enter options codes, reset the error buffer (SAM).

• Display information (“SDM” or “SAM” indication in upper right corner of screen, error buffer, software version, operating hours, options and option codes, submenus).

The (D)CSM is a Service Mode that can be enabled by the consumer. Instructions on how to enable the CSM can be given by telephone by either the dealer or the P3C (Philips Customer

Care Center). The CSM displays diagnosis information, which the customer can forward to the dealer/P3C. In CSM mode,

“CSM”, is displayed in the top right corner of the screen.

The information provided in CSM and the purpose of CSM is to:

• Increase the home repair hit rate

• Decrease the number of nuisance calls

• Solved customers' problem without home visit

ComPair Mode is used for communication between a computer and a TV on I2C /UART level and can be used by a Service engineer to quickly diagnose the TV set by reading out error codes, read and write in NVMs, communicate with ICs and the uP (PWM, registers, etc.), and by making use of a faultfinding database. It will also be possible to up and download the software of the TV set via I2C with help of ComPair. To do this,

ComPair has to be connected to the TV set via the ComPair connector, which will be accessible through the rear of the set

(without removing the rear cover).

Service Modes, Error Codes, and Fault Finding

Display Option Code Selection

When after a display exchange, the display option code is not properly set, it will result in a TV with “no display”. Therefore, it

is required to set this display option code after such a repair.

To do so, press the following key sequence on a standard RC transmitter: “062598” directly followed by MENU and “xxx”, where “xxx” is a 3 digit decimal value of the panel type (see first column in table “Display Code Overview” or sticker on the side/ bottom of the cabinet). When the value is properly accepted and stored in NVM, the set will switch to Stand-by, to indicate that the process has been completed successfully.

LC7.1E LA 5.

EN 17

During this algorithm, the NVM-content must be filtered, because several items in the NVM are TV-related and not SSBrelated (e.g. Model and Prod. S/N). Therefore, “Model” and

“Prod. S/N” data is changed into “See Type Plate”.

In case a call centre or consumer reads “See Type Plate” in

CSM mode, he needs to look to the side/bottom sticker to identify the set, for further actions.

Display Option

Code

39mm

PHILIPS

MODEL:

32PF9968/10

040

PROD.SERIAL NO:

AG 1A0620 000001

(CTN Sticker)

E_06532_038.eps

290107

Figure 5-1 Location of Display Option Code sticker

Table 5-1 Display option code overview

072

073

076

083

085

091

093

103

Display option

045

046

068

069

070

071

105

106

107

HEX

Display type

2D LCD

2E LCD

44 LCD

45 LCD

46 LCD

47 LCD

48 LCD

49 LCD

4B LCD

53 PDP

55 PDP

5B LCD

5D LCD

67 LCD

69 LCD

6A LCD

6B LCD

Brand Size

Vert. resolution

LPL 26 768p

LPL 32 768p

CMO 26 768p

CMO 32 768p

CPT 32 768p

LPL 37 768p

AUO 37 768p

LPL 42 768p

AUO 42 768p

SDI

768p

AUO 32 768p

LPL 42 1080p

LPL 20 480p

CMO 19 900p

AUO 23 768p

LPL 42 768p

1366

1024

1366

1920

640

Hor. resolution

1366

1440

1366

Type number

LC260WX2-SLB2

LC320W01-SL06

V260B1-L03

V315B1 L05

CLLAA320WB02P

LC370WX1-SLB1

T370XW02V5

LC420WX3-SLA1

T420XW01V8

S42AX-YD04(PS-426-PH)

S50HW-YD05(PS-506-PH)

T315XW02VD

LC420WU2-SLA1

LC201V02-SDB1

TPM190A1-L02

T230XW01V3

LC420WX5-SLD1

12 NC

9322 234 13682

9322 230 03682

9322 249 37682

9322 248 65682

9322 245 31682

9322 246 96682

9322 249 77682

9322 246 97682

9322 249 10682

9322 246 76682

9322 246 81682

9322 249 06682

9322 246 84682

9322 242 65682

9965 000 43654

9322 249 79682

9322 249 09682

EN 18 5.

LC7.1E LA Service Modes, Error Codes, and Fault Finding

5.2.2

Service Default Mode (SDM)

Purpose

Set the TV in SDM mode in order to be able to:

• Create a predefined setting for measurements to be made.

• Override software protections.

• Start the blinking LED procedure.

• Read the error buffer.

• Check the life timer.

Specifications

Table 5-2 SDM default settings

Region

Europe (except France),

AP-PAL/-Multi

France

NAFTA, AP-NTSC

LATAM

Freq. (MHz)

475.25

Default syst.

PAL B/G

SECAM L

61.25 (channel 3) NTSC M

PAL M

On Screen Menu

After activating SDM, the following screen is visible, with SDM in the upper right corner of the screen to indicate that the television is in Service Default Mode.

S D M

H H H H H A A A A B C D - X . Y Y

E R R X X X X X X X X X X

O P X X X X X X X X X X X X X X X X X X

• Set linear video and audio settings to 50 %, but volume to

25 %. Stored user settings are not affected.

• All service-unfriendly modes (if present) are disabled, since they interfere with diagnosing/repairing a set.. These service unfriendly modes are:

– (Sleep) timer.

– Blue mute/Wall paper.

– Auto switch “off” (when there is no “ident” signal).

– Hotel or hospital mode.

– Child lock or parental lock (manual or via V-chip).

– Skipping, blanking of “Not favourite”, “Skipped” or

“Locked” presets/channels.

– Automatic storing of Personal Preset or Last Status settings.

– Automatic user menu time-out (menu switches back/

OFF automatically.

– Auto Volume levelling (AVL).

How to Activate

To activate SDM, use one of the following methods:

• Press the following key sequence on the remote control transmitter: “062596” directly followed by the MENU button

(do not allow the display to time out between entries while keying the sequence).

• Short one of the “Service” jumpers on the TV board during cold start (see Figures “Service jumper”). Then press the mains button (remove the short after start-up). Caution:

Activating SDM by shorting “Service” jumpers will override the DC speaker protection (error 1), the General I2C error

(error 4), and the Trident video processor error (error 5).

When doing this, the service-technician must know exactly what he is doing, as it could damage the television set.

G_16860_030.eps

260107

Figure 5-3 SDM menu

Menu explanation:

• HHHHH: Are the operating hours (in decimal).

• AAAABCD-X.YY: See paragraph “Service Modes” ->

“General” -> “Software Identification, Version, and Cluster” for the SW name definition.

• SDM: The character “SDM” to indicate that the TV set is in

Service mode.

• ERR: Shows all errors detected since the last time the buffer was erased. Five errors possible.

• OP: Used to read-out the option bytes. See “Options” in the

Alignments section for a detailed description. Seven codes are possible.

How to Navigate

As this mode is read only, there is not much to navigate. To switch to other modes, use one of the following methods:

• Command MENU from the user remote will enter the normal user menu (brightness, contrast, colour, etc...) with

“SDM” OSD remaining, and pressing MENU key again will return to the last status of SDM again.

• To prevent the OSD from interfering with measurements in

SDM, command “OSD” (“STATUS” for NAFTA and

LATAM) from the user remote will toggle the OSD “on/off” with “SDM” OSD remaining always “on”.

• Press the following key sequence on the remote control transmitter: “062596” directly followed by the OSD/i+ button to switch to SAM (do not allow the display to time out between entries while keying the sequence).

How to Exit

Switch the set to STANDBY by pressing the mains button on the remote control transmitter or on the television set.

If you switch the television set “off” by removing the mains (i.e., unplugging the television), the television set will remain in SDM when mains is re-applied, and the error buffer is not cleared.

The error buffer will only be cleared when the “clear” command is used in the SAM menu.

Note:

• If the TV is switched “off” by a power interrupt while in SDM, the TV will show up in the last status of SDM menu as soon as the power is supplied again. The error buffer will not be cleared.

• In case the set is in Factory mode by accident (with “F” displayed on screen), by pressing and hold “VOL-“ and

“CH-” together should leave Factory mode.

G_16860_027.eps

260107

Figure 5-2 Service jumper (SSB component side)

5.2.3

Service Alignment Mode (SAM)

Purpose

• To change option settings.

• To display / clear the error code buffer.

• To perform alignments.

Specifications

• Operation hours counter (maximum five digits displayed).

• Software version, error codes, and option settings display.

• Error buffer clearing.

• Option settings.

• Software alignments (Tuner, White Tone, and Audio).

• NVM Editor.

• ComPair Mode switching.

• Set the screen mode to full screen (all contents on screen are viewable).

How to Activate

To activate SAM, use one of the following methods:

• Press the following key sequence on the remote control transmitter: “062596" directly followed by the OSD/

STATUS/INFO/i+ button (it depends on region which button is present on the RC). Do not allow the display to time out between entries while keying the sequence.

• Or via ComPair.

After entering SAM, the following screen is visible, with SAM in the upper right corner of the screen to indicate that the television is in Service Alignment Mode.

S A M

L L L L L A A A A B C D X . Y Y

E R R X X X X X X X X X X

O P X X X X X X X X X X X X X X X

C l e a r

O p t i o n s

T u n e r

R G B A l i g n

N V M E d i t o r

C o m p a i r

S W E V E N T S

Y e s

X X X

G_16860_031.eps

260107

Figure 5-4 SAM menu

Menu explanation:

LLLLL. This represents the run timer. The run timer counts normal operation hours, but does not count Stand-by hours.

AAAABCD-X.YY. See paragraph “Service Modes” ->

“General” -> “Software Identification, Version, and Cluster” for the SW name definition.

SAM. Indication of the Service Alignment Mode.

ERR (ERRor buffer). Shows all errors detected since the last time the buffer was erased. Five errors possible.

OP (Option Bytes). Used to read-out the option bytes. See

“Options” in the Alignments section for a detailed description. Seven codes are possible.

Clear. Erases the contents of the error buffer. Select the

CLEAR menu item and press the MENU RIGHT key. The content of the error buffer is cleared.

Options. Used to set the option bits. See “Options” in the

“Alignments” chapter for a detailed description.

Tuner. Used to align the tuner. See “Tuner” in the

“Alignments” chapter for a detailed description.

RGB Align. Used to align the White Tone. See “White

Tone” in the “Alignments” chapter for a detailed description.

10. NVM Editor. Can be used to change the NVM data in the television set. See also paragraph “Fault Finding and

Repair Tips” further on.

11. ComPaIr. Can be used to switch the television to “In

Application Programming” mode (IAP), for software

Service Modes, Error Codes, and Fault Finding LC7.1E LA 5.

EN 19 uploading via ComPair. Read paragraph “Service Tools” -

> “ComPair”. Caution: When this mode is selected without

ComPair connected, the TV will be blocked. Remove the

AC power to reset the TV.

12. SW Events. Only to be used by development to monitor

SW behaviour during stress test.

How to Navigate

• In the SAM menu, select menu items with the MENU UP/

DOWN keys on the remote control transmitter. The selected item will be indicated. When not all menu items fit on the screen, use the MENU UP/DOWN keys to display the next / previous menu items.

• With the MENU LEFT/RIGHT keys, it is possible to:

– Activate the selected menu item.

– Change the value of the selected menu item.

– Activate the selected submenu.

• When you press the MENU button twice while in top level

SAM, the set will switch to the normal user menu (with the

SAM mode still active in the background). To return to the

SAM menu press the MENU button.

• Command “OSD/i+” key from the user remote will toggle the OSD “on/off” with “SAM” OSD remaining always “on”.

• Press the following key sequence on the remote control transmitter: “062596” directly followed by the MENU button to switch to SDM (do not allow the display to time out between entries while keying the sequence).

How to Store SAM Settings

To store the settings changed in SAM mode (except the

OPTIONS settings), leave the top level SAM menu by using the

POWER button on the remote control transmitter or the television set.

How to Exit

Switch the set to STANDBY by pressing the mains button on the remote control transmitter or the television set.

Note:

• When the TV is switched “off” by a power interrupt while in

SAM, the TV will show up in "normal operation mode" as soon as the power is supplied again. The error buffer will not be cleared.

• In case the set is in Factory mode by accident (with “F” displayed on screen), by pressing and hold “VOL-“ and

“CH-” together should leave Factory mode.

5.2.4

Customer Service Mode (CSM)

Purpose

The Customer Service Mode shows error codes and information on the TV’s operation settings. A call centre can instruct the customer (by telephone) to enter CSM in order to identify the status of the set. This helps them to diagnose problems and failures in the TV before making a service call.

The CSM is a read-only mode; therefore, modifications are not possible in this mode.

Specifications

• Ignore “Service unfriendly modes”.

• Line number for every line (to make CSM language independent).

• Set the screen mode to full screen (all contents on screen are viewable).

• After leaving the Customer Service Mode, the original settings are restored.

• Possibility to use “CH+” or “CH-” for channel surfing, or enter the specific channel number on the RC.

How to Activate

To activate CSM, press the following key sequence on the remote control transmitter: “123654” (do not allow the display to time out between entries while keying the sequence).

EN 20

5.3

Upon entering the Customer Service Mode, the following screen will appear:

E :

2 P O

: x x

: X X X X X X X X X X X X X

E : X X X X X X

6 S B : 1 2 7 1 2 3 4 1

M : X X X X X X

8 F l a s h D a t a : X X . X X . X X . X X

E I

1 0 T U N E R : W E A K / G O O D / S T R O N G

1 1 S Y S T E M : P A L / N T S C / S E C A M

1 2 S O U N D : M O N O / S T E R E O / N I C A M

1 3 H D A U : Y E S / N O

1 4 F O R M A T : X X X X X X X X

C S M

G_16860_032.eps

210207

Figure 5-5 CSM menu

Menu Explanation

MODEL. Type number, e.g. 32PFL5522D/10. (*)

PROD S/N. Product serial no., e.g. AG1A0712123456. (*)

SW ID. Software cluster and version is displayed.

OP. Option code information.

CODES. Error buffer contents.

SSB. Indication of the SSB factory identification code

(12nc). (*)

NVM. The NVM software version no.

Flash Data. PQ (picture quality) and AQ (audio quality) data version. This is a sub set of the main SW.

LIFE TIMER. Operating hours indication.

10. TUNER. Indicates the tuner signal condition: “Weak” when signal falls below threshold value, “Medium” when signal is at mid-range, and “Strong” when signal falls above threshold value.

11. SYSTEM. Gives information about the video system of the selected transmitter (PAL/SECAM/NTSC).

12. SOUND. Gives information about the audio system of the selected transmitter (MONO/STEREO/NICAM).

13. HDAU. HDMI audio stream detection. “YES” means audio stream detected. “NO” means no audio stream present.

Only displayed when HDMI source is selected.

14. FORMAT. Gives information about the video format of the selected transmitter (480i/480p/720p/1080i).

15. HD SW ID. Software version of the 1080p full HD module

(when present).

16. Reserved.

17. Reserved.

18. Reserved.

(*) If an NVM IC is replaced or initialised, this data must be rewritten to the NVM. ComPair will foresee in a possibility to do this.

How to Exit

To exit CSM, use one of the following methods:

• Press the MENU button twice, or POWER button on the remote control transmitter.

• Press the POWER button on the television set.

Service Tools

LC7.1E LA Service Modes, Error Codes, and Fault Finding

ComPair speeds up the repair time since it can automatically communicate with the chassis (when the uP is working) and all repair information is directly available.

ComPair features TV software up possibilities.

Specifications

ComPair consists of a Windows based fault finding program and an interface box between PC and the (defective) product.

The (new) ComPair II interface box is connected to the PC via an USB cable. For the TV chassis, the ComPair interface box and the TV communicate via a bi-directional cable via the service connector(s).

The ComPair fault finding program is able to determine the problem of the defective television, by a combination of automatic diagnostics and an interactive question/answer procedure.

How to Connect

This is described in the chassis fault finding database in

ComPair.

I2C SERVICE

CONNECTOR

TO TV

UART SERVICE

CONNECTOR

5.3.1

ComPair

Introduction

ComPair (Computer Aided Repair) is a Service tool for Philips

Consumer Electronics products. and offers the following:

ComPair helps you to quickly get an understanding on how to repair the chassis in a short and effective way.

ComPair allows very detailed diagnostics and is therefore capable of accurately indicating problem areas. You do not have to know anything about I2C or UART commands yourself, because ComPair takes care of this.

ComPair II

RC in

RC out

Optional

Switch

Power Link/

Activity

Mode

Multi function

RS232 /UART

HDMI

C only

ComPair II Developed by Philips Brugge

Optional power

5V DC

G_06532_036.eps

260107

Figure 5-6 ComPair II interface connection

Caution: It is compulsory to connect the TV to the PC as shown in the picture above (with the ComPair interface in between), as the ComPair interface acts as a level shifter. If one connects the TV directly to the PC (via UART), ICs will be blown!

How to Order

ComPair II order codes:

• ComPair II interface: 3122 785 91020.

• ComPair32 CD (update): 3122 785 60160.

• ComPair interface cable: 3122 785 90004.

• ComPair interface extension cable: 3139 131 03791.

• ComPair UART interface cable: 3122 785 90630.

Note: If you encounter any problems, contact your local support desk

5.3.2

LVDS Tool

Introduction

This Service tool (also called “ComPair Assistant 1“) may help you to identify, in case the TV does not show any picture, whether the Small Signal Board (SSB) or the display of a Flat

TV is defective. Thus to determine if LVDS, RGB, and sync signals are okay.

Furthermore it is possible to program EPLDs with this tool (Byte blaster). Read the user manual for an explanation of this feature.

When operating, the tool will show a small (scaled) picture on a VGA monitor. Due to a limited memory capacity, it is not possible to increase the size when processing high-resolution

Service Modes, Error Codes, and Fault Finding

FJ3.0

FTL2.4

LC4.1

LC4.3

LC4.31

LC4.41

LC4.8

LC4.9

LC7.2

JL2.1

Chassis

BJ2.4

BJ2.5

BJ3.0

BJ3.1

EJ2.0

EJ3.0

EL1.1

LVDS signals (> 1280x960). Below this resolution, or when a

DVI monitor is used, the displayed picture will be full size.

How to Connect

Connections are explained in the user manual, which is packed with the tool. The LVDS cables included in the package cover most chassis. For some chassis, a separate cable must be ordered.

Note: To use the LVDS tool, you must have ComPair release

2004-1 (or later) on your PC (engine version >= 2.2.05).

For every TV type number and screen size, one must choose the proper settings via ComPair. The ComPair file will be updated regularly with new introduced chassis information.

How to Order

• LVDS tool (incl. two LVDS cables: 31p and 20p, covering chassis BJx.x, EJx.x, FJx.x and LC4.1):

3122 785 90671.

• LVDS tool Service Manual:

3122 785 00810.

• LVDS cable 20p/DF -> 20p/DF (standard with tool):

3122 785 90731.

• LVDS cable 31p/FI -> 31p/FI (standard with tool):

3122 785 90662.

For other chassis, a separare LVDS cable must be ordered.

Refer to table “LVDS cable order number” for an overview of all deliverable cables.

Table 5-3 LVDS cable order number

LVDS cable order number

3122 785 90662

/ 3122 785 90821

3122 785 90662

1,2

3122 785 90731

/ 3122 785 90851

Remarks

3122 785 90821

3122 785 90662

1,2

/ 3122 785 90851 only for 26 & 32” sets

3122 785 90662

1.2

/ 3122 785 90851

3122 785 90662

1,2

/ 3122 785 90851 MFD variant only tbd

3122 785 90861

Notes

Included in LVDS tool package (order code

3122 785 90671)

Pins 27 and 28 should be grounded or not connected.

LC7.1E LA 5.

EN 21

5.4 Error Codes

5.4.1

Introduction

Error codes are required to indicate failures in the TV set. In principle a unique error code is available for every:

• Activated protection.

• Failing I2C device.

• General I2C error.

• SDRAM failure.

The last five errors, stored in the NVM, are shown in the

Service menu’s. This is called the error buffer.

The error code buffer contains all errors detected since the last time the buffer was erased. The buffer is written from left to right. When an error occurs that is not yet in the error code buffer, it is displayed at the left side and all other errors shift one position to the right.

An error will be added to the buffer if this error differs from any error in the buffer. The last found error is displayed on the left.

An error with a designated error code may never lead to a deadlock situation. This means that it must always be diagnosable (e.g. error buffer via OSD or blinking LED procedure, ComPair to read from the NVM).

In case a failure identified by an error code automatically results in other error codes (cause and effect), only the error code of the MAIN failure is displayed.

Example: In case of a failure of the I2C bus (CAUSE), the error code for a “General I2C failure” and “Protection errors” is displayed. The error codes for the single devices (EFFECT) is not displayed. All error codes are stored in the same error buffer (TV’s NVM) except when the NVM itself is defective.

5.4.2

How to Read the Error Buffer

You can read the error buffer in 3 ways:

• On screen via the SAM/SDM/CSM (if you have a picture).

Example:

– ERROR: 0 0 0 0 0 : No errors detected

– ERROR: 6 0 0 0 0 : Error code 6 is the last and only detected error

– ERROR: 9 6 0 0 0 : Error code 6 was detected first and error code 9 is the last detected (newest) error

• Via the blinking LED procedure (when you have no picture). See “The Blinking LED Procedure”.

• Via ComPair.

5.4.3

Error Codes

In case of non-intermittent faults, write down the errors present in the error buffer and clear the error buffer before you begin the repair. This ensures that old error codes are no longer present.

If possible, check the entire contents of the error buffer. In some situations, an error code is only the result of another error and not the actual cause of the problem (for example, a fault in the protection detection circuitry can also lead to a protection).

EN 22 5.

LC7.1E LA Service Modes, Error Codes, and Fault Finding

Table 5-4 Error code overview

Error code

Description

No error.

DC Protection of speakers.

+12V protection error.

Reserved.

General I2C error.

Trident Video

Processor communication error.

I2C error while communicating with the NVM.

Item nr.

Remarks

12V missing or "low".

note 2

7202 When Trident IC is defective, error 10 and 14 might also be reported. Trident communicates via parallel bus, not via the I2C bus. The I2C bus of Trident is only used in ComPair mode.

7315 The TV will not startup due to critical dta not available from the

NVM, but the LED will blink the error code.

1101 I2C error while communicating with the Tuner.

I2C error while communicating with the IF Demodulator.

I2C error communicating with the Sound Processor.

SDRAM defective.

I2C error while communicating with the HDMI IC.

I2C error while communicating with the MOJO PNX8314.

DVB HW communication error.

7113

7411

7204

7817

7G00 if applicable

SDRAM defective.

Reserved.

I2C error while communicating with the iBoard processor.

I2C error while communication with

1080p bolt-on module.

7F01,

7K00,

7G00 if applicable

7205 if applicable if applicable

– To enter SAM, press the following key sequence on the remote control transmitter: “062596” directly followed by the OSD/i+ button (do not allow the display to time out between entries while keying the sequence).

– Make sure the menu item CLEAR is selected. Use the

MENU UP/DOWN buttons, if necessary.

– Press the MENU RIGHT button to clear the error buffer. The text on the right side of the “CLEAR” line will change from “CLEAR?” to “CLEARED”

• If the contents of the error buffer have not changed for 50 hours, the error buffer resets automatically.

Note: If you exit SAM by disconnecting the mains from the television set, the error buffer is not reset.

Notes

Some of the error codes reported are depending on the option code configurations.

This error means: no I2C device is responding to the particular I2C bus. Possible causes: SCL/SDA shorted to

GND, SCL shorted to SDA, or SCL/SDA open (at uP pin).

The internal bus of the Trident platform should not cause the entire system to halt as such an error can be reported.

5.4.4

How to Clear the Error Buffer

The error code buffer is cleared in the following cases:

• By using the CLEAR command in the SAM menu:

Service Modes, Error Codes, and Fault Finding

5.5 The Blinking LED Procedure

5.5.1

Introduction

The software is capable of identifying different kinds of errors.

Because it is possible that more than one error can occur over time, an error buffer is available, which is capable of storing the last five errors that occurred. This is useful if the OSD is not working properly.

Errors can also be displayed by the blinking LED procedure.

The method is to repeatedly let the front LED pulse with as many pulses as the error code number, followed by a period of

1.5 seconds in which the LED is “off”. Then this sequence is repeated.

Example (1): error code 4 will result in four times the sequence

LED “on” for 0.25 seconds / LED “off” for 0.25 seconds. After this sequence, the LED will be “off” for 1.5 seconds. Any RC5 command terminates the sequence. Error code LED blinking is in red colour.

Example (2): the content of the error buffer is “12 9 6 0 0”

After entering SDM, the following occurs:

• 1 long blink of 5 seconds to start the sequence,

• 12 short blinks followed by a pause of 1.5 seconds,

• 9 short blinks followed by a pause of 1.5 seconds,

• 6 short blinks followed by a pause of 1.5 seconds,

• 1 long blink of 1.5 seconds to finish the sequence,

• The sequence starts again with 12 short blinks.

5.5.2

Displaying the Entire Error Buffer

Additionally, the entire error buffer is displayed when Service

Mode “SDM” is entered. In case the TV set is in protection or

Stand-by: The blinking LED procedure sequence (as in SDMmode in normal operation) must be triggered by the following

RC sequence: “MUTE” “062500” “OK”.

In order to avoid confusion with RC5 signal reception blinking, this blinking procedure is terminated when a RC5 command is received.

To erase the error buffer, the RC command “MUTE” “062599

“OK” can be used.

5.6

5.7 TV Main Software Upgrade

For instructions on how to upgrade the TV Main software, refer to ComPair.

Fault Finding and Repair Tips

Notes:

• It is assumed that the components are mounted correctly with correct values and no bad solder joints.

• Before any fault finding actions, check if the correct options are set.

5.7.1

NVM Editor

In some cases, it can be convenient if one directly can change the NVM contents. This can be done with the “NVM Editor” in

SAM mode. With this option, single bytes can be changed.

Caution:

• Do not change the NVM settings without understanding the function of each setting, because incorrect NVM settings may seriously hamper the

correct functioning of the TV set!

• Always write down the existing NVM settings, before changing the settings. This will enable you to return to the original settings, if the new settings turn out to be incorrect.

LC7.1E LA

Table 5-5 NVM editor overview

.ADR

.VAL

.Store

Hex

0x000A

0x0000

Store?

Dec

EN 23

Description

Existing value

New value

5.7.2

Load Default NVM Values

It is possible to download default values automatically into the

NVM in case a blank NVM is placed or when the NVM first 20 address contents are "FF". After the default values are downloaded, it is possible to start-up and to start aligning the

TV set. To initiate a forced default download the following action has to be performed:

Switch “off” the TV set with the mains cord disconnected from the wall outlet (it does not matter if this is from

"Standby" or "Off" situation).

Short-circuit the SDM jumpers on the SSB (keep short circuited).

Press “P+” or “CH+” on the local keyboard (and keep it pressed).

Reconnect the mains supply to the wall outlet.

Release the “P+” or “CH+” when the set is “on” or blue LED is blinking.

When the downloading has completed successfully, the set should be into Standby, i.e. red LED on.

Alternative method (1):

Go to SAM.

Select NVM Editor.

Select ADR (address) to 1 (dec).

Change the VAL (value) to 170 (dec).

Store the value.

Do a hard reset to make sure new default values took place.

Alternative method (2):

It is also possible to upload the default values to the NVM with

ComPair in case the SW is changed, the NVM is replaced with a new (empty) one, or when the NVM content is corrupted.

After replacing an EEPROM (or with a defective/no EEPROM), default settings should be used to enable the set to start-up and allow the Service Default Mode and Service Alignment Mode to be accessed.

5.7.3

Start-up/Shut-down Flowcharts

Important note for DVB sets:

• When you put a DVB set into Stand-by mode with an RC, the set will go to “Semi Stand-by” mode for 5 minutes. This, to facilitate “Off the Air download” (OAD). If there is no activity within these 5 minutes, the set will switch to Standby mode. In “Semi Stand-by” mode, the LCD backlight and

Audio Amplifier are turned “off” but other circuits still work as normal. The customer might think the set is in Stand-by.

However, in real Stand-by mode, only the uP and the NVM are alive and all other circuits are switched “off”.

• If you press the mains switch at the local key board in a

DVB set, the set will switch to Stand-by mode.

On the next pages you will find start-up and shut-down flowcharts, which might be helpful during fault finding.

It should be noted, that some events are only related to PDP sets, and therefore not applicable to this LCD chassis.

EN 24 5.

LC7.1E LA Service Modes, Error Codes, and Fault Finding

Start Up

AC ON

160ms

+5VSTBY & +3V3STBY Available (1)

(1) +5VSTBY to be measured

at PDTC114ET (item 7322)

RENEAS POR by +3VSTBY (2)

STANDBYn = LOW

(2) to be measured at pin 4

of BD45275G (item 7312)

Error 6 - NVM

[Protection]

InitCold Component:

1. Check SDM port.

- If SDM pin = LOW and NVM first 20Byte =

0xFF, reload Software default NVM value.

2. Check Panel port.

- If Panel Pin = LOW and check slave address

0x65 = 0xA5, Enter Panel Mode.

Standby Normal Mode

( RED LED)

Port Assignment in STANDBY

Wait for RC key or

Wake up event

Last status is ON?

Yes

Read NVM completed.

STOP I²C activities.

LED = BLUE for Normal mode

LED = RED for Recording mode

20ms

BLOCK RC Key

M16C RST_H = HIGH

RST_HDMI = LOW

RST_AUD = LOW

RESET_n = LOW

LCD_PWR_ON = LOW

SDI PDP => CTRL_DISP1 = LOW

1000ms to

1500ms

User wake up the sets in DVB recording mode

LCD_PWR_ON = HIGH

(Same function as CTRL-DISP2)

SDI PDP => CTRL_DISP1 = LOW

Wait for 20 ms

Switch ON LVDS Signal

Init. Warm Component

(For software)

STANDBYn = HIGH

(Same function as CTRL-DISP3)

For LCD:

BL_ON_OFF = HIGH

* BL_ADJ keep 100% for 3000ms before dimming.

500ms Wait for 500ms

Notes:

---------

Error 2

[Protection]

1. LC07 TV software only start communication with IBOZ once receive the INT message from IBOZ.

Wait for 100ms

Time out = 2000ms

100ms

Is Power Down =

HIGH?

Yes

Wait for 100ms

M16C RST_H to LOW

RST_HDMI = HIGH

RST_AUD = HIGH

RESET_n = HIGH

Enable Power Down INT

Enable DC_PROT INT

Error 7

Initialise Tuner

Error 8

Initialise IF Demodulator, Afric

TDA9886T

For DVB Sets only (Semistandby)

Recording mode

SDI PDP => CTRL_DISP1 = HIGH

Error 9

Initialise Micronas

Mute Audio

Error 11 Initialise HDMI, Sil9023

Recording Mode finished

Software Shutdown:

WP for NVM

Port Assignment in STANDBY

Yes

1700ms

Initialise Trident CX

BL_ADJ = HIGH (100% Duty Cycle)

DPTVInit( )

Error 3

[Protection]

Initialise FHP Panel

* For FHP PDP Sets only

Initialise Bolt-ON

* For iTV, 1080P, Ambi Light

Enable RC Key

STANDBYn = LOW

Standby

Normal Mode

DVB recording mode

Figure 5-7 Start-up flowchart

Blank Picture

Picture Mode Setup & Detection unBlank Picture &

UnMute Audio

End

Error 5 - Trident

[Protection]

Error 10 – SDRAM 7204

[Protection]

Error 14 – SDRAM 7205

[Protection]

Error 17 – AmbiLight

Error 18 – iTV iFace

Error 19 – 1080P

For PDP:

3000ms delay

G_16860_070.eps

220207

Service Modes, Error Codes, and Fault Finding LC7.1E LA

SEMISTANDBY/ STANDBY

Start

Mute Audio

BL_ADJ stop dimming

(PWM duty cycle 100%)

BL_ON_OFF = LOW

300ms

20ms

Wait 300ms

Switch OFF LVDS

Wait 20ms

LCD_PWR_ON = LOW

Software Shutdown:

EN 25

LED =

For DVB Sets only (Semistandby)

RED

Wait for 3000ms

Except power tact switch

SDI PDP => CTRL_DISP1 = HIGH

Off Air Downloading/ Recording Mode

Standby using

“power key”

Yes

LED = NO LED for Standby soft mode

Disable Power Down INT &

DC_PROT_INT

BL_ADJ = LOW

(PWM duty cycle 0%)

IBOZ send shut down command

WriteProtect for NVM

40ms

Total = 360ms

Port Assignment in STANDBY

STANDBYn = LOW

Sets go to standby here

Blocking for the next start up to ensure power supply discard properly.

Wait for 3000ms

End

Figure 5-8 Semi Stand-by/Stand-by flowchart

G_16860_071.eps

220207

EN 26 5.

LC7.1E LA Service Modes, Error Codes, and Fault Finding

Power Down INT:

AC OFF or Transient INT

Notes:

1. Power Down INT will be based on fall edge triggering

2. +3V3STBY will stay for 15ms, software must perform

WriteProtect for NVM within 15ms.

Start

Avoid false trigger

End

Poll the Power Down

INT for 5 times

Yes

Mute Audio & VIdeo

WriteProtect for NVM

STANDBYn = LOW

Wait 5000 ms

Re-start: Start up

End

DC_PROT INT

Start

Avoid false trigger

End is DC_PROT = LOW for 3 sec?

Yes

Mute Audio & VIdeo

Error 1

[Protection]

Log Error Code

WriteProtect for NVM

STANDBYn = LOW

End G_16860_072.eps

220207

Figure 5-9 Power Down & DC_PROT flowchart

Block Diagrams, Test Point Overview, and Waveforms LC7.1E LA

6. Block Diagrams, Test Point Overview, and Waveforms

Wiring Diagram 32”

WIRING 32” LCD

(STYLING ME7)

8521

LCD DISPLAY

(1004)

LVDS

30P

SUPPLY

(1005)

8G51

8C01

8P11

8520

8735

B SSB

1C01

1P11

30P

1G51

1M20

11P

1304

1735

8735

INVERTER

RIGHT SPEAKER

INLET

INVERTER

8304

LEFT SPEAKER

D SIDE I/O

(1116)

8M20 7P

1M20

1M01

J IR/LED/LIGHT

SENSOR

(1112)

G_16860_034.eps

200207

Block Diagrams, Test Point Overview, and Waveforms

Wiring Diagram 37”-42”

WIRING 37”- 42” LCD

(STYLING ME7)

LC7.1E LA 6.

INVERTER

8521

8520

X412

8C01

X406

8P11

14P

X404

12P

X403

LCD DISPLAY

(1004)

LVDS

30P

8G51

SUPPLY

(1005)

SSB

1C01

1P11

30P

1G51

1M20

11P

1304

1735

8735

RIGHT SPEAKER

INLET

INVERTER

D SIDE I/O

(1116)

LEFT SPEAKER

8304

8M20 7P

1M20

1M01

J IR/LED/LIGHT

SENSOR

(1112)

H_16940_012.eps

050307

Block Diagrams, Test Point Overview, and Waveforms

Block Diagram Supply

SUPPLY 32” LCD

LC7.1E LA 6.

DISPLAY SUPPLY

1. +24V

2. +24V

3. +24V

4. +24V

5. +24V

6. GND

7. GND

8. GND

9. GND

10. GND

11. N.C.

12. N.C.

DISPLAY SUPPLY

1. +24V

2. +24V

3. +24V

4. +24V

5. +24V

6. GND

7. GND

8. GND

9. GND

10. GND

11. DIM

12. BL-ON

13. PWM

14. N.C.

CN3 CN2

CN1

AC-IN

220 - 240V

50/60Hz

PRIMARY SIDE SECONDARY SIDE

CN6

CONTROL:

1. BL-DIM

2. PG

3. BL-ON

4. GND

5. N.C.

6. PSON

7. N.C.

8. 12V.

CN7

CONTROL:

1. -12VA

2. +12VA

3. GND

4. 5.2VS

5. 5.2VS

6. 5.2VS

7. GND

8. GND.

9. GND

G_16860_035.eps

200207

Block Diagrams, Test Point Overview, and Waveforms

Block Diagram Video

VIDEO

B03A TUNER IF & DEMODULATOR

1101

TD1318S/A

+VTUN

MAIN

TUNER

IF_OUT3

4120

IF_ATV

3111

RF_AGC

1102

5 VIF1

4 VIF2

1103

5 SIF1

4 SIF2

LC7.1E LA 6.

7113

TDA9886T/V4

1 VIF1

2 VIF2

23 SIF1

24 SIF2

14 TAGC

+5VS

SUPPLY

VIF-PLL

DEMODULATOR

SOUND TRAPS

4.5 to 6.5 Mhz

CVBS 17

SIF AGC

SINGLE REFERENCE QSS MIXER

INTERCARRIER MIXER AND

AM-DEMODULATOR

MAD

I2C-BUS TRANSCEIVER

TUNER AGC VIF AGC

7114

CVBS_RF

1104

4M0

B06B IO - SCART 1 & 2

1504

EXT1

1506

3528

3516

3528

3522

2x SCART

3552

3535

7503

3523

3545

3518

3529

3550

7500

3537

SC1_STATUS

3521

SC2_STATUS

EXT2

B06A YPBPR & REAR IO

1615

3617

3619

3618

D SIDE FACING SIDE AV

1302

VIDEO

FRONT_Y_CVBS_IN

FRONT_C_IN

1304

SC1_RF_OUT_CVBS

B04A

SC2_CVBS_MON_OUT

B04A

SC1_R_IN

SC1_G_IN

SC1_B_IN

SC1_CVBS_IN

SC1_FBL_IN

SC2_Y_CVBS_IN

SC2_C_IN

HD_Pr_IN

HD_Y_IN

HD_Pb_IN

B04A MICROPROCESSOR

1304

FRONT_Y_CVBS_IN_T

FRONT_C_IN_T

S VIDEO 5

1301

B06C HDMI

2x HDMI

CONNECTOR

1811

1810

RX2+A

RX2-A

RX1+A

RX1-A

RX0+A

RX0-A

RXC+A

RXC-A

7814

HDMI_HOTPLUG_RESET

B04A

7817

SII9025CTU

R0X2

ADC

R0X1

R0X0

HDMI

(MAIN)

ODCK

HSYNC

R0XC

VSYNC

121

RX2+B

RX2-B

RX1+B

RX1-B

RX0+B

RX0-B

RXC+B

RXC-B

7860

HDMI_HOTPLUG_RESET

B04A

R1X2

R1X1

R1X0

R1XC

HDMI_VCLK

HDMI_DE

HDMI_H

HDMI_V

HDMI_Cb(0-7)

HDMI_Y(0-7)

HDMI_Cr(0-7)

B04B VIDEO PROCESSOR

7202

SVP CX32-LF

169

CVBS1

ANALOG

MUX

163

CVBS_OUT1

189

PR_R2

181

Y_G2

197

PB_B2

198

PB_B3

173

FB1

VIDEO

PROCESSOR

XTALI

205

XTALO

204

1201

14M31

162

CVBS_OUT2

190

PR_R3

FS2

188

PR_R1

180

Y_G1

196

PB_B3

182

192

Y_G3

DP-CLK

DP_DE_FLD

DP_HS

DIN_PORTD

(24BIT)

MEMORY

7204

IS42S16400D-6TL

(0-11)

DRAM

1Mx16x4

DQ(0-31) (0-15)

7205

IS42S16400D-6TL

CX_MA (0-11)

(16-31)

DRAM

1Mx16x4

TA1

8-BIT

SINGLE

TB1

TCLK1

TD1

TXAn

TXAp

TXBn

TXBp

TXCn

TXCp

TXCLKn

TXCLKp

TXDn

TXDp

1210

1211

1212

1213

1214

VDISP

TXAn1

TXAp1

TXBn1

TXBp1

TXCn1

TXCp1

TXCLKn1

TXCLKp1

TXDn1

TXDp1

BOLT_ON_SCL

BOLT_ON_SDA

1G51

LVDS

CONNECTOR

TO DISPLAY

H_16940_001.eps

270207

Block Diagrams, Test Point Overview, and Waveforms LC7.1E LA 6.

Block Diagram Audio

AUDIO

B03A TUNER IF & DEMODULATOR B04C AUDIO PROCESSOR B07 AUDIO

1101

TD1318S/A

+VTUN

MAIN

TUNER

IF_OUT3

11 IF-ATV

B04A

SAW_SW

3111

7109

1102

5 VIF1

4 VIF2

1103

5 SIF1

4 SIF2

RF_AGC

B06B I0 - SCART 1 & 2

2x SCART

1504

EXT1

1506

EXT2

SIDE FACING SIDE AV

1302

AUDIO

L/R IN

B06A YPBPR &REAR IO

7113

TDA9886T/V4

1 VIF1

2 VIF2

23 SIF1

24 SIF2

14 TAGC

+5VS

7411

MSP4450P-VK-E8 000 Y

SUPPLY

VIF-PLL

DEMODULATOR

SOUND TRAPS

4.5 to 6.5 Mhz

CVBS

SIF AGC

SINGLE REFERENCE QSS MIXER

INTERCARRIER MIXER AND

AM-DEMODULATOR

TUNER AGC VIF AGC

SIOMAD

MAD

I2C-BUS TRANSCEIVER

12 SIF

1104

4M0

SC1_AUDIO _OUT_R

SC1_AUDIO _OUT_L

SC1_AUDIO _MUTE_R

B06D

SC1_AUDIO_IN_R

ANA-IN1+

DA1

SOUND

PROCESSOR

DACM-L

DACM-R

XTALIN

SUPPLY

XTALOUT

1411

18M432

SC1-OUT-R

SC1-IN-R

SC1-OUT-L

SC1-IN-L

SC2_AUDIO _OUT_R

SC1_AUDIO _OUT_L

SC1_AUDIO_IN_L

SC1_AUDIO _MUTE_L

B06D

SC2_AUDIO _MUTE_R

B06D

SC2_AUDIO_IN_R

SC2_AUDIO_IN_L

SC2_AUDIO _MUTE_L

B06D

SC2-OUT-R

SC2-IN-R

SC2-OUT-L

SC2-IN-L

DACA-L

DACA-R

L_FRONT_IN

R_FRONT_IN

1304

B04A MICROPROCESSOR

1304

6 SIDE_AUDIO_IN_L_CON

8 8 SIDE_AUDIO_IN_R_CON

SC4-IN-L

SC4-IN-R

+5V_D

+8V

+5V_AUD

HP_AUDIO_OUT_L

HP_AUDIO_OUT_R

B04A

ANTI_PLOP

7901

AUDIO-LS_L

AUDIO-LS_R

B06D HEADPHONE AMP & MUTING

B04A

STANDBYn

ENGAGE

B04A MICRO

PROCESSOR

D SIDE FACING SIDE AV

HP_LOUT

HP_ROUT

MUTING

SC1_AUDIO _MUTE_R

SC1_AUDIO _MUTE_L

SC2_AUDIO _MUTE_R

SC2_AUDIO _MUTE_L

1304

3A03

3A11

3A19

3A26

7A01

TDA8932T/N1

5A03

CLASS D

POWER

AMPLIFIER

5A04

B04A

DC_PROT

7A05÷7A07

DC-DETECTION

1304

6 HEAD_PH_L

8 HEAD_PH_R

B06B

1303

1735

B04A

POWER_DOWN

STANDBY

B04A

MUTEn

CONTROL

LEFT

SPEAKER

RIGHT

SPEAKER

HEADPHONE

1615

AUDIO

L/R IN

COMP_AUDIO_IN_L

COMP_AUDIO_IN_R

COMP_AUDIO_IN_L

COMP_AUDIO_IN_R

SC3-IN-L

SC3-IN-R

B06C HDMI

RXxxA

2x HDMI

CONNECTOR

RXxxB

7817

SII9025CTU

RX2

HDMI

RX1

SCK

RX0

SD0

RXC

MUTE

HDMI_I2S_SCK

HDNI_I2S_WS

HDMI_I2S_SD

7810

UDA1334ATS/N2

BCK

AUDIO

DAC

VOUTL

DATAI

VOUTR

HDMI_AUDIO_IN_L

HDMI_AUDIO_IN_R

MUTE

SC5-IN-L

SC5-IN-R

H_16940_002.eps

270207

Block Diagrams, Test Point Overview, and Waveforms LC7.1E LA 6.

Block Diagram Control & Clock Signals

CONTROL & CLOCK SIGNALS

B04B VIDEO PROCESSOR

7204

IS42S16400D-6TL

7202

SVP CX32-LF

B06C HDMI

RXxxA

RXxxB

2x HDMI

CONNECTOR

DRAM

1Mx16x4

7205

IS42S16400D-6TL

DQ(0-31)

CX_MA(0-11)

DRAM

1Mx16x4

CX_CLKE

CX_MCLK

112

111

VIDEO

PROCESSOR

TXCLKn

TXCLKP

B04A MICROPROCESSOR

AD(0-7)

A(0-7)

7310

M29W800DT

7817

SII9025CTU

121 HDMI_CCLK 23

102

HDMI_Cb(0-7)

HDMI_Y(0-7)

HDMI_Cr(0-7)

TXCLKn1

TXCLKP1

7311

M30300SAGP

1G51

TO DISPLAY

(LVDS)

EPROM

AD(0-7)

1Mx8

512Kx16

A(0-19)

CPU_RST

11 28

+3V3_STBY

7312

BD45275G

VOUT

(3V3)

2,3

ALE_EMU

RST_H

INT

MICRO

PROCESSOR

RST 36

1301

10M

ITV_SPI_CLK

ITV_SPI_DATA_IN

1312

ANTI_PLOP

BL_ON_OFF

POWER_DOWN

ITV_CONNECTOR A

B06D

B02

B6D

MUTEn

HDMI_HOTPLUG_RESET

RST_AUD

7322

STANDBYn

STANDBY

B06D

B06C

B04C

B04B B07

B02 B06D

E KEYBOARD CONTROL

CHANNEL +

CHANNEL -

VOLUME -

VOLUME +

ON / OFF

1011

1012

1013

1014

1015

1016 KEYBOARD

1M01

B06B

B07

B06C

SC1_STATUS

SC2_STATUS

DC_PROT

HDMI_INT

104

100

RST_H

B04B

E_PAGE

7315

M24C64-WMN6P

EEPROM

8Kx8

J IR/LED/LIGHT-SENSOR

+5V2-STBY

6010

LED1

BLEU

3012

7011

+5V2-STBY

+5V2_STBY

6011

LED2

RED

3010

7010

3013

SENSOR

7012

LED1

LED2

1M01

1M20

6 6

KEYB

LED1

LED2

REMOTE

3361

LCD_PWR_ON

DCC_RESET

SAW_SW

DVB_SW

+3V3_STBY

B04B

B06C

B03A

4301

SDM

N.C.

1 1 LIGHT_DENSOR 2

H_16940_003.eps

270207

Block Diagrams, Test Point Overview, and Waveforms LC7.1E LA 6.

Test Point Overview SSB (Bottom Side)

A110 E5

A115 E5

A116 E5

A124 E5

A125 E5

F111 E5

F112 E7

F114 E7

F115 F6

F116 F6

F117 F6

F118 E6

F119 E6

F120 E6

F121 E6

F122 E6

F123 D6

F126 E7

F127 E7

F128 D5

F129 D5

F130 D5

F131 E6

F132 E7

F133 E6

F134 F7

F140 D5

F210 A5

F211 C4

F212 A4

F213 A4

F214 A4

F215 A4

F217 A4

F218 A4

F219 A5

F220 A5

F221 A5

F222 A4

F223 A4

F224 A4

F225 A4

F226 A4

F227 A4

F228 A4

F229 A4

F230 A4

F231 C4

F232 B4

F302 B3

F303 C4

F304 A3

F305 B4

F309 B4

F310 A4

F311 B4

F312 A3

F313 B4

F314 A3

F315 B3

F316 A3

F317 B4

F318 A3

F319 B3

F320 A3

F321 B3

F322 A3

F323 A3

F324 B4

F325 A3

F326 B3

F327 A3

F328 B3

F329 B3

F330 A5

F331 B3

F332 B3

F333 B3

F334 B3

F335 B3

F336 A3

F337 A3

F338 B4

F339 B4

F340 B3

F341 B3

F342 F7

F343 F7

F344 F6

F345 C7

F346 B5

F347 B5

F348 B5

F349 B5

F350 B5

F351 A3

F352 A4

F353 B5

F354 B5

F356 A5

F357 A3

F360 A3

F361 B4

F362 A4

F363 B5

F364 B5

F365 B5

F366 B3

F367 A4

F368 A3

F369 B4

F370 F7

F379 A4

F380 A4

F381 B4

F382 A3

F383 A3

F384 A3

F385 A4

F386 A5

F387 A3

F401 B3

F402 C3

F403 C4

F510 E2

F511 E3

F512 E1

F513 E2

F514 E1

F515 E3

F516 D2

F517 D2

F518 D1

F519 E2

F520 D2

F521 D2

F522 D2

F523 D2

F524 D2

F525 C3

F526 C3

F527 C2

F528 C2

F529 C1

F530 C2

F531 D3

F532 D2

F534 E3

F535 E3

F536 E2

F537 E2

F538 D3

F539 D2

F540 D3

F541 D3

F542 D2

F543 E1

F544 D1

F601 F5

F602 F5

F603 E5

F604 F5

F605 F1

F606 F2

F607 F2

F608 F2

F609 F2

F610 F6

F611 F5

F612 F1

F613 E1

F614 F2

F615 F5

F616 F3

F801 E3

F802 E3

F805 D3

F806 E3

F832 F4

F840 F4

F841 F4

F842 F4

F843 F4

F850 F4

F851 E4

F861 F3

F869 F3

F870 F3

F871 F4

F872 F4

F873 F3

F874 F4

F875 E3

F876 D3

F877 E4

F901 B2

F902 B2

F903 B1

F904 C2

F905 B1

F908 B2

F910 B2

FA01 A3

FA02 A2

FA04 A2

FA05 A3

FA06 A3

FA07 A1

FA08 A1

FA09 B3

FA10 A1

FA11 A1

FA12 A3

FA32 A2

FB10 B8

FB11 C4

FB13 C6

FB14 E6

FB15 A8

FB16 C8

FB17 D6

FB19 D7

FB20 C8

FB21 A8

FB22 A8

FB23 A8

FB24 A8

FB25 A8

FB26 A8

FB27 B6

FB28 A9

FB29 A7

FB30 A8

FB31 A7

FB32 A6

FB33 A6

FB34 A6

FC25 A7

3139 123 6261.1

FC26 A6

FC27 A6

FC28 A6

FC29 A6

FF10 C8

FF11 E8

FF12 F8

FF13 F7

FF14 F8

FF16 E7

FF17 E8

FF18 E7

FF19 E8

FF20 E7

FF21 F7

FF22 E8

FF23 E7

FF24 C10

FF25 F8

FF26 E7

FF27 F8

FF28 E7

FF29 E7

FF30 E7

FG10 B10

FG11 B10

FG12 B10

FG13 D10

FG14 C10

FG15 B10

FG16 B10

FG17 C10

FG18 B10

FG19 C10

FG20 C10

FG21 C10

FG24 C9

FG25 C9

FG26 C10

FG27 C9

FG28 C9

FG29 C8

FG30 B9

FG31 B10

FG32 C10

FG33 B10

FG34 C10

FG35 C10

FG36 C10

FG37 B9

FG39 C9

FG40 C9

FG41 C9

FG42 C10

FH00 B9

FH01 D9

FH02 B10

FH03 B10

FH04 B10

FH05 D10

FH06 D9

FH07 C8

FH08 D10

FJ01 D9

FJ02 F9

FJ22 C9

FJ23 C9

FJ24 F9

FJ25 F9

FJ26 C8

FJ27 C9

FK01 F9

FK02 F10

FK05 D8

FK06 E9

FK10 E9

FK11 E9

FK12 D9

FK13 E9

FK14 E9

FK15 E9

FK16 D9

FK17 E9

FK18 E9

FK19 E9

FK20 D9

FK21 E9

FK22 E9

FK23 E9

FK24 D9

FK25 E9

FK26 E9

FK27 E9

FK28 D9

FK29 E9

FK30 E9

FK31 E9

FK32 E9

FK33 E9

FK34 D9

FK35 E9

FK36 E9

FK37 E9

FK38 D9

FK39 E9

FK40 E9

FK41 E8

FK42 D9

FK43 E9

FK44 E8

FK45 E8

FK46 D8

FK47 E8

FK48 E8

FK49 E8

FK50 D8

FK51 E8

FK52 E8

FK53 E8

FK54 D8

FK55 E8

FK56 E8

FK57 E8

FK58 D8

FK59 E8

FK60 E8

FK61 E8

FK62 E10

FK63 E8

FK67 E10

FK68 E10

FK69 E10

FK70 D10

FK71 E10

FK72 E10

FK73 E9

FK74 D9

FK75 E9

FK80 D10

FK81 F10

FK82 F9

FK83 D9

FK84 F9

FL20 A2

FL21 A2

FL22 A2

FL23 A2

FL24 A2

FL25 A2

FL26 A2

I110 E5

I111 E7

I112 E5

I114 E5

I118 E5

I120 E5

I121 E7

I122 F6

I123 E6

I124 D5

I125 D5

I126 D5

I127 D5

I128 D5

I129 D5

I130 D5

I131 D5

I133 D5

I135 D5

I136 D4

I137 E6

I138 D5

I139 D5

I141 D6

I142 D5

I143 D5

I144 D5

I145 E6

I146 D6

I147 E6

I210 B5

I211 A5

I213 D6

I214 C4

I215 A5

I216 A5

I217 D5

I218 D5

I220 A5

I224 A5

I225 A5

I230 C4

I231 B5

I232 C4

I233 C4

I236 A3

I238 C4

I239 C5

I240 C4

I241 B5

I242 D5

I243 D4

I244 C4

I245 D5

I246 C4

I247 C4

I248 D4

I249 C4

I250 D5

I251 C4

I252 D4

I253 D4

I254 C4

I255 B4

I256 B4

I257 D4

I258 D4

I259 C4

I260 D4

I261 C4

I262 C4

I263 C4

I264 D5

I265 D3

I266 D3

I267 D3

I268 D4

I269 D4

I270 D4

I271 D4

I311 A4

I312 A4

I313 A4

I314 A4

I315 A4

I317 A4

I318 A5

I320 A4

I321 B3

I322 B3

I323 A3

I326 A5

I328 A3

I329 A3

I330 A4

I331 A4

I332 A3

I333 A4

I334 A4

I335 B4

I336 A4

I337 A4

I338 A4

I339 D3

I341 B5

G_16860_018.eps

240107

I548 C3

I549 C3

I550 C3

I551 C2

I552 C2

I553 D3

I554 C3

I556 C2

I557 C2

I610 E2

I611 E2

I615 E5

I623 E2

I627 E2

I631 E5

I632 F5

I429 D4

I430 D3

I431 D4

I432 D3

I510 E2

I512 E2

I517 E1

I520 D1

I528 C2

I530 C2

I533 C1

I540 E2

I541 E2

I543 C2

I544 C1

I545 D2

I633 F5

I635 F5

I636 E5

I801 E3

I802 E2

I803 E2

I804 E2

I805 E3

I806 E2

I813 E3

I814 E4

I820 E4

I821 E4

I822 E4

I823 E4

I828 F3

I413 C3

I414 B3

I415 B3

I416 B3

I417 B3

I418 B3

I419 B3

I420 C3

I421 C3

I422 C3

I423 C3

I424 C3

I425 C3

I426 B3

I427 D4

I428 D4

I383 B4

I384 B4

I387 B5

I388 F7

I389 A5

I390 A5

I391 B5

I392 B5

I393 A4

I394 A4

I395 A4

I396 B5

I397 A5

I398 B4

I399 D3

I412 C3

I342 B4

I344 B4

I345 C8

I347 B4

I349 B4

I351 B5

I352 A4

I353 A4

I354 B5

I357 A5

I359 B5

I362 A4

I363 B4

I364 A4

I365 B4

I366 B4

I367 B4

I368 B4

I369 B4

I370 B4

I373 A3

I374 A3

I376 A3

I380 A4

I382 B4

IA31 A2

IA33 A3

IA34 A2

IA35 A2

IA36 A2

IA37 A1

IA38 B2

IA39 B2

IA40 A2

IA41 A3

IB10 A8

IB11 B8

IB12 A8

IB13 A8

IB14 B6

IB15 B6

IA14 A2

IA15 A2

IA16 B2

IA17 A1

IA18 A2

IA19 B2

IA20 B2

IA21 A2

IA22 B2

IA23 A2

IA24 A2

IA25 A2

IA26 A2

IA27 A2

IA29 A2

IA30 A2

IB17 A8

IB18 A6

IB19 A8

IB20 B8

IF10 F7

IF11 C9

IF12 F7

IF13 F8

IF14 E7

IF15 E7

IF16 E8

IF17 E7

IF18 E8

IF19 F8

IF20 F9

IF21 F8

I921 E2

I922 E1

I923 C1

I924 B2

IA01 A2

IA02 A2

IA03 A2

IA04 A2

IA05 A3

IA06 A3

IA07 A2

IA09 B2

IA10 B3

IA11 B3

IA12 B3

IA13 B2

I866 E3

I901 B2

I902 B2

I903 B2

I904 B2

I905 B2

I911 B1

I912 E1

I913 C1

I914 B1

I915 C1

I916 B1

I917 B1

I918 C1

I919 E2

I920 E1

I831 F4

I833 F3

I840 E3

I841 E3

I842 E3

I843 E3

I844 E4

I845 E4

I846 E3

I847 E3

I848 E3

I850 F3

I851 E3

I852 F4

I853 E4

I854 E4

I855 F3

I856 E3

I857 E3

I858 E4

I861 F3

I862 E3

I863 F2

I864 E3

I865 E3

IJ11 B9

IJ63 C9

IJ64 C9

IJ65 C9

IJ66 C9

IJ67 F9

IJ68 F9

IK68 E9

IK69 F9

IK70 F9

IK72 E9

IK73 E9

IK75 C9

IK76 F9

IK84 F8

IK85 F9

IL20 A2

IL21 A3

IL22 A2

IL23 A2

IF22 F8

IF23 F9

IF24 F8

IF25 F8

IF26 F8

IF27 F9

IF28 F8

IF29 F8

IF30 F8

IF31 E8

IF32 E7

IG13 C9

IG14 C9

IG15 C10

IG16 C10

IG17 C10

IG18 B10

IG19 C10

IG20 B10

IG21 B10

IH04 C10

IH06 D10

IH07 D9

IJ01 D8

IJ02 D8

Block Diagrams, Test Point Overview, and Waveforms

I2C IC’s Overview

I²C

B04A MICROPROCESSOR

+3V3_STBY

LC7.1E LA 6.

+3V3_SW

B06C HDMI

SDA2

SCL2

3382

3378

IIC_SDA_up

IIC_SCL_up

7311

M30300SAGP

MICRO

PROCESSOR

AD(0-7)

A(0-19)

7310

M29W800DT

EPROM

1Mx8

512Kx16

PROT

TXD1

RXD1

7320

7321

7315

M24C64

EEPROM

(NVM)

ERR

3343

1314

3345

COMPAIR

SERVICE

CONNECTOR

+3V3_STBY

3L09

1311

3L08

UART

CONNECTOR

(FOR DEVELOPMENT ONLY)

(NOT STUFFED)

+3V3_STBY

B04B VIDEO PROCESSOR

RXD0

TXD0

3354

BOLT_ON_SDA

3356

BOLT_ON_SCL

3247

3246

1G51

(LVDS CONNECTOR)

IIC_SDA

IIC_SCL

2x HDMI

1810

1811

CONNECTOR

+5V_SW

7850

M24C02

EEPROM

+3V3_SW

DOC_SDAA

7851-7852

DOC_SCLA

DOC_SDAB

7812-7813

27 28

7817

SII9025CTU

HDMI

CONTROL

DOC_SCLB

7811

M24C02

ERR

EEPROM

B04C AUDIO PROCESSOR B04B VIDEOPROCESSOR

3 2

7411

MSP4450P

SOUND

PROCESSOR

ERR

B03A TUNER IF & DEMODULATOR

7204

IS42S16400D

DRAM

1Mx16x4

ERR

7205

IS42S16400D

DRAM

1Mx16x4

ERR

58 57

7202

SVP CX32-LF

VIDEO

PROCESSOR

ERR

10 11

7113

TDA9886T/V4

DEMODULATOR

ERR

5 4

1101

TD1316AF/IHP

TUNER

ERR

H_16940_004.eps

270207

Block Diagrams, Test Point Overview, and Waveforms

Supply Lines Overview

SUPPLY LINES OVERVIEW

B02 DC-DC

CN6

X406

1P11

+5V_STANDBY

+12V_DISP

B04b,c

B02

SUPPLY

CN7

X412

1CO1

7B02

4C57÷4C60

RES

IN OUT

COM

-AUDIO_POWER

+AUDIO_POWER

+5V_STANDBY

+5V_SW

+3V3_STBY

7B05

+5V_SW

B07 B02

B07

B04a,B06d

B02

B04a

B02

B03a,b,c,e,

B04c,

B06a,b,c,d

B03f

B04A

STANDBY

7B04

IN OUT

COM

7B06

IN OUT

COM

ONLY FOR LCD

+3V3_SW

+3V3_MOJO

7B08

IN OUT

COM

+1V2_MOJO

7B03

5B06 6B03 +VTUN

(34V)

B02

B03a,f,B04a,b,

B06c

B03f

B03d

B03a

B03f

B02 3B13

7B01

STEP

DOWN

REG.

5B03 5B02 +1V8S_SW

B03b,B04b

LC7.1E LA

B03A TUNER IF & DEMODULATOR

+3V3_SW

+5V_SW

3133

3134

5114

5115

+3V3_SW

+5V_SW

+5VS

+5V_IF

+VTUN

+12V_DISP

+VTUN

ONLY FOR ANALOG TV

+12V_DISP

B03B DVB-DEMODULATOR

+1V8S_SW

+3V3

5F10

+5V_SW

+1V8S_SW

+3V3

+3V3FE

+5V_SW

B03C DVB-COMMON INTERFACE

+3V3

5K03

+3V3

+3V3_STV

5K04

5K05

+3V3_CORE

+3V3_BUF

+5V_SW

7K05

IN OUT

COM

5K01

5K02

+5V_SW

PCMCIA_5V

PCMCIA_AVCC

PCMCIA_VPP

X405

TO 1710

1080P

B02

B03f

B02

B03D DVB-MOJO

+1V2_MOJO

+3V3

5G04

+3V3clean

B03E DVB-MOJO MEMORY

+3V3

5H02

+5V_SW

+1V2_MOJO

+3V3

+3V3_VDDP

+3V3clean

+3V3

+3V3_NOR48

+5V_SW

B03F DVB-MOJO ANALOF BACK END

+3V3_MOJO +3V3_MOJO

5JO1 +3V3clean

7J04 +3V3

+1V8S_SW

IJ01

CONTROL

B04A MICROPROCESSOR B06B IO - SCART 1 & 2

B02

B03d

+3V3_STBY

+3V3_SW

+5V_STANDBY

B04B VIDEO PROCESSOR

+1V8S_SW

3244

3248

5224

5226

5220

5222

5225

3L10

+3V3_STBY

+3V3_SW

+5V_STANDBY

5304

1M20

B02

1M20

IR/LED

B02

+1V8S_SW

CX_PAVDD1

CX_PAVDD2

CX_PDVDD

CX_PAVDD

CX_AVDD_ADC1

CX_AVDD_ADC2

CX_AVDD_ADC3

B02

+3V3_SW

5227 CX_AVDD_ADC4

+3V3_SW

B02

5219

5223

CX_AVDD3_BG_ASS

CX_AVDD3_OUTBUF

+12V_DISP

7210

5218

5221

7208

CONTROL

CX_AVDD3_ADC1

CX_AVDD3_ADC2

+12V_DISP

5215

5217

VDISP

1G51

LCD_PWR_ON

B04A

ONLY FOR LCD

B02

1G51

1080P

B04C AUDIO PROCESSOR

+12V_DISP +12V_DISP

4401

7410

+AUDIO_POWER_+12V_DISP

+8V

IN OUT

COM

+5V_SW

3402

5401

5402

+5V_SW

+5V_D

+5V_AUD

B06A

+5V_SW

YPBPR & REAR IO

+5V_SW

1G51

B04B

SSB

+5V_SW

B06C HDMI

+3V3_SW

+5V_SW

HDMI

CONNECTOR-1

1810

HDMI

CONNECTOR-2

1811

B06D HEADPHONE AMP & MUTING

+3V3_STBY

+5V_SW

B07

+AUDIO_POWER

5A05

5A06

VDD

5A07

-AUDIO_POWER

3A02

4A01 +AUDIO_POWER_+12V_DISP

RES

-AUDIO_POWER

VSSA

SUPPLY

VSS

F1 OCM ON CHIP MICROCONTROLLER

+3V3_SW

F2 FLASH & NVM

+3V3_IO

+3V3_SW

AUDIO

3A01

LVDS IN

+3V3_LVDSA

+3V3_LVDSVCC

+3V3_LVDSD

1G51

+5V_SW

+3V3_SW

+5V_SW

+5VHDMI_A

+5VHDMI_B

+3V3_STBY

+5V_SW

+AUDIO_POWER

VDDA

+3V3_SW

(ONLY FOR 1080P)

+3V3_IO

+3V3_SW

(ONLY FOR 1080P)

+3V3_LVDSA

+3V3_LVDSVCC

+3V3_LVDSD

+VDISP

B03b,c,d

B06B IO - SCART 1 & 2

+5V_SW +5V_SW

+VDISP

LVDS OUT

(ONLY FOR 1080P)

+VDISP

1M20

B04A

SSB

1G52

41 TO

DISPLAY

(ONLY FOR 1080P)

F5 SUPPLY IN

+1V8_CORE

+1V8_DVI

+1V8_ADC

+3V3_IO

+3V3_ADC

+3V3_SW

+3V3_PLL

+3V3_LVDSA

+3V3_LVDSD

+3V3_LBADC

+3V3_DVI

F6 LVDS IN

+1V8_CORE

+2V5_DDR_MAL

+3V3_SW

+1V8_CORE

+2V5_DDR_MAL

+3V3_SW

(ONLY FOR 1080P)

F7 DC POWER SUPPLY

1710

5A07

7701-1

7710

STEP

DOWN

REG.

7701-2

5A07

+12V

5716

5717

5718

5719

5720

5721

5722

5723

5724

7713

IN OUT

COM

+3V3

+3V3_IO

+3V3_LVDSA

+3V3_LVDSD

+3V3_LBADC

+3V3_ADC

+3V3_SW

+3V3_DVI

+3V3_PLL

+3V3_LVDSVCC

+2V5

5715 +2V5_DDR_MAL

7714

IN OUT

COM

+1V8

5712 +1V8_CORE

5713 +1V8_ADC

5714 +1V8_DVI

(ONLY FOR 1080P)

J IR/LED/LIGHT-SENSOR

1M20

5 +5V_STANDBY +5V_STANDBY

+1V8_CORE

+1V8_DVI

+1V8_ADC

+3V3_IO

+3V3_ADC

+3V3_SW

+3V3_PLL

+3V3_LVDSA

+3V3_LVDSD

+3V3_LBADC

+3V3_DVI

(ONLY FOR 1080P)

F2,F5

F3,F5

F1,F2,

F5,F6

G_16860_040.eps

090307

Circuit Diagrams and PWB Layouts

7. Circuit Diagrams and PWB Layouts

SSB: DC/DC

B02

DC - DC

2 3

LC7.1E LA

5 6 7 8

-AUDIO_POWER

+AUDIO_POWER

+5V_STANDBY

5B10

5B11

4C55

4C56

4C61

4C62

+5V_SW

4C57

4C58

4C59

4C60

PDP

4C55 / 4C56 / 4C61 / 4C62

4C57 / 4C58 / 4C59 / 4C60

22u

GNDSND

5V2

GNDSND

-12V2

+12V2

GNDSND

FB21 FB22

FB23 FB24

FB25

FB27

FB26

FB28

FB29

FB30

FC25

1C01

FB31

B9B-PH-K

BL_ADJUST

POWER_DOWN

BL_ON_OFF

FC26

FC27

BACKLIGHT_BOOST

STANDBY FC28

+5V_STANDBY

+12V_DISP

FC29 FB34

RES 4C01 IB18

FB32

FB33

1P11

2V9

2V8

1V6

0V(5V)

B8B-PH-K-S

+5V_SW

5B01

10u

GNDDC

FB10

7B01

L5973D

INH

VCC Φ VREF

OUT

SYNC

COMP

GND GND_HS

IB12

IB19

IB14

IB13

IB11

3B12

470R

7B03

2N7002

+5V_STANDBY

STANDBY

0V(5V)

ITV Connector

1B11

4 5

B3B-PH-SM4-TBT(LF)

7B02

LD1117DT33C

IN OUT

COM

ONLY FOR LCD

FB15

+5V_STANDBY

3B18

6K8

IB17

7B05

SI4423DY

FB13

+3V3_STBY

Item

2 B 2 2

2 B 2 3

2 B 2 6

4 C 5 8

4 C 5 9

4 C 6 0

4 C 6 1

4 C 6 2

3 B 1 7

3 B 1 8

4 C 5 5

4 C 5 6

4 C 5 7

7 B 0 5

7 B 0 6

7 B 0 8

+5V_SW

EU iTV - LCD Description

E L C A P S M 3 5 V 4 U 7 P M 2 0 C O L R

E L C A P S M 1 6 V 1 0 U P M 2 0 C O L R

R S T S M 0 6 0 3 6 K 8 P M 5 C O L

R S T S M 0 6 0 3 J U M P .

0 R 0 5 C O L

R S T S M 0 6 0 3 J U M P .

0 R 0 5 C O L

R S T S M 0 6 0 3 J U M P .

0 R 0 5 C O L

R S T S M 0 6 0 3 J U M P .

0 R 0 5 C O L

R S T S M 0 6 0 3 J U M P .

0 R 0 5 C O L

R S T S M 0 6 0 3 J U M P .

0 R 0 5 C O L

R S T S M 0 6 0 3 J U M P .

0 R 0 5 C O L

R S T S M 0 6 0 3 J U M P .

0 R 0 5 C O L

( V I S H ) R

I C S M L D 1 1 1 7 D T 3 3 C ( S T 0 0 ) R

I C S M L D 1 1 1 7 D T ( S T 0 0 ) R

+5V_SW

FB16

7B04

LD1085D2T33

IN OUT

COM

GNDTUN

FB17

7B06

LD1117DT33C

IN OUT

COM

7B08

LD1117DT

IN OUT

COM

FB19

FB20

IB15

IB20

RES

5B05

33u

5B03

33u

IB10

RES

4B01

5B02

10u

(---V) MEASURED IN STANDBY

3139 123 6261.1

1 2 3 4 5 6 7 8

FB11

FB14

34V

+3V3_SW

2B11

+3V3_MOJO

+1V2_MOJO

B02

+1V8S_SW

+VTUN

G_16860_001.eps

250107

1B11 D2

1C01 A3

1P11 C3

2B10 B8

2B11 B9

2B12 B4

2B13 B8

2B14 B6

2B15 B6

2B16 B7

2B17 D1

2B18 D3

4C61 B1

4C62 B1

5B01 A4

5B02 A8

5B03 A8

5B04 C7

5B05 A8

5B06 C7

5B10 A1

5B11 A1

6B01 B7

3B11 C6

3B12 B7

3B13 C6

3B14 C7

3B15 D6

3B17 F2

3B18 F2

3B19 C7

4B01 A8

4C01 C2

4C55 B1

4C56 B1

4C57 B1

4C58 B1

4C59 B1

4C60 B1

2B19 C8

2B20 D7

2B21 E7

2B22 F2

2B23 E7

2B24 F3

2B25 F3

2B26 F7

2C55 A2

2C56 A2

2C57 B2

2C58 C2

2C59 B2

2C60 A2

2C61 A2

3B10 B7

6B02 C9

6B03 C8

7B01 A5

7B02 D3

7B03 D7

7B04 D6

7B05 F3

7B06 E6

7B08 F6

FB10 A5

FB11 A9

FB13 D4

FB14 C9

FB15 E2

FB16 D6

FB17 D7

FB19 E7

FB20 F7

FB21 A3

FB22 A3

FB23 A3

FB24 A3

FB25 A3

FB26 A3

FB27 A3

FB28 A3

FB29 B3

FB30 B3

FB31 B3

FB32 C2

FB33 C2

FB34 C2

FC25 B3

FC26 C1

FC27 C1

FC28 C1

FC29 C1

IB10 A8

IB11 A7

IB12 B6

IB13 B7

IB14 C6

IB15 C7

IB17 F2

IB18 C2

IB19 B6

IB20 B8

Circuit Diagrams and PWB Layouts

SSB: Tuner & Demodulator

1 2 3 4

B03A

TUNER IF & DEMODULATOR

LC7.1E LA

SAW FILTERS

A110

* 4110

I110

* 4111

IF_ATV

3113

47R

5110

2110

220p

5111

390n

2111 I112

68p

2114

3p3

40.4MHz

Trap

3113/4110 & 2110/4111 at same position

RESERVED

SAW_SW

I141 3119

22K

I120

3122

18K

+5V_IF

3118

2K2

7109

BC847B

F111

+5V_IF

1102

IGND

GND

OFWK3953M

38M9

A115

A116

5117

RES

VIF1

VIF2

2117

10n

3116

6K8

I114

I118

ISWI

1103

GND

OFWK9656M

38M9

A124

A125

5113

RES

SIF2

SIF1

7 8 9

F112 F132

TUNER

TD1316AF/IHP-2

5118 I146

220R

3136

I147

3137

47R

7133

L78M05CDT

47R

1 3

IN OUT

COM

F134

ONLY FOR ANALOG TV

+VTUN

I145

4V9

* 4113

3130

1K0

I137

2119

100n

2142

10u 50V

2151

10u 50V

5112

220R

F133

2120

22u

2118

10n

4V3

DVB ONLY

+5V_IF

2113

7111

74HCT4053D

10n

VDD

MDX

4X1

4X2

* * * * * *

4 3

VSS VEE

I122

1V3

2122

15p

1V3

5120

RES

3120

* 4120

120R

10R

2121

15p

5121

RES

3121

120R

10R

I121

I123

* 4121

+5V_IF

RES

3131

4K7

RES

7131

BSH111

* 4122

+5V_IF

RES

3132

4K7

RES

7132

BSH111

DEMODULATOR

RF_AGC

3124

RES

100R

2124

22n

7113

TDA9886T/V4

F128

I124

3123

330R

2123

1n5

I125

1104

4M0

I142

+5VS

VIF2

VIF1

SIF2

SIF1

VIF2

VIF1

24 SIF2

23 SIF1

TUNER AGC VIF AGC

SUPPLY

VIF-PLL

RC VCO

SINGLE REFERENCE QSS MIXER

INTERCARRIER MIXER AND

AM-DEMODULATOR

MAD

SIF

AGC

OUTPUT

PORTS

DIGITAL VCO CONTROL AFC DETECTOR

SOUND TRAPS

4.5 to 6.5 Mhz

CVBS 17

F130

AUD

AUDIO PROCESSING

AND SWITCHES DEEM

I128 2133

10n

2V1

NARROW-BAND FM-PLL

DEMODULATOR

AFD 6

I129

2136

470n

7114

BC847B

1V5

I138

* 4124

I139

5116

5u6

RES

F140

CVBS_RF

+5V_SW

F114 3133

1R0

4110

4111

4112

4113

4114

4115

4116

4117

4118

4119

4120

4121

4122

4123

4124

+5VS

IIC_SCL

IIC_SDA

SIF

3139 123 6261.1

2138 10n

2 3

I143

I144

2140

3128

100R

RES

I133

3129

2141

100R

RES

I135

I136

4 5

I131

2137

10n

2139

I130

3127

5K6

390p

6 7 8 9

+5V_SW

3134

1R0

3111 5K6

+5V_IF

RF_AGC

2112

10u

6110

BAS316

2149

2u2

I111

3110

8K2

3115

39K

ANALOG

5114

10u

2129

22u

2130

10n

F129

5115

10u

2131

22u

F131

2132

22u

* 4125

+3V3_SW

DIGITAL

RF_AGC_IBO

WAGC_SW

DVB_SW

IIC_SDA

I2C_TDA_SDA

IIC_SCL

I2C_TDA_SCL

+5VS

VIM_IBO

IF_AGC_IBO

VIP_IBO

IF_ATV

4MHZ_CLK

+5V_IF

B03A

G_16860_002.eps

240107

3131 D10

3132 E10

3133 H10

3134 H10

3135 F7

3136 A8

3137 A9

4110 B2

4111 B2

4112 B6

4113 B8

4114 C7

4115 C7

4116 C7

4117 C7

4118 C7

4119 C7

4120 D8

4121 D10

4122 E10

4123 D7

4124 G8

4125 B11

5110 B2

5111 B1

5112 B9

5113 C5

5114 H11

5115 H11

5116 G8

5117 B5

5118 A8

5120 D8

5121 E8

6103 C3

6110 A11

7109 D2

7111 B10

7113 F2

7114 G7

7131 D11

7132 E11

7133 A8

3120 D8

3121 E8

3122 D2

3123 E3

3124 E2

3125 G7

3126 H7

3127 H6

3128 I4

3129 I3

3130 B8

2147 A8

2148 A9

2149 B11

2151 C9

3110 A12

3111 A11

3113 B2

3115 B12

3116 B3

3117 C3

3118 D2

3119 D1

2126 F3

2127 F5

2128 F7

2129 H11

2130 H11

2131 I11

2132 I11

2133 G6

2134 H7

2135 H8

2136 H6

2137 H5

2138 H2

2139 H5

2140 I3

2141 I3

2142 C9

2143 F5

2144 I3

2145 I3

2146 B6

1101 A6

1102 B4

1103 C4

1104 E4

2110 B2

2111 B2

2112 B11

2113 B10

2114 B2

2115 B6

2116 B6

2117 C3

2118 C10

2119 C8

2120 C9

2121 E7

2122 D7

2123 F3

2124 F2

2125 F3

F129 H11

F130 G6

F131 H11

F132 B6

F133 B9

F134 A8

F140 G8

I110 B2

I111 A12

I112 B3

I114 C4

I118 C4

I120 D2

I121 D10

I122 D7

I123 E10

I124 E3

I125 F4

I126 F3

I127 F3

I128 G6

A110 B1

A115 B5

A116 B5

A124 C5

A125 C5

F111 B3

F112 B6

F114 H10

F115 B7

F116 B7

F117 B7

F118 B7

F119 B7

F120 B7

F121 B7

F122 B7

F123 B7

F126 C7

F127 C7

F128 F2

I129 G6

I130 H6

I131 H5

I133 I4

I135 I4

I136 I4

I137 B8

I138 G7

I139 G7

I141 D1

I142 F5

I143 H3

I144 H4

I145 A9

I146 A8

I147 A8

4MHZ_CLK

IF32

RF_AGC_IBO

+5V_SW

COMP_OUT

+5V_SW

2V2

2F27

7F04-1

LM393D

3V3

IF18

3V3

100n

3F24

100K

+5V_SW

I2C_TDA_SDA

I2C_TDA_SCL

3139 123 6261.1

+5V_SW

7F04-2

LM393D

Circuit Diagrams and PWB Layouts LC7.1E LA

SSB: DVB - Demodulator (Not implemented in this chassis)

1 2 3 4

B03B

DVB - DEMODULATOR

6 7 8

3F11

680K

3F13

+3V3

7F02

74AHC1GU04GW

IF10 2

1V3

3V2

FF10

1V6

220K

3F10

330R

IF11

3F12

330R

4MHz_MOJO

+3V3FE

+1V8S_SW

FF11

2F14

100n

2F15

100n

2F16

100n

2F13

100n

+3V3FE

+3V3

7F03

74AHC1GU04GW

1V3

3V2

FF13

1V6

3F15

680K 3F17 220K

3F14

330R

IF12

3F16

390R

2F26

100n

FF14

7F01

TDA10046AHT

64 60 59 57 53

4F11

RES

IF14

RES

+5V_SW

3F41

2K7

4F12

IF15

2F28

100n

+5V_SW

3F42

2K7

IF_AGC_IBO

VIM_IBO

VIP_IBO

2F33

10p

3F28

100K

FF16

FF18

FF20

3F29

100K

+5V_SW +5V_SW

3F25

2F29

100K

100n

2F31 100n

2F32 100n

COMP_OUT

FE_LOCK

I2C_LOCAL_SDA

I2C_LOCAL_SCL

3F19

4K7

3F26

1K0

+3V3FE

3F20

4K7

3F18

10K

RESET_FE_n

IF13

3V2 9

IF16

2V8

IF17

1V3

FF17

FF19

1V5

FF21

0V7

FF22

0V6

FF24

3F40

3F44

FF26

3F46

FF28

3F48

FF23

2V3

3F30

33R

3F33

10K

IF19

3V2

100R

4V6

FF25

4V6

FF27

FF29

FF30

50 42 22 5

COFDM

47 34 19

CHANNEL DECODER

FF12

2F19

100n

+3V3FE

2F17

100n

2F20

100n

2F10

100n

5F10

60R

2F11

47u 16V

5F11

2F21

47u 16V

60R

2F18

100n

2F23

100n

+3V3FE

2F25

100n

2F24

100n

20 0V

17 0V

16 2V4

18 0V

14 2V4

3F21

33R

2V2

3F31-4 4

3F31-3 3

3F31-2

3F31-1

3F32-4 4

2V2

3F32-3 3

3F32-2

3F32-1

37 1V7 3F34-1

36 1V3 3F34-2

35 0V 3F34-3 3

33 0V

51 IF31

33R

IF20

IF21

IF22

IF23

IF24

IF25

IF26

IF27

33R IF28

33R IF29

33R IF30

3 4 5 6 7

63 58 56

52 45 40 29 24 15 7

+3V3

+1V8S_SW

TDA_DAT(0)

TDA_DAT(1)

TDA_DAT(2)

TDA_DAT(3)

TDA_DAT(4)

TDA_DAT(5)

TDA_DAT(6)

TDA_DAT(7)

TDA_CLK

TDA_VALID

TDA_SYNC

B03B

10046_TDO

STV_TDO

JTAG_TMS

JTAG_TCK

JTAG_TRST

TDA_DAT(0:7)

G_16860_003.eps

240107

FF12 B9

FF13 C5

FF14 C9

FF16 D4

FF17 D6

FF18 D4

FF19 D6

FF20 D4

FF21 D6

FF22 E6

FF23 E6

FF24 E6

3F41 F3

3F42 F3

3F44 F6

3F46 F6

3F48 F6

4F11 D3

4F12 D3

5F10 A10

5F11 B10

7F01 C7

7F02 B4

7F03 B4

7F04-1 C2

7F04-2 D2

FF10 B5

FF11 B8

3F29 D5

3F30 E6

3F31-1 E9

3F31-2 E9

3F31-3 E9

3F31-4 E9

3F32-1 F9

3F32-2 F9

3F32-3 F9

3F32-4 E9

3F33 E6

3F34-1 F9

3F34-2 F9

3F34-3 F9

3F40 F6

2F26 C6

2F27 C2

2F28 D3

2F29 D5

2F30 D1

2F31 D5

2F32 D5

2F33 D4

3F10 B5

3F11 B4

3F12 B6

3F13 B5

3F14 C5

3F15 C4

3F16 C6

3F17 C5

3F18 C6

3F19 C5

3F20 C6

3F21 C10

3F22 D3

3F23 D1

3F24 D2

3F25 D5

3F26 D5

3F27 D3

3F28 D4

2F10 B10

2F11 B10

2F12 B7

2F13 B9

2F14 B8

2F15 B8

2F16 B8

2F17 B9

2F18 B10

2F19 B9

2F20 B9

2F21 B10

2F22 C7

2F23 C9

2F24 C10

2F25 C10

IF20 E10

IF21 E10

IF22 E10

IF23 E10

IF24 E10

IF25 E10

IF26 F10

IF27 F10

IF28 F10

IF29 F10

IF30 F10

IF31 F9

IF32 C1

FF25 F6

FF26 F6

FF27 F6

FF28 F6

FF29 F6

FF30 F6

IF10 B4

IF11 B6

IF12 C5

IF13 C7

IF14 D3

IF15 D4

IF16 D6

IF17 D6

IF18 D2

IF19 E6

Circuit Diagrams and PWB Layouts LC7.1E LA

SSB: DVB - Common Interface (Not implemented in this chassis)

1 2 3 4 5 6 7

B03C

DVB-COMMON INTERFACE

A_MDO(0:7)

A_MDI(0:7)

8 9

3K19

3K21

3K20

3K18

3K15

3K16

3K17

3K22

10K

PCMCIA

CONTROLLER

10 11 12

STV_TDO

JTAG_TRST

STV_TDI

JTAG_TMS

JTAG_TCK

TDO

TRST_

TDI

TMS

TCK

TDA_DAT(0:7)

+5V_SW

7K04

27M

VDD

GND

FK05

IK84

+3V3_STV

TS_DATA(0:7)

MIU_ADDR(0:24)

|ADOE

ADLE

MIU_ADDR(7)

MIU_ADDR(6)

MIU_ADDR(5)

MIU_ADDR(4)

MIU_ADDR(3)

MIU_ADDR(2)

MIU_ADDR(1)

MIU_ADDR(0)

MIU_ADDR(8)

MIU_ADDR(9)

MIU_ADDR(10)

MIU_ADDR(11)

MIU_ADDR(12)

MIU_ADDR(13)

MIU_ADDR(14)

3K49 33R

3K50 33R

LATCH

+3V3_BUF

3V2

7K01

74LVC573ADB

OE_

VCC

3V2

2 D0

3 D1

4 D2

5 D3

6 D4

7 D5

8 D6

9 D7

2K00

100n

3V2

PCMCIA_A(0:14)

PCMCIA_A(7)

PCMCIA_A(6)

PCMCIA_A(5)

PCMCIA_A(4)

PCMCIA_A(3)

PCMCIA_A(2)

PCMCIA_A(1)

PCMCIA_A(0)

PCMCIA_A(10)

PCMCIA_A(11)

PCMCIA_A(9)

PCMCIA_A(8)

PCMCIA_A(13)

PCMCIA_A(14)

LATCH

+3V3_BUF

7K02

74LVC573ADB

0V 1 OE_

VCC

3V2

2 D0

3 D1

4 D2

5 D3

6 D4

7 D5

8 D6

9 D7

GND

2K01

100n

Q0 19

Q3 16

3V2

PCMCIA_A(8)

PCMCIA_A(9)

PCMCIA_A(10)

PCMCIA_A(11)

PCMCIA_A(12)

PCMCIA_A(13)

PCMCIA_A(14)

PCMCIA_A(12)

PCMCIA_A(7)

PCMCIA_A(6)

PCMCIA_A(5)

PCMCIA_A(4)

PCMCIA_A(3)

PCMCIA_A(2)

PCMCIA_A(1)

PCMCIA_A(0)

BUS TRANSCEIVER

2K04

+3V3_BUF

3V2

100n

7K03

74LVC245A

VCC 3EN1

3EN2

MIU_DATA(7) 0V 18

MIU_DATA(0:15)

MIU_DATA(6)

MIU_DATA(5)

MIU_DATA(4)

MIU_DATA(3)

MIU_DATA(2)

MIU_DATA(1)

MIU_DATA(0)

GND

3139 123 6261.1

1 2 3

0V 3K25

3K26

2K15

3K23-4 4

3K23-3 3

3K23-2

3K24-4

3K24-3

3K23-1 1

3K24-2 2

3K24-1 1

33R

100p

33R

DATDIR

|DATOE

PCMCIA_D(7)

PCMCIA_D(6)

PCMCIA_D(5)

PCMCIA_D(4)

PCMCIA_D(3)

PCMCIA_D(2)

PCMCIA_D(1)

PCMCIA_D(0)

PCMCIA_D(0:7)

PCMCIA_D(3)

PCMCIA_D(4)

PCMCIA_D(5)

PCMCIA_D(6)

PCMCIA_D(7)

A_|CE1

PCMCIA_|OE

PCMCIA_|WE

A_|RDY|IRQ

PCMCIA_AVCC

PCMCIA_VPP

A_MIVAL

A_MICLK

PCMCIA_D(0)

PCMCIA_D(1)

PCMCIA_D(2)

A_|IOIS16

A_MDO(0:7)

68p PCMCIA

CONNECTOR

1K00-A

ROW_A

FK63

WE|P

RDY|BSY

VCC1

VPP1

A16

A15

A12

WP|IOIS16

GND2

GND1

CE1

A10

A11

A13

A14

FK22

FK24

FK26

FK28

FK30

FK31

FK32

FK34

FK36

FK38

FK40

FK80

FK68

FK70

FK72

FK74

FK10

FK12

FK14

FK16

FK18

FK20

FK42

FK44

FK46

FK48

FK50

FK52

FK54

FK56

FK58

FK60

1K00-B

ROW_B

GND3

CD1

D11

D12

D13

D14

D15

CE2

VS1

IORD

IOWR

A17

A18

A19

A20

A21

VCC2

VPP2

A22

A23

A24

A25

VS2

RESET

WAIT

7172

INPACK

REG

BVD2|SPKR

BVD1|STSCHG

D10

CD2

GND4 FK62

FK33

FK35

FK37

FK39

FK41

FK43

FK45

FK47

FK49

FK51

FK53

FK55

FK57

FK59

FK61

FK67

FK69

FK71

FK73

FK75

FK11

FK13

FK15

FK17

FK19

FK21

FK23

FK25

FK27

FK29

A_|VS1

PCMCIA_AVCC

PCMCIA_VPP

A_|INPACK

+3V3_STV

7 8 9

+3V3_STV 3K12

10K

A_|CD1

A_MDI(0)

A_MDI(1)

A_MDI(2)

A_MDI(3)

A_|CE2

PCMCIA_|IORD

PCMCIA_|IOWR

A_MISTRT

A_MDI(0:7)

A_MDI(4)

A_MDI(5)

A_MDI(6)

A_MDI(7)

A_MOCLK

A_RESET

A_|WAIT

PCMCIA_|REG

A_MOVAL

A_MOSTRT

A_|CD2

10 11

MIU_ADDR(0:24)

GND-DVB2

GND-PROC

GND-TSO

GND-TSI

GND-CORE

VCC-PROC

109

VCC-TSO

VCC-TSI

VCC-CORE

PCMCIA_5V

VCCEN

PCMCIA_5V

+3V3

+3V3_STV

5K01

60R

5K02

60R

5K03

60R

5K04

60R

5K05

60R

+3V3_CORE

+3V3_STV

CURRENT

FK84

FK06

5V 7

IK70

SWITCH

OUT1

OUT2

SET

7K05

ST890C

3V2

IN1

IN2

FAULT_

ON_

14 15

FK81

FK82

FK83

B03C

+5V_SW

IK72

PCMCIA_AVCC

PCMCIA_VPP

+3V3_STV

+3V3_CORE

+3V3_BUF

G_16860_004.eps

240107

3K39 B4

3K40 B4

3K41 B5

3K42 B5

3K43 B5

3K44 B5

3K45 B5

3K46 B5

3K47 B5

3K48 B6

3K49 H2

3K50 H2

3K51 J6

3K52 B4

5K01 G14

5K02 H14

5K03 H14

5K04 I14

5K05 I14

7K00 E1

7K01 H3

7K02 I3

7K03 J3

7K04 F8

7K05 E15

FK01 E9

FK02 E10

FK05 F9

FK06 F14

FK10 H7

FK11 H8

FK12 H7

FK13 H8

FK14 H7

FK15 H8

FK16 H7

FK17 H8

FK18 I7

FK19 I8

FK20 I7

FK21 I8

3K24-4 K4

3K25 J4

3K26 K4

3K27 B2

3K28 B2

3K29 B3

3K30 B3

3K31 B3

3K32 B3

3K33 B3

3K34-1 B3

3K34-2 C3

3K34-3 C4

3K34-4 C4

3K38 B4

FK22 I7

FK23 I8

FK24 I7

FK25 I8

FK26 I7

FK27 I8

FK28 I7

FK29 I8

FK30 I7

FK31 I7

FK32 I7

FK33 I8

FK34 I7

FK35 I8

FK36 I7

FK37 I8

FK38 I7

FK39 I8

FK40 I7

FK41 I8

FK42 I7

FK43 I8

FK44 J7

1K00-A H7

1K00-B H8

2K00 H4

2K01 I4

2K02 H15

2K03 H15

2K04 J2

2K05 G15

2K06 H15

2K07 F14

2K08 H15

2K09 H15

2K10 H15

2K11 I15

2K12 I15

2K13 I15

2K14 F9

2K15 K4

2K16 F8

2K17 G8

3K00 F2

3K01 F2

3K02-1 F4

3K02-2 F4

3K02-3 F4

3K03-1 F5

3K03-2 F5

3K03-3 F5

3K03-4 F5

3K04 H9

3K05-1 F5

3K05-2 F5

3K05-3 F5

3K05-4 F6

3K06 J9

3K07 J9

3K08 J6

3K09 F9

3K10 E14

3K11 F16

3K12 F10

3K13 F14

3K15 B9

3K16 B9

3K17 B9

3K18 B9

3K19 B9

3K20 B9

3K21 B9

3K22 B9

3K23-1 K4

3K23-2 K4

3K23-3 K4

3K23-4 K4

3K24-1 K4

3K24-2 K4

3K24-3 K4

FK59 J8

FK60 J7

FK61 J8

FK62 J8

FK63 J7

FK67 H8

FK68 H7

FK69 H8

FK70 H7

FK71 H8

FK72 H7

FK73 H8

FK74 H7

FK75 H8

FK80 H7

FK81 H15

FK82 I15

FK83 I15

FK84 E15

IK68 C10

IK69 C10

IK70 F15

IK72 F16

IK73 C10

IK75 F11

IK76 C11

IK84 F8

IK85 C4

FK45 J8

FK46 J7

FK47 J8

FK48 J7

FK49 J8

FK50 J7

FK51 J8

FK52 J7

FK53 J8

FK54 J7

FK55 J8

FK56 J7

FK57 J8

FK58 J7

Circuit Diagrams and PWB Layouts LC7.1E LA 7.

TS_DATA(0:7)

TS_DATA(0)

TS_DATA(1)

TS_DATA(2)

TS_DATA(3)

TS_DATA(4)

TS_DATA(5)

TS_DATA(6)

TS_DATA(7)

2V2

TS_DATA

7G00-2

PNX8314HS

(TS)

TS_SYNC

TS_STROBE

TS_VAL

30 0V

29 1V6

28 1V3

TS_SYNC

TS_CLK

TS_VALID

MOJO_I2S_OUT_SD

MOJO_I2S_OUT_SCK

MOJO_I2S_OUT_WS

IG14

3G35

IG15

3G34

IG16

3G33

22R

IG18

IG19

22R

IG20

202

203

204

1V6

206

SD_OUT

SCK_OUT

WS_OUT

SPDIF

205

FSCLK

7G00-3

PNX8314HS

(AV)

CVBS

168

172

C_CVBS

170

163 0V

165 0V

167 0V

B|Pb

G|Y

R|Pr

SSB: DVB - Mojo (Not implemented in this chassis)

1 2 3 4

B03D

DVB-MOJO

+3V3

3G38

RES 3G18

3G19

RES 3G15

3G16

3G17

3G20

10K

MIU_WEN

NOR_RYBY

RES

4G09

4G10

RESET_n

4MHZ_MOJO

+3V3

3V3 2

FG42

RES

3G65

RES

7G06

1K0

NCP303LSN30

INP

OUTP

GND

POWER ON RESET

3V3 RESET_n

I2C_LOCAL_SCL

I2C_LOCAL_SDA

IIC_SCL

IIC_SDA

RES 1G04

6 7

BM05B-SRSS-TBT

PRO. FOR USB

USB_OVRCUR

USB_PWR

USB_DM

USB_DP

FG31

3G43

FG33

3G44

FG17

3G46

FG19

3G47

7G00-6

PNX8314HS

100R

FG32

100R

FG34

100R

FG35

100R

FG36

SCL0

(I2C-USB-SCO)

4V6

SDA0

4V6

3V3

SCL1

3V3

SDA1

SC0_DA

SC0_CMDVCC

USB_PWR

USB_DP

USB_DM

198

SC0_CCK

USB_OVRCUR

SC0_RST

SC0_OFF

199

200

201

3139 123 6261.1

FOR DEV. ONLY

2 3

RES

2G31 100n

4G31

+1V2_MOJO

5G03

100MHz

1V2clean

FG37

2G32

10u

100n

2G33

16V

+1V2_MOJO

5G01

100MHz

5G02

100MHz

FG18

IG21

+3V3_VDDP

FG39

1V2_CORE 1V2

2G12 100n 41

2G13 100n 78

2G14 100n 119

2G15 100n 134

2G16

2G03

2G04

100n

3V3

191

100n 43

2G05

2G06

100n

2G07 100n

2G08

100n

2G09 100n

2G10 100n

2G11 100n

2G22

111

130

161

190

10u 16V

2G23

+3V3

10u 16V

2G24

5G04

10u 16V

60R +3V3_VDDP

MOJO_TRST

MOJO_TDI

10046_TDO

MOJO_TMS

MOJO_TCK

RESET_n

FG10

FG11

FG12

FG14

FG15

FG16

FG40

FG41

4G01

4G02

4G03

4G04

4G05

CONFIGURABLE

ROW_1

1G01-1

ROW_2

1G01-2

FTSH FTSH

FG13

FOR DVE. ONLY

JTAG_TCK

JTAG_TRST

JTAG_TMS

STV_TDI

10046_TDO

4G05 FOR DEVELOPMENT ONLY

4G01, 4G02, 4G03,4G04 FOR PRODUCTION

SDRAM_DATA(0:15)

SDRAM_DATA(0)

SDRAM_DATA(1)

SDRAM_DATA(2)

SDRAM_DATA(3)

SDRAM_DATA(4)

SDRAM_DATA(5)

SDRAM_DATA(6)

SDRAM_DATA(7)

SDRAM_DATA(8)

SDRAM_DATA(9)

SDRAM_DATA(10)

SDRAM_DATA(11)

SDRAM_DATA(12)

SDRAM_DATA(13)

SDRAM_DATA(14)

SDRAM_DATA(15)

11 12

0V 113

2V6 114

2V6 115

2V6 116

2V6 117

2V6 118

0V 121

2V3 122

2V9 132

2V5 129

128

2V5 127

2V3 126

2V3 125

0V 124

2V3 123

7G00-4

PNX8314HS

(SDRAM)

SDRAM_ADDR

8 SDRAM_DATA 8

9 9

10 10

11 11

12 12

13 13

DQM0

DQM1

CAS

RAS

CKE

HSCKB

153

154

155

156

149

148

147

146

145

144

152

143

142

150

151

138

133

140

141

139

137

136

2V1

3V1

2V9

3V3

1V5

SDRAM_ADDR(0:14) B03D

SDRAM_ADDR(0)

SDRAM_ADDR(1)

SDRAM_ADDR(2)

SDRAM_ADDR(3)

SDRAM_ADDR(4)

SDRAM_ADDR(5)

SDRAM_ADDR(6)

SDRAM_ADDR(7)

SDRAM_ADDR(8)

SDRAM_ADDR(9)

SDRAM_ADDR(10)

SDRAM_ADDR(11)

SDRAM_ADDR(12)

SDRAM_ADDR(13)

SDRAM_ADDR(14)

SDRAM_DQM0

SDRAM_DQM1

SDRAM_CAS

SDRAM_RAS

SDRAM_WE

SDRAM_CKE

SDRAM_CLK

7G00-7

PNX8314HS

VDDC

VDDP

7G00-1

PNX8314HS

(PWR)

VSSC

VSSP

AVDD 1

IDUMP

192

112

131

162

193

120

135

175

169

164

171

166

174

173

1V2

IG13

+3V3clean

2G19 100n

2G20 100n

2G21 100n

MIU_DATA(0:15)

+3V3_VDDP

DSW_n

RESET_FE_n

RESET_STV user_EEPROM_WP

FE_LOCK

NOR_RYBY

NOR_WP

STV_INT

STV_A25

3G63

RXD0

TXD0

3V3

4V6

185

10K

IG17

34 3V3

3V3

SC1_RST

SC1_OFF

SC1_CCK

CTS0

RTS0

RX0

TX0

DCD0

PLL_OUTX0

IR_IN

IR_OUT

PWM

(GPIO)

VPP

SC1_DA

SC1_CMDVCC

DTR0

VCXO_CLOCK

RX1

TX1

BOOT <0:3>

ITU_OUT

ITU_CLOCK

PIO <16:27>

PIO <0:15>

17 0V

0V RX_ZAP FG22 FG21

3V3 TX_ZAP

FG23 FG20

3G41

7G00-5

PNX8314HS

MIU_DATA(0)

MIU_DATA(1)

MIU_DATA(2)

MIU_DATA(3)

MIU_DATA(4)

MIU_DATA(5)

MIU_DATA(6)

MIU_DATA(7)

MIU_DATA(8)

MIU_DATA(9)

MIU_DATA(10)

MIU_DATA(11)

MIU_DATA(12)

MIU_DATA(13)

MIU_DATA(14)

MIU_DATA(15)

3G57-1

3G57-3

3G58-1

3G58-3

3G56-1

3G56-3

3G59-1

3G59-3

3G57-2

3G57-4

3G58-2

3G58-4

3G56-2

3G56-4

3G59-2

3G59-4

MIU_RDY

NOR_CS

STV_CS

MIU_OEN

MIU_WEN

3G60

33R

56 0V

3V3 109

3V3 74

3V3 73

3G61

3V3

33R

3V3

3G62

33R

108

106

MIU_DATA

(MIU)

MIU_ADDR

MIU_RDY

MIU_CS_N0

MIU_CS_N1

MIU_CS_N2

MIU_CS_N3

MIU_MASK1

MIU_OE_N

MIU_LBA

MIU_WEN

MIU_BAA

MIU_MASK0

MIU_CLK

100

101

102

103

104

105

107

110

3V3

10K

176

177

178

179

3V3

FG28

FG24

3G30

PIO19|ITU_OUT0|BOOT0

FG25

PIO20|ITU_OUT1|BOOT1

3G28

3G31

PIO21|ITU_OUT2|BOOT2

FG27

3G36

PIO22|ITU_OUT3|BOOT3 3G29

180

3G37

181 3V2

FG29

182

FG30

183

184

RES

3G51

10K

DSW_I2C_enable

3G54 10K

3G55

RES

10K

+3V3

10K

RES

+3V3

10K

RES

+3V3

IBO_IRQ

+3V3

MIU_ADDR(0)

MIU_ADDR(1)

MIU_ADDR(2)

MIU_ADDR(3)

MIU_ADDR(4)

MIU_ADDR(5)

MIU_ADDR(6)

MIU_ADDR(7)

MIU_ADDR(8)

MIU_ADDR(9)

MIU_ADDR(10)

MIU_ADDR(11)

MIU_ADDR(12)

MIU_ADDR(13)

MIU_ADDR(14)

MIU_ADDR(15)

MIU_ADDR(16)

MIU_ADDR(17)

MIU_ADDR(18)

MIU_ADDR(19)

MIU_ADDR(20)

MIU_ADDR(21)

MIU_ADDR(22)

MIU_ADDR(23)

MIU_ADDR(24)

MIU_ADDR(0:24)

G_16860_005.eps

240107

7 8 9 10 11 12 13 14

3G59-2 H10

3G59-3 H10

3G59-4 H10

3G60 I11

3G61 I11

3G62 I11

3G63 F10

3G65 C2

4G01 B9

4G02 B9

4G03 B9

4G04 C8

4G05 C8

4G09 A2

4G10 A2

4G31 C4

5G01 F5

5G02 G5

5G03 C4

5G04 I6

7G00-1 F7

7G00-2 E3

7G00-3 F3

7G00-4 A12

7G00-5 G12

3G38 A4

3G40 I8

3G41 E14

3G43 H2

3G44 H2

3G46 H2

3G47 I2

3G48 C6

3G51 G13

3G54 G13

3G55 G13

3G56-1 H10

3G56-2 H10

3G56-3 H10

3G56-4 H10

3G57-1 G10

3G57-2 H10

3G57-3 G10

3G57-4 H10

3G58-1 G10

3G58-2 H10

3G58-3 G10

3G58-4 H10

3G59-1 H10

2G21 I9

2G22 H6

2G23 I6

2G24 I6

2G31 B4

2G32 C5

2G33 C5

2G34 D1

3G11 E6

3G12 E9

3G15 A4

3G16 A4

3G17 A4

3G18 A4

3G19 A4

3G20 A4

3G28 E14

3G29 F14

3G30 E14

3G31 E14

3G33 G2

3G34 G2

3G35 F2

3G36 F14

3G37 F14

1G01-1 A8

1G01-2 A9

1G03 D2

1G04 I1

2G02 G5

2G03 G6

2G04 G6

2G05 G6

2G06 H6

2G07 H6

2G08 H6

2G09 H6

2G10 H6

2G11 H6

2G12 F6

2G13 G6

2G14 G6

2G15 G6

2G16 G6

2G17 G6

2G18 G6

2G19 H9

2G20 I9

7G00-6 H4

7G00-7 D12

7G00-8 D7

7G06 C1

FG10 A7

FG11 A7

FG12 A7

FG13 A9

FG14 A7

FG15 A7

FG16 A7

FG17 H2

FG18 C6

FG19 H2

FG20 E13

FG21 E13

FG22 E13

FG23 E13

FG24 E14

FG25 E14

FG26 E9

FG27 F14

FG28 F13

FG29 F13

FG30 F13

FG31 H2

FG32 H3

FG33 H2

FG34 H3

FG35 H3

FG36 I3

FG37 C5

FG39 F6

FG40 A7

FG41 A7

FG42 C1

IG13 I8

IG14 F1

IG15 G1

IG16 G1

IG17 F11

IG18 F2

IG19 G2

IG20 G2

IG21 E6

Circuit Diagrams and PWB Layouts

SSB: DVB - Mojo Memory (Not implemented in this chassis)

1 2 3

B03E

DVB-MOJO MEMORY

LC7.1E LA 7.

5 6 7 8

+3V3

5H02

100MHz

FH08

+3V3_NOR48

MIU_ADDR(0:24)

SDRAM_ADDR(0:14)

SDRAM_ADDR(12)

SDRAM_ADDR(0)

SDRAM_ADDR(1)

SDRAM_ADDR(2)

SDRAM_ADDR(3)

SDRAM_ADDR(4)

SDRAM_ADDR(5)

SDRAM_ADDR(6)

SDRAM_ADDR(7)

SDRAM_ADDR(8)

SDRAM_ADDR(9)

SDRAM_ADDR(10)

SDRAM_ADDR(11)

SDRAM_ADDR(13)

SDRAM_ADDR(14)

SDRAM_CLK

SDRAM_CKE

SDRAM_RAS

SDRAM_CAS

SDRAM_WE

+3V3

7H00

M29W320ET70N

MIU_DATA(0:15)

5H01

100MHz

FH07

7H02

EDS1216AGTA

1 14 27

VDD

SYNC

SDRAM

4x2Mx16

9 43

VDDQ

1V5

3V3

CLK

CKE

RAS

CAS

VSS

28 41 54 6

VSSQ

12 46

DQM

1V3

1V2

1V4

1V3

1V4

1V3

0V7

1V2

3V3

2V2

SDRAM_DATA(0:15)

SDRAM_DATA(0)

SDRAM_DATA(1)

SDRAM_DATA(2)

SDRAM_DATA(3)

SDRAM_DATA(4)

SDRAM_DATA(5)

SDRAM_DATA(6)

SDRAM_DATA(7)

SDRAM_DATA(8)

SDRAM_DATA(9)

SDRAM_DATA(10)

SDRAM_DATA(11)

SDRAM_DATA(12)

SDRAM_DATA(13)

SDRAM_DATA(14)

SDRAM_DATA(15)

SDRAM_DQM0

SDRAM_DQM1

MIU_ADDR(1)

MIU_ADDR(2)

MIU_ADDR(3)

MIU_ADDR(4)

MIU_ADDR(5)

MIU_ADDR(6)

MIU_ADDR(7)

MIU_ADDR(8)

MIU_ADDR(9)

MIU_ADDR(10)

MIU_ADDR(11)

MIU_ADDR(12)

MIU_ADDR(13)

MIU_ADDR(14)

MIU_ADDR(15)

MIU_ADDR(16)

MIU_ADDR(17)

MIU_ADDR(18)

MIU_ADDR(19)

MIU_ADDR(20) 4H02

MIU_ADDR(22)

MIU_ADDR(21)

+3V3_NOR48

3H00

MIU_ADDR(20)

4H03

RES

3K3

4H01

RES

NOR_RYBY

RESET_n

MIU_WEN

MIU_OEN

NOR_CS

4H04

4H00

IH04

FH05

FH01

FH06

+3V3_NOR48

3H14 5H03 FH03

+5V_SW

1R0

I2C ADDRESS:A0

100MHz

7H03

M24C64-WMN6

(8Kx8)

EEPROM

ADR

2H14

220n

SCL

SDA

3V2

EPROM

4Mx8/2Mx16

32M-1

2/4/8MB

NOR

FLASH

A-1

BYTE

VPP/WP_

27 46

2H15

220n

MIU_DATA(0)

MIU_DATA(1)

MIU_DATA(2)

MIU_DATA(3)

MIU_DATA(4)

MIU_DATA(5)

MIU_DATA(6)

MIU_DATA(7)

MIU_DATA(8)

MIU_DATA(9)

MIU_DATA(10)

MIU_DATA(11)

MIU_DATA(12)

MIU_DATA(13)

MIU_DATA(14)

MIU_DATA(15)

IH07

4H05

MIU_ADDR(22)

IH06

3V2

3H05

10K

4H15

RES

+3V3_NOR48

NOR_WP

+5V_SW

4V6

FH00

4V6

FH04

FH02

4H12

3H10

100R

3H09

100R user_EEPROM_WP

I2C_LOCAL_SCL

I2C_LOCAL_SDA

B03E

3H09 E7

3H10 E7

3H11 E7

3H12 E7

3H13 E7

3H14 D5

4H00 C5

4H01 C5

4H02 C5

4H03 C5

4H04 C5

4H05 C7

4H12 E7

4H15 C7

5H01 B1

2H03 C2

2H04 A7

2H06 B1

2H07 A6

2H08 C2

2H09 C2

2H10 C2

2H11 C2

2H12 C2

2H13 C2

2H14 D6

2H15 D6

3H00 C4

3H05 C7

5H02 A6

5H03 D5

7H00 A6

7H02 C1

7H03 D5

FH00 E7

FH01 D5

FH02 E7

FH03 D6

FH04 E7

FH05 D5

FH06 D5

FH07 B2

FH08 A6

IH04 C5

IH06 C7

IH07 C7

G_16860_006.eps

240107

3139 123 6261.1

1 2 3 4 5 6 7 8

Circuit Diagrams and PWB Layouts LC7.1E LA

SSB: DVB - Mojo Analog Back End (Not implemented in this chassis)

1 2 3 4

B03F

DVB-MOJO ANALOG BACK END

C_CVBS IJ63

G|Y

B|Pb

R|Pr

3139 123 6261.1

IJ64

IJ65

IJ66

RES

2J71

22p

5J55

3u3

RES

2J68

22p

5J54

3u3

RES

2J60

22p

5J52

3u3

2J64

22p

5J53

3u3

3 4

FJ22

FJ23

FJ26

FJ27

IBO_CVBS_IN

IBO_G_IN

IBO_B_IN

IBO_R_IN

+3V3_MOJO

+1V8S_SW

5J01

60R

3J03

100R

1V8

IJ01

3J02

12K

7J05

PDTC114ET

IJ02

1V2

4J14

UART CON FOR COMPAIR ONLY

1J14

S3B-PH-SM4-TB

FJ24

4 5

FJ25

3J14 100R

IJ67

3J15

RES

100R

IJ68

RES

4J15

RES

2J15

330p

RES

IJ11

+3V3_MOJO

2J14

330p

RES

7J04

SI2301BDS

FJ01

TXD0

RXD0

B03F

+3V3

+3V3clean

G_16860_007.eps

240107

6J14 D7

6J15 D8

6J60 B3

6J61 C3

6J62 D3

6J63 E3

7J04 B9

7J05 B7

FJ01 B9

FJ02 D6

FJ22 A4

FJ23 C4

FJ24 D8

FJ25 D8

3J61 C2

3J62 C3

3J63 D2

3J64 D3

3J65 E2

3J66 E3

4J14 D8

4J15 D8

5J01 A6

5J52 A2

5J53 C2

5J54 D2

5J55 E2

6J03 C7

FJ26 D4

FJ27 E4

IJ01 B7

IJ02 B8

IJ11 A8

IJ63 B1

IJ64 C1

IJ65 C1

2J64 C2

2J66 C2

2J67 C3

2J68 D2

2J69 D2

2J70 D3

2J71 E2

2J72 E2

2J73 E2

3J01 B8

3J02 B8

3J03 B6

3J14 D8

3J15 D8

3J59 B2

3J60 B3

1001 D7

1002 D7

1J14 D6

2J01 B7

2J02 B7

2J04 B8

2J05 C8

2J06 C9

2J14 D8

2J15 D8

2J60 A2

2J62 B3

2J63 B2

IJ66 C1

IJ67 D8

IJ68 D8

Circuit Diagrams and PWB Layouts LC7.1E LA 7.

SSB: Micro Processor

1 2

B04A

IIC_SDA_up

IIC_SCL_up

MICROPROCESSOR

CPU_RST

F330

7312

BD45275G

VDD

VOUT ER

SUB

GND

MUTEn

3300

CTRL_DISP1_up

CTRL_DISP4_up

BL_ON_OFF

ANTI_PLOP

HDMI_INT

ESD_INT

POWER_DOWN

7317

BC847BW

3394

22K

+3V3_STBY

7308

BC847BW

1K2

I353

I330

I332

I334

I337

I339

I399

I380

3V3

+3V3_SW

RES

0V8

4324

4325

F379

I393

2316

3314

3316

10K

CNVSS

F380

3318

3321

RES

3323

2317

100n

F381

+3V3_STBY

2314 15p

7311

M30300SAGP

1V5

VCC

OUT

XTAL

15p 1V5

10K I312 6

BYTE

Φ AVCC

100R

1K0

I387 7

CNVSS

100R

RESET

VREF

AD(0:7)

AD(0)

AD(1)

AD(2)

AD(3)

AD(4)

AD(5)

AD(6)

AD(7)

DATA

P10<0:7>

KI<0:3>

TBIN<0:4>

3364

3338

3339

3340

3341

3342

100R

I352

I331

I333

I335

I338

F385

F361

P0<0:7>

AN0<0:7>

DATA

CLK3

SIN3

SOUT3

DA0

DA1

CLK4

ANEX0

SOUT4

ANEX1

SIN4

ADTRG

P9<0:7>

3L04

1K5

+12V_DISP

6318

PDZ6.2-B

A(0:7)

A(0)

A(1)

A(2)

A(3)

A(4)

A(5)

A(6)

A(7)

P1<0:7>

INT<3:5>

ADDR

TA4OUT

TA4IN

INT 1

NMI

XCOUT

XCIN

P8<0:7>

+3V3_STBY

D<0:7>

DC_PROT

7323-2

ALE_EMU

3L15

330R

7323-1

NL27WZ08USG

RES

4323

+3V3_STBY

NL27WZ08USG

3398

100K

I394

+3V3_STBY

3381

3384

3372

3385

3386

3375

3V2

7316

BC847BW

22R

4K7

47K

100R

4K7

A(8:19)

3V3

A(8)

A(9)

A(10)

A(11)

A(12)

A(13)

A(14)

A(15)

A(16)

A(17)

A(18)

A(19)

I365

I368

I384

D<0:7>

A<0:7>

AN2<0:7>

P2<0:7>

ADDR

TA0OUT

TXD2

SDA2

TB5IN

TA0IN

RXD2

SCL2

TA1OUT

CLK2

P3<0:7>

WRL

WRH

BHE

BCLK

HLDA

HOLD

ALE

RDY

CLKOUT

P5<0:7>

VSS

CTS2

RTS2

TA2OUT

TA2IN

TA3OUT

ADDR

P4<0:7>

TA3IN

P7<0:7>

CTS0

RTS0

CLK0

SCL1

RXD0

TXD0

SDA0

CTS0

CTS1

RTS1

CLKS1

CLK1

SCL1

RXD1

TXD1

SDA1

P6<0:7>

AVSS

3343

3345

100R

100R F343

F342

COMPAIR

1314

F344

S3B-PH-SM4-TB

I313

I314

I315

I317

I395

F362

I320

RES

I311

RES

3313

3315

3317

3320

3322

3303

3L05

3324

3327

3329

330R

100R

330R

100R

330R

10K

100R

F323

F302

+3V3_STBY

+5V_STANDBY

100

F386

I326

I357

3380

3368

I389

IBO_RESET

I364

I336

100R F304

I390

100R

RES

I362

3376

RES

3362

10K

I341

I342

I344

I345

I396

I397

I398

RES 3L26

RES

3344

3346

3347

3348

3349

3350

3397

3387

3388

100R

10K

47R

10K

47K

100R

I388

RES

3304

+3V3_STBY

1K5

I367

+3V3_SW

+3V3_STBY

27 I366

+3V3_STBY

3377 3K3

25 I351 3361

I354

I359

RES FOR PSU_STBY

+3V3_SW

RES 3367

3365

10K

100R

RES

3360

3369

3370

F305

100R

4301

SDM

3366

I363

+3V3_STBY

RES 3371

3373

100R

10K

100R

10K

100R

10K

+3V3_STBY

F370

F303

RES

I382 3L02 100R

F309

3L01

RES

4313

PANEL

4K7

I383

I369

I370

4308

BOOT LOADER

3L08

3L09

100R

I391

I392

3378

SAW_SW

RES

7314

BC847BW

3 RES

RES

3358

3359

2324

3307

I349

RES FOR BDS

3356

3L12

3352

3K3

100R

RES

2322 100p

4K7

+3V3_SW

+5V_SW

22u

BACKLIGHT_BOOST

DVB_SW

RST

+3V3_STBY

+3V3_SW

BOLT_ON_SCL

I347

3354

+3V3_STBY

RES FOR BDS 3L13

3351

100R

RES 2321

+3V3_STBY

1311

5 4

100R

F350

3K3

100p

RES

2325

100p

+3V3_STBY

+3V3_SW

IIC_SCL_up

BOLT_ON_SDA

F357

EMC

2327

10n

1312

B10B-PH-SM4-TBT(LF)

ITV_Connector A:

F346

F347

F349

+5V_STANDBY

F348

F353

F351

F352

F354

BOLT_ON_SCL

BOLT_ON_SDA

ITV_SPI_DATA_IN

ITV_SPI_CLK

REMOTE

CPU_RST

STANDBY

SC1_CVBS_RF_OUT

Item

1 3 0 4

1 3 1 2

3 3 5 6

3 3 7 0

3 L 0 8

3 L 0 9

3 L 1 0

3 L 1 2

3 L 1 3

4 L 0 9

1 3 1 5

1 M 2 0

2 3 2 1

2 3 2 2

3 3 2 0

3 3 2 2

3 3 5 1

3 3 5 2

3 3 5 4

3396

7322

PDTC114ET

3382

3379

Description

C O N V 1 1 P M 2 .

0 0 P H B

C O N V 1 0 P M 2 .

0 0 S M P H R

C O N V 6 P M 2 .

0 0 P H B

C O N V 7 P M 2 .

0 0 P H B

C E R 1 0 6 0 3 N P 0 5 0 V 2 2 P C O L

R S T S M 0 6 0 3 1 0 0 R P M 5 C O L

R S T S M 0 6 0 3 3 K 3 P M 5 C O L

R S T S M 0 6 0 3 1 0 0 R P M 5 C O L

R S T S M F U S E 1 2 0 6 1 R P M 5 R

R S T S M 0 6 0 3 1 0 K P M 5 C O L

R S T S M 0 6 0 3 J U M P .

0 R 0 5 C O L

LED1

KEYB

LIGHT_SENSOR

SC1_STATUS

SC2_STATUS

HDMI_HOTPLUG_RESET

RST_AUD

LED2

ESD_RST

1304

B11B-PH-K

3L11 100R

FOR DVB ONLY

100R

3K3

1K0

1M20

F356

B7B-PH-K

RST_H

+5V_STANDBY

STANDBY

STANDBYn

RESET_n

E_PAGE

LCD_PWR_ON

ISP

WAGC_SW

BL_ADJUST

DDC_RESET

REMOTE

INT

IBO_IRQ

ITV_SPI_CLK

ITV_SPI_DATA_IN

IIC_SDA_up

100p

CPU_RST

+3V3_STBY

F360

FRONT_Y_CVBS_IN

FL20

FL21

FRONT_C_IN

FL22

L_FRONT_IN

FL23

FL24

FL25

FL26

R_FRONT_IN

I318

BOLT_ON_SDA

BOLT_ON_SCL

HEAD_PH_L

HEAD_PH_R

RES +12V_DISP

7313-2

BC847BPN

I323

I321

I328

3330

10K

I322

3328

47K

6302

1N4148

ISP

3337

100R

7313-1

BC847BPN

I329

+3V3_STBY

F382

I373

F383

F384

F387

RES

4L20

3L20

4L21

3L21

RES

4L24

3L24

4L25

3L25

RES

4314

4315

3L22

3L23

3389

5304

3390

3391

RES

3392

100R

33R

IL20

IL22

33R

2L24

2L25

I374

SIDE_AUDIO_IN_L_CON

220n

IL21

220n

IL23

SIDE_AUDIO_IN_R_CON

FOR EMC

FRONT_Y_CVBS_IN_T

FRONT_C_IN_T

HP_LOUT

HP_ROUT

7310

M29W800DT-70N6

A(1:7)

A(8:19)

A(1)

A(2)

A(3)

A(4)

A(5)

A(6)

A(7)

A(8)

A(9)

A(10)

A(11)

A(12)

A(13)

A(14)

A(15)

A(16)

RES

3326

A(17)

A(18)

A(19)

100R

F340

F341

F366

F367

F369

F310

F311

F313

F315

F317

F319

F321

F324

F326

F328

F329

F331

F332

F333

F334

F335

F336

F338

F339

BYTE

EPROM

1Mx8/512Kx16

8M-1

A-1

+3V3_STBY

7315

M24C64-WMN6

(8Kx8)

EEPROM

F364

3355

SCL

F363

ADR

F365

3357

SDA

3V3

F345

100R

RES

4306

7320

BSH111

+5V_STANDBY +3V3_STBY

47R

220R

47R

I376

+3V3_SW

RES

4307

7321

BSH111

3V2

F368

B04A

F312

F314

F316

F318

F320

F322

F325

F327

F337

E_PAGE

IIC_SCL

IIC_SDA

+3V3_SW

IIC_SDA

IIC_SCL

KEYB

LED1

LED2

REMOTE

LIGHT_SENSOR

5302

+3V3_STBY

60R

AD(0:7)

AD(0)

AD(1)

AD(2)

AD(3)

AD(4)

AD(5)

AD(6)

AD(7)

A(0)

3139 123 6261.1

1 2

TO / FROM IR/ LED & KEYBOARD

G_16860_008.eps

250107

2319 E11

2320 F9

2321 G7

2322 G7

2323 G1

2324 F7

2325 F8

2326 E8

2327 H9

2328 I10

2329 I10

2330 I10

2331 I10

2332 I12

2333 I10

2334 I11

2335 I11

2336 I11

2337 I12

2338 E2

2339 I12

2340 I10

2L20 A10

2L21 A10

2L22 A11

1301 B3

1302 I2

1303 I2

1304 A9

1305 I9

1306 H8

1307 I8

1308 I8

1309 I8

1310 I9

1311 H7

1312 H5

1314 I3

1M20 H8

2310 A4

2311 C13

2312 A4

2313 A4

2314 B3

2315 B1

2316 B3

2317 B2

2318 C3

2L23 A11

2L24 A12

2L25 A12

2L26 B10

2L27 B10

2L28 B11

2L29 B11

2L30 B10

2L31 B10

2L32 B11

2L33 B11

3300 C1

3303 B5

3304 D6

3305 G12

3306 F7

3307 G7

3308 G12

3309 G12

3310 B6

3311 B5

3312 B5

3313 B5

3314 B3

3315 B5

3316 B2

3317 B5

3318 B3

3319 B2

3320 B5

3321 B3

3322 B5

3323 B3

3324 C5

3325 C1

3326 D11

3327 C5

3352 G7

3353 F11

3354 G7

3355 G11

3356 G7

3357 G11

3358 F7

3359 F7

3360 G5

3361 F5

3362 C6

3363 D2

3364 D3

3365 F5

3366 F5

3367 F5

3368 C5

3369 G5

3370 G5

3371 G5

3372 H2

3373 G5

3374 G13

3375 H2

3328 D10

3329 C5

3330 D10

3331 C2

3332 D2

3333 C1

3334 C2

3335 C2

3336 E11

3337 E9

3338 D3

3339 D3

3340 D3

3341 D3

3342 D3

3343 I1

3344 D5

3345 I1

3346 D5

3347 D5

3348 D5

3349 E5

3350 E5

3351 G7

6306 I2

6307 I2

6308 H8

6309 I8

6310 I8

6311 I9

6312 I9

6313 I9

6317 D1

6318 E2

7308 E1

7310 C12

7311 B3

7312 B1

7313-1 D9

7313-2 C10

7314 F6

7315 F10

7316 F2

7317 E1

7320 H11

7321 H12

7322 C7

7323-1 G1

7323-2 F1

F302 C6

F303 G6

F304 C6

F305 F5

F309 H5

F310 C11

F311 C11

F312 C13

F313 C11

F314 C13

F315 C11

F316 C13

F317 C11

F318 C13

F319 C11

F320 C13

F321 C11

F322 C13

F323 B6

F324 D11

F325 D13

F326 D11

F327 D13

F328 D11

F329 D11

F330 B1

F331 D11

F332 D11

F333 D11

F334 D11

F335 D11

F336 D11

F337 D13

F338 D11

F339 D11

F340 D11

3399 E2

3L01 G6

3L02 H5

3L04 E2

3L05 B5

3L06 H6

3L07 H7

3L08 H5

3L09 H5

3L10 H11

3L11 C7

3L12 G7

3L13 G7

3L14 G9

3L15 F1

3L20 A11

3L21 A11

3L22 B11

3L23 B11

3L24 A11

3L25 A11

3L26 D5

4301 F6

4302 H11

3376 D6

3377 E7

3378 F7

3379 E7

3380 D5

3381 G2

3382 E7

3383 F2

3384 H2

3385 H2

3386 H2

3387 E5

3388 E5

3389 I11

3390 I11

3391 I11

3392 I11

3393 E1

3394 D1

3395 E2

3396 C7

3397 E5

3398 E2

4303 H12

4306 G12

4307 G12

4308 H5

4309 I12

4310 I11

4313 H6

4314 H11

4315 H11

4316 G9

4323 F1

4324 D2

4325 D2

4L20 A11

4L21 A11

4L24 A11

4L25 A11

5301 A4

5302 C13

5304 I11

6301 B2

6302 D10

6303 E10

6304 E10

6305 F9

I349 G6

I351 F5

I352 D3

I353 D1

I354 F5

I357 C5

I359 G5

I362 D6

I363 G5

I364 D5

I365 G3

I366 E6

I367 E6

I368 G3

I369 H5

I370 H5

I373 I10

I374 I11

I376 I12

I380 E1

I382 G5

I383 H5

I384 H3

I387 B3

I388 D6

I389 C5

I390 C6

I391 H6

I392 H6

I393 E2

I394 E2

I395 B5

I396 E5

I397 E5

I398 E5

I399 D1

IL20 A11

IL21 A12

IL22 A11

IL23 A12

I333 D3

I334 D1

I335 D3

I336 D5

I337 D1

I338 D3

I339 D1

I341 D5

I342 D5

I344 D5

I345 E5

I347 G6

I315 B5

I317 B5

I318 G9

I320 C5

I321 D10

I322 D10

I323 D10

I326 C5

I328 D10

I329 E9

I330 D1

I331 D3

I332 D1

F367 E11

F368 C13

F369 E11

F370 G6

F379 D2

F380 B3

F381 B3

F382 I10

F383 I10

F384 I10

F385 D3

F386 C5

F387 I10

FL20 A9

FL21 A9

FL22 A9

FL23 A9

FL24 A9

FL25 A9

FL26 A9

I311 B5

I312 B3

I313 B5

I314 B5

F341 E11

F342 I2

F343 I2

F344 I3

F345 G10

F346 H5

F347 I5

F348 I5

F349 I5

F350 F8

F351 I5

F352 I5

F353 I5

F354 I5

F356 E8

F357 H8

F360 I9

F361 D3

F362 C5

F363 G11

F364 G11

F365 G11

F366 E11

Circuit Diagrams and PWB Layouts LC7.1E LA 7.

SSB: Video Processor

1 2 3

3139 123 6261.1

1 2

4 5 6 7 8 9 10 11 12 13 14 15 16

B04B

VIDEO PROCESSOR

7213-1

74LVC04APW

I265

7214

BC847BW

3275

560R

+3V3_SW

5219 I245

CX_AVDD3_BG_ASS

60R

2284

10u

5223

60R

+3V3_SW

5210

+3V3_SW

5218 I242

60R

CX_AVDD3_ADC1

2280

10u

+1V8S_SW

3244

22R

ESD_RST

3273

10K

I266

7213-2

74LVC04APW

7213-3

74LVC04APW

3276

560R

I267

7213-4

74LVC04APW

ESD_INT

CX_AVDD3_OUTBUF

I250

2289

10u

60R

5221

60R

I210

I248

CX_AVDD3_ADC2

2288

10u

3248

22R

5224

60R

RES

2205

1215

5226

60R 7213-5

74LVC04APW

11 10

+3V3_SW

5214 60R F231

7213-6

74LVC04APW

13 12

RES

30R

I214

+1V8S_SW

5216

IIC_SCL

IIC_SDA

INT

RST_H

FRONT_C

+3V3_SW

VGA_H

3250

22R

3212

I255

100R

3215

I256

100R

FRONT_Y_CVBS

FOR NON

SIDE IO

RES

4208

HD_Y_IN

SC1_G_IN

FRONT_Y_CVBS_IN_T

IBO_G_IN

HD_PR_IN

SC1_R_IN

SC2_Y_CVBS_IN

IBO_R_IN

HD_PB_IN

SC1_B_IN

SC1_CVBS_IN

IBO_B_IN

HDMI_H

HDMI_V

HDMI_VCLK

HDMI_DE

FRONT_C_IN_T

ALE_EMU

CVBS_RF

+5V_SW

FOR NON SIDE IO

RES

4209

7211-1

74LCX14T

7211-2

74LCX14T

+3V3_SW

HDMI_Y(0:7)

HDMI_Cb(0:7)

HDMI_Cr(0:7)

A(0:7)

AD(0:7)

3251

22R

3253

22R

2246 20p

A(0)

A(1)

A(2)

A(3)

A(4)

A(5)

A(6)

A(7)

HDMI_Y(0)

HDMI_Y(1)

HDMI_Y(2)

HDMI_Y(3)

HDMI_Y(4)

HDMI_Y(5)

HDMI_Y(6)

HDMI_Y(7)

HDMI_Cb(0)

HDMI_Cb(1)

HDMI_Cb(2)

HDMI_Cb(3)

HDMI_Cb(4)

HDMI_Cb(5)

HDMI_Cb(6)

HDMI_Cb(7)

HDMI_Cr(0)

HDMI_Cr(1)

HDMI_Cr(2)

HDMI_Cr(3)

HDMI_Cr(4)

HDMI_Cr(5)

HDMI_Cr(6)

HDMI_Cr(7)

2247

2250

2251

2252

2253

2254

2255

2256

2257

2258

2259

2260

2261

2273

2275

2276

2277

20p

3201-1

3201-2

3201-3

3201-4

3202-1

3202-2

3202-3

3202-4 4

AD(0) 3203-4 4

AD(1)

AD(2)

AD(3)

AD(4)

AD(5)

AD(6)

AD(7)

3203-3 3

3203-2

3203-1

3204-4 4

3204-3 3

3204-2

3204-1

100n

F232

2n7

I230

I231

I232

I233

100n

8 100R

7 100R

6 100R

100R

5 100R

5 220R

220R

5 220R

6 220R

220R

I238

I257

I258

I239

7202

SVP CX32

ADDR

158

159

A_D

ALE

AIN_HS

AIN_VS

169

CVBS1

207

PLF2

MLF1

192

157

TESTMODE

VDDC

2209

VDDH

205

204

XTAL

WR_

RD_

SCL

SDA

INTN

RESET

GPIO

190

191

196

197

198

199

180

181

182

183

188

189

Y_G

PC_G

2 PR_R

PC_R

2 PB_B

PC_B

DP_HS

DP_VS

DP_CLK

DP_DE_FLD

VIDEO PROCESSOR

3245

3246

3247

3250

3253

3235

3238

3241

3242

3243

3254

3256

3257

3258

4204

4205

4206

2210

2248

2267

2294

3213

3216

3217

3227

3233

4208

4209

5215

5217

6202

7203

7206

7208

7210

7211

Item

1217

1218

2207

2208

VSSC VSSH

3239

100R

PC_VGA_H

2294

7211-3

74LCX14T

100n

VGA_V

3254

22R

5 6

3255

22R

PC_VGA_V

VDDM

VSSM AVSS_ADC

I268

1 2

PAVDD

Description

FIL CM SM 50V 100MHZ 67R R

CER2 0603 X7R 16V 100N COL

ELCAP SM SEV 25V 100U PM20 R

ELCAP SM 16V 100U PM20 COL R

ELCAP SM SEV 25V 100U PM20 R

ELCAP SM 16V 100U PM20 COL R

CER2 0603 X7R 16V 100N COL

CER2 0805 X7R 16V 1U PM10 R

CER2 0603 X7R 16V 100N COL

RST SM 0603 47K PM5 COL

RST SM 0603 47R PM5 COL

RST SM 0603 47K PM5 COL

RST SM 0603 100R PM5 COL

RST SM 0603 220R PM5 COL

RST SM 0603 4K7 PM5 COL

RST SM 0603 100R PM5 COL

RST SM 0603 10K PM5 COL

RST SM 0603 100R PM5 COL

RST SM 0603 22R PM5 COL

RST SM 0603 10K PM5 COL

RST SM 0603 JUMP. 0R05 COL

IND FXD 0805 EMI 100MHZ 220R R

DIO REG SM BZX384-C5V6 COL R

TRA SIG SM BC847BW (COL) R

TRA SIG SM PDTC114ET (COL) R

E3(VISH)R

IC SM 74LCX14T (COL) R

PAVSS

1 2

7211-4

74LCX14T

RES

FOR ITV ONLY

I264

3256

22R

7211-5

74LCX14T

11 10

7211-6

74LCX14T

13 12

DLW21S

CX_PAVDD

RES

2206

1216

I243

2279

10u

I247

+1V8S_SW

CX_PAVDD1 5220

60R

I246

2282

10u

CX_AVDD_ADC1

CX_PAVDD2 5222

60R

I249 CX_AVDD_ADC2

2286

10u

2287

10u

I251 CX_PDVDD 5225

60R

I252 CX_AVDD_ADC3

2290

10u

2291

10u

I254

CX_PAVDD 5227

60R

I253 CX_AVDD_ADC4

2292

10u

2293

10u

+5V_STANDBY

DLW21S

CX_PDVDD

2245

100n

I271

I263

3245

10K

I244

2298

100n

F211 5213

60R

+3V3_SW

CVBS_OUT

163

162

155

154

153

107

106

105

104

103

102

101

100

144

143

142

141

140

139

138

152

151

150

149

148

145

DQM

115

114

113

125

126

124

123

122

121

118

117

116

156

133

109

TA1

TB1

TC1

TD1

TCLK1

I217

I218

SC1_RF_OUT_CVBS

SC2_CVBS_MON_OUT

DQ(15)

DQ(14)

DQ(13)

DQ(12)

DQ(11)

DQ(10)

DQ(9)

DQ(8)

DQ(7)

DQ(6)

DQ(5)

DQ(4)

DQ(3)

DQ(2)

DQ(1)

DQ(0)

DQ(23)

DQ(22)

DQ(21)

DQ(20)

DQ(19)

DQ(18)

DQ(17)

DQ(16)

DQ(31)

DQ(30)

DQ(29)

DQ(28)

DQ(27)

DQ(26)

DQ(25)

DQ(24)

CX_MA(0)

CX_MA(1)

CX_MA(2)

CX_MA(3)

CX_MA(4)

CX_MA(5)

CX_MA(6)

CX_MA(7)

CX_MA(8)

CX_MA(9)

CX_MA(10)

CX_MA(11)

DQ(0:31)

CX_MA(0:11)

CX_DQM(0)

CX_DQM(1)

CX_DQM(3)

CX_DQM(2)

173

172

171

170

N_1

VREF

P_1

N_2

P_2

175

174

185

184

128

127

2267

2268

CS0_

RAS_

CAS_

WE_

MCK

CLKE

PWM0

129

130

131

132

111

112

100n

CX_BA0

CX_BA1

CX_CS0#

CX_RAS#

CX_CAS#

CX_WE#

CX_MCLK

CX_CLKE

+3V3_SW

CX_DQM(0:3)

TXAn

TXAp

TXBn

TXBp

TXCn

TXCp

TXDn

TXDp

TXCLKn

TXCLKp

SC1_FBL_IN

IBO_CVBS_IN

SC2_C_IN

FOR LCD ONLY

I240

3242

4K7

7206

BC847BW

3241

220R

BL_ADJUST

3243

100R

I241

RES

2278

22u

7203

BC847BW

RES

2281

10u

RES

4207

DQ(0:31)

DQ(8)

DQ(9)

DQ(10)

DQ(11)

DQ(12)

DQ(13)

DQ(14)

DQ(15)

DQ(0)

DQ(1)

DQ(2)

DQ(3)

DQ(4)

DQ(5)

DQ(6)

DQ(7)

I213

7204

IS42S16400D-6TL

VDDQ

DRAM

1M X 16 X 4

VDD

1M-1

3260-1

3260-2

3260-3 3

3260-4 4

29 3261-1

30 3261-2

3261-3

3261-4

3262-1

3262-2

3262-4

3262-3 3

CX_DQM(1)

CX_DQM(0)

DQM

VSSQ VSS

CLK

CKE

RAS

CAS

3266

3268-2

3268-4 4

3271-1 1

3271-3 3

22R

CX_BA0

CX_BA1

22R

CX_MCLK

CX_CLKE

CX_CS0#

CX_RAS#

CX_CAS#

CX_WE#

+3V3_SW

CX_MA(0)

CX_MA(1)

CX_MA(2)

CX_MA(3)

CX_MA(4)

CX_MA(5)

CX_MA(6)

CX_MA(7)

CX_MA(8)

CX_MA(9)

CX_MA(10)

CX_MA(11)

7210

SI4835BDY

I216

I211

3213

47K

6202

BZX384-C5V6

3216

47R

I220

2248

1u0 I224

VDISP-SWITCH

7208

PDTC114ET

3V2

RES

7207

SI3441BDV

3217

47K

I225

+3V3_SW

B04B

5211 RES

220R

5215 F210

220R

5217

12V1

220R

VDISP

6201

3210

1K0

RES

I215 SML-310

RES

LCD

I261

I262

DQ(24)

DQ(25)

DQ(26)

DQ(27)

DQ(28)

DQ(29)

DQ(30)

DQ(31)

DQ(16)

DQ(17)

DQ(18)

DQ(19)

DQ(20)

DQ(21)

DQ(22)

DQ(23)

2271

100n

I259

I260

2274

100n

7205

IS42S16400D-6TL

CX_DQM(3)

CX_DQM(2)

2266

100n

2270

100n

40 NC

DQM

VSSQ

VDDQ

DRAM

1M X 16 X 4

VDD

1M-1

23 3263-1 1

3263-2

3263-3 3

3263-4

3264-1

3264-2 2

3264-3 3

3264-4 4

3265-1

3265-2

3265-4 4

3265-3 3

TXAn

TXAp

TXBn

TXBp

TXCn

TXCp

TXCLKn

TXCLKp

TXDn

TXDp

VSS

22R

CX_MA(0)

CX_MA(1)

CX_MA(2)

CX_MA(3)

CX_MA(4)

CX_MA(5)

CX_MA(6)

CX_MA(7)

CX_MA(8)

CX_MA(9)

CX_MA(10)

CX_MA(11)

CTRL_DISP1_up

LCD_PWR_ON

STANDBYn

CTRL_DISP4_up

I236

3227

100R

3233

100R

3238

100R

3235

100R

F212

CTRL_DISP1

F213

CTRL_DISP2

F214

CTRL_DISP3

F215

CTRL_DISP4

CLK

CKE

RAS

CAS

3267

3268-1

3268-3

3271-2

3271-4 4

TXAn1

TXAp1

TXBn1

TXBp1

TXCn1

TXCp1

TXCLKn1

TXCLKp1

TXDn1

TXDp1

CX_BA0

CX_BA1

22R

CX_MCLK

CX_CLKE

CX_CS0#

CX_RAS#

CX_CAS#

CX_WE#

LGE SDI FHP

PDP

CTRL-DISP1

RESET

Semi standby : H

Normal and off : L

CTRL_DISP1

CTRL_DISP2

CTRL_DISP3

CTRL_DISP4

BOLT_ON_SCL

BOLT_ON_SDA

CTRL-DISP2(LCD_PWR_on)

DISPEN

On time : H

Off time : Don’t care

CTRL-DISP3(Rev_Standby)

CTRL-DISP4

CPU-GO

On time : H

Off time : Don’t care

PDWIN

On time : H

Off time : Don’t care

PDP-GO

On time : H

Semi standby : L

Off time : Don’t care

3246

3247

F219

F220

F221

F222

F223

F224

F225

F226

F227

F228

100R

VDISP

F230

F218

RES

1G50

DISPLAY CONTROL

LVDS

CONNECTOR

1G51

F217

FOR LCD ONLY 0-1453230-3

G_16860_009.eps

250107

4208 E2

4209 I2

4210 L6

4211 L7

4212 L7

4213 L8

4214 B16

4215 B16

5210 B4

5211 A16

5212 A14

5213 C9

5214 C4

5215 A16

5216 C3

5217 B16

5218 A6

5219 A4

5220 A8

5221 B6

5222 B8

5223 B4

5224 B7

5225 B8

5226 C7

5227 C8

5228 D13

6201 C17

6202 C15

7202 D4

7203 L9

7204 B11

7205 E11

7206 K9

7207 B16

7208 C15

7210 A15

7211-1 J2

7211-2 K2

7211-3 K2

7211-4 L2

7211-5 L4

7211-6 L5

3260-2 B12

3260-3 B12

3260-4 B12

3261-1 B12

3261-2 B12

3261-3 B12

3261-4 B12

3262-1 B12

3262-2 B12

3262-3 C12

3262-4 C12

3263-1 E12

3263-2 E12

3263-3 E12

3263-4 E12

3264-1 E12

3264-2 E12

3264-3 E12

3264-4 E12

3265-1 E12

3265-2 E12

3265-3 F12

3241 K9

3242 K9

3243 K9

3244 A7

3245 K8

3246 J14

3247 J14

3248 B7

3250 J2

3251 J3

3253 K3

3254 K2

3255 K3

3256 L3

3257 J1

3258 K1

3260-1 B12

3265-4 F12

3266 C12

3267 F13

3268-1 F12

3268-2 C12

3268-3 F12

3268-4 C12

3271-1 C12

3271-2 F12

3271-3 C12

3271-4 F12

3272 J9

3273 A2

3274 B2

3275 A3

3276 B3

4203 B14

4204 B15

4205 B15

4206 B15

4207 L9

F228 J15

F229 J15

F230 J15

F231 C5

F232 E4

I210 B5

I211 A16

I213 A13

I214 C5

I215 C16

I216 B15

I217 D8

I218 E8

I220 C15

I224 C15

I225 C16

I230 E4

I231 E4

7213-1 A3

7213-2 B3

7213-3 B3

7213-4 B3

7213-5 C3

7213-6 C3

7214 A2

F210 A17

F211 C9

F212 E16

F213 E16

F214 E16

F215 E16

F217 I17

F218 I15

F219 I15

F220 I15

F221 I15

F222 I15

F223 I15

F224 I15

F225 J15

F226 J15

F227 J15

I252 B9

I253 C9

I254 C7

I255 D2

I256 D2

I257 J4

I258 J4

I259 J10

I260 J10

I261 J10

I262 J10

I263 K8

I264 L3

I265 A3

I266 A2

I267 B3

I268 K6

I269 K7

I270 K7

I271 K8

I232 E4

I233 E4

I236 E15

I238 J4

I239 K4

I240 K8

I241 K9

I242 A6

I243 A7

I244 L8

I245 A4

I246 A9

I247 B7

I248 A6

I249 B9

I250 B4

I251 B7

2256 F4

2257 F4

2258 F4

2259 F4

2260 F4

2261 F4

2262 F16

2263 F16

2264 F16

2265 F16

2266 J11

2267 I8

2268 I8

2269 J11

2270 J11

2271 J10

2272 J10

2273 J3

2274 J10

2275 J3

2276 J3

2277 J3

2278 K9

2279 A7

2280 A6

2281 L8

2282 A9

2283 K15

2284 A4

2285 K15

2286 B7

2287 B9

2288 B6

2289 B4

2290 B7

2291 B9

2292 C7

2293 C9

2294 K3

2295 E13

2296 E13

2297 E13

2298 D8

2212 C5

2213 C5

2214 C5

2215 C5

2216 D9

2217 B13

2218 B13

2219 B13

2220 B13

2221 B13

2222 B13

2223 B14

2224 E12

2225 E12

2226 E13

2227 E13

2228 E13

2229 B14

2230 C5

2231 C5

2232 C5

2233 D8

1201 D4

1210 H12

1211 I12

1212 I12

1213 J12

1214 J12

1215 L7

1216 L7

1G50 H15

1G51 H17

2205 K7

2206 K7

2207 B17

2208 B16

2209 B16

2210 B17

2211 C5

2234 D8

2235 D8

2236 D3

2237 D4

2238 D4

2239 D4

2240 D4

2241 D4

2242 D4

2243 D5

2244 D5

2245 D8

2246 D3

2247 E3

2248 C15

2250 F4

2251 F4

2252 F4

2253 F4

2254 F4

2255 F4

3220 E2

3221 E1

3222 E2

3223 E16

3224 E16

3225 E16

3226 E16

3227 E16

3228 G2

3229 G2

3230 G2

3231 G2

3232 G3

3233 E16

3235 E16

3238 E16

3239 K4

3240 K3

3201-1 I4

3201-2 I4

3201-3 I4

3201-4 I4

3202-1 I4

3202-2 I4

3202-3 I4

3202-4 I4

3203-1 I4

3203-2 I4

3203-3 I4

3203-4 I4

3204-1 J4

3204-2 J4

3204-3 J4

3204-4 J4

3210 C16

3211 D8

3212 D2

3213 C15

3215 D2

3216 C15

3217 C16

3219 E1

3 4 5 6 7 8 9 10 11 12 13 14 15 16

Circuit Diagrams and PWB Layouts LC7.1E LA 7.

SSB: PNX2015: Audio Processor

1 2 3 4 5 6 7 8

B04C

AUDIO PROCESSOR

+AUDIO_POWER_+12V_DISP

+12V_DISP

4401

4402

7410

L78L08ACU

IN OUT

COM

+5V_SW

5401

120R

+5V_D

I426

3402

1R0

2411

10u

+5V_AUD

RES

F401 +8V

F402

+5V_D

F403

5402

+5V_AUD

120R

RST_AUD

IIC_SCL

IIC_SDA

HDMI_SCK

HDMI_WS

SC1_AUDIO_IN_R

SC1_AUDIO_IN_L

SC2_AUDIO_IN_R

SC2_AUDIO_IN_L

2414

10u

MOJO_I2S_OUT_SCK

MOJO_I2S_OUT_WS

MOJO_I2S_OUT_SD

HDMI_SD

SIF

COMP_AUDIO_IN_R

COMP_AUDIO_IN_L

SIDE_AUDIO_IN_R_CON

SIDE_AUDIO_IN_R

SIDE_AUDIO_IN_L

SIDE_AUDIO_IN_L_CON

HDMI_AUDIO_IN_R

HDMI_AUDIO_IN_L

+5V_AUD

I429

I430

I432

2432

RES 3416

5403

100n

RES

3410

3411

2446

2447

RES

4409

4410

RES

56p

470R

22u

2415

3p3

2416

3p3

2419

4412

I420

100R

100p

2433

2434

2435

1411

18M432

I412

I413

7411

MSP4450P-VK-E8 000

XTALIN 2V4

XTALOUT 2V4

OUT

XTAL

A AH

DVSUP

SUP Φ

MULTISTANDARD

SOUND PROCESSOR

AUD_CL_OUT

RESETQ

STNDBYQ

TESTEN

DACM

SUB

ADR_SEL

I2C

DACA

1V4

1V6

4408

4407

I427

I428

WS CAPL

CL3

WS3

OUT

DEL I2S

DCTR_IO

SPDIF_OUT

4411 I431 7

SC1_OUT

SC2_OUT

DA_OUT

330p

I421

I422

I423

1V5 63

IN1+

IN-

IN2+

ANA

SC3_OUT

2436

2445

10u

100n

I424 2V6 56

VREFTOP

SC1_IN

SC2_IN

SC3_IN

4403

SC4_IN

4406

SC5_IN

AGNDC A

VSS

AH D

VREF

1 2

I425

3V8

0V6

0V2

6V7

6V3

2420

I414

2423

I415

2437

10u

I416

I417

I418

I419

Item

4403

4406

4407

4408

4411

2428

100p

10u 16V

+8V

10u 16V

2429

100p

3139 123 6261.1

1 2 3 4 5 6 7

2418

330p

2417

330p

2421

330p

2422

330p

2424

2425

2426

2427

2430

100p

2431

100p

10u

Description

RST SM 0603 JUMP. 0R05 COL

3417

3418

3419

3420

100R

B04C

AUDIO_LS_R

AUDIO_LS_L

HP_AUDIO_OUT_R

HP_AUDIO_OUT_L

SC1_AUDIO_OUT_R

SC1_AUDIO_OUT_L

SC2_AUDIO_OUT_R

SC2_AUDIO_OUT_L

G_16860_010.eps

250107

2433 D3

2434 E3

2435 E3

2436 E3

2437 F4

2438 F4

2439 A3

2440 A3

2441 A4

2442 A4

2443 A6

2444 A6

1411 B3

2408 A4

2409 A4

2410 A4

2411 A2

2412 A4

2413 A6

2414 B2

2415 B3

2416 B3

2417 B7

2418 B7

2419 C3

2420 C6

2421 C7

2422 C7

2423 C6

2424 D7

2425 D7

2426 D7

2427 D7

2428 D6

2429 D7

2430 D7

2431 D7

2432 D2

2445 E3

2446 C3

2447 C3

3402 A1

4412 D3

5401 A1

5402 B1

5403 E2

7410 A4

7411 B4

F401 A4

F402 A4

F403 A5

I412 C3

I413 C3

I414 C6

I415 C6

I416 D6

I417 D6

I418 D6

I419 D6

I420 D3

3410 C3

3411 C3

3416 E2

3417 D8

3418 D8

3419 D8

3420 D8

4401 A2

4402 A2

4403 E3

4406 F3

4407 C3

4408 C3

4409 D3

4410 D3

4411 D3

I421 D4

I422 D4

I423 E4

I424 E4

I425 F4

I426 A3

I427 C4

I428 C4

I429 C2

I430 C2

I431 D4

I432 D2

Circuit Diagrams and PWB Layouts

SSB: YPBPR & Rear IO

1 2

B06A

YPBPR & REAR IO

3 4

LC7.1E LA

CVBS

I633

1601-2 8

4601

FOR NON SIDE IO / ITV

SVHS

1601-3

GND

F601 3600

3604

75R

10R

1601-1

F615

F602

RES

6604

PESD5V0S1BA

I615

3609

75R

RES

6606

PESD5V0S1BA

3602

RES

2609

10R

RES

4602

F603

+5V_SW

I631

I632

F604

3613

75R

6615

RES

2601

2617

1u0

3625

100R

BC857BW

7601

FRONT_C

FRONT_Y_CVBS

+5V_SW

F616

1603

MSD-242V-01 NIDIP (765A) LF

2 1

3 R

3139 123 6261.1

1 2

F611 3621

150R

RES

6607

PESD5V0S1BA

3616

33K

I635

2615

2616

3n3

220n 4603 SIDE_AUDIO_IN_L

F610 3620

150R

RES

6605

PESD5V0S1BA

3615

33K

I636

2614

2613

3n3

220n 4604

SIDE_AUDIO_IN_R

3 4 5 6

7 8

1619

7 8

BM06B-SRSS-TBT

ITV Connector D

HD_PR_IN_ITV

HD_Y_IN_ITV

HD_PB_IN_ITV

F612

VGA_H

VGA_V

F613

9 10

1615-1

MSD-246V1-145 NIDIP

1615-2 5 F614

MSD-246V1-145 NIDIP

F608

1615-3 8

MSD-246V1-145 NIDIP

F609

F605

RES

6610

YPbPr

RES

2602

3601

75R

3617

100R

F606

RES

6611

F607

RES

6612

RES

6613

HD_PR_IN_ITV

HD_PR_IN

RES

2603

3603

75R

3618

100R

HD_Y_IN_ITV

HD_Y_IN

RES

2606

3605

75R

3619

100R

3607

150R

HD_PB_IN_ITV

HD_PB_IN

I623

2608

3n3

3608

33K

2607

220n

I610

COMP_AUDIO_IN_L

RES

6614

3611

150R I627

2612

3n3

3612

33K

2610

220n

I611

COMP_AUDIO_IN_R

7 8 9 10

B06A

G_16860_011.eps

240107

2613 F4

2614 F4

2615 E4

2616 F4

2617 D2

3600 B4

3601 B8

3602 C4

3603 B8

3604 B4

3605 C8

3607 D8

3608 D9

3609 C2

3611 D8

3612 D9

3613 E1

3615 F3

3616 F3

3617 B9

1619 E7

2600 B3

2601 E2

2602 B8

2603 B8

2606 C8

2607 C9

2608 D9

2609 D4

2610 D9

2612 D9

1601-1 B2

1601-2 D1

1601-3 B2

1603 E2

1606 B7

1607 C7

1608 D3

1609 C3

1610 C7

1611 D7

1612 D2

1613 D7

1614 F2

1615-1 B7

1615-2 C7

1615-3 D7

1618 F2

6606 D3

6607 F3

6610 B8

6611 C8

6612 C8

6613 D8

6614 D8

6615 E2

7601 D4

F601 B3

F602 C3

3618 B9

3619 C9

3620 F3

3621 E3

3622 D4

3623 D4

3624 E4

3625 D4

4601 C2

4602 D2

4603 E5

4604 F5

6604 C3

6605 G3

F603 D2

F604 D1

F605 B7

F606 B7

F607 C7

F608 D7

F609 D7

F610 F3

F611 E3

F612 F7

F613 F7

F614 C7

F615 C2

F616 F1

I610 C10

I611 D10

I615 B4

I623 D9

I627 D9

I631 C4

I632 D3

I633 B1

I635 E4

I636 F4

Circuit Diagrams and PWB Layouts LC7.1E LA

SSB: I/O Scart 1 & 2

1 2 3

B06B

IO - SCART 1 & 2

ITV-Connector B

1526

SC1_B_IN

SC1_G_IN

SC1_R_IN

SC1_FBL_IN

SC1_AUDIO_OUT_L

SC1_AUDIO_OUT_R

1525

6 7

ITV-Connector C

SC2_AUDIO_IN_R

SC2_AUDIO_IN_L

SC2_Y_CVBS_IN_ITV

SC2_C_IN_ITV

3503

150R

F534

SCART 1

1504

Audio-R_out

Audio-R_in

Audio-L_out

Audio-L_in

RGB-B_in

Function_Sw

RGB-G_in

RGB-R_in

RGB-BL_in

Terr_CVBS_out

Video_in

F511

F513

F515

F517

F519

F520

F521

1509

F522

1512

F531

F524

F525

F526

F528

PPTV/55

3507

150R

3510

150R

3514

150R

RES

2528

3518

27K

RES

2527

F535

F536

2517

3n3

3511

33K

F537

2523

3n3

3515

33K

3516

100R

3523

100R

F540

2521

220n

F539

3528

100R

F541

RES

2529

2515

220n

I540

F538

I541

SC1_AUDIO_MUTE_R

SC1_AUDIO_OUT_R

SC1_AUDIO_OUT_L

SC1_AUDIO_MUTE_L

SC1_AUDIO_IN_R

SC1_AUDIO_IN_L

SC1_B_IN

SC1_STATUS

SC1_G_IN

SC1_R_IN

3139 123 6261.1

1 2 3

RES

2531

3535

RES

2535

68R

I550

RES

2538

3545

3546

75R

100R

3532

1K0

F542

F530

5 6

SC1_FBL_IN

SC1_CVBS_IN

Item

1504

1506

1525

1526

3516

3523

3528

Audio-R_out

Audio-R_in

Audio-L_out

SCART 2

1506

Audio-L_in

Function_Sw

RGB-R_out/YC-C_in

CVBS_out

Video/YC-Y_in

F510

F512

F516

F514

F518

F532

1510

1513

F523

F527

F529

PPTV/55

Description

SOC EURO V 21P F BK R-GRND B

CON V 5P M 1.00 SM SR R

CON V 8P M 1.00 SM SR R

RST SM 0603 100R PM5 COL

RST SM 0603 680R PM5 COL

RST SM 0603 100R PM5 COL

RST SM 0603 680R PM5 COL

RST SM 0603 100R PM5 COL

RST SM 0603 680R PM5 COL

3529

RES

2530

3531

75R

100R

3500

150R

3502

150R

3506

150R

3512

150R

3550

27K

RES

2524

+5V_SW

I510

I512

F544

3553

75R

3552

100R

I545

2536

220n

3522

68R

3519

15R

I551 2525

I543

220n

5V2

3V7

3525

1K0

I530 3V

7500

BC847B

7502

BC857BW

3538

4K7

I552

RES

4502

+5V_SW

2534 I553

220n

2533

220n

I548

I549

7503

BC847B

7504

BC857BW

3540

4K7

RES

4504

F543

2509

220n

I517

I544 3521

1K0

I528

3555

68R

I556

I533

3537

1K0

3554

68R

I554

2518

220n

I520

I557

B06B

SC2_AUDIO_MUTE_R

SC2_AUDIO_OUT_R

SC2_AUDIO_OUT_L

SC2_AUDIO_MUTE_L

SC2_AUDIO_IN_R

SC2_AUDIO_IN_L

SC2_STATUS

SC2_C_IN_ITV

SC2_C_IN

SC2_CVBS_MON_OUT

SC2_CVBS_MON_OUT_ITV

SC2_Y_CVBS_IN_ITV

SC2_Y_CVBS_IN

SC1_RF_OUT_CVBS

SC1_CVBS_RF_OUT

G_16860_012.eps

250107

3519 G10

3520 E4

3521 G12

3522 G10

3523 F4

3524 I11

3525 G10

3526 F4

3528 F4

6504 D3

6505 E10

6507 D3

6509 F10

6510 H9

6511 H3

6512 G5

6513 G5

6514 E3

6515 F3

6516 G3

6517 H3

6518 C3

6519 C3

6520 E3

6521 G3

3529 H10

3530 G4

3531 H10

3532 G4

3533 G4

3535 H3

3536 H4

3537 I12

3538 G11

3540 I12

3545 H4

3546 H4

3550 E10

3551 E10

3552 F11

3553 F11

3554 I12

3555 H12

4502 G11

4504 I12

6501 D10

1516 E3

1517 E3

1518 G9

1519 F3

1520 G3

1521 H9

1522 G3

1523 H3

1524 H3

1525 A2

1526 A1

2502 C10

2506 C10

2508 B4

2509 D12

2512 D10

2514 C4

2515 C5

2517 D4

2518 D12

2520 E10

2521 D5

2523 D4

2524 F10

2525 G10

2526 G10

2527 F4

2528 E4

2529 F4

2530 H10

2531 G4

2533 I11

2534 I10

1500 C9

1501 C9

1502 C3

1503 D9

1504 C2

1505 C3

1506 D8

1507 D3

1508 E9

1509 D2

1510 E9

1511 D3

1512 E2

1513 E9

1514 E9

1515 F9

2535 H3

2536 G10

2538 H3

3500 B10

3502 C10

3503 B4

3506 D10

3507 C4

3508 D11

3510 C4

3511 D4

3512 D10

3513 E11

3514 D4

3515 D4

3516 E4

3517 E4

3518 E3

F518 D9

F519 D2

F520 D2

F521 D2

F522 D2

F523 F9

F524 E2

F525 E2

F526 F2

F527 F9

F528 F2

F529 F9

F530 H5

F531 E2

F532 E9

F534 B4

F535 C4

F536 C4

6522 C10

6523 C10

6524 E10

6525 G9

7500 G10

7502 G11

7503 I11

7504 I11

F510 D9

F511 C2

F512 D9

F513 C2

F514 D9

F515 C2

F516 D9

F517 C2

F537 D4

F538 E5

F539 E4

F540 F4

F541 F5

F542 G4

F543 D11

F544 D11

I510 B11

I512 C11

I517 D12

I520 D12

I528 G12

I530 G10

I533 H12

I540 C5

I541 D5

I543 G10

I544 G12

I545 E11

I548 I11

I549 I11

I550 G4

I551 G10

I552 G11

I553 I11

I554 I12

I556 H12

I557 F12

Circuit Diagrams and PWB Layouts LC7.1E LA 7.

SSB: HDMI

1 2

B06C HDMI

3 4 5

1810

DC1R019JBAR190

21 20

23 22

F832

F840

F841

F842

F843 3862

3863

I831

7814

BC847BW

1K0

2K2

I833

RX2+A

RX2-A

RX1+A

RX1-A

RX0+A

RX0-A

RXC+A

RXC-A

DOC_SCLA

DOC_SDAA

+5VHDMI_A

HDMI_HOTPLUG_RESET

I841

I840 3877

2K2

7816

BC847BW

DDC_RESET

+5VHDMI_A

6831

BAT54 COL

+5V_SW

6830

BAT54 COL

7850

M24C02-WMN6

(256x8)

EEPROM

ADR

SCL

SDA

F874

3830

4K7

DOC_SDAA

DOC_SCLA

+5V_SW

+5VHDMI_B

6802

BAT54 COL

6801

BAT54 COL

7811

M24C02-WMN6

(256x8)

EEPROM

ADR

SCL

SDA

F873

3810

4K7

3831

47K

3832

47K

2804

100n

+3V3_SW +3V3_SW

7852

BSN20

3834

4K7

I823

3801

47K

3802

47K

2803

100n

7851

BSN20

3833

4K7

I822

+3V3_SW +3V3_SW

1811

21 20

23 22

F861

F869

F870

F871

F872

7860

BC847BW

3880

3881

I861

1K0

2K2

RX2+B

RX2-B

RX1+B

RX1-B

RX0+B

RX0-B

RXC+B

RXC-B

I843

I842

3883

2K2

7861

BC847BW

DDC_RESET

AUDIO DAC

+3V3_SW +3V3_SW

DOC_SCLB

DOC_SDAB

+5VHDMI_B

HDMI_HOTPLUG_RESET

3803

1R0

2801

6.3V 47u

2802

100n

I863

3804

1R0

F801

2805

6.3V 47u

2806

100n

HDMI_AUDIO_IN_R

HDMI_AUDIO_IN_L

3805

220R

2807

100n

2808

6.3V 47u

I802 2811 10u

I804

2812 10u

3806

220R

I805

I801

I803

DAC

VREF_DAC

BCK

SYSCLK

PLL1

VOUTL

VOUTR

DEEM

CLKOUT

DATAI

PLL0

SFOR

F802

MUTE

I806

7810

UDA1334ATS

2814

10n

2815

10n

DOC_SDAB

DOC_SCLB

HDMI_INT

RST

IIC_SCL

IIC_SDA

+5VHDMI_A

7812

BSN20

3828

4K7

I820

+3V3_SW

8 9

7817-3

SII9025CTU

146

147

148

149

150

151

152

VIA

159

160

161

162

163

164

165

I850

7817-2

SII9025CTU

3896

3897

7824

BSN20

+3V3_SW

3807-1 1

3807-4 4

3807-3 3

3807-2 2

100R

F850

F876

F877

+3V3_SW

8 33R

5 33R

6 33R

7 33R

I845

2810

10n

I844

+5VHDMI_B

RES

I828

4803

7825

BSN20

I864

I865

I866

7813

BSN20

3846

4K7

I821

F851

+3V3_SW

HDMI_I2S_SCK

HDMI_I2S_WS

HDMI_I2S_SD

2809

10n

2813

18p

I846

18p

2828

3815

1M0

I848

RX0+A

RX0-A

RX1+A

RX1-A

RX2+A

RX2-A

RXC+A

RXC-A

RX0+B

RX0-B

RX1+B

RX1-B

RX2+B

RX2-B

RXC+B

RXC-B

3811

4K7

7817-1

SII9025CTU

R0X0

R0X1

MAIN

R0X2

R0XC

R1X0

R1X1

R1X2

R1XC

104

102

INT

RESET

DSCL0

DSDA0

DSCL1

DSDA1

CSCL

CSDA

107

CLK48B

EVNODD

PWR5V

101

I862

103

RSVD_A

RSVDL

SCDT

3819 33R

I847

XTALIN

XTALOUT

MCLKOUT

HSYNC

VSYNC

ODCK

SCK

SD0

SPDIF

MUTEOUT

144

143

142

141

140

137

136

133

132

131

130

129

126

125

124

123

119

118

117

116

113

112

111

110

100

121

3139 123 6261.1

1 2 3 4 5 6 7 8 9 10

I851

AVCC AUDPVCC18

AGND AUDPGND

3835

3851-1

3851-2

3851-3 3

3851-4 4

3852-1 1

3852-2 2

3852-3 3

3852-4 4

3853-1 1

3853-2 2

3853-3 3

3853-4 4

3854-1 1

3854-2 2

3854-3 3

3854-4 4

3855-1 1

3855-2 2

3855-3 3

3855-4 4

3856-1 1

3856-2 2

3856-3 3

3856-4 4

I852 I858

CVCC18

POWER

CGND

3857

3858

3859

3860

12 13

33R

8 33R

7 33R

6 33R

5 33R

8 33R

7 33R

6 33R

5 33R

8 33R

7 33R

6 33R

5 33R

8 33R

7 33R

6 33R

5 33R

8 33R

7 33R

6 33R

5 33R

8 33R

7 33R

6 33R

5 33R

I853 I854

IOVCC

IOGND

33R

B06C

I855

0 1

PVCC

TMDS

PGND GND_HS

F875

HDMI_Cb(0)

HDMI_Cb(1)

HDMI_Cb(2)

HDMI_Cb(3)

HDMI_Cb(4)

HDMI_Cb(5)

HDMI_Cb(6)

HDMI_Cb(7)

HDMI_Y(0)

HDMI_Cb(0:7)

HDMI_Y(0:7)

HDMI_Y(1)

HDMI_Y(2)

HDMI_Y(3)

HDMI_Y(4)

HDMI_Y(5)

HDMI_Y(6)

HDMI_Y(7)

HDMI_Cr(0:7)

HDMI_Cr(0)

HDMI_Cr(1)

HDMI_Cr(2)

HDMI_Cr(3)

HDMI_Cr(4)

HDMI_Cr(5)

HDMI_Cr(6)

HDMI_Cr(7)

I813

F805

F806

I814

HDMI_DE

HDMI_H

HDMI_V

HDMI_VCLK

I857 I856

I823 C7

I828 I6

I831 C2

I833 C2

I840 C3

I841 C3

I842 F3

I843 F3

I844 G6

I845 G6

I846 H8

I847 H9

I848 I8

I850 A10

I851 A11

I852 A11

I853 A12

I854 A12

I855 A13

I856 A13

I857 A13

I858 A11

I861 F2

I862 H9

I863 H3

I864 I7

I865 I7

I866 I7

F869 E1

F870 E1

F871 E1

F872 E1

F873 C6

F874 A6

F875 D13

F876 F6

F877 G6

I801 H2

I802 H2

I803 H3

I804 I2

I805 I2

I806 I2

I813 I12

I814 I12

I820 D7

I821 E7

I822 B7

5816 A13

5817 A10

5818 A13

6801 C5

6802 C5

6830 A5

6831 A5

7810 I3

7811 C5

7812 D7

7813 E7

7814 C2

7816 C3

7817-1 E9

7817-2 D10

7817-3 C9

7824 H5

7825 H7

7850 A5

7851 B7

7852 B7

3881 F2

3882 F2

3883 F3

3884 I6

3885 I7

3886 I7

3896 G5

3897 G5

4802 H6

4803 H6

4804 A6

4805 C6

5810 A11

5811 A11

5812 A11

5813 A12

5814 A12

5815 A13

7860 F2

7861 F3

F801 G3

F802 H4

F805 I12

F806 I12

F832 A1

F840 B1

F841 B1

F842 B1

F843 B1

F850 H6

F851 H7

F861 D1

3851-3 E11

3851-4 F11

3852-1 F11

3852-2 F11

3852-3 F11

3852-4 F11

3853-1 F11

3853-2 F11

3853-3 G11

3853-4 G11

3854-1 G11

3854-2 G11

3854-3 G11

3854-4 G11

3855-1 H11

3855-2 H11

3855-3 H11

3855-4 H11

3807-2 I5

3807-3 I5

3807-4 I5

3809 H5

3810 C6

3811 H8

3815 H8

3819 I8

3828 D7

3830 A6

3831 A6

3832 A7

3833 B7

3834 B7

3835 E11

3846 E7

3850 H7

3851-1 E11

3851-2 E11

2852 C11

2853 C12

2854 C12

2855 C12

2856 C12

2857 C12

2858 C13

2859 C13

2860 C13

2861 C13

2865 C10

2866 C10

2867 C11

2868 C11

2869 C11

2870 C12

2871 C12

2872 C12

2873 C12

2874 C12

2875 C13

2876 C13

3801 C6

3802 C7

3803 G3

3804 G3

3805 I2

3806 I2

3807-1 I5

3856-1 H11

3856-2 H11

3856-3 H11

3856-4 I11

3857 I11

3858 I11

3859 I11

3860 I11

3862 B2

3863 C2

3864 C2

3877 C3

3880 E2

2816 B11

2817 B11

2818 C11

2819 B11

2828 H8

2829 B10

2830 B10

2833 B11

2835 B12

2836 B12

2838 B12

2839 B12

2840 B12

2843 B13

2844 B13

2845 B13

2847 C10

2848 C10

2849 C11

2850 C11

2851 C11

1810 A1

1811 D1

1823 H8

2801 G3

2802 H3

2803 C7

2804 A7

2805 G3

2806 H3

2807 H2

2808 H2

2809 H8

2810 H6

2811 H2

2812 I2

2813 H8

2814 I2

2815 I2

G_16860_013.eps

240107

13 11 12

Circuit Diagrams and PWB Layouts

SSB: Headphone Amp & Muting

1 2 3

B06D

HEADPHONE AMP & MUTING

LC7.1E LA

HP_AUDIO_OUT_L

SC2_CVBS_MON_OUT_ITV

HP_AUDIO_OUT_R

2902 F908

HPIC_LIN

470n

ITV Connector E

1901

6 5

3901

47K

I901

F901

2V6

7901-1

TS482IDT

2V6

5V3

2904 F910

HPIC_RIN

470n

3906

100K

3905

47K

3907

100K

F904

2V6

2905

3908

33p

120K

7901-2

TS482IDT

5V3

2V6

MUTING CIRCUIT

ANTI_PLOP

I911 3911

10K

F905

3V3

7902

BC857BW

POWER_DOWN

I914

STANDBY

3937

10K

I913

I916

6914

BAT54 COL

I915

3V3

3935

4K7

2940

47u 6.3V

3934

4K7

7919

BC847BW

I917

7917

BC857BW

6916

BAS316

I918

+3V3_STBY

MUTEn

3139 123 6261.1

+3V3_STBY

I912

2901

3902

33p

120K

3917

1K0

3918

1K0

3913

1K0

3914

1K0

3915

1K0

3916

1K0

HPIC_LOUT

+5V_SW

2908

220n

I924

2913

220n

I902

2903

100u 16V

I904

RES

3903

33R

3904

33R

HPIC_ROUT

I903 2906 I905

100u 16V

7911

BC847BW

7912

BC847BW

7913

BC847BW

7914

BC847BW

7915

BC847BW

7916

BC847BW

3942

1K0

I923

3943

10K

RES

3909

33R

3910

33R

7922

BC847BW

4902

F902

FOR NON SIDE IO

EMC 2911

EMC

10n

2909

10n

F903

I919

I920

I921

I922

1900

YKB21-5157N

EMC

2910

EMC

10n

2912

10n

4903

SC1_AUDIO_MUTE_R

SC1_AUDIO_MUTE_L

SC2_AUDIO_MUTE_R

SC2_AUDIO_MUTE_L

ENGAGE

B06D

HP_LOUT

HP_ROUT

G_16860_014.eps

250107

7917 E3

7919 E2

7922 F6

F901 B3

F902 B6

F903 C6

F904 C3

F905 D2

F908 A2

F910 B2

I901 A3

I902 B5

I903 C5

I904 B6

I905 C5

I911 D2

I912 D3

I913 E2

I914 E1

3903 A6

3904 B6

3905 C3

3906 B3

3907 C3

3908 B4

3909 B6

3910 C6

3911 D2

3912 D4

3913 D4

3914 E4

3915 E4

3916 F4

3917 C4

3918 D4

3934 E3

3935 E2

3937 E1

3938 E2

3940 F3

3942 F5

1900 B7

1901 B2

2901 A4

2902 A2

2903 B5

2904 C2

2905 B4

2906 C5

2907 C3

2908 B5

2909 A7

2910 C7

2911 A7

2912 C7

2913 B5

2940 E2

3901 A3

3902 A4

Item

1901

2901

2902

2903

2904

2905

2906

2907

2909

2910

2911

2912

3901

3902

3904

3905

3906

3907

3908

3910

3917

3943 F6

4901 D3

4902 A7

4903 C7

6914 E2

3918

4902

4903

7901

7911

6916 E3

6919 F4

7901-1 A4

7901-2 B4

7912

7902 D3

7911 C5

7912 D5

7913 D5

7914 E5

7915 E5

7916 F5

I915 E2

I916 E2

I917 E3

I918 E4

I919 D6

I920 E6

I921 E6

I922 F6

I923 F6

I924 B5

Description

CON V 4P M 1.00 SM SR R

CER1 0603 NP0 50V 33P COL

CER2 0603 Y5V 10V 470N COL

ELCAP SM 16V 100U PM20 COL R

CER2 0603 Y5V 10V 470N COL

CER1 0603 NP0 50V 33P COL

ELCAP SM 16V 100U PM20 COL R

CER2 0603 Y5V 10V 470N COL

CER2 0603 X7R 50V 10N COL

RST SM 0603 47K PM5 COL

RST SM 0603 RC21 120K PM5 R

RST SM 0603 33R PM5 COL

RST SM 0603 47K PM5 COL

RST SM 0603 100K PM5 COL

RST SM 0603 RC21 120K PM5 R

RST SM 0603 33R PM5 COL

RST SM 0603 1K PM5 COL

RST SM 0603 JUMP. 0R05 COL

IC SM TS482ID (ST00) R

TRA SIG SM BC847BW (COL) R

Circuit Diagrams and PWB Layouts LC7.1E LA 7.

SSB: Audio

B07

AUDIO

AUDIO_LS_L

AUDIO_LS_R

ENGAGE

STANDBYn

3139 123 6261.1

FA06

FA05

FA09

FA12

3A06

3A07

3A04

3A06

3A07

3A08

3A11

LCD PDP

10K 6K8

12K

10K

22K

6K8

10K

12K

10K

6K8

22K

6K8

IA01

2A11

IA05

2A15

2A16

IA10

IA11

2A20

VSSA

VDDA VDD

+AUDIO_POWER

GNDSND GNDSND

5A07

60R

FA01

IA41

GNDSND

3A01

5A05

1u0

2A22

2A24

3A13

IA02

100n

39K

IA06

IA09

IA12

2A12

220p

2A19

220p

IA13

IA15

-2V8

-7V6

2A29

3A26

3A19

10K

GNDSND

100n

22K

IA19

IA33

IA21

IA22

-8V2

4V7

3V2

-2V6

EMC

2A32

1n0

7A01

TDA8932T

GNDSND GNDSND

IN1P

IN1N

IN2P

IN2N

INREF

OSCREF

OSCIO

HVPREF

DREF

VDDA

Φ

VDDP

CLASS D

POWER

AMPLIFIER

OUT1

OUT2

4 2V6

DIAG

HVP1

HVP2

28 8V9

BOOT1

BOOT2

21 3V9

IA18

STAB1

STAB2

24 -1V3

ENGAGE

POWERUP

TEST

CGND VSSA

VSSP VSSD|HW

IA03

IA07

EMC

FA04

2A18

1n0

3A12

2A25

IA14

2A27

IA16

3A15

2A30

100n

VSS

GNDSND

1M0

15n

1M0

VSSA

GNDSND GNDSND VSS

RES 4A01

IA40

RES 4A02

+AUDIO_POWER_+12V_DISP

10R

IA24

2A01

100n

11V9

GNDSND

30R

IA26

12V2

2A04

220u 25V

GNDSND

IA23

IA35

2A21

1n0

IA36

2A35

1n0

3A17

10R

IA39

2A36

1n0

GNDSND

5A03

22u

3A09

10R

GNDSND

IA20

5A04

22u

IA38

2A31

1n0

VDDA

VDD

-AUDIO_POWER

GNDSND

FA02

2A14

470n

2A17

1n0

2A45

1n0 2A28

470n

2A23

1n0

3A02

5A06

2A13

IA34

220n

GNDSND

10R

IA25

2A02

100n

-12V2

GNDSND

30R

IA27

+12V2

2A08

220u 25V

GNDSND

VSSA

2A26

220n

IA37

2A38

220n

IA17 3A14

22R

GNDSND

VSS

2A37

220n

IA04 3A05

22R

GNDSND

3A27

220K

3A28

220K

IA29

7A06

BC847BW

IA31

GNDSND

VDD

IA30

DC_PROT

FA32

GNDSND

7A07

BC847BW

B07

TO SPEAKERS

1735

B4B-PH-K

FA07

FA08

FA10

FA11

7A05

BC857BW

LEFT +

GND

RIGHT -

DC-DETECTION

G_16860_015.eps

240107

2A41 F9

2A45 E7

2A46 A6

2A47 B6

3A01 B6

3A02 B8

3A03 D2

3A04 D3

3A05 D9

3A06 D2

3A07 D2

3A08 D3

3A09 D7

3A11 E2

3A12 E6

3A13 E3

3A14 E9

2A23 E8

2A24 E3

2A25 E6

2A26 E8

2A27 E6

2A28 E8

2A29 E3

2A30 F6

2A31 F7

2A32 F4

2A33 F5

2A34 F5

2A35 E7

2A36 F7

2A37 D8

2A38 E8

2A40 F3

1735 D11

2A01 B7

2A02 B9

2A04 C7

2A08 B9

2A09 D5

2A10 D5

2A11 D3

2A12 D4

2A13 D8

2A14 D8

2A15 D3

2A16 D3

2A17 D8

2A18 D6

2A19 D4

2A20 E3

2A21 D7

2A22 E3

7A05 E11

7A06 F10

7A07 F10

FA01 C6

FA02 B8

FA04 D6

FA05 D2

FA06 D2

FA07 D11

FA08 D11

FA09 E2

FA10 D11

FA11 D11

FA12 E2

FA32 E11

IA01 D3

3A15 E6

3A17 E7

3A19 F3

3A26 E3

3A27 F9

3A28 F9

3A29 E10

3A30 E10

3A31 F11

4A01 A6

4A02 A6

5A03 C7

5A04 E7

5A05 B6

5A06 B8

5A07 A6

7A01 D4

IA22 F4

IA23 D6

IA24 B7

IA25 B9

IA26 B7

IA27 B9

IA29 F10

IA30 E10

IA31 E10

IA33 E4

IA34 C8

IA35 D7

IA36 D7

IA37 E8

IA38 E7

IA39 F7

IA40 A7

IA41 A6

IA02 D3

IA03 D6

IA04 D9

IA05 D3

IA06 D4

IA07 D6

IA09 D4

IA10 D3

IA11 E3

IA12 E3

IA13 E4

IA14 E6

IA15 E4

IA16 E6

IA17 E9

IA18 E5

IA19 E4

IA20 E6

IA21 F4

Circuit Diagrams and PWB Layouts LC7.1E LA

SSB: SRP List

1.1. Introduction

SRP (Service Reference Protocol) is a software tool that creates a list with all references to signal lines. The list contains references to the signals within all schematics of a PWB. It replaces the text references currently printed next to the signal names in the schematics. These printed references are created manually and are therefore not guaranteed to be 100% correct. In addition, in the current crowded schematics there is often none or very little place for these references.

Some of the PWB schematics will use SRP while others will still use the manual references. Either there will be an SRP reference list for a schematic, or there will be printed references in the schematic.

1.2. Non-SRP Schematics

1.2.1.

There are several different signals available in a schematic:

Power Supply Lines

All power supply lines are available in the supply line overview (see chapter 6). In the schematics (see chapter 7) is not indicated where supplies are coming from or going to.

It is however indicated if a supply is incoming (created elsewhere), or outgoing (created or adapted in the current schematic).

Outgoing

+5V +5V

Incoming

Netname Schematic

+12V_DISP B02

+12V_DISP B04A

(1x)

For normal signals, a schematic reference (e.g. B14b) is placed next to the signals.

B14b signal_name

1.2.3. Grounds

For normal and special grounds (e.g. GNDHOT or GND3V3 etc.), nothing is indicated.

SRP is a tool, which automatically creates a list with signal references, indicating on which schematic the signals are used.

A reference is created for all signals indicated with an SRP symbol, these symbols are:

+5V +5V Power supply line.

name name Stand alone signal or switching line (used as less as possible). name name

Signal line into a wire tree. name name

Switching line into a wire tree.

name

Bi-directional line (e.g. SDA) into a wire tree. name

Signal line into a wire tree, its direction depends on the circuit (e.g. ingoing for PDP, outgoing for LCD sets).

Remarks:

• When there is a black dot on the "signal direction arrow" it is an SRP symbol, so there will be a reference to the signal name in the SRP list.

• All references to normal grounds (Ground symbols without additional text) are not listed in the reference list, this to keep it concise.

• Signals that are not used in multiple schematics, but only once or several times in the same schematic, are included in the SRP reference list, but only with one reference.

Additional Tip:

When using the PDF service manual file, you can very easily search for signal names and follow the signal over all the schematics. In Adobe PDF reader:

• Select the signal name you want to search for, with the "Select text" tool.

• Copy and paste the signal name in the "Search PDF" tool.

• Search for all occurrences of the signal name.

• Now you can quickly jump between the different occurrences and follow the signal over all schematics. It is advised to

"zoom in" to e.g. 150% to see clearly, which text is selected. Then you can zoom out, to get an overview of the complete schematic.

PS. It is recommended to use at least Adobe PDF (reader) version 6.x, due to better search possibilities in this version.

3104 313 6261.1

MIU_DATA(0:15) B03D (1x)

G_16860_026.eps

250107

Circuit Diagrams and PWB Layouts LC7.1E LA 7.

Layout Small Signal Board (Overview Top Side)

1101 E3

1102 E6

1103 E6

1104 D6

1201 D7

1210 A7

1211 A7

1212 A7

1213 A7

1214 A7

1301 B6

1304 A9

1305 A8

1306 A8

1307 A8

1308 A8

1309 A8

1310 A8

1311 A5

1312 B5

1500 E10

1501 E10

1502 E9

1503 E10

1504 D9

1505 E9

1506 D10

1507 E9

1508 D10

1509 D9

1510 D10

1511 D9

1512 D9

1513 D10

1514 D10

1515 D10

1516 D9

1517 D9

1518 C10

1519 D9

1520 D9

1521 C10

1522 D9

1523 C9

1524 C9

1525 B10

1526 F10

1601 F6

1603 F6

1606 F10

1607 F10

1608 F6

1609 F6

1610 F9

1611 F9

1612 F6

1613 F9

1614 F6

1615 F9

1618 F6

1619 F10

1735 A10

1810 F7

1811 F8

1823 E8

1900 B9

1901 B10

1B11 A2

1C01 A3

1G03 B1

1G04 B2

1G50 A7

1G51 A7

1K00 E5

1M20 A8

1P11 A5

2110 E6

2111 E6

2114 E6

2117 E6

2127 D6

2128 D6

2129 D6

2130 D6

2134 D6

2135 D6

2138 D6

2142 E5

2143 D6

2144 D6

2151 D5

2208 A6

2209 A6

2211 C6

2212 C6

2214 C6

2215 C6

2242 C6

2243 C6

2246 D7

2247 D7

2250 D7

2251 D7

2252 D7

2253 D7

2254 D7

2255 D7

2256 D7

2257 D7

2259 D7

2260 D7

2261 D7

2262 A7

2263 A7

2264 A7

2265 A7

2267 D7

2268 D6

2273 D6

2277 D7

2283 A7

2285 A7

2311 A8

2314 B6

2315 A6

2316 B6

2317 B6

2319 B8

2327 A8

2328 A8

2329 A8

2330 A8

2331 A8

2332 A8

2333 A8

2334 A8

2335 A8

2336 A8

2337 A8

2339 A8

3139 123 6261.1

Part 1

G_16860_016a.eps

2340 A8

2408 B8

2409 B8

2410 B8

2411 C8

2412 C8

2413 C8

2414 C8

2417 C8

2418 C8

2419 C8

2420 B8

2421 C8

2422 C8

2423 B8

2432 C8

2433 C8

2434 C8

2435 C8

2436 C8

2437 C8

2438 C8

2439 B8

2440 B8

2441 C8

2442 C8

2443 C8

2444 C7

2445 C8

2446 C8

2447 C8

2600 F6

2601 F6

2609 F6

2613 E6

2614 E6

2615 F6

2616 F6

2617 F6

2801 F8

2802 F8

2805 F9

Part 3

G_16860_016c.eps

2806 E9

2807 F9

2808 F9

2809 F7

2810 F7

2811 E9

2812 E9

2813 E8

2814 E9

2815 E9

2828 E8

2901 B9

2902 B9

2903 B9

2906 B9

2907 B9

2909 B10

2910 B10

2911 B10

2912 B10

2940 B10

2A01 A9

2A02 A9

2A04 B9

2A08 A9

2A09 A9

2A10 B9

2A11 A9

2A12 A9

2A13 A10

2A14 A10

2A15 A8

2A16 B8

2A17 A10

2A18 A9

2A19 B9

2A20 B8

2A22 B9

2A23 A10

2A24 B9

2A26 A10

2A28 A10

2A29 B9

2A30 A9

2A32 B9

2A33 A9

2A34 A9

2A37 A10

2A38 A10

2A40 A9

2A41 A9

2B10 B4

2B11 B4

2B12 B3

2B13 B4

2B14 A3

2B15 A3

2B16 B3

2B18 C5

2B19 B5

2B20 B5

2B21 D5

2B22 A3

2B23 D3

2B24 A2

2B26 C3

2C55 A3

2C56 A3

2C57 A3

2C58 A5

2C59 A4

2C60 A3

2C61 A3

2F10 D3

2F11 D3

2F12 F3

2F13 F3

2F20 D3

2F21 D3

2F22 E3

2G02 C3

2G17 B1

2G18 C1

2G22 D3

2G23 D1

2G24 B1

2G33 B2

2G34 C1

2H06 C3

2H07 D1

2H08 D3

2J01 B1

2J04 D3

2J05 D3

2J06 D3

2K06 F1

2K07 E1

2K11 D3

2K13 D3

2K14 F2

2K16 F3

2K17 F3

2L20 A9

2L21 A8

2L22 A8

2L23 A8

2L24 A9

2L25 A9

2L26 A9

2L27 A9

2L28 A9

2L29 A9

2L30 A9

2L31 A9

2L32 A9

2L33 A9

3113 E6

3116 E6

3117 E6

3118 E6

3119 E6

3122 E6

3125 D6

3126 D6

3130 D5

3133 D6

Part 2

G_16860_016b.eps

Part 4

G_16860_016d.eps

3135 D6

3201 B7

3202 B7

3203 B7

3204 B7

3212 B7

3213 A6

3215 B7

3216 A6

3223 A7

3224 A7

3225 A7

3226 A7

3227 A7

3229 D7

3231 D7

3232 D7

3233 A8

3235 A8

3238 A8

3239 D6

3240 D7

3246 A7

3247 A7

3266 C6

3268 C6

3271 C6

3272 D6

3304 B6

3319 A6

3325 A6

3327 A6

3328 B8

3329 A6

3330 A8

3336 B8

3337 A8

3344 B6

3350 B6

3351 B6

3352 B6

3354 B7

3356 B7

3361 B6

3365 B6

3366 B6

3367 B6

3369 B6

3370 B6

3371 B7

3373 B7

3381 B7

3383 A7

3384 B7

3386 B6

3387 B6

3388 B6

3389 A8

3390 A8

3391 A8

3392 A8

3398 A7

3399 A7

3402 C8

3410 C8

3411 C8

3416 C8

3600 F6

3602 F6

3604 F6

3609 F6

3613 F6

3615 E6

3616 F6

3620 F6

3621 F6

3622 F6

3623 E6

3624 F6

3625 E6

3803 F8

3804 E9

3805 E9

3806 E9

3807 E8

3809 F7

3811 E8

3815 E8

3819 E8

3828 E7

3833 E7

3834 E7

3835 E7

3846 E7

3850 F7

3851 E7

3852 E7

3853 E7

G_16860_016.eps

240107

3G56 D1

3G57 D1

3G58 D1

3G59 D1

3G60 D2

3G61 D2

3G65 B1

3J01 D3

3J02 D3

3J03 D3

3K00 F2

3K01 F2

3K02 E3

3K03 F3

3K05 E3

3K09 F2

3K12 F2

3K15 E1

3K16 E2

3K18 F2

3K21 F2

3K25 E2

3K26 E2

3K27 F1

3K28 E2

3K29 E1

3K30 E2

3K31 E2

3K32 E2

3K33 E1

3K34 F1

3K49 E2

3K50 E2

3K51 E1

3K52 F1

3L06 B6

3L07 B6

3L08 A6

3L09 B6

3L10 A8

3L12 B6

3L13 B6

3L20 A8

3L21 A9

3L22 A9

3L23 A9

3L24 A9

3L25 A9

3A30 A9

3A31 A9

3B10 B3

3B11 A3

3B12 A3

3B13 B5

3B14 A3

3B15 B5

3B17 A3

3B18 A3

3B19 A3

3G15 B1

3G19 B1

3G48 B1

3A03 A8

3A04 A9

3A05 A9

3A06 A8

3A07 B8

3A08 B9

3A11 B8

3A13 B9

3A14 A10

3A19 A9

3A26 A8

3A27 A9

3A28 A9

3A29 A9

3854 E8

3855 E8

3856 E8

3857 E8

3858 E8

3859 E8

3860 E7

3862 F7

3863 F7

3880 F8

3881 F8

3896 E7

3897 E7

3901 B9

3902 B9

3903 B9

3904 B9

3907 B9

3909 B10

3910 B10

3942 B10

3943 B10

3A01 A9

3A02 A9

5F11 D3

5G01 C3

5G02 C3

5G04 D3

5H01 D3

5H02 D1

5K03 F1

5K04 D2

5K05 D3

6103 E6

6301 A6

6302 B8

6303 B8

6304 B8

6308 A8

6309 A8

6310 A8

6311 A8

6312 A8

6313 A8

6604 F6

6605 F6

6606 F6

4L25 A9

5110 E6

5111 E6

5113 E6

5114 D6

5116 D6

5210 C6

5302 A8

5304 A8

5401 C8

5402 C8

5403 C8

5A03 A10

5A04 B10

5A05 A9

5A06 A9

5B01 B3

5B02 B4

5B03 B3

5B04 B5

5B05 B4

5B06 A5

5B10 A4

5B11 A5

5F10 D3

4C57 A4

4C58 A4

4C59 A4

4C60 A4

4C61 A3

4C62 A3

4H01 D2

4H02 D2

4H03 D3

4H04 D2

4H05 D2

4L20 A8

4L21 A9

4L24 A9

4403 B8

4406 C8

4601 F6

4602 F6

4603 C8

4604 C8

4802 E8

4803 F8

4902 B9

4903 B9

4B01 B4

4C01 A5

4C55 A3

4C56 A3

4214 A6

4215 A6

4301 B6

4302 A8

4303 A8

4308 B7

4309 A8

4310 A8

4314 B6

4315 B6

4401 A8

4402 A8

3L26 B6

4110 E6

4111 E6

4117 E5

4120 E5

4124 D6

4203 A6

4204 A6

4205 A6

4206 A6

4208 D7

4209 D7

6607 F6

6615 E6

6B01 B3

6B02 B5

6B03 B5

6J03 D3

7109 E6

7113 D6

7114 D6

7202 C7

7207 A6

7311 B7

7312 A6

7313 A8

7316 B7

7410 B8

7601 F6

7810 E8

7812 E7

7813 E7

7814 F7

7817 E7

7824 F7

7825 F7

7851 E7

7852 E7

7860 F8

7922 B10

7A01 A9

7A05 A9

7A06 A9

7A07 A9

7B01 B3

7B03 B5

7B04 C4

7B05 A3

7G00 C2

7G06 C1

7H00 D2

7H02 C3

7J04 D3

7J05 D3

1215 D4

1216 C4

1302 F7

1303 F7

1314 F7

1411 C3

1G01 C10

1J14 F9

2112 F7

2113 E7

2115 F6

2116 F6

2118 E6

2119 E6

2120 E6

2121 F6

2122 E6

2123 D5

2124 D5

2125 D5

2126 D5

2131 E7

2132 E7

2133 D5

2136 D5

2137 D5

2139 D5

2140 D5

2141 D5

2145 D5

2146 F6

2147 E6

2148 E7

2149 F7

2205 D4

2206 D4

2207 A5

2210 A5

2213 B5

2216 C4

2217 D6

2218 C5

2219 D5

2220 C5

2221 D5

2222 D5

2223 D5

2224 C5

2225 C5

2226 C5

2227 C5

2228 C5

2229 D5

2230 C4

2231 C4

2232 C4

2233 C4

2234 C4

2235 C4

2236 C4

2237 C4

2238 C4

2239 B4

2240 C4

2241 B5

2244 D5

2245 B4

2248 A5

2258 D4

2266 C4

2269 D4

2270 C4

2271 C4

2272 D4

2274 C4

2275 D4

2276 D4

2278 C4

2279 D4

2280 D4

2281 C4

2282 D4

2284 D5

2286 C4

2287 D4

2288 D4

2289 D5

2290 C4

2291 D4

2292 C4

2293 D4

2294 D4

2295 C5

2296 C5

2297 C4

2298 B4

2310 A4

2312 B4

2313 B4

2318 A4

2320 B5

2321 B4

2322 B4

2323 B4

2324 B5

2325 B4

2326 B4

2338 A4

2415 D3

2416 D3

2424 B3

2425 B3

2426 B3

2427 B3

2428 B3

2429 B3

2430 B3

2431 B3

2502 E2

2506 E2

2508 E3

2509 E1

2512 E1

2514 E3

2515 E2

2517 E2

2518 D1

2520 D1

2521 E2

2523 E2

2524 D2

2525 C2

2526 C2

2527 D3

2528 D3

2529 D3

2530 C1

2531 D2

2533 D3

2534 D3

2535 C3

2536 C2

2538 C2

2602 F1

2603 F2

2606 F2

2607 F2

2608 F2

2610 F2

2612 F2

2803 F3

3139 123 6261.1

Part 1

G_16860_017a.eps

2804 F4

2816 E3

2817 E3

2818 E4

2819 E4

2829 F3

2830 F3

2833 F3

2835 F4

2836 E4

2838 E4

2839 E3

2840 E3

2843 F3

2844 F3

2845 E3

2847 F3

2848 F3

2849 F3

2850 F4

2851 F3

2852 E4

2853 E3

2854 E3

2855 E3

2856 E4

2857 E4

2858 E3

2859 F4

2860 F4

2861 E3

2865 F4

2866 F4

2867 F4

Part 3

2868 F4

2869 F4

2870 E4

2871 E4

2872 E3

2873 E3

2874 E3

2875 F3

2876 E4

2904 C2

2905 C2

2908 B2

2913 B2

2A21 A2

2A25 A2

2A27 B2

2A31 B2

2A35 A2

2A36 B2

2A45 A1

2A46 A2

2A47 A2

2B17 C7

2B25 C7

2F14 E8

2F15 E8

2F16 E8

2F17 E8

2F18 E7

2F19 F8

2F23 F8

2F24 E8

2F25 E8

2F26 F7

2F27 E7

2F28 E7

2F29 E7

2F30 E7

2F31 E7

2F32 E7

2F33 E7

2G03 C9

2G04 D9

2G05 D10

2G06 C9

2G07 C9

2G08 C9

2G09 C10

2G10 C10

2G11 D9

2G12 C9

2G13 D9

2G14 C9

2G15 C9

2G16 C10

2G19 B9

2G20 B9

2G21 C9

2G31 C9

2G32 C9

2H03 C8

2H04 D9

2H09 C8

2H10 C8

2H11 C8

2H12 C8

2H13 C8

2H14 B9

2H15 B9

2J02 B9

2J14 F9

2J15 F9

2J60 C9

2J62 C9

2J63 C9

2J64 C9

2J66 C9

2J67 C9

2J68 C8

2J69 C8

2J70 C8

2J71 C9

2J72 C9

2J73 C9

2K00 D10

2K01 D9

2K02 E9

2K03 E9

2K04 D9

2K05 E9

2K08 F9

2K09 F9

2K10 E9

2K12 F9

2K15 D10

3110 E7

3111 E7

3115 E7

3120 E6

3121 F6

3123 D5

3124 D5

3127 D5

3128 D5

3129 D5

3131 E6

3132 F6

3134 E7

3136 E6

3137 E7

3210 A5

3211 B5

3217 A5

3219 C4

3220 C4

3221 C4

3222 C4

3228 D4

3230 D4

G_16860_017c.eps

3241 C4

3242 C4

3243 C4

3244 D4

3245 C4

3248 D4

3250 D4

3251 D4

3253 D4

3254 D4

3255 D5

3256 D5

3257 D4

3258 D4

3260 D6

3261 C6

3262 D6

3263 C5

3264 C5

3265 C5

3267 C5

3273 D3

3274 D3

3275 D3

3276 D3

3300 B4

3303 A4

3305 A5

3306 B5

3307 B5

3308 A5

3309 A5

3310 A4

3311 A4

3312 A4

3313 A4

3314 A4

3315 A4

3316 B4

3317 A4

3318 B4

3320 A4

3321 B4

3322 A4

3323 B4

3324 A4

3326 B3

3331 A4

3332 A4

3333 A4

3334 A4

Part 2

G_16860_017b.eps

Part 4

3335 A4

3338 A4

3339 A4

3340 A4

3341 A4

3342 A4

3343 F7

3345 F7

3346 B4

3347 B4

3348 B4

3349 B4

3353 B5

3355 B5

3357 B5

3358 B5

3359 B5

3360 B4

3362 A5

3363 A4

3364 A4

3368 A4

3372 B4

3374 A5

3375 B4

3376 A4

3377 B4

3378 B4

3379 B4

3380 A4

3382 B4

3385 B4

3393 A4

3394 A4

3395 A4

3396 A5

3397 B4

3417 B3

3418 B3

3419 B3

3420 B3

3500 E2

3502 E2

3503 E3

3506 E1

3507 E3

3508 E1

3510 E2

3511 E2

3512 D1

3513 D1

3514 E2

3515 E2

3516 D3

3517 D3

3518 D2

3519 C2

3520 D2

3521 C2

3522 C2

3523 D3

3524 C3

3525 C2

3526 D3

3528 D3

3529 C1

3530 D3

3531 C1

3532 D2

3533 D2

3535 C3

3536 C3

3537 C3

3538 C2

3540 C3

3545 C2

3546 C2

3550 D2

3551 D2

3552 D2

3553 D2

3554 C3

3555 C2

3601 F1

3603 F2

G_16860_017d.eps

3605 F2

3607 F2

3608 F2

3611 F2

3612 F2

3617 F1

3618 F2

3619 F2

3801 F3

3802 F3

3810 F3

3830 F4

3831 F4

3832 F4

3864 E3

3877 E3

3882 E3

3883 E3

3884 E3

3885 E3

3886 E3

3905 C2

3906 B2

3908 C2

3911 B1

3912 B1

3913 E1

3914 B1

3915 E1

3916 C1

3917 B1

3918 B1

3934 B1

3935 C1

G_16860_017.eps

240107

5226 C4

5227 C4

5228 C4

5301 B4

5810 E3

5811 F4

5812 E4

5813 E4

5814 E3

5815 F3

5816 E3

5817 E3

5818 E3

5A07 A2

5G03 B9

5H03 C9

5J01 B9

5J52 C9

5J53 C9

5J54 C8

5J55 C9

5K01 E9

5212 D5

5213 C4

5214 C4

5215 A5

5216 C4

5217 A5

5218 D4

5219 D4

5220 C4

5221 C4

5222 C4

5223 D5

5224 C4

5225 C4

4G10 C10

4G31 C9

4H00 D9

4H12 B9

4H15 D10

4J14 F9

4J15 F9

5112 E6

5115 E7

5117 D5

5118 D6

5120 E6

5121 F6

5211 A5

4504 C3

4804 F4

4805 F3

4901 B1

4A01 A2

4A02 A2

4F11 E7

4F12 E7

4G01 C10

4G02 C10

4G03 C10

4G04 C10

4G05 C10

4G09 D9

4306 A5

4307 A5

4313 B4

4316 B5

4323 B4

4324 D3

4325 D3

4407 D4

4408 D4

4409 D3

4410 D3

4411 D3

4412 D3

4502 C2

3K46 E9

3K47 E9

3K48 E9

3L01 B4

3L02 B4

3L04 A4

3L05 A4

3L11 A5

3L14 B5

3L15 B4

4112 E7

4113 E6

4114 F6

4115 F6

4116 E6

4118 E6

4119 E6

4121 E6

4122 F6

4123 F6

4125 F7

4207 C4

4210 C4

4211 D4

4212 D4

4213 C4

3J66 C9

3K04 E9

3K06 E9

3K07 E8

3K08 D8

3K10 E9

3K11 F9

3K13 F9

3K17 E8

3K19 E9

3K20 E9

3K22 F9

3K23 D10

3K24 D10

3K38 E9

3K39 E8

3K40 E8

3K41 E8

3K42 E8

3K43 E8

3K44 E10

3K45 E10

3H10 B9

3H11 B9

3H12 B9

3H13 B9

3H14 C9

3J14 F9

3J15 F9

3J59 C9

3J60 C9

3J61 C9

3J62 C8

3J63 C8

3J64 C8

3J65 C9

3G40 C9

3G41 C10

3G43 C10

3G44 C10

3G46 C10

3G47 C10

3G51 C9

3G54 B9

3G55 B9

3G62 D9

3G63 C10

3H00 D9

3H05 D10

3H09 B9

3G16 C10

3G17 C10

3G18 C10

3G20 D9

3G28 C9

3G29 C9

3G30 C9

3G31 C9

3G33 B10

3G34 B10

3G35 C10

3G36 C9

3G37 C9

3G38 B10

3F29 E7

3F30 F8

3F31 F8

3F32 F8

3F33 F8

3F34 F8

3F40 F7

3F41 E7

3F42 E7

3F44 F7

3F46 E7

3F48 E7

3G11 B10

3G12 D10

3937 B1

3938 B1

3940 B1

3A09 A2

3A12 A2

3A15 B2

3A17 B2

3F10 C9

3F11 C8

3F12 C9

3F13 C9

3F14 F7

3F15 F7

3F16 F7

3F17 F7

3F18 F7

3F19 E7

3F20 E7

3F21 F8

3F22 E7

3F23 E7

3F24 E7

3F25 E7

3F26 E7

3F27 E7

3F28 E7

7912 B1

7913 E2

7914 B1

7915 E1

7916 C1

7917 B1

7919 B1

7B02 C6

7B06 D7

7B08 C7

7F01 F8

7F02 C8

7F03 F7

7F04 E7

7H03 B10

7K01 D9

7K02 D9

7K03 D10

7K05 F9

7322 A5

7323 B4

7411 C3

7500 C2

7502 C2

7503 C3

7504 C3

7811 F3

7816 E3

7850 F4

7861 E3

7901 B2

7902 B1

7911 B1

7205 C5

7206 C4

7208 A5

7210 A5

7211 D4

7213 D3

7214 D3

7308 A4

7310 B3

7314 B5

7315 B5

7317 A4

7320 A5

7321 A5

6916 B1

6919 B1

6J14 F9

6J15 F9

6J60 C9

6J61 C8

6J62 C8

6J63 C9

7111 F7

7131 E6

7132 F6

7133 D6

7203 C4

7204 D5

6522 E1

6523 E2

6524 D2

6525 C2

6610 F1

6611 F2

6612 F2

6613 F2

6614 F2

6801 F4

6802 F3

6830 F4

6831 F4

6914 C1

5K02 E9

6110 E7

6201 A5

6202 A5

6305 B5

6306 F7

6307 F6

6317 A4

6318 A4

6501 E1

6504 E2

6505 D1

6507 E2

6509 D2

6510 C1

6511 C2

6512 D2

6513 D2

6514 D3

6515 D3

6516 D3

6517 D3

6518 E3

6519 D3

1301

YKF51-5564

Y_CVBS

I303

2303

22p

3 3

LC7.1E LA

3302

75R

3303

2301

47p

10R

2302

47p

3304

100R

4304

CVBS

YELLOW

1302-1 1

3301

75R

I306

2311

22p

3305

10R

2304

47p

3306

100R

4306

3307

100R

4307

I308

L

WHITE

1302-2

R

RED

1302-3

I309

2313 3314

** **

3308

3309

2305

2314 3315

** **

3310

3311

2306

1303

YKB21-5101A

I311

I312

2307

22n

2308

22n

4308

4309

2309

10n

2310

10n

3312

10K

3313

10K

3139 123 6229.1

1 2 3 4 5

I314

I315

I316

I317

I318

I319

I320

TO 1H01 OF BJ SSB /

TO 1M60 OF EBJ SSB

1309

B5B-PH-K

I330

I331

I332

5300

4310

4311

FRONT_Y_CVBS_IN

FRONT_C_IN

L_FRONT_IN

FRONT_DETECT

R_FRONT_IN

HEAD_PH_L

HEAD_PH_R

TO 1M36 OF BJ/EBJ SSB

I321

1304

220R

2312

I325

I326

I327

I328

100u

16V

1310

B3B-PH-K

1308

5 6

USB

292303-4

2305

2306

2313

2314

3314

3315

3308

3310

3309

3311

EBJ 2K7

100p

100R

100K

DIVERSITY TABLE

BJ 2K7

100p

680p

33K

LC07

150R

33K

G_16850_023.eps

110107

4308 F4

4309 F4

4310 E7

4311 E7

5300 D7

6301 B3

6302 B3

6303 C3

6304 D3

6305 E3

6306 F3

6307 F3

I303 A3

I306 C2

I308 D2

I309 E2

I311 F2

I312 F2

I314 B7

I315 B7

I316 B7

I317 B7

I318 C7

I319 C7

I320 C7

I321 B9

I325 D8

I326 D8

I327 E8

I328 E8

I330 D7

I331 D7

I332 E7

S301 A2

S302 A2

S303 C2

S304 D2

S305 E2

S306 F2

3307 C5

3308 D4

3309 D4

3310 E4

3311 E4

3312 F5

3313 F5

3314 D4

3315 E4

4301 D2

4302 D2

4303 E8

4304 A5

4306 B5

4307 C5

2306 E4

2307 F4

2308 F4

2309 F4

2310 F4

2311 C2

2312 D8

2313 D3

2314 E3

3301 B2

3302 A4

3303 A4

3304 A5

3305 B4

3306 B5

1301 A1

1302-1 C1

1302-2 D1

1302-3 E1

1303 E1

1304 B9

1308 D9

1309 D7

1310 D9

2301 A4

2302 A4

2303 A2

2304 B4

2305 D4

8 9

S307 F2

S308 F2

S310 E8

S311 E8

S312 E8

Circuit Diagrams and PWB Layouts LC7.1E LA 7.

Layout Side A/V Panel (Top Side)

1301 A1 1302 A2 1303 A3 1304 A2 1308 A4 1309 A3 1310 A3

3139 123 6229.1

G_16850_026.eps

120107

Layout Side A/V Panel (Bottom Side)

2301 A4

2302 A4

2303 A4

2304 A3

2305 A3

2306 A3

2307 A2

2308 A2

2309 A2

2310 A2

2311 A4

2312 A1

2313 A3

2314 A3

3301 A4

3302 A4

3303 A4

3304 A4

3305 A3

3306 A3

3307 A3

3308 A3

3309 A3

3310 A3

3311 A3

3312 A2

3313 A2

3314 A3

3315 A3

4301 A3

4302 A3

4303 A1

4304 A4

4306 A3

4307 A3

4308 A2

4309 A2

4310 A1

4311 A1

5300 A2

6301 A4

6302 A4

6303 A4

6304 A3

6305 A2

6306 A2

6307 A2

3139 123 6229.1

G_16850_027.eps

020207

Circuit Diagrams and PWB Layouts

Keyboard Control Panel

KEYBOARD CONTROL

I111 I112

I116

I113

Diversity Resistor

F310 3099 F311

RES

I117

I114

I118

I115

KEYBOARD

I110

LC7.1E LA 7.

F002

F001

3010

3011

3012

3013

3014

6011

6012

6013

LC06

390R

560R

1K8

150R

820R

YES

Jaguar

390R

560R

1K8

150R

820R

YES

1M01

S3B-PH-K

1001 C1

1002 C1

1003 C1

1004 C2

1005 C2

3016 B2

3017 B2

3099 D1

4001 B4

5001 B4

6011 B3

6012 C3

6013 B3

6014 C1

6015 C1

6016 C1

6017 C2

6018 C2

F001 B4

F002 B3

F310 D1

1011 C1

1012 C1

1013 C2

1014 C2

1015 C2

1016 C3

1M01 A4

2001 B3

3010 B1

3011 B2

3012 B2

3013 B1

3014 B2

3015 B1

F311 D1

I110 B3

I111 B1

I112 B1

I113 B2

I114 B2

I115 B2

I116 C1

I117 C2

I118 C2

3139 123 6219.1

1 2 3 4

G_16850_024.eps

110107

Personal Notes:

E_06532_012.eps

131004

Circuit Diagrams and PWB Layouts

Layout Keyboard Control Panel (Top Side)

1011 A5 1012 A6 1013 A3

LC7.1E LA 7.

1014 A2

1015 A1 1016 A7 1M01 A8

3139 123 6219.1

G_16850_028.eps

120107

Layout Keyboard Control Panel (Bottom Side)

2001 A1 3011 A6 3013 A5

3010 A4 3012 A8 3014 A7

3015 A3

3016 A6

3017 A7

3099 A8

4001 A1

5001 A1

6011 A2

6012 A3

6013 A1

6014 A4

6015 A3

6016 A5

6017 A6

6018 A8

3139 123 6219.1

G_16850_029.eps

020207

Circuit Diagrams and PWB Layouts

Front IR / LED Panel

1 2

IR/LED/LIGHT-SENSOR

+5V_STANDBY

3010

330R

7010

GP1UE260RKVF

OUT

GND

+5V_STANDBY +5V_STANDBY

3015

7014

BC847B

3017

10K

4016

2002

1u0

7013

BPW34

3016

2M2

3018

4M7

RESERVED

FOR LIGHT SENSOR ONLY

1M21

S6B-PH-K

1M20

F010

F011

F012

F013

F014

F015

F016

S7B-PH-K

1M01

S3B-PH-K

KEYBOARD

LED2

+5V_STANDBY

LED1

3019

3020

150R

7011

BC847B

LC7.1E LA

REF

3012

3013

4010

4011

4012

4013

4014

4015

4017

4018

4019

6001

6002

6010

6011

MFD

3K3

820R

BLUE LED

RED LED

ITV

82R

180R

Bi-GR/RD

IR ED

Bi- LED

ITV

RES

+5V_STANDBY

7012

BC847B

6014 D2

6015 E2

6016 E2

7010 B1

7011 C4

7012 B5

7013 C2

7014 C2

F010 E2

F011 E2

F012 E2

F013 E2

F014 E2

F015 E2

F016 E2

4014 D5

4015 D5

4016 D2

4017 B4

4018 B4

4019 B5

6001-1 D5

6001-2 D4

6002 B4

6010 B3

6011 B4

6012 B2

6013 B3

1M01 E1

1M20 E1

1M21 E1

2001 A2

2002 D2

3010 A2

3011 A2

3012 B4

3013 B4

3014 B2

3015 C2

3016 C3

3017 D2

3018 D3

3019 E3

3020 E3

3021 C3

3022 C5

4010 A4

4011 B5

4012 D3

4013 D4

3139 123 6210.1

1 2 3 4

G_16850_025.eps

110107

Personal Notes:

E_06532_012.eps

131004

Circuit Diagrams and PWB Layouts

Layout Front IR / LED Panel (Top Side)

LC7.1E LA 7.

1M01 D4

1M20 D2

1M21 D2

6001 B2

6002 B1

6010 B2

6011 B1

6013 A1

7010 A3

7013 B4

Layout Front IR / LED Panel (Bottom Side)

2001 C2

2002 B1

3010 C2

3011 C3

3012 B4

3013 B4

3014 B2

3015 B1

3016 A2

3017 C1

3018 B1

3019 C3

3020 C3

3021 C3

3022 C3

4001 D3

4002 C3

4004 C2

4005 C2

4010 A3

4011 B4

4012 B3

4013 B3

4014 B4

4015 C4

4016 C1

4017 A4

4018 A3

4019 B4

6012 D3

6014 D4

6015 C3

6016 C2

7011 B3

7012 C4

7014 C1

3139 123 6210.1

G_16850_030.eps

020207

3139 123 6210.1

G_16850_031.eps

020207

Personal Notes:

Circuit Diagrams and PWB Layouts LC7.1E LA 7.

E_06532_013.eps

131004

Alignments LC7.1E LA 8.

EN 69

8. Alignments

Index of this chapter:

8.1 General Alignment Conditions

8.2 Hardware Alignments

8.3 Software Alignments

8.4 Option Settings

Note: Figures below can deviate slightly from the actual situation, due to the different set executions.

General: The Service Default Mode (SDM) and Service

Alignment Mode (SAM) are described in chapter 5. Menu navigation is done with the CURSOR UP, DOWN, LEFT or

RIGHT keys of the remote control transmitter.

8.1 General Alignment Conditions

Perform all electrical adjustments under the following conditions:

• Power supply voltage (depends on region):

– AP-NTSC: 120 V

or 230 V

– AP-PAL-multi: 120 - 230 V

– EU: 230 V

/ 50 Hz (

± 10%).

/ 50 Hz (

± 10%).

/ 50 Hz (

± 10%).

– LATAM-NTSC: 120 - 230 V

– US: 120 V

/ 60 Hz (

± 10%).

/ 50 Hz (

± 10%).

• Connect the set to the mains via an isolation transformer with low internal resistance.

• Allow the set to warm up for approximately 15 minutes.

• Measure voltages and waveforms in relation to correct ground (e.g. measure audio signals in relation to

AUDIO_GND).

Caution: It is not allowed to use heatsinks as ground.

• Test probe: Ri > 10 Mohm, Ci < 20 pF.

• Use an isolated trimmer/screwdriver to perform alignments.

8.2 Hardware Alignments

There are no hardware alignments foreseen for this chassis, but below find an overview of the most important DC voltages on the SSB. These can be used for checking proper functioning of the DC/DC converters.

Specifications (V)

Description Test Point

+AUDIO_POWER FB21

Min.

Typ.

Max.

11.40

12.00

12.60

Diagram

B02_DC-DC

-AUDIO_POWER FB23

+12V_DISP FB34

+8V

+5V_STANDBY

F401

FB27

-11.40 -12.00 -12.60 B02_DC-DC

11.40

7.60

4.94

12.00

8.00

5.20

12.60

8.40

5.46

B02_DC-DC

B04C_Audio Proc.

B02_DC-DC

+5V_SW

+5V_D

+5V_AUD

+5V_TUN

+3V3_STBY

+3V3_SW

+3V3_MOJO

+3V3

+3V3FE

+1V8S_SW

+1V2_MOJO

+1V2_CORE

VDISP

FB16

I411

I410

I115

FB13

FB17

FB19

FJ01

FF14

FB11

FB20

FG39

F210

4.93

5.19

5.45

B02_DC-DC

4.75

5.00

5.25

B04C_Audio Proc.

4.75

5.00

5.25

B04C_Audio Proc.

4.75

5.00

5.25

B03_Tuner IF

3.10

3.30

3.50

B02_DC-DC

3.1

3.2

1.70

1.18

1.14

11.40

3.3

3.27

1.80

1.25

1.24

12.00

3.5

3.4

1.90

1.31

1.34

12.60

B02_DC-DC

B03F_DVB-MOJO

B03B_DVB-Demod

B02_DC-DC

B03D_DVB-MOJO

B04B_Video proc.

8.3 Software Alignments

With the software alignments of the Service Alignment Mode

(SAM) the Tuner and RGB settings can be aligned.

To store the data: Use the RC button “Menu” to switch to the main menu and next, switch to “Stand-by” mode.

8.3.1

Tuner Adjustment (RF AGC Take Over Point)

Purpose: To keep the tuner output signal constant as the input signal amplitude varies.

The LC7.xx chassis comes with two tuner types: the UV1318S for the analogue sets (LC7.1x) and the TD1316AF for the hybrid sets (LC7.2x).

For the digital tuner TD1316AF, no alignment is necessary, as the AGC alignment is done automatically (standard value:

“15”), even during analogue reception.

The analogue tuner UV1318S can also use the default value of

“15”, however in case of problems use the following method

(use multimeter and RF generator):

• Apply a vision IF carrier of 38.9 MHz (105 dBuV = 178 mVrms) to test point F111 (input via 50 ohm coaxial cable terminated with an RC network of series 10nF with 120 ohm to ground).

• Measure voltage on pin 1 of the tuner.

• Adjust AGC (via SAM menu: TUNER -> AGC), until voltage on pin 1 is 3.3 +0.5/-1.0 V.

• Store settings and quit SAM.

8.3.2

RGB Alignment

Before alignment, choose “TV MENU” -> “Picture” and set:

• “Brightness” to “50”.

• “Colour” to “50”.

• “Contrast” to “100”.

White Tone Alignment:

• Activate SAM.

• Select “RGB Align.” -> “White Tone” and choose a colour temperature.

• Use a 100% white screen as input signal and set the following values:

– All “White point” values initial to “256”.

– All “BlackL Offset” values to “0”.

In case you have a colour analyser:

• Measure with a calibrated (phosphor- independent) colour analyser (e.g. Minolta CA-210) in the centre of the screen.

Consequently, the measurement needs to be done in a dark environment.

• Adjust the correct x,y coordinates (while holding one of the

White point registers R, G or B on “256”) by means of decreasing the value of one or two other white points to the correct x,y coordinates (see table “White D alignment values”). Tolerance: dx:

± 0.004, dy: ± 0.004.

• Repeat this step for the other colour Temperatures that need to be aligned.

• When finished return to the SAM root menu and press

STANDBY on the RC to store the aligned values to the

NVM.

Table 8-1 White D alignment values

Value Cool (11000 K) Normal (9000 K) Warm (6500 K) x 0.278

0.289

0.314

y 0.278

0.291

0.319

If you do not have a colour analyser, you can use the default values. This is the next best solution. The default values are average values coming from production (statistics).

• Set the RED, GREEN and BLUE default values per temperature according to the values in the “Tint settings” table.

EN 70 8.

LC7.1E LA Alignments

• When finished return to the SAM root menu and press

STANDBY on the RC to store the aligned values to the

NVM.

Table 8-2 Tint settings

Colour Temp.

Cool

Normal

Warm

249

251

246

241

238

222

246

229

199

Black Level Offset Alignment

• Activate SAM.

• Select “RGB Align.” -> “BlackL Offset” and choose a colour.

• Set all “BlackL Offset” values to “0”.

• When finished return to the SAM root menu and press

STANDBY on the RC to store the aligned values to the

NVM.

Note: For models with “Pixel Plus”, the “Black Offset” (black level offset) should NOT be changed in SAM. These offset values of RGB should be set to “0”, and should NOT be adjusted. Any adjustment of these values will affect the low light white balance.

ADC YPbPr Gray Scale Alignment

When the grey scale is not correct, use this alignment:

• Activate SAM.

• Select “NVM Editor”.

• Enter address “ 26(dec)” (ADR).

• Set value (VAL) to “197(dec)

± 25”.

• Store (STORE) the value.

8.4 Option Settings

8.4.1

Introduction

The microprocessor communicates with a large number of I

ICs in the set. To ensure good communication and to make digital diagnosis possible, the microprocessor has to know which ICs to address. The presence/absence of these specific

ICs (or functions) is made known by the option codes.

Notes:

• After changing the option(s), save them with the STORE command.

• The new option setting becomes active after the TV is switched "off" and "on" again with the mains switch (the

EAROM is then read again).

8.4.2

How To Set Option Codes

When the NVM is replaced, all options will require resetting. To be certain that the factory settings are reproduced exactly, you must set all option numbers. You can find the correct option numbers in table “Option Codes OP1...OP7“ below.

How to Change Options Codes

An option code (or “option byte”) represents eight different options (bits). When you change these numbers directly, you can set all options very quickly. All options are controlled via seven option numbers (OP1... OP7).

Activate SAM and select “Options”. Now you can select the option byte (OP1.. OP7) with the CURSOR UP/ DOWN keys, and enter the new 3 digit (decimal) value. For the correct factory default settings, see the table “Option codes

OP1...OP7“ below. For more detailed information, see the second table “Option codes at bit level“. If an option is set

(value “1”), it represents a certain decimal value.

When all the correct options (bits) are set, the sum of the decimal values of each Option Byte (OP) will give the option code.

Sets 12NC Sets Type

LC07_EU_ATV_LCD_Europe (/10)

Panel Type

867000025487

867000025408

867000025489

26PFL5322/10

32PFL5322/10

37PFL5322/10

LPL : LC260WX2-SLB2

CMO : V260B1-L03

AUO : T260XW03 V1

LPL : LC320W01-SL06

AUO : T315XW02 VD

CMO : V315B1-L05

LPL : LC370WX1-SLB1

AUO : T370XW02 V5

LPL : LC420WX3-SLA1

AUO : T420XW01 V8

867000025492 42PFL5322/10

LPL : LC420WX5-SLD1

LC07_EU_ATV_LCD_Pan Europe (/12)

LPL : LC260WX2-SLB2

867000025488 26PFL5322/12

CMO : V260B1-L03

AUO : T260XW03 V1

867000025439

867000025491

867000025493

32PFL5322/12

37PFL5322/12

42PFL5322/12

LPL : LC320W01-SL06

AUO : T315XW02 VD

CMO : V315B1-L05

LPL : LC370WX1-SLB1

AUO : T370XW02 V5

LPL : LC420WX3-SLA1

AUO : T420XW01 V8

LPL : LC420WX5-SLD1

LC07_EU_ATV_PDP_Europe (/10)

867000025494 42PFP5332/10

SDI : 42 HD W2

LG : 42 HD X4

LC07_EU_ATV_PDP_Pan Europe

(/12)

867000025495 42PFP5332/12

SDI : 42 HD W2

LG : 42 HD X4

045

068

067

046

091

069

071

072

Panel

Code

(Dec)

1 2

Group 1

Option Byte

4 5

Group 2

6 7

045

068

067

046

091

069

071

072

073

076

107

000

003 023 010 223 009 000

001

002

073

076

107

083

084

083

084

003 023 010 223 009 000

001

003 007 011 223 009 000

000

002

003

H_16940_006.eps

090307

Figure 8-1 Option codes OP1...OP7 (for all LC7.1E models)

Alignments LC7.1E LA 8.

EN 71

Option Bit Overview

Below find an overview of the Option Codes on bit level.

Table 8-3 Option codes at bit level (OP1-OP4)

Option Byte & Bit

Byte OP1

Bit 7 (MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0 (LSB)

Total DEC Value

Byte OP2

Bit 7 (MSB)

Bit 6

Bit 5

Bit 4

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 3

Bit 2

Bit 1

Bit 0 (LSB)

Total DEC Value

Byte OP3

Bit 7 (MSB)

Bit 6

Bit 0 (LSB)

Total DEC Value

Byte OP4

Bit 7 (MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0 (LSB)

Total DEC Value

128

Dec. Value

128

Option Name

Reserved

CHINA

DTV_CHINA

DTV_EU

UK_PNP

VIRGIN_MODE

ACI

ATS

1080P

LIGHT_SENSOR

AMBILIGHT

BACKLIGHT_DIMMING

HUE

2D3DCF

WSSB

WIDE_SCREEN

CVI2

Reserved

VCHIP

VIDEO_TEXT

STEREO_DBX

STEREO_NICAM_2CS

LIP_SYNC

HDMI2

HDMI1

VGA

SVHS3

AV3

CVI

SVHS2

AV2

Description

Not Used (Reserved)

ON = SW is for CHINA only OFF = SW is for Non-China AP cluster

ON = DTV_CHINA will be available (Reserved) OFF = DTV_CHINA will not be available

ON = DTV will be available OFF = DTV will not be available

ON = UK PNP is available OFF = UK PNP is not available

ON = Virgin Mode (PNP) is available OFF = Virgin Mode (PNP) is not available

ON = ACI is available OFF = ACI is not available

ON = ATS is available OFF = ATS is not available

ON = 1080p is available OFF = 1080p is not available

ON = Light Sensor is available OFF = Light Sensor is not available

ON = Ambilight Feature will be available OFF = Ambilight Feature will not be available

ON = Backlight Dimming is available OFF = Backlight Dimming is not available

ON = Hue is available OFF = Hue is not available

ON = 3D Comb Filter is available OFF = 2D Comb Filter is available

ON = WSS is available OFF = WSS is not available

ON = TV is 16x9 set OFF = TV is 4x3 set

ON=CVI1 (YPbPr) (For ROW)

Not Used (Reserved)

ON = VChip is available OFF = VChip is not available

ON = Video-TXT is available OFF = Video-TXT is not available

ON = Stereo DBX detection is available (LATAM) OFF = Stereo DBX detection is not available

ON = Stereo NICAM 2CS detection is available (EU/AP/China) OFF = Stereo NICAM 2CS detection is not available

ON = Lip Sync is available OFF = Lip Sync is not available

ON = HDMI2 is available OFF = HDMI2 is not available

ON = HDMI1 is available OFF = HDMI1 is not available

ON = VGA is available OFF = VGA is not available

ON = SVHS3 is available OFF = SVHS3 is not available

ON = AV3 is available OFF = AV3 is not available

ON = CVI is available OFF = CVI is not available

ON = SVHS2 is available OFF = SVHS2 is not available

ON = AV2 is available OFF = AV2 is not available

EN 72 8.

LC7.1E LA Alignments

Table 8-4 Option codes at bit level (OP5-OP7)

Option Byte & Bit

Byte OP5

Bit 7 (MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0 (LSB)

Total DEC Value

Byte OP6

Bit 7 (MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0 (LSB)

Total DEC Value

Byte OP7

Bit 7 (MSB)

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0 (LSB)

Total DEC Value

128

Dec. Value

128

Option Name

NVM_CHECK

Reserved

MP_ALIGN

SYS_RECVRY

SL_WIRED

HOTEL

SS_DEMO

Reserved

TUNER PROFILE

Reserved

CABINET PROFILE

Description

ON = NVM (range) checking is available OFF = NVM (range) checking is not available

Not Used (Reserved)

ON = Using multi-point alignment for Gamma & White Point OFF = Using old way for Gamma (predefined) & WP alignment

ON = System Recovery is available OFF = System Recovery is not available

ON = BDS Smart Loader Wired is available OFF = BDS Smart Loader Wired is not available

ON = Hotel/BDS is available OFF = Hotel/BDS is not available

ON = Split Screen Demo is available OFF = Split Screen is not available

Not Used (Reserved)

0 = ATV_EU_PHILIPS UV1318S/AIH-3 1 = ATV_EU_Panasonic EN57K28G3F2 =

DTV_EU_PHILIPS TD1316AF/IHP-24 = ATV_AP_PHILIPS UV1316E/AIH-45 = ATV_AP_Tuner2

(Reserved)6 = ATV_CHINA_ALPS TEDE9-286B7 = ATV_CHINA_Tuner2 (Reserved)8 =

ATV_LATAM_PHILIPS UV1338/AIH-4 9 = ATV_LATAM_Tuner2 (Reserved)10 =

DTV_CHINA_Tuner1 (Reserved)11 = DTV_CHINA_Tuner2 (Reserved)12 = Not Used

(Reserved)13 = Not Used (Reserved)14 = Not Used (Reserved)15 = Not Used (Reserved)

Not Used (Reserved)

0 = Cabinet_Profile_26_LCD_ME7 1 = Cabinet_Profile_32_LCD_ME7 2 =

Cabinet_Profile_37_42_47_LCD_ME73 = Cabinet_Profile_42_50_PDP_ME7 4 =

Cabinet_Profile_26_LCD_ME5P5 - 32 = Reserved

Circuit Descriptions, Abbreviation List, and IC Data Sheets LC7.1E LA 9.

9. Circuit Descriptions, Abbreviation List, and IC Data Sheets

EN 73

Index of this chapter:

9.6 Memory addressing

9.7 Audio Processing

9.8 HDMI

9.9 Abbreviation List

9.10 IC Data Sheets

Notes:

• Only new circuits (circuits that are not published recently) are described.

• Figures can deviate slightly from the actual situation, due to different set executions.

• For a good understanding of the following circuit descriptions, please use the Wiring, Block (chapter 6) and

Circuit Diagrams (chapter 7). Where necessary, you will find a separate drawing for clarification.

9.1 Introduction

The LC7.x (development name “LC07”) is a new global chassis for the year 2007 (LC7.1 is the analogue range, LC7.2 is the digital range). It covers a screen size of 26 to 47 inch for LCD and 42 to 50 inch for Plasma sets with a new styling called

“ME7”. Some key components are:

• Audio: Sound processing is performed by a multi-standard sound processor MSP4450 (item 7411)

• Video: Video processing is performed by the Trident video processor SVP CV32-LF (item 7202).

For analogue reception, a standard IF demodulator is used, whereas digital input signals (DVB-T) are processed through a

COFDM channel decoder together with an MPEG decoder. A so-called “Reneas” microprocessor performs the control functionality.

Important features of this chassis are:

• AmbiLight: LED AmbiLight (where applicable) is introduced as the successor of glass-tube AmbiLight

• 1080p Full HD (where applicable).

EN 74 9.

9.1.1

SSB Cell Layout

LC7.1E LA Circuit Descriptions, Abbreviation List, and IC Data Sheets

DC-DC CONVERSION

AUDIO CLASS D

ANALOG TUNER

RENEAS uP

TRIDENT

VIDEO

PROC.

IF DEM

VIF SAW

SIF SAW

HDMI

H_16940_010.eps

060307

Figure 9-1 SSB top view

AUDIO CLASS D

MICRONAS

AUDIO PROC.

SDRAM

DC-DC CONVERSION

Figure 9-2 SSB bottom view

H_16940_011.eps

060307

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.2 LCD Power Supply

The Power Supply Unit (PSU) in this chassis is a buy-in and is a black-box for Service. When defective, a new panel must be ordered and the defective panel must be sent for repair, unless the main fuse of the unit is broken. Always replace the fuse with one with the correct specifications! This part is available in the regular market.

Three different PSU can be used in this chassis:

• 26 and 32 inch sets use a “Delta” PSU

• 37 and 42 inch sets use a “PPS” (Philips Power Solutions)

PSU

• 47 inch sets use a “Delta” PSU.

Figure “Overview of PSU connectivity” shows the connectivity of the Power Supply Unit with the other panels in the set.

LC7.1E LA 9.

EN 75

G_16860_051.eps

310107

Figure 9-3 Overview of PSU connectivity

All Power Supply Units deliver the following voltages to the chassis:

• +24 V to the inverters

• +12 V to SSB

• +12 V and -12 V to Audio Supply

• 12 V to Bolt-on Supply (where applicable)

• +5.2 V Standby voltage.

9.3 DC/DC converters

A switch generates the +5.2 V (+5V_SW) from the +5.2 V

(+5V_STANDBY) supply voltage. For LCD sets, this switch is mounted on-board the SSB. For PDP sets, this switch is mounted on the Power Supply Panel. This results in the

+5V_STANDBY (and +5V_SW for PDP sets) voltage(s), coming from the Power Supply Unit, is (are) used as input for the on-board DC/DC converters.

They deliver the following voltages to the board:

• +3.3 V (+3V3_STBY)

• +5.2 V (+5V_SW) (only for LCD sets)

• +1.8 V (+1V8S_SW)

• +34 V (+VTUN)

• +3.3 V (+3V3_SW)

• +3.3 V (+3V3_MOJO)

• +1.2 V (+1V2_MOJO)

An overview can be found in figure “DC-DC converter block diagram”.

Figure 9-4 DC-DC converter block diagram

G_16860_063.eps

310107

9.4 Front-End

This chassis uses different tuners depending on the region and execution. An overview of the different executions can be found in table “Tuner diversity”.

Table 9-1 Tuner diversity

Region

Europe

China

Latam

Tuner

TD1316AF

UV1318S

UV1316E

TEDE9

UV1338

Type hybrid analogue analogue analogue analogue

For a general outline of tuner applications in this chassis see figure “Tuner IF diagram”.

Tuner

Video

SAW filter

Audio

SAW filter

IF Demodulator

CVBS

2 nd SIF

RF AGC_analogue

RFAGC

4MHz

Supply

+5V/+33V Digital IF

36.16MHz

IF AGC

I2C

Switch IC

RF AGC_digital

I2C_analogue

I2C_digital

G_16860_054.eps

020207

Figure 9-5 Tuner IF diagram

In the LC7.1x chassis (analogue sets), the signal coming from the tuner is fed to the IF demodulator (through the SAW filters) and then passed to the Trident Video Processor.

In the LC7.2x chassis (digital sets), the TD1316AF hybrid tuner is used which is capable of receiving both analogue and digital

(DVB-T) signals. While receiving analogue signals, the signal coming from the tuner is fed to the IF demodulator (through the

SAW filters) and then passed to the Trident Video Processor.

While receiving digital signals, the signal coming from the tuner is first fed to the channel decoder, then to the MPEG decoder and then to the Trident Video Processor.

EN 76 9.

LC7.1E LA Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.4.1

Video IF Amplifier

The IF-filter is integrated in a SAW (Surface Acoustic Wave) filter. One for filtering IF-video (item 1102) and one for IF-audio

(item 1103). The type of these filters depends on the standard(s) received (region-dependency). Some filters can be switched to another standard, what makes them suitable for applications in multi-standard platforms. An overview of the

SAW filter diversity can be found in table “SAW filter diversity”.

Table 9-2 SAW filter diversity

SAW filter

OFWK3953M

OFWK9656M

OFWK7265L

OFWK9361L

OFWK3956L

OFWK3955L

OFWK9352L

OFWM1967L

Switching Y/N Region Video/Audio

No Europe Video

Yes

Europe

Audio

Video

China

LATAM

Sound

Video

Audio

Video/Audio

Pin number Description

11 n.c.

TV IF output

DC voltage (V)

The pin assignment of the hybrid tuner can be found in table

“Pin assignment hybrid tuner”.

Table 9-6 Pin assignment hybrid tuner

Pin number Description n.c.

DC voltage (V)

RF AGC voltage 3.3 - 4.5 (weak or no signal) < 3.3 (strong signal)

C-bus address select 0

SCL

SDA

0 to 3.3

4 MHz reference output supply voltage broadband IF output

±0.25

0 to 3 IF AGC voltage narrowband IF output narrowband IF output

Switching is done by the microcontroller via SAW_SW. In table

“SAW filter switching” is explained how to address the different system standards.

Table 9-3 SAW filter switching

Region

Europe

China

LATAM

SAW_SW

0 n.a.

System

L’ other systems

B/G, D/K, I

M/N

B/G, D/K, I

M/N

9.4.2

Automatic Gain Control

In the LC7.2x chassis (digital sets), the automatic gain control depends on if the set is receiving a digital or an analogue signal. During analogue reception, the hybrid tuner receives an external AGC voltage, coming from the demodulator, to perform automatic gain control. During digital reception, no external AGC voltage is used but the tuners internal AGC loop is used.

In the LC7.1x chassis (analogue sets), the tuner receives an external AGC voltage, coming from the demodulator, to perform automatic gain control.

The hybrid tuner TDA1316AF, used in Europe sets, needs to be switched between digital and analogue mode. This is done by the microcontroller via DVB_SW. Refer to table “Hybrid tuner digital/analogue switching” for details.

Table 9-4 Hybrid tuner digital/analogue switching

Region

Europe

DVB_SW

Mode analogue reception

Digital reception

9.5 Video Processing

The video processing is completely handled by the Trident SVP

CX32 video processor which features:

• CVBS-input for analogue signals

• RGB-input for digital (DVB-T) signals

• Motion and “edge-adaptive” deinterlacing

• Integrated ADC

• Built-in 8-bit LVDS transmitter

• Colour stretch

• Skin colour enhancement

• 3D Digital Comb Video Decoder

• Interlaced and Progressive Scan refresh

• Teletext decoding

• OSD and VBI/Closed Caption.

The pin assignment of all analogue tuners is equal and can be found in table “Pin assignment analogue tuners”.

Table 9-5 Pin assignment analogue tuners

Pin number Description

1 RF AGC voltage

DC voltage (V) n.c.

C-bus address select 0

3.3 - 4.5 (weak or no signal) < 3.3 (strong signal)

SCL

SDA n.c.

supply voltage

0 to 3.3

±0.25

n.c.

tuning supply voltage 33

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.5.1

Region-dependent applications

LC7.1E LA 9.

EN 77

S ID E A V

S C A R T 1

S C A R T 2

O n b o a r d E X T 3

E X T 4

H D M I2

A n a lo g u e

F r o n t E n d

C V B S _ R F

C V B S 1

S C 1 _ R _ IN

S C 1 _ G _ IN

S C 1 _ B _ IN

S C 1 _ C V B S _ IN

S C 1 _ F B L _ IN

P R _ R 2

Y _ G 2

P B _ B 2

P B _ B 3

F B 1

S C 2 _ Y _ C V B S _ IN

S C 2 _ C _ IN

P R _ R 3

F S 2

C V B S _ O U T 1

F R O N T _ Y _ C V B S _ IN _ T

F R O N T _ C _ IN _ T

Y _ G 3

T r id e n t

Video Processor

SVP CX32

H D _ Y _ IN

H D _ P B _ IN

H D _ P R _ IN

Y _ G 1

P B _ B 1

P R _ R 1

C V B S _ O U T 2

D i g i t a l F r o n t E n d

( D V B-T d e m o d u la to r a n d d e c o d e r)

IB O _ R _ IN

IB O _ G _ IN

IB O _ B _ IN

IB O _ C V B S _ IN

H D M I_ Y ( 0 :7 )

H D M I_ C b ( 0 :7 )

H D M I_ C r ( 0 :7 )

H D M I

D e c o d e r

P C _ R

P C _ G

P C _ B

F S 1

C V B S

S C A R T 1 M o n ito r o u t

S C A R T 2 M o n ito r o u t

H D M I1

G_16860_060.eps

310107

Figure 9-6 Block diagram video processing - EU version

“Block diagram video processing - EU version” shows the input and output signals to and from the Trident Video Processor in

EU applications.

The video processor also interfaces the SCART1 & 2 input, side AV, EXT4 (HD where applicable) and HDMI1 & 2 input.

Through the SCART1 & 2 connectors, a monitor output is foreseen.

During analogue reception, a CVBS signal coming from the analogue front-end is fed to the video processor via pin

CVBS1. During digital reception, the video signal coming from the MPEG decoder (MOJO) is fed to the video processor via pins FS1, PC_B, PC_G and PC_R.

S ID E A V

A V 1

A n a lo g u e

F ro n t E n d

C V B S _ R F

S C 2 _ Y _ C V B S _ IN

S C 2 _ C _ IN

C V B S 1

P R _ R 3

F S 2

F R O N T _ Y _ C V B S _ IN _ T

F R O N T _ C _ IN _ T

Y _ G 3

D M M I c o n n e c to r

C V I1

C V I2

P C V G A

D M M I Y P b P r IN

C V I Y P b P r

M U X

C V I_ D T V _ S E L

IB O _ R _ IN

IB O _ G _ IN

IB O _ B _ IN

IB O _ C V B S _ IN

H D _ Y _ IN

H D _ P B _ IN

H D _ P R _ IN

P C _ R

P C _ G

P C _ B

F S 1

T r i d e n t

V i d e o P r o c e s s o r

Y _ G 1

P B _ B 1

S V P C X 3 2

P R _ R 1

C V B S _ O U T 2

S C 1 _ R _ IN

S C 1 _ G _ IN

S C 1 _ B _ IN

P C _ V G A _ H

P C _ V G A _ V

P R _ R 2

Y _ G 2

P B _ B 2

A IN _ H S

A IN _ V S

H D M I2

H D M I

D e c o d e r

H D M I_ Y (0 :7 )

H D M I_ C b (0 :7 )

H D M I_ C r(0 :7 )

H D M I1

C V B S

G_16860_061.eps

310107

Figure 9-7 Block diagram video processing - AP version

C IN C H M o n ito r o u t

EN 78

9.6 Memory addressing

Figure “Memory block diagram” shows the interconnection between the microprocessor, the FLASH memory, the Trident

Video Processor and the SDRAM.

7311

Reneas microprocessor

LC7.1E LA Circuit Descriptions, Abbreviation List, and IC Data Sheets

“Block diagram video processing - AP version” shows the input and output signals to and from the Trident Video Processor in

AP applications.

During analogue reception, a CVBS signal coming from the analogue front-end is fed to the video processor via pin

CVBS1. No digital reception (DVB-T) reception is foreseen in

AP region. However, an internal DMMI connector is implemented for future digital reception applications in combination with IBO. CVI_DTV_SEL is a control signal from the microprocessor. When this signal is LOW, then the MUX passes the CVI1 YPbPr input signal to the Trident Video

Processor. When this signal is HIGH, then the YPbPr input signal coming from the DMMI connector is passed to the video processor. Currently, this signal is always LOW since no IBO is used.

The video processor also interfaces the AV1 and Side AV input, CVI2 (HD), VGA(PC), HDMI1 & 2. A cinch output connector for Monitor output is foreseen.

CPU_RST/WR/RD/CE

A[0:19]

D[0:7]

7310

1MB

Flash Memory

CS/WR/RD

7202

Trident CX

A[0:7]

D[0:7] CX_BA0/BA1/MCLK/

CLKE/CS0/RAS/CAS/WE

7204

CX_MA[0:11]

DQ[0:15]

8MB

SDRAM

CX_BA0/BA1/MCLK/

CLKE/CS0/RAS/CAS/WE

CX_MA[0:11]

DQ[16:31]

7205

8MB

SDRAM internal 40 ms (stereo) audio delay line (LIP SYNC) is foreseen and therefore no external delay line is necessary.

All internal clock signals are derived from an external

18.432 MHz oscillator, which, in NICAM or I

S-mode, on its turn is locked to the corresponding source.

The following functionality is included:

• Automatic Standard Detection (ASD) automatically detects the actual broadcasted TV standard

• Automatic Sound Select (ASS) automatically switches

(without any I

C-bus action) between mono/stereo/ bilingual mode when the broadcast mode changes.

9.7.1

Region-dependent applications

ANALOGUE

FRONT END

DVB / MOJO

(if present)

SCART 1 IN

SCART 2 IN

COMP IN

SIDE IN

HDMI IN

HDMI

2nd SIF

I2S1

AUDIO

DAC

SC1-IN

SC2-IN

SC3-IN

SC4-IN

SC5-IN

MSP 4450P

ANA_IN1+

DACM

I2S_DA_IN1

I2S_WS

I2S_CL

DACA

SC1-OUT

SC2-OUT

CLASS D

AMPLIFIER

LOUDSPEAKER

HP AMPLIFIER

SCART 1 OUT

SCART 2 OUT

G_16860_055.eps

090307

Figure 9-9 Block diagram audio processing - EU application

In EU applications, the MSP features:

• Sound IF input for signals coming from the analogue frontend

• Three I

S-inputs for signals (“DATA”, “CLK” and “WS”) coming from the MOJO in case of digital reception

• Five analogue inputs: for EXT1 to EXT4 and HDMI

• Loudspeaker output path

• Headphone output path

• SCART-1 output path (RF)

• SCART-2 output path (WYSIWYG = monitor).

Digital audio signals coming from HDMI sources are fed to a digital-to-analogue converter and then fed to the MSP.

In case of reception of digital TV signals, digital audio signals coming from the MOJO are directly fed to the MSP via the

I2S_DA_IN1, I2S_WS1 and I2S_CL1 lines. This ensures a

“true digital path”.

9.7

G_16860_062

220207

Figure 9-8 Memory block diagram

Control signals CPU_RST, WR, RD and CE, address lines

A[0:19] and data lines D[0:7] are used for transferring data between the microprocessor (item 7311) and the flash memory

(item 7310). Control signals CS, WR and RD, address lines

A[0:7] and data lines D[0:7] are used for transferring data between the Trident Video Processor (item 7202) and the microprocessor (item 7311). Control signals CX_BA0,

CX_BA1, CX_MCLK, CX_CLKE, CX_CS0, CX_RAS, CX_CAS and CX_WE, address lines CX_MA[0:11] and data lines

DQ[0:15] are used for transferring data between the Trident

Video Processor and the SDRAM ICs (items 7204 and 7205).

Audio Processing

The audio decoding is done entirely via the Multistandard

Sound Processor (MSP) 4450P (item 7411).

This processor covers the processing of both analogue and

(NICAM) digital input signals by processing the (analogue) IF signal-in to processed (analogue) AF-out (baseband audio). An

ANALOGUE

FRONT END

HDMI AUDIO

2nd SIF

I2S3

PC AUDIO IN

AV 2 IN

CVI 1 IN

AV 1 IN

CHINA DTV IN

CVI2 IN

AUDIO

MUX

** FOR AP ANALOGUE &

LATAM SET

MSP 4450P

ANA_IN1+

DACM

I2S_DA_IN3

I2S_WS3

I2S_CL3

DACA

SC1-IN

SC2-IN

SC3-IN

SC4-IN

SC5-IN

SC1-OUT

SC2-OUT

CLASS D

AMPLIFIER

LOUDSPEAKER

HEADPHONE

HP AMPLIFIER

MONITOR OUT

G_16860_056.eps

090307

Figure 9-10 Block diagram audio processing - AP application

In AP applications, the MSP features:

• Sound IF input for signals coming from the analogue frontend

Circuit Descriptions, Abbreviation List, and IC Data Sheets

• Three I

S-inputs for signals (“DATA”, “CLK” and “WS”) coming from the HDMI interface

• Five analogue inputs: for CVI1, CVI2, AV1, AV2, DTV

(China) and PC audio

• Loudspeaker output path

• Headphone output path

• Monitor output path (WYSIWYG).

Digital audio signals coming from HDMI sources are directly fed to the MSP via the I2S_DA_IN3, I2S_WS3 and I2S_CL3 lines. This ensures a “true digital path”.

In case of reception of digital TV signals, a multiplexer is used to switch between China DTV or DVI2 audio. In China sets, the audio signal coming from the DTV module is in analogue format. The output from the multiplexer is fed to the MSP via the SC5-input.

In both applications, the microprocessor (item 7311) controls the audio part with the following control lines:

• MUTEn: used to mute the Class D amplifiers

• ANTI_PLOP: used to detect any DC failure in the Class D amplifiers

• DC_PROT: used to detect any DC failure in the Class D amplifiers.

9.7.2

Audio Amplifier

The audio amplifier is an integrated class-D amplifier

(TDA8932T, item 7A01). It combines a good performance with a high efficiency, resulting in a big reduction in heat generation.

Principle

-V

G_16860_080.eps

020207

Figure 9-11 Principle Class-D Amplifier

The Class D amplifier works by varying the duty cycle of a

Pulse Width Modulated (PWM) signal.

By comparing the input voltage to a triangle wave, the amplifier increases duty cycle to increase output voltage, and decreases duty cycle to decrease output voltage.

The output transistors of a Class D amplifier switch from 'full off' to 'full on' (saturated) and then back again, spending very little time in the linear region in between. Therefore, very little power is lost to heat. If the transistors have a low 'on' resistance

(RDS(ON)), little voltage is dropped across them, further reducing losses.

A Low Pass Filter at the output passes only the average of the output wave, which is an amplified version of the input signal.

In order to keep the distortion low, negative feedback is applied.

The advantage of Class D is increased efficiency (= less heat dissipation). Class D amplifiers can drive the same output power as a Class AB amplifier using less supply current.

The disadvantage is the large output filter. The main reason for this filter is that the switching waveform results in maximum current flow. This causes more loss in the load, which causes lower efficiency. An LC filter with a cut-off frequency less than the Class D switching frequency, allows the switching current to flow through the filter instead of the load, thus reducing the overall loss and increasing the efficiency.

9.8

DC-protection

A DC-detection circuit is foreseen to protect the speakers. It is built around three transistors (items 7A05 to 7A07) and generates a protection signal (DC_PROT) to the microprocessor in case of a DC failure in the Class D amplifiers.

HDMI

LC7.1E LA 9.

EN 79

9.8.1

Introduction

Note: Text below is an excerpt from the ”HDMI Specification” that is issued by the HDMI founders (see http://www.hdmi.org).

The High-Definition Multimedia Interface is developed for transmitting digital signals from DVD players, set-top boxes and other audiovisual sources to television sets, projectors and other video displays.

HDMI can carry high quality multi-channel audio data and can carry all standard and high-definition consumer electronics video formats. Content protection technology is available.

HDMI can also carry control and status information in both directions.

HDMI is backward compatible with DVI (1.0). Compared with

DVI, HDMI offers extra:

• YUV 4:4:4 (3 x 8-bit) or 4:2:2 (up to 2 x 12-bit), where DVI offers only RGB 4:4:4 (3 x 8 bit).

• Digital audio in CD quality (16-bit, 32/44.1/48 kHz), higher quality available (8 channels, 192 kHz).

• Remote control via CEC bus (Consumer Electronics

Control): allows user to control all HDMI devices with the

TV's remote control and menus.

• Smaller connector (SCART successor).

• Less cables: e.g. from 10 audio/9 video cables to 3 HDMI cables.

9.8.2

Implementation

The IC used is the Sil 9025 (Silicon Image) third generation

HDMI receiver, item 7817 on the SSB.

It has the following features:

• Dual HDMI input connector

• Two EEPROMS to support EDID

• HDMI audio

• I 2 S output to low-cost DACs which operate at a frequency of 32 to 192 kHz

• Integrated HDCP decryption engine

• Built-in pre-programmed HDCP keys for highest level of copy-protection security

• Colour space conversion RGB to YCbCr

• “Hot Plug Reset” signal.

Figure “HDMI implementation” shows the HDMI configuration in this chassis.

EN 80 9.

LC7.1E LA

HDMI 1

HDMI 2

EDID

Hot plug

Reset

DDC Reset

(Port 1)

DDC_RESET

RST

I2C

HDMI

Receiver

Sil9025

(Port 2)

Microprocessor

Data Enable

HDMI CLK

Trident

24 bits YCbCr 4:4:4

CX32

H and V Sync

I2S

I2S DAC

HDMI_Audio LR

COMP_AUDIO LR for DVI audio input only

Figure 9-12 HDMI implementation

Audio Processor

Micronas MSP4450P

G_16860_078.eps

010207

HDMI connectors 1 and 2 are connected to resp. ports 1 and 2 of the HDMI receiver. The ports cannot be activated at the same moment. Switching is controlled by software.

“Hot Plug Reset” and “DDC Reset” are controlled by the microprocessor.

The HDMI receiver will convert all RGB or YCbCr 4:2:2 signals to 24-bit YCbCr 4:4:4. When it receives a YCbCr 4:4:4 signal it will just pass the signal directly to the Trident Video Processor.

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.9 Abbreviation List

1080i

1080p

2CS

2DNR

3DNR

480i

480p

AARA

ACI

ADC

AFC

AGC

AUO

ASD

B/G

BTSC

CAM

CBA

CEC

CLUT

ComPair

COFDM

CSM

CVBS

CVBS-MON

CVBS-TER-OUT

CVI

DAC

DBE

DDC

DFU

DNR

DRAM

DSP

DST

DTS

DVB(T)

DVD

DVI

1080 visible lines, interlaced

1080 visible lines, progressive scan

2 Carrier Sound

Spatial (2D) Noise Reduction

Temporal (3D) Noise Reduction

480 visible lines, interlaced

480 visible lines, progressive scan

Automatic Aspect Ratio Adaptation: algorithm that adapts aspect ratio to remove horizontal black bars; keeping up the original aspect ratio

Automatic Channel Installation: algorithm that installs TV channels directly from a cable network by means of a predefined TXT page analogue to Digital Converter

Automatic Frequency Control: control signal used to tune to the correct frequency

Automatic Gain Control: algorithm that controls the video input of the feature box

Amplitude Modulation

Acer Unipack Optronics

Asia Pacific

Aspect Ratio: 4 by 3 or 16 by 9

Automatic Standard Detection

Audio Video

Monochrome TV system. Sound carrier distance is 5.5 MHz

Broadcast Television System

Committee

Conditional Access Module

Circuit Board Assembly (or PWB)

Consumer Electronics Control bus; remote control bus on HDMI connections

Common Interface; E.g PCMCIA slot for a CAM in a set top box

Constant Level: audio output to connect with an external amplifier

Colour Look Up Table

Computer aided rePair

Coded Orthogonal Frequency Division

Multiplexing; A multiplexing technique that distributes the data to be transmitted over many carriers

Customer Service Mode

Composite Video Blanking and

Synchronisation

CVBS monitor signal

CVBS terrestrial out

Component Video Input

Digital to analogue Converter

Dynamic Bass Enhancement: extra low frequency amplification

Display Data Channel; is a part of the

"Plug and Play" feature

Directions For Use: owner's manual

Dynamic Noise Reduction

Dynamic RAM

Digital Signal Processing

Dealer Service Tool: special

(European) remote control designed for service technicians

Digital Theatre Sound

Digital Video Broadcast; An MPEG2 based standard for transmitting digital audio and video. T= Terrestrial

Digital Versatile Disc

Digital Visual Interface

Double Window

EDID

EEPROM

EXT

FBL

FBL-TXT

FLASH

FMR

FRC

FTV

HDCP

HDMI

I2C

I2S

IBO(Z)

IRQ

Last Status

LATAM

LC07

LCD

LED

L/L'

LPL

LVDS

M/N

MOSFET

MPEG

MSP

MUTE

NAFTA

Circuit Descriptions, Abbreviation List, and IC Data Sheets

NICAM Enhanced Definition: 480p, 576p

Extended Display Identification Data

(VESA standard)

Electrically Erasable and

Programmable Read Only Memory

EUrope

EXTernal (source), entering the set by

SCART or by cinches (jacks)

Fast Blanking: DC signal accompanying RGB signals

Fast Blanking Teletext

FLASH memory

Field Memory / Frequency Modulation

FM Radio

Frame Rate Converter

Flat TeleVision

H_sync to the module

High Definition: 720p, 1080i, 1080p

High-bandwidth Digital Content

Protection; A "key" encoded into the

HDMI/DVI signal that prevents video data piracy. If a source is HDCP coded and connected via HDMI/DVI without the proper HDCP decoding, the picture is put into a "snow vision" mode or changed to a low resolution.

For normal content distribution, the source and the display device must be enabled for HDCP "software key" decoding

High Definition Multimedia Interface, digital audio and video interface

Head Phone

Monochrome TV system. Sound carrier distance is 6.0 MHz

Integrated IC bus

Integrated IC Sound bus

Intelligent Bolt On module. Z= Zapper; module for DVB reception.

Integrated Circuit

Intermediate Frequency

Infra Red

Interrupt ReQuest

The settings last chosen by the customer and read and stored in RAM or in the NVM. They are called at startup of the set to configure it according the customers wishes

LATin AMerica

Philips chassis name for LCD TV 2007 project

Liquid Crystal Display

Light Emitting Diode

Monochrome TV system. Sound carrier distance is 6.5 MHz. L' is Band

I, L is all bands except for Band I

LG Philips LCD

Loud Speaker

Low Voltage Differential Signalling, data transmission system for high speed and low EMI communication.

Monochrome TV system. Sound carrier distance is 4.5 MHz

Metal Oxide Semiconductor Field

Effect Transistor

Motion Pictures Experts Group

Multi-standard Sound Processor: ITT sound decoder

MUTE Line

North American Free Trade

Association: Trade agreement between Canada, USA and Mexico

Not Connected

NTSC

PCB

PDP

PIG

PIP

PLL

NVM

O/C

ON/OFF LED

OAD

OSD

PAL

PSU

PWB

RAM

RC5 (6)

RGB

RGBHV

ROM

SAM

SC1-OUT

SC2-OUT

S/C

SCL

SDA

SDI

SDM

SDRAM

SECAM

SIF

SMPS

SND

SOPS

S/PDIF

SRAM

SSB

STBY

SVHS

THD

TXT uP

LC7.1E LA 9.

EN 81

Near Instantaneous Compounded

Audio Multiplexing. This is a digital sound system, used mainly in Europe.

National Television Standard

Committee. Colour system used mainly in North America and Japan.

Colour carrier NTSC M/N = 3.579545

MHz, NTSC 4.43 = 4.433619 MHz

(this is a VCR norm, it is not transmitted off-air)

Non Volatile Memory: IC containing

TV related data (for example, options)

Open Circuit

On/Off control signal for the LED

Over the Air Download

On Screen Display

Phase Alternating Line. Colour system used mainly in Western Europe

(colour carrier = 4.433619 MHz) and

South America (colour carrier PAL M =

3.575612 MHz and PAL N = 3.582056

MHz)

Personal Computer

Printed Circuit Board (or PWB)

Plasma Display Panel

Picture In Graphic

Picture In Picture

Phase Locked Loop. Used, for example, in FST tuning systems. The customer can directly provide the desired frequency

Power Supply Unit

Printed Wiring Board (or PCB)

Random Access Memory

Remote Control transmitter

Remote Control system 5 (6), the signal from the remote control receiver

Radio Frequency

Red, Green, and Blue. The primary colour signals for TV. By mixing levels of R, G, and B, all colours (Y/C) are reproduced.

Red, Green, Blue, Horizontal sync, and Vertical sync

Read Only Memory

Service Alignment Mode

SandCastle: two-level pulse derived from sync signals

SCART output of the MSP audio IC

Short Circuit

Clock signal on I2C bus

Standard Definition: 480i, 576i

Data signal on I2C bus

Samsung Display Industry

Service Default Mode

Synchronous DRAM

SEequence Couleur Avec Memoire.

Colour system used mainly in France and Eastern Europe. Colour carriers =

4.406250 MHz and 4.250000 MHz

Sound Intermediate Frequency

Switch Mode Power Supply

SouND

Self Oscillating Power Supply

Sony Philips Digital InterFace

Static RAM

Small Signal Board

Stand-by

Super Video Home System

Sub Woofer / SoftWare

Total Harmonic Distortion

TeleteXT

Microprocessor

EN 82 9.

VCR

VGA

WYSIWYR

XTAL

YPbPr

Y/C

Y-OUT

YUV

LC7.1E LA Circuit Descriptions, Abbreviation List, and IC Data Sheets

Variable Level out: processed audio output toward external amplifier

Video Cassette Recorder

Video Graphics Array

Watch Dog

What You See Is What You Record: record selection that follows main picture and sound

Quartz crystal

Component video (Y= Luminance, Pb/

Pr= Colour difference signals B-Y and

R-Y, other amplitudes w.r.t. to YUV)

Video related signals: Y consists of luminance signal, blanking level and sync; C consists of colour signal.

Luminance-signal

Baseband component video (Y=

Luminance, U/V= Colour difference signals)

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.10 IC Data Sheets

This section shows the internal block diagrams and pin layouts of ICs that are drawn as "black boxes" in the electrical diagrams

(with the exception of "memory" and "logic" ICs).

9.10.1 Diagram B06C, Type SIL9025CTU(IC7817) (HDMI)

LC7.1E LA 9.

EN 83

Block Diagram

Pin Configuration

G_16860_073.eps

300107

Figure 9-13 Internal block diagram and pin configuration

EN 84 9.

LC7.1E LA Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.10.2 Diagram B06C, Type UDA1334ATS (IC7810) (audio DAC)

Block Diagram

BCK

DATAI

SYSCLK/PLL1

MUTE

DEEM/CLKOUT

UDA1334ATS

VDDD

DIGITAL INTERFACE

DE-EMPHASIS

INTERPOLATION FILTER

NOISE SHAPER

VSSD

PLL0

PLL

VOUTL

14 DAC DAC

VDDA

VSSA

Vref(DAC)

SFOR1

SFOR0

VOUTR

Pin Configuration

BCK 1

WS 2

DATAI 3

16 VOUTR

15 VSSA

14 VOUTL

VDDD

VSSD

UDA1334ATS

VDDA

Vref(DAC)

SYSCLK/PLL1 6 11 SFOR0

SFOR1 7

MUTE 8

10 PLL0

9 DEEM/CLKOUT

G_16860_081.eps

220207

Figure 9-14 Internal block diagram and pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.10.3 Diagram B07, Type TDA8932T (IC7A01) (audio amplifier)

LC7.1E LA

Block Diagram

O S C R E F O S C I O

1 0 3 1

IN1P

OSCILLATOR

SSD

IN1N

INREF

IN2P

PWM

MODULATOR

MANAGER

DDA

CTRL

PWM

MODULATOR

CTRL

IN2N

PROTECTIONS:

OVP, OCP, OTP,

UVP, TF, WP

DIAG

CGND

POWERUP

MODE

DRIVER

HIGH

DRIVER

LOW

DRIVER

HIGH

DRIVER

LOW

DDA

STABILIZER 11 V

SSP1

DDA

STABILIZER 11 V

SSP2

REGULATOR 5 V

SSD

ENGAGE

DDA

HVPREF

HVP1

HVP2 TEST

TDA8932

SSA

HALF SUPPLY VOLTAGE

Pin Configuration

SSA

1, 16, 17, 32

SSD(HW)

I N 1 P

I N 1 N

D I A G

E N G A G E

P O W E R U P

C G N D

DDA

SSA

OSCREF

H V P R E F

I N R E F

T E S T

I N 2 N

I N 2 P

SSD(HW)

TDA8932T

SSD(HW)

O S C I O

H V P 1

DDP1

B O O T 1

27 O U T 1

SSP1

STAB1

STAB2

SSP2

O U T 2

B O O T 2

DDP2

H V P 2

D R E F

SSD(HW)

BOOT1

DDP1

OUT1

SSP1

BOOT2

DDP2

OUT2

SSP2

STAB1

STAB2

DREF

G_16860_045.eps

300107

Figure 9-15 Internal block diagram and pin configuration

EN 85

EN 86 9.

LC7.1E LA Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.10.4 Diagram B04B, Type SVP CX32 (IC7202) (Trident video processor)

Block Diagram

SDR

16/32

5 CVBS

2 Chroma

PC RGB x 1

(up to SXGA 60Hz)

Ypbpr x 2 (up to 1080i)

ADC

UMAC

Memory Control

3D Video

Decoder

3D motion

Deinterlacer

ASS/DSS

Dynamic

Contrast

Noise

Reduction

6th

Generation

Scaler

CRTC

10bit Gama

LCD Over

Drive

CSC

Sharpness

Control

24bit Digital or 8/10 bit

CCIR656/601

Din_portD

(24bit)

VBI

Slicer

ICSC

OSD

Engine

Color

Management

8bit Single

LVDS Tx

LVDS Out

MCU

Interface

8/16 bit

CPU bus

External

MCU

GPIO

I2C

PWM

CVBS_OUT

CVBS Out

Pin Configuration

179

180

181

182

183

184

185

186

172

173

174

175

176

177

178

164

165

166

167

168

169

170

171

157

158

159

160

161

162

163

196

197

198

199

200

201

202

203

187

188

189

190

191

192

193

194

195

204

205

206

207

208 r

TESTMODE

AIN_HS

AIN_VS

VDDC

VSSC

CVBS_OUT2

CVBS_OUT1

AVSS_OUTBUF

AVDD3_OUTBUF

AVDD3_BG_ASS

AVSS_BG_ASS

AVDD3_ADC1

CVBS1

FS2

FS1

FB2

FB1

VREFP_1

VREFN_1

AVSS_ADC1

AVDD_ADC1

AVDD_ADC4

AVSS_ADC4

Y_G1

Y_G2

Y_G3

PC_G

VREFP_2

VREFN_2

AVDD_ADC2

AVSS_ADC2

PR_R1

PR_R2

PR_R3

PC_R

AVDD_ADC3

AVSS_ADC3

AVDD3_AD2

PB_B1

PB_B2

PB_B3

PC_B

PDVDD

PDVSS

PAVDD

PAVSS

XTALO

XTALI

PAVSS1

MLF1

PAVDD1

SVP TM CX32

MD19

MD20

MD21

MS22

MD23

VSSM

VDDM

VSSC

VDDC

MD24

MD25

MD26

MD27

MD28

MD29

MD30

MD31

VDDH

ADDR7

ADDR6

ADDR5

ADDR4

ADDR3

ADDR2

ADDR1

ADDR0

RD#

WR#

GPIO0

GPIO1

SDA

SCL

INTN

PWM0

VSSC

VDDC

DQM3

RESET

V5SF

ALE

A_D0

A_D1

A_D2

A_D3

A_D4

A_D5

A_D6

A_D7

VSSC

VDDC

VSSH

104

103

102

101

100

G_16860_042.eps

220207

Figure 9-16 Internal block diagram and pin configuration

Circuit Descriptions, Abbreviation List, and IC Data Sheets

9.10.5 Diagram B04C, Type MSP4450P (IC7411) (Micronas sound processor)

LC7.1E LA 9.

EN 87

Block Diagram

Sound IF1

Sound IF2

Demodulator

Preprocessing

S5 internal / external

Audio Delay

(2..8-channel)

Surround

Processing

SCART1

SCART2

SCART3

SCART4

SCART5

SCART

DSP

Input

Select

Loudspeaker

Sound

Processing

DAC/

High-

Resolution

PWM

Center

Subwoofer

Headphone

Sound

Processing

DAC Headphone

S/PDIF

DAC

SCART

Output

Select

SCART1

SCART2

SCART3

G_16860_041.eps

300107

Figure 9-17 Internal block diagram

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Key features

66 cm (26")
1366 x 768 pixels 16:9
500 cd/m² 8 ms

Frequently asked questions

The TV has a built-in tuner for receiving both analog and digital television signals. You can use an analog or digital antenna to connect the TV to your cable or satellite provider.

The TV supports a variety of video and audio inputs, including SCART (video/audio), component video (YPbPr), composite video (CVBS), S-Video and HDMI (video/audio).

The remote control is used to change channels, adjust the volume, access the on-screen menu and more. Refer to the user manual for detailed instructions on how to use the remote control.

Colour Television

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Chassis

LA

Contents Page

Contents Page

1.

Technical Specifications, Connections, and Chassis Overview

1.1

Technical Specifications

1.2

Connection Overview

1.3

Chassis Overview

2.

Safety Instructions, Warnings, and Notes

2.1

Safety Instructions

2.2

Warnings

2.3

Notes

S

3.

Directions for Use

4.

Mechanical Instructions

4.1

Cable Dressing

4.2

Service Positions

4.3

Assy/Panel Removal

4.4

Set Re-assembly

5.

Service Modes, Error Codes, and Fault Finding

5.1

Test Points

5.2

Service Modes

5.3

Service Tools

5.4

Error Codes

5.5

The Blinking LED Procedure

5.6

5.7

TV Main Software Upgrade

Fault Finding and Repair Tips

SEMISTANDBY/ STANDBY

Power Down INT:

AC OFF or Transient INT

Notes:

1. Power Down INT will be based on fall edge triggering

2. +3V3STBY will stay for 15ms, software must perform

WriteProtect for NVM within 15ms.

DC_PROT INT

6.

Block Diagrams, Test Point Overview, and Waveforms

Wiring Diagram 32”

WIRING 32” LCD

LCD DISPLAY

SUPPLY

INVERTER

INVERTER

Wiring Diagram 37”-42”

WIRING 37”- 42” LCD

INVERTER

LCD DISPLAY

SUPPLY

INVERTER

Block Diagram Supply

SUPPLY 32” LCD

Block Diagram Video

DEMODULATOR

VIDEO

PROCESSOR

Block Diagram Audio

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