Samsung LTM 1775W Specifications

CONFIDENTIAL
TFT-LCD TV/MONITOR
Chassis
NK15N*
NK17N*
Training
TFT-LCD TV/MONITOR
Model
LTM1575W
LTM1775W
Manual
CONTENTS
1. Introduction of TFT-LCD
2. Specifications
3. Alignment & Adjustments
4. Block Diagram
5. Troubleshooting
6. IC Specifications
7. Samsung LCD TV's sales points
8. General Informations of LCD
9. Schematic Diagrams
Visual Media Division Global CS Team
Quality Assurance Group
Samsung Electronics Co.,Ltd.
416, Maetan-3Dong, Paldal-Gu, Suwon City, Kyungki-Do, Korea.
Printed in Korea
Published by S.K.Yang / Manager of VD Division
May 2002
CONFIDENTIAL
2. Product Specifications
1 Specifications
Description
Item
LTM1575W
LTM1775W
LCD Panel
TFT-LCD panel, RGB vertical stripe, normaly
white, 15-Inch viewable, 0.2895 mm pixel pitch
TFT-LCD panel, RGB vertical stripe, normaly
white, 17-Inch viewable, 0.2895 mm pixel pitch
Scanning Frequency
Horizontal : 30 kHz ~ 61 kHz (Automatic)
Vertical : 56 Hz ~ 75 Hz (Automatic)
Display Colors
16.2 Million colors
Maximum Resolution
Horizontal : 1280 Pixels
Vertical : 768 Pixels
Input Video Signal
Analog 0.7 Vp-p ± 5% positive at 75 Ω, internally terminated
Input Sync Signal
Type : Seperate H/V
Level : TTL level
Maximum Pixel Clock rate
80 MHz
80 MHz
Active Display
Horizontal/Vertical
368.0 mm / 236.0 mm
370.560 mm / 222.336 mm
AC power voltage & Frequency
AC 90 ~ 264 Volts, 60 / 50 Hz ± 3 Hz
Power Consumption
50 W (Max)
Dimensions
Unit (W x D x H)
Carton (W x D x H)
19.6 x 8.0 x 14.7 Inches (498 x 204.5 x 374 mm) 21.1 x 8.0 x 15.8 Inches (536 x 204.5 x 402 mm)
22.5 x 17.4 x 10.6 Inches (571 x 441 x 269 mm) 24.0 x 18.3 x 10.6 Inches (609 x 465 x 269 mm)
Weight
3.95 Kg (8.7 Ibs)
Environmental Considerations
Operating Temperature : 50 °F ~ 104 °F (10 °C ~ 40 °C)
Humidity : 10 % ~ 80 %
Storage Temperature : -4 °F ~ 113 °F (-20 °C ~ 45 °C)
Humidity : 5 % ~ 95 %
TV System
Antena Input
53 W (Max)
Tunning
Frequency Synthesize
System
NTSC-M
Sound
STEREO
75Ω, Coaxial Cable
– MAX Internal speaker Out : Right => 3W
Left => 3W
Sound Characteristic
– BASS Control Range : -12 dB~ + 12 dB
– TREBLE Control Range : -12 dB~ + 12 dB
– Headphone Out: 5mW max (400m Vrms)
– Output Frequency : RF => 80 Hz ~ 15 kHz
A/V => 80 Hz ~ 15 kHz
LTM1575W/LTM1775W
4.8 Kg (10.6 Ibs)
Right => 5W
Left => 5W
CONFIDENTIAL
Product Specifications
2 Pin Assignments
2-1 D-SUB
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
2-2 DVD, DTV
Separate
Red
Green
Blue
GND
GND (DDC Return)
GND-Red
GND-Green
GND-Blue
No Connection
GND-Sync./Self Test
GND
DDC Data
H-Sync.
V-Sync.
DDC Clock
Y
RCA Green
GND
Pb (Cb)
RCA Blue
GND
Pr (Cr)
RCA Red
GND
Audio L
RCA White
GND
Audio R
RCA Red
GND
2-4 A/V
2-3 S-Video
Pin
Separate
1
2
3
4
5
GND
Y
C
GND
GND
RCA Yellow
CVBS
Audio L
RCA White
GND
Audio R
RCA Red
GND
LTM1575W/LTM1775W
CONFIDENTIAL
Product Specifications
3 Timing Chart
This section of the service manual describes the timing that the computer industry recognizes as standard
for computer-generated video signals.
3-1 LCD Panel Mode : 1 mode
µs
µs
µs
µs
µs
µs
µs
µs
LTM1575W/LTM1775W
CONFIDENTIAL
Product Specifications
3-2 Supported Modes (1)
µs
µs
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µs
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µs
µs
LTM1575W/LTM1775W
CONFIDENTIAL
Product Specifications
3-2 Supported Modes (2)
µs
µs
µs
µs
µs
µs
µs
µs
LTM1575W/LTM1775W
µs
µs
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CONFIDENTIAL
Product Specifications
3-2 Supported Modes (3)
µs
µs
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µs
µs
µs
µs
µs
2-6
µs
µs
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µs
µs
µs
µs
µs
LTM1575W/LTM1775W
Alignments and Adjustments
3. Factory Mode Adjustments
1 Entering Factory Mode
1. To enter “Service Mode” Press the remote -control keys in this sequence :
- If you do not have Factory remote - control
- If you have Factory remote - control
2 Factory Mode Tree
LTM1575W/LTM1775W
Alignments and Adjustments
LTM1575W/LTM1775W
■
The Block diagram of TFT-LCD Monitor Main Board
FRC
SDRAM
Scaler
OSD
IAMGE
CONTROL
L
V
D
S
To Panel
Inverter
To Func. Brd.
Micom
ADC
EEP
ROM
To LED & IR.
To Panel
Ctr. Board
from
CVBS
S-video
H-PHONE
Power
From Power Adapter
From
DVD
From
DTV
From
PC
From
R/F
Data Path
■
Analog To Digital Converting
255
254
253
ADC
.
.
.
2
1
0
T1 T2 T3 T4 T5 T6 T7 T8
■
T1
T2
.
.
T5
.
.
T7
: 0
: 2
■ ADC(Analog to Digital Converter)
: 255
It is a device to convert analog
signal to digital signal and applied
80MHz-120MHz
: 2
FRC(Frame Rate Conversion):
■ FRC(Frame Rate Controller) :
It is a converting part/method that constantly
converts the various vertical frequencies (50-95Hz)
of various modes inputted in diversity.
75
60
56
FRC
60
■
Scaling concept: It converts the resolution signal inputted in various forms to WXGA 1280x768
We have an
historic
mission
national
of
restoration
mission
■
Scaling
We have an historic
mission of national
restoration
■ Image Scaler :
A technique to change the inputted
resolution to the other resolution.
( EX.
640x480 → 1024x768 )
mission
Fine adjustment
c:\program
files...\pc2.wmf
■ FINE :
Adjustment of the monitor's
distinction by adjusting the
positional difference between
video signal and video clock.
■
Adjustment of Coarse
c:\program
files...\pc2.wmf
■ COARSE :
(Fine adjustment of a video clock for matching video clocks occurred between inputted video band and PLL)
NIKE-LCD TV NTSC BLOCK DIAGRAM
Tuner
Sound AMP
MSP3421
TCPJ9081PA27D
CN808
L
TA1101B
RESET
IC501
IC919
(KIA7029)
IC604
I2C
SDA55xx
( Micom)
(1Mbyte)
Caption
TTX
EEPROM
IC601
IC603
EPROM
IC620
Video In
▶
▶
▶
▶
▶
V-in
L-in
R-in
S-Y
S-C
Y/C
Vin
COMPONENT
(480i/p)
▶
▶
▶
▶
▶
Comp-Y
Comp-Pb
Comp-Pr
L
R
I2C
CVBS
Y/Pb/Pr(480i)
480I/P,720P,1080I
X201
14.3MHZ
COMPONENT
(480p,720P1
080i )
▶
▶
▶
▶
▶
Comp-Y
Comp-Pb
Comp-Pr
L
R
CXA2151
- V_Switch
- Sync Sep.
IC404
BA7657
AD9883A
V/Sync
Switch
- ADC
IC403
R,G,B/H,V
DP-TV(3D)
- Deinterlacer
/Scaler
- ADC & DAC
- Switch
- 3D_Comb
- Decoder
- MPIP
- IPQ
- OSD/Caption
- 208PQFP
IC350
IC200
MN82860
CK
R/G/B
YpbPr
-
ADC(3CH)
Matrix
δCorrection
D_Switch
AI
PQI
IC300
SGRAM
(2Mbit)
IC210
PC input
▶
▶
◁
▶
▶
SGRAM
(2Mbit)
R/G/B
H/V
DDC
L
R
Ear-phone
◁ L/ R
IC211
TDA7050T
IC530
R
LVDS
DS90C385
CK
IC901
PANEL
171W1
153W1
Block Diagrams
■
NIKE LCD-TV NTSC adjustment RESISTOR
Input analog
LVDS
p.4 05h Noise threshold
p.4 08h Luma contrast
p.4 09h Luma brightness
RF/CVBS/S-VHS
p.4 0AhChroma Saturation
p.4 0Bh Chroma hue
phase
p.4 0Ch Chroma AGC
Main Display
p.1 1Fh Brightness
p.1 20h[5:0] Contrast
p.1 27h[4:0] sat sin
p.1 28h[4:0] sat cos
DVD 480I/P
Synthesis
DTV 1080i
sw
p.5 65h Pb scale
AD9883 DVD/DTV/PC
p.5 66h Pr scale
08h R gain /Cr gain
p.5 67h Y scale
09h G gain /Y gain
p.5 6Ah Blanking
0Ah B gain /Cb gain
level1
0Bh R cut /Cr offset
PC
DPTV output
DAC
p.5 3Eh Y offset
DTV 480p
DTV 720p
MN82860
p.1 21h Black level
p.5 6Bh Blanking
0Ch G cut / Y offset
PIP Display
0Dh B cut/ Cb offset
p.1 6Fh Brightness
p.1 70h[5:0] Contrast
p.1 71h Black level
p.1 77h[4:0] sat sin
p.1 78h[4:0] sat cos
level2
2Eh Sharpness
31h Tint
34h Color
33h Contrast
36h Brightness
3Bh R gain
3Ch G gain
3Dh B gain
3Eh R cutoff
3Fh G cutoff
40h B cutoff
44-4Bh R gamma
53-5Ah G gamma
62-69h B gamma
71h[2] R gamma
71h[1] G gamma
71h[0] B gamma
IC300
1.Full white level setting
1) Pattern in use: full white (100% IRE)
(1)CVBS (Measured at AV JECK)
1V P-P
Input terminal: SIDE AV,VIDEO
(3) Controlled by measuring instrument : video gain 140％(100％IRE)
-When video gain is 100%, it is 70%IRE.
(2)
(TOCHIBA PATTERN)
2)MN82860 GAMMA : OFF
(1) iw dc 71 07
iw dc 71 00
GAMMA DATA(GAMMA OFF)
MN82860 SUB ADRESS
GAMMA ON
Order MN82860 SLAVE ADRESS
3) Highlight adjustment (x:282 y:283 T:10,000K)
Pattern adjustment : FULL WHITE PATTERN (VIDEO GAIN 140％)
-.After it is inputted at chassis to panel with RGB Full Gain, it can be
adjusted to the coordinates where you wish by using CA110.
(2)Adjustment address and adjustment
iw dc 3e ?? -->RED GAIN (X value adjustment)
iw dc 3f ?? -->GREEN GAIN (Y value adjustment)
iw dc 40 FF -->BLUE GAIN (Y value adjustment) -->FIX
-. The ratio of input/output is outputted 1:1 at MN82860 when RGB gain
value is FF.
-.Among characters of the RGB reproduction, a character of blue reproduction
is the lowest. If you want to have white coordinates, you must output the
blue higher at chassis.
(3) The reason why gamma has to be off at 2)
-The RGB Gain has to be adjusted in the state of gamma-Off because
the MN82860 gamma correction is located at the end of column
after adjustment of RGB cut-off and gain.
-.After the gamma correction is set finally, the RGB Gain has to be
adjusted in the state of gamma-On for production.
(1)
2. Set the low light level
1)
Pattern in use: Toshiba ABL pattern Low Light Area
(1)Turn On the gamma correction of NM82860.(iw dc 71 00)
-There was a trial and error.
In the state of gamma-off, the Toshiba pattern's cut-off
is broken down because the gray pattern touches the gamma.
Therefore, it is necessary to align the Cut-off of the Toshiba pattern to the first/second row
of the gray pattern.
gray pattern.
However, do not touch the data of cut-off when you adjust the
(Please, refer to the previous page for data address of cut-off)
Therefore, for the adjustment, turn on the gamma.
(2)Adjustment of Low-light(x:282 y:283 Y: about 4.5 (10.000k)-->
Until the 6th row of the Toshiba pattern can be seen)
iw dc 3b ?? -->RED CUT-OFF (x value adjustment)
iw dc 3c ?? -->GREEN CUT-OFF (y value adjustment)
iw dc 3d 80 -->BLUE CUT-OFF (Y value adjustment) -->FIX
-Set the blue to maximum due to its low reproduction.
(3)Adjustment with ignoring the highlight data
- The maximum luminance is determined with IRE 100% full white pattern.
-The highlight luminance of the Toshiba ABL pattern cannot be maximum luminance due to its
luminance is IRE 70%.
3.Final Adjustment Method
1)Repeat the adjustment of 1 and 2 till it is matched with adjustment spec. Nevertheless, the output voltage
[1V~0.9V] has to be measured with scope when moving to the full white, and then adjust the gain.
(Refer to the 1.)
*Method of the panel gamma setting*
1)Set the maximum value not to occur the white saturation in panel by using out sources such as
DVD, etc.
(1)17": A0
(2)15": D0
4.Method of the RGB gamma setting
1)Pattern in use : 100％IRE의 GREY-SCALE PATTERN
2)Adjustment of sub address : MN82860
(1)GREEN GAMMA GAIN FIX : ALL 40
(2) R, G, and B data about the sub address (Green is fixed, so adjust read and blue)
SUB ADDRESS
44
RED
SUB ADDRESS
62
BLUE
SUB ADDRESS
53
GREEN
40
45
63
54
40
46
47
64
65
55
56
40
40
48
66
57
40
49
4A
67
68
58
59
40
40
4B
69
5A
40
FIX
3)The adjustment sequence of the gray scale
(1) Drive the 11 gray patterns
(2) Measured the input/output gain voltage (Adjust the video gain to 100%)
-->point :dptv의 G-OUT (R315)
* As mentioned above, check the gain voltage when you change
the pattern, then adjust. *
0.9v~
1v
(3)After perform the factory mode, spread the gamma data.(iw dc 71 00) (4)Adjust the each steps
to match with the adjustment spec (x:282, y:283)
-Adjust by using the sub address in
Do not adjust
45 & 63
the above.
46 & 64
47 & 66
49 & 67
4a & 69
(black)
(white)
44 & 62
45 & 63
47 & 65
48 & 67
49 & 68
(cut-off)
-When you adjust the each step, do not affect to the next steps.
(Example: When adjusting the cut-off row, the flowing rows get effects.
You may know when
you give ff to the data.)
(5) Confirm whether the cut-off is matched or not in Toshiba pattern.
- It has to be confirmed because the cut-off is a little bit twisted when adjusting the gray scale.
If it is not matched to the adjustment spec, repeat the step (2) of 2.
the gray scale and perform the fine adjustment for each step.
(The values are already adjusted, so there will not be big differences.)
-Adjust the Toshiba pattern and gray scale pattern repeatedly.
-After finished the adjustment, check it in the Full-white pattern.
(Do not forget to measure the gain voltage.)
If white is twisted, repeat the above.
(Gamma off in full white)
3.FACTORY MODE시 MICOM SETTING
-MODE:DYNAMIC MODE / COOL
BLUE FIX
CONTRAST:80 ,BRIGHTNESS:50
After adjustment, return to
2.Gamma Correction Setting
1)MN82860 Gamma Correction Setting
Gamma Correction (17")
Gamma Correction (15")
Subaddress Spl1 Spl2 Spl3 Spl4 Spl5 Spl1 Spl2 Spl3 Spl4 Spl5
Remarks
33h'
95
A0
Contrast control
36h'
1C
10
Brightness Control
3Bh'
E1
DD
Red Gain
3Ch'
C7
C8
3Dh'
FF
FF
RGB Gain
Control
Y cd/m2 98.1
Green Gain
Blue Gain
Condition of the full white gamma off
3Eh'
7E
86
Red Cut-off
3Fh'
75
77
40h'
80
80
Y cd/m
2.0
3.5
Low light condition of Toshiba ABL pattern
44h'
44
44
Bit[7-0] RTANA
R static Gamma gradient setting 1
(=40h' for 1x)
45h'
45
47
Bit[7-0] RTANB
R static Gamma gradient setting 2
(=40h' for 1x)
46h'
44
41
Bit[7-0] RTANC
R static Gamma gradient setting 3
(=40h' for 1x)
47h'
33
37
Bit[7-0] RTAND
R static Gamma gradient setting 4
(=40h' for 1x)
RGB Cut-off
Control
Red Gamma
Correction
Green Cut-off
Blue Cut-off
대 책 40
48h'
4D
Bit[7-0] RTANE
R static Gamma gradient setting 5
(=40h' for 1x)
49h'
3B
2E
Bit[7-0] RTANF
R static Gamma gradient setting 6
(=40h' for 1x)
4Ah'
3D
25
Bit[7-0] RTANG
R static Gamma gradient setting 7
(=40h' for 1x)
4Bh'
40
40
Bit[7-0] RTANH
R static Gamma gradient setting 8
(=40h' for 1x)
53h'
40
40
54h'
40
40
55h'
40
40
56h'
40
40
57h'
40
40
58h'
40
40
59h'
40
40
62h'
37
3F
63h'
3A
3F
64h'
40
39
65h'
33
34
66h'
42
42
67h'
48
44
68h'
4F
5F
69h'
50
3F
OS-01A-010(83.2.1)
Green Gamma
Correction
Blue Gamma
Correction
3 / 5
5. Troubleshooting
1 No Power
Does proper DC 14V appear at DC
jack connected to CN801?
No
WAVEFORMS
Check SMPS PCB and Adapter.
1
IC811 #2
2
IC805 #1
3
IC812 #2
Yes
Does proper DC 3.3V_A
appear at FT852?
No
Check IC811.
Yes
Does proper DC 2.5V_A
appear at Pin 3 of IC802?
No
Check IC802.
Yes
Does proper DC 3.3V_B
appear at FT822?
No
Check IC805.
Yes
Does proper DC 2.5V_B
appear at Pin 4 of IC806?
Yes
Check IC812.
LTM1575W/LTM1775W
No
Check IC806.
CONFIDENTIAL
Troubleshooting
2 No Video (PC Signal)
Power indicator is green.
Yes
Does the signal appear
at C491, C489, C488
of R, G, B input?
No
Check CN401 and cable.
Yes
Does the clock pulse appear at
output of RA351 ~ RA356?
No
Check related circuit of IC350.
Yes
Does the clock pulse
appear at R354?
No
WAVEFORMS
Check R354 and related
circuit of R354.
4
X201
Yes
Does the clock pulse
appear at X201?
No
Check X201 and related
circuit of X201.
Yes
Does the clock pulse appear at
output of RA301~RA306?
No
Replace RA301 ~ RA306, IC300.
Yes
Replace LCD Panel.
LTM1575W/LTM1775W
CONFIDENTIAL
Troubleshooting
3 No Picture (TV, Video, S-Video, DVD, DTV)
Check Pin 185, 196 (S-Video)
and Pin 184 (VCR) and Pin 183
(RF-CVBS) of IC200 (DPTV_3D).
No
Check the CN888 (Tuner) and the
CN702-1 (VCR connector).
No
Check the IC200
and related circuit of IC200.
Yes
Does the signal appear at
IC200 and +3.3V_BA?
Yes
Check the IC200, C285, C241 and C249.
LTM1575W/LTM1775W
CONFIDENTIAL
Troubleshooting
4 No Sound
Does the signal appear at
Pin 67 (Tuner sound signal) and Pin
47, 48 (PC sound) and Pin 56, 57 (VCR
sound) and Pin 53, 54 (DVD) Pin 50,
51 (DTV) of IC 919 (MSP3421)?
No
Check the CN403 (PC conector) and the
CN402 (VCR connector) and the CN200
(DVD) and the CN888 (Tuner).
No
Check the IC919 and
related circuit of IC919.
No
Check the IC501 (Audio amp) and
related circuit of IC501.
Yes
Does the signal appear at Pin 27,
28 of IC919 (MSP3421)?
Yes
Does the signal appear
at L501 ~L504?
Yes
Replace the speaker.
LTM1575W/LTM1775W
Extra
TROUBLESHOOTING
If the TV seems to have a problem, first try this list of possible problems and solutions.
If none of these troubleshooting tips apply, call your nearest service center.
Identifying Problems
Problem
Poor picture
Poor sound quality.
No picture or sound.
No color, wrong colors or
tints.
Picture rolls vertically.
The TV operates erratically.
The TV won’t turn on.
Blurred or snowy picture,
distorted sound
Remote control malfunctions
“Check Signal Cable”
message.
Possible Solution
Try another channel.
Adjust the antenna.
Check all wire connections.
Try another channel.
Adjust the antenna.
Try another channel.
Press the TV/VIDEO button.
Make sure the TV is plugged in.
Check the antenna connections.
Make sure the program is broadcast in color.
Adjust the picture settings.
If the set is moved or turned in a different direction, the
power should be OFF for at least 30 minutes.
Adjust the antenna.
Check all wire connections.
Unplug the TV for 30 seconds, then try operating it
again.
Make sure the wall outlet is working.
Check the direction, location and connections of your
aerial.
This interference is often due to the use of an indoor
aerial.
Replace the remote control batteries.
Clean the upper edge of the remote control
(transmission window).
Check the battery terminals.
Ensure that the signal cable is firmly connected to the
PC or video sources.
Ensure that the PC or video sources are turned on.
TROUBLESHOOTING
TROUBLESHOOTING
Problem
“Not Supported Mode!” message.
The image is too light or too
dark.
Horizontal bars appear to
flicker, jitter or shimmer on
the image.
Vertical bars appear to flicker,
jitter or shimmer on the
image.
Screen is black and power
indicator light blinks steadily.
Image is not stable and may
appear to vibrate.
Image is not centered on the
screen.
You need the Monitor driver
software.
TROUBLESHOOTING
Possible Solution
Check the maximum resolution and the frequency of
the video Adapter.
Compare these values with the data in the Display
Modes Timing Chart.
Adjust the Brightness and Contrast.
Adjust the Fine function.
Adjust the Coarse function and then adjust the Fine
function.
The TV is using its power management system.
Move the computer’s mouse or press a key on the
keyboard.
Check that the display resolution and frequency from
your PC or video board is an available mode for your
TV. On your computer check: Control Panel, Display,
Settings.
If the setting is not correct, use your computer utility
program to change the display settings.
NOTE: Your TV supports multiscan display functions
within the following frequency domain:
• Horizontal frequency:
30 kHz ~ 61 kHz
• Vertical frequency:
56 Hz ~ 75 Hz
• Maximum refresh rate:
1280 x 768 @ 60 Hz
Adjust the horizontal and vertical position.
Download the driver from WWW pages:
http://www.samsungusa.com/monitor
8. General Informations of LCD
1. History of the LCD (Liquid Crystal Display)
LCD, a display device, has been started to adapt for a calculator,
display part of watch, and electronic note-book, and nowadays, it is
adapted for a PC, Workstation, Liquid crystal color TV, monitor, game
device, and so on with a tendency of larger size, larger capacity, and
colorization.
Liquid crystal has been starting to use as a display device since R.
Williams at RCA co. in 1963 stated that the liquid crystal has the
electro-optics effect in the science magazine, “Nature”.
After the G. H Heilmeier group of the Sharp presented the first
possibility of LCD’s practical use in 1968, the first segment type of
the DSM style LCD electronic calculator, ‘EL-805’, was
commercialized in 1973. But, it has several problems such as blackand-white display, responding speed, narrow viewing angle, high
power consumption for portability, and so on.
☞ Responding speed: It is taking time that LCD element becomes On
or Off.
When voltage signal from external
changes it On to Off or Off to On, a LCD is
changed due to the signal. But, it cannot be
changed immediately because of the viscosity of
the liquid crystal, so time delay for reaching the
liquid crystal to equilibrium state is occurred.
Such transformational characteristic shows up
as an optical characteristic, and the delay time
for the optic is called responding time. The
responding time is proportional to the viscosity
of the liquid crystal and inversely proportional
to the cell spacing. When the electronic signal
is converted to On/Off, the responding time can
be
measured
from
the
transmission
characteristic in contrast with the time.
☞ Viewing angle:
The LCD has a characteristic that the
contrast ratio is changed by angle of the
viewing point.
The changing degree is
shown by the viewing angle. The viewing
angle is expressed as an angle over than
certain value of the contrast ratio according
to top, bottom, right, and left position. In a
LCD cell, the transmissivity is sharply
changed due to the angle of the incoming
light. Therefore, in the driving process for
turning it On/Off, the contrast ratio is
changed because of such change of the
transmissivity.
The measuring m ethod of the viewing angle is that determine 0°
where eye and a screen become a front view, and measure the gray
level (gray1~gray16) at every 25°while rotate a panel to top, bottom,
(-60°
, +60°) left, and right (-60°
, +60°). If you draw the luminance
curve due to the viewing angle, the angle from an inversion of the
gray scale can be found. The viewing angle range is settled when
the C/R value is over 10:1. Generally, the points to decide the
picture quality of the LCD are not only the viewing angle, but also the
angel of the inverted gray scale.
* LCD electronic calculator of the segment type *
Enterprises of the display market acknowledge the unlimited potential
power of the LCD and have needed to develop better LCD with dot
matrix display for informational device, which can obtain letter, figure,
and various information.
* Segment display and Dot matrix display *
Afterward, TN (Twisted Nematic) style LCD is developed for
reducing consumption power. It has weaknesses of contrast, viewing
angle, and display grade. Especially, it is not proper for the larger
screen. Therefore, the STN (Super TN) LCD is developed. STN
LCD has several merits compare to TN such as higher productive
efficiency, suitable for lager screen, wider viewing angle, and higher
contrast. The Sharp presented the word processor “WD-250” with
STN LCD in 1986. It was the beginning to rapidly distribute the LCD
and to develop the word processor and PC.
Nevertheless, the STN LCD uses two display colors, yellow and blue,
to get enough luminosity for high contrast. The LCD needs clean
white-and-black display color to be regularly substituted for CRT
instead of OA. With the reason, DSTN (Double STN) style LCD,
displays beautiful black-and-white, is developed in 1987, and it is
commercialized.
* STN Color Word processor and DSTN color LCD notebook *
The materialization of the black and white display is opened the way
of the gray scale and color display period, and it helps to access to
PC following word processor. Afterward, LCD is developed for
better conditions such as lighter weight, thinner thickness, higher
resolution for larger screen, higher contrast, and wider viewing angle.
☞ The gray scale:
It is a display method that the different state
exists except On/Off state.
The huge
amount of information such as color display
cannot be displayed with only On/Off drive.
In the gray scale display, several middle
states exist between an On and Off state.
For example, there is gray state between
black and white to display information. The
gray scale is made by applying middle power
between On and Off power in LCD. There
are several methods to get a middle value:
control the strength of the power, adjust the
rage of the power pulse, and so on. The
color display is determined by the degree of
the gray scale. With the only On and Off
state, just 8 colors can be displayed, but with
the gray scale, more colors can be displayed.
The capacity of it is still not as good as CRT.
Because LCD has passive matrix construction, it is not suitable for
moving pictures in fact of high quality picture, high contrast, and
high-speed response.
Development of the high capacity color LCD is needed for emulating
the existing screen. With the reason, TFT (Thin film transistor) LCD
of the Active matrix drive method, which is totally different to the
passive matrix drive method, is developed.
The new method puts a switch element (TFT) into a picture element
to control each picture element. As a result, the TFT LCD has been
gotten excellent construction to develop the display quality, contrast,
and viewing angle.
After 3” color TV with the TFT_LCD is developed in 1986, LCD has
been larger, and t echnique suitable for the larger size has been
developed. At the present, 40” LCD is developed.
Through the continuous efforts for developing LCD for 4 and half
centuries, the flat display is made at present.
The strong parts of TFT_LCD compared to CRT are lighter weight,
thinner style, and lower power consumption. In the efficiency aspect,
the viewing angle, luminance, and contrast are near or even better
than CRT. But, price and responding speed is still not so good as the
CRT. In case of the viewing angle, if it is 15”, left and right is 110°
~160°
, top and bottom is 90°
~160°which is no problem to watch.
The luminance is maximum 200~250cd, and the contrast ratio is
200:1~300:1 which is better than CRT. The responding speed for
TFT_LCD is several tens ms (15”: 30ms~50ms) and for the STN_LCD
is several hundreds ms. For display a moving picture, the frequency
of the frame is 60Hz, so it must be 16ms. But, the frequency of
TFT_LCD has to be twice more than STN_LCD to make differences
between the signals (On/Off), so it must be under 8ms. Nevertheless,
it is a just theoretical numerical value. For driving moving picture,
actually it has to be 2 or 3 times faster than that.
☞ Contrast ratio:
The contrast ratio(C/R) is the scale to decide
whether the image is clearly appeared or not.
It will be clearer when the difference of the
luminance is bigger. It is defined by dividing
the luminance with all pixels white by
luminance with all pixels black in the middle
front view.
C/R = (Luminance with all pixels white) /
(Luminance with all pixels black)
Luminance with all pixels black has lower
value than luminance with all pixels white.
The value of the contrast ratio has mainly
affected by luminance of the black pixels.
In the fact of the industrial economic (another fact to rise the price),
the investment efficiency and productivity problem have to be
overcome.
By developing responding speed of TFT_LCD and
productivity, the cost competitive power can be gotten, which makes
possibility to outdo the CRT market easily.
2. Principle of the driving LCD monitor
* Principle outline*
Among display parts such as LED, PDP, EL and so on, TFT_LCD has
been the most widely used together with LED. The configuration of
the LC cell is as follow. Liquid crystal is located in between two tipenclosed glass plates, and electrodes exist inside of each glass plate
to display an image. These electrodes are electrically contacted to
external terminal.
☞ LC cell:
It consists of two glass plates, and it is a
construction part of LCD element inserted between
the plates.
Inside of the plates, transparent
electrodes exist to construct picture element, and
above it, an alignment film plate exists for aligning
LC molecule in one direction.
The active
procession LCD is formed at the lower substrate,
and the active elements (diode and transistor) are
formed at the side of the picture element. The
Color LCD is formed at the upper substrate, and a
color filter is mounted for displaying colors. The
color filter is located between transparent electrode
and glass substrate, and it is made by pigment
dispersion method, staining techniques, and etc. on
the glass substrate.
The space between the grass substrates is
maintained for inserting the liquid crystal, and the
spacer maintains the space for the wider display
element. In the space, the liquid crystal is inserted
and aligned. At the side of the cell, electrode
pattern connected to the transparent electrode
exists, and external voltage reaches to the liquid
crystal through the pattern.
In the active
procession LCD, pattern for driving active element
is formed. The active element is driven by patterns,
and external voltage is applied to the liquid crystal
through the patterns.
* Why TFT_LCD*
Display is requested the display efficiencies such as high contrast
ratio, high luminance, high revolution (display capacity on the
dialogue screen), gradation display ability, color display ability, highspeed response ability, wide angle of visual field, and so on. Picture,
letter, or figure information can be displayed by single passive matrix
type, but the characteristics are in the relation of trade-off. In other
words, making one characteristic better would make other
characteristic worth.
Therefore, there is a limit to make all
characteristics highly efficient. The worst weakness is a problem of
cross-talking, but active matrix can enhance the ability of display by
adding a switch element into each picture element.
☞ Cross Talk:
It is a signal interruption between elements. For
example, the display signal is distorted in the
unselected picture element row, and it makes low
C/R value. Active matrix method has low cross talk
value contrast with simple matrix. But, the active
matrix method still occurs the cross talk because
the TFT element cannot drive the switch well. Also,
the simple matrix method occurs the cross talk
because of the signal delay due to the resistance of
the electrode. Therefore, it is needed making a low
resistance of ITO or driving it by given a same
signal from the both side of the electrodes.
? Liquid Crystal
Liquid crystal seems like a liquid at a glance, but it is in a unique
state showing anisotropy like a crystal. It is an organic compound
called “Thermotropic liquid crystal” becomes a liquid crystal in
certain temperature range.
There are reflection type and backlit type of LCD. The reflective
LCD reflects the incoming light from the front side of the LCD panel
to the reflection board mounted to the backside of the panel. The
backlit LCD expresses an image by taking surrounding light or
fluorescence from rear side.
? Driving principle
The liquid crystal is contacted to the aligned surface for inducting the
direction of the liquid crystal, and the liquid crystal molecules are
arranged in parallel with the alignment film hollow. All liquid crystal
molecules are arranged in parallel near to the both substrate surfaces,
and both substrates are twisted 90 degree against each other (called
‘twisted molecule arrangement’).
Therefore, the liquid crystal
molecules are twisted 90 degree between both substrates in
succession, and the light advances in the same direction with the
molecules. As shown in the figure, if the molecules are twisted 90
degrees, the light takes same direction with the molecules in twisted
90 degrees.
☞ Liquid crystal: There is a mesophase exists in the natural world
with three common states, solid, liquid, and gas.
The mesophase is called liquid crystal phase. It
has characteristics, fluidity of liquid and positional
system of crystal, in the certain temperature range.
The liquid crystal phase is divided into Nematic,
Smectic, and columnar phase. The phase of 온도
전이형 액정 is changed by temperature, and phase
of 농도 전이형 액정 is changed by density.
그림 삽입 [Liquid crystal molecules are arranged in parallel to the
aligned film hollow.]
그림 삽입 [Liquid crystal molecules are twisted 90 degree between
both substrates.]
By adding voltage or external force with TFT, the direction of the
liquid crystal is coming undone from the state of twisted in 90 degree.
The dir ection is arranged in one direction to the panel surface
vertically, and the light goes straight.
Consequently, the matter of passing the incoming light is depending
on the conditions (twisted or untwisted) of liquid crystal. By adding
the polarizing to the both glass boards, the light passed through the
liquid crystal is collected in one direction again, and it is entered into
the picture element to be appeared on the screen finally.
☞ Polarizing film: Light is vibrated by electromagnetic wave, and the
electronic field and magnetic field are vibrated
vertically to the operating direction. The vibrating
direction of the light from the backlight of the LCD
module has same probability to the all direction.
The polarizing film transmits the light vibrated
same direction of the polarizing axis, and it absorbs
with proper medium or reflects the rest of the light
vibrated to other directions to make the light in
specific direction. While it is passing the liquid
cell, the strength of transmitting light is controlled
by rotation of the polarizing axis, and it makes the
expression of gray in between black and white. In
the LCD application, it is important not only
polarizing degree but also management of the low
reflected surface.
When using the LCD in
brightening place, the contrast becomes low, and
the acknowledgment is reduced as a result.
Therefore, the technique to reduce the reflecting
ratio for the surface of the polarizing film is needed
for developing picture quality.
[Shows how liquid crystal molecules are arranged when voltage is
given.]
[Shows how liquid crystal molecules are arranged when voltage is
off.]
[Shows how light go through when voltage is on or off.]
? Principle of expressing colors
In the beginning, LCD supports only black color. Nevertheless, as
the application range of LCD is getting wider, and the display market
is getting changed toward to the color, the LCD has developed to
support colors.
LCD uses the color filter, which has three primary colors of red,
green and blue, to express colors. The RGB color filters are
arranged closely to each other, and each color signal is applied to the
color filter for controlling the brightness to express colors. The
voltage applied to the element is controlled for managing the
brightness to express various colors.
If the liquid crystal has only two functions such as cutting off light
and passing light completely (red, green, blue = 1bit respectively), 8
colors (2 to the third power) can be expressed. In other words, if
filter has a function to open and close, each of three colors can be
controlled with 1 bit data. If each color is controlled by 2 bits, 64
colors (2 to the sixth power) can be expressed. It is expressed in
equation as below.
Consequently, the quantity of colors to be expressed by LCD is
depending on the bits of image data.
In other words, the quantity of light passing through the color filter is
controlled by liquid crystal. The voltage for operating the liquid
crystal is output from the source driver IC and supplied through the
pixel TFT. The voltage supplied to the liquid crystal changes the
permeability of liquid crystal. The possible quantity of colors to be
expressed is determined by number of steps for controlling the liquid
crystal. For example, if the liquid crystal is twisted, the color will be
black, and if the liquid crystal is released, the color will be white.
The combination of m edium gray scales expresses other various
colors.
? Resolution
The r esolution is another primary characteristic of display. The
resolution is a measurement to express an image in detail. As
resolution is higher, the quantities of picture elements are getting
more. It means that the amount of data treated by drive IC during
unit of time is larger; therefore, the processing speed reaches near to
the limit.
Due to the fact, there are more possibilities of creating signal
distortion and EMI. In addition, as vertical resolution is getting
higher, time allowed for one horizontal line becomes shorter. Time
for charging data voltage into picture element is the same as time for
one horizontal line. If the time gets shorter than a certain level,
charging process cannot be achieved completely which leads to bad
picture quality. Study and research to solve the problems has been
processed in many aspects, and technology has made much advance.
☞ EMI : Electro-magnetic interference.
It is an electronic
interruption by a mutual induction of electromagnet ic
frequency.
It is not proved its harmfulness, but its
harmfulness is proved in statistics and dynamic research
indirectly. It drops off immunity and outbreaks of VDT
symptom.
Therefore, every country has standard for
limitation of EMI emission.
For preventing serious
problem,
electromagnetic
interference
is
basically
standardized not to interrupt other machine’s operation
such as instrument or communication facility of airplane,
pulse generator of hospital, etc.
Recently, Korea
government also processes to establish the restriction low
due to the studies.
? Construction of color TFT_LCD module
Color TFT_LCD is divided into a-Si (amorphous silicon) TFT and pSi (polysilicon) TFT. The direct view TFT_LCD using a-Si TFT is
the most widely used.
TFT_LCD is roughly divided into the following 3 units.
First, panel with liquid crystal implanted between substrates.
Second, driving circuit includes Driver LSI for driving panel and PCB
(printed circuit board) with circuit element.
Third, chassis structure with backlight.
Assembly composed of these units is called TFT_LCD module.
☞ Backlight:
Light is sent from backside. Liquid crystal cannot
make light itself, so it controls the amount of light
from backlight to display various colors. Therefore,
the backlight function has deep relation with
luminance. As backlight is better, luminance is
higher.
Two tubes looks like fluorescent lamp are installed
horizontally, and send light over the screen evenly.
The light is controlled light to display liquid crystal
and display various color.
The backlight of a surface light source type, which maintains even
luminosity of whole screen, is needed because liquid crystal cannot
make light itself and just modulates the amount of transmitted light.
The requesting performance of the backlight for LCD is having even
luminance of whole display surface, and maintaining enough
luminance in considering transmissivity of panel, less than 10%. In
case of portable LCD, it has to be lighter, thinner, and has low
consumption power. CCFL (cold cathode fluorescent lamp) used as
light source of backlight unit is consisted of fluorescent lamp (heat
cathode shape), light guide panel, prism sheet, diffusion plate,
reflection sheet, etc.
The fluorescent substance of the CCFL is mainly the rare earth (Y,
Ce, Tb, etc), which has high efficiency.
For LCD, fluorescent
substance is consisted of 3 frequency types of white system, which is
mixture of red, green, and blue fluorescent. The light guide plate
takes the light from the side of acrylic plate. The light processes to
the inside of the acrylic plate, and it is coming out to the front of
panel by reflection plate. The reflection plate, dot type gradation
pattern, controls the amount of reflection to make the backlight to
have even luminance over its surface by applying less light in where
close to the lamp or more light in where far from the lamp.
TFT_LCD module has display function, and it is a subsystem of the
systems such as a notebook PC, TV, or monitor.
[Construction of the TFT-LCD module]
* Principle of LCD drive*
1)
a) Black Matrix: It cuts off the light from the R,G, and B element.
It is formed in among pixels of color filters and absorbs the
light coming from the outside to prevent the reflection.
b) Color Filter: It is a resin film containing dyeing stuff or
pigments of primary colors (red, green, and blue). Eventually,
it makes the passed light through liquid crystal to have colors.
c) Over Coat Film: It is used for making a flat surface of the color
filter. It is also used for improving adh esiveness with ITO
(Indium Tin Oxide), which is a material of transparent electrode
due
to
its
great
transmissivity,
conductivity,
and
chemical/thermal stability.
d) Common Electrode: It is an electrode made of ITO, the
transparent electric conductor, and adds voltage to liquid
crystal cell.
e) Alignment Film: It is a thin organic film consists of Polimide,
and is formed for aligning liquid crystal.
f) Liquid Crystal: Its thickness is normally about 5㎛, and it has
arrangement of twisted Nematic letters.
g) Sealant: It is located on the edge of panel and works as an
adhesive to fix TFT array substrate and color filter substrate.
It makes active cell area.
h) Picture element electrode: It is transparent and made of
electric-conductive ITO . It adds the signal voltage given by
TFT to liquid crystal cells.
i) TFT: It is a switching element to give or cut off the signal
voltage to liquid crystal.
j) Storage Capacitor: It maintains the signal voltage given to pixel
ITO more than a certain time.
2) Backlight unit
It makes a plane light with even luminosity from a fluorescent lamp
used as the light resource.
The thickness of module and
consumption of electricity are depending on making thinner thickness
of the unit and improving coefficient of utilization of light. The light
from backlight gradually decreases in brightness immediately after
penetrating the display module unit. Only 5% of light coming into the
backlight penetrates the front Polarizer.
3) Driving circuit and Chassis unit
The TFT LCD panel consists of TFT array and color filter substrates.
The drive circuit including driver IC must be installed in the
peripheral part. The drive circuit takes multi layer PCB type. For
the circuit part, SMT (surface mounting technology) is used for
having a thinness and high density. Driver IC is made in the form of
TCP (Tape carrier package) and connected between PCB and panel.
The drive circuits, TFT LCD panel, and backlight unit made as above
are completed with chassis unit, and become assembled parts. It is
called TFT module.
Manufacturing processes for TFT LCD panel is briefly described as
follows.
1) TFT array process to make switch elements, which give pixel unit
signal.
2) Color filter process to make color array of red, green, and blue for
expression of colors.
3) Liquid crystal process to make liquid crystal cells in between TFT
substrate and color filter substrates.
The STN LCD is adopted for the LC cellular phone or car navigation,
monitors, and so on, and the TFT LCD is adopted for Note PC
monitor, desktop monitor, and so on. The 15” and 18 ” LC desktop
monitors are the most popular in the world. For increasing the
market share in the display field, the technique for larger size screen
has to be developed.
In the technical aspect, it is difficult to maintain the LC space equally
because the LC weight gets together into the middle if it is larger size.
The picture quality becomes low due to the distribution of the unequal
space.
Due to the weakness, PDP is developed for the 20”, but its market
share is small because of its expensiveness.
Therefore, it is
expected the lots of technical developments of the LCD for the flat
display device with its high market share.
3. CRT monitor and LCD monitor
◆ The weakness of the LCD compare to the CRT
☞ Viewing angle, after image, quantity of display color,
responding speed
◆ The strong point of the LCD
☞ Consumption power, electromagnetic wave, size (saving space),
picture quality (focus, GD, CG)
◆ Equivalence (no problem to use and possible compensation):
☞ Maximum luminance, contrast, flicker
☞ Viewing angle: It is one of LCD’s weakness. It is no problem to
watch the 120°of right and left and 110°of top
and bottom. But, if many people watch one screen,
the color is turning over due to the changing
viewing point with moving a head little bit to the
top, bottom, right, or left. Especially, as size is
larger, the viewing angle must be bigger; therefore,
the technical development is necessary for larger
screen.
☞ Responding speed: The responding speed is slow because of the
LD’s
characteristic
of
the
molecules.
Generally, it is no problem doing word process
and moving picture not to fast, but for the
game and real movie, the picture quality is
getting worth due to short on/off time of the
LC.
☞ After image: When trying to express another image after certain
image is stoppage in long time, the first image
pattern reminds on it called after image.
☞ Number of colors: If the sub-pixels (red, green, blue = 6 bits each)
adopt the panel consists of 18 bits, various
colors can be expressed by controlling the
luminance of the sub-pixel in several level
even though the number of sub -pixel is 18.
The possible expressing numbers of colors are
16,700,000 (2 to 6th power = 256 levels).
It is the same case as the sub-pixel is 24 bit
(2 to 24th power). CRT has analog signal. It
means that CRT supports all colors with
graphic card. In comparison with the CRT,
the possible expressing color numbers of the
LCD is still deficiency.
☞ Consumption power: If CRT has 105w and LCD has 35w, the
LCD’s consumption power is 33% of the
CRT’s. For example, If PC is used 8 hours
per a day for year, the consumption power of
the CRT monitor
will be 306,600w
(105x8x365=306,600w), and the consumption
power of the LCD monitor will be 102,200w
(35x8x365=102,200w).
If the average electric charge is 75won per
1kw/h, the consumption power for year will
be 22,995won (306,600x75=22,995) for CRT
and 7,665won (102,200x75=7,665) for LCD.
The difference, 15,330 won, is small amount
for person, but nation. The low consumption
power is good aspect for the TFT-LCD
monitor mounted to the note PC due to
portability and battery waiting time (time to
use for one charge), but for the TFT_LCD
mounted to Desktop monitor.
But the
advantage of the LCD monitor cannot be
ignored due to the environmental protection
tendency of the current time.
☞ Electromagnetic frequency: In comparison with the LCD, the CRT
monitor (certified TC099) makes high
frequency, which affects to human body.
Therefore, the LCD monitor is used in
hospital, laboratory, and so on because
precision machine could be malfunctioned by
electromagnetic frequency.
☞ Weight:
The CRT is 20kg and the LCD is 5.5kg, which means
the weight of the LCD monitor is 28%(1/4) of the CRT
monitor. It is a great advantage for the note PC
monitor and desktop monitor. But the flat CRT monitor
has thicker glass of panel. It means that the weight is
heavier for the female user and children user.
☞ Size:
It is a just numeric value.
CRT monitor: 420x443x466=86,703,960
LCD monitor: 405x182x361=26,609,310
The size ratio of the LCD monitor is about 30% of the CRT
monitor, so it saves a space as much as the percentage.
[The side view of the general TFT LCD and flat CRT]
☞ Visible picture:
The CRT has different sizes of the visible
picture when being a Braun tube and a
monitor by inserting the cabinet. There is
no certain theory why size is not
standardized when it is a monitor. The size
of the visible picture for the CRT 17” is
actually 16”. Nevertheless, the actual size
of the TFT LCD is same as spec.
The
visible picture size of CRT 17” is 310x230,
and LCD 15.1” is 307x230. There is just
3mm difference horizontally. In other word,
17” CRT monitor and 15.1” LCD monitor is
almost same size.
☞ Picture quality:
The problems, luminance, contrast, etc, in the
developing process of the LCD, are almost
solved. About the picture quality, the pixel
concept of the CRT is unclear, and the CRT
adopts the polarizing device to scan a beam
physically.
As a result, there can be
differences of focus, cg, gd, etc. between
every products and even fine products.
Nevertheless, because the pixel position of
the LCD is fixed, there are no differences of
the focus, cg, gd, etc. between products. If
there are some problems, it could be about
the unequal brightness or unequal white, or
missing pixel due to inferiority of TFT at
each picture element.
☞ Managing surface:
The general management of CRT surface is
anti reflection and anti static management.
There are two methods, coating and attaching
film. The coating method is difficult to coat
over the flat evenly, so film method is
invented. The surface of the Samtron 75DF
is treated with Multi-layer film with ARAS.
It means it is prevented from the refection
and static by attaching the multi layer film.
For the LCD, the anti glare treatment is
applied to prevent the glance of the surface.
The CRT surface consists of thick glass, so it
is very strong from impact or scratches.
Nevertheless, the surface of LCD consists of
the thin polarizing film, so it is very weak.
Therefore,
hard
coating
is
applied
additionally for protecting the surface. If
LCD
is
used
in
carefulness
with
acknowledgment of the weakness, it is not a
serious problem.
☞ Comparative superiority of the TFT-LCD monitor and CRT
monitor.
▶ Slim design for space saving
-
In comparison with CRT monitor, it supports the fine environment
for taking small space (less than 1/3 of CRT).
User can get nice interior effect.
▶ Clean image at every part of the screen. (Even at the edge)
-
In comparison with CRT monitor, it expresses an image vividly.
It is comfortable to use visually for long time use.
▶ No screen flickering
-
There is no flickering screen because individual active elements
exist in each picture element.
There is no tiredness of eyes for long-term work.
▶ Almost no electron wave is occurred.
-
In comparison with the CRT monitor, almost no electron wave,
which may harm human body, is occurred.
It doesn’t affect to other device with electron wave. (It is suitable
for hospital, military, laboratory, etc.)
In the future, TFT_LCD monitor will be dealing with all application
devices instead of CRT.
▶ Low consumption power
-
-
It is low-consumption-power monitor, 32w, so it is suitable
monitor for bank, office, stock market, telemarketing, control
devices, etc.
It minimizes the calorific value to supply fine work environment.
* DCT monitor is basically driven by RGB signal, and it has
construction that the electron from the electron layer is polarized by
crushing to the glass of fluorescent materials for creating light.
TFT_LCD monitor drives the liquid crystal panel to display an image.
The TFT_LCD has construction different to the CDT. Liquid crystal
is filled in between two glasses, and electrode is connected into each
liquid crystal cell. By applying voltage, the construction of the liquid
crystal’s molecule is changed for controlling light coming from
backlight. The TFT_LCD has several advantages in comparison with
CDT such as thinner thickness, no flickering screen, etc.
4. Analog monitor and Digital monitor
▶ The trend of the monitor market in the world
Desktop monitor is divided into two big parts, CRT monitor and
TFT_LCD monitor.
According to the statistics in 1999, CRT monitor owns 95% of market
share, and the LCD owns only 5%. According to the statistics, the
15% (which is not small percentage) of reason to choose it is for
digital interface. Nevertheless, the CRT monitor, which controls the
market, is analog, so LCD takes analog method mainly for considering
interface.
▶ Difference between CRT monitor and LCD monitor
Originally, the CRT displays information with analog method, so the
output signal has to be analog method. But, all information from the
PC is digital data. For displaying the digital data onto the monitor
with analog method, the data is converted to analog at graphic board.
As a result, the RAMDAC (digital to analog converter) is needed in
the graphic board, and the signal from the board is transmitted to
monitor via cable. Therefore, signal loss and noise are occurred
which make low picture quality.
Primarily, LCD monitor is display device with digital method.
Therefore, there are no signal loss or noise, and unnecessary part
such as ADC (Analog to digital converter) is not needed because it
takes the digital data from PC directly.
Nevertheless, for
considering marketability, it is impossible to produce only the
TFT_LCD with digital input. Therefore, TFT_LCD monitor with a
built-in ADC (analog to digital converter) is mostly produced. Also,
companies for graphic board adopt the DAC (digital to analog
converter) because the most of monitor takes the analog input method.
▶ Relationship in changing signals between Digital monitor and
analog monitor.
The LCD monitor with analog input method converts the data from PC
to analog at the graphic board, and coverts it to the digital to the LCD
monitor. Such processes occur the information loss and make to
adopt unnecessary parts, which is the fact to raise its price. It is
reasonable that low demand of LCD due to such additional cost.
Advanta
ge
Digital Monitor
Analog Monitor
- There is no signal conversion
between digital and analog, so no
signal loss is occurred.
Better
picture quality.
- It doesn’t need ADC and DAC.
Low price.
- Generally, it has
nice interface with
graphic board.
- It doesn’t need to
buy a new graphic
board.
There
is
no
defined
standardization. (P&D, DFP, and
DVI)
- Interface problem
- The graphic board with digital
interface is needed additionally.
Also, it is difficult to find it.
- There is signal loss
during
signal
conversion, digital to
analog, and analog to
Disadva
digital.
ntage
- Cable gets effect
from external.
- ADC or DAC is
needed. High price.
[Comparison between digital monitor and analog monitor]
▶ Digital era
All the information is getting digitalized.
For example, the
information from the Internet is digital. Also, TV programs from the
North America, Europe, and Japan are broadcasted in digital. In the
near future, all TV programs will be broadcasted in digital, and it has
been prepared.
In Korea, some digital programs are already
introduced, and DVD movies are increased in number. With the
trend, the digital monitor is introduced from North America, Japan,
and Europe. Domestic manufacturin g companies also make digital
monitors. The digital monitor’s market share will be expanded in the
future.
▶ Why aren’t there many digital monitors?
The reasons that the digital monitor cannot be popular are: first, as
mentioned above, the analog market is too big, and the manufacturing
companies don’t invest for it. Second, there is no standardization for
wider use. The VGA interface for digital method is not standardized,
so the monitor manufacturing companies or graphic board
manufacturing companies are unwilling to produced it.
▶ What kind of VGA interfaces exist?
Mainly, P&D, DTP, DVI, etc. are adopted recently.
P&D (digital plug & play) was adopted by VESA in 1997, and it is
transfer protocol with TMDS method, called panel link. The digital
connector with P&D method transfers both of analog and digital. But,
price is raised by attaching the solution (combination of USB and
IEEE 1394/Flrewire signal) to achieve the transmission. Any of
graphic board manufacturing companies doesn’t have interested in
such expensive connector, so it couldn’t be standardized.
The
Compaq makes DFP (digital flat panel), which has similar function
with P&D, but price is lower. The functions are almost same as P&D
except analog signal, USB, and IEEE 1394 which are dropped off due
to high price. The transfer protocol is same as P&D and TMDS
method. The weak point of the DPF is that the maximum resolution
is limited at SXGA (1280x1024), and it can ’t take the graphic board
and analog monitor because it transmits only digital. It is expected
that the DFP connector can’t be stand longer with the weaknesses.
▶ What is the DVI?
Recently, to make up for such weaknesses, DVI (Digital Video
Interface) is being watched for VGA interface and counting on for
marketability. DVI is developed by DWG (digital display working
group), which includes many companies related in DFP. DVI has
possibility to be a standard due to its interface using TMDS protocol
as P&D and DFP. The maximum resolution of the P&D and DFP,
which have one link, is limited to 1,280x1,024, but DVI supports over
1,280x1,024 with 2 links by increasing the maximum pixel speed
twice. Also, it transmits analog signal, so it can be connected to the
CRT. With the reasons, DVI is expected to be a standard of VGA
interface.
▶ Does what kind of graphic board be chose?
Graphic board problem cannot be missing for the digital monitor.
Now, graphic boards are expensive because they support either of
analog and digital in considering the interface with analog monitor.
As the dem and of digital monitor is less, it is not a good idea to make
user individually to buy an additional high price graphic board for
digital monitor. The local manufacturing companies produce graphic
boards for their digital monitors and sell it to buyers who buy their
company’s digital monitor.
▶ The advantage when the DVI is adopted
The main problem of the analog VGA standard is quality difference of
output signal among the manufacturing companies and graphic board
companies.
But if DVI standard is standardized, the quality
difference among companies will be reduced. As the results, the
technical gaps of products, CDT monitor, will be raised clearly among
companies. Also, the DAC is attached to CDT, which is the fact to
raise price. In the quality aspect, there is no unnecessary process in
comparison with analog method, so the picture quality will be
improved.
The price of the digital monitor will be down because it doesn’t need
to attach the ADC (analog to digital converter), and its picture quality
will be improved by skipping two signal conversions.
▶ Products with DVI
Let’s see digital monitors introduced in Comdex show on Nov., 1999.
All prices are standardization on Nov., 1999. The digital CRT
monitor produced by Samsung is 21 Syncmaster 990 DVI. The 21
Syncmaster 990 DVI is CRT monitor, and it supports high resolution
(UXGA level (1600x1280)) and either of digital signal and analog
signal. Price is about 1,450,000 won. The ViewSonic introduces
OptiSync PF77, 17” flat CRT monitor, and OptiSync PF97, 19” flat
CRT monitor. They support either of analog signal and digital signal.
Price of PF97 is $625, and PF77 is $429.
Let’s see digital TFT LCD monitor.
Hewlett Packard introduces 15” Pavilion FX70. It supports DFP,
P&D, DVI, and analog. Price is $1,099. The ViewSonic has VP181,
18” digital TFT LCD, and VP151, 15” digital TFT LCD.
They have video input, two digital inputs, and two analog inputs.
Price of the VP181 is $3,795, and VP151 is $1,795. The maximum
resolution of VP181 is 1600x1200 and VP151 is 1280x1024.
NEC has 15” MultiSync LCD1525X and 18” MultiSync LCD1810X.
They support combining connection of analog and digital and analog
exclusive port. The Hankook computer company, local company,
introduces SlimWin 15D with DFP graphic interface, and a new model
with DVI will be introduced in this year.
▶ Future of Digital monitor
Even though digital monitor has lots of advantages, it seems to be far
from us.
In Japan, The TFT LCD monitor takes over 50% of market share in
desktop monitor market, but the analog method for VGA interface
takes more percents in it. It may be that the CRT monitor takes
much part, so its effect is still reminded over the industry.
Nevertheless, the importance of digital monitor is getting serious as
all information is getting digitalized.
The demand of monitor for digital interface is getting bigger over the
world.
5. Summery of TFT_LCD monitor terms
TFT-LCD (Thin film transistor liquid crystal display) is a display
method of that liquid crystal is filled in between two glass plates.
When light is passing the liquid crystal’s molecules, direction of light
is defined with alignment of the molecules, and polarizing film
controls direction of the passing light. After applying voltage, the
liquid crystal molecules are aligned in curved angle for passing the
polarizing filter. The applying voltage drives the liquid crystal as a
shutter of camera for making the light to block or pass the filter.
TFT LCD has cost efficiency due to using low power and glass, and it
doesn’t create noxious frequency.
☞ Sync Signal
- It is a standard signal to give a regular hue signal to monitor.
Basically, the signal is divided into horizontal and vertical Sync
signal. According to the Sync signal, monitor expresses the
normal hue signal by resolution and frequency.
☞ Kinds of Sync signal
-
-
Separate: It is a method to delivery the horizontal and vertical
Sync signal to monitor.
Composite: It is a method to synthesize horizontal and vertical
Sync signal and to delivery the combination signal to monitor.
The signal is separated inner side of the monitor and express the
hue signal on monitor.
Sync on green: It doesn’t use additional Sync signal line. It is a
method to delivery the signal to monitor by synthesizing the
horizontal and vertical Sync to the green among the hue signals.
It is mainly used for workstation.
☞ Saturation
- It is a degree of difference determined from white (standard) to
own color. As the saturation is bigger, color is getting near to its
own color.
☞ Hue
- Red, green and blue
☞ Vertical frequency
- Monitor repeats the same picture several tens in a second like
fluorescent lamp. The repeating degree to express picture in a
second is called vertical frequency or reflash rate. Unite is Hz.
Example) People can feel the flickering when the light is shown 60
times in a second. It is became a Flicker -free mode by using
over 70Hz of vertical frequency to prevent such happening.
☞ Horizontal frequency
- Horizontal cycle is a taking time to express one horizontal line.
Horizontal frequency divides the horizontal cycle by 1 to express
how many horizontal lines can be express in a second, and use
kHz.
☞ Plug & Play
- It is automatically set up the best picture by exchanging the
information between monitor and computer. Monitor takes the
VESA DOC method (international standard) for plug and play
function.
☞ Resolution
- It is a number of vertical and horizontal dots consisted monitor,
and tells detailed degree of picture. As the resolution is larger,
lots of information can be gotten on the monitor.
Example) If resolution is 1,024x768, it is consisted of 1,024 dots
(horizontal resolution) and 768 lines (vertical resolution).
☞ Back Light
- LCD cannot make light itself, so it needs light from external. It is
a light source located in the backside of liquid crystal panel.
☞ Aperture Ratio
- It tells possible area ratio of LCD for displaying information out of
whole screen. As the aperture ratio is larger, picture elements
take more area, so luminosity becomes better.
☞ Viewing Angle
- Contrast ratio is changed by angle of the viewing point.
changing degree is shown by the viewing angle.
The
☞ Cross talk
- Signal interruption among picture elements.
☞ Luminance
- It is about the luminosity, and its units are NIT, F/L, Cd/m²
, etc.
☞ Function of Image scaling
- Because 14” and 15” TFT panels are made up of basic pixel
numbers, 1,024x786 mode, a special function is needed to expand
an image in a beeline for watching the whole screen of the SVGA
and VGA.
CONFIDENTIAL
9. Schematic Diagrams
1 CPU Block & Signal Processing Part Schematic Diagram
TO DPTV
PARALLEL COMM
TO DPTV DIGITAL INPUT
MCAD(0:7)
MCAD(0:7)
MCA(0:19)
C620
100nF
E-PROM
DGND
#40
ex3
22
FROM DPTV
R355
22
R367
22
#RESET IC OUTPUT
DCLK
HS
4
#41
ex4
RA608
RA609
C612
16V
10uF
VS
GND_D
CVBS_OUT
R604
560
1/16W
R609
10K
C609
100nF
R944
2K
1/16W
C608
5.6nF
50V
MO
R612
R613
1.5K
1.5K
C391
100nF
R358
10K
C301
1nF
C392
100uF
16V
DGND
C360
1uF
50V
50V
1uF
C350
R360
100
C346
1uF
50V
C617
100pF
SCL3
R634
100
R359
100
C398
C397
100nF
C399
100nF
100nF
SW_DTV/PC
H_DVD,DTV
R633
100
R652
Vout
1
7 5 3 1
LM2596S_5.0
1
C618
10nF
+5V_A
+3.3V_A
50V
MO
IC604
LEDRED
T699
C
D604
B
C
3
3
A
2
R637
100
A
1
7
6
1
1
H
A
G
B
2
E2-ROM
5
F
C
E
D
T606
E
ESCL
DGND
ESDA
DGND
IR
R615
100
LM2676SX_3.3
C417
47uF
16V
1
SDA1
ALE
1
DPTV_WD
T603
DPTV_RD
KEY2
T602
C475
100nF
KEY1
100pF
C429
100nF
R647_D
330
1/16W
C402
100nF
NC_3
IN1_SW
SELH_OUT
IN1_L3
SELV_OUT
IN1_V
SELCR_OUT
SELCB_OUT
SELY_OUT
NC_4
VCC2
SCL
SDA
ADDRESS
IN1_1
IN1_2
GND2
VSYNC
GREEN
RED
2
C401
0.016nF
50VMO
X401
HC-49/USMD,4MHZ,18PF
9
8
T471
R436
100
R437
100
N
IN
A
M
B
IN
L
IN
C
K
IN
D
J
E
IN
I
IN
F
H
IN
G
R662
100
R663
100
R664
100
R667
100
R441
10
R438
Q610
2SC2412K-Q
B
R685
R686
E
SCL2
C626
100nF
DGND
IC632
PCF8574AT
16
15
14
13
12
11
10
100
100
SDA2
9
R684
10K
R405
100
1/16W
DGND
R683
100
R687
100
R681
10K
R678
10K
R677
10K
R654
10K
IC631
PCF8574AT
16
15
14
13
12
11
10
DGND
9
R676
10K
1
2
3
4
5
6
7
8
R608
47K
1/16W
10
C474
100pF
C627
100nF
DGND
C
T472
R674
4.7K
1/16W
DGND
1
2
3
4
5
6
7
R607
10K
1/16W
R406
100
1/16W
1
C473
100pF
R675
4.7K
1/16W
IC681
FST3125MX
14
13
12
11
10
Q0
1
100
100
T438
1
T439
1
1
T441
BLUE
R442
R439
DGND
C
Q1
T435
R440 100
C493
4.7uF
25V
1
R661
10K
R651
220
R659
10K
1
2
3
4
5
6
7
8
330
EXTCLK
VCC1
R434
2K
B
R435
10K
T961
R671
IREF
DGND
R658
10K
R657
10K
R656
10K
R655
10K
R665
330
R603
100
1/16W
R666
330
R668
330
S_RESET
LVDS_ON_OFF
1
R669
T624
1
IDENT_FAC
HP_IDENT_CPU
R640
220
R642
PC_INT
220
R672
DGND
R680
LM2676SX_3.3
R682
220
330
1 T622
220
T627
SCL3
LEDGRN
T621
330
IC808_C
1 1
IN2_1
NC_1
NC_2
DDC_SDA
YG_IN
IN2_2
+5V_A
DDC_SCL
YG_OUT
IC404
CXA2151Q
IN2_3
D681
MMBD4148SE
C625
100nF
E
C433
100nF
1
IN2_L3
IN2_V
IN2_H
36 35 34 33 32 31 30 29 28 27 26 25
HSYNC
13
14
15
16
17
18
19
20
21
22
23
24
V_PH
R653
10K
1/16W
Q404
KSR2101
C430
1uF
1
VCC3
IN4_V
IN4_2
IN4_3
IN4_H
IN3_3
IN4_1
IN3_V
GND3
IN3_H
IN3_2
IN3_1
C487
100nF
50V
MO
H_PH
IN2_SW
IN1_H
C491
10uF
16V
C431
10nF
GND1
T433
T958
C489
10uF
16V
C488
10uF
16V
C492
100nF
C477
100pF
R485
100
1
C485
100nF
C486
100nF
C484
100nF
50V MO
T432
T957
T431
1 1 1
1
48
47
46
45
44
43
42
41
40
39
38
37
IN1_3
T426
T427
T428
C483
4.7uF
25V
C404
470pF
1 1 1 1
T946
1
T429
T956
1
G2OUT
10
GND4
11
BLUE2IN
12
VD1IN
RED2IN
8
GND3
9
6
GND2
7
2
HDSYNC
3
G1IN
4
GND
5
BLUE1IN
1 2 3 4 5 6 7 8 9 10 11 12
C403
4.7uF
25V
3
BA7657F
50V MO
1
RED1IN
IC403
INVERTER_ON_OFF
Q601
2SC2412K-Q
B
4
R644
100
R650
100
1/16W
C
3
T605
1
C621
100uF
16V
C622
10uF
R649
4.7K
1/16W
IC603
NM24C17FM8X
8
1
C624
100nF
C623
10nF
C619
100nF
3
C416
47uF
16V
C476
R404
470K
1/16W
DGND
GAMMA_CONTROL
CN601
slcon3p
R692
10
1/16W
2
1
R695_D
47K
1/16W
R694_D
15K
1/16W
SCL1
R693
10
1/16W
1
1
C438
470nF
DGND C616
2.2uF
35V
R433
75
L431
3.3UH
C437
470nF
C439
470nF
T424
T423
T425
1
1
T434
R432
75
R431
75
C422
470nF
C423
470nF
T436
1
1
T482
T481
T437
15
BLUEOUT
14
VDOUT
13
VD2IN
1
18
VIDEOIN
17
SYNCOUT
16
CTL
1
24
HD1IN
23
HD2IN
22
HDOUT
21
REDOUT
20
VCC
19
GOUT
T484
R486
100
R430
75
C498
10nF
C497
47uF
16V
R627
100
R632
100
R648
4.7K
R646
4.7K
C615
20pF
R622
10K
+3.3V_A
1/16W
+5V
C432
470nF
C427
470nF
C428
470nF
T422
1
T421
R402
75
R401
75
R403
75
C435
470nF
C434
470nF
1
1
T483
FT401
SGM32F1E104-2A
1
A
B2
C
3
DGND
1/16W
1/16W
1/16W
R643
100
1/16W
+5V
+3.3V_BD
DGND
KIA7029F
ex4
+3.3V_A
OPTION
C614
20pF
2 B
DPTV_ENBLE
RED
RST_FR_MCU
C613
100nF
R639
220
100
GREEN
T604
R636
4.7K
1/16W
R616
BLUE
DGND
(DPTV)
R619
R624 100
R626 100
R629 100
ACTIVE
MN82860 : LOW
DGND
T601
R621
9/20 CHANGE
10K
R623
470
R645
680
1/16W
HSYNC
Hout
DPTV : HIGH
C611
47uF
16V
DGND
100
E
+2.5V_A
R618
1
(MN82860)
Q611
KSC1623-Y
B
100
1/16W
X601
100
1/16W
R670
DGND
VSYNC
1/16W 100
RST_FR_MCU1
C
R690
56K
1/16W
R617
4.7K
1/16W
DGND
R601
10K
1/16W
R602
56K
1/10W
MCA(15)
MCA(17)
MCA(16)
MCA(18)
MCA(19)
+3.3V_A
R635
1/16W
L_PC
RA607
75
ex3
R628
100
SDA3
R631
4.7K
R362
100
R361
100
8 6 4 2
A8
A6
A9
A5
A11
A4
ALE
PSEN
A3
A10
VSS4
VDD3_3_4
A2
A1
FL_CE
D7
A0
D6
D0
D5
IC601
SDA5550M
31
P3_0
32
P3_1
33
34 P3_2
P3_3
35
P3_4
36
37 P3_5
P3_6
38
P3_7
39
40 VSS2
VDD3_3_2
41
P_0
42
43 P_1
P_2
44
P_3
45
46 P_4
1/16W47 P_5
P_6
48
49 P4_2
P4_3
50
RST_
1
C393
100nF
C345
22uF
16V
C389
100nF
C387
100nF
2
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
AD(0)
AD(1)
AD(2)
AD(3)
AD(4)
AD(5)
AD(6)
AD(7)
+3.3V_A
DGND
GND
+3.3V_BD
MCA(13)
MCA(12)
MCA(14)
C607
100nF
DGND
#44
ex2
MCA(10) (90)
GND (91)
GND (92)
MCA(2) (93)
MCA(1) (94)
OPEN (95)
MCA(0) (96)
DGND
3
ex1
SW_PCGAIN
T628
SDA3
HP_IDENT_TA1101
1
H_DVD,DTV
+3.3V_A
R420
15K
C413
100pF
50V
MO
9
1
R465
75
PC_INT
LTM1575W/LTM1775W
1
2
2
1
C467
100pF
2
C465
100pF
3
2
ZD411
RLZ8.2
1
3
dcjhp_4_1
CN403
2
PC AUDIO
ZD412
RLZ8.2
1
2
1
2
4
5
3
6
1
3
2
1
dj003a
CN413
ZD410
RLZ8.2
2
1
3
2
ZD409
RLZ8.2
3
3
1
ZD408
RLZ8.2
2
1
DTV AUDIO
3
3
2
1
3
2
1
dj003a
CN412
ZD404
RLZ8.2
ZD407
RLZ8.2
3
DTV INPUT
2
ZD405
RLZ8.2
2
L401
N
L410
N
L405
N
L404
N
1
1
ZD403
RLZ8.2
2
DVD AUDIO
C470
100pF
C462
100pF
1
2
1
3
3
2
1
dj003a
CN408
CN407
dj003a
DVD INPUT
1
R470
1K
3
ZD406
RLZ8.2
2
1
3
3
1
3
2
1
3
2
1
2
dj003a
CN406
1
PC_LIN
R479
1K
R474
1K
L403
N
2
ZD401
RLZ8.2
Hout
ZD402
RLZ8.2
2
1
Vout
3
+5V
3
2
1
2
3
3
2
1
1
D408
MMBD4148SE
2
D407
MMBD4148SE
1
3
dj003a
CN405
CN401
R492
d_sub15p
100
1/16W
3
3
3
C461
100pF
3
dj003a
CN404
R491
10K
1/16W
L402
N
1
dj003a
CN411
C466
100pF
3
D414
MMBD4148SE
2
1
D413
MMBD4148SE
2
RED
GREEN
BLUE
PC_RIN
T406
3
2
1
D405
KDS184
D406
MMBD4148SE
1
1
9
2
10
3
11
4
12
5
13
6
14
7
15
8
2
1
R473
1K
3
2
1
1
+5V
DTV_LIN
T405
R467
75
R466
75
dj003a
CN409
2
3
3
+5V_A
D415
MMBD4148SE
1
3
D411
MMBD4148SE
3
D410
MMBD4148SE
D409
MMBD4148SE
R429
75
R472
1K
R471
1K
R460
100
D416
MMBD4148SE
H
R464
75
8
G
7
F
6
E
5
D
C
R463
75
DTV_RIN
T404
R461
100
R459
100
R462
75
+5V
R428
75
C459
33pF
1
1
R427
75
C458
33pF
C457
33pF
R458
100
dj003a
CN410
R457
100
R482
100
I
10
J
11
K
12
L
14
13
M
N
O
15
B
1
DVD_RIN
T403
1
4
T452
Pr
C456
33pF
IC408
74HC157
3
T451
16
I
9
8
J
L
K
H
C
IN
IN
G
IN
D
E
IN
M
IN
B
INF
N
IN
A
1
2
3
4
5
6
7
T453
C
3
A
1
2 B
2 B
C
3
D403
BZX84C5V1
A
1
2 B
A
1
C
3
MMBZ5226BLT1
C
3
MMBZ5226BLT1
BZX84C5V1
R408
100
1/16W
A
D401
D404
DVD_LIN
Pb
Y
1
C455
33pF
C454
33pF
1
1.5uH
2 B
1.5uH
D402
R407
100
1/16W
L411
Cr
Cb
T402
C412
10nF
50V
MO
A
1
L412
R425
100
Y
1
+5V_A
C411
22uF
16V
P
R424
100
330
T623
SDA2
2
8
7
6
5
C410
100pF
R423
100
R673
SCL2
T401
IC406
74LCX14MX
C409
100pF
1
2
3
4
R426
100
C405
100uF
16V
IC407
NM24C02M8
C407
10nF
C408
100nF
L_PC
C414
100pF
50V
MO
C406
100nF
14
13
12
11
10
R421
15K
R638
0
RA606
DGND
2
#17 to GND
DGND
DGND
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
FL_RST
A7
A13
A12
A14
VDD3_3_3
VSS3
VDD2_5_2
FL_PGM
A15
A17
A16
A18
A19
NC6
RD
WR
NC4
P1_7
NC5
BLANK
B
G
R
VDDA2_5_2
VSSA1
NC3
XTAL1
XTAL2
NC2
8 6 4 2
#87 ALE
T333
1
1
RA610
7 5 3 1 7 5 3 1
1
D1
2
D4
3
D2
4
D3
5
XROM_
6
VDD2_5
7
VSS1
8
VDD3_3_1
9
P0_0
10
P0_1
11
P0_2
12
P0_3
13
P0_4
14
P0_5
15
P0_6
16
P0_7
ex2 17
ENE
1 18
STOP
T611 19 OCF
20
EXTIF_
21
CVBS
22
VDDA2_5
23
VSSA
24
P2_0
25
P2_1
26
P2_2
27
P2_3
28
NC_1
29
HS
30
VS
7 5 3 1
T332
1
RA605
MCAD(1)
MCAD(4)
MCAD(2)
MCAD(3)
C606
C605
100nF 100nF
1 3 5 7
GND_D
T331
8 6 4 2 8 6 4 2
RA611
TEST_PIN
slcon4p
1
#50 RESET
R354
GND_D
EMU
FORM MICOM
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
IC301
BA033FP
PAR(0)
PAR(1)
PAR(2)
PAR(3)
PAR(4)
PAR(5)
PAR(6)
PAR(7)
C386
100nF
C388
100nF
2
B
1 IN OUT3
GND
1
A
FT304
BLM41P600S
C385
100nF
R357
10K
100uF
16V
+3.3V_BD
MCA(14)
29
MCA(13)
28
MCA(8)
27
MCA(9)
26
MCA(11)
25
24
MCA(10)
23
22 MCAD(7)
21
2C
2B
2A
1Z
1Y
1X
1W
1V
1U
14 15 16 17 18 19 20
DGND
C384
100nF
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
IC620
1N 1O1P1Q 1R1S 1T
Q1
C383
10nF
MCAD(0)
T610
Q0
C382
100uF
16V
L301
3.3UH
IC350
AD9883AKST-110
RA602
R625 100
R356
3.3K
RA604
1 3 5 7 1 3 5 7
ex1
1 3 5 7 1 3 5 7
C381
3.9nF
GND20
VDD6
VDD5
RED0
RED1
RED2
RED3
RED4
RED5
RED6
RED7
VDD4
GND19
DATACK
HSOUT
SOGOUT
VSOUT
GND18
VD10
GND17
GND11
VD4
BAIN
GND12
VD5
VD6
GND13
GAIN
SOGIN
GND14
VD7
VD8
GND15
RAIN
A0
SCL
SDA
REF_BYPASS
VD9
GND16
C378
100nF
R351
0
C379
39nF
GND4
VDD2
VDD3
GND5
GND6
VD1
VD2
GND7
COAST
HSYNC
VSYNC
GND8
FILT
PVD1
PVD2
GND9
MIDSCV
CLAMP
VD3
GND10
2 4 6 8 2 4 6 8
1 3 5 7 1 3 5 7
DGND
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
RA601
C604
GND3
BLUE0
BLUE1
BLUE2
BLUE3
BLUE4
BLUE5
BLUE6
BLUE7
VDD1
GND2
GREEN0
GREEN1
GREEN2
GREEN3
GREEN4
GREEN5
GREEN6
GREEN7
GND1
GND_D
MCA(7)
2 4 6 8 2 4 6 8
RA603
C603
47uF
16V
1E
1F
1G
1H
1I
1J
1K
1L
1M
5
6
7
8
9
10
11
12
13
MCAD(1)
MCAD(2)
C602
100nF
GND_D
1
C377
100nF
DGND
C376
33pF
C302
100nF
2 4 6 8
C375
33pF
2 4 6 8 2 4 6 8
C374
100nF
DGND
C373
33pF
C372
100nF
C371
33pF
DGND
C369
100nF
DGND
C368
33pF
DGND
C367
100nF
C336
100uF
16V
+5V
C601
100nF
+2.5V_A
MCAD(3)
MCAD(4)
MCAD(5)
MCAD(6)
PAG(0)
PAG(1)
PAG(2)
PAG(3)
PAG(4)
PAG(5)
PAG(6)
PAG(7)
PAB(0)
PAB(1)
PAB(2)
PAB(3)
PAB(4)
PAB(5)
PAB(6)
PAB(7)
+3.3V_A
4 3 2 1 32 31 30
1D 1C1B 1A 2F 2E 2D
MCA(7)
MCA(6)
MCA(5)
MCA(4)
MCA(3)
MCA(2)
MCA(1)
MCA(0)
GND_D
+3.3V_BD
C366
33pF
DGND
MCA(18)
MCA(17)
MCA(12)
MCA(15)
MCA(16)
MCA(4)
MCA(11)
MCA(5)
MCA(9)
MCA(6)
MCA(8)
MCA(10)
MCA(3)
MCAD(7)
MCA(0)
MCA(1)
MCA(2)
AD(0:7)
PAR(0:7)
PAB(0:7)
PAG(0:7)
A
B
2
B
2
A1 A1
+3.3V_A
1
FT302
2
B
FT301
MCAD(5)
MCAD(0)
MCAD(6)
MCA(0:19)
FT300
CONFIDENTIAL
Schematic Diagrams
2 LCDTV DPTV & 82860 Part Schematic Diagram
A
2
1
B
FT221
+2.5_BA
B
2
1 A
FT222
A
B
1
2
A
FT253
C294
33pF
50V
MO
1
2
B
FT254
A
C293
33pF
50V
MO
C292
33pF
50V
MO
1
2
B
FT223
C291
33pF
50V
MO
C290
33pF
50V
MO
+3.3V_BD
1 A
2 B
FT255
+3.3V_BD
GND_D
1
C202
100nF
3
C
B2
T903
C
3
T902
C201
100nF
B
A
T901
1
1
+3.3V_BDA
FT904
SGM32F1E104-2A
2
1
1 A
3
C
B2
FT903
SGM32F1E104-2A
1 A
B2
FT902
SGM32F1E104-2A
1
MD(0)
MD(13)
MD(12)
MD(11)
MD(10)
MD(9)
MD(8)
MD(7)
MD(6)
MD(5)
MD(4)
MD(3)
MD(2)
MD(1)
+3.3V_BD
MD(26)
MD(25)
MD(24)
MD(23)
MD(22)
MD(21)
MD(20)
MD(19)
MD(18)
MD(17)
MD(16)
MD(15)
MD(14)
MD(31)
MD(30)
MD(29)
MD(28)
MD(27)
MD(34)
MD(33)
MD(32)
MD(47)
MD(46)
MD(45)
MD(44)
MD(43)
MD(42)
MD(41)
MD(40)
MD(39)
MD(38)
MD(37)
MD(36)
MD(35)
+3.3V_BD
MD(60)
MD(59)
MD(58)
MD(57)
MD(56)
MD(55)
MD(54)
MD(53)
MD(52)
MD(51)
MD(50)
MD(49)
MD(48)
MD(63)
MD(62)
MD(61)
3
C
MD(0:63)
A
MD(0:63)
AGND4
FT901
SGM32F1E104-2A
C907
22uF
16V
C908
100nF
C915
33pF
50V
NC17
NC16
NC15
GND3
GND4
C904
22uF
C902
1nF
C913
100nF
16V
MO
C906
22uF
C905
1nF
C914
100nF
16V
MO
IC901
DS90C385MTD
DAR(7)
DAR(5)
DAG(0)
DAG(1)
DAG(2)
DAG(6)
DAG(0:7)
GND_D
DAG(7)
DAG(3)
12
13
14
15
16
17
18
19
20
21
22
23
24
DAG(4)
GND_D
DAB(0)
DAB(6)
DQMA(3)
DQMA(2)
DQMA(1)
DQMA(0)
MA(0)
MA(8)
MA(9)
MA(7)
MA(6)
MA(5)
MA(4)
MA(3)
MA(2)
MA(1)
DQMA(7)
DQMA(6)
DQMA(5)
DQMA(4)
DAB(7)
DAB(1)
DAB(2)
DAB(0:7)
+3.3V_BA
DAB(3)
DAB(4)
DAB(5)
+3.3V_82
R201
33
1
1
B
C268
100pF
A
R236
75
GND_D
1
1
1
TP502
SUPLVAL
TP504
SUPLVAL
1
R298
100
1/16W
TP503
SUPLVAL
TP505
SUPLVAL
R297
PAR(7)
PAR(6)
PAR(5)
PAR(4)
PAR(3)
FT211
BLM41P600S
PAR(2)
PAR(1)
PAR(0)
PAB(7)
PAB(6)
PAB(5)
PAB(4)
PAB(3)
PAB(2)
PAB(1)
PAB(0)
GND_D
+5V
FT210
BLM41P600S
VDDC1
CAPD1
CAPD0
CAPD2
CAPD4
CAPD3
CAPD6
CAPD7
VSYNCRGB
CAPD5
46
47
48
49
50
51
52
VSYNCPIP
HSYNCPIP
CLKPIP
100
AGND4
1
C352
100nF
C303
R319
75
1/16W
Rout
R311
75
1/16W
C362
100pF
50V
MO
AGND4
AGND4
100nF
C363
100nF
C365
100nF
AGND4
VSYNC
HSYNC
R328
0
C307
47pF
50V
MO
1
GND_D
R241
10K
1/16W
R248
10K
Bbit
T203
CA300
CA301
CA302
CA303
DAB(0)
DAB(1)
DAB(2)
DAB(3)
DAB(4)
DAB(5)
DAB(6)
DAB(7)
CA304
DAG(0)
DAG(1)
DAG(2)
DAG(3)
DAG(4)
DAG(5)
DAG(6)
DAG(7)
1
1
1
C331
100nF
R327
10K
CA305
DAR(7)
OSDR0
OSDR1
OSDCK
DVSS5
DVDD5
CLKIOUT
DIIOUT
VDIOUT
HDIOUT
RBSO
VO0
VO1
VO2
VO3
VO4
VO5
VO6
VO7
DVSS4
DVDD4
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
DGND
C323
100nF
AGND4
+3.3V_BD
GND_D
DGND
C327
100nF
R630
22
DGND
NK15
FT213
FT257
NK17
C328
100nF
DGND
+3.3V_82A
C304
100nF
50V
MO
C329
C332
100nF
C334
100nF
92
91
90
89
88
87
86
85
84
83
82
81
80
DGND
A
DVSS6
DVDD6
HD2IN
VD2IN
DI2IN
RBS2
OEIN1
CLK2IN
YMIN
YSIN
OSDB0
DSDB1
OSDG0
OSDG1
LVDS_ON_OFF
EMI OPTION
104
103
102
101
100
99
98
97
96
95
94
93
DGND
UI3
UI4
UI5
UI6
UI7
YI0
YI1
YI2
YI3
YI4
YI5
YI6
YI7
C220
15pF
50V
MO
DGND
114
113
112
111
110
109
108
107
106
105
DVDD8
DVSS7
VI0
VI1
VI2
VI3
VI4
VI5
VI6
VI7
NC4
BO5
BO6
BO7
BO8
BO9
127
126
125
124
123
122
121
120
119
118
117
116
115
GO9
DVDD9
DVSS8
BO0
BO1
BO2
BO3
BO4
140
139
138
137
136
135
134
133
132
131
130
129
128
153
152
151
150
149
148
147
146
145
144
143
142
141
A/D
C335
10nF
DGND
T971
C333
100nF
47uF
16V
PIN 189
DGND
DGND
+3.3V_82
DGND
DGND
DGND
C330
33pF
C340
33pF
50V
MO
50V
MO
PIN 180
OPTION( L : I2C)
DGND
R299
100
(H : PARREL)
SDA3
SCL3
IC300
MN82860
DGND
C210
20pF
50V
MO
PIN 197
PIN 172
PIN 151
PIN 139
PIN 127
PIN 115
PIN 103
PIN 85
PIN 68
PIN 42
PIN 32
PIN 27
PIN
SLAS1
IICSW
RBSI
DIIN
YDIN
HDIN
NC7
+3.3V_BD
C306
47pF
50V
MO
NC3
DVDD7
UI0
UI1
UI2
DVSS12
DVDD13
RSTN
SDA
SCL
SLAS0
T204
T205
1
+3.3V_BDB
196
197
198
199
200
201
202
203
204
205
206
207
208
C364
100nF
100
100
100
T973
T974
B
20K
C357
100nF
DGND
R322
R323
R324
R312
C359
100nF
100nF
16V
MO
C358
1uF
50V
100nF
C353
C354
100nF
R313
75
1/16W
R310
75
1/16W
C347
DGND
DGND
1
C305
100nF
47
2
R318
24K
AGND4
R904
47
A
C349
100nF
R903
C322
100nF
B
C351
1uF
50V
Gout
C361
100pF
50V
MO
AGND4
C344
16V
MO 100nF
C348
100nF
16V MO
R307
75
1/16W
RA304
1
AGND4
C341
100nF
8 6 4 2 8 6 4 2
7 5 3 1 7 5 3 1
1 3 5 7 1 3 5 7
2
AGND4
DGND
C342
100nF
7 5 3 1 7 5 3 1
1 A
GND_D
MD(20)
MD(21)
MD(22)
MD(23)
MD(24)
MD(25)
MD(26)
MD(27)
MD(28)
MD(29)
MD(30)
MD(31)
R308
75
1/16W
C321
100nF
8 6 4 2 8 6 4 2
DGND
C360
100pF
50V
MO
1 3 5 7 1 3 5 7 RA303
C319
100nF
8 6 4 2 8 6 4 2
7 5 3 1 7 5 3 1
GAMMA_CONTROL
156
155
154
AGND4
R317
1M
1/16W
Bout
GND_D
C277
100nF
R309
1M
T202
T201
Gbit
Rbit
DAR(0)
DAR(1)
DAR(2)
DAR(3)
DAR(4)
DAR(5)
DAR(6)
DGND
R305
1M
R907
47
R906
47
157
NC6
158
159 BLOUT
160 PWMOUT
OEIN2
161
162 OUTRST
163 TESTB
164 TESTS
165 TESTC
166 TESTT
167 TEST4
168 TEST3
169 TEST2
170 TEST1
171 TEST0
172 DVSS11
173 DVDD12
174 AVDD1
BUIN
175
176 UREFH
177 UREFHS
178 UREFM
179 UREFL
AVSS1
180
AVDD2
181
CLH
182
GYIN
183
YREFH
184
YREFHS
185
YREFM
186
YREFL
187
CLL
188
AVSS2
189
AVDD3
190
VREFL
191
VREFM
192
VREFHS
193
VREFH
194
RVIN
195
AVSS3
R238
120
82
100
1/16W
DAR(0)
DAR(1)
DAR(2)
DAR(3)
DAR(4)
DAR(5)
DAR(6)
DAR(7)
1
1
1
1
1
C343
1uF
50V
AGND4
C200
47uF
16V
0
C924
22pF
DGND
C276
100nF
R303
AGND4
1
C279
100nF
HSYNCRGB
AVSS3
VPROT
HFLB
33
34
35
36
37
38
39
40
41
42
43
44
45
C278
100nF
MD(9)
MD(10)
MD(11)
MD(12)
MD(13)
MD(14)
MD(15)
MD(16)
MD(17)
MD(18)
MD(19)
65
64
63
62
61
60
59
58
57
56
55
54
53
1
GND_D
MD(8)
1
2
R239
4.7K
1/16W
VSYNC
VSS2
HSYNC
CCLP3
AVDD
MD31
C275
100nF
C339
22uF
16V
1 3 5 7 1 3 5 7 RA301
T972
R302
4.7K
C923
22pF
R905
DGND
A
R301
10K
C338
100nF
C922
22pF
C318
100nF
GND_D
DQMA(3)
DQMA(2)
DQMA(1)
DQMA(0)
MD(0)
MD(1)
MD(2)
MD(3)
MD(4)
MD(5)
MD(6)
MD(7)
78
77
76
75
74
73
72
71
70
69
68
67
66
RA306 2 4 6 8 2 4 6 8
2 B
MD30
LVDS_DATA(8)
LVDS_DATA(9)
A
MD29
AVSSA6
CB
LVDS_DATA(4)
LVDS_DATA(5)
LVDS_DATA(6)
LVDS_DATA(7)
DGND
DGND
H_S
DGND
B
MD28
LVDS_DATA(2)
LVDS_DATA(3)
1
RB2
AVDDA5
LVDS_DATA(0)
LVDS_DATA(1)
C921
10nF
50V
MO
2
MD27
91
90
89
88
87
86
85
84
83
82
81
80
79
1
16V
C337
100nF
1
A
2
MD22
MD23
PAG(7)
PAG(6)
PAG(5)
PAG(4)
PAG(3)
PAG(2)
PAG(1)
PAG(0)
33pF
50V
MO
MD21
MD24
RT2
R234
C244 B
100pF
MD20
MD26
C267
100nF
16V
MO
C271
VSS3
VDD2
MD25
C264
1uF
C269
22uF
16V
MD19
RT1
100
100
L208
3.3UH
MD17
MD18
4
3
2
1
DGND
CCLP2
AVSSA5
140
110
94
66
23
RB1
R232
R233
C261
1uF
CR
AVDDA4
IRSET
C254
22uF
C
AVSS
C252
22uF
C259
100pF
AVSSA4
AVSS_1
C257
100pF
50V
MO
AVDDA3
1
2
3
4
5
6
R225
1K
C258
22uF
16V
C248
100pF
VSS11
VM
R224
10
L207
3.3UH
C247
220uF
MD16
PIN
PIN
PIN
PIN
PIN
VDD_ADC
B
C249
100nF
1
S-C
C245
100nF
MD15
V5SF
T213
MD13
MD14
R
100pF
MD12
3.3V
CCLP1
AVSSA3
G
C246
CVBS4
AVSSA2
CAPD8
C250
C234
100pF 22uF
16V
MD7
VSS4
CVBS_OUT1
VSS1
197
198
199
200
201
202
203
204
205
206
207
208
MD6
AVDDA2
VDD1
R221
1K
C242
100pF
50V
MO
MD5
MD11
CAPD10
R219
33
MD4
CVBS3
CAPD9
L206
3.3UH
S-Y
MD3
MD9
20
21
22
23
24
25
26
27
28
29
30
DPTV#31 31
32
C238
100nF
100pF
MD2
MD8
CAPD11
C239
C235
100pF
MD1
MD10
CAPD12
C251
22uF
16V
MD0
VDDC2
CAPD13
C237
100pF
DQM0
CVBS2
CAPD14
22uF
16V
DQM1
CVBS1
CAPD15
C236
DQM2
AVSSA1
CAPD16
C231 C232
22uF 100pF
16V
3.3UH
INT
AVDDA1
CAPD17
L205
MO
C241
22uF
16V
1K
1
C233
100pF
50V
3.3UH
SC
CAPD19
R216
1K
R213
183
184
185
186
187
188
189
190
191
192
193
194
195
196
CAPD18
R215
10
16V 22uF
CAPD20
T208
T209
C284
CAPD21
L204
1
3.3UH
VDD3
DQM3
IC200
DPTV-3D-6730
SD
CAPD22
100
L203
ALE
RD
CAPD23
VIDEO_INPUT
16V
VDDC5
WR
PS
C285
22uF
1
AD0
TEST
R212
R214
47
T207
TUNER_CVBS
AD1
7
8
9
10
11
12
13
14
15
16
17
18
19
OPTION
AD2
VSS10
VSS5
174
156
125
80
52
RA302 2 4 6 8 2 4 6 8
RO8
RO9
DVDD10
DVSS9
GO0
GO1
GO2
GO3
GO4
GO5
GO6
GO7
GO8
AD4
33
33
33
33
33
33
C274
100nF
2 4 6 8 2 4 6 8
VOUT
HOUT
BNOUT
DVDD11
DVSS10
RO0
RO1
RO2
RO3
RO4
RO5
RO6
RO7
MCLK
PIN
PIN
PIN
PIN
PIN
AD5
R202
R203
R204
R205
R206
R207
FT305
BLM41P600S
NC5
CLK2OUT
AD7
INT2
ALE
DPTV_RD
DPTV_WD
CS0
AD6
RESET
CVBS_OUT
170
171
172
173
174
175
176
177
178
179
180
181
182
CS1
13
12
11
10
9
8
7
6
5
RA313
SUPLECODE
DAB(0:7)
1
DVDD0
2
DVSS0
3
RVI7
4
RVI6
5
RVI5
6
RVI4
7
RVI3
8
RVI2
9
RVI1
10
RVI0
11
GYI7
12
GYI6
13
GYI5
14
GYI4
15
GYI3
16
GYI2
17
GYI1
18
GYI0
19
BUI7
20
BUI6
21
BUI5
22
BUI4
23
BUI3
24
BUI2
25
BUI1
26
BUI0
27 DVDD1
28 DVSS1
29
CLK1IN
30 NC1
31
HDOWN
32 DVDD2
33
DVSS2
34 YO7
35 YO6
36 YO5
37 YO4
38 YO3
39 YO2
40 YO1
41 YO0
42
DVDD3
43 DVSS3
44 UO7
45 UO6
46 UO5
47 UO4
48 UO3
49 UO2
50 UO1
51 UO0
52 NC2
CAS
RAS
2.5V
XTLI
XTLO
RA305
DGND
WE
VLF
DAG(0:7)
B
C311
47uF
+3.3V_82A
AVSS2
AVDD2
RA311
SUPLECODE
RA312
SUPLECODE
47
+3.3V_BD
MA(2)
MA(1)
MA(0)
GND_D GND_D
MA0
ADDRSEL
1
U113
22
21
20
19
18
17
16
15
14
B
2
MA1
AVSS1
104
103
102
101
100
99
98
97
96
95
94
93
92
U114
MLF
AD3
AD(2)
AD(1)
AD(0) C229
100nF
T206
U112
1
A
C
3
+3.3V_BDA
MA4
MA2
CLKRGB
AD(7)
AD(6)
AD(5)
AD(4)
AD(3)
X201
HC-49/S-SMD(14.31818MHZ)
AD(0:7)
U111
+3.3V_82
150
150
C226
20pF
U110
DAR(0:7)
MA3
MA7
MA5
111
110
109
108
107
106
105
MA6
BA
MA9
MA8
VSS6
VDD4
MD32
MD33
DQM4
DQM5
DQM6
DQM7
124
123
122
121
120
119
118
117
116
115
114
113
112
MD34
MD35
MD36
MD37
VDDC3
VSS7
MD38
MD39
MD40
MD41
MD43
MD42
MD44
MD46
MD45
137
136
135
134
133
132
131
130
129
128
127
126
125
MD47
MD48
MD50
MD49
VDD5
VSS8
MD52
MD51
MD53
GND_D
C289
47uF
16V
AVDD1
150
150
C225
20pF
Q1
10K
R208
GND_D
C227
100pF
U109
2
R620
R943
GND_D
C228
100pF
157
158
159
160
161
162
163
164
165
166
167
168
169
C916
22uF
16V
AGND4
SGM32F1E104-2A
GND_D
R610
R611
+3.3V_BA
Q0
+3.3V_BD
DGND
FT214
C221
0.56NF
C224
0.56NF
R902
0
44
43
42
41
40
39
TXCLKOUT+ 38
TXOUT3- 37
TXOUT3+ 36
LVDSGND2
35
PLLGND 34
PLLVCC 33
PLLGND1 32
PWRDWN
31
TXCLKIN
30
TXIN26
29
GND4
LVDSVCC
LVDSGND1
TXOUT2TXOUT2+
TXCLKOUT-
GND3
TXIN20
TXIN21
TXIN22
TXIN23
VCC2
TXIN24
TXIN25
CN901
slcon22p_1
DAR(1)
DAR(0)
DAR(6)
OPTION
+3.3V_BD
MA(7)
MA(6)
MA(5)
MA(4)
MA(3)
MA(9)
MA(8)
MD(48)
MD(47)
MD(46)
MD(45)
MD(44)
MD(43)
MD(42)
MD(41)
MD(40)
MD(39)
MD(38)
MD(50)
MD(49)
MD(63)
MD(62)
MD(61)
MD(60)
MD(59)
MD(58)
MD(57)
MD(56)
MD(55)
MD(54)
MD(53)
MD(52)
MD(51)
MD54
MD55
MD56
MD58
MD57
150
149
148
147
146
145
144
143
142
141
140
139
138
MD59
MD60
156
155
154
153
152
151
MD62
MD61
GND_D
MD63
B 2
C917
100nF
16V
MO
100nF
100nF
VSS9
A 1
C216
OPTION SAMPLING EDGE
(RISING FALLING)
B2
A
C
3
GND_D
VDDC4
B 2
1
DQMA(0:7)
MA(0:9)
MA(0:9)
+2.5_BA
C218
22uF
16V
FT201
A 1
DQMA(0:7)
GND_D
C217
47uF
16V
C219
100pF
GND_D
MD(37)
C215
100nF
A
C288
FT206
4
B
2
C214
100nF
C
3
L201
3.3UH
1
L202
3.3UH
C223
22uFC222
16V 100pF
GND_D
MD(36)
MD(35)
MD(34)
MD(33)
MD(32)
DQMA(7)
DQMA(6)
DQMA(5)
DQMA(4)
GND_D
FT281
SGM32F1E104-2A
TXIN1
TXIN0
TXIN27
LVDSGND
TXOUT0TXOUT0+
TXOUT1TXOUT1+
VCC1
TXIN11
TXIN12
TXIN13
GND2
TXIN14
TXIN15
TXIN16
R_FB
TXIN17
TXIN18
TXIN19
25
26
27
28
FT923
SGM32F1E104-2A
+2.5V_B
TXIN3
TXIN2
GND5
DAR(4)
DAR(3)
DAR(2)
DGND
MA(2)
MA(1)
MA(0)
MA(8)
MA(9)
MA(7)
MA(6)
MA(5)
MA(4)
MA(3)
DAG(5)
+2.5V_B
TO PANEL
DIGITAL VIDEO
56
55
54
53
52
51
50
49
48
47
46
45
DAB(0)
DAB(1)
DAB(2)
DAB(3)
DAB(4)
DAB(5)
DAB(6)
DAB(7)
GND_D
TXIN4
DAG(0)
DAG(1)
DAG(2)
DAG(3)
DAG(4)
DAG(5)
DAG(6)
DAG(7)
GND_D
GND_D
VCC
TXIN5
TXIN6
TXIN7
GND1
TXIN8
TXIN9
TXIN10
7 1 3 5 7
1
2
3
4
5
6
7
8
9
10
11
1 3 5 7 1 3 5
DQM0
C912
100nF
16V
MO
11
5
58
MCH
45
A10
44
NC2
43
NC3
42
NC4
41
NC5
40
NC6
39
NC7
38
NC8
37
NC9
86
NC10
87
NC11
90
NC12
89
NC13
88
NC14
85
GND1
66
GND2
DQM3
DQM2
DQM1
57
24
56
23
31
A7
A6
A5
A4
A3
A2
A1
A0
C901
1nF
DGND
2 4 6 8 2 4 6 8 2 4 6 8
97
52
36
95
94
93
92
91
16
46
NC21
NC20
NC19
NC18
69
68
64
63
61
60
7
6
4
3
1
100
98
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
77
75
74
21
20
18
17
13
12
10
9
72
71
BA
A8
A9
DSF
CLK
29
51
30
50
49
48
47
34
33
32
53
55
66
C903
22uF
99
82
76
70
62
19
C212
100nF
GND_D
GND_D
GND_D
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
IC211
M32L32321SA-7Q
65
96
54
25
26
27
28
C211
100nF
GND_D
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ12
DQ11
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
DQ25
DQ24
VDD4
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
VDDQ3
VDDQ2
VDDQ1
VDD1
NC9
NC10
NC11
NC12
NC13
NC14
GND1
GND2
67
73
79
84
83
81
80
78
35
15
2
8
14
22
59
C208
100nF
11
5
GND_D
GND_D
VDD3
NC18
NC17
NC16
NC15
GND3
GND4
NC21
NC20
NC19
MCH
A10
NC2
NC3
NC4
NC5
NC6
NC7
NC8
43
42
41
40
39
38
37
86
87
90
89
88
85
DQM3
DQM2
DQM1
DQM0
58
45
44
C206
100nF
99
82
76
70
62
19
VDD2
CKE
WE_L
CAS_L
RAS_L
CS_L
100
98
97
52
36
95
94
93
92
91
16
46
72
71
69
68
64
63
61
60
7
6
4
3
1
DQ12
DQ11
DQ10
DQ9
DQ8
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
DQ25
DQ24
DQ23
DQ22
DQ21
DQ20
DQ19
DQ18
DQ17
DQ16
DQ15
DQ14
DQ13
DQ31
DQ30
DQ29
DQ28
DQ27
DQ26
65
96
54
25
26
27
C213
100nF
57
24
56
23
C209
100nF
GND_D
C204
100nF
VSSQ8
VSSQ7
VSSQ6
VSSQ5
VSSQ4
VSSQ3
VSSQ2
VSSQ1
IC210
M32L32321SA-7Q
33
32
31
VDDQ3
VDDQ2
VDDQ1
A8
A9
A7
A6
A5
A4
A3
A2
A1
A0
67
73
79
BA
VDDQ8
VDDQ7
VDDQ6
VDDQ5
VDDQ4
80
78
77
75
74
21
20
18
17
13
12
10
9
35
15
2
8
14
22
59
VDD1
VDD2
CKE
WE_L
CAS_L
RAS_L
CS_L
C207
100nF
VDD4
VDD3
C205
100nF
29
51
30
50
49
48
47
34
C299
33pF
50V
MO
DSF
CLK
C298
33pF
50V
MO
53
55
C297
33pF
50V
MO
C296
33pF
50V
MO
28
C295
33pF
50V
MO
84
83
81
MO
C203
100nF
C281
100uF
16V
R249
100
AGND4
C282
100nF
AGND4
AGND4
RST_FR_MCU1
SDA1
SCL1
T217
1
RST_FR_MCU
+3.3V_BDB
E
AGND4
10-2
1
1
C308
33pF
50V
MO
C309
33pF
50V
MO
C310
33pF
50V
MO
C312
33pF
50V
MO
C313
33pF
50V
MO
C314
33pF
50V
MO
C315
33pF
50V
MO
C316
33pF
50V
MO
C317
33pF
50V
MO
C320
33pF
50V
MO
C324
33pF
50V
MO
C325
33pF
50V
MO
C326
33pF
50V
MO
1
VS
HS
DCLK
PAB(0:7)
1
Q01
KSC1623-Y
SW_PCGAIN
T_BOUT
AD9883A
(VS HS DCLK)
AGND4
T_GOUT
1
C
B
T_VSYNC
T_HSYNC
T_ROUT
1
R01
2.2K
1/16W
R02
4.7K
1/16W
PAG(0:7)
DPTV#31
OPTION
R235
R227_D
100
1/16W
390 1%
DPTV_ENBLE
PAR(0:7)
BRI_CNTL
T_GND
DGND
LTM1575W/LTM1775W
CONFIDENTIAL
Schematic Diagrams
3 LCDTV DC Power Input, Sound, Tuner, ETC Part Schematic Diagram
TO SPEAKER
CN501 slcon2p
CN502
slcon3p +
-
C849
D
3
2
VIN
1
C815
120uF
6.3V
SD
SENSE
C828
22uF
17
BLM41P600S
VOUT
3
T801
T501
15
100
1/16W
+5V_A
1
1
T502
R512
5.1KOHM
6.8KOHM
CN01
slcon12p
R513
5.1KOHM
6.8KOHM
Q002
2SC2412K-Q
C003
22uF
16V
C
B
HS_EMI
1
SUPLVAL
4
C827
120uF
6.3V
GND
5
D805
MBRM130LT3
2K
1/16W
FT851
IC802
LP3961EMP-2.5
2
1
1
100uH
R807
R806
1.2K
1/16W
220nF
FT852
BLM41P600S
L801
C824
100nF
R008
10K
1/16W
3
1
E
C848
220nF
1
4
A
FROM ADAPTER
C814
0.12nF
50V
MO
3
B
C
T504
1
1
IC811
B
MC34063ACD
F
5
+3.3V_BU
R
R010
T503
2
2
G
6
CN801
dcjhp_7
A
H
7
A
100nF
SOUND WATTAGE CHANGE
+2.5V_A
+3.3V_A+3.3V_A
1
B
2
B
100uF
16V
8
1
1
A
R805
0.33
1W
C862
2
C861
FT816
BLM41P600S
2
+
L
2
1
STAND-BY POWER
1
+14V_INVERTER
C517
150nF
C518
150nF
H_S
SDA2
SCL2
C502
150nF
C501
150nF
VIDEO_INPUT
2
E
R009
12K
1/16W
R007
75
1/16W
3
R012
560
4
5
C_BOOST
Ground_2
2
C864
100nF
1
8
BLM41P600S
2
ON_OFF
Ground_1
7
R824
10K
C867
120uF
6.3V
C810
120uF
6.3V
R822
4.7K
ON : HIGH
C895
100uF
C868
100nF
GND_D
3
R502
10
R501
10
C508
150nF
T802
C869
120uF
6.3V
2
C507
150nF
C871
100nF
C511
150nF
C509
150nF
GND_D
C510
150nF
C512
150nF
R017
100
1/16W
8
16V
Q003
2SC2412K-Q
+3.3V_BA
12
+3.3V_BU
T803
D1
C1
B1
A1
Z
R812
100K
1/16W
CN920
slcon14p_1
T904
R552
270
1/10W
4
5
C1
NC
C2
C528
100uF
3
2
C3
1
C
3
1
3
B
2
1
A
C539
1nF
C543
470pF
B
D570
RLZ8.2
AGND_S
9
T814
10
R554
1K
1/16W
R553
1K
1/16W
HP_IDENT_CPU
11
12
1
T815
13
3
D804
MMBD4148SE
1
C541
330nF
14
1
T816
2
AGND_S
AGND_S
AGND_S
AGND_S
AGND_S
FROM SUB INPUT BOARD
R515
C532
1uF
1uF
C545
10uF
C546
10uF
HP_R
T813
HP_L
R519
4.7
R518
4.7
20K
C529
AGND_S
AGND_S
7
CN702_1
slcon14p_1
5
AGND_S
C538
1.5nF
6
4
T812
8
1
R551
270
1/10W
2
D571
RLZ8.2
A
C580
47uF
16V
A
5
GND
7
C
3
C
D543
RLZ8.2
R514
20K
5
INVERT_GND
C570
100nF
R516
10K
AGND_S
AGND_S
T810
T811
6
C542
330nF
C537
1nF
AGND_S
T922
1
1
D
2
B
2
1
C535
100uF
3
4
C909
100nF
3
R517
10K
3
INVERTER_ON_OFF
8
F
2
B
1
A
B
2
1
C536
1nF
TUNERGND
CN810
PDJ005
2
IC530
TDA7050T/N3
L540
N
4
BRI_CNTL
C533
4.7uF
25V
25V
CVBS Wireless
Adaptive Power
1
R512
6.8K
C531
4.7uF
INVERT_GND
3
1
2
1
C547
1nF
R523
100
R524
100
C544
3.3nF
FROM REMUTE/CON BOARD
AGND_S
T924
1
R513
6.8K
AGND_S
T920
1
AGND_AMP
RLZ8.2
T808
1
1
+8V
FT813
BLM41P600S
ZD804
2
7
2
2
FT812
BLM41P600S
3
2
1
ZD803
RLZ8.2
SW_7050
50V
MO
A
+5V
B
A
1
FT806
BLM41P600S
1
T809
C596
100pF
50V
MO
C597
100uF
16V
100uF
16V
C534
100uF
C550
100pF
B
1
A
A
1
FT804
BLM41P600S
2
1
AGND_AMP
R505
20K
R511
5.6K
FT802
BLM41P600S
2SC2412K-Q
+14V_INVERTER
T805
L503
6
C519
1uF
E
R507
100
R508
2.7K
AGND_S
Q801
B
R811
10K
1/16W
D501
MMBD4148SE
4
C819
1uF
50V
ZD802
RLZ8.2
1
1
C598
6
Q808
2SC2412K-Q
R528
100
1/16W
C525
100nF
R506
20K
C
L921
3.3UH
L504
A
B
C
D
E
F
G
H
I
J
C503
100nF
3
AVI_R
AVI_L
3
1
T804
2
C844
100nF
E
E
TO PANEL INVERTER
1
3
OUT
GND
2
Vcc
B
OFF : LOW
1
IN
U115
RLZ8.2
2
D502
QZX363C5V6
C4
OUT
GND
C
ON : HIGH
T806
1
3
IN
R021
75
1/16W
R023
12K
1/16W
1
A
1
C843
100uF
C872
100uF
E
R026
560
B
B
8
7
6
5
MO
B
C
E
A
D2
D2_1
C007
100nF
16V
C
2
C
D1_1
S2
G2
R022
10K
1/16W
3
Q501
KSC1623-Y
sleep Mode : high
3
IC808_C
D1
S1
G1
S-C
C526
100nF
2
R873
10K
1/16W
1
2
3
4
C870
1uF
50V
Q004
2SC2412K-Q
R591
18K
1/16W
1
R874
100K
1/16W
C524 C504
100nF 100nF
IC803
BA178M08FP
1
2
1
B
A
C853
100nF
C523
100uF
16V
IC501
TA1101B
C522
100uF
16V
+8V
C841
100uF
R024
100
1/16W
R504
4.7K
E
T
S
R
Q
P
C521
1uF
U
C520
100uF
16V
C589
100nF
50V
MO
AGND_AMP
IC807
MC7812CD2T
+3.3V_BU
C023
22uF
16V
B
+12V_3
C842
100nF
L502
C874
100nF
K
L
M
N
O
5
C890
120uF
6.3V
C873
100nF
ON : LOW
C881
100nF
50V
MO
AGND4
C
C813
120uF
6.3V
OFF : HIGH
IC808
SI9933ADY-T1
C024
100nF
16V
MO
+5V +8V
Q555
KSC1623-Y
4
Y
X
W
V
SENSE
GND
LM2596S_5.0
FT815
BLM41P600S
C
3
29
28
27
26
25
24
23
22
21
20
19
18
17
16
R821
4.7K
SD
R503
1M
30
C865
120uF
6.3V
1
C875
100nF
C876
220uF
L501
A
3
1
VOUT
+12V_3
R823
10K
C809
100uF
16V
1/16W
75
R014
2
B
A
1
VIN
FT825
BLM41P600S
2
2
A
B
2
3
D802
SS24
C851
100uF
16V
D806
MBRM130LT3
R810
3.6K
1/16W
5
C858
100nF
C516
150nF
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
R809
1.2K
1/16W
1
FT814
BLM41P600S
C818
120uF
6.3V
4
1
50V
MO
4
F_B
2
D
Vin
FT817
BLM41P600S
C514
150nF
C513
150nF
C515
150nF
A
IC806
LP3961EMP-2.5
L807
53.0UH
6
OUT
E
5
100uH
GND1
C863
10nF
C852
100nF
ON_OFF
C
1
GND
F
L804
1
3
6
C816
100uF
16V
C817
0.12nF
R016
12K
1/16W
R019
560
+12V_AUDIO
2
2
IC812
G MC34063ACD B
B
7
+2.5V_B
B
FT824
BLM41P600S
+5V
IC804
LM2596S-5.0
A
H
E
SGM32F1E104-2A
+14V_2
B
1
8
B
FT001
1
2
+5V_A
A
R808
0.33
1W
C
S-Y
11
OFF : LOW
LM2676SX_3.3
+14V_2
C005
22uF
9
10
B
C845
220uF
100uF
16V
D803
SK34
IC805
LM2676SX-3.3
OUT
GND
R015
10K
1/16W
7
2
C899
220uF
100uF
16V
4
IN
+3.3V_BU
6
1
3
1
T807
Output
C505
100nF
C506
100nF
IC813
BA033FP
FT822
AGND_AMP
L806
AGND_AMP
3
AGND_AMP
C859
10nF
FEEDBACK
Input
ESDA
ESCL
Rbit
Gbit
Bbit
IDENT_FAC
SW_PCGAIN
+3.3V_BA
AGND_AMP
NC
2
+5V
1
C856
100nF
+3.3V_BD
1
C866
10nF
6
1
2
1
C846
100nF
5
B
A
+3.3V_B
C857
C898
100uF 100uF
220uF 220uF
A
+14V_1
FT818
BLM41P600S
B
C847
100UF
16V
25
23
NC_11
NC_6
AHVSS_1
NC_5
22
43
C552
10uF
16V
R532 1K
B
R533 1K
21
20
19
18
17
16
15
14
AGND_S
13
SC2_IN_L
DVSUP_2
SC2_IN_R
DVSUP_1
100nF
C561
10uF
FROM KEY INPUT BOARD
10
ASG1
ADR_CL
AGND_S
AGND_S
+3.3V_A
9
SC1_IN_L
ADR_WS
8
SO_IN_R
ADR_DA
C564
4.7uF 25V
AVSS_2
NC_15
2
63
A
A1
A1
KEY2
T531
D601
DGND
12C_CL
R842
4.7K
1/16W
CN706_1
slcon3p
1
T817
1
T818
3
3
C
C
1
2
BLM41P600S
B
AGND_S
14
NC_14
3
D602
C882
100nF
50V
MO
C883
100nF
50V
MO
2
1
T819
DGND
1
C575
22uF
R539
100
CONTR1
AGND_S
C
1
STANDBYQ
3
SW_7050
L541
N
B
C576
47nF
D545
1
AGND_S
TP501
1
RLZ8.2
A
2
16V
80
SOUND MUTE
AGND_S
AGND_S
C577
47uF
MOVE
R580
100
1/16W
AGND_S
AGND_S
79
78
ADR_SEL
C_CTR_I_O_0
D_CTR_I_O_1
76
77
NC_17
75
NC_16
AUD_CL_OUT
74
73
C527
0.01nF
50V
MO
R536
100
AGND_S
HC-49/SM5H(18.432MHz)
C572
0.01nF
50V
MO
C574
1.5nF
+5V
TP
XTAL_OUT
X511
72
XTAL_IN
71
TESTEN
ANA_IN2
69
C568
56PF
70
ANA_IN1
ANA_IN
68
C567
56PF
C569
470pF
C571
56PF
T532
NC_1
1
SIF
67
AVSUP_2
66
65
TUNERGND
AVSUP_1
GND4
12
13
11
GND2
GND3
GND1
BLM41P600S
R841
4.7K
1/16W
KEY1
AGND_S
1
64
TUNERGND
BLM41P600S
A
12C_DA
AGND_S
TUNERGND
FT509
12S_CL
R535
100
62
TUNERGND
2
FT508
A1
AVSS_1
12S_WS
BLM41P600S
1
MONO_IN
BLM41P600S
A
FT507
1
6
FT506
B
12S_DA_IN1
12S_DA_OUT
B2
NC_13
7
VREFTOP
B2
C565
100nF
C566
10uF
R942
100
B
R804
100
5
R803
100
2
AF
R509
1K
B2
57
AVI_R
BP
R002
12K
1/16W
R004
560
AGND_AMP
FT505
C811
100pF
TUNERGND
E
CVBS
10
R814
43
1/16W
8
DVSUP_3
ASG2
4
B
L555
3.3UH
3
C812
100uF
DVSS_1
58
R813
120
1/16W
DVSS_2
59
C001
22uF
16V
C
R520 1K
C563
4.7uF
25V
6
E
AGND_S
8
9
1/16W
AVI_L
IF
R005
$V
43
SC
1/16W 43ohm,5,1/16W,DA,TP,1608
R-CHIP
0.3mm
TUNERGND
R510 1K
56
N_C
7
TUNERGND
R001
10K
1/16W
SC3_IN_L
SC3_IN_R
C559
55
SAS
TUNERGND
R003
100
1/16W
25V
R774
4.7K
1/16W
AGND_AMP
5
6
Q001
2SC2412K-Q
C558
4.7uF
C562
4.7uF 25V
1/16W
DVD_RIN
SDA
T705
C
7
+5V
B
4
1/16W
DVD_LIN
3
T704
1
4
2
2.2uH
1
5
LEDRED
A
2.2uH
L152
T703
3
B
1
L151
SCL
C807
2.2nF
50V
MO
1
DVSS_3
ASG4
60
Q811
KSC1623-Y
E
T702
2
Q711
2SC2412K-Q
1
2
C
B
46
NC
1
IR
R525
100
12S_DA_IN2
T701
E
TUNERGND
R527
4.7K
NC_2
SC4_IN_R
1
1
12
R109
100K
C557
4.7uF 25V
MSP3421G-B8
SC4_IN_L
61
1
1
1/16W
NC_3
50
49
R531 1K
DTV_RIN
CN888
SUPLVAL
TUNERGND
C556
4.7uF 25V
52
TUNERGND
1/16W
DTV_LIN
TUNER
TUNERGND
TUNERGND
NC_4
NC_12
CN701_1
slcon8p
C
B
R776
4.7K
1/16W
AGND_S
51
2
R802
22K
R529 1K
TUNERGND
L803
680uH
C808
4.70NF
50V
MO
PC_RIN
ZD801
BZX84C33
TUNERGND
3
C804
220pF
C555
4.7uF 25V
1/16W
53
C805
10nF
R522 1K
IC919
11
$V c885
SC 100uF
100uF,20,16V,GP,TP,6.6x6.6x5.
16V
C-AL,SMD
C891
1uF
50V
25V
54
C806
100nF
50V
MO
C554
4.7uF
1/16W
47
2.2uH
FT801
2.2uH
D101
MMBD4148SE
C803
47nF
TUNER_2PIN
AGND_S
L802
N
R521 1K
PC_LIN
1
R801
330
1/16W
L820
C802
10nF
+3.3V_BU
R773
330
1/16W
Q713
2SC2412K-Q
LEDGRN
AGNDC
C553
4.7uF
25V
C549
100nF
16VMO
RESETQ
AHVSS_2
45
C551
100nF
16V MO
INVERT_GND
L805
2.2uH
44
+8V
48
+5V
TUNERGND
R775
330
1/16W
13
INVERT_GND
C801
100uF
16V
AGND_S
24
DACA_L
26
VREF2
DACM_R
DACM_L
27
28
29
30
NC_7
DACM_SUB
NC_8
31
33
32
NC_9
SC2_OUT_R
SC2_OUT_L
34
35
36
SC1_OUT_R
VREF1
37
38
SC1_OUT_L
39
40
42
12
C972
100nF
+3.3V_A
C548
3.3nF
DACA_R
14
INVERT_GND
(TO DPTV)
CAPI_M
41
11
FT921
BLM41P600S
TUNER_CVBS
NC_10
CAPL_A
2
10
B
A
1
C981
470uF
16V
2
1
INVERT_GND
A
INVERT_GND
1
C971
470uF
B
1
FT920
BLM41P600S
9
AHVSUP
C910
100nF
T927
C911
100uF
T926
8
AGND_S
SCL2
SDA2
S_RESET
HP_IDENT_TA1101
10-4
LTM1575W/LTM1775W
CONFIDENTIAL
10 Schematic Diagrams
1
IC811 #2
LTM1575W/LTM1775W
2
IC805 #1
3
IC812 #2
10-5
24C02C
2K 5.0V I2C™ Serial EEPROM
FEATURES
PDIP/SOIC
A0
1
A1
2
A2
3
Vss
4
24C02C
8
Vcc
7
WP
6
SCL
5
SDA
TSSOP
A0
A1
1
A2
VSS
3
4
24C02C
• Single supply with operation from 4.5 to 5.5V
• Low power CMOS technology
- 1 mA active current typical
- 10 µA standby current typical at 5.5V
• Organized as a single block of 256 bytes (256 x 8)
• Hardware write protection for upper half of array
• 2-wire serial interface bus, I2C compatible
• 100 kHz and 400 kHz compatibility
• Page-write buffer for up to 16 bytes
• Self-timed write cycle (including auto-erase)
• Fast 1 mS write cycle time for byte or page mode
• Address lines allow up to eight devices on bus
• 1,000,000 erase/write cycles guaranteed
• ESD protection > 4,000V
• Data retention > 200 years
• 8-pin PDIP, SOIC or TSSOP packages
• Available for extended temperature ranges
- Commercial (C):
0°C to +70°C
- Industrial (I):
-40°C to +85°C
- Automotive (E):
-40°C to +125°C
PACKAGE TYPES
2
8
7
VCC
WP
6
5
SCL
SDA
DESCRIPTION
The Microchip Technology Inc. 24C02C is a 2K bit
Serial Electrically Erasable PROM with a voltage range
of 4.5V to 5.5V. The device is organized as a single
block of 256 x 8-bit memory with a 2-wire serial interface. Low current design permits operation with typical
standby and active currents of only 10 µA and 1 mA
respectively. The device has a page-write capability for
up to 16 bytes of data and has fast write cycle times of
only 1 mS for both byte and page writes. Functional
address lines allow the connection of up to eight
24C02C devices on the same bus for up to 16K bits of
contiguous EEPROM memory. The device is available
in the standard 8-pin PDIP, 8-pin SOIC (150 mil), and
TSSOP packages.
BLOCK DIAGRAM
A0 A1 A2
I/O
Control
Logic
WP
HV Generator
Memory
Control
Logic
XDEC
EEPROM
Array
SDA SCL
Vcc
Vss
Write Protect
Circuitry
YDEC
SENSE AMP
R/W CONTROL
I2C is a trademark of Philips Corporation.
 1999 Microchip Technology Inc.
DS21202C-page 1
24C02C
1.0
1.1
ELECTRICAL
CHARACTERISTICS
TABLE 1-1:
PIN FUNCTION TABLE
Name
Maximum Ratings*
VCC ........................................................................7.0V
All inputs and outputs w.r.t. VSS .....-0.6V to VCC +1.0V
Storage temperature ..........................-65°C to +150°C
Ambient temp. with power applied......-65°C to +125°C
Soldering temperature of leads (10 seconds) .. +300°C
ESD protection on all pins ..................................... ≥ 4 kV
Function
VSS
Ground
SDA
Serial Data
SCL
Serial Clock
VCC
+4.5V to 5.5V Power Supply
A0, A1, A2
Chip Selects
WP
Hardware Write Protect
*Notice: Stresses above those listed under “Maximum ratings” may
cause permanent damage to the device. This is a stress rating only and
functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is
not implied. Exposure to maximum rating conditions for extended periods may affect device reliability.
TABLE 1-2:
DC CHARACTERISTICS
All parameters apply across the specified operating ranges unless otherwise
noted.
Parameter
VCC = +4.5V to +5.5V
Commercial (C):
Industrial (I):
Automotive (E):
Symbol
Min.
SCL and SDA pins:
High level input voltage
VIH
Low level input voltage
VIL
VHYS
Hysteresis of Schmitt trigger inputs
Low level output voltage
Input leakage current
Output leakage current
Pin capacitance (all inputs/outputs)
Operating current
Standby current
Tamb = 0°C to +70°C
Tamb = -40°C to +85°C
Tamb = -40°C to +125°C
Max.
Units
Conditions
0.7 VCC
—
V
—
0.3 VCC
V
0.05 VCC
—
V
VOL
—
0.40
V
IOL = 3.0 mA, Vcc = 4.5V
ILI
-10
10
µA
VIN = 0.1V to 5.5V, WP = Vss
(Note)
ILO
-10
10
µA
VOUT = 0.1V to 5.5V
CIN, COUT
—
10
pF
VCC = 5.0V (Note)
Tamb = 25°C, f = 1 MHz
ICC Read
—
1
mA
VCC = 5.5V, SCL = 400 kHz
ICC Write
—
3
mA
VCC = 5.5V
ICCS
—
50
µA
VCC = 5.5V, SDA = SCL = VCC
WP = VSS
Note: This parameter is periodically sampled and not 100% tested.
DS21202C-page 2
 1999 Microchip Technology Inc.
24C02C
TABLE 1-3:
AC CHARACTERISTICS
All parameters apply across the specified operating ranges unless otherwise noted.
Parameter
Symbol
Vcc = 4.5V to 5.5V
Commercial (C):
Industrial (I):
Automotive (E):
Tamb = 0°C to +70°C
Tamb = -40°C to +85°C
Tamb = -40°C to +125°C
Tamb > +85°C -40°C ≤ Tamb ≤ +85°C
Min.
Max.
Min.
Max.
Units
Remarks
Clock frequency
Clock high time
Clock low time
SDA and SCL rise time
SDA and SCL fall time
START condition hold time
FCLK
THIGH
TLOW
TR
TF
THD:STA
—
4000
4700
—
—
4000
100
—
—
1000
300
—
—
600
1300
—
—
600
400
—
—
300
300
—
kHz
ns
ns
ns
ns
ns
START condition setup time
TSU:STA
4700
—
600
—
ns
Data input hold time
Data input setup time
STOP condition setup time
Output valid from clock
Bus free time
THD:DAT
TSU:DAT
TSU:STO
TAA
TBUF
0
250
4000
—
4700
—
—
—
3500
—
0
100
600
—
1300
—
—
—
900
—
ns
ns
ns
ns
ns
TOF
—
250
20 + 0.1 CB
250
ns
(Note 2)
Time the bus must be free
before a new transmission
can start
(Note 1), CB ≤ 100 pF
TSP
—
50
—
50
ns
(Note 3)
TWR
—
1M
1.5
—
—
1M
1
—
Output fall time from VIH
minimum to VIL maximum
Input filter spike suppression
(SDA and SCL pins)
Write cycle time
Endurance
(Note 1)
(Note 1)
After this period the first
clock pulse is generated
Only relevant for repeated
START condition
(Note 2)
ms Byte or Page mode
cycles 25°C, VCC = 5.0V, Block
Mode (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of START or STOP conditions.
3: The combined TSP and VHYS specifications are due to Schmitt trigger inputs which provide improved noise
spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific application, please consult the Total Endurance Model which can be obtained on our website.
FIGURE 1-1:
BUS TIMING DATA
THIGH
TF
SCL
TR
TSU:STA
TLOW
SDA
IN
THD:DAT
TSU:DAT
TSU:STO
THD:STA
TSP
TAA
TBUF
SDA
OUT
 1999 Microchip Technology Inc.
DS21202C-page 3
Multimedia ICs
Input selector switch for high
definition displays
BA7657F / BA7657S
The BA7657F and BA7657S are for high definition displays, and have internal switches for switching between broadband RGB signals and HD / VD signals, as well as an internal synchronization separator. These ICs simplify the designing of input units for deluxe displays.
Applications
•CRT
display, HDTV, video board for personal computer, etc.
•1)Features
Operates on a single 5V power supply.
3) Internal HD / VD switch.
4) Internal synchronization separator for synchronizing
signals superimposed onto G signals.
2) Internal broadband RGB switch (frequency characteristics: 230MHz, – 3dB).
•Absolute maximum ratings (Ta = 25°C)
Parameter
Symbol
Limits
Unit
VCC
8.0
V
Power supply voltage
Power
dissipation
BA7657F
550∗
Pd
1200∗
mW
Operating temperature
Topr
– 25 ~ + 75
°C
Storage temperature
Tstg
– 55 ~ + 125
°C
BA7657S
∗ Reduced by 5.5mW (BA7657F) or 12mW (BA7657S) for each increase in Ta of 1°C over 25°C.
•Recommended operating conditions (Ta = 25°C)
Parameter
Power supply voltage
Symbol
Min.
Typ.
Max.
Unit
VCC
4.5
5.0
5.5
V
1
Multimedia ICs
BA7657F / BA7657S
•Block diagram
24
HD 1 input
2
23
HD 2 input
Green 1 input
3
22
HD output
Ground
4
21
Red output
20
VCC
19
Green output
18
Composite video input (Sync on Green)
17
Composite sync output
16
CTL (H: IN1, L: IN2)
15
Blue output
14
VD output
13
VD 2 input
Red 1 input
1
HD Sync signal detector
1
2
1
2
Blue 1 input
5
Ground
6
DET
1
2
Red 2 input
7
Syncsepa
Ground
8
Green 2 input
9
Logic
1
Ground
10
Blue 2 input
11
2
1
2
VD 1 input
2
12
Multimedia ICs
BA7657F / BA7657S
•Pin descriptions
Pin No.
Pin name
1
Red 1 input
2
Function
Pin No.
Pin name
Function
Color signal R1 input
14
VD output
Vertical synchronization signal VD output
HD Sync signal Detecting phase of the synchronization
detector
signal detector circuit
15
Blue output
Color signal B output
16
Control
Control (high = IN1, low = IN2)
17
Composite sync
output
Synchronization signal output
18
Composite video Composite signal input
input
(Sync on Green)
3
Green 1 input
4
Ground
5
Blue 1 input
6
Ground
7
Red 2 input
8
Ground
9
Green 2 input
10
Ground
Color signal G1 input
Ground
Color signal B1 input
Ground
Color signal R2 input
Ground
Color signal G2 input
Ground
11
Blue 2 input
Color signal B2 input
12
VD 1 input
Vertical synchronization signal VD1 input
13
VD 2 input
Vertical synchronization signal VD2 input
19
Green output
20
VCC
Color signal G output
21
Red output
Color signal R output
22
HD output
Horizontal synch. signal HD output
23
HD 2 input
Horizontal synch. signal HD2 input
24
HD 1 input
Horizontal synch. signal HD1 input
Power supply
•Output selection setting table
CTL
R
G
B
HD
VD
H
IN1
IN1
IN1
IN1
IN1
L
IN2
IN2
IN2
IN2
IN2
•Input / output circuits
R. G. B input
HD. VD input
R. G. B output
VCC
VCC
VCC
50
35k
6.8k
1, 3, 5
7, 9, 11pin
12, 13
23, 24pin
100
15, 19, 21pin
21k
1k
400
1k
50k
15k
5mA
3
Multimedia ICs
BA7657F / BA7657S
Control
HD. VD output
VCC
2.0k
VCC
100
35k
1k
16pin
15k
14, 22pin
50k
15k
1.2k
660
HD sync signal detector
from HD out
to sync sepa
Composite Video input
VCC
VCC
VCC
25k
from DET out
25k
2pin
17pin
100
18pin
25k
4
Composite Sync output
25k
50µA
Revised January 2001
FST3125
4-Bit Bus Switch
General Description
Features
The Fairchild Switch FST3125 provides four high-speed
CMOS TTL-compatible bus switches. The low on resistance of the switch allows inputs to be connected to outputs without adding propagation delay or generating
additional ground bounce noise.
■ 4Ω switch connection between two ports.
The device is organized as four 1-bit switches with separate OE inputs. When OE is LOW, the switch is ON and
Port A is connected to Port B. When OE is HIGH, the
switch is OPEN and a high-impedance state exists
between the two ports.
■ Control inputs compatible with TTL level.
■ Minimal propagation delay through the switch.
■ Low lCC.
■ Zero bounce in flow-through mode.
Ordering Code:
Order Number
Package Number
FST3125M
M14A
Package Description
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
FST3125QSC
MQA16
16-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150 Wide
FST3125MTC
MTC14
14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Logic Diagram
Connection Diagrams
Pin Assignment for SOIC and TSSOP
Pin Assignment for QSOP
Pin Descriptions
Pin Name
Description
OE1, OE2, OE3, OE4
Bus Switch Enables
1A, 2A, 3A, 4A
Bus A
Inputs
1B, 2B, 3B, 4B
Bus B
OE
A,B
NC
Not Connected
L
A=B
H
Z
© 2001 Fairchild Semiconductor Corporation
DS500043
Truth Table
Inputs/Outputs
www.fairchildsemi.com
FST3125 4-Bit Bus Switch
August 1997
FST3125
Absolute Maximum Ratings(Note 1)
Recommended Operating
Conditions (Note 3)
Supply Voltage (VCC )
−0.5V to +7.0V
DC Switch Voltage (VS)
−0.5V to +7.0V
Power Supply Operating (VCC)
DC Input Voltage (VIN)(Note 2)
−0.5V to +7.0V
Input Voltage (VIN)
0V to 5.5V
0V to 5.5V
DC Input Diode Current (lIK) VIN<0V
−50mA
Output Voltage (VOUT)
DC Output (IOUT ) Sink Current
128mA
Input Rise and Fall Time (tr, tf)
+/− 100mA
DC VCC/GND Current (ICC/IGND)
Storage Temperature Range (TSTG)
4.0V to 5.5V
Switch Control Input
−65°C to +150 °C
0ns/V to 5ns/V
Switch I/O
0ns/V to DC
Free Air Operating Temperature (TA)
−40 °C to +85 °C
Note 1: The “Absolute Maximum Ratings” are those values beyond which
the safety of the device cannot be guaranteed. The device should not be
operated at these limits. The parametric values defined in the Electrical
Characteristics tables are not guaranteed at the absolute maximum rating.
The “Recommended Operating Conditions” table will define the conditions
for actual device operation.
Note 2: The input and output negative voltage ratings may be exceeded if
the input and output diode current ratings are observed.
Note 3: Unused control inputs must be held high or low. They may not float.
DC Electrical Characteristics
Symbol
VCC
(V)
Parameter
TA = −40 °C to +85 °C
Min
Typ
(Note 4)
Units
Conditions
Max
−1.2
IIN = −18mA
VIK
Clamp Diode Voltage
VIH
High Level Input Voltage
4.0–5.5
VIL
Low Level Input Voltage
4.0–5.5
0.8
V
II
Input Leakage Current
5.5
±1.0
µA
IOZ
OFF-STATE Leakage Current
5.5
±1.0
µA
0 ≤A, B ≤VCC
RON
Switch On Resistance
4.5
7
Ω
VIN = 0V, IIN = 64mA
4.5
(Note 5)
2.0
V
V
4
0≤ VIN ≤5.5V
4.5
4
7
Ω
VIN = 0V, IIN = 30mA
4.5
8
15
Ω
VIN = 2.4V, IIN = 15mA
4.0
11
20
Ω
VIN = 2.4V, IIN = 15mA
ICC
Quiescent Supply Current
5.5
3
µA
VIN = VCC or GND,
∆ICC
Increase in ICC per Input
5.5
2.5
mA
One input at 3.4V.
IOUT = 0
Other inputs at VCC or GND
Note 4: Typical values are at VCC = 5.0V and T A = +25°C
Note 5: Measured by the voltage drop between A and B pins at the indicated current through the switch. On resistance is determined by the lower of the
voltages on the two (A or B) pins.
www.fairchildsemi.com
2
TA = −40 °C to +85 °C,
CL = 50pF, RU = RD = 500Ω
Symbol
Parameter
VCC = 4.5 – 5.5V
Min
tPHL,tPLH
Prop Delay Bus to Bus (Note 6)
tPZH, tPZL
Output Enable Time
VCC = 4.0V
Max
Min
Units
Conditions
Max
0.25
0.25
ns
VI = OPEN
5.0
5.5
ns
VI = 7V for tPZL
1.0
Figures 1, 2
VI = OPEN for tPZH
tPHZ, tPLZ
Output Disable Time
1.5
Figure No.
5.3
5.6
ns
VI = 7V for tPLZ
VI = OPEN for tPHZ
Figures 1, 2
Figures 1, 2
Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On
resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage source (zero output impedance).
Capacitance
Symbol
(Note 7)
Parameter
Typ
Max
Units
Conditions
CIN
Control Pin Input Capacitance
3
pF
VCC = 5.0V
CI/O
Input/Output Capacitance
5
pF
VCC, OE = 5.0V
Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested.
AC Loading and Waveforms
Note: Input driven by 50 Ω source terminated in 50 Ω
Note: C L includes load and stray capacitance
Note: Input PRR = 1.0 MHz, tW = 500ns
FIGURE 1. AC Test Circuit
FIGURE 2. AC Waveforms
3
www.fairchildsemi.com
FST3125
AC Electrical Characteristics
DS90C385/DS90C365
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel
Display (FPD) Link-85 MHz, +3.3V Programmable LVDS
Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz
General Description
The DS90C385 transmitter converts 28 bits of LVCMOS/
LVTTL data into four LVDS (Low Voltage Differential Signaling) data streams. A phase-locked transmit clock is transmitted in parallel with the data streams over a fifth LVDS link.
Every cycle of the transmit clock 28 bits of input data are
sampled and transmitted. At a transmit clock frequency of 85
MHz, 24 bits of RGB data and 3 bits of LCD timing and
control data (FPLINE, FPFRAME, DRDY) are transmitted at
a rate of 595 Mbps per LVDS data channel. Using a 85 MHz
clock, the data throughput is 297.5 Mbytes/sec. Also available is the DS90C365 that converts 21 bits of LVCMOS/
LVTTL data into three LVDS (Low Voltage Differential Signaling) data streams. Both transmitters can be programmed
for Rising edge strobe or Falling edge strobe through a
dedicated pin. A Rising edge or Falling edge strobe transmitter will interoperate with a Falling edge strobe Receiver
(DS90CF386/DS90CF366) without any translation logic.
The DS90C385 is also offered in a 64 ball, 0.8mm fine pitch
ball grid array (FBGA) package which provides a 44 %
reduction in PCB footprint compared to the TSSOP package.
This chipset is an ideal means to solve EMI and cable size
problems associated with wide, high-speed TTL interfaces.
Features
n 20 to 85 MHz shift clock support
n Best–in–Class Set & Hold Times on TxINPUTs
n Tx power consumption < 130 mW (typ) @85MHz
Grayscale
n Tx Power-down mode < 200µW (max)
n Supports VGA, SVGA, XGA and Single/Dual Pixel
SXGA.
n Narrow bus reduces cable size and cost
n Up to 2.38 Gbps throughput
n Up to 297.5 Megabytes/sec bandwidth
n 345 mV (typ) swing LVDS devices for low EMI
n PLL requires no external components
n Compatible with TIA/EIA-644 LVDS standard
n Low profile 56-lead or 48-lead TSSOP package
n DS90C385 also available in a 64 ball, 0.8mm fine pitch
ball grid array (FBGA) package
Block Diagrams
DS90C385
DS90C365
DS100868-1
Order Number DS90C385MTD or DS90C385SLC
See NS Package Number MTD56 or SLC64A
DS100868-29
Order Number DS90C365MTD
See NS Package Number MTD48
TRI-STATE ® is a registered trademark of National Semiconductor Corporation.
© 2000 National Semiconductor Corporation
DS100868
www.national.com
DS90C385/DS90C365 +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD)
Link-85 MHz, +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz
November 2000
DS90C385/DS90C365
Absolute Maximum Ratings (Note 1)
DS90C385SLC
Package Derating:
DS90C385MTD
Package Derating:
DS90C365MTD
DS90C385SLC
ESD Rating
(HBM, 1.5kΩ, 100pF)
(EIAJ, 0Ω, 200 pF)
Latch Up Tolerance @ 25˚C
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VCC)
−0.3V to +4V
CMOS/TTL Input Voltage
−0.5V to (VCC + 0.3V)
LVDS Driver Output Voltage
−0.3V to (VCC + 0.3V)
LVDS Output Short Circuit
Duration
Continuous
Junction Temperature
+150˚C
Storage Temperature
−65˚C to +150˚C
Lead Temperature
(Soldering, 4 sec)
+260˚C
Solder reflow Temperature
(20 sec for FBGA)
+220˚C
Maximum Package Power Dissipation Capacity @ 25˚C
MTD56 (TSSOP) Package:
DS90C385MTD
1.63 W
MTD48 (TSSOP) Package:
DS90C365MTD
1.98 W
2.0 W
12.5 mW/˚C above +25˚C
16 mW/˚C above +25˚C
10.2 mW/˚C above +25˚C
> 7 kV
> 500V
> ± 300mA
Recommended Operating
Conditions
Supply Voltage (VCC)
Operating Free Air
Temperature (TA)
Supply Noise Voltage (VCC)
TxCLKIN frequency
Min
3.0
Nom
3.3
Max
3.6
Units
V
−10
+25
+70
100
85
˚C
mVPP
MHz
20
SLC64 (FBGA) Package:
Electrical Characteristics
Over recommended operating supply and temperature ranges unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
LVCMOS/LVTTL DC SPECIFICATIONS
VIH
High Level Input Voltage
2.0
VCC
V
VIL
Low Level Input Voltage
GND
0.8
V
VCL
Input Clamp Voltage
ICL = −18 mA
−0.79
−1.5
V
IIN
Input Current
VIN = 0.4V, 2.5V or VCC
+1.8
+10
VIN = GND
−10
0
RL = 100Ω
250
345
µA
µA
LVDS DC SPECIFICATIONS
VOD
Differential Output Voltage
∆VOD
Change in VOD between
complimentary output states
VOS
Offset Voltage (Note 4)
∆VOS
Change in VOS between
complimentary output states
IOS
Output Short Circuit Current
IOZ
TRI-STATE ®
Output
Current
1.125
VOUT = 0V, RL = 100Ω
Power Down = 0V,
VOUT = 0V or VCC
1.25
450
mV
35
mV
1.375
V
35
mV
−3.5
−5
mA
±1
± 10
µA
TRANSMITTER SUPPLY CURRENT
ICCTW
ICCTG
ICCTW
Transmitter Supply Current
Worst Case
DS90C385
Transmitter Supply Current
16 Grayscale
DS90C385
Transmitter Supply Current
Worst Case
DS90C365
www.national.com
RL = 100Ω,
CL = 5 pF,
Worst Case Pattern
(Figures 1, 4)
f = 32.5 MHz
31
45
mA
f = 40 MHz
32
50
mA
f = 65 MHz
37
55
mA
f = 85 MHz
42
60
mA
RL = 100Ω,
CL = 5 pF,
16 Grayscale Pattern
(Figures 2, 4)
f = 32.5 MHz
29
38
mA
f = 40 MHz
30
40
mA
f = 65 MHz
35
45
mA
f = 85 MHz
39
50
mA
RL = 100Ω,
CL = 5 pF,
Worst Case Pattern
(Figures 1, 4)
f = 32.5 MHz
28
42
mA
f = 40 MHz
29
47
mA
f = 65 MHz
34
52
mA
f = 85 MHz
39
57
mA
2
ESMT
Synchronous Graphic RAM
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P. Publication Date : Oct. 2001
Revision : 1.5
ESMT
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P. Publication Date : Oct. 2001
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P. Publication Date : Oct. 2001
Revision : 1.5
M74HC32
QUAD 2-INPUT OR GATE
■
■
■
■
■
■
■
HIGH SPEED:
tPD = 8ns (TYP.) at VCC = 6V
LOW POWER DISSIPATION:
ICC = 1µA(MAX.) at TA=25°C
HIGH NOISE IMMUNITY:
VNIH = V NIL = 28 % VCC (MIN.)
SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 32
DESCRIPTION
The M74HC32 is an high speed CMOS QUAD
2-INPUT OR GATE fabricated with silicon gate
C2MOS technology.
The internal circuit is composed of 2 stages
including buffer output, which enables high noise
immunity and stable output.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HC32B1R
M74HC32M1R
T&R
M74HC32RM13TR
M74HC32TTR
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/8
M74HC32
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
1, 4, 9, 12
2, 5, 10, 13
3, 6, 8, 11
7
1A to 4A
1B to 4B
1Y to 4Y
GND
VCC
14
NAME AND FUNCTION
Data Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
B
Y
L
L
H
H
L
H
L
H
L
H
H
H
ABSOLUTE MAXIMUM RATINGS
Symbol
V CC
Parameter
Supply Voltage
Value
Unit
-0.5 to +7
V
-0.5 to VCC + 0.5
-0.5 to VCC + 0.5
V
DC Input Diode Current
± 20
mA
IOK
DC Output Diode Current
± 20
mA
IO
DC Output Current
± 25
mA
VI
DC Input Voltage
VO
DC Output Voltage
IIK
ICC or IGND DC VCC or Ground Current
PD
Power Dissipation
Tstg
Storage Temperature
TL
Lead Temperature (10 sec)
V
± 50
mA
500(*)
mW
-65 to +150
°C
300
°C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V CC
Parameter
Supply Voltage
VI
Input Voltage
VO
Output Voltage
Top
Operating Temperature
Input Rise and Fall Time
tr, tf
2/8
Value
Unit
2 to 6
V
0 to VCC
V
0 to VCC
V
-55 to 125
°C
VCC = 2.0V
0 to 1000
ns
VCC = 4.5V
0 to 500
ns
VCC = 6.0V
0 to 400
ns
M74HC32
DC SPECIFICATIONS
Test Condition
Symbol
VIH
V IL
VOH
VOL
II
ICC
Parameter
High Level Input
Voltage
Low Level Input
Voltage
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage
Current
Quiescent Supply
Current
Value
TA = 25°C
VCC
(V)
Min.
2.0
4.5
6.0
2.0
Typ.
Max.
1.5
3.15
4.2
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
1.5
3.15
4.2
4.5
6.0
Max.
1.5
3.15
4.2
V
0.5
0.5
0.5
1.35
1.8
1.35
1.8
1.35
1.8
2.0
IO=-20 µA
1.9
2.0
1.9
1.9
4.5
IO=-20 µA
4.4
4.5
4.4
4.4
Unit
V
6.0
IO=-20 µA
5.9
6.0
5.9
5.9
4.5
IO=-4.0 mA
4.18
4.31
4.13
4.10
6.0
IO=-5.2 mA
5.68
2.0
IO=20 µA
0.0
0.1
0.1
0.1
4.5
IO=20 µA
0.0
0.1
0.1
0.1
6.0
IO=20 µA
0.0
0.1
0.1
0.1
4.5
IO=4.0 mA
0.17
0.26
0.33
0.40
6.0
IO=5.2 mA
0.18
0.26
0.33
0.40
6.0
VI = VCC or GND
± 0.1
±1
±1
µA
6.0
VI = VCC or GND
1
10
20
µA
5.8
5.63
V
5.60
V
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns)
Test Condition
Symbol
Parameter
tTLH tTHL Output Transition
Time
tPLH tPHL Propagation Delay
Time
Value
TA = 25°C
VCC
(V)
Min.
2.0
4.5
6.0
2.0
4.5
6.0
Typ.
Max.
30
8
7
24
9
8
75
15
13
75
15
13
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
95
19
16
95
19
16
Unit
Max.
110
22
19
110
22
19
ns
ns
CAPACITIVE CHARACTERISTICS
Test Condition
Symbol
Parameter
VCC
(V)
Value
TA = 25°C
Min.
Typ.
Max.
10
CIN
Input Capacitance
5.0
5
C PD
Power Dissipation
Capacitance (note
1)
5.0
21
-40 to 85°C
-55 to 125°C
Min.
Min.
Max.
10
Unit
Max.
10
pF
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/4 (per gate)
3/8
SDA 55xx
Overview
Preliminary & Confidential
CMOS
1.5
Features
General
• Feature selection via special function register
• Simultaneous reception of TTX, VPS, PDC, and
WSS (line 23)
• Supply Voltage 2.5 and 3.3 V
• ROM version package P-SDIP 52, P-MQFP64
• Romless version package P-MQFP100,P-LCC84
P-SDIP-52
External Crystal and Programmable clock speed
• Single external 6MHz crystal, all necessary clocks
are generated internally
• CPU clock speed selectable via special function
registers.
• Normal Mode 33.33 Mhz CPU clock, Power Save
mode 8.33 Mhz
P-MQFP-64
Microcontroller Features
•
•
•
•
•
•
•
•
•
8bit 8051 instruction set compatible CPU.
33.33-MHz internal clock (max.)
0.360 µs (min.) instruction cycle
Two 16-bit timers
Watchdog timer
Capture compare timer for infrared remote control decoding
Pulse width modulation unit (2 channels 14 bit, 6 channels 8 bit)
ADC (4 channels, 8 bit)
UART
Type
Package
TVTEXT PRO (ROM)
P-SDIP-52, P-MQFP-64
TVTEXT PRO (ROMless)
P-MQFP-100, P-LCC-84
Semiconductor Group
12
User’s Manual April 99
SDA 55xx
Overview
Preliminary & Confidential
Memory
•
•
•
•
•
•
•
Non-multiplexed 8-bit data and 16 … 20-bit address bus (ROMless Version)
Memory banking up to 1Mbyte (Romless version)
Up to 128 Kilobyte on Chip Program ROM
Eight 16-bit data pointer registers (DPTR)
256-bytes on-chip Processor Internal RAM (IRAM)
128bytes extended stack memory.
Display RAM and TXT/VPS/PDC/WSS-Acquisition-Buffer directly accessible via
MOVX
• UP to 16KByte on Chip Extended RAM(XRAM) consisting of;
- 1 Kilobyte on-chip ACQ-buffer-RAM (access via MOVX)
- 1 Kilobyte on-chip extended-RAM (XRAM, access via MOVX) for user software
- 3 Kilobyte Display Memory
Display Features
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
ROM Character Set Supports all East and West European Languages in single device
Mosaic Graphic Character Set
Parallel Display Attributes
Single/Double Width/Height of Characters
Variable Flash Rate
Programmable Screen Size (25 Rows x 33...64 Columns)
Flexible Character Matrixes (HxV) 12 x 9...16
Up to 256 Dynamical Redefinable Characters in standard mode; 1024 Dynamical
Redefinable Characters in Enhanced Mode
CLUT with up to 4096 color combinations
Up to 16 Colors per DRCS Character
One out of Eight Colors for Foreground and Background Colors for 1-bit DRCS and
ROM Characters
Shadowing
Contrast Reduction
Pixel by Pixel Shiftable Cursor With up to 4 Different Colors
Support of Progressive Scan and 100 Hz.
3 X 4Bits RGB-DACs On-Chip
Free Programmable Pixel Clock from 10 MHZ to 32MHz
Pixel Clock Independent from CPU Clock
Multinorm H/V-Display Synchronization in Master or Slave Mode
Semiconductor Group
13
User’s Manual April 99
SDA 55xx
Overview
Preliminary & Confidential
Acquisition Features
•
•
•
•
•
•
•
•
•
•
•
Multistandard Digital Data Slicer
Parallel Multi-norm Slicing (TTX, VPS, WSS, CC, G+)
Four Different Framing Codes Available
Data Caption only Limited by available Memory
Programmable VBI-buffer
Full Channel Data Slicing Supported
Fully Digital Signal Processing
Noise Measurement and Controlled Noise Compensation
Attenuation Measurement and Compensation
Group Delay Measurement and Compensation
Exact Decoding of Echo Disturbed Signals
Ports
•
•
•
•
•
One 8-bit I/O-port with open drain output and optional I2C Bus emulation suport(Port0)
Two 8-bit multifunction I/O-ports (Port1, Port3)
One 4-bit port working as digital or analog inputs for the ADC (Port2)
One 2-bit I/O port with secondary functions (P4.2, 4.3, 4.7)
One 4-bit I/O-port with secondary function (P4.0, 4.1, 4.4) (Not available in P-SDIP 52)
Semiconductor Group
14
User’s Manual April 99
SDA 55xx
Overview
Preliminary & Confidential
1.6
Logic Symbol
vcc(2.5,3.3)
vss
XTAL1
Address
20 bit
XTAL2
STOP
Data
8 bit
ENE
OCF
CVBS
Port 0
8 bit
ALE
PSEN
R
G
Port 1
8 bit
TVTEXT PRO
B
Port 2
4 bit
COR_BLA
HSYNC/SSC
Port 3
8 bit
VSYNC
RD
WR
RST
Semiconductor Group
Port 4
6 bit
15
User’s Manual April 99
Semiconductor Group
16
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SDA 55xx
Overview
Block diagram
User’s Manual April 99
A[0 to 15]
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TFT-LCD Monitor
1. What is TFT-LCD TV (Monitor)?
It is a TV (Monitor) with display element of TFT-LCD. It is a new concept TV (Monitor)
compared to the existing CRT TV (Monitor) in the fact of reducing space and
consumption power.
2. Construction of the TFT-LCD TV (Monitor)
TFT-LCD Panel Module
Inverter
SDRAM
FRC
L
V
D
S
Scaler
To Panel
To Panel
Inverter
To Func. Brd.
ADC
Micom
DC-DC
From PC
3.
Functions by construction
ADAPTER
From
R/F
■ TFT-LCD Panel Module
- The color TFT-LCD is divided in a-Si (amorphous silicon) TFT and Si (Polysilicon) TFT by the
kind of TFT elements.
The flat TFT-LCD with a-Si TFT is the most widely used.
- The TFT-LCD can be determined by 3 units.
-The first, a panel with inserting liquid crystal between substrates.
-The seconds, Driver LSI for driving the panel and Drive circuit unit with PCB
(Printed Circuit Board) to where various circuit elements are attached.
- The third, Chassis including the backlight.
☞ The assembly consists of the above is called TFT-LCD Module.
- TFT-LCD is one of a subsystem to charge the display function in the
system such as Notebook PC, TV, and Monitor.
Common transparent
electrode
Polarizing film
Glass substrate
TN liquid crystal
TFT substrate
Transparent
display electrode
Polarizing film
1) Panel의 기능은 Backlignt Unit에서 입사된 백색 평면관을 구동 회로 Unit으로부터 입력된 개개
화소의 신호전압에 따라 화소에 투과되는 빛을 제어하여 Color영상을 표현하는 역할을 한다.
2)BackLight Unit
It makes a plane light, which has even luminosity, from a fluorescent lamp used as
the light resource. The thickness of module and consumption of electricity depends
on making thinner thickness of the unit and improving coefficient of utilization of light.
The light from backlight gradually decreases in brightness immediately after
penetrating the display module unit. Only 5% of light coming into the backlight
penetrates the front polarizer.
3)Driving circuit and Chassis unit
The TFT LCD panel consists of TFT array and color filter substrates.
including driver IC must be installed in the peripheral part.
The drive circuit
The drive circuit takes multi layer
PCB type and for the circuit part, SMT (surface mounting technology) is used for thinness
and high density.
Driver IC is made in the form of TCP (Tape carrier package) and
connected between PCB and panel.
The drive circuits of TFT LCD panel and backlight unit made as above are completed with
chassis unit and has a type of assembled parts.
It is called TFT module.
■ Inverter
It is a supplying device of current to supply power to backlight, and it controls luminosity of
the backlight by supplying amount of power to the backlight.
■ ADC (Analog to Digital Converter)
It is a circuit to covert the inputted analog signal from PC to the digital signal for using it
at the end of ADC.
It is important to determine a picture quality.
parts: AMP unit, AD unit, and PLL unit.
adjust the gain.
ADC consists of three
AMP unit amplifies the inputted analog signal to
AMP is necessary for expressing the precise gray because the difference
of gain among PCs is existed.
When AD unit converts analog signal to digital signal, the
signal with adjusted gain through AMP is divided in 256 by voltage from bottom reference to
top reference, and the digital signal (0~255) is given to each section to convert analog
signal to digital signal.
PLL makes a clock, which determines the time to convert analog to
digital.
There is an importance to convert analog signal to digital signal: convert exact number of data in
exact time. The transmitted data from PC is a data converted digital signal to analog signal.
Therefore, a display without picture noise is possible by getting the exact digital signal from PC.
정수
6
5
4
3
2
1
0
시간
시간
정수
6
5
0
1
1 3
3
4
5
5
3
t1
t2
t3 t4
t5
t6
t7
t8 t9 t10
4
3
1
시간
2
1
0
t1
t2
t3 t4
t5
t6
t7
t8 t9 t10
시간
■ Scaler
It converts the resolution of the inputted signal of TV (Monitor) to the resolution, which you
wish.
Please refer to the attachment for technical part of the scaling.
■ LVDS (Low Voltage Differential Signal)
It is for interface of panel.
It is a data type to transmit the Vp-p by 345mV.
It is
transmitted at least 28 times faster than the speed of output clock, and it reduces the
number of connectors at least 1/3 in comparison with the TTL signal. The EMI character is
improved by transmitting the Vp-p to low.