Understanding and Performing USB 2.0 Physical Layer

Understanding and Performing USB 2.0
Physical Layer Testing and Debugging
Application Note
Engineers involved in the design, characterization and
validation of USB 2.0 devices face daily pressures to speed
new products to the marketplace. Tektronix comprehensive
tool set enables designers to quickly and accurately perform
electrical compliance tests recommended by the USBImplementers Forum, Inc. (USBIF) and quickly debug
their designs.
Universal Serial Bus (USB 2.0) is a connectivity specification
aimed at peripherals that connect outside the computer in
order to eliminate the hassle of opening the computer case
to install cards needed for certain devices. USB-compliant
devices translate into ease-of-use, expandability and speed for
the user.
USB 2.0 device designers must properly characterize their
designs and verify compliance to industry standards before
device manufacturers can affix the “certified” USB-IF logo
to their packaging. The appropriate tool set is critical for
the performance of USB-IF compliance tests, such as eye
diagram and parametric testing for low-speed, full-speed and
high-speed devices and hubs.
Designs with USB 2.0 interfaces usually contain a variety
of signals and buses. Tools that provide complete system
visibility are needed to quickly verify and debug these designs.
These tools need to quickly discover USB 2.0 problems and
then they need to trigger on the problems to capture them.
Next, the tools should easily search, mark and navigate long
record lengths to find all problem occurrences. Finally, the
tools should have automated USB 2.0 decode that provides
insight to the design operation to quickly find the root cause of
the problem.
The first part of this application note focuses on understanding
and performing USB 2.0 physical layer measurements and
electrical compliance testing (electrical and high-speed tests)
and will include a discussion of the instruments required for
each test. The last part of this application note focuses on
debugging designs with USB 2.0 interfaces using a mixed
signal oscilloscope with USB 2.0 triggering, searching and
decoding capabilities.
Application Note
USB 2.0 Compliance Testing Basics
USB 2.0 Electrical Tests
USB 2.0 is a serial bus that utilizes a 4-wire system — VBUS,
D-, D+ and Ground. D- and D+ are the prime carriers of the
information. VBUS supplies power to devices that derive their
primary power from the host or hub.
USB 2.0 electrical tests include signal quality, in-rush current
check, and drop and droop tests.
USB 2.0 describes the following speed selections and rise
Maintenance of signal quality is one of the keys to ensure that
a USB 2.0 device is compliant and will be awarded the USB
2.0 certified logo.
Data Rates
Rise Times
Low Speed (LS)
1.5 Mb/s
75 ns – 300 ns
Full Speed (FS)
12 Mb/s
4 ns – 20 ns
High-Speed (HS)
480 Mb/s
500 ps
USB 2.0 devices can be either self-powered (having their own
power supply) or bus-powered (drawing power through the
host). It is imperative for the self-powered devices to draw
as little power as possible. Tests are outlined in the USB 2.0
specifications for this aspect.
Signal Quality Test
The signal quality test includes:
Eye Diagram testing
Signal rate
End of Packet (EOP) width
Cross-over voltage range
Paired JK Jitter
Paired KJ Jitter
Consecutive jitter
Rise time
Fall time
The eye diagram test is unique and the first of its kind for serial
data applications.
The test set-ups for signal quality testing vary for upstream
and downstream testing. In the case of upstream testing,
signals transmitted from the device to the host are
captured, whereas in the case of downstream testing,
signals transmitted from the host are captured for testing.
Downstream testing is usually performed on ports of a hub.
Understanding and Performing USB 2.0 Physical Layer Testing and Debugging
Figure 1. TDSUSB2 compliance test package running on a DPO7254.
Figure 2. TDSUSB2 compliance test package running on a DPO7254.
While performing compliance testing, you need to set up the
worst-case USB 2.0 topology scenario to ensure a sufficient
test margin. Devices are tested in the 6th tier to ensure the
worst-case scenario. Further, each hub level is referred to as
a tier. The hub-under-test (HUT) is plugged into the 5th tier so
that it operates on the 6th tier.
Test Equipment
Signal quality testing requires a real-time oscilloscope with a
bandwidth of 2 GHz or higher, such as the MSO/DPO5204,
DPO7254 or DPO7354, for high speed USB signals, and an
oscilloscope with a bandwidth of 350 MHz or higher, such as
any of the MSO/DPO5000 or DPO7000 Series, for low and full
speed USB signals. Single-ended probes like the TAP1500,
TAP2500, TAP3500, and P6245*1 are needed for low and full
speed USB testing. Differential probes such as the TDP1500,
TDP3500, and P6248*1 are required for high speed USB
testing. In addition, this testing requires test software and a
USB test fixture.
Figure 1 shows the operation of the TDSUSB2 (option USB)
compliance test package and the TDSUSBF test fixture on a
DPO7254. This test package fully automates the signal quality
test process, allowing designers to perform quick and easy
tests on their designs.
A user must select the measurements to be performed for a
particular signal speed (low, full or high speed). The application
must then be configured based on tier (tier to which the DUT
is connected), test point (test point of the DUT — near or far
Figure 3. Measurement results are automatically displayed using the TDSUSB2
compliance test package.
end), and direction of traffic (upstream or downstream testing),
as shown in Figure 2. After completing these two steps, the
user then runs the application.
The test package eliminates the task of manual, timeconsuming oscilloscope set-ups, cursor placements and
comparison of test results with USB 2.0 specifications. The
results are automatically displayed as a results summary and
details, as illustrated in Figure 3.
Requires a TPA-BNC adapter when used on an MSO/DPO5000 or DPO7000 Series model.
Application Note
Test Equipment
The in-rush current check requires a real-time oscilloscope,
such as a DPO7254, and current probes, like the TCP0030.
This test also requires test software and a test fixture, such as
the option USB compliance test package. The TDSUSB2 test
package can be used to automatically set up the oscilloscope
for the in-rush current check. This test package provides direct
readout of Charge (uC), Capacitance (uF) and an automatic
indication of pass or fail.
Drop Test
Figure 4. Illustration of a sharp intake of current using a DPO7254C.
In-Rush Current Check
Because USB 2.0 is a hot-pluggable technology, extreme
care is required to ensure that the current drawn by a device
does not exceed a specified limit. If the current drawn exceeds
a specified value, the operation of other USB 2.0 devices
connected to the bus may be hampered. The in-rush current
check is performed for both self-powered and bus-powered
devices to verify that the device-under-test (DUT) does not
draw too much current when plugged into the port of a hub.
Typically, one expects a sharp intake of current when a device
is plugged in. One may observe small humps or perturbations
in the current trace depending on when the device is reset.
Theoretically, an in-rush current check involves the calculation
of the integral of current over a certain period of time (bounded
by the location of two vertical cursors on the oscilloscope).
The USB 2.0 specification dictates that the total charge drawn
by the device should be less than or equal to 51.5 uC for a
VBUS value of 5.15 V. (The waiver limit for this test is less than
150 uC).
The USB 2.0 specification requires powered USB ports to
provide a VBUS between 4.75 and 5.25 V while bus-powered
hubs maintain a VBUS at 4.4 V or greater. Drop testing
evaluates VBUS under both no-load and full-load (100 mA or
500 mA, as appropriate) conditions.
Vdrop = Vupstream — Vdownstream
Vupstream = VBUS at the hub's upstream connection
Vdownstream = VBUS at one of the hub's downstream ports
Bus-powered hubs must have a Vdrop <=100 mV between
their downstream and upstream ports when 100 mA loads are
present on their downstream ports. This requirement ensures
that the hubs will supply 4.4 V to a downstream device. Buspowered devices with Captive cables must have Vdrop <=
350 mV between the upstream connector and downstream
port, including the drop through the cable.
Understanding and Performing USB 2.0 Physical Layer Testing and Debugging
Test Equipment
USB 2.0 High-speed Tests
Drop tests require a multi-meter. The option USB compliance
test package aids in reporting the test results. The multi-meter
output for a drop test can be entered into the test package,
thus providing a consolidated report for the user.
Fundamentally, USB 2.0 device compliance tests closely follow
the compliance test protocol for USB 1.1 devices. Primary
additions concern USB 2.0 high-speed mode. High-speed
mode adds a new level of complexity to USB device design.
USB 2.0 high-speed tests include receiver sensitivity, CHIRP,
monotonocity and impedance measurement tests.
Droop Test
Vdroop equals the difference in VBUS voltage when a no-load
condition is applied and when a 100 mA load is applied to the
port-under-test (PUT) (all other ports are fully loaded). The USB
2.0 specification allows a maximum droop of 330 mV. The
droop test evaluates worst-case droop by alternately applying
a 100 mA load and no-load condition to the port under test
while all other ports are supplying the maximum load possible.
All VBUS measurements are relative to local ground.
Test Equipment
Droop tests require a real-time oscilloscope, such as a
DPO7254, and single-ended probes, like the TAP1500,
P6243*2 or P6245*2. In addition, this testing requires
test software and a test fixture, such as the option USB
compliance test package.
Receiver Sensitivity Test
To increase robust operation in a noisy environment, a USB
2.0 high-speed device must respond to IN*2b tokens with
NAKs*2b when the signal level that equals or exceeds the
specified level. The test requires placement of the DUT in Test_
SE0_NAK mode. The host is then replaced by the signal from
a signal generator to continue to transmit IN tokens. The signal
amplitude is presented to the DUT at a level at or above
150 mV. At these levels, the DUT must be in the unsquelched
mode, responding to IN packets with NAKs. The amplitude is
then reduced to <100 mV and at this level, the DUT must be
squelched and does not respond to IN tokens with NAKs.
The test package automatically sets up the oscilloscope
for the desired test configuration. Running the application
acquires the signal, provides the Vdroop measurement, and
subsequently provides a pass or fail indication and detailed
measurement results of the test.
Requires a TPA-BNC adapter when used on an MSO/DPO5000 or DPO7000 Series model.
Please refer to the USB 2.0 specifications for more information about IN tokens and NAKs.
Application Note
Test Mode
Data Generator
USB 2.0 Test Fixture
HS Device
Figure 5. Set-up for a receiver sensitivity test using a DPO7254 and a
Tektronix signal source.
Figure 6. Test parameters for a CHIRP test.
Test Equipment
The receiver sensitivity test requires a real-time oscilloscope,
such as a MSO/DPO5204 or DPO7254 or higher bandwidth
model, and a highspeed data source that can transmit IN
tokens of varying amplitude, such as a Tektronix AWG5000
or AWG7000C Series Arbitrary Waveform Generator. This test
also requires differential probes, like a TDP1500, TDP3500, or
P6248*3, and test software and a test fixture.
The CHIRP test examines the basic timing and voltages of
both upstream and downstream ports during the speed
detection protocol. For a hub, the CHIRP test must be
performed on both upstream and downstream ports.
Figure 5 shows the set-up to perform this test using an
oscilloscope and data generator. The option USB test
package provides various test set-ups and the test patterns
for the signal source, needed for receiver sensitivity testing.
To perform CHIRP testing, the DUT is hot-plugged and
signaling is measured with single-ended probes on both
data lines. Data is analyzed for CHIRP K amplitude, CHIRP
K duration, Reset duration, Number of KJ pairs before High
Speed termination and delay after KJKJKJ before deviceapplied termination.
Figure 6 illustrates the CHIRP test using a DPO7254.
Test Equipment
The CHIRP test requires a 2 GHz or higher bandwidth realtime
oscilloscope, such as a MSO/DPO5204 or DPO7254, with
single-ended probes, like a TAP1500, TAP2500, TAP3500,
P6243*3 or P6245*3. In addition, this test requires test software
and a test fixture, such as the option USB compliance test
Manual analysis of the various CHIRP types and conditions is
a time-consuming process. The test package automates this
process and automatically documents the results.
Requires a TPA-BNC adapter when used on an MSO/DPO5000 or DPO7000 Series model.
Understanding and Performing USB 2.0 Physical Layer Testing and Debugging
Equipment Set-up
with Application Running
Win 2K PC
Monotonic Signal
Differential Probe
Non Monotonic Signal
Figure 7. Illustration of monotonic and non-monotonic USB 2.0 high-speed signals
with a rise time of 500 ps.
D+ DJ33
Test Fixture
Device Under Test
Figure 9. The monotonicity test set-up uses the high-speed signal quality test
Test Equipment
Figure 8. The option USB compliance test package captures the test packet and
examines each rising and falling edge for monotonic operation.
Monotonicity Test
When performing a USB 2.0 high-speed compliance test,
a developer needs to verify that the signal under question
is monotonic. Monotonicity verifies that a transmitted signal
should smoothly increase or decrease in amplitude without
deviation in the opposite direction. Non-monotonic signal
behavior is caused by metastability, high-frequency noise and
jitter problems in a circuit. Figure 7 compares a monotonic
signal with a non-monotonic signal using a USB 2.0 highspeed signal with a rise time of 500 ps.
To verify monotonic behavior of a signal, the oscilloscope
used should have a sample rate high enough to capture as
many sample points as possible on a rising or falling edge.
In addition, the oscilloscope should have enough bandwidth
to ensure that the high frequency non-monotonic transition
is not attenuated. Hence, an oscilloscope with a sample rate
of 10 GS/s and a bandwidth of 2 GHz or higher, such as the
MSO/DPO5204, DPO7254 or DPO7354, is the ideal tool for
monotonicity testing.
The monotonicity test for a USB 2.0 device is verified during
test packet examination. The option USB compliance test
package captures the test packet and examines each rising
and falling edge for monotonic behavior, as shown in Figure 8.
Set-up uses the high-speed signal quality test configuration,
as illustrated in Figure 9. The TDSUSB2 compliance test
package, coupled with a high-performance oscilloscope,
automates this process and ensures repeatability of test
Application Note
Droop Receiver CHIRP Impedance
Test Sensitivity Test Measurement
Time Domain
Data Generator
Test Fixture
Test Software
Current Probes
Figure 10. TDR measurement made with a DSA8200 sampling oscilloscope coupled
with an 80E04 TDR sampling module.
Impedance Measurement Test
Due to the high signal rates of USB 2.0 High-Speed mode,
trace and packaging impedance have become critical
parameters. The USB 2.0 High-Speed specification now
requires differential impedance measurements of cables,
silicon and devices.
The USB 2.0 specification requires that the differential
TDR impedance step response be set to 400 ps. The USB
specification defines the impedance limits referenced from the
DUT connector. In general, the impedance should be between
70 Ohm and 110 Ohm at a given distance from the connector.
Cables are also required to meet specific impedance limits.
These limits are 90 Ohm +/- 15%.
Test Equipment
The impedance measurement test requires a time domain
reflecto-meter, such as the DSA8200 digital serial analyzer
sampling oscilloscope with 80E04 TDR sampling module,
which offers unmatched TDR performance on up to eight
channels simultaneously. Add the IConnect product to convert
from TDR measurements to S-parameters.
Figure 10 shows a TDR measurement made with the
DSA8200 sampling oscilloscope. The Min and Max measure
within the tolerance specified by the USB differential
specification of 90 Ohm +/- 15%.
Instrumentation Requirements for USB
2.0 Physical Layer Testing
USB 2.0 opens up a whole range of USB consumer
applications to make the PC a more user friendly and valuable
tool in the workplace and home. With any consumer product
opportunity, time to market is crucial. USB designers are
keenly aware that the correct tool aids in meeting schedule
objectives. Especially critical are the bandwidth, rise time and
sample rate of the oscilloscope, along with the test fixture and
fully automatic test software.
USB 2.0 physical layer validation and electrical compliance
testing require a host of test equipment, as the chart above
Understanding and Performing USB 2.0 Physical Layer Testing and Debugging
Effect of Oscilloscope Bandwidth/Rise Time on
Measurement Accuracy
Rise time needs of the oscilloscope depend closely on the rise
times or slew rate of the signals to be measured. The following
empirical formula gives the relation between measured rise
time [RT(measured)], oscilloscope rise time [RT(oscilloscope)]
and signal rise time [RT(signal)];
RT(measured) =
[ RT(signal)2 + RT(oscilloscope)2 ]
The following table illustrates the variation of percentage error
versus the ratio of oscilloscope rise time to signal rise time,
based on this relationship.
Rise/Fall Time vs Oscilloscope Bandwidth and
Rise Time
Figure 11. DPO7254 digital phosphor oscilloscope.
Selecting Tools for USB 2.0 Physical
Layer Testing
Real-Time Oscilloscope
A real-time oscilloscope is the most crucial test instrument
for USB 2.0 measurements. When selecting an oscilloscope
for these measurements, it is important to consider the
oscilloscopes rise time, bandwidth and sample rate. The
following section deals with the required performance
characteristics of the real-time oscilloscope.
Bandwidth (GHz)
Rise Time (ps)
Measured Rise Time*
% Error
* Based on a signal with a 500 ps rise time.
When the oscilloscope rise time specification is five times
that of the signal, the error decreases to 1.8%. However,
lower oscilloscope rise times would signify higher error in
measurements with respect to signals. Therefore, in order to
measure a signal with a rise time of 500 ps, the oscilloscope
used should ideally have a rise time of 100-180 ps, like a
Application Note
Effect of Oscilloscope Sample Rate on
To capture information at edge speeds as fast as 500 ps,
you need at least 10 sample points on an edge. This
requirement becomes even more important when performing a
monotonicity test, mandatory for high-speed testing.
Tektronix Solutions
The following chart lists various Tektronix real-time
Rise/Fall Time
160 ps
115 ps
98 ps
Sample Rate (1 ch)
40 GS/s
40 GS/s
25 GS/s
Note: USB 2.0 can encounter edge rates as fast as 500 ps.
The DPO7254 digital phosphor oscilloscope is just one of the
high performance members of the Tektronix’s Windows-based
oscilloscopes. With 40 GS/s maximum real-time sample rate
and 2.5 GHz bandwidth, the four-channel DPO7254 strikes
a balance between high performance and affordability for
verification, debug and characterization of USB 2.0 designs.
This instrument features exceptional signal acquisition
performance, operational simplicity and open connectivity
to the design environment. The DPO7254 delivers more
than 250,000 wfms/s waveform capture rate, enabled by
proprietary DPX® acquisition technology, to detect and capture
elusive events with confidence and ease.
Other higher bandwidth oscilloscopes from Tektronix can
also be used within the probes, software, and accessories
mentioned here to perform USB compliance tests. Contact
your Tektronix representative to learn more about the best
instruments for your applications.
Time Domain Reflectometer
A time domain reflectometer is required for the impedance
measurement test. The DSA8200 digital sampling oscilloscope
with 80E04 TDR sampling module provides true differential
time domain reflectometry (TDR), making it an ideal solution
for USB 2.0 device and cable impedance measurements.
This oscilloscope and sampling module can display both the
individual positive and negative TDR waveforms of differential
line characteristics and directly measure the impedance of
each conductor or common mode voltage of the differential
line. This test system can also display the true differential
measurements of both these lines and display the impedance
in the unit of ohms, providing the user with the required
measurements to validate any USB 2.0 device.
Signal Source
A signal source is required for the receiver sensitivity test. The
Tektronix AWG5000 and AWG7000 Series are excellent signal
sources for USB receiver sensitivity tests.
Setup files to perform USB 2.0 receiver sensitivity tests for all
of these signal sources are provided by Tektronix.
Understanding and Performing USB 2.0 Physical Layer Testing and Debugging
Fully Automatic Test Software
Fully automatic test software, such as the option USB
compliance test package, substantially improves test efficiency
by providing automatic oscilloscope set-ups, automated
highspeed tests and quick “one-touch” testing. This test
package drastically reduces the test time and chances of any
erroneous measurements.
Semi-Automated Test Software
Figure 12. TDSUSBF Test fixture.
Test Fixture
The test fixture is the most crucial component that enables
probing for every test set-up. The ideal test fixture should
provide access to the differential data lines (D+, D-) and VBUS
and offer access/connections via on-board USB connectors
or wired dongles.
For receiver sensitivity testing, SMA cables are needed to
connect the data generator to data lines to stimulate the
device. Cable access is also needed to allow impedance
measurements by a TDR measurement device.
The TDSUSBF is a comprehensive compliance test fixture to
enable USB 2.0 testing, as shown in Figure 12.
Test Software
A user may choose among fully automatic test software, semiautomated test software and manual testing.
As the name implies, this kind of solution automates certain
tests but invariably omits certain requirements of compliance
testing, resulting in reduced overall throughput. Examples
of some tests that still need to be manually performed are
high-speed compliance tests such as receiver sensitivity,
CHIRP and monotonicity tests, as well as rise and fall time
Manual Testing
The complexity of the tests and setups demand a high level of
expertise from the test engineer. Setting up the oscilloscope
can be a tedious and time consuming task, as oscilloscope
set-ups differ for various test configurations. A user is
compelled to make continuous references to exhaustive
documentation about test procedures, making testing difficult
and significantly reducing efficiency.
Probes are a critical component of the measurement system
to perform various USB 2.0 compliance tests. Tektronix
offers differential (P6248*4, TDP1500, TDP3500), singleended (P6245*4, TAP1500, TAP2500, TAP3500) and current
(TCP202*4, TCP0030) probes that allow access to high-density
boards with fine-pitch, hard-to-reach components while
maintaining maximum signal fidelity.
Requires a TPA-BNC adapter when used on an MSO/DPO5000 or DPO7000 Series model.
Application Note
Figure 13. MSO4104B oscilloscope with four analog channels and 16 digital channels
with digital per-channel threshold settings.
Debugging USB 2.0 Designs
Product designs with USB 2.0 interfaces usually contain a
wide variety of analog and digital signals, as well as parallel
and serial buses. For example, I2C and SPI buses are
commonly used for inter-integrated circuit communications in
embedded systems. For quick verification and debugging, a
time-correlated view of all these mixed signals and buses is
Test Equipment
The MSO/DPO4000B, MSO/DPO5000, DPO7000C, and
MSO/DSA/DPO70000C Series oscilloscopes provide
the feature-rich tools you need to speed the debugging
of your USB 2.0 designs. All models provide four analog
channels and optional USB 2.0 triggering and analysis. The
MSO4000B, MSO5000, and MSO70000C series Mixed Signal
Oscilloscopes also provide16 digital channels and parallel bus
triggering and analysis. See Figure 13.
Figure 14. MSO4104B Event Table display of high-speed USB data, triggered on the
text string “zip”.
These oscilloscopes, with the TDP1000 1 GHz Differential
Probe and the USB triggering and analysis application, can
trigger, decode, and search on USB 2.0 low-speed, full-speed
and high-speed buses. The oscilloscope’s serial trigger can
isolate and capture a wide range of USB 2.0 packet content,
protocol errors and data values.
In Figure 14, the oscilloscope has triggered on the ASCII text
string “zip” on the USB 2.0 high-speed bus. The decoded
bus is displayed in an Event Table format and the table can be
saved for documentation and for analysis with other software
Understanding and Performing USB 2.0 Physical Layer Testing and Debugging
Figure 15. Acquisition showing USB 2.0 high-speed decode, Ethernet 100BASE-TX
with TCP/IPv4 protocol decode, I2C decode, SPI decode and two analog signals.
Figure 16. Simplified display, showing only the differential high-speed USB analog signal
and the decoded bus.
Time-Correlated Bus Decode
spend hours looking at a single acquisition. The front panel
Wave Inspector controls on the MSO/DPO5000 and MSO/
DPO4000B Series provide manual navigation tools and
automated searches (including searches on serial buses) that
simplify the task of working with large acquisitions. The MSO/
DSA/DPO70000C, DPO7000C, and MSO/DPO5000 Series
offer Advanced Search and Mark which enables up to 8
simultaneous automatic search functions.
Time-correlated displays of complex system interactions
are critical to efficient embedded system debug, including
combinations of analog and digital signals, parallel buses,
and serial buses. The MSO/DSA/DPO70000C, DPO7000C,
and MSO/DPO5000 Series oscilloscopes with the SR-USB
application software can decode and display up to 16 buses
at a time, while the MSO/DPO4000B Series oscilloscope with
the DPO4USB application module can decode and display up
to 4 buses. The buses are displayed in color-coded bus forms
that are time correlated with the analog and digital signals.
Figure 15 shows an acquisition with USB 2.0 high-speed
decode, Ethernet 100BASE-TX with TCP/IPv4 decode, I2C
decode, SPI decode, and two analog signals which are all
time-correlated. This single display provides in-depth insight to
the operation of this design.
Wave Inspector Navigation and Advanced
Search and Mark
In Figures 15 and 16, the automated bus search finds 14
occurrences of a USB 2.0 Sync field. These events are
marked with white hollow triangles above the waveforms. Now
that the USB 2.0 Syncs have been marked, navigating to the
beginning of each USB 2.0 packet is as simple as pressing the
front-panel Previous and Next arrow buttons. Also, you can
press the Set/Clear front-panel button to mark the acquisition
at other places of interest so that you can quickly return to
them for further analysis.
The deep record lengths of these oscilloscopes represent
thousands of full-resolution screens of data. Even with
manually scrolling through the waveforms at the rate of
one screen (1,000 points/screen) per second, you could
Application Note
Understanding and Performing USB 2.0 Physical Layer Testing and Debugging
USB 2.0 technology provides the device designer a migration
path for high-performance peripherals that preserve the
ease-of-use consumers have come to demand. However, this
tremendous increase compatibility also presents new design
challenges that the device designer must resolve.
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Tektronix offers a comprehensive tool set — sophisticated
mixed-signal oscilloscopes, true differential TDR, high-speed
signal generators, industry-leading probes, USB 2.0 triggering
and analysis applications, and a fully automated compliance
test package — to enable USB 2.0 device designers to
perform quick and accurate electrical compliance testing and
physical layer validation of their designs. Collectively, this tool
set provides superior performance with unparalleled ease-ofuse, making it an ideal solution for USB 2.0 measurements.
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Contact List Updated 10 February 2011
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