Sharp | R-501CW | LS013B4DN04 - Sharp Memory LCDs

LCD Module Application Note
LS013B4DN04
Application Information for Sharp’s LS013B4DN04 Memory LCD
Sharp Microelectronics of the Americas
INTRODUCTION
This Application Note provides additional design
assistance for Sharp’s LS013B4DN04 Memory LCD.
This module is a reflective, monolithic active-matrix liquid crystal module utilizing Sharp’s CG-silicon thin-film
transistor process. It offers high performance and
power efficiency for compact display applications, with
a serial interface for simple integration.
Subjects covered will be:
• Mechanical Specifications, including dimension
drawings and connector specifications
• Absolute Maximum Ratings
• Optical Specifications, including view angles, reflectivity, contrast, and risetime
• Electrical Characteristics, including interfacing and
signal timing information
• Design Notes
• Manufacturing Information, including handling and
storage
• Reliability Information
This Note is based on Sharp’s document number
LCP-1109027 and is designed to provide supplementary information for the Specifications for this part.
Always refer to the latest Specifications when
designing with these devices.
FEATURES
• Reflective monochrome panel
• Square aspect ratio (1:1)
• 1.35-inch screen with 96 × 96 resolution in a
9,216-pixel stripe array
• Serial interface for display control
• Screen data is arbitrarily renewable by line
• Built-in, 1-bit internal memory for data storage
• Super low power consumption TFT panel
• Attached FPC connector
• RoHS compliant
Application Note
1
LCD Modules
LS013B4DN04
MECHANICAL SPECIFICATIONS
PARAMETER
SPECIFICATION
UNIT
Screen Size
1.3
Inch
Viewing Area
24.192 (H) × 24.192 (V)
mm
Dot Configuration (Square panel)
96 (H) × 96 (V)
Dots
Dot Pitch
0.252 (H) × 0.252 (V)
mm
Pixel Array
Stripe Array
External Dimensions
28.2 (W) × 32.34 (H) × 1.4 (D)
Mass
3.6 (TYP.)
Surface Hardness
3H
mm
g
Pencil hardness
External Dimensions
28.2 ±0.2
27.6 ±0.15 (Note 1)
24.192
0.1 (Note 1)
2.004
0.6
0.7
2.0
0.4
0.3
BACK SIDE
36.2
36.8
37.4
29.64 ±0.15 (Note 1)
30.24
32.34 ±0.2
6.06
(Bending Area)
0.8
39.2
41.185
46.12
31.4
24.192
DISPLAY SIDE
4.0
2-R0.6
9.365
11.35
5.5
18.835
NOTES:
1. UV Protection Film
2. Units: mm
2
10
1
P1 Stiffener
0.30 ±0.3
8.64 ±0.1
9.78
LS013B4DN04-16
Application Note
LS013B4DN04
LCD Modules
Connector Specifications
Table 1. Input Terminals and Functions
TERMINAL
SYMBOL
I/O
FUNCTION
NOTES
1
SCLK
INPUT
Serial clock signal
2
SI
INPUT
Serial data input signal
3
SCS
INPUT
Chip select signal
4
EXTCOMIN
INPUT
External COM inversion signal input (H: enable)
1
5
DISP
INPUT
Display ON/OFF signal
2
6
VDDA
POWER
Power supply (Analog)
7
VDD
POWER
Power supply (Digital)
8
EXTMODE
INPUT
9
VSS
POWER
GND (Digital)
10
VSSA
POWER
GND (Analog)
COM inversion select terminal
3
NOTES:
1. EXTCOMIN is HIGH enabled. When LOW, the serial input flag is enabled. See Figure 14 and Figure 15 for recommended circuits.
2. DISP enables/disables the display. All pixels will revert to Normal mode (reflective) when LOW. When DISP = H,
data in the pixel memories displays normally.
3. EXTMODE pin must be connected to VDD for HIGH, and to VSS for LOW. See Figure 17 in Interfacing and Signals.
Connector Bending Specifications
The connector is made to be bent underneath the
module with a radius of not less than 0.45 mm. Do not
allow the connector to be in contact with the glass, or
the glass edge, in the final design. Do not allow the connector to be bent in the reverse direction or allow any
stress or force to be applied to the connector through
pulling it or hanging the module by the connector.
The recommended bending area is 0.8 to 6.0 mm
from the glass edge. See Figure 1 for guidance.
R0.45
LS013B4DN04-17
Figure 1. Connector Bending
Application Note
3
LCD Modules
LS013B4DN04
Absolute Maximum Ratings
PARAMETER
Power Supply Voltage
SYMBOL
MIN.
MAX.
UNIT
VDDA
-0.3
+3.6
V
VDD
-0.3
+3.6
V
1
VDD
V
2
Analog
Logic
Input Signal Voltage (HIGH)
Input Signal Voltage (LOW)
-0.3
Storage Temperature
Operation Temperature (at panel surface)
NOTES
V
Tstg
TBD
TBD
°C
3
Topr1
-10
+60
°C
4
NOTES:
1. Applies to EXTMODE.
2. Applies to SCLK, SI, SCS, DISP, EXTCOMIN.
3. Do not exceed this temperature in any part of the module.
4. Maximum wet bulb temperature is 57°C or lower. No condensation is allowed. Condensation will
cause electrical leakage and may cause the module to fail to meet this Specification.
5. “Operating Temperature” is the guaranteed temperature limits for operation.
6. For contrast, response time, and other display quality determination, use Ta = +25°C.
OPTICAL SPECIFICATIONS
Ta = 25°C
PARAMETER
H
Viewing Angle CR  5
V
Contrast Ratio
Reflectivity Ratio
Response Time
Chromaticity
SYMBOL
MIN.
21, 22
TYP.
MAX.
UNIT
NOTES
60
° (degrees)
1
11
60
° (degrees)
1
12
60
° (degrees)
1
CR
5
10
2
R
50
%
2
Rise
tr
50
ms
3
Fall
tf
50
ms
3
x
0.313
2
y
0.338
2
White
NOTES:
1. Viewing Angle is described as clock positions: 12 = 12 o’clock,
11 = 6 o’clock, 21 = 3 o’clock, 22 = 9 o’clock. See Figure 2.
2. Contrast Ratio, Reflectivity Ratio, and Chromaticity are measured
through the use of an integrating sphere. See Figure 3.
3. Response Time is measured by the change interval in an optical
receiver when the test panel’s signal is transitioned from white to
black to white. See Figure 4 for the measurement setup and Figure 5 for the output waveshape. Measurements are conducted in
a dark room or equivalent space.
Normal
Δθ22
Δθ11
Δθ12
Δθ21
12 o’clock
6 o’clock
LS013B4DN04-14
Figure 2. Viewing Angle
4
Application Note
LS013B4DN04
LCD Modules
Normal Line
White
8°
Black
Light Source
LCD Panel
Photo-detector Output
Light Receiver
Integrating
Sphere
White
100%
90%
3%
0%
τr
Time
τd
LS013B4DN04-15
Figure 5. Response Time
Display Center
LS013B4DN04-12
Figure 3. Setup for Contrast, Reflection Ratio,
and Chromaticity
Normal Line
Light Receiver
Light Source
-30°
LCD Panel
Display Center
LS013B4DN04-13
Figure 4. Setup for Response Time
Application Note
5
LCD Modules
LS013B4DN04
ELECTRICAL SPECIFICATIONS
Here are the Recommended Operating Conditions
for this module, with VSS (GND) = 0V and Ta = 25°C.
PARAMETER
Power supply
Input signal voltage
SYMBOL
MIN.
TYP.
MAX.
UNIT
VDDA
+2.7
+3.0
+3.3
V
Logic
VDD
+2.7
+3.0
+3.3
V
1
HIGH
VIH
VDD - 0.1
VDD
V
2
LOW
VIL
VSS
VSS + 0.1
V
Analog
NOTES
NOTES:
1. EXTMODE = H
2. Applies to SCLK, SI, SCS, DISP, EXTCOMIN
Power Consumption
This module has the ability to shut down most of its
logic circuits when in Static mode (not being updated).
It has two levels of power consumption: Static and
Dynamic Display.
Static Display: 6 µW (TYP.) Vertical stripe display;
fully static, no display updates.
• This includes a 1 Hz VCOM toggle, and VDD = 3 V,
VDDA = 3 V, ƒSCLK = 0.5 MHz, ƒSCS = 1 Hz
C1
C2
C3
Dynamic Display: 12 µW (TYP.) Vertical stripe display; updated at a 1 Hz rate.
1
SCLK
2
SI
3
SCS
4
EXTCOMIN
5
DISP
6
VDDA
7
VDD
8
EXTMODE
9
VSS
10
VSSA
• VDD = 3 V, VDDA = 3 V, ƒSCLK = 0.5 MHz,
ƒSCS = 1 Hz
These numbers represent average power, not peak
power usage when driving VCOM. Always allow for a
margin in power supply design.
Decoupling Capacitors
Use of a decoupling capacitor on VDD and VDDA is
recommended, even when the two supplies are tied
together. See Figure 6.
Values for these capacitors:
C1: DISP to VSS: rank B, 0.1 µF Ceramic
C2: VDDA to VSS: rank B, 1 µF Ceramic
C3: VDD to VSS: rank B, 1 µF Ceramic
These are recommended values; actual values
should be determined by the final design. Always place
the decoupling capacitors as close as possible to the
part as the impedance of the VDD and VSS lines is low
when the module is operating.
LS013B4DN04-18
Figure 6. Decoupling Capacitors
POWER-UP
VDD and VDDA must rise together or VDD must rise
faster than VDDA.
• 3 V rises to nominal
• Initialize pixel memory: send D2 CLEAR ALL flag or
set the display to all-white (requires >1 V)
• Latch cancellation for TCOM; requires a period to
cancel the COM latch circuit by DISP = HIGH
(requires > 30 µS)
• TCOM polarity initialization by EXTCOMIN (requires
> 30 µS)
POWER-DOWN
VDD and VDDA must fall together or VDDA must fall
faster than VDD.
• Initialize pixel memory (requires >1 V)
Power Supply Sequencing
• Initialize VA, VB, and VCOM (requires >1 V)
This device requires proper supply sequencing on
both startup and shutdown to prevent latching of the
logic circuits. Refer to Figure 7.
• 3 V falls
6
Application Note
LS013B4DN04
LCD Modules
On Sequence
Normal Operation
1
2
3
4
T1
T2
T3
T4
Off Sequence
5
T5
6
T6
7
T7
Note 1 Note 1
VDD/VDDA (5 V)
GND
GND
DISP
GND
GND
EXTCOMIN
GND
SCS
GND
Note 2
Normal Operation
Note 2
GND
Others
GND
Note 2
Normal Operation
Note 2
GND
Normal Operation
GND
NOTES:
1. The order of 3 and 4 can be reversed, in this case, VCOM polarity inversion
timing controlled by EXTCOMIN (doesn’t work during DISP = ‘L’).
2. Setup value for initialization of pixel memory data.
3. Precautions at power on and power off.
LS013B4DN04-3
Figure 7. Power Supply Sequencing
Application Note
7
LCD Modules
LS013B4DN04
SIGNAL DESCRIPTIONS
Input signal characteristics are given in Table 2 and
Table 3; refer to Figure 8 for timing diagrams.
All measurements are at VDDA = +5.0 V,
VDD = +5.0 V, GND = 0 V, Ta = 25°C.
Table 2. Signal Frequencies
PARAMETER
DESCRIPTION
MIN.
TYP.
MAX.
UNIT
1
-
60
Hz
0.5
1
MHz
ƒSCS
Frame frequency
ƒSCLK
Clock frequency
tV
Vertical Interval
16.66
-
1000
ms
ƒCOM
COM Frequency
0.5
-
30
Hz
Table 3. Signal Transition Times
PARAMETER
DESCRIPTION
MIN.
TYP.
MAX.
UNIT
trSCS
SCS Risetime
50
ns
tfSCS
SCS Falltime
50
ns
NOTES
136
µs
1
24
µs
2
SCS LOW Duration
2
µs
tsSCS
SCS setup time
6
µs
thSCS
SCS hold time
2
µs
twSCSH
SCS HIGH Duration
twSCSL
trSI
SI Risetime
50
ns
tfSI
SI Falltime
50
ns
tsSI
SI setup time
380
ns
thSI
SI hold time
440
ns
trSCLK
SCLK Risetime
50
ns
tfSCLK
SCLK Falltime
50
ns
twSCLKH
SCLK HIGH duration
450
950
ns
twSCLKL
SCLK LOW duration
450
950
ns
ƒEXTCOMIN
EXTCOMIN frequency
trEXTCOMIN
1
60
Hz
EXTCOMIN Risetime
50
ns
tfEXTCOMIN
EXTCOMIN Falltime
50
ns
thlEXTCOMIN
EXTCOMIN HIGH duration
2
3
µs
trDISP
DISP Risetime
50
ns
tfDISP
DISP Falltime
50
ns
NOTES:
1. Dynamic Mode (continuously updating display)
2. Static Mode (no display updating)
3. ƒEXTCOMIN must always be less than ƒSCS (Table 2)
8
Application Note
LS013B4DN04
LCD Modules
Timing Diagrams
SCS, SI, SCLK Signal
twSCSH
SCS
twSCSL
90%
50%
10%
90%
50%
10%
tfSCS
trSCS
thSCS
tsSCS
90%
SI
50%
90%
10%
10%
trSI
tfSI
tsSI
twSCLKH twSCLKL
thSI
90%
SCLK
10%
10%
50%
50%
50%
50%
trSCLK
tfSCLK
EXTCOMIN Signal
ƒEXTCOMIN
twEXTCOMINH
90%
EXTCOMIN
90%
10%
10%
trEXTCOMIN
50%
50%
50%
tfEXTCOMIN
DISP Signal
90%
DISP
90%
10%
10%
trDISP
tfDISP
NOTES:
1. SCS, SI, SCLK, DISP: 3 V Amplitude
2. EXTCOMIN: 5 V Amplitude
LS013B4DN04-4
Figure 8. SCS, SI, SCLK, EXTCOMIN, and DISP Signals
Application Note
9
LCD Modules
PROGRAMMING
For software commands, see the Application Note,
Programming Sharp’s Memory LCDs, by Ken Green.
In all the following diagrams and descriptions, these
conventions are used:
• M0: MODE
When M0 is 'H', the module enters Dynamic Mode,
where pixel data will be updated.
When M0 is 'L' the module remains in Static Mode,
where pixel data is retained.
• M1: VCOM
This polarity-inversion flag enables a periodic polarity inversion on the panel to keep a latent charge
from building up within the Liquid Crystal cells. When
M1 is 'H' then VCOM = 'H' is output. If M1 is 'L' then
VCOM = 'L' is output.
When EXTMODE = 'H', M1 value = XX (don’t care).
See COM Inversion and Signal Selection.
• M2: CLEAR ALL
When M2 is 'L' then all flags are cleared. When a full
display clearing is required, refer to CLEAR ALL.
LS013B4DN04
MULTIPLE LINE WRITE
Dynamic Mode assumes the updating of at least one
line in the display. During the Data Write period, data is
stored in the panel’s binary latch. During Data Transfer,
the data from the latch is written to the panel memory,
line-by-line. During the write to panel memory, data for
the next line is latched.
Dynamic Mode is entered by sending M0 = H and
M2 = L.
Figure 10 shows an example of writing multiple lines.
SINGLE LINE WRITE
Writing a single line of data is much the same as
writing multiple lines. During the Data Write period,
data is stored in the panel’s binary latch. During Data
Transfer, the data from the latch is written to the panel
memory, line-by-line. During the write to panel memory, data for the next line is latched.
Dynamic Mode is entered the same way, by sending
M0 = H and M2 = L.
Figure 11 shows an example of writing a single line.
• D1 - D96: Display data
Setting D(n) = 'L' sets that pixel to black. Conversely,
Setting D(n) = 'H' sets that pixel to white.
• DUMMY DATA: Dummy data
Dummy data is typically ‘XX (don't care); however
Sharp recommends setting bits to 'L'.
Data Addressing and Positions
P1, L1
P2, L1 P3, L1
P1, L2
P2, L2
P96, L1
P1, L3
This part uses mixed addressing for columns and
lines. Columns (X direction) are addressed using a
7-bit binary scheme, and lines (Y direction) are
addressed directly as 96 bits. One line is the minimum
addressable unit in the display; even if only one pixel in
the line is to be updated, the entire line must be sent.
DISPLAY SIDE
Dynamic Mode
For software commands, see Sharp’s Application
Note, Programming Sharp’s Memory LCDs, by Ken
Green.
P1, L96
P96, L96
LS013B4DN04-11
Figure 9. Display Data Position
10
Application Note
LS013B4DN04
LCD Modules
Table 4. Column (X direction) Addressing
LINE
ADDRESS
CA0
CA1
L1
L2
L3
:
L94
L95
L96
H
L
H
:
L
H
L
L
H
H
:
H
H
L
COLUMN ADDRESS
CA2
CA3
CA4
L
L
L
:
H
H
L
L
L
L
:
H
H
L
L
L
L
:
H
H
L
CA5
CA6
L
L
L
:
L
L
H
L
L
L
:
H
H
H
twSCSH
SCS
tsSCS
SI
M0
M1
M2 DMY DMY DMY DMY DMY CA0 CA1 CA2 CA3 CA4 CA5 CA6 DMY D1
D2
D3
D4
D93 D94 D95 D96 DON’T CARE
CA0 CA1
CA5 CG6 DMY D1
D2
twSCLKL
tsSI
twSCLKH
thSI
SCLK
Mode Selection Period
(3ck+5ckDMY)
Column Addressing Period
(7ck+1ckDMY)
Data Transfer Period
(96ck)
Data Transfer Period
(8ck(Dummy)+7ck(address)+1ck(Dummy)=16ck)
CA1
CA2
twSCSH
twSCSL
thSCS
D95 D96 don’t care
CA0 CA1
CA4 CA5 CA6 DMY D1
Data Transfer Period
(8ck(Dummy)+7ck(address)+1ck(Dummy)=16ck)
CA(n-1)th line
D2
D94 D95 D96
DUMMY DATA (don’t care)
Data Writing Period
(96ck)
Data Transfer Period
(16ck)
CA(n)th line
LS013B4DN04-6
Figure 10. Dynamic Mode Timing Diagram, Writing Multiple Lines
twSCSL
twSCSH
SCS
thSCS
tsSCS
SI
M0
M1
M2 DMY DMY DMY DMY DMY CA0 CA1 CA2 CA3 CA4 CA5 CA6 DMY D1
D2
D3
D4
D93 D94 D95 D96
DON’T CARE
twSCLKL
tsSI
thSI
twSCLKH
SCLK
Mode selection period (3ck+5ckDMY)
Column address period (7ck+1ckDMY)
Data writing period (96ck)
Data transfer period (16ck)
LS013B4DN04-5
Figure 11. Dynamic Mode Timing Diagram, Writing a Single Line
Application Note
11
LCD Modules
LS013B4DN04
Static Mode
Static Mode is entered by sending M0 = L and
M2 = L.
Static Mode is the module’s lowest-power mode,
with data latches and other circuitry powered down.
Static Mode can be held indefinitely; as long as the
panel has power and VCOM is toggled periodically.
Sharp recommends keeping maximum time between
VCOM toggles to no more than one second, and
refreshing data every two hours, to prevent stuck pixels.
CLEAR ALL
CLEAR ALL will clear all data from pixel memories
and the display will revert to its normal white color.
CLEAR ALL is invoked by sending M0 = L and
M2 = H.
tV
twSCSL
twSCSH
SCS
tsSCS
SI
thSCS
M0
M1
M2
Dummy Data (don’t care)
Mode Selection
Period
(3ck)
Data Transfer Period
(More than 13ck)
M0
M1
M2
don’t care
tsSI
thSI
SCLK
LS013B4DN04-7
Figure 12. Static Mode Timing Diagram
tV
twSCSL
twSCSH
SCS
tsSCS
SI
thSCS
M0
M1
M2
Dummy Data (don’t care)
Mode Selection
Period
(3ck)
Data Transfer Period
(More than 13ck)
M0
M1
M2
don’t care
tsSI
thSI
SCLK
LS013B4DN04-8
Figure 13. CLEAR ALL Timing Diagram
12
Application Note
LS013B4DN04
LCD Modules
VCOM Inversion
Periodic VCOM inversion impresses a periodic
polarity inversion across the panel to keep a latent
charge from building up within the Liquid Crystal cell. It
can be implemented either through software or through
hardware. In either implementation, the positive and
negative inversion intervals should be kept as equal as
possible, and intervals should not exceed one second.
To implement VCOM inversion in software, the M1 bit
is periodically toggled. When M1 is 'H' then VCOM = 'H'
is output to the panel. If M1 is 'L' then VCOM = 'L' is output to the panel. To set the panel for software toggling of
M1, tie EXTMODE to VSS as shown in Figure 14.
When implementing a VCOM toggle through hardware, EXTMODE is set to 'H', and the M1 value becomes
XX (don’t care). Hardware then toggles EXTCOMIN, and
the timing between toggles of this line sets the VCOM
inversion interval. Therefore, it’s important not to allow the
toggling interval of EXTCOMIN to exceed one second. To
set the panel for software toggling of M1, tie EXTMODE
to VDD as shown in Figure 15.
The LC cell inversion polarity toggle is armed when
EXTCOMIN rises. Internal signal COMZ toggles with
each rise of EXTCOMIN, and latches the VCOM transition. The VCOM transition takes place upon the next
clock transition of SCS. Again, keep the duty cycle of
EXTCOMIN at 50%.
The Truth Tables show how VCOM is implemented
in both hardware and software.
Table 7. EXTMODE = H,
Relationship of COMZ to EXTCOMIN
EXTCOMIN
COMZ
Before Inversion
After Inversion
L
L
L
L
H
H
H (rising edge)
L
H
H (rising edge)
H
L
NOTE: COMZ is inverted with each rising of EXTMODE.
1
SCLK
2
SI
3
SCS
4
EXTCOMIN
5
DISP
6
VDDA
7
VDD
8
EXTMODE
9
VSS
10
VSSA
LS013B4DN04-1
Figure 14. VCOM Software Input
Table 5. EXTMODE = L
EXTCOMIN
COM
1
SCLK
L
2
SI
L
3
SCS
4
EXTCOMIN
H (rising edge)
Depends entirely on status of M1
H (rising edge)
Table 6. EXTMODE = H
Relationship of COMZ to VCOM
COMZ
VCOM
SCS = L
SCS = H
L
L
Qn-1
H
H
Qn-1
5
DISP
6
VDDA
7
VDD
8
EXTMODE
9
VSS
10
VSSA
LS013B4DN04-2
Figure 15. VCOM Hardware Input
NOTE: Qn-1: VCOM changes polarity at the falling edge of SCS.
Application Note
13
LCD Modules
LS013B4DN04
SCS
SI
M0
M1
M0
M2
See Note 1
M1
M2
M0
M1
M2
See Note 1
See Note 1
COM
ƒCOM
ƒCOM
See Note 2
See Note 2
NOTES:
1. LC inversion has been changed by M1 flag statement.
2. The periods of plus polarity and minus polarity should be the same length.
LS013B4DN04-9
Figure 16. EXTMODE = L, Software VCOM Toggle
SCS
twEXTCOMIN
fEXTCOMIN
EXTCOMIN
COMZ
See Note 1
See Note 1
See Note 1
COM
See Note 2
See Note 2
ƒCOM
NOTES:
1. LC inversion polarity has been latched by the rise time of EXTCOMIN
internally as COMZ, and when SCS falls, LC inversion occurs as VCOM.
2. The duty cycle of EXTCOMIN should be 50%.
LS013B4DN04-10
Figure 17. EXTMODE = H, Hardware VCOM Toggle
14
Application Note
LS013B4DN04
DESIGN NOTES
1. This device is static sensitive. Handle it only in a
static-safe environment.
2. Do not press on the surface of the module, and do
not stack modules in such a way that pressure will
be applied to the surfaces or to the connector area.
The safest place for temporary storage of modules
is in their shipping tray.
3. The connector on this module is designed for a limited number of insertions. Do not attempt to solder
directly to the connector.
4. This set of Specifications gives definite environmental, electrical, and signal drive conditions for
the operation of this module. Operating it outside of
these given limits can reduce image quality,
shorten its life, or cause it to fail altogether.
5. When displaying static images, Sharp recommends refreshing the image data every two hours
to prevent stuck pixels.
6. When storing the module, keep it from long periods of
exposure to direct sunlight or other sources of ultraviolet light. Recommended storage is a dark place.
7. Do not allow the gate driver area (the circuit areas
outside of the LC glass) to be exposed to light in
the final design. Shield this area.
8. Support for the module should be designed to
avoid stress exceeding the maximums given in the
Specifications.
9. Do not put a seal or adhesive materials on the
glass surface. Picture uniformity defects can result.
10. Do not use chloroprene rubber in the design as it
generates chlorine gas and can affect the reliabiltiey of the LCD module’s connector areas.
11. This part is shipped with a protective film over the
UV protection film, to prevent scratches or other
damage. Remove this film before use. Do not
attempt to reattach this film once it has been
removed. If the film is reattached and the LCD module is stored in this condition, the UV film may be
affected enough to cause a picture quality failure.
12. Materials used in setting or epoxy resins (anime
hardening agents) and silicon adhesives (dealcoholized or oxime) all release a gas which can affect
the quality of the UV protection film. Always confirm compatibility with these materials.
13. The connector is made to be bent underneath the
module with a radius of not less than 0.45 mm. Do
not bend the connector in the reverse direction or
apply force to the connector by pulling it or hanging
the module by the connector.
14. The liquid crystal material in this module will solidify if stored below the rated temperature, and will
become an isotropic liquid if stored above the rated
storage temperatures. After such storage, the
material may not return to its original properties.
Application Note
LCD Modules
15. Use of decoupling capacitors is recommended.
See Electrical Specifications.
16. This device can be powered from a 3V system with
these power supply ICs. See Power Supply Reference Circuits for more information.
– SII: S-8821 Charge Pump Power Supply IC
– National Semiconductor: LM2750 Charge Pump
Power Supply IC
POWER SUPPLY REFERENCE CIRCUITS
VIN
CIN
4.7 µF
VOUT
COUT
2.2 µF
S-8821
C+
CPUMP
0.47 µF
CGND
LS013B4DN04-19
Figure 18. S-8821 Reference Circuit
VIN
2.7 V to
5.6 V
VOUT 1, 2
8, 9 VIN
CIN
2.2 µF
LM2750-5.0
4
SD
CAP+
VOUT
5.0 V ±4%
COUT
2.2 µF
10
CFLY
1 µF
7
CAPGND
3, 5, 6, DAP
NOTE:
IOUT up to 120 mA (VIN ≥ 2.9 V)
IOUT up to 40 mA (VIN ≥ 2.7 V)
LS013B4DN04-20
Figure 19. LM2750 Reference Circuit
Table 17. Electrical Specifications for 3 V
Step-up Power Supply ICs
PART
NUMBER
V IN (V)
MIN.
MAX.
V OUT (V)
MIN.
TYP.
MAX.
I OUT
(mA)
S-8821
2.8
5.0
4.9
5.0
5.1
40
LM2750
2.7
5.6
4.8
5.0
5.2
40
NOTES:
1. Refer to each manufacturer’s specifications for more information.
2. This information is for reference. Evaluate the parts in actual use.
15
LCD Modules
LS013B4DN04
HANDLING, STORAGE, AND PACKAGING
Model Number
LS013B4DN04
9312AD00001FA
Serial Number
Day
Month (1, 2 . . . 9, X, Y, Z)
Year (Single Number)
LS013B4DN04-21
Figure 20. Serial Number
BACK SIDE
3.0
1. This module is not made to be disassembled.
Doing so may cause permanent damage.
2. The liquid crystal material in this module is injurious to
humans. Do not allow it to get into the eyes or mouth.
If any liquid crystal material gets on skin or clothing,
immediately wash it out with soap and water.
3. This module is RoHS compliant, and does not use
any ODS (1,1,1-Trichloroethane, CCL4) in its
materials or in its production processes.
4. When discarding this module, dispose of it as glass
waste. This LCD module contains no harmful substances. The liquid crystal panel contains no dangerous or harmful substances. The liquid crystal
cell contains an extremely small amount of liquid
crystal (approx.100 mg) and therefore will not leak;
even if the panel should break.
5. The material used in this panel has a median lethal
dose (LD50) of greater than 2,000 mg/kg and tests
negative (Aims test) for mutagenic properties.
1. Store these devices at a temperature range
between 0°C and 40°C, at 60% RH or less.
2. Use within 3 months.
3. Open the package within an area that has proper
static control precautions, and more than 50% RH.
4. When storing this module, keep it from long periods of exposure to direct sunlight or other sources
of ultraviolet light. Recommended storage is in a
dark place.
10.0
Storage
LS013B4DN04
9312AD0001FA
Packaging
Figure 20 shows the serial number schema.
Figure 21 shows the location where the serial number is printed.
NOTE: Units: mm
LS013B4DN04-22
Figure 21. Serial Number Location
16
Application Note
LS013B4DN04
LCD Modules
Packaging Diagrams
Stack no more than 12 cartons high. Product is
packed in lots of 800.
LS013B4DN04-24
Figure 23. Package Labeling
LS013B4DN04-23
Figure 22. Packaging Format
Application Note
17
LCD Modules
LS013B4DN04
RELIABILITY
Environmental Reliability
Physical Reliability
The Panel surface stress specification parameter is
the stress force [N] before image failure.
Table 5. Test Item Reliability
NO.
TEST ITEM
TEST CONDITION
1
High temperature
storage test
Ta = 80°C, 240h
2
Low temperature
storage test
Ta = 35°C, 240h
3
High temperature
and high humidity
operating test
Tp = 40°C/95% RH,
240h
4
High temperature
operating test
Tp = 70°C, 240h
5
Low temperature
operating test
Tp = -20°C, 240h
6
Shock test
(non-operating)
Ta = -30°C (1h) to +80°C
(1h) / 5 cycles
7
Electrostatic
discharge test
±200 V, 200 pF (0 )
once per terminal
Load test: Minimum 120[N]; on an LCD panel with
UV protection film, fixed to a test stage.
Pressure point is the center of the panel, with a
10 mm column, at 1 mm/minute.
Full pressure is held for 5 seconds after achievement, then released.
NOTES:
1. Ta = ambient temperature, Tp = panel temperature
2. Check for any items which impair display function.
18
Application Note
LS013B4DN04
LCD Modules
SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE.
Suggested applications (if any) are for standard use; See Important Restrictions for limitations on special applications. See Limited
Warranty for SHARP’s product warranty. The Limited Warranty is in lieu, and exclusive of, all other warranties, express or implied.
ALL EXPRESS AND IMPLIED WARRANTIES, INCLUDING THE WARRANTIES OF MERCHANTABILITY, FITNESS FOR USE AND
FITNESS FOR A PARTICULAR PURPOSE, ARE SPECIFICALLY EXCLUDED. In no event will SHARP be liable, or in any way responsible,
for any incidental or consequential economic or property damage.
NORTH AMERICA
EUROPE
JAPAN
SHARP Microelectronics of the Americas
5700 NW Pacific Rim Blvd.
Camas, WA 98607, U.S.A.
Phone: (1) 360-834-2500
Fax: (1) 360-834-8903
www.sharpsma.com
SHARP Microelectronics Europe
Division of Sharp Electronics (Europe) GmbH
Sonninstrasse 3
20097 Hamburg, Germany
Phone: (49) 40-2376-2286
Fax: (49) 40-2376-2232
www.sharpsme.com
SHARP Corporation
Electronic Components Devices
22-22 Nagaike-cho, Abeno-Ku
Osaka 545-8522, apan
Phone: (81) 6-6621-1221
Fax: (81) 6117-725300/6117-725301
www.sharp-world.com
TAIWAN
SINGAPORE
KOREA
SHARP Electronic Components
(Taiwan) Corporation
8F-A, No. 16, Sec. 4, Nanking E. Rd.
Taipei, Taiwan, Republic of China
Phone: (886) 2-2577-7341
Fax: (886) 2-2577-7326/2-2577-7328
SHARP Electronics (Singapore) PTE., Ltd.
438A, Alexandra Road, 05-01/02
Alexandra Technopark,
Singapore 119967
Phone: (65) 271-3566
Fax: (65) 271-3855
SHARP Electronic Components
(Korea) Corporation
RM 501 Geosung B/D, 541
Dohwa-dong, Mapo-ku
Seoul 121-701, Korea
Phone: (82) 2-711-5813 8
Fax: (82) 2-711-5819
CHINA
HONG KONG
SHARP Microelectronics of China
(Shanghai) Co., Ltd.
28 Xin in Qiao Road King Tower 16F
Pudong Shanghai, 201206 P.R. China
Phone: (86) 21-5854-7710/21-5834-6056
Fax: (86) 21-5854-4340/21-5834-6057
Head Office:
No. 360, Bashen Road,
Xin Development Bldg. 22
Waigaoqiao Free Trade Zone Shanghai
200131 P.R. China
Email: smc china.global.sharp.co.jp
SHARP-ROXY (Hong Kong) Ltd.
3rd Business Division,
17/F, Admiralty Centre, Tower 1
18 Harcourt Road, Hong Kong
Phone: (852) 28229311
Fax: (852) 28660779
www.sharp.com.hk
Shenzhen Representative Office:
Room 13B1, Tower C,
Electronics Science Technology Building
Shen Nan Zhong Road
Shenzhen, P.R. China
Phone: (86) 755-3273731
Fax: (86) 755-3273735
©2011 by SHARP Corporation
Reference Code SMA11008
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