ADL5320

ADL5320

FEATURES

Operation: 400 MHz to 2700 MHz

Gain of 17 dB at 880 MHz

OIP3 of 45 dBm at 880 MHz

P1dB of 25.4 dBm at 880 MHz

Noise figure: 4 dB at 880 MHz

Power supply: 5 V

Power supply current: 104 mA typical

Internal active biasing

Thermally efficient SOT-89 package

ESD rating of ±4 kV (Class 3A)

GENERAL DESCRIPTION

The ADL5320 is a broadband, linear driver RF amplifier that operates at frequencies from 400 MHz to 2700 MHz. The device can be used in a wide variety of wired and wireless applications, including ISM, WLL, PCS, GSM, CDMA, and W-CDMA.

The ADL5320 operates with a 5 V supply voltage and a supply current of 104 mA.

400 MHz to 2700 MHz

RF Driver Amplifier

FUNCTIONAL BLOCK DIAGRAM

GND

(2)

ADL5320

1

RF

IN

BIAS

2 3

GND RF

OUT

Figure 1.

ADL5320

The ADL5320 is fabricated on a GaAs HBT process. The device is packaged in a low cost SOT-89 that uses an exposed paddle for excellent thermal impedance. It operates from −40°C to

+85°C, and a fully populated evaluation board is available.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

One Technology Way, P.O. Box 9106, Norwood, MA 02062−9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113 www.analog.com

©2008 Analog Devices, Inc. All rights reserved.

ADL5320

TABLE OF CONTENTS

Features .............................................................................................. 1

Functional Block Diagram .............................................................. 1

General Description ......................................................................... 1

Revision History ............................................................................... 2

Specifications ..................................................................................... 3

Typical Scattering Parameters ..................................................... 4

Absolute Maximum Ratings ............................................................ 5

ESD Caution .................................................................................. 5

Pin Configuration and Function Descriptions ............................. 6

REVISION HISTORY

2/08—Revision 0: Initial Version

Typical Performance Characteristics ..............................................7

Basic Layout Connections ............................................................. 11

Soldering Information and Recommended PCB Land

Pattern .......................................................................................... 11

Matching Procedure ................................................................... 12

W-CDMA ACPR Performance ................................................ 13

Evaluation Board ............................................................................ 14

Outline Dimensions ....................................................................... 16

Ordering Guide .......................................................................... 16

Rev. 0 | Page 2 of 16

SPECIFICATIONS

VSUP = 5 V and T

A

= 25°C, unless otherwise noted.

Table 1.

Parameter

OVERALL FUNCTION

Frequency Range

FREQUENCY = 880 MHz

Gain

1

vs. Frequency vs. Temperature vs. Supply

Output 1 dB Compression Point

Output Third-Order Intercept

Noise Figure

FREQUENCY = 2140 MHz

Gain 1

vs. Frequency vs. Temperature vs. Supply

Output 1 dB Compression Point

Output Third-Order Intercept

Noise Figure

FREQUENCY = 2600 MHz

Gain 1

vs. Frequency vs. Temperature vs. Supply

Output 1 dB Compression Point

Output Third-Order Intercept

Noise Figure

POWER INTERFACE

Supply Voltage

Supply Current

Conditions

±50 MHz

−40°C ≤ T

A

≤ +85°C

4.75 V to 5.25 V

∆f = 1 MHz, P

OUT

= 10 dBm per tone

±50 MHz

−40°C ≤ T

A

≤ +85°C

4.75 V to 5.25 V

∆f = 1 MHz, P

OUT

= 10 dBm per tone

±100 MHz

−40°C ≤ T

A

≤ +85°C

4.75 V to 5.25 V

∆f = 1 MHz, P

OUT

= 10 dBm per tone

Pin RF

OUT vs. Temperature −40°C ≤ T

A

≤ +85°C

Power Dissipation VSUP = 5 V

1 Guaranteed maximum and minimum specified limits on this parameter are based on 6 sigma calculations.

ADL5320

4.5

Min

400

±0.6

±1.1

±0.1

27.4

37

5.1

5

104

±6.0

520

±0.33

±0.8

±0.06

25.7

42

4.4

Typ

±0.3

±0.6

±0.1

25.4

45

4.1

Max

2700

Unit

MHz

5.5

124 dB dB dB dBm dBm dB

V mA mA mW dB dB dB dBm dBm dB dB dB dB dBm dBm dB

Rev. 0 | Page 3 of 16

ADL5320

TYPICAL SCATTERING PARAMETERS

VSUP = 5 V and T

A

= 25°C; the effects of the test fixture have been de-embedded up to the pins of the device.

Table 2.

Freq (MHz)

S11 S21 S12 S22

Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°) Magnitude (dB) Angle (°)

400 −1.51 164.18 +128.37 160.94

500 −1.38 155.33 +118.16 156.73

550 −1.42 151.34 +112.76 154.66

600 −1.46 147.66 +108.71 152.89

650 −1.46 144.12 +104.05 151.08

700 −1.50 140.66 +98.89 149.38

750 −1.56 137.19 13.21 +95.44 −31.12 −11.14 −4.02 147.87

800

850

900

950

1000

1050

1100

−1.61

−1.66

−1.72

−1.85

−1.92

−2.02

−2.20

133.97 13.29

130.74 13.04

127.65 13.03

124.15 12.92

120.90 12.93

117.54 12.92

114.21 12.76

+90.33 −31.00

+86.67 −30.60

+81.59 −30.72

+77.91 −30.31

+73.13 −30.22

+68.80 −29.98

+64.12 −29.80

−13.96 −4.07

−14.90 −4.12

−17.78 −4.21

−20.23 −4.25

−22.21 −4.27

−24.19 −4.32

−28.18 −4.37

146.36

144.94

143.60

142.41

141.31

140.51

139.63

1150

1200

1250

1300

1350

1400

1450

1500

−2.41

−2.62

−2.87

−3.16

−3.65

−4.09

−4.59

−5.28

110.72 12.97

107.22 12.69

103.77 12.98

99.97 12.87

96.51 12.94

92.23 12.87

88.76 13.04

84.62 13.00

+59.95 −29.39

+54.62 −29.46

+50.95 −29.03

+44.96 −28.75

+40.47 −28.81

+35.36 −28.26

+30.47 −28.43

+24.40 −28.13

−29.56 −4.43

−33.00 −4.42

−37.13 −4.47

−38.18 −4.44

−44.64 −4.45

−46.78 −4.40

−49.56 −4.37

−56.47 −4.29

138.68

138.09

137.74

137.08

136.77

136.49

136.43

135.79

1550

1600

−6.09

−6.98

80.71 12.89

77.02 13.13

+19.39 −27.96

+14.80 −27.98

−59.31 −4.20

−62.71 −4.05

135.63

135.39

1650 −8.06 72.69 +7.27 −69.93 134.43

1700 −9.38 68.92 +2.17 −73.80 133.76

1750 −11.15 66.21 −3.27 −77.79 132.94

1800 −13.20 63.18 −9.57 −85.28 131.04

1850 −15.83 63.73 13.03 −17.27 −27.36 −89.22 −3.11 129.62

1900 −19.87 71.29 12.84 −22.35 −27.40 −96.30 −2.93 127.46

1950 −24.51 103.69 −29.10 −102.96 124.63

2000 −22.66 156.61 −36.58 −109.25 122.53

2050 −18.02 171.65 −43.14 −117.37 118.78

2100 −14.34 174.52 −51.83 −124.60 115.97

2150 −12.10 172.15 −55.83 −132.56 112.52

2200 −10.23 166.81 −67.28 −141.32 108.19

2250 −8.65 160.58 −73.99 −149.30 104.65

2300 −7.90 153.80 −79.82 −161.50 100.98

2350 −6.66 145.88 −91.28 −165.89 96.52

2400 −6.35 138.01 −96.39 +179.97 92.52

2450

2500

2550

2600

2650

2700

−5.77

−5.51

−5.35

−5.15

−5.22

−5.06

128.87 10.36

118.44 9.65

112.21 9.46

99.40

92.84

82.21

7.99

7.70

6.61

−108.43 −30.13

−110.92 −30.41

−122.10 −32.29

−130.39 −31.60

−132.72 −33.19

−143.64 −33.61

+170.82 −3.03

+163.00 −3.24

+152.20 −3.41

+138.60 −3.55

+135.12 −3.80

+120.22 −3.93

88.07

83.25

79.98

73.08

69.85

63.87

Rev. 0 | Page 4 of 16

ABSOLUTE MAXIMUM RATINGS

Table 3.

Supply Voltage, VSUP

Input Power (50 Ω Impedance)

6.5 V

20 dBm

Internal Power Dissipation (Paddle Soldered) 683 mW

θ

JC

(Junction to Paddle)

Maximum Junction Temperature

Operating Temperature Range

Storage Temperature Range

28.5°C/W

150°C

−40°C to +85°C

−65°C to +150°C

Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ADL5320

Rev. 0 | Page 5 of 16

ADL5320

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

RF

IN

1

GND

2

ADL5320

TOP VIEW

(Not to Scale)

(2)

GND

RF

OUT

3

Figure 2. Pin Configuration

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1 RF

IN

RF Input. Requires a dc blocking capacitor.

2 GND Ground. Connect to a low impedance ground plane.

3 RF

OUT

Exposed Paddle

RF Output and Supply Voltage. DC bias is provided to this pin through an inductor that is connected to the external power supply. RF path requires a dc blocking capacitor.

Expose Paddle. Internally connected to GND. Solder to a low impedance ground plane.

Rev. 0 | Page 6 of 16

TYPICAL PERFORMANCE CHARACTERISTICS

35

30

25

20

50

45

40

OIP3 (10dBm)

P1dB

15

10

GAIN

5

NF

0

800 820 840 860 880 900

FREQUENCY (MHz)

920 940 960

Figure 3. Gain, P1dB, OIP3, and Noise Figure vs. Frequency,

800 MHz to 960 MHz

17.0

16.5

16.0

15.5

15.0

14.5

19.0

18.5

18.0

17.5

+85°C

+25°C

–40°C

14.0

800 820 840 860 880 900

FREQUENCY (MHz)

920 940 960

Figure 4. Gain vs. Frequency and Temperature, 800 MHz to 960 MHz

–27.0

–27.5

–28.0

–28.5

–25.0

–25.5

–26.0

–26.5

S12

S22

S11

–29.0

700 750 800 850 900

FREQUENCY (MHz)

950

–40

1000

Figure 5. Input Return Loss (S11), Output Return Loss (S22), and Reverse

Isolation (S12) vs. Frequency, 800 MHz to 960 MHz

–20

–25

–30

–35

0

–5

–10

–15

42

38

34

50

45

40

35

OIP3 (+25°C)

30

OIP3 (–40°C)

29

OIP3 (+85°C)

28

27

30 26

P1dB (–40°C)

25

P1dB (+85°C)

25

P1dB (+25°C)

20

800 820 840 860 880 900

FREQUENCY (MHz)

920 940 960

24

Figure 6. OIP3 and P1dB vs. Frequency and Temperature,

800 MHz to 960 MHz

50

930MHz

46

880MHz

960MHz

850MHz

830MHz

ADL5320

30

–2 0 2 4 6 8 10 12 14 16 18 20 22

P

OUT

(dBm)

Figure 7. OIP3 vs. P

OUT

and Frequency, 800 MHz to 960 MHz

5.0

4.5

4.0

3.5

3.0

7.0

6.5

6.0

5.5

+85°C

+25°C

–40°C

2.5

2.0

700 750 800 850 900

FREQUENCY (MHz)

950 1000

Figure 8. Noise Figure vs. Frequency and Temperature, 800 MHz to 960 MHz

Rev. 0 | Page 7 of 16

ADL5320

45

20

15

10

30

25

40

35

OIP3 (10dBm)

P1dB

GAIN

5

NF

0

2060 2080 2100 2120 2140 2160

FREQUENCY (MHz)

2180 2200 2220

Figure 9. Gain, P1dB, OIP3, and Noise Figure vs. Frequency,

2060 MHz to 2200 MHz

16

15

14

13

12

11

–40°C

+25°C

+85°C

10

2060 2080 2100 2120 2140 2160

FREQUENCY (MHz)

2180 2200 2220

Figure 10. Gain vs. Frequency and Temperature, 2060 MHz to 2200 MHz

–23

–24

–25

–26

–27

–28

S12

S22

S11

–20

–25

–30

–35

0

–5

–10

–15

–29

1900 1950 2000 2050 2100 2150

FREQUENCY (MHz)

2200 2250

–40

2300

Figure 11. Input Return Loss (S11), Output Return Loss (S22), and Reverse

Isolation (S12) vs. Frequency, 2060 MHz to 2200 MHz

45 29.0

43

OIP3 (–40°C)

28.5

41

28.0

OIP3 (+85°C)

OIP3 (+25°C) 27.5

39

27.0

37

P1dB (–40°C)

26.5

35

26.0

33

25.5

31 P1dB (+25°C)

25.0

P1dB (+85°C)

29

2060 2080 2100 2120 2140 2160

FREQUENCY (MHz)

2180 2200 2220

24.5

Figure 12. OIP3 and P1dB vs. Frequency and Temperature,

2060 MHz to 2200 MHz

43

2190MHz

41

2060MHz

2140MHz

2090MHz

39

2220MHz

37

35

33

31

–2 0 2 4 6 8 10 12 14 16 18 20 22

P

OUT

(dBm)

Figure 13. OIP3 vs. P

OUT

and Frequency, 2060 MHz to 2200 MHz

6.0

5.5

5.0

4.5

8.0

7.5

7.0

6.5

4.0

3.5

3.0

2.5

2.0

1900 1950

–40°C

+85°C

+25°C

2000 2050 2100 2150

FREQUENCY (MHz)

2200 2250

Figure 14. Noise Figure vs. Frequency and Temperature,

2060 MHz to 2200 MHz

2300

Rev. 0 | Page 8 of 16

12

11

10

14

13

30

25

40

35

20

15

10

OIP3 (10dBm)

P1dB

GAIN

5

NF

0

2500 2520 2540 2560 2580 2600 2620 2640

FREQUENCY (MHz)

2660 2680 2700

Figure 15. Gain, P1dB, OIP3, and Noise Figure vs. Frequency,

2500 MHz to 2700 MHz

15

–40°C

+25°C

+85°C

9

2500 2550 2600

FREQUENCY (MHz)

2650 2700

Figure 16. Gain vs. Frequency and Temperature, 2500 MHz to 2700 MHz

0 –25.0

–25.5

–26.0

–26.5

–27.0

–27.5

–28.0

–28.5

–29.0

–29.5

–30.0

2400 2450

S12

S22

2500 2550 2600 2650

FREQUENCY (MHz)

S11

2700

–5

–10

–15

–20

–25

–30

–35

–40

2750 2800

Figure 17. Input Return Loss (S11), Output Return Loss (S22), and Reverse

Isolation (S12) vs. Frequency, 2500 MHz to 2700 MHz

ADL5320

40

38

44

42

36

34

32

39

38

37

OIP3 (–40°C)

36

OIP3 (+85°C)

35

34

33

32

31

30

29

2500

P1dB (+85°C)

2550 2600

OIP3 (+25°C)

P1dB (–40°C)

P1dB (+25°C)

FREQUENCY (MHz)

2650

32

31

30

29

28

27

26

25

2700

Figure 18. OIP3 and P1dB vs. Frequency and Temperature,

2500 MHz to 2700 MHz

46

2700MHz

2600MHz

2500MHz

30

–3 –1 1 3 5 7 9 11 13 15 17 19 21 23

P

OUT

(dBm)

Figure 19. OIP3 vs. P

OUT

and Frequency, 2500 MHz to 2700 MHz

4.5

4.0

3.5

3.0

2.5

2.0

2400

8.0

7.5

7.0

6.5

6.0

5.5

5.0

+85°C

+25°C

–40°C

2450 2500 2550 2600 2650

FREQUENCY (MHz)

2700 2750 2800

Figure 20. Noise Figure vs. Frequency and Temperature,

2500 MHz to 2700 MHz

Rev. 0 | Page 9 of 16

ADL5320

10

8

6

4

18

16

14

12

2

0

42.0

42.8

43.6

44.4

45.2

OIP3 (dBm)

46.0

46.8

Figure 21. OIP3 Distribution at 880 MHz

47.6

60

30

20

50

40

10

0

24.4

24.8

25.2

25.6

P1dB (dBm)

26.0

26.4

Figure 22. P1dB Distribution at 880 MHz

26.8

20

15

30

25

10

5

0

16.65

16.75

16.85

16.95

GAIN (dB)

17.05

17.15

Figure 23. Gain Distribution at 880 MHz

17.25

30

20

50

40

10

0

3.80

3.88

3.96

4.04

NF (dB)

4.12

4.20

Figure 24. Noise Figure Distribution at 880 MHz

4.28

105

100

95

90

120

115

110

5.25V

5.0V

4.75V

85

80

–40 –30 –20 –10 0 10 20 30 40 50 60 70 80

TEMPERATURE (°C)

Figure 25. Supply Current vs. Supply Voltage and Temperature (Using

880 MHz Matching Components)

Rev. 0 | Page 10 of 16

BASIC LAYOUT CONNECTIONS

The basic connections for operating the ADL5320 are shown in

Figure 26.

Table 5 lists the required matching components. Capacitors C1,

C2, C3, C4, and C7 are Murata GRM155 series (0402 size) and

Inductor L1 is a Coilcraft 0603CS series (0603 size). For all frequency bands, the placement of C3 and C7 are critical. From

2300 MHz to 2700 MHz, the placement of C2 is also important.

Table 6 lists the recommended component placement for

various frequencies.

A 5 V dc bias is supplied through L1 which is connected to

RF

OUT

(Pin 3). In addition to C4, 10 nF and 10 μF power supply decoupling capacitors are also required. The typical current consumption for the ADL5320 is 110 mA.

GND

VSUP

RF

IN

C1 1

λ1

2

C3

1

(2)

C6 10µF

C5 10nF

C4

1

1

ADL5320

2 3

λ2

2

L1

1

λ3 2 λ4 2

C2

1

C7

1

RF

OUT

1

SEE TABLE 5 FOR FREQUENCY SPECIFIC COMPONENTS.

2

SEE TABLE 10 FOR RECOMMENDED COMPONENT SPACING.

Figure 26. Basic Connections

SOLDERING INFORMATION AND RECOMMENDED

PCB LAND PATTERN

Figure 27 shows the recommended land pattern for the ADL5320.

To minimize thermal impedance, the exposed paddle on the

SOT-89 package underside is soldered down to a ground plane along with Pin 2. If multiple ground layers exist, they should be stitched together using vias. For more information on land pattern design and layout, refer to the Application Note AN-772,

A Design and Manufacturing Guide for the Lead Frame Chip

Scale Package (LFCSP).

1.80mm

5.56mm

0.20mm

3.48mm

ADL5320

Table 5. Recommended Components for Basic Connections

Frequency (MHz)

450 to 500

800 to 960

C1 (pF)

100

47

C2 (pF)

100

47

1805 to 1880

1930 to 1990

2110 to 2170

2300 to 2400

2500 to 2700

22

22

22

12

12

22

22

22

2.2

1.0

Table 6. Matching Component Spacing

Frequency (MHz)

450 to 500

800 to 960

1805 to 2170

2300 to 2400

2500 to 2700

λ1 (mils)

391

200

300

225

142

λ2 (mils)

75

75

75

75

75

C3 (pF)

18

6.8

0.5

0.5

0.5

1.2

1.8

0.86mm

0.62mm

1.50mm

3.00mm

Figure 27. Recommended Land Pattern

1.27mm

C4 (pF)

100

100

22

22

22

12

12

λ3 (mils)

364

100

175

125

89

C7 (pF)

6.8

2.2

1.5

1.5

1.5

1.0

0.5

λ4 (mils)

50

350

275

125

75

L1 (nH)

47

47

15

15

15

15

15

Rev. 0 | Page 11 of 16

ADL5320

MATCHING PROCEDURE

The ADL5320 is designed to achieve excellent gain and IP3 performance. To achieve this, both input and output matching networks must present specific impedance to the device. The

matching components listed in Table 6 were chosen to provide

−10 dB input return loss while maximizing OIP3. The load-pull

plots (Figure 28, Figure 29, and Figure 30) show the load

impedance points on the Smith chart where optimum OIP3, gain, and output power can be achieved. These load impedance values (that is, the impedance that the device sees when looking

into the output matching network) are listed in Table 7 and

Table 8 for maximum gain and maximum OIP3, respectively.

The contours show how each parameter degrades as it is moved away from the optimum point.

From the data shown in Table 7 and Table 8 it becomes clear that

maximum gain and maximum OIP3 do not occur at the same impedance. This can also be seen on the load-pull contours in

Figure 28 through Figure 30. Thus, output matching generally

involves compromising between gain and OIP3. In addition, the load-pull plots demonstrate that the quality of the output impedance match must be compromised to optimize gain and/or OIP3. In most applications where line lengths are short and where the next device in the signal chain presents a low input return loss, compromising on the output match is acceptable.

To adjust the output match for operation at a different frequency or if a different trade-off between OIP3, gain, and output impedance is desired, the following procedure is recommended.

For example, to optimize the ADL5320 for optimum OIP3 and gain at 700 MHz use the following steps:

1. Install the recommended tuning components for a 800 MHz to 960 MHz tuning band, but do not install C3 and C7.

2. Connect the evaluation board to a vector network analyzer so that input and output return loss can be viewed simultaneously.

3. Starting with the recommended values and positions for

C3 and C7, adjust the positions of these capacitors along the transmission line until the return loss and gain are acceptable. Push-down capacitors that are mounted on small sticks can be used in this case as an alternative to soldering. If moving the component positions does not yield satisfactory results, then the values of C3 and C7 should be increased or decreased (most likely increased in this case as the user is tuning for a lower frequency).

Repeat the process.

4. Once the desired gain and return loss are realized, OIP3 should be measured. Most likely, it will be necessary to go back and forth between return loss/gain and OIP3 measurements (probably compromising most on output return loss) until an acceptable compromise is achieved.

Rev. 0 | Page 12 of 16

Figure 28. Load-Pull Contours, 880 MHz

Figure 29. Load-Pull Contours, 2140 MHz

Figure 30. Load-Pull Contours, 2600 MHz

Table 7. Load Conditions for Gain

MAX

Frequency (MHz)

880

2140

2600

ΓLoad

(Magnitude) ΓLoad (°) Gain

MAX

(dB)

0.5147

0.6611

0.5835

159.88

134.40

133.80

17.76

13.78

12.36

ADL5320

The ADL5320 achieves an ACPR of −82 dBc at 0 dBm output, at which point device noise and not distortion is beginning to dominate the power in the adjacent channels. At an output power of 10 dBm, ACPR is still very low at −70 dBc making the device particularly suitable for PA driver applications.

–30

Table 8. Load Conditions for IP3

MAX

ΓLoad

Frequency (MHz) (dBm)

880 0.4156 46.29

2140 0.5035 42.72

2600 0.4595 43.01

W-CDMA ACPR PERFORMANCE

Figure 31 shows a plot of adjacent channel power ratio (ACPR)

vs. P

OUT

for the ADL5320. The signal type being used is a single

W-CDMA carrier (Test Model 1−64) at 2140 MHz. This signal is generated by a very low ACPR source. ACPR is measured at the output by a high dynamic range spectrum analyzer, which incorporates an instrument noise correction function.

–40

–50

–60

–70

–80

–90

–20 –15 –10 –5 0

P

OUT

(dBm)

5 10 15 20

Figure 31. ACPR vs. P

OUT

, Single Carrier W-CDMA (Test Model 1−64) at 2140

MHz Evaluation Board

Rev. 0 | Page 13 of 16

ADL5320

EVALUATION BOARD

The schematic of the ADL5320 evaluation board is shown in

Figure 32. This evaluation board uses 25 mil wide traces and is

made from FR4 material. The evaluation board comes tuned for operation in the 1805 MHz to 2140 MHz tuning band. Tuning

options for other frequency bands are also provided in Table 9.

The recommended placement for these components is provided

in Table 10. The inputs and outputs should be ac-coupled with

appropriately sized capacitors. DC bias is provided to the amplifier via an inductor connected to the RF

OUT

pin. A bias voltage of 5 V is recommended.

GND VSUP

C6 10µF

(2)

C5 10nF

C4 22pF

ADL5320

RF

IN

C1

22pF

λ1

C3

0.5pF

1 2

3

λ2

L1

15nH

λ3 λ4

C2

22pF

C7

1.5pF

Figure 32. Evaluation Board, 1805 MHz to 2170 MHz

RF

OUT

C1

22pF

C3

0.5pF

Table 9. Evaluation Board Configuration Options

Component Function

C1, C2 AC coupling capacitors

C4, C5, C6 Power supply bypassing capacitors

450 MHz to 500 MHz 800 MHz to 960 MHz

0402, 100 pF 0402, 47 pF

1805 MHz to

2170 MHz

(Default

Configuration)

0402, 22pF

C4 = 0603 100 pF

C5 = 0603 10 nF

C6 = 1206 10 μF

C4 = 0603 100 pF

C5 = 0603 10 nF

C6 = 1206 10 μF

0603, 47 nH

C4 = 0402 22pF

C5 = 0603 10 nF

C6 = 1206 10 μF

0603, 15 nH

C3, C7 inductor

Tuning capacitors

R1

VSUP, GND Power supply connections

C3 = 0402 18 pF

C7 = 0402 6.8 pF

VSUP red test loop, GND black test loop

C3 = 0402 6.8 pF

C7 = 0402 2.2 pF

VSUP red test loop, GND black test loop

C3 = 0402 0.5 pF

C7 = 0402 1.5 pF

VSUP red test loop, GND black test loop

2300 MHz to

2400 MHz

C1= 0402 12 pF

C2 = 0402 2.2 pF

C4 = 0603 12 pF

C5 = 0603 10 nF

C6 = 1206 10 μF

0603, 15 nH

C3 = 0402 1.2 pF

C7 = 0402 1.0 pF

R1 = 0402 0 Ω

VSUP red test loop, GND black test loop

10uF

10nF

22pF

15nH

C7

1.5pF

C2

22pF

Figure 33. Evaluation Board Layout and Default Component Placement for

Operation from 1805 MHz to 2170 MHz

2500 MHz to

2700 MHz

C1 = 0402 12 pF

C2 = 0402 1.0 pF

C4 = 0603 12 pF

C5 = 0603 10 nF

C6 = 1206 10 μF

0603, 15 nH

C3 = 0402 1.8 pF

C7 = 0402 0.5 pF

R1 = 0402 0 Ω

VSUP red test loop, GND black test loop

Table 10. Recommended Component Spacing on Evaluation Board

Frequency (MHz)

450 to 500

800 to 960

λ1 (mils)

391

200

1805 to 2170

2300 to 2400

2500 to 2700

300

225

142

λ2 (mils)

75

75

75

75

75

λ3 (mils)

364

100

175

125

89

λ4 (mils)

50

350

275

125

75

Rev. 0 | Page 14 of 16

C1

100pF

C3

18pF

10uF

47nH

10nF

100pF

C2

100pF

C7

6.8pF

ADL5320

C1

12pF

C3

1.2pF

C7

1pF

15nH

10uF

10nF

12pF

C2

2.2pF

R1 0Ω

Figure 34. Evaluation Board Layout and Component Placement

450 MHz to 500 MHz Operation

C1

47pF

C3

6.8pF

10uF

47nH

C7

2.2pF

10nF

100pF

C2

47pF

Figure 36. Evaluation Board Layout and Component Placement

2300 MHz to 2400 MHz Operation

C1

12pF

C3

1.8pF

10uF

10nF

12pF

C7

0.5pF

15nH

C2

1.0pF

R1 0Ω

Figure 35. Evaluation Board Layout and Component Placement

800 MHz to 960 MHz Operation

Figure 37. Evaluation Board Layout and Component Placement

2500 MHz to 2700 MHz Operation

Rev. 0 | Page 15 of 16

ADL5320

OUTLINE DIMENSIONS

*1.55 REF

4.25

3.94

1

(2)

2 3

2.60

2.30

1.50 TYP

1.20

0.90

3.00 TYP

4.60

4.40

1.60

1.40

0.44

0.35

*0.58

0.40

*0.52

0.32

END VIEW

*COMPLIANT TO JEDEC STANDARDS TO-243 WITH

EXCEPTION TO DIMENSIONS INDICATED BY AN ASTERISK.

Figure 38. 3−Lead Small Outline Transistor Package [SOT-89]

(RK-3)

Dimensions shown in millimeters

ORDERING GUIDE

Model

ADL5320ARKZ-R7

1

ADL5320-EVALZ

1

1

Z = RoHS Compliant Part.

Temperature Range

−40°C to +85°C

Package Description

3-Lead SOT-89, 7“ Tape and Reel

Package Option

RK-3

©2008 Analog Devices, Inc. All rights reserved. Trademarks and

registered trademarks are the property of their respective owners.

D05840-0-2/08(0)

Rev. 0 | Page 16 of 16

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