MAX7320

MAX7320

19-3879; Rev 0; 10/05

EVALUATION KIT

AVAILABLE

I

2

C Port Expander with Eight Push-Pull Outputs

General Description

The MAX7320 2-wire serial-interfaced peripheral features eight push-pull outputs with selectable power-up logic states.

The +5.5V tolerant RST input clears the serial interface, terminating any I

2

C

† communication to or from the

MAX7320.

The MAX7320 uses two address inputs with four-level logic to allow 16 I

2

C slave addresses. The slave address also determines the power-up state level for the outputs in groups of four ports.

The MAX7320 supports hot insertion. The serial interface SDA, SCL, AD0, AD2, and RST remain high impedance in power-down (V+ = 0V) with up to +6V asserted on them.

The MAX7320 is one device in a family of pin-compatible port expanders with a choice of input ports, open-drain

I/O ports, and push-pull output ports (see Table 1).

The MAX7320 is available in 16-pin QSOP and 16-pin

TQFN packages, and is specified over the automotive temperature range (-40°C to +125°C).

Cell Phones/PDAs

Satellite Radios

Notebooks

Applications

Automotive

RAID

Servers

Features

400kHz, +5.5V-Tolerant I

2

C Serial Interface

+1.71V to +5.5V Operating Voltage

Eight Push-Pull Output Ports with Selectable

Power-Up Logic States

♦ RST Clears the Serial Interface, Terminating Any

Serial Transaction to or from the MAX7320

AD0 and AD2 Inputs Select from 16 Slave

Addresses

Low 0.6µA (typ) Standby Current

-40°C to +125°C Temperature Range

Ordering Information

PART

MAX7320AEE+

TEMP

RANGE

-40°C to

+125°C

PIN-

PACKAGE

16 QSOP

MAX7320ATE+

-40°C to

+125°C

+Denotes lead-free package.

16 TQFN

3mm x 3mm x 0.8mm

TOP

MARK

ADB

Pin Configurations, Typical Application Circuit, and

Functional Diagram appear at end of data sheet.

PKG

CODE

E16-4

T1633-4

Selector Guide

PART INPUTS INTERRUPT MASK OPEN-DRAIN OUTPUTS PUSH-PULL OUTPUTS

MAX7319

MAX7320

MAX7321

MAX7322

8

Up to 8

4

Yes

Yes

Up to 8

8

4

MAX7323

MAX7328*

Up to 4 —

Up to 4 4

Up to 8 Up to 8

MAX7329** — —

*Second source to PCF8574.

**Second source to PCF8574A.

Purchase of I

2

C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I

2

C Patent Rights to use these components in an I

2

C system, provided that the system conforms to the I

2

C

Standard Specification as defined by Philips.

________________________________________________________________ Maxim Integrated Products 1

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

I

2

C Port Expander with Eight Push-Pull Outputs

ABSOLUTE MAXIMUM RATINGS

(All voltages referenced to GND.)

Supply Voltage V+....................................................-0.3V to +6V

SCL, SDA, AD0, AD2, RST .......................................-0.3V to +6V

O0–07...............................................................0.3V to V+ + 0.3V

00–07 Output Current .......................................................±25mA

SDA Input Current.............................................................. 10mA

Total V+ Current..................................................................50mA

Total GND Current ...........................................................100mA

Continuous Power Dissipation (T

A

= +70°C)

16-Pin QSOP (derate 8.3mW/°C over +70°C)..............667mW

16-Pin Thin QFN (derate 15.6mW/°C over +70°C) ....1250mW

Operating Temperature Range .........................-40°C to +125°C

Junction Temperature ......................................................+150°C

Storage Temperature Range .............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

(V+ = +1.71V to +5.5V, T

A

= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T

A

= +25°C.) (Note 1)

PARAMETER

Operating Supply Voltage

Power-On Reset Voltage

Standby Current Voltage

(Interface Idle)

Supply Current

(Interface Running)

Input High-Voltage

SDA, SCL, AD0, AD2, RST

Input Low-Voltage

SDA, SCL, AD0, AD2, RST

Input Leakage Current

SDA, SCL, AD0, AD2, RST

Input Capacitance

SDA, SCL, AD0, AD2, RST

SYMBOL

V+

V

POR

I

STB

I+

V

IH

V

IL

I

IH

, I

IL

CONDITIONS

SCL and SDA and other digital inputs at V+ f

SCL

= 400kHz; other digital inputs at V+

V+ < 1.8V

V+

≥ 1.8V

V+ < 1.8V

V+

≥ 1.8V

SDA, SCL, AD0, AD2, RST, O0–O7 at V+ or

GND

MIN

1.71

0.8 x V+

0.7 x V+

-0.2

TYP

0.6

23

10

MAX UNITS

5.50

V

1.6

V

1.5

55

0.2 x V+

0.3 x V+

+0.2

µA

µA

V

V

µA pF

Output Low Voltage

O0–O7

Output High Voltage

O0–O7

Output Low Voltage SDA

V

OL

V+ = +1.71V, I

SINK

= 1mA

V+ = +2.5V, I

SINK

= 2mA

V+ = +3.3V, I

SINK

= 3mA

V+ = +5V, I

SINK

= 5mA

V

OH

V+ = +1.71V, I

SOURCE

= 1mA

V+ = +2.5V, I

SOURCE

= 2mA

V+ = +3.3V, I

SOURCE

= 3mA

V+ = +5V, I

SOURCE

= 5mA

V

OLSDA

I

SINK

= 6mA

120

140

170

220

V+ - 250 V+ - 130

V+ - 350 V+ - 200

V+ - 290 V+ - 150

V+ - 380 V+ - 230

240

280

310

380

250 mV mV mV

2 _______________________________________________________________________________________

I

2

C Port Expander with Eight Push-Pull Outputs

PORT AND TIMING CHARACTERISTICS

(V+ = +1.71V to +5.5V, T

A

= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T

A

= +25°C.) (Note 1)

PARAMETER

Port Output Data Valid

SYMBOL

t

PPV

C

L

≤ 100pF

CONDITIONS MIN TYP MAX

4

UNITS

µs

TIMING CHARACTERISTICS

(V+ = +1.71V to +5.5V, T

A

= -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, T

A

= +25°C.) (Note 1)

PARAMETER

Serial Clock Frequency

Bus Free Time Between a STOP and a START Condition

Hold Time (Repeated) START

Condition

Repeated START Condition

Setup Time

STOP Condition Setup Time

Data Hold Time

Data Setup Time

SCL Low to Data Out Valid

SCL Clock Low Period

SCL Clock High Period

Rise Time of Both SDA and SCL

Signals, Receiving

Fall Time of Both SDA and SCL

Signals, Receiving

Fall Time of SDA Transmitting

SYMBOL

f

SCL t

BUF t

HD, STA t

SU, STA t

SU, STO t

HD, DAT

(Note 3) t

SU, DAT t

VD, DAT

SCL low to SDA output valid t

LOW t

HIGH t

R t

F t

F,TX t

SP

(Notes 2, 4)

(Notes 2, 4)

(Notes 2, 4)

(Note 5)

CONDITIONS MIN

1.3

0.6

0.6

0.6

100

1.3

0.7

TYP

20 +

0.1C

b

20 +

0.1C

b

20 +

0.1C

b

50

MAX

400

0.9

3.4

300

300

250

UNITS

kHz

µs

µs

µs

µs

µs ns

µs

µs

µs ns ns ns ns Pulse Width of Spike Suppressed

Capacitive Load for Each Bus

Line

RST Pulse Width

RST Rising to START Condition

Setup Time

C b t

W t

RST

(Note 2)

500

1

400 pF ns

µs

Note 1: All parameters tested at T

A

= +25°C. Specifications over temperature are guaranteed by design.

Note 2: Guaranteed by design.

Note 3: A master device must provide a hold time of at least 300ns for the SDA signal (referred to V

IL of the SCL signal) to bridge the undefined region of SCL’s falling edge.

Note 4: C b

= total capacitance of one bus line in pF. t

R and t

F measured between 0.3 x V+ and 0.7 x V+, I

SINK

≤ 6mA.

Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns.

_______________________________________________________________________________________ 3

I

2

C Port Expander with Eight Push-Pull Outputs

Typical Operating Characteristics

(T

A

= +25°C, unless otherwise noted.)

STANDBY CURRENT vs. TEMPERATURE

2.0

1.8

1.6

1.4

1.2

1.0

0.8

V+ = +2.5V

V+ = +3.3V

f

SCL

= 0kHz

V+ = +5.0V

0.6

0.4

0.2

V+ = +1.71V

0

-40 -25 -10 5 20 35 50 65 80 95 110 125

TEMPERATURE (

°C)

OUTPUT VOLTAGE LOW

vs. TEMPERATURE

0.50

0.45

0.40

0.35

0.30

0.25

0.20

V+ = +5.0V

I

SINK

= 5mA

I

V+ = +2.5V

SINK

= 2mA

V+ = +3.3V

I

SINK

= 3mA

0.15

0.10

0.05

V+ = +1.71V

I

SINK

= 1mA

0

-40 -25 -10 5 20 35 50 65 80 95 110 125

TEMPERATURE (

°C)

60

50

SUPPLY CURRENT vs. TEMPERATURE

f

SCL

= 400kHz

V+ = +5.0V

40

30

V+ = +3.3V

20

V+ = +2.5V

10

V+ = +1.71V

0

-40 -25 -10 5 20 35 50 65 80 95 110 125

TEMPERATURE (

°C)

OUTPUT VOLTAGE HIGH vs. TEMPERATURE

4

3

6

5

V+ = +5.0V

I

SOURCE

= 5mA

V+ = +3.3V

I

SOURCE

= 3mA

2

1

I

V+ = +2.5V

SOURCE

= 2mA

V+ = +1.71V

I

SOURCE

= 1mA

0

-40 -25 -10 5 20 35 50 65 80 95 110 125

TEMPERATURE (

°C)

Pin Description

QSOP

PIN

TQFN

1, 3 15, 1

2 16

4–7, 9–12 2–5, 7–10

8

13

14

15

16

6

11

12

13

14

EP

NAME

AD0, AD2

RST

O0–O7

GND

N.C.

SCL

SDA

V+

EP

FUNCTION

Address Inputs. Select device slave address with AD0 and AD2. Connect AD0 and AD2 to either GND, V+, SCL, or SDA to give four logic combinations (see Table 3).

Reset Input, Active Low. Drive RST low to clear the 2-wire interface.

Output Ports. O0 to O7 are push-pull outputs.

Ground

No Connection. Not internally connected.

I

2

C-Compatible Serial Clock Input

I

2

C-Compatible Serial Data I/O

Positive Supply Voltage. Bypass V+ to GND with a 0.047µF ceramic capacitor.

Exposed Pad. Connect exposed pad to GND.

4 _______________________________________________________________________________________

I

2

C Port Expander with Eight Push-Pull Outputs

Detailed Description

MAX7319–MAX7329 Family Comparison

The MAX7319–MAX7323 family consists of five pincompatible, eight-port expanders. Each version is optimized for different applications. The MAX7328 and

MAX7329 are second sources to the PCF8574 and

PCF8574A.

The MAX7324–MAX7327 family consists of four pincompatible, 16-port expanders that integrate the functions of the MAX7320 and one of either the MAX7319,

MAX7321, MAX7322, or MAX7323.

Functional Overview

The MAX7320 is a general-purpose port expander operating from a +1.71V to +5.5V supply that provides eight push-pull output ports. The MAX7320 is rated to sink a total of 100mA and source a total of 50mA from all eight combined outputs.

The MAX7320 is set to one of 16 I

2

C slave addresses

(0x50 to 0x5F) using address select inputs AD0 and AD2, and is accessed over an I

2

C serial interface up to

400kHz. Note the MAX7320 offers a different range of I

2

C slave addresses than the MAX7319, MAX7321,

MAX7322, and MAX7323 (these expanders use the address range 0x60 to 0x6F).

Table 1. MAX7319–MAX7329 Family Comparison

PART

I

2

C

SLAVE

ADDRESS

INPUTS

8-PORT EXPANDERS

INPUT

INTERRUPT

MASK

OPEN-

DRAIN

OUTPUTS

PUSH-

PULL

OUTPUTS

MAX7319

MAX7320

MAX7321

MAX7322

110xxxx

101xxxx

110xxxx

110xxxx

8

Up to 8

4

Yes

Yes

Up to 8

8

4

APPLICATION

Input-only versions:

Eight input ports with programmable latching transition detection interrupt and selectable pullups.

Offers maximum versatility for automatic input monitoring. An interrupt mask selects which inputs cause an interrupt on transitions, and transition flags identify which inputs have changed (even momentarily) since the ports were last read.

Output-only versions:

Eight push-pull outputs with selectable power-up default states.

Push-pull outputs offer faster rise time than opendrain outputs, and require no pullup resistors.

I/O versions:

Eight open-drain I/O ports with latching transition detection interrupt and selectable pullups.

Open-drain outputs can level shift the logic-high state to a higher or lower voltage than V+ using external pullup resistors. Any port can be used as an input by setting the open-drain output to logic-high.

Transition flags identify which inputs have changed

(even momentarily) since the ports were last read.

Four input-only, four output-only versions:

Four input ports with programmable latching transition detection interrupt and selectable pullups.

Four push-pull outputs with selectable power-up default levels.

_______________________________________________________________________________________ 5

I

2

C Port Expander with Eight Push-Pull Outputs

Table 1. MAX7319–MAX7329 Family Comparison (continued)

PART

I

2

C

SLAVE

ADDRESS

INPUTS

INPUT

INTERRUPT

MASK

OPEN-

DRAIN

OUTPUTS

PUSH-

PULL

OUTPUTS

MAX7323 110xxxx Up to 4

MAX7328

MAX7329

0100xxx

0111xxx

Up to 8

Up to 4

Up to 8

4

APPLICATION

Four I/O, four output-only versions:

Four open-drain I/O ports with latching transition detection interrupt and selectable pullups.

Four push-pull outputs with selectable power-up default levels.

PCF8574-, PCF8574A-compatible versions:

Eight open-drain I/O ports with nonlatching transition detection interrupt and pullups on all ports.

All ports power up as inputs (or logic-high outputs).

Any port can be used as an input by setting the open-drain output to logic-high.

16-PORT EXPANDERS

MAX7324

MAX7325

MAX7326

101xxxx and

110xxxx

MAX7327

8

Up to 8

4

Up to 4

Yes

Yes

Up to 8

Up to 4

8

8

12

12

Software equivalent to a MAX7320 plus a MAX7321.

Software equivalent to a MAX7320 plus a MAX7319.

Software equivalent to a MAX7320 plus a MAX7322.

Software equivalent to a MAX7320 plus a MAX7323.

Table 2. Read and Write Access to Eight-Port Expander Family

PART

MAX7319

MAX7320

MAX7321

MAX7322

MAX7323

MAX7328

MAX7329

I

2

C SLAVE

ADDRESS

INPUTS

INTERRUPT

MASK

110xxxx

101xxxx

110xxxx

110xxxx

110xxxx

0100xxx

0111xxx

8

Up to 8

4

Up to 4

Up to 8

Up to 8

Yes

Yes

OPEN-

DRAIN

OUTPUTS

Up to 8

Up to 4

Up to 8

Up to 8

PUSH-

PULL

OUTPUTS

I

2

C DATA WRITE

8

4

<I7–I0 interrupt mask>

<O7–O0 port outputs>

<P7–P0 port outputs>

<O7, O6 outputs,

I5–I2 interrupt mask, O1, O0 outputs>

4 <port outputs>

I

2

C DATA READ

<I7–I0 port inputs>

<I7–I0 transition flags>

<O7-O0 port inputs>

<P7–P0 port inputs>

<P7–P0 transition flags>

<O7, O6, I5–I2, O1, O0 port inputs>

<0, 0, I5–I2 transition flags,

0, 0>

<O7, O6, P5–P2, O1, O0 port inputs>

<0, 0, P5-P2 transition flags,

0, 0>

<P7–P0 port outputs>

<P7–P0 port outputs>

<P7–P0 port inputs>

<P7–P0 port inputs>

6 _______________________________________________________________________________________

I

2

C Port Expander with Eight Push-Pull Outputs

Table 3. MAX7320 Address Map

PIN

CONNECTION

AD2

SCL

SCL

SCL

SCL

SDA

SDA

SDA

SDA

GND

GND

GND

GND

V+

V+

V+

V+

AD0

GND

V+

SCL

SDA

GND

V+

SCL

SDA

GND

V+

SCL

SDA

GND

V+

SCL

SDA

A5

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

0

A6

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

DEVICE ADDRESS

A4

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

1

A3

0

0

0

0

0

0

1

1

1

1

1

1

1

1

0

0

A2

0

0

0

0

1

1

1

1

0

0

1

1

0

0

1

1

The RST input clears the serial interface in case of a hung bus, terminating any serial transaction to or from the MAX7320.

When the MAX7320 is read through the serial interface, the actual logic states at the ports are read back.

Output port power-up logic states are selected by the address select inputs AD0 and AD2. Ports default to logic-high or logic-low on power-up in groups of four

(see Table 3).

RST Input

The RST input voids any I

2

C transaction involving the

MAX7320 and forces the MAX7320 into the I

2

C STOP condition. A reset does not change the contents of the output register. RST is overvoltage tolerant to +5.5V.

Standby Mode

When the serial interface is idle, the MAX7320 automatically enters standby mode, drawing minimal supply current.

Slave Address and Power-Up

Default Logic States

Address inputs AD0 and AD2 determine the MAX7320 slave address and set the power-up output logic states.

Power-up logic states are set in groups of four (see

Table 3). The MAX7320 uses a different range of slave

A1

0

0

1

1

0

0

0

0

1

1

1

1

0

0

1

1

A0

0

1

0

1

0

1

0

1

0

1

0

1

0

1

0

1

O7

1

1

1

1

1

1

1

1

0

0

1

1

0

0

1

1

O6

1

1

1

1

1

1

1

1

0

0

1

1

0

0

1

1

O4

1

1

1

1

1

1

1

1

0

0

1

1

0

0

1

1

OUTPUTS POWER-UP DEFAULT

O5

1

1

1

1

1

1

1

1

0

0

1

1

0

0

1

1

O3

0

1

1

1

0

1

0

1

1

1

1

1

0

1

1

1

O2

0

1

1

1

0

1

0

1

1

1

1

1

0

1

1

1

O1

0

1

1

1

0

1

0

1

1

1

1

1

0

1

1

1 addresses (101xxxx) than the MAX7319, MAX7321,

MAX7322, and MAX7323 (110xxxx).

The MAX7320 slave address is determined on each I

2

C transmission, regardless of whether the transmission is actually addressing the MAX7320. The MAX7320 distinguishes whether address inputs AD0 and AD2 are connected to SDA or SCL instead of fixed logic levels V+ or GND during this transmission. This means that the

MAX7320 slave address can be configured dynamically in the application without cycling the device supply.

On initial power-up, the MAX7320 cannot decode the address inputs AD0 and AD2 fully until the first I

2

C transmission. AD0 and AD2 initially appear to be connected to V+ or GND. This is important because the address selection determines the power-up logic levels of the output ports. However, at power-up, the I

2

C SDA and SCL bus interface lines are high impedance at the pins of every device (master or slave) connected to the bus, including the MAX7320. This is guaranteed as part of the I

2

C specification. Therefore, address inputs AD0 and AD2 that are connected to SDA or SCL normally appear at power-up to be connected to V+. The powerup output state selection logic uses AD0 to select the power-up state for ports O3–O0, and uses AD2 to select the power-up state for ports O7–O4. The rule is that a logic-high, SDA, or SCL connection selects a

O0

0

1

1

1

0

1

0

1

1

1

1

1

0

1

1

1

_______________________________________________________________________________________ 7

I

2

C Port Expander with Eight Push-Pull Outputs

SDA t

SU,STA t

BUF t

SU,DAT t

HD,STA t

LOW t

HD,DAT t

SU,STO

SCL t

HD,STA t

HIGH t

R t

F t

VD,DAT

REPEATED START CONDITION START CONDITION STOP

CONDITION

START

CONDITION

Figure 1. 2-Wire Serial-Interface Timing Details

logic-high power-up state, and a logic-low selects a logic-low power-up state for each set of four ports (see

Table 3). The output power-up logic level configuration is correct for a standard I

2

C configuration, where SDA or SCL appear to be connected to V+ by the external

I

2

C pullups.

There are circumstances where the assumption that

SDA = SCL = V+ on power-up is not true; for example, in true hot-swap applications in which there is legitimate bus activity during power-up. Also, if SDA and

SCL are terminated with pullup resistors to a different supply voltage than the MAX7320’s supply, and if that pullup supply rises later than the MAX7320’s, then SDA or SCL may appear at power-up to be connected to

GND. In such applications, use the four address combinations that are selected by connecting address inputs

AD0 and AD2 to GND or V+ (shown in bold in Table 3).

These selections are guaranteed to be correct at power-up, independent of SDA and SCL behavior. If one of the other 12 address combinations is used, be aware that unexpected port power-up default states may occur until the first I

2

C transmission (to any device, not necessarily the MAX7320).

Port Outputs

Write one byte to the MAX7320 to set all output port states simultaneously.

Serial Interface

Serial-Addressing

The MAX7320 operates as a slave that sends and receives data through an I

2

C interface. The interface uses a serial data line (SDA) and a serial clock line

(SCL) to achieve bidirectional communication between master(s) and slave(s). A master initiates all data trans-

SDA

SCL

S

START

CONDITION

P

STOP

CONDITION

Figure 2. START and STOP Conditions

fers to and from the MAX7320, and generates the SCL clock that synchronizes the data transfer (Figure 1).

SDA operates as both an input and an open-drain output.

A pullup resistor, 4.7k

Ω (typ), is required on SDA. SCL operates only as an input. A pullup resistor, 4.7k

Ω (typ), is required on SCL if there are multiple masters on the 2wire interface, or if the master in a single-master system has an open-drain SCL output.

Each transmission consists of a START condition sent by a master, followed by the MAX7320’s 7-bit slave address plus R/W bit, one or more data bytes, and finally a STOP condition (Figure 2).

START and STOP Conditions

Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, the master issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 2).

Bit Transfer

One data bit is transferred during each clock pulse.

The data on SDA must remain stable while SCL is high

(Figure 3).

8 _______________________________________________________________________________________

I

2

C Port Expander with Eight Push-Pull Outputs

Acknowledge

The acknowledge bit is a clocked 9th bit the recipient uses to acknowledge receipt of each byte of data

(Figure 4). Each byte transferred effectively requires 9 bits. The master generates the ninth clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, such that the SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the MAX7320, the device generates the acknowledge bit because the MAX7320 is the recipient. When the MAX7320 is transmitting to the master, the master generates the acknowledge bit because the master is the recipient.

Slave Address

The MAX7320 has a 7-bit slave address (Figure 5). The

8th bit following the 7-bit slave address is the R/W bit. It is low for a write command, and high for a read command.

The 1st (A6), 2nd (A5), and 3rd (A4) bits of the

MAX7320 slave address are always 1, 0, and 1.

Connect AD0 and AD2 to GND, V+

,

SDA, or SCL to select the slave address bits A3, A2, A1, and A0. The

MAX7320 has 16 possible slave addresses (Table 3), allowing up to 16 MAX7320 devices on an I

2

C bus.

Note the MAX7320 offers a different range of I

2

C slave addresses from the MAX7319, MAX7321, MAX7322 and

MAX7323, for which 1st (A6), 2nd (A5), and 3rd (A4) bits of the slave address are always 1, 1, and 0.

Accessing the MAX7320

A single-byte read from the MAX7320 returns the status of the eight output ports, read back as inputs.

A 2-byte read repeatedly returns the status of the eight output ports, read back as inputs.

A multibyte read (more than 2 bytes before the I

2

C

STOP bit) repeatedly returns the status of the eight output ports, read back as inputs.

A single-byte write to the MAX7320 sets the logic state of all eight outputs.

A multibyte write to the MAX7320 repeatedly sets the logic state of all eight outputs.

Reading from the MAX7320

A read from the MAX7320 starts with the master transmitting the MAX7320’s slave address with the R/W bit set high. The MAX7320 acknowledges the slave address, and samples the logic state of the output ports during the acknowledge bit. The master can read one or more bytes from the MAX7320 and then issue a

STOP condition (Figure 6). The MAX7320 transmits the

SDA

SCL

DATA LINE STABLE;

DATA VALID

CHANGE OF DATA

ALLOWED

Figure 3. Bit Transfer

SCL

START

CONDITION

SDA BY

TRANSMITTER

SDA BY

RECEIVER S

1 2

CLOCK PULSE

FOR ACKNOWLEDGMENT

8 9

Figure 4. Acknowledge

current port data, read back from the actual port outputs (not the port output latches) during the acknowledge. If a port is forced to a logic state other than its programmed state, the read back reflects this. If driving a capacitive load, readback port level verification algorithms may need to take the RC rise/fall time into account.

Typically, the master reads one byte from the MAX7320, then issues a STOP condition (Figure 6). However, the master can read 2 or more bytes from the MAX7320, then issue a STOP condition. In this case, the MAX7320 resamples the port outputs during each acknowledge and transmits the new data each time.

Writing to the MAX7320

A write to the MAX7320 starts with the master transmitting the MAX7320’s slave address with the R/W bit set low. The MAX7320 acknowledges the slave address and samples the ports during the acknowledge bit. The master can transmit one or more bytes of data. The

MAX7320 acknowledges each subsequent byte of data and updates the output ports until the master issues a

STOP condition (Figure 7).

_______________________________________________________________________________________ 9

I

2

C Port Expander with Eight Push-Pull Outputs

SDA

SCL

1

MSB

Figure 5. Slave Address

0 1 A3 A2 A1 A0

LSB

R/W ACK

PORT SNAPSHOT DATA

O7 O6 O5 O4

DATA 1

O3 O2 O1 O0

S 1 0 1 MAX7320 SLAVE ADDRESS 1

R/W

A D7 D6 D5 D4 D3 D2 D1 D0

PORT SNAPSHOT TAKEN PORT SNAPSHOT TAKEN

N

P

ACKNOWLEDGE

FROM MASTER

SCL

S = START CONDITION

P = STOP CONDITION

SHADED = SLAVE TRANSMISSION

N = NOT ACKNOWLEDGE

Figure 6. Reading the MAX7320

SCL

SDA

S

1 2 3 4 5 6 7 8

SLAVE ADDRESS

START CONDITION

0 A

R/

W ACKNOWLEDGE

FROM SLAVE

DATA TO PORT

DATA 1

DATA OUT

FROM PORT

A

DATA TO PORT

DATA 2 A t

PPV

ACKNOWLEDGE

FROM SLAVE

DATA 1 VALID t

PPV

ACKNOWLEDGE

FROM SLAVE

DATA 2 VALID

Figure 7. Writing to the MAX7320

10 ______________________________________________________________________________________

I

2

C Port Expander with Eight Push-Pull Outputs

Functional Block Diagram

V+

AD0

AD2

SCL

SDA

INPUT

FILTER

I

2

C

CONTROL

OUTPUT

PORTS

O7

O6

O5

O4

O3

O2

O1

O0

RST

POWER-

ON RESET

MAX7320

GND

Applications Information

Hot Insertion

SDA, SCL, AD0, AD2, and RST are overvoltage protected to +6V independent of V+. This allows the MAX7320 to be operated from a lower supply voltage, such as

+3.3V, while the I

2

C interface is driven from a higher logic level, such as +5V.

Each of the output ports, O0–O7, has a protection diode to V+ and to GND (Figure 8). When a port output is driven to a voltage higher than V+ or lower than

GND, the appropriate protection diode clamps the output to a diode drop above V+ or below GND. When the

MAX7320 is powered down (V+ = 0V), each output port appears as a diode connected to GND (Figure 8).

Power-Supply Considerations

The MAX7320 operates with a supply voltage of +1.71V

to +5.5V over the -40°C to +125°C temperature range.

Bypass V+ to GND with a ceramic capacitor of at least

0.047µF as close to the device as possible. For the TQFN version, additionally connect the exposed pad to GND.

MAX7320

Figure 8. Output Port Structure

V+ V+

PORT

______________________________________________________________________________________ 11

I

2

C Port Expander with Eight Push-Pull Outputs

Compatibility with MAX6965, MAX7315, and MAX7316

The MAX7320 is subset pin compatible with the

MAX6965, MAX7315, and MAX7316. The pin differences are shown in Table 4. The MAX7320 is not software compatible with MAX6965, MAX7315, or

MAX7316. In many cases it is possible to design a PC board to work with all these port expanders, providing design flexibility.

Table 4. MAX7320, MAX6965, MAX7315, and MAX7316 Pin Compatibility

PIN-PACKAGE

16

QSOP

1

2

3

16

TQFN

15

16

1

MAX7320

AD0

RST

AD2

PIN FUNCTION

MAX7315

AD0

AD1

AD2

MAX6965 AND

MAX7316

BLINK

RST

AD0

Pin Configurations

TOP VIEW

SDA

13

V+

14

AD0 15

RST

16

12 11 10 9

*EP

MAX7320

1 2 3 4

8

O5

7

O4

6

GND

5 O3

TQFN

3mm x 3mm x 0.8mm

*EXPOSED PAD. CONNECT TO GND.

μC

SCL

SDA

RST

Typical Application Circuit

+3.3V

47nF

V+

SCL

SDA

RST

MAX7320

AD0

AD2

GND

O7

O6

O5

O4

O3

O2

O1

O0

OUTPUT

OUTPUT

OUTPUT

OUTPUT

OUTPUT

OUTPUT

OUTPUT

OUTPUT

PROCESS: BiCMOS

Connect EP to GND

AD0

1

RST 2

AD2 3

O0 4

O1 5

O2 6

O3 7

GND 8

MAX7320

QSOP

16 V+

15 SDA

14 SCL

13 N.C.

12 O7

11 O6

10 O5

9 O4

Chip Information

12 ______________________________________________________________________________________

I

2

C Port Expander with Eight Push-Pull Outputs

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to

www.maxim-ic.com/packages

.)

MARKING

E/2

E

D

D/2

AAAA

(NE - 1) X e

(ND - 1) X e e

D2/2

D2 k

L

E2

E2/2 b 0.10 M C A B

0.10 C

A

0.08 C

A2

A1

L L e e

PACKAGE OUTLINE

8, 12, 16L THIN QFN, 3x3x0.8mm

21-0136 I

1

2

PKG

REF.

A b

D

E e

L

N

ND

NE

A1

A2 k

MIN.

8L 3x3

NOM. MAX.

MIN.

12L 3x3

NOM. MAX.

0.70

0.75

2.90

3.00

0.35

0.65 BSC.

0.55

8

2

0

2

0.02

0.25

0.20 REF

-

0.80

0.25

0.30

0.35

2.90

3.00

3.10

3.10

0.75

0.05

-

0.70

0.20

2.90

0.75

0.25

3.00

0.80

0.30

3.10

2.90

0.45

3.00

0.50 BSC.

0.55

3.10

0.65

12

3

0

3

0.02

0.25

0.20 REF

-

0.05

-

MIN.

16L 3x3

NOM.

MAX.

0.70

0.20

2.90

0.75

0.25

3.00

0.80

0.30

3.10

2.90

3.00

3.10

0.30

0.50 BSC.

0.40

0.50

16

4

0

4

0.02

0.25

0.20 REF

-

0.05

-

PKG.

CODES

TQ833-1

T1233-1

T1233-3

T1233-4

T1633-2

T1633F-3

T1633FH-3

T1633-4

T1633-5

MIN.

0.25

0.95

0.95

0.95

0.95

0.65

0.65

0.95

0.95

EXPOSED PAD VARIATIONS

D2 E2

PIN ID

NOM.

0.70

1.10

1.10

1.10

MAX.

1.25

1.25

1.25

1.25

MIN.

0.25

0.95

0.95

0.95

NOM.

0.70

1.10

1.10

1.10

MAX.

1.25

1.25

1.25

1.10

0.80

0.80

1.10

1.10

1.25

0.95

0.95

1.25

1.25

0.95

0.65

0.65

0.95

0.95

1.10

0.80

0.80

1.10

1.10

1.25

1.25

0.95

0.95

1.25

1.25

0.35 x 45

°

0.35 x 45

°

0.35 x 45

°

0.35 x 45

°

0.35 x 45

°

0.225 x 45

°

0.225 x 45

°

0.35 x 45

°

0.35 x 45

°

JEDEC

WEEC

WEED-1

WEED-1

WEED-1

WEED-2

WEED-2

WEED-2

WEED-2

WEED-2

NOTES:

1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.

2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.

3. N IS THE TOTAL NUMBER OF TERMINALS.

4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO

JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED

WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR

MARKED FEATURE.

5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm

FROM TERMINAL TIP.

6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.

7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.

8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS .

9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.

10. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.

11. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY.

12. WARPAGE NOT TO EXCEED 0.10mm.

PACKAGE OUTLINE

8, 12, 16L THIN QFN, 3x3x0.8mm

21-0136 I

2

2

______________________________________________________________________________________ 13

I

2

C Port Expander with Eight Push-Pull Outputs

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to

www.maxim-ic.com/packages

.)

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