MAX17083

MAX17083
19-4458; Rev 0; 2/09
Low-Voltage, Internal Switch,
Step-Down Regulator
Features
o Fixed-Frequency, Current-Mode Controller
o 2.4V to 5.5V Input Range
o Internal 5A Step-Down Regulator
The MAX17083 is a fixed-frequency, current-mode,
step-down regulator optimized for low-voltage, lowpower applications. This regulator features dual internal
n-channel MOSFET power switches for high efficiency
and reduced component count. External Schottky
diodes are not required. An integrated boost switch
eliminates the need for an external boost diode. The
internal 25mΩ low-side power MOSFET easily supports
continuous load currents up to 5A. The MAX17083 produces an adjustable 0.75V to 2.7V output voltage from
the system’s 3.3V or 5V input supply.
This step-down regulator uses a peak current-mode
control scheme to eliminate the additional external
compensation required by voltage-mode architectures,
providing an easy-to-implement architecture without
sacrificing fast transient response. The MAX17083 provides peak current-limit protection and operates in
light-load pulse-skipping mode to maintain high efficiency under light-load conditions.
Independent enable input and open-drain power-good
output allow flexible system power sequencing. The voltage soft-start gradually ramps up the output voltage
within a predictable time period, effectively limiting the
inrush current. The MAX17083 features output undervoltage, output overvoltage, and thermal-fault protection.
o Internal BST Switch
o Fault Protection: Undervoltage, Overvoltage,
Thermal, Peak Current Limit
o Enable Input and Power-Good Output
o Voltage-Controlled Soft-Start
o High-Impedance Shutdown
o < 1µA (typ) Shutdown Current
Applications
Low-Power Architectures
Ultra-Mobile PCs
Netbook and Nettop PCs
Portable Gaming
Notebook and Subnotebook Computers
PDAs and Mobile Communicators
Ordering Information
The MAX17083 is available in a 24-pin 4mm x 4mm x
0.75mm TQFN package. The exposed backside pad
improves thermal characteristics.
PART
TEMP RANGE
PIN-PACKAGE
MAX17083ETG+
-40°C to +85°C
24 TQFN
+Denotes a lead(Pb)-free/RoHS-compliant package.
16
SET
17
EN
BST
18
VCC
LX
TOP VIEW
LX
Pin Configuration
15
14
13
12 FB
N.C. 19
11 N.C.
PGND 20
10 GND
PGND 21
MAX17083
PGND 22
PGND 23
3
4
5
6
IN
FREQ
POK
2
IN
1
LX
+
LX
N.C. 24
9
GND
8
GND
7
REF
TQFN
4mm x 4mm
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
MAX17083
General Description
MAX17083
Low-Voltage, Internal Switch,
Step-Down Regulator
ABSOLUTE MAXIMUM RATINGS
IN to PGND...............................................................-0.3V to +6V
VCC to GND ..............................................................-0.3V to +6V
EN to GND................................................................-0.3V to +6V
REF, FB, SET, FREQ, POK to GND ............-0.3V to (VCC + 0.3V)
LX to GND (Notes 1, 2) ................................-0.6V to (VIN + 0.3V)
BST to GND.........................................(VCC - 0.3V) to (VLX + 6V)
GND to PGND (Note 2) .........................................-0.3V to +0.3V
REF Short-Circuit Current......................................................1mA
Continuous Power Dissipation, Multilayer PCB (TA = +70°C)
24-Pin, 4mm x 4mm TQFN
(derate 27.8mW/°C above +70°C) ........................2222mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Note 1: LX has clamp diodes to PGND and IN. If continuous current is applied through these diodes, thermal limits must be observed.
Note 2: Measurements valid using 20MHz bandwidth limit.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = VFREQ = VCC = VEN = 5V, IREF = no load, TA = 0°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
SYMBOL
IN Input Voltage Range
VIN
VCC Input Voltage Range
VCC
CONDITIONS
MIN
TYP
2.4
4.5
MAX
UNITS
5.5
V
5.5
V
IN Undervoltage Threshold
No hysteresis
2.1
2.4
V
Vcc Undervoltage Threshold
Rising edge, 160mV hysteresis
4.2
4.5
V
Shutdown Supply Current
EN = GND, measured at VCC, TA = +25°C
0.1
1.0
μA
Supply Current
Regulator enabled
65
95
μA
1.25
1.26
V
3
10
mV
0.50
0.55
MHz
REFERENCE
Reference Output Voltage
VREF
Reference Load Regulation
No load
1.24
-1μA < IREF < +50μA
OSCILLATOR
Oscillator Frequency
f OSC
FREQ Settings
FREQ = GND
0.45
FREQ = VCC
1.50
FREQ = open
1.00
FREQ = REF
0.75
FREQ = GND
0.50
MHz
INTERNAL 5A STEP-DOWN CONVERTER
FB Regulation Voltage
(No Load)
FB Regulation Voltage
(Full Load)
2
VFB
VFB
No load
I OUT = 4A
SET = GND
0.754
0.765
0.774
SET = REF
1.107
1.122
1.136
SET = open
1.51
1.53
1.55
SET = 5V
1.812
1.836
SET = GND
0.72
0.774
SET = REF
1.07
1.136
SET = open
1.45
1.55
SET = 5V
1.76
1.86
_______________________________________________________________________________________
V
1.86
V
Low-Voltage, Internal Switch,
Step-Down Regulator
(Circuit of Figure 1, VIN = VFREQ = VCC = VEN = 5V, IREF = no load, TA = 0°C to +85°C, unless otherwise noted. Typical values are at
TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
FB Load Regulation
SET = GND
FB Line Regulation
(Slope Compensation)
SET = GND, 0 to 100% duty cycle,
VCC = 4.5V to 5.5V
FB Input Current
VFB
IFB
Internal MOSFET On-Resistance
(Note 3)
SET = GND, TA = +25°C
MIN
TYP
MAX
-4
10
-100
mV/A
15
20
mV
nA
-5
+100
High-side n-channel RDH
32
50
Low-side n-channel RDL
17
30
Internal BST On-Resistance
5
LX Idle Mode™ Trip Level
LX Zero-Crossing Trip Level
6
m
2
LX Peak Current Limit
UNITS
8
A
1.5
A
100
mA
ms
ms
Soft-Start Ramp Time
TSS
1939/
f SW
Soft-Start Fault Blanking Time
TSSLT
3232/
f SW
POK Upper Trip Threshold and
Overvoltage Fault Threshold
Rising edge, 50mV hysteresis
9
12
14
%
POK Lower Trip Threshold
Falling edge, 50mV hysteresis
-14
-12
-9
%
POK Propagation Delay Time
FB forced 50mV beyond POK trip threshold
5
μs
Overvoltage Fault Latch
Delay Time
FB forced 50mV above POK upper trip
threshold
5
μs
Undervoltage Fault Latch
Delay Time
FB forced 50mV below POK lower trip
threshold, TUV
1534/
f SW
ms
POK Output Low Voltage
I SINK = 3mA
POK Leakage Current
Thermal-Shutdown Threshold
t POK
I POK
T SHDN
SET = GND, FB = 1V (POK high impedance),
POK forced to 5.5V, TA = +25°C
Hysteresis = 15°C
0.4
V
1
μA
+160
°C
LOGIC INPUTS
EN Input High Threshold
Rising, hysteresis = 220mV (typ)
EN Input Bias Current
TA = +25°C
VCC
FREQ and SET Input Voltage
Levels
Open
REF
1.0
1.4
1.6
V
0.1
1
μA
3
3.2
V
1.2
2.2
VCC 0.5
GND
FREQ and SET Input Bias
Currents
TA = +25°C
0.5
-2
+0.1
+2
μA
Idle Mode is a trademark of Maxim Integrated Products, Inc.
_______________________________________________________________________________________
3
MAX17083
ELECTRICAL CHARACTERISTICS (continued)
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = VFREQ = VCC = VEN = 5V, IREF = no load, TA = -40°C to +85°C, unless otherwise noted. Typical values are
at TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
Shutdown Supply Current
EN = GND, measured at VCC, TA = +25°C
Supply Current
Regulator Enabled
Does not include switching losses, measured
from VCC
MAX
UNITS
10
μA
120
μA
1.145
1.265
V
4.35
8
A
REFERENCE
Reference Output Voltage
VREF
No load
INTERNAL 5A STEP-DOWN CONVERTER
LX Peak Current Limit
Note 3: Limits are 100% production tested at T A = +25°C. Maximum and minimum limits are guaranteed by design and
characterization.
Typical Operating Characteristics
(Circuit of Figure 1, VIN = 5V, VOUT = 1.1V, FREQ = open. TA = +25°C, unless otherwise noted.)
90
VOUT = 1.8V
80
VOUT = 1.1V
70
90
80
VOUT = 1.1V
70
0.1
LOAD CURRENT (A)
4
VOUT = 1.8V
1
10
50
0.001
VOUT = 1.5V
90
80
VOUT = 1.1V
70
VOUT = 0.75V
60
60
0.01
100
VOUT = 0.75V
VOUT = 0.75V
60
50
0.001
VOUT = 1.5V
MAX17083 toc03
100
MAX17083 toc02
VOUT = 1.5V
EFFICIENCY (%)
VOUT = 1.8V
MAX17083 toc01
100
EFFICIENCY vs. LOAD CURRENT
(VIN = 5V, 750kHz)
EFFICIENCY vs. LOAD CURRENT
(VIN = 3.3V, 1MHz)
EFFICIENCY (%)
EFFICIENCY vs. LOAD CURRENT
(VIN = 5V, 1MHz)
EFFICIENCY (%)
MAX17083
Low-Voltage, Internal Switch,
Step-Down Regulator
0.01
0.1
LOAD CURRENT (A)
1
10
50
0.001
0.01
0.1
LOAD CURRENT (A)
_______________________________________________________________________________________
1
10
Low-Voltage, Internal Switch,
Step-Down Regulator
SMPS OUTPUT VOLTAGE
vs. LOAD CURRENT (1MHz)
EFFICIENCY vs. LOAD CURRENT
(VIN = 3.3V, 750kHz)
VOUT = 1.5V
OUTPUT VOLTAGE (V)
EFFICIENCY (%)
90
80
VOUT = 1.1V
70
VOUT = 0.75V
0.77
VIN = 5V
0.76
VIN = 3.3V
0.75
60
50
0.001
0.78
MAX17083 toc05
VOUT = 1.8V
MAX17083 toc04
100
0.74
0.01
0.1
0
10
1
1
2
3
4
5
LOAD CURRENT (A)
LOAD CURRENT (A)
REGULATOR STARTUP WAVEFORM
(HEAVY LOAD)
REGULATOR STARTUP WAVEFORM
(NO LOAD)
MAX17083 toc06
EN
6
MAX17083 toc07
EN
POK
POK
OUT
OUT
IL
IL
LX
LX
400μs/div
fSW = 750kHz, VIN = 5V,
VOUT = 1.1V
EN: 5V/div
OUT: 1V/div
RLOAD = 0.22Ω
POK: 2V/div
IL: 5A/div
LX: 5V/div
400μs/div
fSW = 1MHz, VIN = 5V,
VOUT = 1.1V
EN: 5V/div
OUT: 1V/div
POK: 2V/div
IL: 5A/div
LX: 5V/div
_______________________________________________________________________________________
5
MAX17083
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 5V, VOUT = 1.1V, FREQ = open. TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(Circuit of Figure 1, VIN = 5V, VOUT = 1.1V, FREQ = open. TA = +25°C, unless otherwise noted.)
REGULATOR LOAD TRANSIENT
REGULATOR SHUTDOWN WAVEFORM
MAX17083 toc09
MAX17083 toc08
OUT
EN
OUT
LX
POK
IL
IL
LX
IOUT
20μs/div
100μs/div
LX: 5V/div
EN = high, VIN = VBIAS = 5V,
VOUT = 1.1V, 750kHz,
IL: 2A/div
LOAD TRANSIENT IS FROM 1A TO 4A IOUT: 2A/div
RLOAD = 0.55Ω
IL: 2A/div
LX: 5V/div
OUTPUT VOLTAGE DISTRIBUTION
SET = GND (FB = 0.754V)
15
6.0
5.6
0.760
0.759
0.758
0.757
0.756
0.755
0.754
0.753
0.752
0
0.751
5
0
0.750
5
5.2
10
4.8
10
20
4.4
15
25
4.0
20
30
3.6
25
SAMPLE SIZE = 100
3.2
30
TA = +85°C
TA = +25°C
LOAD REGULATION (mV/A)
OUTPUT VOLTAGE (V)
SAMPLE PERCENTAGE (%)
TA = +85°C
TA = +25°C
SAMPLE SIZE = 100
20
MAX17083 toc12
PEAK CURRENT-LIMIT DISTRIBUTION
25
15
10
7.50
7.30
7.10
6.90
6.70
6.50
6.30
6.10
5.90
5.70
0
5.50
5
PEAK CURRENT LIMIT (A)
6
_______________________________________________________________________________________
MAX17083 toc11
35
2.8
SAMPLE SIZE = 100
2.0
TA = +85°C
TA = +25°C
SAMPLE PERCENTAGE (%)
35
LOAD REGULATION DISTRIBUTION
40
MAX17083 toc10
40
2.4
EN: 5V/div
OUT: 1V/div
POK: 2V/div
SAMPLE PERCENTAGE (%)
MAX17083
Low-Voltage, Internal Switch,
Step-Down Regulator
Low-Voltage, Internal Switch,
Step-Down Regulator
PIN
NAME
FUNCTION
1, 2, 17, 18
LX
Inductor Connection for the Internal 5A Step-Down Converter. Connect LX to the switched side of
the inductor.
3, 4
IN
Power Input Connection to the Drain of the Internal HS MOSFET. Bypass to PGND with a 10μF or
greater ceramic capacitor close to the IC to minimize parasitic inductance.
Four-Level Switching Frequency (f SW) Selection Pin
5
FREQUENCY PIN
SWITCHING FREQUENCY (MHz)
VCC
1.5
FREQ
OPEN
1.0
REF
0.75
GND
0.5
6
POK
Open-Drain Power-Good Output. POK is pulled low if FB is more than 12% (typ) above or below the
nominal regulation threshold. POK is held low during soft-start and in shutdown. POK becomes
high impedance when FB is in regulation.
7
REF
1.25V Reference Voltage Output. Bypass REF to analog ground with a 0.1μF ceramic capacitor.
The reference sources up to 50μA for external loads. Loading REF degrades output voltage
accuracy according to the REF load regulation error.
8, 9, 10
GND
Analog Ground
11, 19, 24
N.C.
No Connection
12
FB
Feedback Input for the Internal 5A Step-Down Converter. FB regulation level can be preset by the
SET pin.
Four-Level FB Threshold Selection Pin
13
FB THRESHOLD SELECTION PIN
VCC
FB REGULATION VOLTAGE (V)
OPEN
1.5
REF
1.1
GND
0.75
SET
1.8
14
VCC
5V Bias Supply Input for the Internal Switching Regulator Drivers. Bypass with a 1μF or greater
ceramic capacitor. Provides power for the BST driver supplies.
15
EN
Switching Regulator Enable Input. When EN is pulled low, LX is high impedance. When EN is
driven high, the controller enables the 5A internal switching regulator.
16
BST
Boost Flying Capacitor Connection for the Internal 5A Step-Down Converter. The MAX17083
includes an internal boost switch/diode connected between VCC and BST. Connect to an external
0.1μF ceramic capacitor as shown in Figure 1.
20–23
PGND
EP
GND
Power Ground
Ground. Connect the exposed backside pad to analog ground.
_______________________________________________________________________________________
7
MAX17083
Pin Description
MAX17083
Low-Voltage, Internal Switch,
Step-Down Regulator
VCC
IN
ON
SET
VCC
OPEN
REF
GND
FREQ
VCC
OPEN
REF
GND
FB REGULATION
VOLTAGE (V)
1.8
1.5
1.1
0.75
SWITCHING
FREQUENCY (MHz)
1.5
1.0
0.75
0.5
5V INPUT
COUT
2x 10μF
C1
1μF
OFF
EN
BST
SET
LX
CBST
0.1μF
L1
1μH
OUTPUT
1.1V AT 5A
COUT
220μF, 6mΩ
MAX17083
REF
FB
C3
0.1μF
VCC
(OPEN)
R4
100kΩ
FREQ
POK
GND (EP)
Figure 1. Standard Application Circuit
Detailed Description
The MAX17083 standard application circuit (Figure 1)
provides a single 1.1V/5A chipset supply. The
MAX17083 features a step-down switching regulator
with dual internal n-channel MOSFET power switches.
These step-down regulators use a fixed-frequency, current-mode control scheme compensated by the output
capacitor, providing an easy-to-implement architecture
without sacrificing fast transient response. These regulators also provide peak current-limit protection, and
operate pulse-skipping mode at light loads to maintain
high efficiency.
8
Independent enable input and open-drain power-good
output allow flexible system power sequencing. The
voltage soft-start gradually ramps up the output voltage
within a predictable time period and reduces inrush
current. The MAX17083 features outputs undervoltage,
output overvoltage, and thermal-fault protection.
Reference (REF)
The 1.25V reference is accurate to ±1% over temperature and load, making REF useful as a precision system
reference. Bypass REF to GND with a 0.1µF or greater
ceramic capacitor. The reference sources up to 50µA
and sinks 5µA to support external loads. If highly accurate specifications are required for the main SMPS output voltages, the reference should not be loaded.
Loading the reference slightly reduces the output voltage accuracy because of the reference load-regulation
error as defined in the Electrical Characteristics table.
_______________________________________________________________________________________
Low-Voltage, Internal Switch,
Step-Down Regulator
BST
MAX17083
POR
REF
MAX17083
VCC
REF
UVLO
UVLO
IN
FREQ
4 LVL DET
OSC
CLK
LX
EN
VCC
1.4V RISING
CONTROLLER
LOGIC
BLOCK
POK
PGND
ZX
ILIM_VALLEY
ILIM_PK
ISKIP
THERMAL
FAULT
+160°C
PWM
COMP
UV FAULT
TIMER
SET
4 LVL DET
FB
0V
COMP
1.12 x FB_INT
EA THR
FB_INT
UV
COMP
0.88 x FB_INT
Figure 2. MAX17083 Block Diagram
_______________________________________________________________________________________
9
MAX17083
Low-Voltage, Internal Switch,
Step-Down Regulator
SMPS Detailed Description
Fixed-Frequency,
Current-Mode PWM Controller
The heart of the current-mode PWM controller is a multistage, open-loop comparator that compares the output
voltage-error signal with respect to the reference voltage, the current-sense signal, and the slope compensation ramp (Figure 2). The MAX17083 uses a directsumming configuration, approaching ideal cycle-tocycle control over the output voltage without a traditional
error amplifier and the phase shift associated with it.
Frequency Selection (FREQ)
The FREQ input selects the PWM mode switching frequency. FREQ is a four-level input to set the regulator
switching frequency. The regulator’s switching frequency is set according to Table 1, and latched at the
beginning of soft-start. High-frequency (FREQ = VCC)
operation optimizes the application for the smallest
component size, trading off efficiency due to higher
switching losses. This might be acceptable in ultraportable devices where the load currents are lower.
Low-frequency (FREQ = GND) operation offers the best
overall efficiency at the expense of component size and
board space.
Table 1. MAX17083 FREQ Table
FREQ PIN
SELECT
SWITCHING
FREQ, fSW
SOFT-START
TIME (ms)
1833/fSW
STARTUP
BLANKING
TIME (ms)
3055/fSW
VCC
1.5MHz
1.22
2.0
Open
1MHz
1.83
3.1
REF
750kHz
2.44
4.1
GND
500kHz
3.67
6.1
FB Regulation Selection (SET)
The SET input selects one of the four preset feedback
regulation voltage levels. The SET pin is a four-level
input signal to set the FB regulation voltage. The regulator’s feedback regulation voltage is set according to
Table 2, and latched at the beginning of soft-start.
Table 2. MAX17083 SET Table
SET PIN SELECT
10
FB REGULATION VOLTAGE (V)
VCC
1.8
Open
1.5
REF
1.1
GND
0.75
Adjustable Output-Voltage Operation Mode
The MAX17083 produces an adjustable 0.75V to 2.7V
output voltage from the system’s 3.3V or 5V input supply by using a resistive feedback divider. Set FB to
0.75V (SET = GND) in adjustable mode.
Light-Load Operation
An inherent automatic switchover to pulse-skipping
(PFM operation) takes place at light loads. This
switchover is affected by a comparator that truncates
the low-side switch on-time at the inductor current’s
zero crossing. The zero-crossing comparator senses
the inductor current during the off-time. Once the current through the low-side MOSFET drops below 100mA,
the zero-crossing comparator, turns off the low-side
MOSFET. This prevents the inductor from discharging
the output capacitors and forces the switching regulator to skip pulses under light-load conditions to avoid
overcharging the output.
Idle-Mode Current-Sense Threshold
When MAX17083 operates in pulse-skipping mode, the
on-time of the step-down controller terminates when
both the output voltage exceeds the feedback threshold, and the current-sense voltage exceeds the idlemode current-sense threshold. Under light-load
conditions, the on-time duration depends solely on the
idle-mode current-sense threshold. This forces the controller to source a minimum amount of power with each
cycle. To avoid overcharging the output, another ontime cannot be initiated until the output voltage drops
below the feedback threshold. Since the zero-crossing
comparator prevents the switching regulator from sinking current, the MAX17083 switching regulator must
skip pulses. Therefore, the controller regulates the
valley of the output ripple under light-load conditions.
The minimum idle-mode current requirement causes
the threshold between pulse-skipping PFM operation
and constant PWM operation to coincide with the
boundary between continuous and discontinuous
inductor-current operation (also known as the critical
conduction point). The load-current level at which
PFM/PWM crossover occurs (ILOAD(SKIP)) is equivalent
to half the idle-mode current threshold (see the
Electrical Characteristics table for the idle-mode threshold of the regulator). The switching waveforms can
appear noisy and asynchronous at light-load pulseskipping operation, but this is a normal operating condition that results in high light-load efficiency.
Trade-offs in PFM noise and light-load efficiency are
made by varying the inductor value. Generally, low
inductor values produce a broader efficiency vs. load
______________________________________________________________________________________
Low-Voltage, Internal Switch,
Step-Down Regulator
SMPS POR, UVLO, and Soft-Start
Power-on reset (POR) occurs when VCC rises above
approximately 2.1V, resetting the undervoltage, overvoltage, and thermal-shutdown fault latches. The VCC
input undervoltage lockout (UVLO) circuitry prevents
the switching regulators from operating if the 5V bias
supply (VCC) is below its 4V UVLO threshold.
Soft-Startup
The internal step-down controller starts switching and the
output voltages ramp up using soft-start. If the bias supply
voltage drops below the UVLO threshold, the controller
stops switching and disables the drivers (LX becomes
high impedance) until the bias supply voltage recovers.
Once the 5V bias supply and IN rise above their respective input UVLO thresholds, and EN is pulled high, the
internal step-down controller becomes enabled and
begins switching. The internal voltage soft-starts gradually increment the feedback voltage by approximately
25mV every 61 switching cycles. Therefore, OUT reaches its nominal regulation voltage 1833/fSW after the regulator is enabled (see the Soft-Start Waveforms in the
Typical Operating Characteristics section).
SMPS Power-Good Output (POK)
POK is the open-drain output of the window comparator
that continuously monitors the output for undervoltage
and overvoltage conditions. POK is actively held low in
shutdown (EN = GND) and during soft-start. Once the
soft-start sequence terminates, POK becomes high
impedance as long as the output remains within ±10%
of the nominal regulation voltage set by FB. POK goes
low once the output drops 12% (typ) below or rises 12%
(typ) above its nominal regulation point, or the output is
shut down. For a logic-level POK output voltage, connect an external pullup resistor between POK and VCC.
A 100kΩ pullup resistor works well in most applications.
SMPS Fault Protection
Output Overvoltage Protection (OVP)
If the output voltage rises above 112% (typ) of its nominal regulation voltage, the controller sets the fault latch,
pulls POK low, shuts down the regulator, and immediately pulls the output to ground through its low-side
MOSFET. Turning on the low-side MOSFET with 100%
duty cycle rapidly discharges the output capacitors and
clamps the output to ground. However, this commonly
undamped response causes negative output voltages
due to the energy stored in the output LC at the instant
of 0V fault. If the load cannot tolerate a negative voltage,
place a power Schottky diode across the output to act
as a reverse-polarity clamp. If the condition that caused
the overvoltage persists (such as a shorted high-side
MOSFET), the input source also fails (short-circuit fault).
Cycle VCC below 1V or toggle the enable input to clear
the fault latch and restart the regulator.
Output Undervoltage Protection (UVP)
Each MAX17083 includes an output undervoltage
(UVP) protection circuit that begins to monitor the output once the startup blanking period has ended. If the
output voltage drops below 88% (typ) of its nominal
regulation voltage, the regulator pulls the POK output
low and begins the UVP fault timer. Once the timer
expires after 1600/fSW, the regulator shuts down, forcing the high-side off and disabling the low-side MOSFET once the zero-crossing threshold has been
reached. Cycle VCC below 1V, or toggle the enable
input to clear the fault latch and restart the regulator.
Thermal-Fault Protection
The MAX17083 features a thermal-fault protection
circuit. When the junction temperature rises above
+160°C (typ), a thermal sensor activates the fault latch,
pulls down the POK output, and shuts down the regulator. Toggle EN to clear the fault latch, and restart the
controllers after the junction temperature cools by
15°C (typ).
SMPS Design Procedure
(Step-Down Regulator)
Firmly establish the input voltage range and maximum
load current before choosing a switching frequency
and inductor operating point (ripple-current ratio). The
primary design trade-off lies in choosing a good switching frequency and inductor operating point, and the following four factors dictate the rest of the design:
• Input Voltage Range. The maximum value (VIN(MAX)),
and minimum value (VIN(MIN)) must accommodate
the worst-case conditions accounting for the input
voltage soars and drops. If there is a choice at all,
lower input voltages result in better efficiency.
•
Maximum Load Current. There are two values to
consider. The peak load current (ILOAD(MAX)) determines the instantaneous component stresses and filtering requirements and thus drives output-capacitor
selection, inductor-saturation rating, and the design of
the current-limit circuit. The continuous load current
______________________________________________________________________________________
11
MAX17083
curve, while higher values result in higher full-load efficiency (assuming that the coil resistance remains fixed)
and less output voltage ripple. Penalties for using higher inductor values include larger physical size and
degraded load-transient response (especially at low
input-voltage levels).
MAX17083
Low-Voltage, Internal Switch,
Step-Down Regulator
(ILOAD) determines the thermal stresses and thus drives the selection of input capacitors, MOSFETs, and
other critical heat-contributing components.
•
•
Switching Frequency. This choice determines the
basic trade-off between size and efficiency. The
optimal frequency is largely a function of maximum
input voltage due to MOSFET switching losses that
are proportional to frequency and the square of VIN.
The optimum frequency is also a moving target, due
to rapid improvements in MOSFET technology that
are making higher frequencies more practical.
Inductor Operating Point. This choice provides
trade-offs between size and efficiency, and
between transient response and output ripple. Low
inductor values provide better transient response
and smaller physical size, but also result in lower
efficiency and higher output ripple due to increased
ripple currents. The minimum practical inductor
value is one that causes the circuit to operate at the
edge of critical conduction (where the inductor current just touches zero with every cycle at maximum
load). Inductor values lower than this grant no further size-reduction benefit. The optimum operating
point is usually found between 20% and 50% of ripple current. When pulse skipping (at light loads),
the inductor value also determines the load-current
value at which PFM/PWM switchover occurs.
Step-Down Inductor Selection
The switching frequency and inductor operating point
determine the inductor value as follows:
L=
VOUT × ( VIN - VOUT )
VIN × fOSC × ILOAD(MAX) × LIR
Assuming 5A maximum load current, and an LIR of 0.3
yields:
V
× ( VIN - VOUT )
L = OUT
VIN × fOSC × 1.5
Find a low-loss inductor having the lowest possible DC
resistance that fits in the allotted dimensions. Most
inductor manufacturers provide inductors in standard
values, such as 1.0µH, 1.5µH, 2.2µH, 3.3µH, etc. Also
look for nonstandard values, which can provide a better
compromise in LIR across the input voltage range. If
using a swinging inductor (where the no-load inductance decreases linearly with increasing current), evaluate the LIR with properly scaled inductance values. For
12
the selected inductance value, the actual peak-to-peak
inductor ripple current (ΔIINDUCTOR) is defined by:
V
(V - V )
ΔIINDUCTOR = OUT IN OUT
VINfOSCL
Ferrite cores are often the best choice, although soft saturating molded core inductors are inexpensive and can
work well at 500kHz. The core must be large enough not
to saturate at the peak inductor current (IPEAK):
⎛ ΔI
⎞
IPEAK = ILOAD(MAX) + ⎜ INDUCTOR ⎟
⎝
⎠
2
SMPS Output-Capacitor Selection
The output filter capacitor selection requires careful
evaluation of several different design requirements—
stability, transient response, and output ripple voltage—that place limits on the output capacitance and
ESR. Based on these requirements, the typical application requires a low-ESR polymer capacitor (lower cost
but higher output-ripple voltage) or bulk ceramic
capacitors (higher cost but low output-ripple voltage).
SMPS Loop Compensation
Voltage positioning dynamically lowers the output voltage in response to the load current, reducing the loop
gain. This reduces the output capacitance requirement
(stability and transient) and output power dissipation
requirements as well. The load-line is generated by
sensing the inductor current through the high-side
MOSFET on-resistance, and is internally preset to
-5mV/A (typ). The load-line ensures that the output voltage remains within the regulation window over the fullload conditions.
The load line of the internal SMPS regulators also provides the AC ripple voltage required for stability. To
maintain stability, the output capacitive ripple must be
kept smaller than the internal AC ripple voltage, and
crossover must occur before the Nyquist pole occurs
(1 + duty)/(2fSW). Based on these loop requirements, a
minimum output capacitance can be determined from
the following:
⎛
⎞ ⎛ VREF ⎞ ⎛ VOUT ⎞
1
C OUT > ⎜
⎟⎜
⎟ 1 + V ⎟⎠
⎝ 2fSWR DROOP ⎠ ⎝ VOUT ⎠ ⎜⎝
IN
where RDROOP is 5mV/A as defined in the Electrical
Characteristics table and fSW is the switching frequency selected by the FREQ setting (see Table 1).
______________________________________________________________________________________
Low-Voltage, Internal Switch,
Step-Down Regulator
Then:
⎛C
ESR ⎞
C FB > ⎜ OUT
⎝ R FB ⎟⎠
where RFB is the parallel impedance of the FB resistive
divider.
SMPS Output Ripple Voltage
With polymer capacitors, the effective series resistance
(ESR) dominates and determines the output ripple voltage. The step-down regulator’s output ripple voltage
(V RIPPLE ) equals the total inductor ripple current
(ΔIINDUCTOR) multiplied by the output capacitor’s ESR.
Therefore, the maximum ESR to meet the output ripple
voltage requirement is:
⎤
⎡
VINfSWL
R ESR ≤ ⎢
⎥ VRIPPLE
⎢⎣ ( VIN - VOUT ) VOUT ⎥⎦
where fSW is the switching frequency. The actual capacitance value required relates to the physical case size
needed to achieve the ESR requirement, as well as to
the capacitor chemistry. Thus, polymer capacitor selection is usually limited by ESR and voltage rating rather
than by capacitance value. Alternatively, combining
ceramics (for the low ESR) and polymers (for the bulk
capacitance) helps balance the output capacitance vs.
output ripple voltage requirements.
Internal SMPS Transient Response
The load-transient response depends on the overall output impedance over frequency, and the overall amplitude
and slew rate of the load step. In applications with large,
fast load transients (load step > 80% of full load and slew
rate > 10A/µs), the output capacitor’s high-frequency
response—ESL and ESR—needs to be considered. To
prevent the output voltage from spiking too low under a
load-transient event, the ESR is limited by the following
equation (ignoring the sag due to finite capacitance):
⎛
⎞
VSTEP
R ESR ≤ ⎜
- R PCB ⎟
⎝ ΔILOAD(MAX)
⎠
where VSTEP is the allowed voltage drop, ΔILOAD(MAX) is
the maximum load step, and RPCB is the parasitic board
resistance between the load and output capacitor.
The capacitance value dominates the midfrequency
output impedance and continues to dominate the loadtransient response as long as the load transient’s slew
rate is fewer than two switching cycles. Under these
conditions, the sag and soar voltages depend on the
output capacitance, inductance value, and delays in
the transient response. Low inductor values allow the
inductor current to slew faster, replenishing charge
removed from or added to the output filter capacitors
by a sudden load step, especially with low differential
voltages across the inductor. The sag voltage (VSAG)
that occurs after applying the load current can be estimated by the following:
VSAG =
(
L ΔILOAD(MAX)
)2
2C OUT ( VIN × D MAX - VOUT )
+
ΔILOAD(MAX) ( T - ΔT )
C OUT
where D MAX is the maximum duty factor (see the
Electrical Characteristics table), T is the switching period
(1/fOSC), and ΔT equals VOUT/VIN x T when in PWM
mode, or L x IIDLE/(VIN - VOUT) when in pulse-skipping
mode. The amount of overshoot voltage (VSOAR) that
occurs after load removal (due to stored inductor energy)
can be calculated as:
VSOAR
2
ΔILOAD(MAX) ) L
(
≈
2C OUT VOUT
When using low-capacity ceramic filter capacitors,
capacitor size is usually determined by the capacity
needed to prevent VSOAR from causing problems during
load transients. Generally, once enough capacitance is
added to meet the overshoot requirement, undershoot at
the rising load edge is no longer a problem.
Input-Capacitor Selection
The input capacitor must meet the ripple current
requirement (IRMS) imposed by the switching currents.
The IRMS requirements of the regulator can be determined by the following equation:
⎛I
⎞
IRMS = ⎜ LOAD ⎟ VOUT ( VIN - VOUT )
⎝ VIN ⎠
The worst-case RMS current requirement occurs when
operating with VIN = 2VOUT. At this point, the above
equation simplifies to IRMS = 0.5 x ILOAD.
______________________________________________________________________________________
13
MAX17083
Additionally, an additional feedback pole—capacitor
from FB to analog ground (CFB)—might be necessary to
cancel the unwanted ESR zero of the output capacitor.
In general, if the ESR zero occurs before the Nyquist
pole, then canceling the ESR zero is recommended.
If:
⎛
⎞
1+ D
ESR > ⎜
⎟
⎝ 4πfSW C OUT ⎠
MAX17083
Low-Voltage, Internal Switch,
Step-Down Regulator
For the MAX17083 system (IN) supply, ceramic capacitors are preferred due to their resilience to inrush surge
currents typical of systems, and due to their low parasitic inductance, which helps reduce the high-frequency ringing on the IN supply when the internal MOSFETs
are turned off. Choose an input capacitor that exhibits
less than +10°C temperature rise at the RMS input current for optimal circuit longevity.
BST Capacitors
The boost capacitor (C BST) must be selected large
enough to handle the gate charging requirements of
the high-side MOSFETs. For these low-power applications, 0.1µF ceramic capacitors work well.
Applications Information
Operation above this maximum input voltage results in
pulse skipping to avoid overcharging the output. At the
beginning of each cycle, if the output voltage is still
above the feedback threshold voltage, the controller
does not trigger an on-time pulse, effectively skipping a
cycle. This allows the controller to maintain regulation
above the maximum input voltage, but forces the controller to effectively operate with a lower switching frequency. This results in an input threshold voltage at
which the controller begins to skip pulses (VIN(SKIP)):
⎛
⎞
1
VIN(SKIP) = VOUT ⎜
⎟
⎝ fOSCt ON(MIN) ⎠
where fOSC is the switching frequency selected by FREQ.
Duty-Cycle Limits
PCB Layout Guidelines
Minimum Input Voltage
The minimum input operating voltage (dropout voltage)
is restricted by the maximum duty-cycle specification
(see the Electrical Characteristics table). For the best
dropout performance, use the slowest switching frequency setting (FREQ = GND). However, keep in mind
that the transient performance gets worse as the stepdown regulators approach the dropout voltage, so bulk
output capacitance must be added (see the voltage
sag and soar equations in the SMPS Design Procedure
section). The absolute point of dropout occurs when the
inductor current ramps down during the off-time
(ΔIDOWN) as much as it ramps up during the on-time
(ΔI UP). This results in a minimum operating voltage
defined by the following equation:
Careful PCB layout is critical to achieving low switching
losses and clean, stable operation. The switching power
stage requires particular attention. If possible, mount all
the power components on the top side of the board,
with their ground terminals flush against one another.
Follow the MAX17083 Evaluation Kit layout and use the
following guidelines for good PCB layout:
•
Keep the high-current paths short, especially at the
ground terminals. This practice is essential for stable, jitter-free operation.
•
Keep the power traces and load connections short.
This practice is essential for high efficiency. Using
thick copper PCBs (2oz vs. 1oz) can enhance fullload efficiency by 1% or more. Correctly routing
PCB traces is a difficult task that must be
approached in terms of fractions of centimeters,
where a single milliohm of excess trace resistance
causes a measurable efficiency penalty.
•
When trade-offs in trace lengths must be made, it is
preferable to allow the inductor charging path to be
made longer than the discharge path. For example,
it is better to allow some extra distance between the
input capacitors and the high-side MOSFET than to
allow distance between the inductor and the lowside MOSFET or between the inductor and the output filter capacitor.
•
Route high-speed switching nodes (BST and LX)
away from sensitive analog areas (REF and FB).
⎛ 1
⎞
- 1⎟ ( VOUT + VDIS )
VIN(MIN) = VOUT + VCHG + h ⎜
D
⎝ MAX ⎠
where VCHG and VDIS are the parasitic voltage drops in
the charge and discharge paths, respectively. A reasonable minimum value for h is 1.5, while the absolute
minimum input voltage is calculated with h = 1.
Maximum Input Voltage
The MAX17083 controller includes a minimum on-time
specification, which determines the maximum input
operating voltage that maintains the selected switching
frequency (see the Electrical Characteristics table).
14
______________________________________________________________________________________
Low-Voltage, Internal Switch,
Step-Down Regulator
PROCESS: BiCMOS
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
24 TQFN-EP
T2444-4
21-0139
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
MAX17083
Chip Information
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