BQ2002F

BQ2002F
bq2002/F
NiCd/NiMH Fast-Charge Management ICs
Features
General Description
➤
Fast charge of nickel cadmium
or nickel-metal hydride batteries
➤
Direct LED output displays
charge status
The bq2002 and bq2002/F Fast-Charge
ICs are low-cost CMOS battery-charge
controllers providing reliable charge
termination for both NiCd and NiMH
battery applications. Controlling a
current-limited or constant-current
supply allows the bq2002/F to be the
basis for a cost-effective stand-alone or
system-integrated charger. The
bq2002/F integrates fast charge with
optional top-off and pulsed-trickle control in a single IC for charging one or
more NiCd or NiMH battery cells.
➤
Fast-charge termination by -∆V,
maximum voltage, maximum
temperature, and maximum
time
➤
Internal band-gap voltage reference
➤
Optional top-off charge
➤
Selectable pulse trickle charge
rates
➤
Low-power mode
➤
8-pin 300-mil DIP or 150-mil
SOIC
Fast charge is initiated on application
of the charging supply or battery replacement. For safety, fast charge is
inhibited if the battery temperature
and voltage are outside configured
limits.
Pin Connections
Fast charge is terminated by any of
the following:
n
Peak voltage detection (PVD)
n
Negative delta voltage (-∆V)
n
Maximum voltage
n
Maximum temperature
n
Maximum time
After fast charge, the bq2002/F optionally tops-off and pulse-trickles the
battery per the pre-configured limits.
Fast charge may be inhibited using
the INH pin. The bq2002/F may also
be placed in low-standby-power mode
to reduce system power consumption.
T h e b q 2 0 0 2 F d if f er s f r om t h e
bq2002 only in that a slightly different set of fast-charge and top-off
time limits is available. All differences between the two ICs are illustrated in Table 1.
Pin Names
TM
1
8
CC
LED
2
7
INH
BAT
3
6
VCC
VSS
4
5
TS
TM
Timer mode select input
TS
Temperature sense input
LED
Charging status output
VCC
Supply voltage input
BAT
Battery voltage input
INH
Charge inhibit input
VSS
System ground
CC
Charge control output
8-Pin DIP or
Narrow SOIC
PN-200201.eps
bq2002/F Selection Guide
Part No.
TCO
HTF
LTF
0.5 ∗ VCC
None
None
bq2002F 0.5 ∗ VCC
None
None
bq2002
-∆V PVD
✔
✔
✔
✔
✔
✔
Fast Charge
tMTO
Top-Off
Maintenance
C/2
1C
2C
C/2
1C
2C
160
80
40
160
100
55
C/32
C/16
None
C/32
C/16
None
C/64
C/64
C/32
C/64
C/64
C/32
SLUS131 – APRIL 2009
1
bq2002/F
TM
Charge control output
CC
Pin Descriptions
An open-drain output used to control the
charging current to the battery. CC switching to high impedance (Z) enables charging
current to flow, and low to inhibit charging
current. CC is modulated to provide top-off,
if enabled, and pulse trickle.
Timer mode input
A three-level input that controls the settings
for the fast charge safety timer, voltage termination mode, top-off, pulse-trickle, and
voltage hold-off time.
LED
Functional Description
Charging output status
Open-drain output that indicates the charging
status.
BAT
Figure 2 shows a state diagram and Figure 3 shows a
block diagram of the bq2002/F.
Battery input voltage
Battery Voltage and Temperature
Measurements
The battery voltage sense input. The input to
this pin is created by a high-impedance resistor divider network connected between
the positive and negative terminals of the
battery.
VSS
System ground
TS
Temperature sense input
Battery voltage and temperature are monitored for
maximum allowable values. The voltage presented on
the battery sense input, BAT, should represent a
single-cell potential for the battery under charge. A
resistor-divider ratio of
RB1
=N-1
RB2
Input for an external battery temperature
monitoring thermistor.
VCC
is recommended to maintain the battery voltage within
the valid range, where N is the number of cells, RB1 is
the resistor connected to the positive battery terminal,
and RB2 is the resistor connected to the negative battery terminal. See Figure 1.
Supply voltage input
5.0V ± 20% power input.
INH
Charge inhibit input
Note: This resistor-divider network input impedance to
end-to-end should be at least 200kΩ and less than 1 MΩ.
When high, INH suspends the fast charge in
progress. When returned low, the IC resumes operation at the point where initially
suspended.
A ground-referenced negative temperature coefficient
thermistor placed near the battery may be used as a lowcost temperature-to-voltage transducer. The temperature
sense voltage input at TS is developed using a resistorthermistor network between VCC and VSS. See Figure 1.
VCC
PACK +
RT
RB1
VCC
R3
BAT
bq2002/F
TM
RB2
TS
N
T
C
bq2002/F
R4
VSS
VSS
BAT pin connection
Mid-level
setting for TM
Thermistor connection
NTC = negative temperature coefficient thermistor.
Fg2002/F01.eps
Figure 1. Voltage and Temperature Monitoring and TM Pin Configuration
2
bq2002/F
Chip on
4.0V
VCC
Battery
Voltage?
VBAT > 2V
VBAT < 2V
VTS > VCC/2
Fast
LED = Low
Battery
Temperature?
VBAT > 2V
VTS < VCC/2
((PVD or - V or
Maximum Time-Out)
and TM = high)
(PVD or - V or
Maximum Time-Out)
and TM = high
Top-off
LED = Z
VTS < VCC/2
VCC
2V
Trickle
LED = Z
Maximum Time-Out
or VBAT > 2V
or VTS < VCC/2
SD2002/F01
Figure 2. State Diagram
Clock
Phase
Generator
OSC
TM
Timing
Control
Sample
History
Voltage
Reference
PVD, -∆V
ALU
A to D
Converter
INH
Charge-Control
State Machine
MCV
Check
Power-On
Reset
TCO
Check
CC
LED
TS
BAT
Power
Down
VCC
VSS
Bd2002f.eps
Figure 3. Block Diagram
3
bq2002/F
VCC = 0
Fast Charging
Top-Off
(optional)
Pulse-Trickle
286 s
286 s
CC Output
Fast Charging
See
Table 1
4576 s
Charge initiated by application of power
Charge initiated by battery replacement
LED
TD2002F1.eps
Figure 4. Charge Cycle Phases
If the battery voltage or temperature is outside of these
limits, the IC pulse-trickle charges until the next new
charge cycle begins.
Starting A Charge Cycle
Either of two events starts a charge cycle (see Figure 4):
Fast charge continues until termination by one or more of
the five possible termination conditions:
1. Application of power to VCC or
2. Voltage at the BAT pin falling through the maximum
cell voltage VMCV where
n
Peak voltage detection (PVD)
VMCV = 2V ±5%.
n
Negative delta voltage (-∆V)
If the battery is within the configured temperature and
voltage limits, the IC begins fast charge. The valid battery voltage range is VBAT < VMCV. The valid temperature range is VTS > VTCO where
n
Maximum voltage
n
Maximum temperature
n
Maximum time
VTCO = 0.5 ∗ VCC ±5%.
Table 1. Fast-Charge Safety Time/Hold-Off Table
Typical Fast-Charge
and Top-Off
Time Limits
(minutes)
PulseTrickle
Rate
PulseTrickle
Period
(ms)
C/32
C/64
9.15
300
C/16
C/64
18.3
150
Disabled
C/32
18.3
Typical PVD
and -∆V Hold-Off Top-Off
Time (seconds)
Rate
Corresponding
Fast-Charge
Rate
TM
Termination
bq2002
bq2002F
C/2
Mid
PVD
160
160
600
1C
Low
PVD
80
100
2C
High
-∆V
40
40
Notes:
Typical conditions = 25°C, VCC = 5.0V.
Mid = 0.5 * VCC ± 5V
Tolerance on all timing is ± 20%.
4
bq2002/F
pin is modulated at a duty cycle of 286µs active for
every 4290µs inactive. This modulation results in an
average rate 1/16th that of the fast charge rate. Maximum voltage, time, and temperature are the only termination methods enabled during top-off.
PVD and -∆V Termination
There are two modes for voltage termination depending
on the state of TM. For -∆V (TM = high), if VBAT is
lower than any previously measured value by 12mV
±3mV, fast charge is terminated. For PVD (TM = low or
mid), a decrease of 2.5mV ±2.5mV terminates fast
charge. The PVD and -∆V tests are valid in the range
1V < VBAT < 2V.
Pulse-Trickle Charge
Pulse-trickle is used to compensate for self-discharge
while the battery is idle in the charger. The battery is
pulse-trickle charged by driving the CC pin active for a
period of 286µs for every 18.0ms of inactivity for 1C and
2C selections, and 286µs for every 8.86ms of inactivity
for C/2 selection. This results in a trickle rate of C/64
for the top-off enabled mode and C/32 otherwise.
Voltage Sampling
Voltage is sampled at the BAT pin for PVD and -∆V termination once every 17s. The sample is an average of
voltage measurements taken 570µs apart.The IC takes
32 measurements in PVD mode and 16 measurements
in -∆V mode. The resulting sample periods (9.17 and
18.18ms, respectively) filter out harmonics centered
around 55 and 109Hz. This technique minimizes the effect of any AC line ripple that may feed through the
power supply from either 50 or 60Hz AC sources. Tolerance on all timing is ±20%.
TM Pin
The TM pin is a three-level pin used to select the
charge timer, top-off, voltage termination mode, trickle
rate, and voltage hold-off period options. Table 1 describes the states selected by the TM pin. The midlevel selection input is developed by a resistor divider between V CC and ground that fixes the voltage
on TM at VCC/2 ± 0.5V. See Figure 4.
Voltage Termination Hold-off
A hold-off period occurs at the start of fast charging.
During the hold-off time, the PVD and -∆V terminations
are disabled. This avoids premature termination on the
voltage spikes sometimes produced by older batteries
when fast-charge current is first applied. Maximum
voltage and temperature terminations are not affected
by the hold-off period.
Charge Status Indication
A fast charge in progress is uniquely indicated when the
LED pin goes low. The LED pin is driven to the high-Z
state for all conditions other than fast charge. Figure 2
outlines the state of the LED pin during charge.
Maximum Voltage, Temperature, and Time
Charge Inhibit
Any time the voltage on the BAT pin exceeds the maximum cell voltage,VMCV, fast charge or optional top-off
charge is terminated.
Fast charge and top-off may be inhibited by using the
INH pin. When high, INH suspends all fast charge and
top-off activity and the internal charge timer. INH
freezes the current state of LED until inhibit is removed. Temperature monitoring is not affected by the
INH pin. During charge inhibit, the bq2002/F continues
to pulse-trickle charge the battery per the TM selection.
When INH returns low, charge control and the charge
timer resume from the point where INH became active.
Maximum temperature termination occurs anytime the
voltage on the TS pin falls below the temperature cut-off
threshold VTCO.
Maximum charge time is configured using the TM pin.
Time settings are available for corresponding charge
rates of C/2, 1C, and 2C. Maximum time-out termination is enforced on the fast-charge phase, then reset, and
enforced again on the top-off phase, if selected. There is
no time limit on the trickle-charge phase.
Low-Power Mode
The IC enters a low-power state when VBAT is driven
above the power-down threshold (VPD) where
VPD = VCC - (1V ±0.5V)
Top-off Charge
Both the CC pin and the LED pin are driven to the
high-Z state. The operating current is reduced to less
than 1µA in this mode. When VBAT returns to a value
below VPD, the IC pulse-trickle charges until the next
new charge cycle begins.
An optional top-off charge phase may be selected to
follow fast charge termination for 1C and C/2 rates.
This phase may be necessary on NiMH or other battery chemistries that have a tendency to terminate
charge prior to reaching full capacity. With top-off enabled, charging continues at a reduced rate after
fast-charge termination for a period of time selected
by the TM pin. (See Table 1.) During top-off, the CC
5
bq2002/F
Absolute Maximum Ratings
Symbol
Parameter
Minimum
Maximum
Unit
VCC
VCC relative to VSS
-0.3
+7.0
V
VT
DC voltage applied on any pin
excluding VCC relative to VSS
-0.3
+7.0
V
TOPR
Operating ambient temperature
0
+70
°C
TSTG
Storage temperature
-40
+85
°C
TSOLDER
Soldering temperature
-
+260
°C
TBIAS
Temperature under bias
-40
+85
°C
Note:
Commercial
10 sec max.
Permanent device damage may occur if Absolute Maximum Ratings are exceeded. Functional operation should be limited to the Recommended DC Operating Conditions detailed in this data sheet. Exposure to conditions beyond the operational limits for extended periods of time may affect device reliability.
DC Thresholds
Symbol
Notes
(TA = 0 to 70°C; VCC ± 20%)
Parameter
Rating
Tolerance
Unit
0.5 * VCC
±5%
V
VTS ≤ VTCO inhibits/terminates
fast charge and top-off
VBAT ≥ VMCV inhibits/terminates
fast charge and top-off
VTCO
Temperature cutoff
VMCV
Maximum cell voltage
2
±5%
V
-∆V
BAT input change for
-∆V detection
-12
±3
mV
PVD
BAT input change for
PVD detection
-2.5
±2.5
mV
6
Notes
bq2002/F
Recommended DC Operating Conditions (TA = 0 to 70°C)
Symbol
Condition
Minimum
Typical
Maximum
Unit
4.0
5.0
6.0
V
Notes
VCC
Supply voltage
VDET
-∆V, PVD detect voltage
1
-
2
V
VBAT
Battery input
0
-
VCC
V
VTS
Thermistor input
0.5
-
VCC
V
VTS < 0.5V prohibited
Logic input high
0.5
-
-
V
INH
Logic input high
VCC - 0.5
-
-
V
TM
+ 0.5
V
TM
VIH
VIM
Logic input mid
VCC
- 0.5
2
-
VCC
2
Logic input low
-
-
0.1
V
INH
Logic input low
-
-
0.5
V
TM
Logic output low
-
-
0.8
V
LED, CC, IOL = 10mA
VBAT ≥ VPD max. powers
down bq2002/F;
VBAT < VPD min. =
normal operation.
VIL
VOL
VCC - 1.5
-
VCC - 0.5
V
Supply current
-
-
250
µA
Outputs unloaded,
VCC = 5.1V
ISB
Standby current
-
-
1
µA
VCC = 5.1V, VBAT = VPD
IOL
LED, CC sink
10
-
-
mA
@VOL = VSS + 0.8V
IL
Input leakage
-
-
±1
µA
INH, CC, V = VSS to VCC
IOZ
Output leakage in
high-Z state
-5
-
-
µA
LED, CC
VPD
Power down
ICC
Note:
All voltages relative to VSS.
7
bq2002/F
Impedance
Symbol
Parameter
Minimum
Typical
Maximum
Unit
RBAT
Battery input impedance
50
-
-
MΩ
RTS
TS input impedance
50
-
-
MΩ
Timing
Symbol
dFCV
Note:
(TA = 0 to +70°C; VCC ± 10%)
Parameter
Base time variation
Minimum
Typical
Maximum
Unit
-20
-
20
%
Typical is at TA = 25°C, VCC = 5.0V.
8
Notes
bq2002/F
8-Pin DIP (PN)
8-Pin PN (0.300" DIP)
Inches
Min.
Max.
Min.
Max.
A
0.160
0.180
4.06
4.57
A1
0.015
0.040
0.38
1.02
B
0.015
0.022
0.38
0.56
B1
0.055
0.065
1.40
1.65
D
E1
E
A
B1
A1
L
C
B
S
e
G
9
Millimeters
Dimension
C
0.008
0.013
0.20
0.33
D
0.350
0.380
8.89
9.65
E
0.300
0.325
7.62
8.26
E1
0.230
0.280
5.84
7.11
e
0.300
0.370
7.62
9.40
G
0.090
0.110
2.29
2.79
L
0.115
0.150
2.92
3.81
S
0.020
0.040
0.51
1.02
bq2002/F
8-Pin SOIC Narrow (SN)
8-Pin SN (0.150" SOIC)
Inches
10
Millimeters
Dimension
Min.
Max.
Min.
Max.
A
0.060
0.070
1.52
1.78
A1
0.004
0.010
0.10
0.25
B
0.013
0.020
0.33
0.51
C
0.007
0.010
0.18
0.25
D
0.185
0.200
4.70
5.08
E
0.150
0.160
3.81
4.06
e
0.045
0.055
1.14
1.40
H
0.225
0.245
5.72
6.22
L
0.015
0.035
0.38
0.89
Ordering Information
bq2002
Package Option:
PN = 8-pin plastic DIP
SN = 8-pin narrow SOIC
Device:
bq2002 Fast-Charge IC
bq2002F Fast-Charge IC
11
SLUS131A – April 2009
bq2002/F
Data Sheet Revision History
Change No. (1)
(1)
Page No.
Description
1
3
Was: Table 1 gave the bq2002/F Operational Summary.
Is: Figure 2 gives the bq2002/F Operational Summary.
1
5
Added Termination column to table and Top-off values.
2
All
Revised and expanded this data sheet to include
bq2002F
3
1
Revised and expanded this data sheet to include
bq2002F
4
5
Voltage Sampling — From: Average of voltage
measurements taken 57us apart. To: Average of voltage
measurements taken 570us apart.
Nature of Change
Changed table to figure.
Added column and values.
Change 1 = Sept. 1996 changes from July 1994.
Change 2 = Aug. 1997 changes from Sept. 1996 .
Change 3 = Jan. 1999 changes from Aug. 1997.
Change 4 = April 2009 changes from Jan 1999.
SLUS131A – April 2009
Submit Documentation Feedback
bq2002/F
PACKAGE OPTION ADDENDUM
www.ti.com
16-Apr-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
BQ2002FPN
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
BQ2002FPNE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
BQ2002FSN
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
BQ2002FSNG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
BQ2002FSNTR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
BQ2002FSNTRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
BQ2002PN
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
BQ2002PNE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
BQ2002SN
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
BQ2002SNG4
ACTIVE
SOIC
D
8
75
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
BQ2002SNTR
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
BQ2002SNTRG4
ACTIVE
SOIC
D
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
16-Apr-2009
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Apr-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
Diameter Width
(mm) W1 (mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
BQ2002FSNTR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
BQ2002SNTR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
16-Apr-2009
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
BQ2002FSNTR
SOIC
D
8
2500
340.5
338.1
20.6
BQ2002SNTR
SOIC
D
8
2500
340.5
338.1
20.6
Pack Materials-Page 2
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dsp.ti.com
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interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lprf
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