TX734

TX734
www.ti.com........................................................................................................................................................................................... SLOS615 – NOVEMBER 2008
Quad Channel, 3-Level RTZ, ±75-V, 2-A Integrated Ultrasound Pulser
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2
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Quad Channel
Voltage: ±75 V
Peak Output Current: ±2 A
Active Damping
– True 3-Level RTZ
– Internally Activated
Imaging Output Frequency: Up to 15 MHz
Logic Inputs: 2.5 V to 5 V
Matched Delay: ±2.5 ns
Low HD2 Distortion: –40 dB, at 5 MHz
Integrated:
– Level Translator
– Driver
– High-Voltage Output Stage
– Active Damping Stage
– Output Blocking Diodes
Dedicated CW Function
– Low Noise Operation
Minimal External Components
Small PowerPAD™ Package: 9 mm × 9 mm
QFN-64
The TX734 is a complete transmitter solution with
low-voltage input logic, level translators, gate drivers,
and P-channel and N-Channel MOSFETs for each
channel.
The TX734 supports logic levels down to 2.5 V. It
also incorporates an active damping stage for clean
RTZ waveform generation. The fast clamping to
ground results in high pulse symmetry and low 2nd
order distortion.
The TX734 is available in a QFN-64, 9 mm x 9 mm
package. It is specified for operation from 0°C to
70°C.
HV_P
OUT 1
•
Medical Ultrasound
– Portable Systems
– Mid-Range Systems
NDT Material Inspection
DESCRIPTION
The TX734 is a fully integrated, quad channel,
high-voltage ultrasound pulser. It can be used in
ultrasound applications that require a 3-level
high-voltage pulse pattern. The output stages are
designed to deliver up to ±2-A peak output currents,
with up to ±75-V swings.
3-Level
FET-Output
CH1
Active Damping
OUT2
3-Level
FET-Output
CH2
Active Damping
VE
Logic,
Level
Translator
&
Driver
Logic,
Level
Translator
&
Driver
IN1 _P
IN1_N
IN2_P
IN2_N
CW_MODE
EN
APPLICATIONS
•
HV_N VD_CW VE_CW VD
OUT 3
3-Level
FET-Output
CH3
Active Damping
OUT 4
3-Level
FET-Output
CH4
Active Damping
GND2
Logic ,
Level
Translator
&
Driver
Logic,
Level
Translator
&
Driver
IN3_P
IN3 _N
IN4 _P
IN4_ N
GND1
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCT PREVIEW information concerns products in the
formative or design phase of development. Characteristic data and
other specifications are design goals. Texas Instruments reserves
the right to change or discontinue these products without notice.
Copyright © 2008, Texas Instruments Incorporated
PRODUCT PREVIEW
FEATURES
1
TX734
SLOS615 – NOVEMBER 2008........................................................................................................................................................................................... www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
DEVICE INFORMATION
PIN ASSIGNMENTS – QFN-64, 9 mm x 9 mm
55
54
53
52
HV_N2
56
HV_N1
57
HV_N2
58
GND2
HV_N1
60
HV_P1
59
61
HV_P1
GND2
HV_HL12
62
63
HV_P2
GND1
VD_CW1
VD_CW2
64
HV_P2
VE_CW1
VE_CW2
RGC PACKAGE
(Top View)
51
50
49
1
48
2
47
VD
3
46
HV_LH12
GND2
OUT1
EN
IN1_P
4
45
OUT1
5
44
IN1_N
IN2_P
6
43
GND2
OUT2
IN2_N
IN3_P
8
IN3_N
10
39
IN4_P
11
38
IN4_N
12
37
CW_MODE
VD
GND1
13
36
14
35
15
34
VE
16
42
7
TX734
PowerPAD
(VSUB)
9
41
40
21
22
23
24
25
GND1
VD_CW3
VD_CW4
GND2
HV_HL34
HV_P3
HV_P3
HV_P4
HV_P4
26
27
28
29
31
32
HV_N3
20
HV_N4
HV_N3
19
GND2
HV_N4
18
VE_CW3
33
17
VE_CW4
PRODUCT PREVIEW
VE
GND1
30
OUT2
GND2
GND2
OUT3
OUT3
GND2
OUT4
OUT4
GND2
HV_LH34
PIN FUNCTIONS
NAME
CW_MODE
EN
GND1
GND2
PIN NO.
DESCRIPTION
13
Logic input; logic high enables CW mode.
4
Power-down; low = powerdown, outputs off-state; high = normal operation.
2, 15, 19, 62
Ground for low-voltage supplies, VD, VE,VD_CWx, VE_CWx. Tie pins together.
22, 28, 34, 37, 40, 41, Ground for high-voltage supplies, HV_HLx, HV_LHx,HV_Px,HV_Nx. Tie pins together.
44, 47, 53, 59
HV_HLx
23, 58
Supply rail at HV_Px – 10 V for channels x
HV_LHx
33, 48
Supply rail at HV_Nx + 10 V for channels x
HV_Nx
29–32, 49–52
Negative supply of the high-voltage FET output stage (for channel x), ≤ –75 V
HV_Px
24–27, 54–57
Positive supply of the high-voltage FET output stage (for channel x); ≤ +75 V
INx_N
6, 8, 10, 12
Logic input for the N-FET stages for each channel (x); low = off, high = on.
INx_P
5, 7, 9, 11
Logic input for the P-FET stages for each channel (x); low = off, high = on.
OUT1
45, 46
Output channel 1
OUT2
42, 43
Output channel 2
OUT3
38, 39
Output channel 3
OUT4
35, 36
Output channel 4
3, 14
+5-V supply
VD
VD_CWx
VE
2
20, 21, 60, 61
1, 16
Positive supply connection for the CW FET output stage (for channel x), ≤ +10 V
–5-V supply
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Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TX734
TX734
www.ti.com........................................................................................................................................................................................... SLOS615 – NOVEMBER 2008
PIN FUNCTIONS (continued)
NAME
VE_CWx
PIN NO.
DESCRIPTION
17, 18, 63, 64
VSUB
0
Negative supply connection for the CW FET output stage (for channel x); ≤ –10 V
VSUB must be connected to the most negative supply. This is the PowerPAD on the back side of
the QFN package.
PACKAGING/ORDERING INFORMATION (1)
PART NUMBER
TX734RGCT
TX734RGCR
PACKAGE
DESIGNATOR
PACKAGE MARKING
QFN-64
RGC
TX734
TRANSPORT MEDIA,
QUANTITY
Tape and reel, 250
Tape and reel, 2000
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
PRODUCT PREVIEW
(1)
PACKAGE TYPE
Submit Documentation Feedback
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TX734
3
PACKAGE OPTION ADDENDUM
www.ti.com
5-Nov-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TX734RGCR
PREVIEW
VQFN
RGC
64
TBD
Call TI
Call TI
TX734RGCT
PREVIEW
VQFN
RGC
64
TBD
Call TI
Call TI
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 1
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