# Modeling of HVDC IGBT in Pspice JIN YANG Master’s Degree Project Stockholm, Sweden

Modeling of HVDC IGBT in Pspice Serving an ultimate goal for converter station EMC studies JIN YANG Master’s Degree Project Stockholm, Sweden September 2015 TRITA-EE 2015:67 Modeling of HVDC IGBT in Pspice Serving an ultimate goal for converter station EMC studies Jin Yang School of Electrical Engineering Royal Institute of Technology Supervisor: Daniel Månsson Examiner: Martin Norgren Commissioned by ABB AB Power Systems in Ludvika HVDC Supervisor: Jing Ni, Sanchit Singh Manager: Raul Montano Abstract An IGBT/diode model with more accurate characteristics than simple switch is required to serve for EMC issues from converter valve. The purpose of this master thesis is to develop an IGBT and diode model to achieve both accurate transient behavior and fast simulation time during single pulse switching test circuit for the 4.5 kV and 2.0 kA StakPakTM IGBT module. A gate unit which resembles the ABB gate unit is implemented to obtain a good agreement between simulation and measurement. For demonstration and verification, the IGBT/diode model is applied in a simplified arm simulation of full scale ABB Generation 4 HVDC-VSC converter station and capable of a half cell consisting of 8 series-connected IGBTs and their anti-paralleled diodes. The arm simulation results are analyzed further for converter station EMC studies. Convergence issue is the most important problem in the whole process of model implementation and application. To guarantee the convergence in simulation some characteristics such as the tail voltage at the end of turn-off is disregarded. But overall, the model is validated and adopted successfully. Sammanfattning En IGBT-/diodmodell med mer exakta egenskaper än en enkel switch krävs för att hantera EMC-problem från omvandlarventilen. Syftet med denna magisteruppsats är att utveckla en IGBT- och diodmodell för att uppnå både noggrant övergående beteende och snabb simuleringstid under enkelpulsomkopplingstestkrets för 4,5 kV och 2,0 kA-StakPak IGBT-modulen. En grindenhet som liknar ABB-grindenheten implementeras för att få god överensstämmelse mellan simulering och mätning. För demonstration och verifiering, tillämpas IGBT-/diodmodellen i en förenklad armsimulering av en fullskalig ABB Generation 4 HVDC-VSC-omvandlarstation och med kapacitet för en halvcell bestående av 8 seriekopplade IGBT och deras anti-parallellkopplade dioder. Resultaten från armsimuleringen analyseras vidare för EMC-studier av omvandlarstationen. Konvergensfrågan är det viktigaste problemet i hela processen för modellimplementering och -tillämpning. För att garantera konvergensen i simulering ignoreras vissa egenskaper såsom svansspänningen vid slutet av avstängning. Men totalt sett, valideras och antas modellen framgångsrikt. Keywords StakPakTM IGBT module, IGBT behavioral model, Single pulse test circuit, Generation 4 Acknowledgment First of all, I would like to express my sincere gratitude to my supervisors at ABB, Jing Ni and Sanchit Singh, as well as my manager Raul Montano, for their instructive advices and help in my model implementation and thesis writing. Secondly, Im also indebted to my supervisor at KTH, Daniel Månsson, who has put his considerable time and support into the completion of this thesis. Last but not the least, Id like to thank my colleagues, teachers and friends. Without their help and encouragement, it would be much harder for me to finish this thesis. List of Figures 2.1 2.2 A hierarchical structure of StakPak IGBT module. . . . . . . . . The single pulse test circuit in Pspice. . . . . . . . . . . . . . . . 4 5 3.1 The diode reverse recovery current during turn-off switching. . . 8 4.1 4.2 4.3 4.4 4.5 4.6 Darlington circuit of IGBT. . . . . . . . . . . . . . . . . . . The structure of Hammerstein-like IGBT model. . . . . . . The typical output characteristics of an IGBT. . . . . . . . The capacitance extraction of IGBT model. . . . . . . . . . The structure of alternative Hammerstein-like IGBT model. ABM block to implement the turn-off time delay. . . . . . . . . . . . . 10 11 12 14 16 17 The Pspice schematic of static characteristics circuit. . . . . . . . Static characteristic of collector current versus gate-emitter voltage at constant collector-emitter voltage of 15 V. . . . . . . . . . 5.3 Static characteristic of collector current versus collector-emitter voltage for a series of constant gate-emitter voltage at 9 V, 11 V, 13 V and 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.4 The Pspice schematic of single pulse test circuit with rectangular voltage source. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 Simulation results under standard operation mode with voltage source driving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.6 The Pspice schematic of single pulse test circuit with constant current source. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.7 Simulation results under standard operation mode with current source driving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.8 The Pspice schematic of single pulse test circuit with ABB gate unit model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.9 Turn-on simulation results under standard operation mode with ABB gate unit model: collector-emitter voltage and collector current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.10 Turn-off simulation results under standard operation mode with ABB gate unit model: collector-emitter voltage and collector current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.11 Simulation results of diode reverse recovery under standard operation mode with ABB gate unit model. . . . . . . . . . . . . . 5.12 Turn-on comparison under standard operation mode with ABB gate unit model in frequency domain. . . . . . . . . . . . . . . . 18 5.1 5.2 i . . . . . . . . . . . . 19 20 21 22 24 25 26 28 28 29 31 5.13 Turn-off comparison under standard operation mode with ABB gate unit model in frequency domain. . . . . . . . . . . . . . . . 6.1 32 Turn-on simulation results under 3.6 kV and 1.2 kA mode with ABB gate unit model: collector-emitter voltage and collector current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Turn-off simulation results under 3.6 kV and 1.2 kA mode with ABB gate unit model: collector-emitter voltage and collector current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Simulation results of diode reverse recovery under 3.6 kV and 1.2 kA mode with ABB gate unit model. . . . . . . . . . . . . . . Turn-on comparison under 3.6 kV and 1.2 kA mode with ABB gate unit model in frequency domain. . . . . . . . . . . . . . . . Turn-off comparison under 3.6 kV and 1.2 kA mode with ABB gate unit model in frequency domain. . . . . . . . . . . . . . . . 37 7.1 The example of STP function in capacitance Ccg . . . . . . . . . . 38 8.1 The simplified arm simulation composition of the full scale Light G4 converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single pulse test results of collector-emitter voltage and collector current with voltage source driving under standard operation mode. Voltage and current Waveforms for IGBT and diode models compared with simple switches and diodes in time domain. . . . . . . Stray current waveforms for IGBT and diode models compared with simple switches and diodes in time domain. . . . . . . . . . Stray current waveforms for IGBT and diode models compared with simple switches and diodes in frequency domain. . . . . . . Stray current waveforms including extra damper for IGBT and diode models compared with simple switches and diodes in frequency domain. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.2 6.3 6.4 6.5 8.2 8.3 8.4 8.5 8.6 B.1 MOSFET channel threshold voltage (VT H ) increases from 6.5 V to 8 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.2 Process transconductance parameter (kp ) increases from 0.68 S to 1.2 S. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.3 Current gain of BJT transistor (β) increases from 150 to 280. . . B.4 MOSFET channel threshold voltage (VT H ) increases from 6.8 V to 7.3 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.5 Approximated turn-on voltage of the p + /n− junction (VD ) increases from 0.6 V to 0.8 V. . . . . . . . . . . . . . . . . . . . . . B.6 Process transconductance parameter (kp ) increases from 0.68 S to 1 S. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.7 Current gain of BJT transistor (β) increases from 170 to 250. . . B.8 Gate resistance (Rg ) increases from 0.7 Ω to 1.2 Ω. . . . . . . . . B.9 Diode diffusion transit time (ttdi) increases from 8 × 10−7 s to 2.5 × 10−6 s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.10 On-state resistance of h1 block (r1on ) increases from 38 Ω to 310 Ω. B.11 Current gain of BJT transistor (β) increases from 130 to 250. . . B.12 Stray inductance (LS ) increases from 70 nH to 150 nH. . . . . . . ii 34 34 35 36 42 43 44 45 46 47 58 59 59 60 60 61 61 62 62 63 63 64 B.13 Ratio of IC after and before the fast decay at turn-off (α) increases from 0.1 to 0.3. . . . . . . . . . . . . . . . . . . . . . . . . B.14 On-state resistance of h1 block (R1on ) increases from 38 Ω to 310 Ω. B.15 Off-state resistance of h1 block (r1off) increases from 35 Ω to 270 Ω. B.16 Stray inductance (LS ) increases from 50 nH to 150 nH. . . . . . . B.17 Diode minority carrier lifetime (taud) increases from 0.5 µs to 4 µs. B.18 On-state resistance of h1 block (R1on ) increases from 40 Ω to 150 Ω. B.19 Off-state resistance of h1 block (R1of f ) increases from 40 Ω to 150 Ω. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B.20 Turn-off resistance of h2 block (R2of f ) increases from 30 Ω to 110 Ω. iii 64 65 65 66 66 67 67 68 List of Tables 5.1 5.2 Scope of influence of different parameters on the dynamic behavior. 23 The entire parameter set extracted with the ABB gate unit model. 27 6.1 Parameter variation from table 5-2 for 3.6 kV and 1.2 kA operation mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9.1 9.2 9.3 33 Differences/Similarities between lumped charge model and new model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Advantages/disadvantages of lumped charge model and new model. 49 Advantages/disadvantages of all the simulations from previous chapters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 iv List of Symbols a0 , a1 , a2 b0 , b1 , b2 C1 C2 Cce Ccg Cge Cies Coes Cres Cj0 f1 , f2 fC IC iD IDC Iload IS k LS LL mj n qE , qM , TM R1on R1of f R2on R2of f RCE RG RL RS RS tau ttd Polynomial factors for correction functions f1 Polynomial factors for correction functions f2 Paralleled capacitance of h1 block in IGBT model Paralleled capacitance of h2 block in IGBT model IGBT collector-emitter capacitance IGBT collector-gate capacitance IGBT gate-emitter capacitance IGBT input capacitance IGBT output capacitance IGBT reverse transfer capacitance Junction capacitance at zero bias in diode model correction functions in IGBT model Point where the capacitance becomes linear (SPICE capacitance model parameter) in diode model IGBT collector current Diode instantaneous forward current IGBT DC collector current Load current in single pulse test circuit Diode saturation current Process transconductance coefficient in IGBT model Stray inductance in single pulse test circuit Load inductance in single pulse test circuit Junction capacitance grading coefficient in diode model Diode emission coeffcient Three diode substitution variables On-state resistance of h1 block in IGBT model Off-state resistance of h1 block in IGBT model On-state resistance of h2 block in IGBT model Off-state resistance of h2 block in IGBT model Series resistor between gate and emitter in alternative IGBT model structure Gate resistance in single pulse test circuit Load resistance in single pulse test circuit Stray resistance in single pulse test circuit Series resistance in diode model Minority carrier lifetime in diode model Diffusion transit time in diode model v n.u. n.u. F F F F F F F F F n.u. n.u. A A A A A S H H n.u. n.u. n.u. Ω Ω Ω Ω Ω Ω Ω Ω Ω s s U1 U2 U3 U4 VCE vD VD VG VGE Vj VS Vth VT H α β τ τrr IGBT voltage variables of instantaneous DC collector current IC IGBT conduction component of the collector current IC IGBT voltage variables of instantaneous dynamic collector current IC IGBT displacement component of the collector current IC IGBT collector-emitter voltage Diode instantaneous forward voltage IGBT approximated turn-on voltage of the p+/n− junction Simple voltage source gate unit IGBT gate-emitter voltage Junction built-in potential in diode model Voltage supply in single pulse test circuit Diode instantaneous threshold voltage MOSFET channel threshold voltage IGBT ratio of the collector current after and before the fast decay at turn-off IGBT current gain of BJT Diode lifetime Diode reverse recovery time constant vi A A A A V V V V V V V V V n.u. n.u. s s List of Abbreviations ABB BJT EMC GTO HVDC IGBT Light MATLAB MOSFET PSCAD Pspice StakPak VSC Asea Brown Boveri Ltd. Bipolar Junction Transistor Electromagnetic Compatibility Gate Turn Off (thyristor) High Voltage Direct Current Insulated-Gate Bipolar Transistor ABB name of HVDC-VSC converter MATrix LABoratory Metal-Oxide Semiconductor Field-Effect Transistor Power System Computer Aided Design Personal Computer Simulation Program with Integrated Circuit Emphasis a family of high power IGBT press-packs and diodes in an advanced modular housing voltage source converter vii Contents List of Symbols v List of Abbreviations vii 1 Introduction 1.1 Main motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 Main objective and model review . . . . . . . . . . . . . . . . . . 1.3 Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 1 1 3 2 Basis for the project development 2.1 StakPak IGBT module . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Single pulse test circuit . . . . . . . . . . . . . . . . . . . . . . . 4 4 5 3 Diode model 3.1 Model description . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.2 Parameter extraction . . . . . . . . . . . . . . . . . . . . . . . . . 7 7 8 4 IGBT model 4.1 General description . . . . . . . . . . . 4.2 DC model . . . . . . . . . . . . . . . . 4.3 Dynamic model . . . . . . . . . . . . . 4.3.1 Model of capacitors . . . . . . 4.3.2 Model of block h1 and block h2 4.3.3 Model of time delay block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 10 11 13 13 15 16 5 Simulation results 5.1 DC characteristics . . . . . . . . . . . 5.1.1 IC versus VGE . . . . . . . . . 5.1.2 IC versus VCE . . . . . . . . . 5.2 Dynamic characteristics . . . . . . . . 5.2.1 Voltage driving . . . . . . . . . 5.2.2 Current driving . . . . . . . . . 5.2.3 Complex ABB gate unit model 5.2.4 Frequency domain results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 18 19 19 20 20 24 25 30 6 Different operation modes 33 7 Convergence issues 38 7.1 Useful convergence solutions . . . . . . . . . . . . . . . . . . . . . 38 viii 8 Application in arm simulation for demonstration 41 9 Discussion 48 10 Conclusion 51 11 Future work 52 Appendix A Pspic schematics 55 A.1 IGBT model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 A.2 Diode model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57 Appendix B Parametric analysis 58 B.1 Parametric analysis for collector current versus gate-emitter voltage at constant collector-emitter voltage of 15 V. . . . . . . . . . 58 B.2 Parametric analysis for collector current versus collector-emitter voltage for a series of constant gate-emitter voltage at 9 V, 11 V, 13 V and 15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 B.3 Parametric analysis for turn-on transient with voltage source driving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62 B.4 Parametric analysis for turn-off transient with voltage source driving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 B.5 Parametric analysis for turn-on and off transient with current source driving. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 ix Chapter 1 Introduction 1.1 Main motivation Two main aspects are included in EMC requirements: the emission issues, i.e. electromagnetic interference to the environment generated from the device during normal operation cannot exceed certain limits; the apparatus has a certain degree of immunity (EMI), called electromagnetic sensitivity, to the electromagnetic interference in the environment. As known, ABB needs to be able to meet all customers’ requirements regarding to high frequency conducted and radiated electromagnetic emissions, and make sure that the equipment we install does not break during the 30 years’ lifetime of the HVDC station under interference. For these reasons we need accurate and validated high frequency simulation models, especially a good IGBT/diode model, for correct switching so as to reflect the electromagnetic exchange between converter station and the interference in the environment. Before a proper IGBT/diode model was developed, in HVDC simulations for EMC, IGBTs and diodes were represented as simple switches and diodes in Pspice library. These models do not have accurate dynamic behaviors, for example, reverse recovery and realistic current and voltage derivatives. So sadly they made the EMC results deviate much more than expected and customers complain about it. The background for this thesis is, therefore, directly related to the need to represent the semiconductors more accurately without sacrificing simulation speed and convergence. 1.2 Main objective and model review The insulated-gate bipolar transistor (IGBT) is a three-terminal power semiconductor device primarily used as an electronic switch, which has high efficiency and fast switching. It combines the simple gate-drive characteristics of MOSFET device with the high-current and low-saturation-voltage capability of bipolar transistors. IGBT is regularly used in HVDC-VSC converter application. It is often con- 1 nected with complex busbar, capacitor and snubber circuit. Traditionally they are modelled as lumped parameters in circuit simulation softwares such as PSCAD. Now, since more and more issues are related to the coupling or mutual effect/high frequency/transient effect, a better or so-called hybrid model is needed. This thesis is looking for an IGBT model for 4.5 kV and 2.0 kA StakPakTM IGBT module that can be used in simulations involving a full scale converter for EMC System Studies. The model needs to be runnable (fast and stable), and be able to capture the basic behavior of currents and voltages during commutation events in both time and frequency domains. Speed and stability are more important than high accuracy. Thus, several goals need to be achieved: enable series connection, fast simulation time, correct di/dt and dv/dt during switching. In order to obtain an accurate and realistic IGBT model, literature review is done and many different types of models are investigated. One of the first widely-accepted models, Hefner model [1] [2], is a physics model which has good accuracy and implemented in Saber [3] and Spice environments [4]. Afterwards, Lauritzen introduced a model based on Lumped Charge Approach [5] which has been successfully used for many power device models: diode [6] [7], GTO [8], and IGBT [9]. The main disadvantages of these models are complexity, timeconsuming parameter extraction (in order to get an accurate agreement between the datasheet and the model simulation) and long simulation times. In previous thesis work [10], modeling of IGBT modules with parasitic elements evaluation is done in Pspice based on Lauritzens lumped charge method. This flexible PSpice model is applicable to different IGBT modules with different voltage and current ratings by accordingly adjusting the parameters. With this model, Muhammad Nawaz has developed a platform for 4.5 kV and 2.0 kA StakPakTM IGBT module [11] [12], whose results show a good agreement with experiment data and good prediction on the switching losses. However, limitation was found within this platform which does not allow for series connection as well as simulations involving multiple occurrences of this model. In this thesis, a behavioral model is developed. This model is more accurate than a simple switch but at the same time it is less complex than the physics-based model. Behavioral models presented in [13] [14] using Hammerstein-like model is what we seek for, consisting of a dc part for the static behavior and a dynamic part for the transient behavior. In the thesis work by Henrik Hollander [15], an adopted model from [13] [14] is implemented in MATLAB with the design of gate unit in simulink. In this thesis, it is improved in Pspice environment and tested in single pulse test circuit simulations to see the dynamic performance. However, here the modeling of gate unit is not our interest, so the test circuit is driven first by a simple voltage source then a simple current source and finally using an ABB gate unit built by Muhammad Nawaz [12]. A method for parameter extraction is outlined by Hsu et al [16]. The behavior of this improved behavioral IGBT model much resembles the data from measurements, even though some drawbacks were clear, such as the lack of time delay at turn-off and sharp voltage drop at the end of turn-on. Simulation results show quite good agreement with measurements for 2.8 kV 2 supply voltage and 2.0 kA load current operation points. Later, the parameter set is adapted for other operating modes which are relevant to EMC studies in converter station and give satisfactory performance as well. 1.3 Structure Chapter 2 describes the StakPakTM IGBT power module as well as composition of the single pulse switching test circuit. Chapter 3 and 4 describe the diode and IGBT model respectively. The results of single pulse test circuit simulation is shown in chapter 5 while the parametric analysis is presented meanwhile in order to investigate the influence of each model and circuit parameter on device behavior. Examples of other operation modes for the IGBT module are presented in chapter 6. Chapter 7 then introduces how to aid the convergence in model implementation in Pspice environment. Afterwards, this model is put into a simplified arm simulation to observe its series-connection performance in converter station, which is illustrated in chapter 8. The minimum requirement is to achieve at least 8 IGBT in series together with their free-wheeling diodes i.e. a half cell. Finally, the discussion, conclusion as well as ideas regarding to possible future work are given in chapter 9, 10 and 11. 3 Chapter 2 Basis for the project development 2.1 StakPak IGBT module ABB StakPakTM K Series Press-Pack IGBT with voltage rating of 4.5 kV and current rating of 2.0 kA is what being investigated in this thesis. Figure 2.1: A hierarchical structure of StakPak IGBT module. The StakPakTM IGBT module is expensive with complex packaging and made for series connection. ABB is the only supplier as well as customer of it in nowadays power semiconductor market. Each sub-module consists of six IGBTs and six diodes in parallel and the six sub-modules are connected in parallel to constitute the entire IGBT module. Therefore, a total of 36 IGBTs and 36 diodes are embedded in the StakPakTM IGBT module. An advantage is that the number of sub-modules can be adjusted from two to six to follow different requirements for HVDC-VSC converter applications. 4 ABB Generation 4 HVDC-VSC Converter (HVDC Light) is a cascaded two-level converter with much lower converter losses than previous generations. It has 6 valve arms in total, one of each containing 36 cells, the interval structure of one cell is illustrated in figure 2.1. Inside each cell there are 16 series-connected IGBT power modules, but for simplicity every power module is represented by only one single IGBT and corresponding diode in the figure. Similarly, in the full scale converter simulation, constructing a complete model for a whole power module is unnecessary from both simulation time and cost points of view. Therefore, the single pulse test circuit for testing the IGBT model feasibility is only conducted in the IGBT die level, not the sub-module or module level. A pair of paralleled IGBT and its free-wheeling diode replace an entire StakPakTM module. The working principle of test circuit is explained in detail in chapter 2.2. 2.2 Single pulse test circuit It is common to use the single pulse switching test circuit to observe the behavior, especially the switching behavior of an IGBT. The circuit consists of a voltage supply VS , a stray resistance RS and inductance LS , a load resistance RL and inductance LL , one upper and lower paralleled IGBT and diode as well as their gate units. The upper IGBT and the lower diode are usually disregarded since they are always in off state and do not have much impact on the simulation results. Therefore, the figure below which shows the structure of the test circuit uses dashed line to represent their inexistence, only the upper freewheeling diode and the lower IGBT remained. The simplification can not only reduce the complexity of the circuit but also alleviate the convergence problem. Figure 2.2: The single pulse test circuit in Pspice. It can be seen that when lower IGBT turned on, current is flowing through the 5 load inductance to the IGBT while the diode is in reverse off state, as the blue loop shows. Then the IGBT is turned off and the load current commutes from the IGBT back to the diode, following the red loop. Since we are not focusing on how the gate unit works, a simple voltage source is applied in the figure, which can be replaced by other gate units as well to control the IGBT switching. 6 Chapter 3 Diode model 3.1 Model description Since anti-parallel diode is also a key component in the StakPakTM IGBT power module, the diode model is important in obtaining correct transient characteristics. A simple way to model the diode is to regard it as blocking in the reverse direction and the current as a function of the voltage drop in the forward direction, as described by the Schottky diode equation below: qV ID = IS [e kT − 1] (3.1) However, this equation neglects the reverse recovery of diode, which accounts for the overshoot of collector current IC at the end of turn-off in the single pulse test simulation. To include the reverse recovery, a better model derived from semiconductor charge transport equations is extended from the basic chargecontrol diode model. In order to achieve the high level injection of carriers in the drift region, a high voltage p − i − n configuration is used for power diodes. According to [6], the original simple charge-control diode model only contains one storage node, so if the charge node becomes exhausted during reverse conduction, the diode will immediately turn to blocking. In our thesis, to model the reverse recovery caused by charge diffusion from the center of i region, a lumped charge method is used for the existence of diffusion current. Then, when being subjected to a reverse voltage, additional free charges will be left in this region and have to be removed before the diode turned off. Therefore, a simple diode model with reverse recovery can be described by the equations below [6]: iD = qE − qM TM qM (qE − qM ) dqM + + dt τ TM vD qE = IS τ [exp( ) − 1] nVth 0= 7 (3.2) (3.3) (3.4) where qE , qM are two substitution variables which represent two excess stored charges q0 , q2 , TM is the substitution variable which represents the approximate diffusion time across the region q2 , IS is the diode saturation current, τ is the lifetime, n is the emission coefficient, iD is the diode current and vD is the diode voltage. The steady-state DC forward I-V characteristics can be derived from (3.2) (3.3) (3.4) as: iD = vD IS [exp( ) − 1] TM nVth 1+ τ (3.5) If TM is set to be zero, the equation is same as Schottky diode equation (3.1). 3.2 Parameter extraction Two measurement setups have to be considered for parameter extraction: a static I-V characteristic and a turn-off switching. Iterative approach is used to fit the parameters, as explained later in chapter 4, until the agreement with measurements achieves the accuracy. The waveform of diode reverse recovery current at inductive load turn-off switching is roughly shown in figure 3.1 [15]. Figure 3.1: The diode reverse recovery current during turn-off switching. To extract the parameters TM and τ , the constants T0 , T1 , IRM , di/dt as well as the point p are supposed to be derived from the figure above, among which a = di/dt is the slope of the line from t = 0 to t = T1 . Thus, i(t) = IF + (di/dt)t during the linear part. Equation (3.6) describes the depletion of qM during the straight line from t = 0 to t = T1 , when the diode has low impedance. At t = T1 , qE (T1 ) = 0, v(T1 ) = 0, equation (3.7) describes the diode current when the recovery starts. Equation 8 (3.8) is the reverse current after t = T1 i.e. when the current is no longer dependent on the diode voltage and diode has high impedance. Equation (3.9) is modified from equation (3.6) at t = T1 by substituting qM (T1 ) = IRM TM and T0 = T1 −IRM /(di/dt). The reverse recovery time constant τrr can be measured directly from point p in figure 3.1, while lifetime τ obtained by equation (3.9) with a measurement of T1 and IRM . TM is then calculated from 1/τrr = 1/τ + 1/TM . More detailed process of parameter extraction can be found in [6] and [15]. t qM (t) = aτ [T0 + τ − t − τ exp(− )], for t < T1 τ qM (T1 ) I(T1 ) = −IRM = − , for t = T1 TM i(t) = −IRM exp(− t − T1 ), for t > T1 τrr IRM = a(τ − τrr )[1 − exp(− T1 )] τ (3.6) (3.7) (3.8) (3.9) The other two parameters, n and IS , are obtained from the figure of steady-state DC forward I-V characteristics. 9 Chapter 4 IGBT model 4.1 General description Darlington representation with a MOSFET as the driver and a BJT as the output is used here to represent the IGBT in figure 4.1 [13]. Therefore, the transfer characteristic is similar to that of the MOSFET, and the output characteristic is consistent with that of the BJT, but the input is changing from current to voltage. Figure 4.1: Darlington circuit of IGBT. The IGBT is regarded as the black box with three external nodes visible. The main structure of the behavioral model is shown in figure 4.2(a) [14], when figure 4.2(b) [14] shows the Hammerstein-like structure of collector current, which is composed by two voltage-controlled current sources. 10 (a) Main structure of the behavioral model. (b) Hammerstein like structure of IC . Figure 4.2: The structure of Hammerstein-like IGBT model. The model consists of two parts, static part and dynamic part. The equations that describe MOSFET in both linear and saturation regions and the equations that describe BJT in active region are used to model the static part. Since the model needs to reflect high-level injection associated with IGBT and the voltage drop in the extrinsic part of the IGBT, correction functions f1 and f2 are introduced instead other more complicated ways that based on physics model [17]. 4.2 DC model The typical output characteristics of our target IGBT is shown in figure 4.3 [20], according to datasheet. 11 Figure 4.3: The typical output characteristics of an IGBT. In the DC model, the DC collector current IDC = f (VCE , VGE ) is modeled and adapted from empirical MOSFET I-V characteristics: IDC (f V −V )2 kf2 [(VGE − VT H )(f1 VCE − VD ) − 1 CE2 D ], if VCE < VGE + VD − VT H 2 TH) = kf2 (VGE −V , if VCE > VGE + VD − VT H 2 0, if VGE ≤ VT H or VCE < VD where f1 and f2 are presented in polynomial forms to extend the MOSFET I-V characteristics for entire IGBT: 2 f1 = a0 + a1 VGE + a2 VGE (4.2) 2 b2 VGE (4.3) f2 = b0 + b1 VGE + VT H is the MOSFET channel threshold voltage, VD is the approximated turn-on voltage of the p+/n− junction and k = (1+β)kp is the process transconductance parameter where β is the current gain of BJT. The six constants a0 - a2 and b0 b2 can be extracted from three saturation data points (VGE , VCE (sat), IC (sat)) from the I-V curves of datasheets or measurements, according to two sets of equations below: f1 VCE (sat) = VGE − VT H + VD IC (sat) = k(VGE − VT H )2 f2 (4.4) (4.5) Therefore, with given k, VD and VT H , a total of six equations can be obtained, the first three from (4.4) are solved to get a0 - a2 while next three from (4.5) result in b0 - b2 . 12 (4.1) 4.3 Dynamic model In order to model the nonlinearities in IGBT transient waveforms, linear dynamic blocks in standard Hammerstein model become nonlinear by involving nonlinear elements (capacitors) in figure 4.2(a), and the dynamic blocks are achieved through RC low-pass filters in figure 4.2(b) which have different time constants at turn on and turn off. 4.3.1 Model of capacitors Nonlinear capacitors include the collector emitter capacitance Cce , the collector gate capacitance Ccg and the gate emitter capacitance Cge . Figure 4.4(a) [14] shows an equivalent IGBT model that includes these capacitances between the terminals. To extract them, three capacitance curves for the input capacitance Cies , the output capacitance Coes and the reverse transfer capacitance Cres are obtained from datasheet. In the experiments to test dynamic characteristics for a real IGBT, the input capacitance Cies is measured between the gate and emitter terminals with the collector shorted to the emitter for AC signals. The output capacitance Coes is measured between the collector and emitter terminals with the gate shorted to the emitter for AC voltages. And the reverse transfer capacitance Cres is measured between the collector and gate terminals with the emitter connected to ground. 13 (a) Equivalent IGBT model including capacitors between terminals. (b) Typical capacitances vs. collector-emitter voltage. Figure 4.4: The capacitance extraction of IGBT model. Coes and Cres are both highly dependent on the collector emitter voltage as shown in figure 4.4(b) [20], dropping quickly from over 100 nF to below 10 nF, which can be directly fitted by polynomial functions, look-up tables, or by some assumed nonlinear functions. Here polynomial functions are used for accurately approximate the nonlinear variation: Cres (VCE ) = Cres,0 (1 + VCE )−kres + Cres,high Coes (VCE ) = Coes,0 (1 + VCE ) −koes + Coes,high (4.6) (4.7) Since Cies is almost independent on VCE , it is assumed as constant in our model. Cies , Coes and Cres are combinations of Cce , Ccg and Cge . Conversely, the transformation from Cies , Coes and Cres to Cce , Ccg and Cge can be done by equations below: 14 Cce = Coes − Cres (4.8) Ccg = Cres (4.9) Cge = Cies − Cres (4.10) Thus, Cce , Ccg and Cge are all nonlinear models which have nonlinear capacitances versus collector emitter voltage. 4.3.2 Model of block h1 and block h2 From figure 4.2 we can see the collector current IC consists of a conduction component and a displacement component, U2 and U4 , which are voltage variables with current units. In figure 4.2(b), U1 = f (VCE , VGE ) which represents the instantaneous DC collector current and U3 = CCE (VCE ) d(VdtCE ) which is the current through CCE are followed by RC low-pass filter block h1 and h2 respectively, to obtain the conduction component U2 and displacement component U4 . Block h1 models the dynamics of the collector current IC during the constant collector voltage switching test (e.g. d(VdtCE ) = 0) when the collector terminal is connected directly to a DC source without load. Block h2 models the dynamics of the collector current IC (e.g. d(VdtCE ) 6= 0) when a resistive load is connected to the collector terminal. With them, the transient behavior of the IGBT can be described more precisely. The parameters R1 , C1 , CX in h1 and R2 , C2 in h2 have different values at turn-on and turn-off. R1 , C1 , CX represent the fast decay of IC at the beginning of turn-off and R2 , C2 represent the redistribution current as well as non-quasi-static time delay [18] [19]. Based on the process of parameter extraction in [16], normally, C1 , C2 are chosen as constant. During the constant collector voltage switching test, with fixed C1 , R1 and CX are modeled as below: R1 = CX = R1on , for VGE > VT H R1of f , for VGE ≤ VT H 0, for VGE > VT H ( 1−α α )C1 , for VGE ≤ VT H (4.11) (4.12) where α means the ratio of the collector current after and before the fast decay at turn-off transients. Similarly, with fixed C2 , R2 is modeled as below: R2 = R2on , for turn on transient R2of f , for turn off transient 15 (4.13) where turn-on transient is when VGE > VT H , dVCE /dt < 0 and turn-off transient is when VGE > VT H , dVCE /dt > 0 or VGE VT H , dVCE /dt < 0. An initial parameter set is obtained from the measurement setups in [16], then some iterative simulations are done and the results are used to compare with measurement data to further optimize the extracted parameters and improve the agreement with the measurements. Besides the model in figure 4.2, an alternative model is shown in figure 4.5 [14] with Hammerstein like structure of displacement component V4 replaced by a series capacitor and resistor, CCE and RCE . RCE is necessary here to represent the non-quasi-static time delay of block h2 . In this case, with the assumption RCE CCE ≈ R2 C2 , RCE is obtained by RCE ≈ R2 C2 /CCE , which also has different values at turn-on and turn-off transients. (a) Main structure of the alternative model. (b) Hammerstein like structure of IC . Figure 4.5: The structure of alternative Hammerstein-like IGBT model. 4.3.3 Model of time delay block Since the behavior model consists of only capacitors and voltage-controlled current sources in main structure, it is unable to capture the turn-off time delay due to the insufficiency of gate-emitter capacitance Cge . In the initial part of turnoff, when the gate terminal receives the turn-off signal from driver, Cge starts to discharge and gate-emitter voltage VGE starts to drop, the slope of which depends on the value of capacitance. With discharging, VGE will be lowered to a constant level and remain at this level while the collector-emitter capacitance Cce is charged to the full blocking voltage. The turn-off time delay is the time from receiving turn-off signal to VGE dropping to the constant level, which relates to the slope of VGE dropping at the initial part of turn-off. Since the value of Cge is only several nF during that period, the discharge is very quick, making the slope almost vertical and the time to reach the constant level too short. Therefore, to aid this problem, the value of Cge needs to be increased at the initial part of turn-off. 16 Many ways to implement the additional capacitance block Cge parallel were tried, one of the most useful is to connect a GVALUE block (shown in figure 4.6) in parallel with Cge to produce the time delay. Only when VGE > VT H and DDT (VGE ) < 0 (i.e. the dropping period of VGE ) the capacitance block Cge parallel has positive value. During other period it equals to zero. Figure 4.6: ABM block to implement the turn-off time delay. Some trials have been done to find the suitable value of Cge parallel . With a value of approximately 1 µs, the time delay much more resembled the simulation for real IGBT. However, convergence problem always came in series connection and could not be avoided. Because of the convergence issue brought by Cge parallel , the idea to achieve a good accuracy of the time delay was given up. Furthermore, the effect of accurate and inaccurate time delay in the simulations of EMC studies can be accounted for as long as a same time delay is used for all the IGBTs. 17 Chapter 5 Simulation results First of all, according to the calculation process described in chapter 3 and 4, followed by comparison with single pulse data of StakPakTM 4.5 kV and 2.0 kA IGBT power module, all the IGBT, diode and circuit parameters can be extracted in order to fit different characteristics. The DC characteristic is first presented in chapter 5.1 then the single pulse switching test circuit is simulated with simple voltage gate in chapter 5.2.1. Afterwards, the simple current source gate as well as complex gate unit built in [12] which much resembles the real ABB one is implemented in chapter 5.2.2 and 5.2.3 to see the IGBT/diode performance with more accurate driving strategy. 5.1 DC characteristics Before the dynamic behavior investigation, the static characteristics of collector current versus gate-emitter voltage at constant collector-emitter voltage, and collector current versus collector-emitter voltage for a series of constant gateemitter voltage, are investigated. Besides, the forward I-V characteristic of diode model is simulated. Figure 5.1 shows the setup circuit for static characteristics, gate and collector are both connected to a constant voltage source. Figure 5.1: The Pspice schematic of static characteristics circuit. 18 5.1.1 IC versus VGE The first test is IC versus VGE which varies from 7 V to 14 V when VCE is fixed at 15 V. From figure 5.2, the comparison between the measurement data presented in datasheet [20] and the simulation, a good agreement can be obtained which indicates the good accuracy of the parameter set. Figure 5.2: Static characteristic of collector current versus gate-emitter voltage at constant collector-emitter voltage of 15 V. Parametric analysis is run among all the model parameters to get analytical trend of the static behavior, from which the parameters mostly affect the static characteristic of the IGBT model is the MOSFET channel threshold voltage, process transconductance parameter and the current gain of BJT transistor. The parametric sweep in appendix B.1 shows the way to tune the parameters to fit different operation modes or devices with different voltage and current ratings. The suitable applicability of these parameters can be observed as well. 5.1.2 IC versus VCE The second test is IC versus VCE at a range of 0 V to 6 V when VGE is fixed at four different values: 9 V, 11 V, 13 V and 15 V. Similarly, the comparison of this characteristic is given in figure 5.3. The simulation has satisfactory agreement with the measurement at middle-high current levels and in low current level the characteristic could be improved by sacrificing the accuracy at high collectoremitter voltage level, which is superfluous since the model will be applied in high collector-emitter level. One thing that needs to be considered is that such a parameter set that gives agreement for static behavior may bring unfair agreement for dynamic behavior. Additionally, since in my thesis the aim of this model is to serve for EMC studies 19 in switching simulation, dynamic behavior obtains most attention and has the priority at tuning the parameters compared to static behavior. Therefore, later when tuning a specific parameter set for single pulse switching simulation, the values of some parameters are changed from here and the accuracy of the static behavior is sacrificed. Figure 5.3: Static characteristic of collector current versus collector-emitter voltage for a series of constant gate-emitter voltage at 9 V, 11 V, 13 V and 15 V. Same parametric analysis is conducted for all the model parameters and the results is presented in appendix B.2. As can be seen, besides the three parameters discussed above, the approximated turn-on voltage of the p + /n− junction also has impact on the conducting point from off-state to conducting state. Since these parameters has big influence on the dynamic behavior as well, they have to be extracted again later based on the dynamic measurement data. The static characteristic will be sacrificed since according to goals of simulation the mismatch can be neglected to some extent. 5.2 5.2.1 Dynamic characteristics Voltage driving A rectangular pulse voltage source is used first to control the IGBT gate, which has −5 V low voltage level and 15 V high voltage level. However, since in Pspice the source is not a fully ideal step-shaped rectangular pulse but a trapezoidal pulse instead, a rise and fall time of 100 ns must be considered. Besides, in the simulation the IGBT is turned on at 1 µs and turned off at 21 µs. The basic case, 2.0 kA and 2.8 kV, is the standard operation mode for StakPakTM IGBT module. It is used as a reference for comparison with other operation 20 modes in order to show the influence of some parameters on the IGBT behavior and further optimize the design of IGBT model. Load current is also regarded as the diode free-wheeling current that is the initial current flowing through the load inductor realized by defining the IC parameter. The Pspice schematic of single pulse test circuit with rectangular voltage source is shown in figure 5.4 and the simulation results are presented in figure 5.5. Figure 5.4: The Pspice schematic of single pulse test circuit with rectangular voltage source. 21 (a) Source voltage pulse (dotted line), gate-terminal voltage (solid line) and current through gate terminal (dashed line). (b) Collector-emitter voltage (solid line) and collector current (dashed line). Figure 5.5: Simulation results under standard operation mode with voltage source driving. The transition has similar behavior with a real IGBT power module. Therefore, the validation of the work of IGBT model can be obtained qualitatively, as well as the diode model given by the reverse recovery current at IGBT turn-on. In addition, it is obvious that the gate terminal has capacitive behavior and the shape of voltage waveform is related to the value of gate resistor. To improve the agreement between simulation and measurement, parameters need to be tuned so parametric analysis must be done to invest which parameters have obvious impact on dynamic behavior, including all the circuit parameters (e.g. stray inductance and gate resistance) and IGBT/diode model parameters. Appendices B.3 and B.4 show some examples of parametric analysis for turn-on and turn-off, respectively. A table is given to illustrate which parameters have influence on the turn-on transient and which affect turn-off. As seen, the gate resistance, diode diffusion transit time, on-state resistance of h1 block and the current gain of BJT transistor all can influence turn-on. Meanwhile, the stray inductance, ratio of IC after and before the fast decay at turn-off, on-state as well as off-state resistance of h1 block all have great impact on turn-off. None of the diode parameters affect turn-off behavior. 22 Table 5.1: Scope of influence of different parameters on the dynamic behavior. Parameter Rg LS kp β VT H α Scope Turn on & off Turn on & off Turn on & off Turn on & off Turn on & off Turn off Parameter tau ttd R1on R1of f R2of f 23 Scope Turn on Turn on Turn on & off Turn off Turn off 5.2.2 Current driving Since the IGBT device is controlled by charge in nature, to reproduce a better and more practical driving strategy, a step pulse current source is adopted. When the stimulus current is constant, the rate of charge injecting depends on the current value. Once the charge injected into gate reaches the threshold, IGBT is switched from off to on state. Thus, if corresponding voltages and currents have good behavior, the model could be more strictly verified. Based on [12], two anti-paralleled current sources are necessary, as in the standard operating mode in figure 5.6. One responsible for injecting charges into gate i.e. turn-on transition, and another responsible for extracting charges out of gate i.e. turn-off transition. A rise and fall time of 10 ns as well as a magnitude of 6 A is used for both current sources. Since there is no constraint on gate terminal voltage as in voltage source driving, to get the correct high and low clamping gate voltage, two Zener diodes are put back to back in series with breakdown voltage of 15 V for upper one and 5 V for lower one. An initial value of gate node voltage is set by part IC for the simulator to do the initial bias point calculation. Parameters have to be adjusted accordingly due to the change of the driving method in this chapter and simulation results are given in figure 5.7. Figure 5.6: The Pspice schematic of single pulse test circuit with constant current source. 24 (a) Source current pulse (dotted line), current through diodes (solid line) and gate terminal voltage (dashed line). (b) Collector-emitter voltage (solid line) and collector current (dashed line). Figure 5.7: Simulation results under standard operation mode with current source driving. From the gate terminal, it can be seen that the charging and discharging of gate-emitter voltage i.e. the capacitive behavior of the IGBT, is reproduced successfully, which means the current driving is also reliable in simulation and can replace the voltage source driving. Note that the charging speed varies with the magnitude of current pulse: higher the current is, faster the switching is. Once again, parametric analysis is conducted with examples in appendix B.5 to roughly show the impact of different model and circuit parameters. Some of them such as stray inductance have influence on both turn-on and off while some affect only turn-on (e.g. diode minority carrier lifetime) or turn-off (e.g. on and off state resistance of h1 block). 5.2.3 Complex ABB gate unit model To better obtain and the model behavior and fit the measurements, a more realistic gate unit could be implemented to replace the simple voltage or current source driving. A complex ABB gate unit model based on current driving strategy has been developed in [12]. Figure 5.8 is the single pulse test circuit schematic with the complex gate unit model. 25 Figure 5.8: The Pspice schematic of single pulse test circuit with ABB gate unit model. Since only the switching of IGBT is concerned, many parts of the gate unit (e.g. supply voltage regulators and optical interfaces) have no need to be considered. Through the feedback of collector-emitter and gate-emitter voltages, paralleled current sources are controlled to turn on or turn off independently, making the total of output current of the gate unit automatically allocated to different levels. A detailed description of the gate unit can be found in [12]. Correct high and low clamping gate voltage is crucial for the IGBT to perform correct dynamic behavior. First the same principle as in the real ABB gate unit is tried, by controlling a two-level voltage source connected to the gate. But it turns out that other methods have to be considered since the digital controller is very complex and time-consuming to be implemented in Pspice, the most feasible way is using Zener diodes as in chapter 5.2.2. The high voltage clamping at 15 V succeed with the first Zener diode, but a second one for the low voltage clamping at −5 V failed with unavoidable convergence problems. Therefore, the low voltage clamping is only −1 V in this gate unit model. 26 Table 5.2: The entire parameter set extracted with the ABB gate unit model. (a) IGBT parameters. Parameter kp β VT H VD a0 a1 a2 b0 b1 b2 Cres,0 kres Cres,high Value 1V 170 7V 0.7 V 1.73 0.21 0.01 4.23 0.49 0.02 400 nF 1.56 3.2 nF Pspice name kp beta Vth Vd p0 p1 p2 q0 q1 q2 Cres0 kres Creshigh Parameter Cge1 Coes,0 koes Coes,high Cies C1 R1on R1of f α C2 R2on R2of f Value 30 nF 340 nF 1.57 10.4 nF 220 nF 1 nF 62.1040 Ω 51.1062 Ω 0.14864 1 nF 50 Ω 50 Ω Pspice name Cge1 Coes0 koes Coeshigh Cies c1 r1on r1off alpha c2 r2on r2off (b) Diode parameters. Parameter IS tau Cj0 mj Rs Vj n ttd fc Value 5.158 × 10−9 A 2.101 56 × 10−6 s 0 nF 0.5 220 × 10−6 Ω 1V 2.64 1.2917 × 10−6 s 0.5 Pspice name isaturazione taud cj0d mjd rsd vjd ndiodo ttdi fcdiode (c) Circuit parameters. Parameter Rg LS RS LL RL VS Iload Value 0.1 Ω 150 nF 100 mΩ 250 µF 1 mΩ 2800 V 2000 A Pspice name Rg Ls Rs Ll Rl Vce IC All the IGBT, diode and circuit parameters with the ABB gate unit model are presented in table 5.2(a), (b) and (c). This parameter set is extracted from single pulse clamped inductance switching at basic case: 2.8 kV supply voltage and 2.0 kA load current, combined with static DC characteristics of collector current versus gate-emitter voltage and collector-emitter voltage. Note that in the block of Cge in figure 4.2, to fix the low derivative of collector current at turn-off, an additional IF function is applied so when the gate-emitter 27 voltage is below the constant level, Cge is decreased to Cge1 to faster discharge leading to a higher derivative. Once the entire parameter set has already been accurately extracted, the simulation results with complex ABB gate unit are shown in figure 5.9 and figure 5.10, compared with single pulse test measurement data. Figure 5.9: Turn-on simulation results under standard operation mode with ABB gate unit model: collector-emitter voltage and collector current. Figure 5.10: Turn-off simulation results under standard operation mode with ABB gate unit model: collector-emitter voltage and collector current. 28 A good agreement between simulation and measurement can be observed, especially for turn-on. However, in simulation there is an apparent time lead at turn-off, because of the small gate-emitter capacitance, which causes rapid decrease of gate-emitter voltage at initial part of turn-off. But it can be disregarded since what we concerned is the derivative rather than the accurate time to start turn-off, and the time difference can be estimated and predicted. In addition to the IGBT voltage and current variations at switching, the diode reverse recovery characteristic is also investigated and presented in figure 5.11. The big oscillation in measurement is something unwanted and comes from diode turn-off where the charges suddenly disappear in a snappy way. The measurement tried to make the diode softer during reverse recovery to minimize oscillation, which has not been successful at all conditions. It can be triggered by a snappy diode due to the internal chip structure giving capacitive behavior together with the mechanical layout giving inductances. Especially at cold device (room temperature), high voltage and low current it still appear on the 4.5 kV and 2.0 kA StakPakTM IGBT power module. A physical behavior simulation tool is mandatory in order to model this big oscillation. Therefore, it is disregarded in my simulation. Figure 5.11: Simulation results of diode reverse recovery under standard operation mode with ABB gate unit model. 29 5.2.4 Frequency domain results To see the frequency content of the IGBT and diode model, time domain simulation results are transformed into frequency domain by fast fourier transform (FFT) in MATLAB. FFT represents the frequency composition of the time signal in a block of time data points. In FFT computation, a periodic time frame signal is assumed in every data block so as to identify the frequency content of the measured signal. However, when computing a non-periodic signal a leakage yields in the frequency spectrum, causing the signal energy smearing out over a wide frequency range rather than a narrow range and the amplitude lower than expected value. To identify the frequency content becomes much more difficult with the leakage. A window function is used to correct the leakage, by multiplying with the time data block and forcing the time signal to be periodic. Hann window function is chosen since it has good frequency resolution, good spectral leakage, fair amplitude accuracy and best for random signal type [21]. A special weighting factor is also needed to recover the correct FFT signal amplitude after windowing. Below is the collector-emitter voltage and collector current comparison between simulation and measurement at both turn-on and turn-of in figure 5.12 and 5.13. The simulation obtains really good agreement with measurement especially in the range from 10 kHz to 1 MHz, after which there is a slight difference which still does not go beyond the maximum applicability limit. Around 10 MHz a big and continuous oscillation starts in the measurement resulting from the highfrequency interference during experiment. This interference is generated from the environment and apparatus which is kind of hard to reproduce in Pspice simulator. However, since in EMC studies the frequency range concerned is only from 10 kHz to 10 MHz, the high-frequency interference part over 10 MHz can be disregarded. 30 (a) Collector-emitter voltage. (b) Collector current. Figure 5.12: Turn-on comparison under standard operation mode with ABB gate unit model in frequency domain. 31 (a) Collector-emitter voltage. (b) Collector current. Figure 5.13: Turn-off comparison under standard operation mode with ABB gate unit model in frequency domain. 32 Chapter 6 Different operation modes In order to test the possibility of this model being applied to different IGBT modules with different voltage and current ratings in the future, first we need to evaluate the performance of the model under different operation modes for 4.5 kV and 2.0 kA StakPakTM IGBT module. Simulations with varying load current and supply voltage, Iload and VS , have been performed in the same single pulse test circuit. One more operating mode example is given in this chapter: 3.6 kV and 1.2 kA. Table 6.1: Parameter variation from table 5-2 for 3.6 kV and 1.2 kA operation mode. Parameter Rg LS RS Old value 1.2917 × 10−6 s 2800 V 2000 A New value 6.2917 × 10−6 s 3600 V 1200 A Pspice name ttdi Vce IC To fit the measurements well, the process of accordingly adjusting the parameters is repeated again as in chapter 5.2.3. Above are all the parameters that changed from the 2.8 kV and 2.0 kA operation mode. 33 Figure 6.1: Turn-on simulation results under 3.6 kV and 1.2 kA mode with ABB gate unit model: collector-emitter voltage and collector current. Figure 6.2: Turn-off simulation results under 3.6 kV and 1.2 kA mode with ABB gate unit model: collector-emitter voltage and collector current. 34 Figure 6.3: Simulation results of diode reverse recovery under 3.6 kV and 1.2 kA mode with ABB gate unit model. 35 (a) Collector-emitter voltage. (b) Collector current. Figure 6.4: Turn-on comparison under 3.6 kV and 1.2 kA mode with ABB gate unit model in frequency domain. 36 (a) Collector-emitter voltage. (b) Collector current. Figure 6.5: Turn-off comparison under 3.6 kV and 1.2 kA mode with ABB gate unit model in frequency domain. From both the time and frequency domain simulation results, it is verified that under 3.6 kV and 1.2 kA mode, the models still have similar dynamic behavior as real IGBTs and diodes, which gives a strong confirmation to extend the power application range of the models in future work. 37 Chapter 7 Convergence issues There are always initial oscillations at collector current IC and collector-emitter voltage VCE when simulation starts in single pulse test circuit, only after some time the oscillations can disappear and the waveform can back to normal condition. The reason is, at t = 0, the derivative of current and voltage increase suddenly from zero to a very high value. Since the current through nonlinear capacitors equals to the capacitance times derivative of voltage drop, it changes dramatically during the beginning of simulation, introducing extra oscillations. To avoid these initial oscillations, the high derivative at t = 0 has to be eliminated, therefore, a STP function which suppress a value until a given amount of time has passed [22] is applied with the following expression in each ABM block. ST P (T IM E − 2000 ps) = 0, T IM E ≤ 2000 ps 1, T IM E > 2000 ps (7.1) As the Ccg block shows below, before 2000 ps the derivative always equals to zero so the high derivative of current and voltage at the beginning is removed from simulation. Figure 7.1: The example of STP function in capacitance Ccg . 7.1 Useful convergence solutions If the circuit fails to converge, first the circuit topology and connectivity as well as modeling of circuit components (e.g. semiconductors and behavioral modeling expressions) should be checked, then the setting of Pspice options. 38 In Pspice options, there are a lot of parameters which can influence and determine the accuracy of the simulation results. By changing their values, the convergence of the implemented circuit can be improved. Consider our specific IGBT and diode models, the following convergence strategies are applied to aid the convergence: • Taking strong nonlinearities and multiple cross references between different blocks into account, a big resistor is placed in parallel with each ABM block to ensure a DC path and the bias point (DC) convergence. • Set reasonable values for parasitic circuit parameters, e.g. stray inductance and resistance. • Set the rise and fall time of stimuli to be 100 ns, avoid too high derivative values. • Set realistic model parameters for semiconductors, e.g. junction built-in potential of diode. • The output of all behavioral modeling expressions must be within the range +/- 1e10, since the voltage and currents in Pspice are limited to this range. • Restrict behavioral modeling expressions. Use the LIMIT function to keep output within realistic bounds, not over the limited range. • Relax the RELTOL restriction from the default value 0.001 to 0.05. It could bring the loss of the relative accuracy of voltages and currents, but given that the loss is not considerable and instead it will increase the simulation speed by 10% to 50%, therefore, it is recommended in this case. However, set RELTOL to a value either less than 0.001 or more than 0.05 is not recommended, since extra convergence problems may arise. • Relax the ABSTOL restriction from the default value 1 pA to 1 µA. This will aid the convergence a lot since 1 pA for absolute branch current tolerance is too strict in power electronics circuit, and the accuracy doesnt need to be that high. • Relax the VNTOL restriction from the default value 1 µV to 10 µV. Since with default value there is always convergence problem in transient analysis, said that the time step is smaller than minimum allowable step size, the absolute node voltage tolerance has to be relaxed. • SET IL4 from default value 10 to 100. This increases the number of transient iterations the simulator attempts at each time point before it gives up. • Adjust the maximum time step size to 0.01 microseconds or smaller, forcing the simulator to have a constant time step value. Some step values can effectively avoid certain non-converge points. 39 • Tick on GMIN stepping to improve the convergence. • Tick on preordering to reduce the matrix fill-in. • Use AutoConverge when above-mentioned solutions are not enough to solve all the convergence problems. 40 Chapter 8 Application in arm simulation for demonstration Now with the behavioral model developed in this thesis, accuracy has been achieved. To test the created models in series connection, a much more simplified arm simulation is adopted instead of the full scale Light Generation 4 converter simulation. Only one of all the six arms in the converter is involved in the simulation which contains 36 cells. A figure of the simplified arm simulation composition is drawn in figure 8.1. From the figure all the cells except cell 9 disregard the IGBTs and diodes. These cells are assumed to be bypassing the cell capacitor and hence only represented by an inductor. In switch 1 of cell 9, 8 simple switches and 8 anti-paralleled simple diodes are substituted by corresponding IGBT and diode models. While in switch 2, only 8 series connected diodes are included. 41 Figure 8.1: The simplified arm simulation composition of the full scale Light G4 converter. A shield is included in each cell to smooth out the electrical field towards the grounded potential surfaces. There are stray capacitances from these shields to the ground. When we switch the semiconductors, we get a very fast change in the current and voltage i.e. high derivatives. This leads to high-frequency harmonics in the current. Without stray capacitances to ground, the currents through source voltage and terminate resistor should be same after switching. However, with stray capacitances, which acts as low impedance path for these high-frequency currents flowing to ground, the currents through source voltage and terminate resistor are not same anymore. In a real HVDC converter station we minimize the current flowing through stray capacitances by using some damping circuit. Therefore, by measuring the stray current at the main path in the simulation, that is the current difference between voltage source and terminate resistor, the performance of semiconductor models are well evaluated. Inside switch 1, the 8 IGBTs are driven by simple voltage source gate in chapter 5.2.1. At first we were trying to use the complex gate unit model in chapter 5.2.3, but unfortunately the simulation time is infinitely long, therefore, the simple voltage source gate is a better choice. By adjusting parameters, the single pulse test simulation which fits the measurement best is shown in figure 8.2 with simple voltage gate under standard operation mode. 42 (a) Turn-on. (b) Turn-off. Figure 8.2: Single pulse test results of collector-emitter voltage and collector current with voltage source driving under standard operation mode. Figure 8.3 shows the turn-on and turn-off waveforms across one IGBT in switch 1 of cell 9. The comparison is between IGBT and models of this thesis against the simple switches and diodes used prior to this thesis. Figure 8.4 presents the difference between current through voltage source and through terminate resistor i.e. the stray current. Figure 8.5 gives the results of stray current in frequency domain. 43 (a) Turn-on. (b) Turn-off. Figure 8.3: Voltage and current Waveforms for IGBT and diode models compared with simple switches and diodes in time domain. Obviously, with simple switch and diode the switching finishes instantaneously with unfeasible infinite current and voltage derivatives. With the IGBT/diode models in this thesis the derivatives are much closer to the measurement. Meanwhile, the significant peak brought by bypassing inductor at turn-off is eliminated by new models. Reverse recovery characteristic and the overshoot of current at turn-on transient are introduced as well by new models. 44 (a) Turn-on. (b) Turn-off. Figure 8.4: Stray current waveforms for IGBT and diode models compared with simple switches and diodes in time domain. Modeling semiconductors correctly is important, since the stray current is strongly affected by the way of modeling. Obviously the simple switch and diode give higher amplitude and less damped currents while new models give lower amplitude and more damped currents through stray capacitances. It is also concluded that switching goes back to static state more quickly under new models with more stable performance. Furthermore, turn-on has smaller stray current than turn-off after switching. 45 (a) Turn-on. (b) Turn-off. Figure 8.5: Stray current waveforms for IGBT and diode models compared with simple switches and diodes in frequency domain. Above gives the amplitude of stray current at the valve arm in frequency domain. The amplitude with simple switch and diode are much higher than with IGBT and diode models, especially around the neighbor of 1 MHz. In the high frequency region it is obvious that simple switch and diode result in more severe disturbance which does not exist in real measurements and will lead to inaccurate EMC analysis. To observe the improvement more clearly, an extra damper of 80 pF is added 46 in each cell to further damp the high-frequency harmonics and obtain a much smaller stray current at main path as in figure 8.6. Again, turn-on has better damping performance than turn-off. Now, we can say that the new IGBT and diode models achieve series-connection, simulation speed, convergence and enough accuracy at the same time. (a) Turn-on. (b) Turn-off. Figure 8.6: Stray current waveforms including extra damper for IGBT and diode models compared with simple switches and diodes in frequency domain. 47 Chapter 9 Discussion The tail voltage at the end of turn-on is absent in this IGBT model, instead a rather sharp voltage drop is observed as in the comparison figure 5.14. Some trials has been done to smooth the drop and lower its derivative, however, considering the possible convergence issue brought into series connection, it is not worthy to include a big capacitor to introduce the tail voltage. An underestimation of switching losses will also occur because normally there are some tail losses in the real IGBT. However, since the accurate power losses in the semiconductors do not play a significant role in the EMC studies, the tail voltage can be disregarded. Another drawback is the too sharp current peak during turn-on compared to the measurement, an inductor is recommended to be added between emitter and collector to smooth the sharp current peak. But no matter how big the inductor is the peak cannot be improved well. We have not found a proper way to obtain an apparently more flat overshoot yet. Compared to the behavioral IGBT model, the diode model is a physical one based on the lumped charge method which has a really good reverse recovery behavior during IGBT switching. To directly see what is good and what is limited, the new modeling way is compared back with lumped charge models in Muhammd Nawaz’s IGBT platform in different aspects as shown in table 9.1 and 9.2. 48 Table 9.1: Differences/Similarities between lumped charge model and new model. Differences Similarities Lumped charge model Physical model based on lumped charge approach 17 parameters for IGBT In the charge level Charge equations embedded into the equivalent circuit, 31 equations in total New model Behavioral model 25 parameters for IGBT In the voltage/current level Darlington representation with a DC part and a dynamic part Extract parameters through: Extract parameters through: DC I-V characteristics; DC I-V characteristics; capacitance curves; inductance load switching plot; Vce switching test gate charge plot with/without resistive load Implement a complex ABB gate unit model with ABS blocks Use the same physics-based simple diode model with reverse recovery (by Lauritzen [6]) Table 9.2: Advantages/disadvantages of lumped charge model and new model. Simulation speed Series connection Parameter extraction Accuracy Lumped charge model Slow, infinitely long simulation time for simplified arm simulation Convergence fails when series connection, even for a half cell Complex experiments and time-demanding calculation Highly accurate, given the physical structure and the equation sets Precise time delay at turn-off Precise tail currents/voltages Application range Widely validated New model Fast, less than 20 minutes for simplified arm simulation Enable series connection for at least 8 IGBTs and their anti-parallel diodes Easy experiments and simple post-process of data Less accurate, but enough for EMC studies where speed and convergence are most important Lack of time delay at turn-off which is not concerned Lack of tail voltage and too sharp current peak To be investigated From the two tables above, the benefits of new model are obvious but at the same time its limitation needs attention as well. In order to enable series connection and solve convergence issue some minor parts of dynamic behavior are sacrificed and disregarded. Therefore, in application which requests high accuracy rather than simulation speed and no multi-occurrence required, the model might not be suitable and instead Muhammads physical one obtains better results. Moreover, it applies only to power electronic devices, and for other types of semiconductor 49 devices besides StakPakTM 4.5 kV and 2.0 kA IGBT power module, parameters have to be tuned once again and the use needs further validation. For model users in the future, three things to be noticed: for every different operation mode, the parameter set has discontinuity and extraction has to be repeated even within one specific device; the temperature dependence is not considered in the model building and testing; the accuracy does not support the loss calculation and estimation for power modules. Furthermore, in this thesis work, all the simulations that have been conducted as well as their pros and cons are summarized in table 9.3. Table 9.3: Advantages/disadvantages of all the simulations from previous chapters. Single pulse simulation Simple structure, an easy way to test IGBT/diode model Advantages correctness and accuracy Cannot reproduce the actual switching behavior Disadvantages and disturbances in real converter station Simplified arm simulation for demonstration Necessary for testing the ability of series connection Advantages and the general EMC performance of the converter station Complicated, high requirements for IGBT/diode model Disadvantages (not too advanced and at the same time not too simple) 50 Chapter 10 Conclusion With previous physical IGBT and diode model based on Lauritzen lumped charge method which built by Muhammad Nawaz, the process to extract parameter set for IGBT and diode in 4.5 kV and 2.0 kA StakPakTM IGBT module is too time-consuming and tedious for engineers to apply and adapt. And the complicated internal composition makes the simulation of full scale Light Generation 4 converter for EMC studies always fail with convergence issue. In this report, a simpler behavioral IGBT model is created which captures the basic behaviors of currents and voltages at commutation events in both time and frequency domain very well, especially when driven by the complex ABB gate unit. The convergence is tested and verified in a simplified arm simulation, achieving 8 IGBTs in series connection with anti-paralleling diodes. Therefore, the IGBT model is highly recommended to be applied in the Light Generation 4 converter EMC simulation, considering the reduction of stray current as well. Parametric sweep is also performed among all the circuit and model parameters in order to investigate their influence on the device behavior and limits of applicability, for future use in other types of semiconductor devices in addition to StakPakTM 4.5 kV and 2.0 kA power module. 51 Chapter 11 Future work The manual parameter extraction procedure can be adjusted to become an automatic procedure which save the time and lessen the workload at the same time. And the accuracy can be improved by ameliorating the internal structure of the IGBT model e.g. fixing the tail voltage at turn-off and the too sharp current peak at turn-on. The performance of the complex ABB gate unit model can be improved, such as the negative clamping, to be better consistent with the experimental behavior. Last but not the least, the application range of the IGBT model is supposed to be investigated, to maximize the use in the future, not only for Light Generation 4 converter system, but also for Generation 5. 52 Bibliography [1] A. R. Hefner, “An improved understanding for the transient operation of the power insulated gate bipolar transistor (igbt),” in Power Electronics Specialists Conference, 1989. PESC ’89 Record., 20th Annual IEEE, Jun 1989, pp. 303–313 vol.1. [2] ——, “An investigation of the drive circuit requirements for the power insulated gate bipolar transistor (igbt),” Power Electronics, IEEE Transactions on, vol. 6, no. 2, pp. 208–219, Apr 1991. [3] A. R. Hefner and D. Diebolt, “An experimentally verified igbt model implemented in the saber circuit simulator,” in Power Electronics Specialists Conference, 1991. PESC ’91 Record., 22nd Annual IEEE, Jun 1991, pp. 10–19. [4] C. Mitter, A. Hefner, D. Chen, and F. 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Hollander, “Modeling of an igbt and a gate unit,” Master’s thesis, Royal Institute of Technology,XR-EE-E2C 2013:001, 2013. [16] J. Hsu and K. Ngo, “A behavioral model of the igbt for circuit simulation,” in Power Electronics Specialists Conference, 1995. PESC ’95 Record., 26th Annual IEEE, vol. 2, Jun 1995, pp. 865–871 vol.2. [17] K. Narendra and P. Gallman, “An iterative method for the identification of nonlinear systems using a hammerstein model,” Automatic Control, IEEE Transactions on, vol. 11, no. 3, pp. 546–550, Jul 1966. [18] A. Hefner Jr and D. Blackburn, “An analytical model for the steady-state and transient characteristics of the power insulated-gate bipolar transistor,” in Solid-State Electronics, vol. 31, no. 10, Oct 1988, pp. 1513–1532. [19] B. Wu, C. Chuang, and K. Chin, “Non-quasi-static effects in advanced high-speed bipolar circuits,” Solid-State Circuits, IEEE Journal of, vol. 28, no. 5, pp. 613–617, May 1993. [20] [Online;accessed 10-September-2015]. [Online]. Available: https://library.e.abb.com/public/6e6983faa83cded383257b4a00515559/ 5SNA%202000K450300%205SYA%201431-00%2003-2013.pdf [21] [Online;accessed 10-September-2015]. [Online]. Available: http://www. physik.uni-wuerzburg.de/∼praktiku/Anleitung/Fremde/ANO14.pdf [22] p. 108, [Online;accessed 10-September-2015]. [Online]. Available: http: //www.seas.upenn.edu/∼jan/spice/PSpice UserguideOrCAD.pdf 54 Appendix A Pspic schematics A.1 IGBT model 55 56 A.2 Diode model 57 Appendix B Parametric analysis B.1 Parametric analysis for collector current versus gate-emitter voltage at constant collectoremitter voltage of 15 V. Figure B.1: MOSFET channel threshold voltage (VT H ) increases from 6.5 V to 8 V. 58 Figure B.2: Process transconductance parameter (kp ) increases from 0.68 S to 1.2 S. Figure B.3: Current gain of BJT transistor (β) increases from 150 to 280. 59 B.2 Parametric analysis for collector current versus collector-emitter voltage for a series of constant gate-emitter voltage at 9 V, 11 V, 13 V and 15 V. Figure B.4: MOSFET channel threshold voltage (VT H ) increases from 6.8 V to 7.3 V. Figure B.5: Approximated turn-on voltage of the p + /n− junction (VD ) increases from 0.6 V to 0.8 V. 60 Figure B.6: Process transconductance parameter (kp ) increases from 0.68 S to 1 S. Figure B.7: Current gain of BJT transistor (β) increases from 170 to 250. 61 B.3 Parametric analysis for turn-on transient with voltage source driving. Figure B.8: Gate resistance (Rg ) increases from 0.7 Ω to 1.2 Ω. Figure B.9: 2.5 × 10−6 s. Diode diffusion transit time (ttdi) increases from 8 × 10−7 s to 62 Figure B.10: On-state resistance of h1 block (r1on ) increases from 38 Ω to 310 Ω. Figure B.11: Current gain of BJT transistor (β) increases from 130 to 250. 63 B.4 Parametric analysis for turn-off transient with voltage source driving. Figure B.12: Stray inductance (LS ) increases from 70 nH to 150 nH. Figure B.13: Ratio of IC after and before the fast decay at turn-off (α) increases from 0.1 to 0.3. 64 Figure B.14: On-state resistance of h1 block (R1on ) increases from 38 Ω to 310 Ω. Figure B.15: Off-state resistance of h1 block (r1off) increases from 35 Ω to 270 Ω. 65 B.5 Parametric analysis for turn-on and off transient with current source driving. Figure B.16: Stray inductance (LS ) increases from 50 nH to 150 nH. Figure B.17: Diode minority carrier lifetime (taud) increases from 0.5 µs to 4 µs. 66 Figure B.18: On-state resistance of h1 block (R1on ) increases from 40 Ω to 150 Ω. Figure B.19: Off-state resistance of h1 block (R1of f ) increases from 40 Ω to 150 Ω. 67 Figure B.20: Turn-off resistance of h2 block (R2of f ) increases from 30 Ω to 110 Ω. 68

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