UG-393: Evaluation Board for the ADF4157 Fractional-N PLL Frequency Synthesizer PDF

UG-393: Evaluation Board for the ADF4157 Fractional-N PLL Frequency Synthesizer PDF
Evaluation Board User Guide
UG-393
One Technology Way • P.O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluation Board for the ADF4157 Fractional-N PLL Frequency Synthesizer
FEATURES
DOCUMENTS NEEDED
Self-contained evaluation board, including frequency
synthesizer, VCO, TCXO for reference frequency, and
loop filter
Designed for 10 MHz PFD frequency, minimum charge pump
current, and a 20 kHz loop bandwidth
Accompanying software allows complete control of
synthesizer functions from a PC
ADF4157 data sheet
UG-393 user guide
EVALUATION KIT CONTENTS
EV-ADF4157SD1Z board
CD that includes
Self-installing software that allows users to control the
board and exercise all functions of the device
Electronic version of the ADF4157 data sheet
Electronic version of the UG-393 user guide
ADDITIONAL EQUIPMENT
PC running Windows XP or more recent version
SDP-S board (system demonstration platform, serial only)
Spectrum analyzer
Oscilloscope (optional)
REQUIRED SOFTWARE
Analog Devices Frac-N PLL software (Version 4 or higher)
ADIsimPLL
GENERAL DESCRIPTION
This evaluation board allows the user to evaluate the performance
of the ADF4157 frequency synthesizer for phase-locked loops
(PLLs). The SDP-S controller board allows software programming
of the frequency synthesizer. Figure 1 shows the board, which
contains the ADF4157 synthesizer, the power supplies, a TCXO
reference, and an RF output signal. There is also a loop filter
(20 kHz), a VCO (Z-Communications, Inc., V940ME03-LF),
and an external reference SMA input. The evaluation board is
set up for a 10 MHz PFD frequency.
Figure 1 shows the board with all necessary components inserted.
EVALUATION BOARD
10621-001
SDP-S
(TO BE PURCHASED
SEPARATELY)
Figure 1. EV-ADF4157SD1Z with SDP-S
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
Rev. 0 | Page 1 of 24
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Evaluation Board User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Input Signals...................................................................................4
Evaluation Kit Contents ................................................................... 1
Output Signals ...............................................................................4
Additional Equipment ..................................................................... 1
Default Operation and Jumper Selection Settings ....................5
Documents Needed .......................................................................... 1
System Demonstration Platform (SDP) .....................................5
Required Software ............................................................................ 1
Evaluation Board Setup Procedure .................................................6
General Description ......................................................................... 1
Installing the Frac-N PLL Software ............................................6
Evaluation Board .............................................................................. 1
Evaluation Board Software ............................................................ 10
Revision History ............................................................................... 2
Evaluation and Test ........................................................................ 12
Quick Start Guide ............................................................................. 3
Evaluation Board Schematics and Artwork ................................ 13
Evaluation Board Hardware ............................................................ 4
Bill of Materials ............................................................................... 20
Power Supplies .............................................................................. 4
Related Links ................................................................................... 21
REVISION HISTORY
7/12—Revision 0: Initial Version
Rev. 0 | Page 2 of 24
Evaluation Board User Guide
UG-393
QUICK START GUIDE
Follow these steps to evaluate the ADF4157 frequency synthesizer
after ensuring that the on-board links are correct with reference
to Table 1:
1.
2.
3.
Install the Analog Devices Frac-N PLL software.
Connect the SDP-S motherboard to the PC and to the
EV-ADF4157SD1Z.
Follow the hardware driver installation procedure that
appears if you are using Windows® XP.
4.
5.
6.
7.
8.
9.
Rev. 0 | Page 3 of 24
Connect the power supplies to banana connectors (6 V
to 12 V).
Run the Frac-N PLL software.
Select the SDP board and the ADF4157 device in the Select
Device and Connection tab of the main window.
Click the Main Controls tab, and then update all registers.
Connect the spectrum analyzer to J2.
Measure the results.
UG-393
Evaluation Board User Guide
EVALUATION BOARD HARDWARE
The evaluation board requires the use of an SDP-S motherboard to
program the device. The SDP-S is not included with the evaluation
board. The EV-ADF4157SD1Z schematics are shown in Figure 21
to Figure 23.
POWER SUPPLIES
The board is powered from external banana connectors. The
voltage can vary between 6 V and 12 V. The power supply circuit
provides 3.0 V to the VDD of the ADF4157 and allows the user
to choose either 3.0 V or 5 V for the VP of the ADF4157 frequency
synthesizer. The default settings for VDD and VP are 3.0 V and 5 V,
respectively. Note that VDD should never exceed 3.3 V because
exceeding this voltage level may damage the device.
External power supplies can be used to directly drive the ADF4157
frequency synthesizer. In this case, the user must insert SMA
connectors as shown in Figure 2.
A 10 MHz TCXO reference source from Fox Electronics is fitted
as the default option. An external reference generator can also be
used as the reference input. A low noise, high slew rate reference
source is required to achieve the specified performance of the
ADF4157 frequency synthesizer. An SMA connector fitted to
J11 can be connected to an external reference generator and
used as the reference source. Alternatively, the edge mount
connector, J5, can be inserted and used instead of J11. To use
any external reference option, remove the 0 Ω R16 and R14 links.
Digital SPI signals are supplied through the SDP connector, J1.
The SDP-S board is recommended. The SDP-Blackfin (SDP-B)
board can also be used, but Resistor R57 must be removed from
the SDP-B board. Some additional spurious low frequencies may
appear if the SDP-B connector is used.
10621-002
INPUT SIGNALS
Figure 2. Evaluation Board Silkscreen
OUTPUT SIGNALS
All components necessary for local oscillator (LO) generation
are on the board. The PLL comprises the ADF4157 frequency
synthesizer, a passive loop filter, and the VCO. A 5.8 GHz VCO
from Z-Communications is supplied with the evaluation board.
A 20 kHz low-pass filter is inserted between the charge pump
output and the VCO input. The 0.31 mA charge pump current
setting is used. The VCO output is available at RFOUT through
a standard SMA connector, J2. The MUXOUT signal can be
monitored at Test Point T8 or at SMA Connector J3.
Rev. 0 | Page 4 of 24
Evaluation Board User Guide
UG-393
DEFAULT OPERATION AND JUMPER SELECTION
SETTINGS
Link positions and their respective functions are outlined in
Table 1.
Table 1. Link Positions and Functions
Link
LK1
LK2
LK3 (VDD)
LK4 (VVCO)
LK5 (VP)
Position
A
B
A
B
A
B
A
B
A
B
Options
R1A
RSET
GND
VDD
5V
3V
5V
3V
5V
3V
Description
Not used
Normal operation
Hardware power-down
Normal operation
Not used
Normal operation
VCO supply (5 V)
VCO supply (3 V)
VP supply (5 V)
VP supply (3 V)
SYSTEM DEMONSTRATION PLATFORM (SDP)
The system demonstration platform (SDP) is a series of controller
boards, interposer boards, and daughter boards that can be
used for easy, low cost evaluation of Analog Devices, Inc.,
components and reference circuits. It is a reusable platform
whereby a single controller board can be reused in various
daughter board evaluation systems.
Controller boards connect to a PC via a USB 2.0 high speed port
and provide a range of communication interfaces on a 120-pin
connector. The pinout for this connector is strictly defined. A
receptacle for this 120-pin connector is included on all SDP
daughter boards, component evaluation boards, and Circuits
from the Lab® reference circuit boards. There are two controller
boards in the platform: the SDP-B, which is based on the Blackfin®
ADSP-BF527, and the SDP-S, which is a serial interface only
controller board. The SDP-S has a subset of the SDP-B functionality.
Interposer boards route signals between the SDP 120-pin connector and a second connector. When the second connector is
also a 120-pin connector, the interposer can be used for signal
monitoring of the 120-pin connector signals. Alternatively, the
second connector allows SDP platform elements to be integrated
into a second platform, for example, the BeMicro SDK. More
information on the SDP can be found at www.analog.com/sdp.
Rev. 0 | Page 5 of 24
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Evaluation Board User Guide
EVALUATION BOARD SETUP PROCEDURE
INSTALLING THE FRAC-N PLL SOFTWARE
2.
Choose an installation directory and click Next.
1.
2.
Install the Frac-N PLL software by double-clicking
ADI_PLL_Frac-N_Setup.msi.
If you are using Windows XP, follow the instructions in
the Windows XP Frac-N PLL Software Installation Guide
section (see Figure 3 to Figure 7).
If you are using Windows Vista or Windows 7, follow the
instructions in the Windows Vista and Windows 7 Frac-N
PLL Software Installation Guide section (see Figure 8 to
Figure 12).
Note that the software requires Microsoft Windows
Installer and Microsoft .NET Framework 3.5 (or higher).
The installer connects to the Internet and downloads
Microsoft .NET Framework automatically. Alternatively,
before running ADI_PLL_Frac-N_Setup.msi, both the
installer and .NET Framework can be installed from the
CD provided in the evaluation board kit.
Connect your SDP board (black) to a PC using the supplied
USB cable.
If you are using Windows XP, follow the steps in the Windows
XP SDP-S Board Driver Installation Guide section (see
Figure 13 to Figure 16).
If you are using Windows Vista or Windows 7, the drivers
install automatically.
10621-004
Use the following steps to install the SDP drivers and the Analog
Devices Frac-N PLL software.
Figure 4. Windows XP Frac-N PLL Software Installation,
Select Installation Folder
3.
Click Next.
Windows XP Frac-N PLL Software Installation Guide
10621-005
Click Next.
Figure 5. Windows XP Frac-N PLL Software Installation,
Confirm Installation
10621-003
1.
Figure 3. Windows XP Frac-N PLL Software Installation,
Setup Wizard
Rev. 0 | Page 6 of 24
Evaluation Board User Guide
4.
UG-393
Windows Vista and Windows 7 Frac-N PLL Software
Installation Guide
Click Continue Anyway.
Click Next.
10621-006
1.
Click Close.
Figure 8. Windows Vista/Windows 7 Frac-N PLL Software Installation,
Setup Wizard
2.
Choose an installation directory and click Next.
10621-007
Figure 7. Windows XP Frac-N PLL Software Installation,
Installation Complete
10621-009
5.
10621-008
Figure 6. Windows XP Frac-N PLL Software Installation,
Logo Testing
Figure 9. Windows Vista/Windows 7 Frac-N PLL Software Installation,
Select Installation Folder
Rev. 0 | Page 7 of 24
UG-393
5.
Click Close.
10621-012
Click Next.
10621-010
3.
Evaluation Board User Guide
Figure 12. Windows Vista/Windows 7 Frac-N PLL Software Installation,
Installation Complete
Figure 10. Windows Vista/Windows 7 Frac-N PLL Software Installation,
Confirm Installation
Click Install.
10621-011
4.
Figure 11. Windows Vista/Windows 7 Frac-N PLL Software Installation,
Start Installation
Rev. 0 | Page 8 of 24
Evaluation Board User Guide
UG-393
Windows XP SDP-S Board Driver Installation Guide
10621-015
Choose Yes, this time only, and click Next.
Wait for the installation program to copy all the necessary files.
10621-013
1.
3.
Figure 15. Windows XP SDP-S Board Driver Installation,
Logo Testing
4.
Click Next.
10621-014
2.
Figure 14. Windows XP SDP-S Board Driver Installation,
Installation Options
Rev. 0 | Page 9 of 24
Click Finish.
10621-016
Figure 13. Windows XP SDP-S Board Driver Installation,
Found New Hardware Wizard
Figure 16. Windows XP SDP-S Board Driver Installation,
Complete Installation
UG-393
Evaluation Board User Guide
EVALUATION BOARD SOFTWARE
Confirm that SDP board connected is displayed at the bottom
left of the window (see Figure 17). If this message is not displayed,
the software cannot connect to the evaluation board.
To run the software, click the ADI Frac-N file on the desktop or
from the Start menu.
Note that when the SDP board is connected, there is about a
5 sec to 10 sec delay before the status label changes.
On the Select Device and Connection tab, choose the device
and connection method, and then click Connect.
From the File menu, the current settings can be saved to and
loaded from a text file.
10621-017
The control software for the EV-ADF4157SD1Z is provided on
the CD included in the evaluation board kit. To install the software,
see the Installing the Frac-N PLL Software section.
Figure 17. Frac-N PLL Software, Main Window—Select Device and Connection
Rev. 0 | Page 10 of 24
Evaluation Board User Guide
UG-393
The Main Controls tab controls the PLL settings (see Figure 18).
Use the Reference Frequency text box to set the correct reference frequency and the reference frequency divider. The default
reference frequency in this box is 10 MHz.
Use the RF Settings section to control the output frequency.
You can type the desired output frequency in the RF VCO
Output Frequency text box (in megahertz).
In the Latches/Registers section at the bottom of the Main
Controls tab of the main window, the values to be written to
each register are displayed. If the background on the text box is
green, the value displayed is different from the value actually on
the device. Click Write Rx (where x = 0 to 4) to write the value
displayed to the device.
10621-018
In the Registers tab, you can manually input the desired value
to be written to the registers.
In the Sweep and Hop tab, you can make the device sweep a
range of frequencies or hop between two set frequencies.
Figure 18. Frac-N PLL Software, Main Window—Main Controls
Rev. 0 | Page 11 of 24
UG-393
Evaluation Board User Guide
EVALUATION AND TEST
To evaluate and test the performance of the ADF4157 frequency
synthesizer, use the following procedure:
Install the Frac-N PLL software.
Connect the SDP-S connector to the EV-ADF4157SD1Z.
Connect the SDP board to a PC using the supplied USB cable.
Follow the hardware driver installation procedure that
appears if you are using Windows XP.
5. Connect the power supplies to banana connectors (6 V to
12 V) and ensure that the power switch is in the on position.
6. Connect the spectrum analyzer to Connector J2.
7. Run the Frac-N PLL software.
8. Select the SDP board and the ADF4157 device in the Select
Device and Connection tab in the main window of the
evaluation board software.
9. In the Main Controls tab in the main window of the evaluation board software, set the VCO center frequency in the RF
VCO Output Frequency text box (the example in Figure 19
uses a 5800 MHz VCO). Set the PFD Frequency text box
to 10 MHz, and program the Reference Frequency value
to equal 10 MHz. The current listed in the Charge Pump
Setting text box should equal 0.31 mA. See Figure 20 for
the suggested setup.
10. Measure the output spectrum. Figure 19 shows a
5800 MHz output.
10621-019
1.
2.
3.
4.
Figure 19. Spectrum Analyzer Display
SDP-S BOARD
SIGNAL
GENERATOR
SDP CONNECTOR
EXTERNAL DC
GND
LOCK DETECT LED
EXTERNAL DC
SUPPLY
PC
REFERENCE IN/
REFERENCE OUT
PLL
EXTERNAL
POWER
SWITCH
LOOP
FILTER
TCXO
SPECTRUM
ANALYZER
PLL
POWER
LED
VCO
10621-020
POWER
SUPPLIES
Figure 20. Typical Evaluation Setup
Rev. 0 | Page 12 of 24
Evaluation Board User Guide
UG-393
EVALUATION BOARD SCHEMATICS AND ARTWORK
10621-021
Figure 21. Evaluation Board Schematic (Page 1)
Rev. 0 | Page 13 of 24
UG-393
Evaluation Board User Guide
10621-022
Figure 22. Evaluation Board Schematic (Page 2)
Rev. 0 | Page 14 of 24
Evaluation Board User Guide
UG-393
10621-023
Figure 23. Evaluation Board Schematic (Page 3)
Rev. 0 | Page 15 of 24
Evaluation Board User Guide
10621-024
UG-393
Figure 24. Layer 1 (Component Side)
Rev. 0 | Page 16 of 24
UG-393
10621-025
Evaluation Board User Guide
Figure 25. Layer 2 (Ground Plane)
Rev. 0 | Page 17 of 24
Evaluation Board User Guide
10621-026
UG-393
Figure 26. Layer 3 (Power Plane)
Rev. 0 | Page 18 of 24
UG-393
10621-027
Evaluation Board User Guide
Figure 27. Layer 4 (Solder Side)
Rev. 0 | Page 19 of 24
UG-393
Evaluation Board User Guide
BILL OF MATERIALS
Table 2.
Reference Designator
C1
C2
C3
C4, C6, C10
C5, C7, C9, C11, C13
C8, C12
C14, C15
C16, C17, C18, C19
C20, C23
C21, C24
C22, C25
C26, C27
D1
D2
D3, D5
D4
J1
J2
J3, J4, J10
J5, J6, J7, J8, J9
J11
LK1, LK3, LK4, LK5
LK2
GND
VSUPPLY
R1A
R1
R2
R3
R4, R5, R6, R23, R29, R42
R7, R8, R9
R10
R11
R12, R13, R24, R25, R26
R14, R16, R18, R28, R36
R15, R17, R22, R27, R32, R33, R37, R46
R19, R20
R21
R30
R31, R34
S1
T1 to T14
U1
U3
U2
U4
Y1
Y2
Part Description
Capacitor, 0805, 680 pF
Capacitor, 0805, 10 nF
Capacitor, 0805, 270 pF
Capacitor, 0402, 0.1 μF, 16 V
Capacitor, 0603, 10 pF, 50 V, SMD
Capacitor, Case A, 22 μF, 6.3 V
Capacitor, 0603, 1 nF, 50 V
Capacitor, 0603, 100 pF, 50 V
Capacitor, Case A, 1 μF, 16 V
Capacitor, 0603, 10 nF, 50 V
Capacitor, Case A, 4.7 μF, 10 V
Capacitor, 0603, 10 nF, 50 V
LED, green
Diode, DO41, 1 A, 50 V
SD103C, 6.2 V
LED, red
120-way connector, 0.6 mm pitch
Jack, SMA, SMA_EDGE
JACK, SMA, receptacle straight PCB
Jack, SMA, SMA_EDGE
Jack, SMA, receptacle straight PCB
Jumper2\SIP3, 3-pin link
Jumper-2
Black 4 mm banana socket
Red 4 mm banana socket
Resistor, 0805
Resistor, 0805, 2.4 kΩ
Resistor, 0805, 5.1 kΩ
Resistor, 0805, 5.1 kΩ, ±1%, 0.1 W
Resistor, 0603, 330 Ω
Resistor, 0603, 18 Ω
Resistor, 0603, 51 Ω
Resistor, 0603 100 Ω
Resistor, 0603, 10 kΩ
Resistor, 0603, 0 Ω
Resistor, 0603, 0 Ω
Resistor, 0603, 330 kΩ, ±1%, 0.063 W
Resistor, 0603, 4.7 kΩ, ±1%, 0.063 W
Resistor, 0402
Resistor, RC31, 0402, 100 kΩ
Switch, PCB, SPDT, 20 V
Test point, PCB, red PK_100
ADF4157, 16-lead TSSOP
ADP3300, 5 V, 6-lead SOT-23
ADP3300, 3 V, 6-lead SOT-23
32k I2C serial EEPROM, MSOP8
VCO V940ME03
Low profile/temperature compensated
crystal oscillator, OSC_TCXO, 10 W
Rev. 0 | Page 20 of 24
Manufacturer/Part No.
PHYCOMP 2238 861 15681
MURATA GRM2195C1H103JA01D
PHYCOMP 2238 861 15271
AVX CM105X7R104K16AT
AVX 06035A100JAT2A
AVX TAJA226K006R
AVX 06035A102JAT2A
AVX 06035A101JAT2A
AVX TAJA105K016R
AVX 06035C103JAT2A
AVX TAJA475K010R
Not inserted
OSRAM LGR971-Z
Multicomp 1N4001
ON Semiconductor MBR0520LT1G
Avago HSMS-C170
Hirose FX8-120S-SV(21)
Johnson Components 142-0701-851
Not inserted
Not inserted
Pomona 72963
Harwin M20-9990345 and M7566-05
Harwin M20-9990245 and M7566-05
Deltron 571-0100-01
Deltron 571-0500-01
User supplied
MULTICOMP MC 0.1W 0805 1% 2K4
MULTICOMP MC 0.1W 0805 1% 5K1
Multicomp MC 0.1 0805 1% 5K1
Multicomp MC 0.063W 0603 1% 330R
Multicomp MC 0.063W 0603 1% 18R
Multicomp MC 0.063W 0603 1% 51R
Multicomp MC 0.0625W 0402 1% 100R
Multicomp MC 0.063W 0603 1% 10K
Multicomp MC 0.063W 0603 1% 0R
Not inserted
Multicomp MC 0.063W 0603 1% 330K
Multicomp MC 0.063W 0603 1% 4K7
Not inserted
YAGEO (Phycomp) RC0402JR-07100KL
APEM TL36P0050
Vero 20-313137
Analog Devices ADF4157BRUZ
Analog Devices ADP3300ARTZ-5REEL7
Analog Devices ADP3300ARTZ-3-RL7
Microchip 24LC32A-I/MS
Z-Communications V940ME03-LF
Fox 801-BELF
Evaluation Board User Guide
UG-393
RELATED LINKS
Resource
ADF4157
ADP3300
ADSP-BF527
SDP-S
SDP-B
UG-393
UG-291
UG-277
Description
Product Page: High Resolution 6 GHz Fractional-N Frequency Synthesizer
Product Page: High Accuracy anyCAP® 50 mA Low Dropout Linear Regulator
Product Page: Low Power Blackfin Processor with Advanced Peripherals
Product Page: System Demonstration Platform-Serial (SDP-S)
Product Page: System Demonstration Platform-Blackfin (SDP-B)
User Guide: Evaluation Board for the ADF4157 Fractional-N PLL Frequency Synthesizer
User Guide: SDP-S Controller Board
User Guide: SDP-B Controller Board
Rev. 0 | Page 21 of 24
UG-393
Evaluation Board User Guide
NOTES
Rev. 0 | Page 22 of 24
Evaluation Board User Guide
UG-393
NOTES
Rev. 0 | Page 23 of 24
UG-393
Evaluation Board User Guide
NOTES
I2C refers to a communications protocol originally developed by Philips Semiconductors (now NXP Semiconductors).
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Furthermore, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reserved by ADI. CONFIDENTIALITY. This Agreement and the Evaluation Board shall all be considered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMINATION. ADI may terminate this Agreement at any time upon giving written notice
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRESENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICALLY DISCLAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANTIES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUATION BOARD, INCLUDING BUT NOT LIMITED TO LOST PROFITS, DELAY COSTS, LABOR COSTS OR LOSS OF GOODWILL. ADI’S TOTAL LIABILITY FROM ANY AND ALL CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and construed in accordance with the substantive laws of the Commonwealth of
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contracts for the International Sale of Goods shall not apply to this Agreement and is expressly disclaimed.
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG10621-0-7/12(0)
Rev. 0 | Page 24 of 24
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