Isolated Switching Regulator with Integrated Feedback ADuM4070 Data Sheet

Isolated Switching Regulator with Integrated Feedback ADuM4070 Data Sheet
Isolated Switching Regulator
with Integrated Feedback
ADuM4070
Data Sheet
FEATURES
FUNCTIONAL BLOCK DIAGRAM
VDD1
VISO
RECTIFIER
X1
VREG
X2
ADuM4070
REGULATOR
VDD2
5V
VDDA
PRIMARY
CONTROLLER/
DRIVER
SECONDARY
CONTROLLER
OC
INTERNAL
FEEDBACK
GND1
FB
GND2
10461-001
Isolated PWM feedback with built-in compensation
Primary side transformer driver for up to 2.5 W output power
with 5 V input voltage
Regulated adjustable output: 3.3 V to 24 V
Up to 70% efficiency
200 kHz to 1 MHz adjustable oscillator
Soft start function at power-up
Pulse-by-pulse overcurrent protection
Thermal shutdown
5000 V rms isolation
High common-mode transient immunity: >25 kV/μs
16-lead SOIC package with 8.3 mm creepage
High temperature operation: 105°C maximum
Safety and regulatory approvals (pending)
UL recognition: 5000 V rms for 1 minute per UL 1577
CSA Component Acceptance Notice #5A
VDE certificate of conformity
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
VIORM = 849 V peak
Figure 1.
APPLICATIONS
Power supply start-up bias and gate drives
Isolated sensor interfaces
Process controls
GENERAL DESCRIPTION
The ADuM40701 is a regulated dc-to-dc isolated power supply
controller with an internal MOSFET driver. The dc-to-dc controller
has internal isolated PWM feedback from the secondary side based
on the iCoupler® chip scale transformer technology and complete
loop compensation. This architecture eliminates the need to use
an optocoupler for feedback and compensates the loop for stability.
The regulated feedback provides a relatively flat efficiency curve
over the full output power range. The ADuM4070 enables a dc-todc converter with a 3.3 V to 24 V isolated output voltage range
from either a 5.0 V or a 3.3 V input voltage, with an output power
of up to 2.5 W.
The ADuM4070 isolator provides a more stable output voltage and
higher efficiency compared to unregulated isolated dc-to-dc power
supplies. The fully integrated feedback and loop compensation
in a wide-body SOIC package provide a solution with a smaller
form factor and 8.3 mm creepage distance.
1
Protected by U.S. Patents 5,952,849; 6,873,065; and 7,075,329. Other patents pending.
Rev. 0
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ADuM4070
Data Sheet
TABLE OF CONTENTS
Features .............................................................................................. 1
Pin Configuration and Function Descriptions..............................8
Applications ....................................................................................... 1
Typical Performance Characteristics ..............................................9
Functional Block Diagram .............................................................. 1
Applications Information .............................................................. 14
General Description ......................................................................... 1
Application Schematics ............................................................. 14
Revision History ............................................................................... 2
Transformer Design ................................................................... 15
Specifications..................................................................................... 3
Transformer Turns Ratio ........................................................... 15
Electrical Characteristics—5 V Primary Input Supply/
5 V Secondary Isolated Supply ................................................... 3
Transformer ET Constant ......................................................... 15
Electrical Characteristics—3.3 V Primary Input Supply/
3.3 V Secondary Isolated Supply ................................................ 3
Transformer Isolation Voltage .................................................. 16
Electrical Characteristics—5 V Primary Input Supply/
3.3 V Secondary Isolated Supply ................................................ 4
Transient Response .................................................................... 16
Transformer Primary Inductance and Resistance ................. 16
Switching Frequency .................................................................. 16
Electrical Characteristics—5 V Primary Input Supply/
15 V Secondary Isolated Supply ................................................. 4
Component Selection ................................................................ 16
Package Characteristics ............................................................... 5
Thermal Analysis ....................................................................... 17
Regulatory Approvals (Pending) ................................................ 5
Power Consumption .................................................................. 17
Insulation and Safety-Related Specifications ............................ 5
Power Considerations ................................................................ 17
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12
Insulation Characteristics ............................................................ 6
Insulation Lifetime ..................................................................... 18
Outline Dimensions ....................................................................... 19
Recommended Operating Conditions ...................................... 6
Ordering Guide .......................................................................... 19
Printed Circuit Board (PCB) Layout ....................................... 17
Absolute Maximum Ratings ............................................................ 7
ESD Caution .................................................................................. 7
REVISION HISTORY
10/12—Revision 0: Initial Version
Rev. 0 | Page 2 of 20
Data Sheet
ADuM4070
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/5 V SECONDARY ISOLATED SUPPLY
4.5 V ≤ VDD1 = VDDA ≤ 5.5 V, VDD2 = VREG = VISO = 5.0 V, fSW = 500 kHz, all voltages are relative to their respective grounds (see the application
schematic in Figure 31). All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted.
All typical specifications are at TA = 25°C, VDD1 = VDDA = 5.0 V, VDD2 = VREG = VISO = 5.0 V.
Table 1. DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Isolated Output Voltage
Feedback Voltage Setpoint
Line Regulation 1
Load Regulation
Output Ripple
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VISO
VFB
VISO (LINE)
VISO (LOAD)
VISO (RIP)
4.5
1.15
5.0
1.25
1
1
50
5.5
1.37
10
2
V
V
mV/V
%
mV p-p
IISO = 0 mA, VISO = VFB × (R1 + R2)/R2
IISO = 0 mA
IISO = 50 mA, VDD1 = VDDA = 4.5 V to 5.5 V
IISO = 50 mA to 200 mA
20 MHz bandwidth, COUT = 0.1 µF||47 µF,
IISO = 100 mA
20 MHz bandwidth, COUT = 0.1 µF||47 µF,
IISO = 100 mA
ROC = 50 kΩ
ROC = 270 kΩ
VOC = VDD2 (open loop)
Output Noise
VISO (NOISE)
100
mV p-p
Switching Frequency
fSW
IDDA Quiescent Current
Switch On Resistance
Maximum Output Supply Current
Efficiency at Maximum Output
Current
IDDA (Q)
RON
IISO (MAX)
1000
200
318
4
0.5
500
72
kHz
kHz
kHz
mA
Ω
mA
%
192
1
400
515
5
fSW ≤ 1 MHz, VISO = 5.0 V
IISO = IISO (MAX), fSW ≤ 1 MHz
VDD1 is the power supply for the push-pull transformer; VDDA is the power supply for Side 1 of the ADuM4070.
ELECTRICAL CHARACTERISTICS—3.3 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
3.0 V ≤ VDD1 = VDDA ≤ 3.6 V, VDD2 = VREG = VISO = 3.3 V, fSW = 500 kHz, all voltages are relative to their respective grounds (see the application
schematic in Figure 31). All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted.
All typical specifications are at TA = 25°C, VDD1 = VDDA = 3.3 V, VDD2 = VREG = VISO = 3.3 V.
Table 2. DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Isolated Output Voltage
Feedback Voltage Setpoint
Line Regulation 1
Load Regulation
Output Ripple
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VISO
VFB
VISO (LINE)
VISO (LOAD)
VISO (RIP)
3.0
1.15
3.3
1.25
1
1
50
3.63
1.37
10
2
V
V
mV/V
%
mV p-p
IISO = 0 mA, VISO = VFB × (R1 + R2)/R2
IISO = 0 mA
IISO = 50 mA, VDD1 = VDDA = 3.0 V to 3.6 V
IISO = 50 mA to 200 mA
20 MHz bandwidth, COUT = 0.1 µF||47 µF,
IISO = 100 mA
20 MHz bandwidth, COUT = 0.1 µF||47 µF,
IISO = 100 mA
ROC = 50 kΩ
ROC = 270 kΩ
VOC = VDD2 (open loop)
Output Noise
VISO (NOISE)
100
mV p-p
Switching Frequency
fSW
IDDA Quiescent Current
Switch On Resistance
Maximum Output Supply Current
Efficiency at Maximum Output
Current
IDDA (Q)
RON
IISO (MAX)
1000
200
318
2
0.6
350
68
kHz
kHz
kHz
mA
Ω
mA
%
192
1
250
515
3.5
VDD1 is the power supply for the push-pull transformer; VDDA is the power supply for Side 1 of the ADuM4070.
Rev. 0 | Page 3 of 20
fSW ≤ 1 MHz, VISO = 3.3 V
IISO = IISO (MAX), fSW ≤ 1 MHz
ADuM4070
Data Sheet
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/3.3 V SECONDARY ISOLATED SUPPLY
4.5 V ≤ VDD1 = VDDA ≤ 5.5 V, VDD2 = VREG = VISO = 3.3 V, fSW = 500 kHz, all voltages are relative to their respective grounds (see the application
schematic in Figure 31). All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted.
All typical specifications are at TA = 25°C, VDD1 = VDDA = 5.0 V, VDD2 = VREG = VISO = 3.3 V.
Table 3. DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Isolated Output Voltage
Feedback Voltage Setpoint
Line Regulation 1
Load Regulation
Output Ripple
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VISO
VFB
VISO (LINE)
VISO (LOAD)
VISO (RIP)
3.0
1.15
3.3
1.25
1
1
50
3.63
1.37
10
2
V
V
mV/V
%
mV p-p
IISO = 0 mA, VISO = VFB × (R1 + R2)/R2
IISO = 0 mA
IISO = 50 mA, VDD1 = VDDA = 4.5 V to 5.5 V
IISO = 50 mA to 200 mA
20 MHz bandwidth, COUT = 0.1 µF||47 µF,
IISO = 100 mA
20 MHz bandwidth, COUT = 0.1 µF||47 µF,
IISO = 100 mA
ROC = 50 kΩ
ROC = 270 kΩ
VOC = VDD2 (open loop)
Output Noise
VISO (NOISE)
100
mV p-p
Switching Frequency
fSW
IDDA Quiescent Current
Switch On Resistance
Maximum Output Supply Current
Efficiency at Maximum Output
Current
IDDA (Q)
RON
IISO (MAX)
1000
200
318
3.5
0.5
500
70
kHz
kHz
kHz
mA
Ω
mA
%
209
1
400
515
5
fSW ≤ 1 MHz, VISO = 3.3 V
IISO = IISO (MAX), fSW ≤ 1 MHz
VDD1 is the power supply for the push-pull transformer; VDDA is the power supply for Side 1 of the ADuM4070.
ELECTRICAL CHARACTERISTICS—5 V PRIMARY INPUT SUPPLY/15 V SECONDARY ISOLATED SUPPLY
4.5 V ≤ VDD1 = VDDA ≤ 5.5 V, VREG = VISO = 15 V, VDD2 = 5.0 V, fSW = 500 kHz, all voltages are relative to their respective grounds (see the
application schematic in Figure 32). All minimum/maximum specifications apply over the entire recommended operating range, unless
otherwise noted. All typical specifications are at TA = 25°C, VDD1 = VDDA = 5.0 V, VREG = VISO = 15 V, VDD2 = 5.0 V.
Table 4. DC-to-DC Converter Static Specifications
Parameter
DC-TO-DC CONVERTER SUPPLY
Isolated Output Voltage
Feedback Voltage Setpoint
VDD2 Linear Regulator Voltage
Dropout Voltage
Line Regulation 1
Load Regulation
Output Ripple
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
VISO
VFB
VDD2
VDD2 (DO)
VISO (LINE)
VISO (LOAD)
VISO (RIP)
13.8
1.15
4.5
15.0
1.25
5.0
0.5
1
1
200
16.5
1.37
5.5
1.5
20
3
V
V
V
V
mV/V
%
mV p-p
IISO = 0 mA, VISO = VFB × (R1 + R2)/R2
IISO = 0 mA
VREG = 7 V to 15 V, IDD2 = 0 mA to 50 mA
IDD2 = 50 mA
IISO = 50 mA, VDD1 = VDDA = 4.5 V to 5.5 V
IISO = 20 mA to 80 mA
20 MHz bandwidth, COUT = 0.1 µF||47 µF,
IISO = 100 mA
20 MHz bandwidth, COUT = 0.1 µF||47 µF,
IISO = 100 mA
ROC = 50 kΩ
ROC = 270 kΩ
VOC = VDD2 (open loop)
Output Noise
VISO (NOISE)
500
mV p-p
Switching Frequency
fSW
IDDA Quiescent Current
Switch On Resistance
Maximum Output Supply Current
Efficiency at Maximum Output
Current
IDDA (Q)
RON
IISO (MAX)
1000
200
318
3.5
0.5
140
78
kHz
kHz
kHz
mA
Ω
mA
%
192
1
100
515
5
VDD1 is the power supply for the push-pull transformer; VDDA is the power supply for Side 1 of the ADuM4070.
Rev. 0 | Page 4 of 20
fSW ≤ 1 MHz, VISO = 15.0 V
IISO = IISO (MAX), fSW ≤ 1 MHz
Data Sheet
ADuM4070
PACKAGE CHARACTERISTICS
Table 5.
Parameter
RESISTANCE AND CAPACITANCE
Resistance (Input to Output) 1
Capacitance (Input to Output)1
IC Junction to Ambient Thermal
Resistance
THERMAL SHUTDOWN
Thermal Shutdown Threshold
Thermal Shutdown Hysteresis
1
2
Symbol
Min
Typ
Max
Unit
RI-O
CI-O
θJA
1012
2.2
45
Ω
pF
°C/W
TSSD
TSSD-HYS
150
20
°C
°C
Test Conditions/Comments
f = 1 MHz
Thermocouple is located at the center of
the package underside; test conducted
on a 4-layer board with thin traces 2
TJ rising
The device is considered a 2-terminal device: Pin 1 to Pin 8 are shorted together, and Pin 9 to Pin 16 are shorted together.
See the Thermal Analysis section for thermal model definitions.
REGULATORY APPROVALS (PENDING)
The ADuM4070 is pending approval by the organizations listed in Table 6. For more information about the recommended maximum
working voltages for specific cross-insulation waveforms and insulation levels, see Table 11 and the Insulation Lifetime section.
Table 6.
UL 1
Recognized under UL 1577 component
recognition program
Single protection, 5000 V rms isolation
voltage
File E214100
1
2
CSA
Approved under CSA Component Acceptance Notice #5A
Basic insulation per CSA 60950-1-03 and IEC 60950-1,
600 V rms (848 V peak) maximum working voltage
Reinforced insulation per CSA 60950-1-03 and IEC 60950-1,
400 V rms (565 V peak) maximum working voltage
Reinforced insulation per IEC 60601-1, 250 V rms (353 V peak)
maximum working voltage
File 205078
VDE 2
Certified according to DIN V VDE V
0884-10 (VDE V 0884-10):2006-12
Reinforced insulation, 849 V peak
File 2471900-4880-0001
In accordance with UL 1577, each ADuM4070 is proof tested by applying an insulation test voltage ≥ 6000 V rms for 1 sec (current leakage detection limit = 10 µA).
In accordance with DIN V VDE V 0884-10 (VDE V 0884-10):2006-12, each ADuM4070 is proof tested by applying an insulation test voltage ≥ 1050 V peak for 1 sec
(partial discharge detection limit = 5 pC). The asterisk (*) marking branded on the component designates DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 approval.
INSULATION AND SAFETY-RELATED SPECIFICATIONS
Table 7.
Parameter
Rated Dielectric Insulation Voltage
Minimum External Air Gap (Clearance)
Symbol
L(I01)
Value
5000
>8.0
Unit
V rms
mm
Minimum External Tracking (Creepage)
L(I02)
>8.3
mm
Minimum Internal Distance (Internal Clearance)
Tracking Resistance (Comparative Tracking Index)
Isolation Group
CTI
0.017 min
>400
II
mm
V
Rev. 0 | Page 5 of 20
Test Conditions/Comments
1-minute duration
Measured from input terminals to output terminals,
shortest distance through air
Measured from input terminals to output terminals,
shortest distance path along body
Distance through insulation
DIN IEC 112/VDE 0303, Part 1
Material Group (DIN VDE 0110, 1/89, Table 1)
ADuM4070
Data Sheet
DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 INSULATION CHARACTERISTICS
This isolator is suitable for reinforced electrical isolation only within the safety limit data. Protective circuits ensure maintenance of the
safety data. The asterisk (*) marking branded on the component denotes DIN V VDE V 0884-10 (VDE V 0884-10):2006-12 approval.
Table 8.
Description
Installation Classification per DIN VDE 0110
For Rated Mains Voltage ≤ 150 V rms
For Rated Mains Voltage ≤ 300 V rms
For Rated Mains Voltage ≤ 400 V rms
Climatic Classification
Pollution Degree per DIN VDE 0110, Table 1
Maximum Working Insulation Voltage
Input-to-Output Test Voltage, Method B1
Test Conditions/Comments
VIORM × 1.875 = Vpd (m), 100% production test,
tini = tm = 1 sec, partial discharge < 5 pC
Input-to-Output Test Voltage, Method A
After Environmental Tests Subgroup 1
VIORM × 1.5 = Vpd (m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
VIORM × 1.2 = Vpd (m), tini = 60 sec, tm = 10 sec,
partial discharge < 5 pC
After Input and/or Safety Tests Subgroup 2
and Subgroup 3
Highest Allowable Overvoltage
Surge Isolation Voltage
Safety Limiting Values
V peak = 10 kV, 1.2 µs rise time, 50 µs, 50% fall time
Maximum value allowed in the event of a failure
(see Figure 2)
Case Temperature
Power Dissipation, Side 1, Side 2
Insulation Resistance at TS
VIO = 500 V
Symbol
Characteristic
Unit
VIORM
Vpd (m)
I to IV
I to IV
I to III
40/105/21
2
849
1592
V peak
V peak
Vpd (m)
1273
V peak
Vpd (m)
1018
V peak
VIOTM
VIOSM
6000
6000
V peak
V peak
TS
PVDDA, PVREG
RS
150
2.78
>109
°C
W
Ω
2.5
2.0
1.5
1.0
0.5
0
0
50
100
150
CASE TEMPERATURE (°C)
200
10461-002
SAFE OPERATING POWER, PVDDA , PVREG (W)
3.0
Figure 2. Thermal Derating Curve, Dependence of Safety Limiting Values on Case Temperature, per DIN EN 60747-5-2
RECOMMENDED OPERATING CONDITIONS
Table 9.
Parameter
TEMPERATURE
Operating Temperature
LOAD
Minimum Load
Symbol
Min
Max
Unit
TA
−40
+105
°C
IISO (MIN)
10
Rev. 0 | Page 6 of 20
mA
Data Sheet
ADuM4070
ABSOLUTE MAXIMUM RATINGS
Ambient temperature = 25°C, unless otherwise noted.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Table 10.
Parameter
Storage Temperature Range (TST)
Ambient Operating Temperature
Range (TA)
Supply Voltages1
VDDA, VDD22
VREG, X1, X2
Common-Mode Transients3
Rating
−55°C to +150°C
−40°C to +105°C
−0.5 V to +7.0 V
−0.5 V to +20.0 V
−100 kV/µs to +100 kV/µs
ESD CAUTION
1
Each voltage is relative to its respective ground.
VDD1 is the power supply for the push-pull transformer; VDDA is the power
supply for Side 1 of the ADuM4070.
3
Refers to common-mode transients across the insulation barrier. Commonmode transients exceeding the absolute maximum ratings may cause latch-up
or permanent damage.
2
Table 11. Maximum Continuous Working Voltage Supporting a 50-Year Minimum Lifetime1
Parameter
AC Voltage, Bipolar Waveform
AC Voltage, Unipolar Waveform
DC Voltage
1
Max
565
848
848
Unit
V peak
V peak
V peak
Constraint
50-year minimum lifetime
50-year minimum lifetime
50-year minimum lifetime
Refers to the continuous voltage magnitude imposed across the isolation barrier. See the Insulation Lifetime section for more information.
Rev. 0 | Page 7 of 20
ADuM4070
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
X1 1
16 VREG
*GND1 2
NC 3
15 GND2*
ADuM4070
14 VDD2
TOP VIEW 13 FB
NC 5 (Not to Scale) 12 NC
X2 4
NC 6
VDDA 7
*GND1 8
11
NC
10 OC
9
GND2*
*PIN 2 AND PIN 8 ARE INTERNALLY CONNECTED; IT IS
RECOMMENDED THAT BOTH PINS BE CONNECTED TO
A COMMON GROUND. PIN 9 AND PIN 15 ARE INTERNALLY
CONNECTED; IT IS RECOMMENDED THAT BOTH PINS BE
CONNECTED TO A COMMON GROUND.
10461-003
NOTES
1. NC = NO CONNECT. DO NOT CONNECT TO THIS PIN.
Figure 3. Pin Configuration
Table 12. Pin Function Descriptions
Pin No.
1
2, 8
Mnemonic
X1
GND1
3, 5, 6, 11, 12
4
7
9, 15
NC
X2
VDDA
GND2
10
OC
13
FB
14
VDD2
16
VREG
Description
Transformer Driver Output 1.
Ground Reference for the Primary Side of the Isolator. Pin 2 and Pin 8 are internally connected to each other;
it is recommended that both pins be connected to a common ground.
No Connect. Do not connect to this pin.
Transformer Driver Output 2.
Supply Voltage for the Primary Side, 3.0 V to 5.5 V. Connect a 0.1 µF bypass capacitor from VDDA to GND1.
Ground Reference for the Secondary Side of the Isolator. Pin 9 and Pin 15 are internally connected to each
other; it is recommended that both pins be connected to a common ground.
Oscillator Control Pin. When the OC pin is connected high to the VDD2 pin, the secondary controller runs in
open-loop (unregulated) mode. To regulate the output voltage, connect a resistor between the OC pin and
GND2; the secondary controller runs at a frequency of 200 kHz to 1 MHz, as programmed by the resistor value.
Feedback Input from the Secondary Output Voltage, VISO. Use a resistor divider from the VISO output to the FB
pin to set the VFB voltage equal to the 1.25 V internal reference level using the formula VISO = VFB × (R1 + R2)/R2.
The resistor divider is required even in open-loop mode to provide soft start.
Internal Supply Voltage for the Secondary Side. When a sufficient external voltage is supplied to VREG,
the internal regulator regulates the VDD2 pin to 5.0 V. Otherwise, VDD2 should be in the 3.0 V to 5.5 V range.
Connect a 0.1 µF bypass capacitor from VDD2 to GND2.
Input of the Internal Regulator to Power the Secondary Side Controller. VREG should be in the 5.5 V to 15 V
range to regulate the VDD2 output to 5.0 V.
Rev. 0 | Page 8 of 20
Data Sheet
ADuM4070
TYPICAL PERFORMANCE CHARACTERISTICS
90
1500
1400
80
1300
1200
70
1100
EFFICIENCY (%)
fSW (kHz)
1000
900
800
700
600
500
60
50
40
30
400
20
200
TA = –40°C
TA = +25°C
TA = +105°C
10
100
50
100
150
200
250
300
350
400
450
500
ROC (kΩ)
0
80
80
70
70
60
60
EFFICIENCY (%)
90
50
40
30
fSW = 1MHz
fSW = 700kHz
fSW = 500kHz
fSW = 200kHz
0
0
50
100
150
200
250
300
350
400
450
150
200
250
300
350
400
450
500
500
LOAD CURRENT (mA)
50
40
30
20
5V INPUT TO 5V OUTPUT
5V INPUT TO 3.3V OUTPUT
3.3V INPUT TO 3.3V OUTPUT
10
0
10461-005
10
100
LOAD CURRENT (mA)
90
20
50
Figure 7. Typical Efficiency over Temperature with 1:2 Coilcraft Transformer
(CR7983-CL), fSW = 500 kHz, 5 V Input to 5 V Output
Figure 4. Switching Frequency (fSW) vs. ROC Resistance
EFFICIENCY (%)
0
0
50
100
150
200
250
300
350
400
450
500
LOAD CURRENT (mA)
Figure 5. Typical Efficiency at Various Switching Frequencies with
1:2 Coilcraft Transformer (CR7983-CL), 5 V Input to 5 V Output
10461-008
0
10461-004
0
10461-007
300
Figure 8. Single-Supply Efficiency with 1:2 Coilcraft Transformer
(CR7983-CL), fSW = 500 kHz
70
90
80
60
70
EFFICIENCY (%)
50
40
30
40
30
20
10
0
0
50
100
150
200
250
300
350
400
450
500
LOAD CURRENT (mA)
fSW = 1MHz
fSW = 700kHz
fSW = 500kHz
fSW = 200kHz
10
Figure 6. Typical Efficiency at Various Switching Frequencies with
1:2 Halo Transformer (TGSAD-560V8LF), 5 V Input to 5 V Output
0
0
50
100
150
200
LOAD CURRENT (mA)
Figure 9. Typical Efficiency at Various Switching Frequencies with
1:3 Coilcraft Transformer (CR7984-CL), 3.3 V Input to 5 V Output
Rev. 0 | Page 9 of 20
10461-009
fSW = 1MHz
fSW = 700kHz
fSW = 500kHz
fSW = 200kHz
20
10461-006
EFFICIENCY (%)
50
60
ADuM4070
Data Sheet
70
90
80
60
70
EFFICIENCY (%)
EFFICIENCY (%)
50
40
30
60
50
40
30
20
20
25
50
75
100
125
150
175
200
LOAD CURRENT (mA)
0
10461-010
0
0
Figure 10. Typical Efficiency over Temperature with 1:3 Coilcraft Transformer
(CR7984-CL), fSW = 500 kHz, 3.3 V Input to 5 V Output
0
20
30
40
50
60
70
80
90 100 110 120 130 140
Figure 13. Typical Efficiency over Temperature with 1:3 Coilcraft Transformer
(CR7984-CL), fSW = 500 kHz, 5 V Input to 15 V Output
90
80
80
70
60
EFFICIENCY (%)
60
50
40
30
0
0
10
20
30
40
50
60
70
80
90 100 110 120 130 140
LOAD CURRENT (mA)
80
70
60
50
40
30
0
10
20
30
40
50
60
70
80
90 100 110 120 130 140
LOAD CURRENT (mA)
10461-012
fSW = 1MHz
fSW = 700kHz
fSW = 500kHz
fSW = 200kHz
0
5V INPUT TO 12V OUTPUT
5V INPUT TO 15V OUTPUT
0
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
LOAD CURRENT (mA)
Figure 14. Double-Supply Efficiency with 1:5 Coilcraft Transformer
(CR7985-CL), fSW = 500 kHz
90
10
30
10
Figure 11. Typical Efficiency at Various Switching Frequencies with
1:3 Coilcraft Transformer (CR7984-CL), 5 V Input to 15 V Output
20
40
Figure 12. Typical Efficiency at Various Switching Frequencies with
1:3 Halo Transformer (TGSAD-590V8LF), 5 V Input to 15 V Output
Rev. 0 | Page 10 of 20
10461-014
10
50
20
fSW = 1MHz
fSW = 700kHz
fSW = 500kHz
fSW = 200kHz
20
10461-011
EFFICIENCY (%)
10
LOAD CURRENT (mA)
70
EFFICIENCY (%)
TA = –40°C
TA = +25°C
TA = +105°C
10
10461-013
TA = –40°C
TA = +25°C
TA = +105°C
10
Data Sheet
ADuM4070
6
18
16
5
14
12
VISO (V)
VISO (V)
4
3
10
8
6
2
4
5
10
15
20
25
30
TIME (ms)
0
10461-015
0
0
LOAD = 10mA
LOAD = 20mA
LOAD = 100mA
2
Figure 15. Typical VISO Startup with 10 mA, 50 mA, and 500 mA Output Load,
5 V Input to 5 V Output
0
5
10
15
20
25
30
TIME (ms)
10461-018
LOAD = 10mA
LOAD = 50mA
LOAD = 500mA
1
Figure 18. Typical VISO Startup with 10 mA, 20 mA, and 100 mA Output Load,
5 V Input to 15 V Output
5
5.75
COUT = 47µF, L1 = 47µH
5.25
4.75
VISO (V)
4
VISO (V)
3
4.25
5.75
COUT = 47µF, L1 = 100µH
5.25
4.75
2
0
0
5
10
15
20
25
30
TIME (ms)
10461-016
LOAD = 10mA
LOAD = 50mA
LOAD = 500mA
Figure 16. Typical VISO Startup with 10 mA, 50 mA, and 500 mA Output Load,
5 V Input to 3.3 V Output
1.0
10% LOAD
0.5
0
–2
0
2
4
90% LOAD
6
8
10
12
14
TIME (ms)
10461-019
1
ILOAD (A)
4.25
Figure 19. Typical VISO Load Transient Response at 10% to 90% of 500 mA Load,
fSW = 500 kHz, 5 V Input to 5 V Output
5
5.75
COUT = 47µF, L1 = 47µH
5.25
4.75
VISO (V)
4
VISO (V)
3
4.25
5.75
COUT = 47µF, L1 = 100µH
5.25
4.75
2
0
0
5
10
15
TIME (ms)
20
25
30
10461-017
LOAD = 10mA
LOAD = 50mA
LOAD = 250mA
Figure 17. Typical VISO Startup with 10 mA, 50 mA, and 250 mA Output Load,
3.3 V Input to 3.3 V Output
1.0
90% LOAD
10% LOAD
0.5
0
–2
0
2
4
6
TIME (ms)
8
10
12
14
10461-020
1
ILOAD (A)
4.25
Figure 20. Typical VISO Load Transient Response at 10% to 90% of 500 mA Load
with 0.1 µF Feedback Capacitor, fSW = 500 kHz, 5 V Input to 5 V Output
Rev. 0 | Page 11 of 20
ADuM4070
COUT = 47µF, L1 = 100µH
3.0
2.5
2.5
1.0
0
–2
0
2
4
90% LOAD
6
8
10
12
14
Figure 21. Typical VISO Load Transient Response at 10% to 90% of 500 mA Load,
fSW = 500 kHz, 5 V Input to 3.3 V Output
4.0
12
VISO (V)
14
COUT = 47µF, L1 = 100µH
14
2.5
12
0
–2
0
2
4
90% LOAD
6
8
10
12
14
TIME (ms)
Figure 22. Typical VISO Load Transient Response at 10% to 90% of 500 mA Load
with 0.1 µF Feedback Capacitor, fSW = 500 kHz, 5 V Input to 3.3 V Output
ILOAD (A)
3.0
10% LOAD
0
–2
12
VISO (V)
14
COUT = 47µF, L1 = 100µH
0
12
0
2
4
6
TIME (ms)
8
10
12
14
10461-023
90% LOAD
Figure 23. Typical VISO Load Transient Response at 10% to 90% of 250 mA Load,
fSW = 500 kHz, 3.3 V Input to 3.3 V Output
ILOAD (A)
14
2.5
10% LOAD
4
6
8
10
12
14
18
3.0
0.5
2
90% LOAD
COUT = 47µF, L1 = 47µH
COUT = 47µF, L1 = 100µH
16
1.0
14
Figure 25. Typical VISO Load Transient Response at 10% to 90% of 100 mA Load,
fSW = 500 kHz, 5 V Input to 15 V Output
2.5
0
–2
10% LOAD
0.1
3.0
3.5
12
0.2
16
4.0
10
TIME (ms)
COUT = 47µF, L1 = 47µH
3.5
8
COUT = 47µF, L1 = 100µH
18
4.0
6
18
16
1.0
4
COUT = 47µF, L1 = 47µH
16
4.0
2
Figure 24. Typical VISO Load Transient Response at 10% to 90% of 250 mA Load
with 0.1 µF Feedback Capacitor, fSW = 500 kHz, 3.3 V Input to 3.3 V Output
2.5
0.5
0
18
10461-022
VISO (V)
0
–2
90% LOAD
10% LOAD
0.5
3.0
3.5
ILOAD (A)
1.0
TIME (ms)
COUT = 47µF, L1 = 47µH
3.5
VISO (V)
ILOAD (A)
3.0
10% LOAD
COUT = 47µF, L1 = 100µH
3.5
TIME (ms)
ILOAD (A)
4.0
10461-126
4.0
10461-125
VISO (V)
2.5
10461-021
VISO (V)
3.0
2.5
0.5
COUT = 47µF, L1 = 47µH
3.5
3.0
3.5
ILOAD (A)
4.0
COUT = 47µF, L1 = 47µH
3.5
0.2
10% LOAD
0.1
0
–2
0
2
4
90% LOAD
6
TIME (ms)
8
10
12
14
10461-127
4.0
Data Sheet
Figure 26. Typical VISO Load Transient Response at 10% to 90% of 100 mA Load
with 0.1 µF Feedback Capacitor, fSW = 500 kHz, 5 V Input to 15 V Output
Rev. 0 | Page 12 of 20
Data Sheet
ADuM4070
5.06
3.36
3.32
3.28
4.94
3.24
20
20
10
0
–2
–1
0
1
2
TIME (ms)
10
0
–2
–1
0
1
2
TIME (ms)
10461-026
X1 (V)
4.98
10461-024
X1 (V)
VISO (V)
VISO (V)
5.02
Figure 29. Typical VISO Output Voltage Ripple at 250 mA Load,
fSW = 500 kHz, 3.3 V Input to 3.3 V Output
Figure 27. Typical VISO Output Voltage Ripple at 500 mA Load,
fSW = 500 kHz, 5 V Input to 5 V Output
15.08
3.36
15.06
VISO (V)
VISO (V)
15.04
3.32
3.28
15.02
15.00
14.98
20
10
0
–2
–1
0
1
2
TIME (ms)
Figure 28. Typical VISO Output Voltage Ripple at 500 mA Load,
fSW = 500 kHz, 5 V Input to 3.3 V Output
10
0
–2
–1
0
1
2
TIME (ms)
Figure 30. Typical VISO Output Voltage Ripple at 100 mA Load,
fSW = 500 kHz, 5 V Input to 15 V Output
Rev. 0 | Page 13 of 20
10461-027
X1 (V)
14.94
20
10461-025
X1 (V)
14.96
3.24
ADuM4070
Data Sheet
APPLICATIONS INFORMATION
A minimum load current of 10 mA is recommended to ensure
optimum load regulation. Smaller loads can generate excess noise
on the output because of short or erratic PWM pulses. Excess
noise generated in this way can cause regulation problems in
some circumstances.
COUT
47µF
VDD1
D2
VDD1
1 X1
16 VREG
2 GND1
15 GND2
3 NC
ADuM4070
4 X2
VDD1
0.1µF
12 NC
6 NC
11 NC
7 VDDA
10 OC
8 GND1
9 GND2
VFB
R2
ROC
100kΩ
VISO = VFB × (R1 + R2)/R2
FOR VISO = 3.3V OR 5V, CONNECT VREG , VDD2 , AND VISO.
Figure 31. Single Power Supply
L1
47µH
D1
T1
VISO =
+12V TO
+24V
COUT1
47µF
UNREGULATED
+6V TO +12V
VDD1
CIN
L2
47µH
D2
COUT2
47µF
CFB
R1
D3
D4
VDD1
1 X1
16 VREG
2 GND1
15 GND2
14 VDD2
The ADuM4070 has three main application schematics, as shown
in Figure 31 to Figure 33. Figure 31 has a center-tapped secondary
and two Schottky diodes that provide full wave rectification for a
single output, typically for power supplies of 3.3 V, 5 V, 12 V, and
15 V. For single supplies when VISO = 3.3 V or 5 V, VREG, VDD2, and
VISO can be connected together.
5 NC
12 NC
6 NC
11 NC
7 VDDA
10 OC
8 GND1
9 GND2
ADuM4070
4 X2
For all the circuits shown in Figure 31 to Figure 33, the isolated
output voltage (VISO) can be set with the voltage dividers, R1
and R2 (values 1 kΩ to 100 kΩ) using the following equation:
+5V
13 FB
5 NC
APPLICATION SCHEMATICS
Figure 33, which also uses a voltage doubling secondary circuit,
is an example of a coarsely regulated, positive power supply and
an unregulated, negative power supply for outputs of approximately ±5 V, ±12 V, and ±15 V.
0.1µF
14 VDD2
3 NC
Figure 32 shows a voltage doubling circuit that can be used for a
single supply with an output that exceeds 15 V; 15 V is the largest
supply that can be connected to the regulator input, VREG (Pin 16).
In the circuit shown in Figure 32, the output voltage can be as high
as 24 V, and the voltage at the VREG pin can be as high as 12 V.
When using the circuit shown in Figure 32 to obtain an output
voltage lower than 10 V (for example, VDD1 = 3.3 V, VISO = 5 V),
connect VREG to VISO directly.
CFB
R1
CIN
VDD1
0.1µF
13 FB
0.1µF
+5V
VFB
R2
ROC
100kΩ
VISO = VFB × (R1 + R2)/R2
FOR VISO = 15V OR LESS, VREG CAN CONNECT TO VISO.
Figure 32. Doubling Power Supply
L1
47µH
D1
T1
VISO =
COARSELY
REGULATED
+5V TO +15V
COUT1
47µF
VDD1
CIN
L2
47µH
D2
COUT2
47µF
UNREGULATED
–5V TO –15V
D3
R1
CFB
D4
VDD1
1 X1
16 VREG
2 GND1
15 GND2
3 NC
ADuM4070
4 X2
VDD1
0.1µF
VISO = VFB × (R1 + R2)/R2
14 VDD2
13 FB
5 NC
12 NC
6 NC
11 NC
7 VDDA
10 OC
8 GND1
9 GND2
0.1µF
+5V
VFB
ROC
100kΩ
R2
VISO = VFB × (R1 + R2)/R2
where VFB is the internal feedback voltage (approximately 1.25 V).
Rev. 0 | Page 14 of 20
Figure 33. Positive Supply and Unregulated Negative Supply
10461-030
The ADuM4070 implements undervoltage lockout (UVLO) with
hysteresis on the VDDA power input. This feature ensures that the
converter does not go into oscillation due to noisy input power or
slow power-on ramp rates.
VISO =
+3.3V
TO +15V
10461-028
The secondary (VISO) side controller regulates the output using
a feedback voltage, VFB, from a resistor divider on the output to
create a PWM control signal that is sent to the primary (VDD1) side
by a dedicated iCoupler data channel labeled VFB. The primary side
PWM converter varies the duty cycle of the X1 and X2 switches
to modulate the oscillator circuit and control the power being
sent to the secondary side. This feedback allows for significantly
higher power and efficiency.
L1
47µH
D1
T1
10461-029
The dc-to-dc converter section of the ADuM4070 uses a
secondary side controller architecture with isolated pulse-width
modulation (PWM) feedback. VDD1 power is supplied to an oscillating circuit that switches current to the primary side of an external
power transformer using internal push-pull switches at the X1
and X2 pins. Power transferred to the secondary side of the transformer is full wave rectified with external Schottky diodes (D1
and D2), filtered with the L1 inductor and COUT capacitor, and
regulated to the isolated power supply voltage from 3.3 V to 15 V.
Data Sheet
ADuM4070
TRANSFORMER DESIGN
Custom transformers were designed for use in the circuits shown
in Figure 31, Figure 32, and Figure 33 (see Table 13). The transformers designed for use with the ADuM4070 differ from other
transformers used with isolated dc-to-dc converters that do not
regulate the output voltage. The output voltage is regulated by a
PWM controller in the ADuM4070 that varies the duty cycle of
the primary side switches in response to a secondary side feedback voltage, VFB, received through an isolated digital channel.
The internal controller has a maximum duty cycle of 40%.
TRANSFORMER TURNS RATIO
To determine the transformer turns ratio—taking into account
the losses for the primary switches and the losses for the secondary
diodes and inductors—the external transformer turns ratio for
the ADuM4070 can be calculated using Equation 1.
NS
NP
=
VISO + VD
NP
+ VD
VISO + VD
(3)
VDD1 ( MIN ) × D × 2
TRANSFORMER ET CONSTANT
The next transformer design factor to consider is the ET constant.
This constant determines the minimum V × µs constant of the
transformer over the operating temperature. ET values of 14 V × µs
and 18 V × µs were selected for the ADuM4070 transformer
designs listed in Table 13 using the following equation:
ET ( MIN ) =
(2)
VDD1 ( MIN ) × D × 2
=
For the circuit shown in Figure 33 using the +5 V to ±15 V reference design in Table 13 and with VDD1 (MIN) = 4.5 V, the turns
ratio is NS/NP = 5.
The circuit shown in Figure 32 uses double windings and diode
pairs to create a doubler circuit; therefore, half the output voltage,
VISO/2, is used, as shown in Equation 2.
2
NS
For the circuit shown in Figure 33, the duty cycle, D, is set to 0.35
for a 35% typical duty cycle to reduce the maximum voltages seen
by the diodes for a ±15 V supply.
For a 3.3 V input to 3.3 V output isolated single power supply
and with VDD1 (MIN) = 3.0 V, the turns ratio is also NS/NP = 2.
Therefore, the same transformer turns ratio, NS/NP = 2, can be
used for the three single power applications: 5 V to 5 V, 5 V to
3.3 V, and 3.3 V to 3.3 V.
=
The circuit shown in Figure 33 also uses double windings
and diode pairs to create a doubler circuit. However, because
a positive and negative output voltage are created, the external
transformer turns ratio can be calculated using Equation 3.
NP
For the circuit shown in Figure 31 using the 5 V to 5 V reference
design in Table 13 and with VDD1 (MIN) = 4.5 V, the turns ratio is
NS/NP = 2.
VISO
For the circuit shown in Figure 32 using the 5 V to 15 V reference
design in Table 13 and with VDD1 (MIN) = 4.5 V, the turns ratio is
NS/NP = 3.
(1)
VDD1 ( MIN ) × D × 2
where:
NS/NP is the primary to secondary turns ratio.
VISO is the isolated output supply voltage.
VD is the Schottky diode voltage drop (0.5 V maximum).
VDD1 (MIN) is the minimum input supply voltage.
D is the duty cycle = 0.30 for a 30% typical duty cycle (40% is
the maximum duty cycle).
2 is a multiplier factor used for the push-pull switching cycle.
NS
where:
NS/NP is the primary to secondary turns ratio.
VISO is the isolated output supply voltage. VISO/2 is used because
the circuit uses two pairs of diodes, creating a doubler circuit.
VD is the Schottky diode voltage drop (0.5 V maximum).
VDD1 (MIN) is the minimum input supply voltage.
D is the duty cycle = 0.30 for a 30% typical duty cycle (40% is
the maximum duty cycle).
2 is a multiplier factor used for the push-pull switching cycle.
VDD1 ( MAX )
f SW ( MIN ) × 2
where:
VDD1 (MAX) is the maximum input supply voltage.
fSW (MIN) is the minimum primary switching frequency = 300 kHz
in startup.
2 is a multiplier factor used for the push-pull switching cycle.
Table 13. Transformer Reference Designs
Part No.
CR7983-CL
CR7984-CL
CR7985-CL
TGSAD-560V8LF
TGSAD-590V8LF
Manufacturer
Coilcraft
Coilcraft
Coilcraft
Halo Electronics
Halo Electronics
Turns Ratio,
PRI:SEC
1CT:2CT
1CT:3CT
1CT:5CT
1CT:2CT
1CT:3CT
ET Constant
(V × µs min)
18
18
18
14
14
Total Primary
Inductance (µH)
256
256
256
398
398
Rev. 0 | Page 15 of 20
Total Primary
Resistance (Ω)
0.4
0.4
0.4
0.8
0.8
Isolation
Voltage (rms)
5000
5000
5000
5000
5000
Isolation
Type
Reinforced
Reinforced
Reinforced
Supplemental
Supplemental
Reference
Figure 31
Figure 32
Figure 33
Figure 31
Figure 32
ADuM4070
Data Sheet
TRANSFORMER PRIMARY INDUCTANCE AND
RESISTANCE
Another important characteristic of the transformer for designs
with the ADuM4070 is the primary inductance. Transformers
for the ADuM4070 are recommended to have between 60 µH to
100 µH of inductance per primary winding. Values of primary
inductance in this range are needed for smooth operation of the
ADuM4070 pulse-by-pulse current-limit circuit, which can help
protect against a build-up of saturation currents in the transformer.
If the inductance is specified for the total of both primary windings, for example, as 400 µH, the inductance of one winding is
¼ of two equal windings, or 100 µH.
Another important characteristic of the transformer for designs
with the ADuM4070 is primary resistance. Primary resistance
as low as is practical (less than 1 Ω) helps to reduce losses and
improves efficiency. The dc primary resistance can be measured
and specified, and is shown for the transformers in Table 13.
TRANSFORMER ISOLATION VOLTAGE
Isolation voltage and isolation type should be determined for the
requirements of the application and then specified. The transformers listed in Table 13 have been specified at 5000 V rms for
reinforced isolation. Other isolation levels and isolation voltages
can be specified and requested from the transformer manufacturers listed in Table 13 or from other manufacturers.
SWITCHING FREQUENCY
The ADuM4070 switching frequency can be adjusted from
200 kHz to 1 MHz by changing the value of the ROC resistor shown
in Figure 31, Figure 32, and Figure 33. The value of the ROC resistor
needed for the desired switching frequency can be determined
from the switching frequency vs. ROC resistance curve shown in
Figure 4. The output filter inductor value and output capacitor value
for the ADuM4070 application schematics have been designed
to be stable over the switching frequency range of 500 kHz to
1 MHz, when loaded from 10% to 90% of the maximum load.
The ADuM4070 also has an open-loop mode where the output
voltage is not regulated and is dependent on the transformer turns
ratio (NS/NP) and the conditions of the output including output
load current and the losses in the dc-to-dc converter circuit. This
open-loop mode is selected when the OC pin is connected high
to the VDD2 pin. In open-loop mode, the switching frequency is
318 kHz.
TRANSIENT RESPONSE
The load transient response of the ADuM4070 output voltage for
10% to 90% of the full load is shown in Figure 19 to Figure 26
for the application schematics in Figure 31 and Figure 32. The
response shown is slow but stable and can have more output
change than desired for some applications. The output voltage
change with load transient is reduced, and the output is shown
to remain stable by adding more inductance to the output circuits,
as shown in the second VISO output waveform in Figure 19 to
Figure 26.
For additional improvement in transient response, add a 0.1 µF
ceramic capacitor (CFB) in parallel with the high feedback resistor
(see Figure 31 to Figure 33). This value helps to reduce the overshoot and undershoot during load transients.
COMPONENT SELECTION
Power supply bypassing is required at the input and output
supply pins. Note that a low ESR ceramic bypass capacitor of
0.1 µF is required on Side 1 between Pin 7 and Pin 8, and on
Side 2 between Pin 14 and Pin 15, as close to the chip pads as
possible.
The power supply section of the ADuM4070 uses a high oscillator frequency to efficiently pass power through the external
power transformer. Bypass capacitors are required for several
operating frequencies. Noise suppression requires a low inductance, high frequency capacitor; ripple suppression and proper
regulation require a large value capacitor. To suppress noise and
reduce ripple, large value ceramic capacitors of X5R or X7R
dielectric type are recommended. The recommended capacitor
value is 10 µF for VDD1 and 47 µF for VISO. These capacitors have
a low ESR and are available in moderate 1206 or 1210 sizes for
voltages up to 10 V. For output voltages larger than 10 V, two
22 µF ceramic capacitors can be used in parallel. See Table 14
for recommended components.
Table 14. Recommended Components
Part No.
GRM32ER71A476KE15L
GRM32ER71C226KEA8L
GRM31CR71A106KA01L
MBR0540T1G
Manufacturer
Murata
Murata
Murata
ON Semiconductor
LQH3NPN470MM0
ME3220-104KL
LQH6PPN470M43
LQH6PPN101M43
Murata
Coilcraft
Murata
Murata
Value
47 µF, 10 V, X7R, 1210
22 µF, 16 V, X7R, 1210
10 µF, 10 V, X7R, 1206
Schottky, 0.5 A, 40 V,
SOD-123
47 µH, 0.41 A, 1212
100 µH, 0.34 A, 1210
47 µH, 1.10 A, 2424
100 µH, 0.80 A, 2424
Inductors must be selected based on the value and supply
current needed. Most applications with switching frequencies
between 500 kHz and 1 MHz and load transients between 10%
and 90% of full load are stable with the 47 µH inductor value
listed in Table 14. Values as large as 200 µH can be used for power
supply applications with a switching frequency as low as 200 kHz
to help stabilize the output voltage or for improved load transient
response (see Figure 19 to Figure 26). Inductors in a small 1212
or 1210 size are listed in Table 14 with a 47 µH value and a 0.41 A
current rating to handle the majority of applications below a
400 mA load, and with a 100 µH value and a 0.34 A current
rating to handle a load up to 300 mA.
Recommended Schottky diodes have low forward voltage to
reduce losses and high reverse voltage of up to 40 V to withstand
the peak voltages available in the doubling circuits shown in
Figure 32 and Figure 33.
Rev. 0 | Page 16 of 20
Data Sheet
ADuM4070
PRINTED CIRCUIT BOARD (PCB) LAYOUT
Figure 34 shows the recommended PCB layout for the
ADuM4070. Note that the total lead length between the ends
of the low ESR capacitor and the VDDx and GNDx pins must
not exceed 2 mm.
VREG
The total input supply current is equal to the sum of the IDD1
primary transformer current and the ADuM4070 input current,
IDDA (see Figure 35).
GND2
VDD2
NC
FB
X2
NC
NC
NC
NC
IIN VDD1 IDD1
VDDA
OC
GND1
GND2
10461-031
GND1
POWER CONSUMPTION
VISO IISO
RECT
X1
VREG
X2
ADuM4070
Figure 34. Recommended PCB Layout
In applications that involve high common-mode transients, ensure
that board coupling across the isolation barrier is minimized.
Furthermore, design the board layout such that any coupling that
does occur affects all pins equally on a given component side.
Failure to ensure this can cause voltage differentials between pins
that exceed the absolute maximum ratings specified in Table 10,
thereby leading to latch-up and/or permanent damage.
The ADuM4070 is a power device that dissipates approximately
1 W of power when fully loaded and running at maximum speed.
Because it is not possible to apply a heat sink to an isolation device,
the device primarily depends on heat dissipation into the PCB
through the GND pins. If the device is used at high ambient temperatures, provide a thermal path from the GNDx pins to the
PCB ground plane. The board layout in Figure 34 shows enlarged
pads for Pin 2 and Pin 8 (GND1) on Side 1 and Pin 9 and Pin 15
(GND2) on Side 2. Large diameter vias should be implemented
from the pad to the ground planes and power planes to increase
thermal conductivity and to reduce inductance. Multiple vias in
the thermal pads can significantly reduce temperatures inside the
chip. The dimensions of the expanded pads are left to the discretion of the designer and depend on the available board space.
THERMAL ANALYSIS
The ADuM4070 consists of two internal die attached to a split
lead frame with two die attach paddles. For the purposes of
thermal analysis, the die are treated as a thermal unit, with the
highest junction temperature reflected in the θJA value from
Table 5. The value of θJA is based on measurements taken with
the part mounted on a JEDEC standard, 4-layer board with fine
width traces and still air.
Under normal operating conditions, the ADuM4070 operates at
full load across the full temperature range without derating the
output current. However, following the recommendations in the
Printed Circuit Board (PCB) Layout section decreases thermal
resistance to the PCB, allowing increased thermal margins at high
ambient temperatures.
REG
VDDA
IDDA
VDD2
5V
PRIMARY
COTROLLER/
DRIVER
INTERNAL
FEEDBACK
GND1
SECONDARY
CONTROLLER
FB
OC
GND2
10461-032
X1
The ADuM4070 has a thermal shutdown circuit that shuts down
the dc-to-dc converter of the ADuM4070 when a die temperature
of approximately 160°C is reached. When the die cools below
approximately 140°C, the ADuM4070 dc-to-dc converter and
outputs turn on again.
Figure 35. Power Consumption Within the ADuM4070
The total IIN current can be calculated as follows:
IIN = (IISO × VISO)/(E × VDD1)
where:
IIN is the total supply input current.
IISO is the current drawn by the secondary side external load.
E is the power supply efficiency at the given output load from
Figure 8 or Figure 14 at the VISO and VDD1 condition of interest.
POWER CONSIDERATIONS
Soft Start Mode and Current-Limit Protection
When the ADuM4070 first receives power from VDD1, it is
in soft start mode, and the output voltage, VISO, is increased
gradually while it is below the startup threshold. In soft start
mode, the width of the PWM signal is increased gradually by
the primary converter to limit the peak current during VISO
power-up. When the output voltage is larger than the startup
threshold, the PWM signal can be transferred from the secondary controller to the primary converter, and the dc-to-dc converter
switches from soft start mode to the normal PWM control mode.
If a short circuit occurs, the push-pull converter shuts down for
approximately 2 ms and then enters soft start mode. If, at the end
of soft start, a short circuit still exists, the process is repeated,
which is called hiccup mode. If the short circuit is cleared, the
ADuM4070 enters normal operation.
The ADuM4070 also has a pulse-by-pulse current limit, which
is active in startup and normal operation, and protects the
primary switches, X1 and X2, from exceeding approximately
1.3 A peak and also protects the transformer windings.
Rev. 0 | Page 17 of 20
ADuM4070
Data Sheet
The voltage presented in Figure 37 is shown as sinusoidal for
illustration purposes only. It is meant to represent any voltage
waveform varying between 0 V and some limiting value. The
limiting value can be positive or negative, but the voltage cannot
cross 0 V.
The insulation lifetime of the ADuM4070 depends on the voltage
waveform type imposed across the isolation barrier. The iCoupler
insulation structure degrades at different rates, depending on
whether the waveform is bipolar ac, unipolar ac, or dc. Figure 36,
Figure 37, and Figure 38 illustrate these different isolation
voltage waveforms.
Bipolar ac voltage is the most stringent environment. The goal
of a 50-year operating lifetime under the bipolar ac condition
determines the maximum working voltage recommended by
Analog Devices.
Rev. 0 | Page 18 of 20
RATED PEAK VOLTAGE
10461-033
Analog Devices performs accelerated life testing using voltage
levels higher than the rated continuous working voltage. Acceleration factors for several operating conditions are determined,
allowing calculation of the time to failure at the working voltage
of interest. The values shown in Table 11 summarize the peak
voltages for 50 years of service life in several operating conditions.
In many cases, the working voltage approved by agency testing is
higher than the 50-year service life voltage. Operation at working
voltages higher than the service life voltage listed in Table 11 can
lead to premature insulation failure.
0V
Figure 36. Bipolar AC Waveform
RATED PEAK VOLTAGE
10461-035
All insulation structures eventually break down when subjected
to voltage stress over a sufficiently long period. The rate of insulation degradation is dependent on the characteristics of the voltage
waveform applied across the insulation. In addition to the testing
performed by the regulatory agencies, Analog Devices, Inc., conducts an extensive set of evaluations to determine the lifetime
of the insulation structure within the ADuM4070.
In the case of unipolar ac or dc voltage, the stress on the insulation is significantly lower. This allows operation at higher
working voltages while still achieving a 50-year service life.
The working voltages listed in Table 11 can be applied while
maintaining the 50-year minimum lifetime, provided that the
voltage conforms to either the unipolar ac or dc voltage cases.
Treat any cross-insulation voltage waveform that does not conform
to Figure 37 or Figure 38 as a bipolar ac waveform, and limit its
peak voltage to the 50-year lifetime voltage value listed in Table 11.
0V
Figure 37. Unipolar AC Waveform
RATED PEAK VOLTAGE
10461-034
INSULATION LIFETIME
0V
Figure 38. DC Waveform
Data Sheet
ADuM4070
OUTLINE DIMENSIONS
12.85
12.75
12.65
1.93 REF
16
9
7.60
7.50
7.40
10.51
10.31
10.11
8
2.64
2.54
2.44
2.44
2.24
0.30
0.20
0.10
COPLANARITY
0.1
0.71
0.50
0.31
0.25 BSC
GAGE
PLANE
45°
SEATING
PLANE
1.27 BSC
1.01
0.76
0.51
0.46
0.36
COMPLIANT TO JEDEC STANDARDS MS-013-AC
0.32
0.23
8°
0°
11-15-2011-A
1
PIN 1
MARK
Figure 39. 16-Lead Standard Small Outline Package, with Increased Creepage [SOIC_IC]
Wide Body
(RI-16-2)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADuM4070ARIZ
ADuM4070ARIZ-RL
1
Temperature Range
−40°C to +105°C
−40°C to +105°C
Package Description
16-Lead SOIC_IC
16-Lead SOIC_IC
Z = RoHS Compliant Part.
Rev. 0 | Page 19 of 20
Package Option
RI-16-2
RI-16-2
Ordering Quantity
1,000
ADuM4070
Data Sheet
NOTES
©2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D10461-0-10/12(0)
Rev. 0 | Page 20 of 20
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