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Supervisory Circuits with Windowed
Watchdog and Manual Reset in 5-Lead SOT-23
ADM8323 / ADM8324
Data Sheet
FEATURES
Windowed watchdog, 8 timeout options
26 reset threshold options
2.5 V to 5 V in 100 mV increments
4 reset timeout options
1 ms, 20 ms, 140 ms, and 1120 ms (minimum)
Manual reset input
Open-drain or push-pull RESET outputs
Low power consumption
Specified over wide temperature range (−40°C to +125°C)
Qualified for automotive applications
5-lead SOT-23 package
APPLICATIONS
Automotive
Microprocessor systems
Computers
Controllers
Intelligent instruments
Portable equipment
V
CC
MR
V
CC
MR
ADM8323
V
REF
DEBOUNCE
ADM8324
V
REF
FUNCTIONAL BLOCK DIAGRAMS
GND
DEBOUNCE
RESET
GENERATOR
WINDOWED
WATCHDOG
DETECTOR
WDI
Figure 1.
RESET
GENERATOR
WINDOWED
WATCHDOG
DETECTOR
V
CC
RESET
RESET
GENERAL DESCRIPTION
The ADM8323 / ADM8324 are supervisory circuits that monitor power supply voltage levels and code execution integrity in microprocessor-based systems. An on-chip watchdog timer checks for activity within a preset timeout window. A reset signal can also be asserted by an external push-button switch through a manual reset input. The RESET output is either push-pull ( ADM8323 ) or open-drain ( ADM8324 ).
A watchdog failure results in a low output on the RESET pin. A failure can be triggered either by a fast watchdog error (watchdog pulses too close together) or by a slow watchdog error (no watchdog pulse within the timeout period). This effectively gives a window to observe the watchdog pulse. The watchdog timeout is measured from the last falling edge of the watchdog input (WDI). There are
eight different watchdog windows available, as shown in Table 5.
GND WDI
Figure 2.
Each device is available in a choice of 26 reset threshold options from 2.5 V to 5 V in 100 mV increments. There are also four reset timeout options of 1 ms, 20 ms, 140 ms, and 1120 ms (minimum).
The ADM8323 / ADM8324 are available in a 5-lead SOT-23 package and typically consume only 10 μA, making them suitable for use in low power portable applications.
Rev. A Document Feedback
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ADM8323/ADM8324
TABLE OF CONTENTS
Functional Block Diagrams ............................................................. 1
General Description ......................................................................... 1
Revision History ............................................................................... 2
Absolute Maximum Ratings ............................................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Theory of Operation ...................................................................... 10
Circuit Description..................................................................... 10
REVISION HISTORY
3/16—Rev. 0 to Rev. A
Change to Model Options Section Title ...................................... 12
Changes to Table 7 .......................................................................... 13
Data Sheet
Push-Pull RESET Output .......................................................... 10
Open-Drain RESET Output ..................................................... 10
Manual Reset Input .................................................................... 10
Windowed Watchdog Input ...................................................... 10
Applications Information .............................................................. 11
Watchdog Input Current ........................................................... 11
Transients ................................................. 11
= 0 V ........................................ 11
Model Options ................................................................................ 12
Outline Dimensions ....................................................................... 14
Ordering Guide .......................................................................... 14
Automotive Products ................................................................. 14
10/13—Revision 0: Initial Version
Rev. A | Page 2 of 16
Data Sheet ADM8323/ADM8324
SPECIFICATIONS
V
CC
= (V
TH
+ 1.5%) to 5.5 V, T
A
= −40°C to +125°C, unless otherwise noted. Typical values are at T
A
= 25°C.
Table 1.
Parameter
SUPPLY
V
CC
V
CC
that Guarantees Valid Output
Supply Current
Min
0.9
0.9
V
TH
− 1%
V
TH
−
1.5%
RESET THRESHOLD TEMPERATURE COEFFICIENT
RESET THRESHOLD HYSTERESIS
RESET TIMEOUT PERIOD
Reset Timeout Option A
Reset Timeout Option B
1
20
V
CC
Reset Timeout Option C
Reset Timeout Option D
TO RESET DELAY, t
RD
PUSH-PULL OUTPUT ( ADM8323
RESET Output Voltage
)
140
1120
RESET Rise Time
0.9 × V
CC
0.9 × V
CC
OPEN-DRAIN OUTPUT ( ADM8324 )
RESET Output Voltage
Open-Drain Reset Output Leakage Current
WATCHDOG INPUT
Watchdog Timeout Period (Fast) , t
WD-FAST
Watchdog Timeout Option A
Watchdog Timeout Option B
1
10
Watchdog Timeout Option C
Watchdog Timeout Option D
Watchdog Timeout Option E
Watchdog Timeout Option F
10
10
10
16
Watchdog Timeout Option G
Watchdog Timeout Option H
Watchdog Timeout Period (Slow)
,
t
WD-SLOW
27
512
Watchdog Timeout Option A
Watchdog Timeout Option B
Watchdog Timeout Option C
Watchdog Timeout Option D
Watchdog Timeout Option E
Watchdog Timeout Option F
Watchdog Timeout Option G
Watchdog Timeout Option H
10
100
300
10
60
44
76
1.24
Typ
10
10
V
TH
V
TH
50
20
2.5 × V
TH
1.4
28
200
1600
90
0.2
1.5
15
15
15
15
24
41
768
0.2
0.2
0.3
1
15
150
450
15
90
66
114
1.86
V ms ms ms ms ms ms ms ms
V
V
V
µA ms ms ms sec sec ms ms sec
0.2
0.2
0.3
100
1.8
36
260
2080
0.2
Max
5.5
20
18
Unit
V
µA
µA
V
TH
+ 1% V
V
TH
+ 1.5% V
Test Conditions/Comments
V
CC
= 5.5 V, WDI = 0 V
V
CC
= 3.6 V, WDI = 0 V
T
A
= 25°C
T
A
=
−
40°C to +125°C ms ms
µs
V ppm/°C mV ms ms
V
CC
falling at 1 mV/µs
V
CC
≥ 0.9 V, I
SINK
= 25 µA
V
V
V
V
V ns
V
CC
≥ 1.2 V, I
SINK
= 100 µA
V
CC
≥ 2.7 V, I
SINK
= 1.2 mA
V
CC
≥ 4.5 V, I
SINK
= 3.2 mA
V
CC
≥ 2.7 V, I
SOURCE
= 500 µA
V
CC
≥ 4.5 V, I
SOURCE
= 800 µA
From 10% to 90% V
CC
, C
L
= 5 pF, V
CC
= 3.3 V
V
CC
≥ 0.9 V, I
SINK
= 25 µA
V
CC
≥ 1.2 V, I
SINK
= 100 µA
V
CC
≥ 2.7 V, I
SINK
= 1.2 mA
V
CC
≥ 4.5 V, I
SINK
= 3.2 mA
Rev. A | Page 3 of 16
ADM8323/ADM8324 Data Sheet
Parameter
WDI Pulse Width
WDI Glitch Immunity
WDI Input Threshold
WDI Input Current
Min
200
0.3 × V
CC
Typ
100
0.35
Max
0.7 × V
CC
1
Unit
ns ns
V
µA
µA
Test Conditions/Comments
V
IL
= 0.3 × V
CC
, V
IH
= 0.7 × V
CC
V
WDI
= V
CC
V
WDI
= 0 V − 1 −0.35
MANUAL RESET INPUT
V
IL
V
IH
MR Input Pulse Width
MR Glitch Rejection
MR Pull-Up Resistance
2.0
1
35
100
75
0.8
125
V
V
µs ns kΩ
MR to Reset Delay 350 ns V
CC
= 5 V
1 The device switches from undervoltage reset to normal operation when 1.5 V <
2 The device monitors V available in approximately 100 mV increments from 2.5 V to 5 V.
V
CC
< 2.5 V.
CC
through an internal factory trimmed voltage divider, which programs the nominal reset threshold. Factory trimmed reset thresholds are
Rev. A | Page 4 of 16
Data Sheet
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 2.
Parameter
V
CC
All Other Pins
Output Current (RESET)
Operating Temperature Range
Storage Temperature Range
θ
JA
Thermal Impedance, SOT-23
Lead Temperature
Soldering (10 sec)
Vapor Phase (60 sec)
Infrared (15 sec)
Rating
−0.3 V to +6 V
−0.3 V to (V
CC
+ 0.3 V)
20 mA
−40°C to +125°C
−65°C to +150°C
270°C/W
300°C
215°C
220°C
ADM8323/ADM8324
Stresses at or above those listed under Absolute Maximum
Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.
ESD CAUTION
Rev. A | Page 5 of 16
ADM8323/ADM8324
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Data Sheet
RESET
1
GND
2
MR 3
ADM8323/
ADM8324
TOP VIEW
(Not to Scale)
5
4
V
CC
WDI
Figure 3. Pin Configuration
4
5
Table 3. Pin Function Descriptions
Pin No. Mnemonic Description
1 RESET
2
3
GND
MR
WDI
V
CC
Active Low Reset Output. Asserted whenever V
CC
is below the reset threshold, V
TH
. This pin is a push-pull output stage for the ADM8323 and an open-drain output stage for the ADM8324 .
Ground.
Manual Reset Input. This is an active low input that, when forced low for greater than the glitch filter time, generates a reset. It features a 75 kΩ internal pull-up resistor.
Watchdog Input. Generates a reset if the WDI pulse is not within the watchdog window.
Power Supply Voltage Being Monitored.
Rev. A | Page 6 of 16
Data Sheet
TYPICAL PERFORMANCE CHARACTERISTICS
14
13
12
11
10
9
8
7
6
5
4
3
2
V
CC
= 5.0V
V
CC
V
= 3.0V
CC
= 1.5V
1
0
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
TEMPERATURE (°C)
Figure 4. Supply Current (I
CC
) vs. Temperature
35
30
25
20
15
10
5
1.04
1.03
1.02
1.01
1.00
0.99
0.98
0.97
0.96
1.05
0
0 0.3 0.9 1.1 1.5 1.8 2.1 2.7 3.0 3.6 3.9 4.2 4.5 4.8 5.1
5.4
V
CC
(V)
Figure 5. Supply Current (I
CC
) vs. Supply Voltage (V
CC
)
0.95
–40 –20 0 20 40 60 80 100
TEMPERATURE (°C)
Figure 6. Normalized Reset Threshold vs. Temperature
120
ADM8323/ADM8324
1.15
1.10
1.05
1.00
0.95
0.90
0.85
100
90
80
70
60
50
40
30
20
10
0
–40
V
TH
= 5V
V
TH
= 2.93V
V
TH
= 2.5V
–20 0 20 40 60
TEMPERATURE (°C)
80 100
Figure 7. V
CC
to Reset Delay vs. Temperature
120
350
300
250
200
150
100
50
500
450
400
V
TH
= 2.5V
V
TH
= 2.93V
V
TH
= 5V
0
–40 –20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 8. Manual Reset to Reset Propagation Delay vs. Temperature
1.20
0.80
–40 –20 0 20 40 60 80 100
TEMPERATURE (°C)
Figure 9. Normalized Reset Timeout vs. Temperature
120
Rev. A | Page 7 of 16
ADM8323/ADM8324
1.20
1.15
1.10
1.05
1.00
0.95
0.90
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
TEMPERATURE (°C)
Figure 10. Normalized Watchdog Timeout vs. Temperature, Fast Timeout
1.20
1.15
1.10
1.05
1.00
0.95
0.90
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100 110 120 130
TEMPERATURE (°C)
Figure 11. Normalized Watchdog Timeout vs. Temperature, Slow Timeout
WDI
2
RESET
1
CH1 2.0V
CH2 2.0V
M400µs 1.25MS/s 800ns/pt
A CH1 1.48V
Figure 12. Fast Watchdog Timeout Period, Watchdog Timeout Option A
WDI
Data Sheet
2
RESET
1
CH1 2.0V
CH2 2.0V
M 4.0ms 125kS/s 8.0µs/pt
A CH2 1.48V
Figure 13. Slow Watchdog Timeout Period, Watchdog Timeout Option A
160
RESET ASSERTED ABOVE CURVE
140
V
TH
= 2.93V
120
V
TH
= 5V
100
80
60
40
20
V
TH
= 4.63V
0
10 100 1000
OVERDRIVE VOLTAGE (mV)
Figure 14. Maximum V
CC
Transient Duration vs. Reset Threshold Overdrive
850
840
830
820
810
800
790
780
770
760
750
740
730
720
710
700
690
680
670
660
650
–40
V
TH
= 2.93V
V
TH
= 2.5V
V
TH
= 5V
–20 0 20 40 60 80 100 120
TEMPERATURE (°C)
Figure 15. Manual Reset (MR) Minimum Pulse Width vs. Temperature
Rev. A | Page 8 of 16
Data Sheet
0.308
I
SINK
= 3.2mA
I
SINK
= 800µA
0.258
0.208
0.158
0.108
0.058
0.008
1.1
1.3
1.5
1.7
1.9
2.1
2.3
V
CC
VOLTAGE (V)
2.5
2.7
2.9
Figure 16. RESET Open-Drain V
OL
Voltage vs. V
CC
Voltage (V
TH
= 3 V)
0.30
I
SINK
= 3.2mA
I
SINK
= 800µA
0.25
0.20
0.15
0.10
0.05
0
1.1 1.3 1.5 1.7 1.9 2.1 2.3 2.5 2.7 2.9 3.1 3.3 3.5 3.7 3.9
V
CC
VOLTAGE (V)
Figure 17. RESET Push-Pull V
OL
Voltage vs. V
CC
Voltage (V
TH
= 4 V)
ADM8323/ADM8324
3.5
I
SOURCE
I
SOURCE
= 3.2mA
= 800µA
3.0
2.5
2.0
1.5
1.0
0.5
0
1.1
1.3
1.5
1.7
1.9
2.1
V
CC
VOLTAGE (V)
2.3
2.5
2.7
2.9
Figure 18. RESET Push-Pull V
OH
Voltage vs. V
CC
Voltage (V
TH
= 3 V)
25
24
23
22
21
20
19
18
17
16
2.6 2.8 3.0 3.2 3.4 3.6 3.8 4.0 4.2 4.4 4.6 4.8 5.0 5.2 5.4
V
CC
VOLTAGE (V)
Figure 19. RESET Push-Pull Rise Time vs. V
CC
Voltage
Rev. A | Page 9 of 16
ADM8323/ADM8324
THEORY OF OPERATION
CIRCUIT DESCRIPTION
The ADM8323 / ADM8324 provide microprocessor supply voltage supervision by controlling the microprocessor reset input.
Code execution errors are avoided during power-up, power-down, and brownout conditions by asserting a reset signal when the supply voltage is below a preset threshold and by allowing supply voltage stabilization with a fixed timeout reset pulse after the supply voltage rises above the threshold. In addition, problems with microprocessor code execution can be monitored and corrected with a windowed watchdog timer. If the user detects a problem with system operation, a manual reset input is available to reset the microprocessor, for example, by means of an external pushbutton switch.
PUSH-PULL RESET OUTPUT
The ADM8323 features an active low push-pull reset output.
The reset signal is guaranteed to be valid for V
CC
down to 0.9 V.
The reset output is asserted when V
CC
is below the reset threshold (V
TH
), when MR is driven low, or when WDI is not serviced within the watchdog timeout window. Reset remains asserted for the duration of the reset active timeout period (t
RP
) after V
CC
rises above the reset threshold and MR transitions from low to high or
after the watchdog timer fault occurs. Figure 20 illustrates the
behavior of the reset output.
V
CC
V
CC
1V
0V
V
CC
V
TH
V
TH
RESET t
RP t
RD
0V
Figure 20. Reset Timing Diagram
OPEN-DRAIN RESET OUTPUT
The ADM8324 has an active low, open-drain reset output. This output structure requires an external pull-up resistor to connect the reset output to a voltage rail no higher than Vcc. Use a resistor that complies with the logic low and logic high voltage level requirements of the microprocessor while supplying input current and leakage paths on the RESET line. A 10 kΩ resistor is adequate in most situations.
MANUAL RESET INPUT
The ADM8323 / ADM8324 feature a manual reset input (MR), which when driven low, asserts the reset output. When MR transitions from low to high, the reset output remains asserted for the duration of the reset active timeout period before deasserting.
The MR input has a 75 kΩ, internal pull-up resistor so that the input is always high when unconnected. An external push-button switch can be connected between MR and ground so the user can generate a reset. Debounce circuitry for this purpose is integrated on chip.
WDI
RESET
WDI
RESET
WDI
RESET
Rev. A | Page 10 of 16
Data Sheet
Noise immunity is provided on the MR input, and fast, negative going transients of up to 100 ns (typical) are ignored. A 0.1 µF capacitor between MR and ground provides additional noise immunity.
WINDOWED WATCHDOG INPUT
The ADM8323 / ADM8324 feature a windowed watchdog timer that monitors microprocessor activity. A timer circuit is cleared with every high to low logic transition on the watchdog input pin
(WDI), which detects pulses as short as 200 ns. If this watchdog pulse does not occur within the defined time window, a reset asserts. Failure of the microprocessor to toggle WDI within the watchdog window indicates a code execution error and, therefore, the generated reset pulse restarts the microprocessor in a known state.
As well as logic transitions on WDI, the watchdog timer is also cleared by a reset assertion due to an undervoltage condition on
V
CC
or due to MR being pulled low. When a reset is asserted, the watchdog timer is cleared and does not begin counting again until the reset deasserts. The windowed watchdog timer cannot be disabled.
All WDI input pulses are ignored while a reset is asserted. After the reset deasserts, the first WDI falling edge is ignored for the fast fault condition.
t
WDI
< t
WD-FASTmin t
RP
Figure 21. Watchdog Fast Timeout Fault
t
WDI
> t
WD-SLOWmax
Figure 22. Watchdog Slow Timeout Fault
t
WD-FASTmax
< t
WDI
< t
WD-SLOWmin
Figure 23. Normal Watchdog Operation
t
RP
Data Sheet
APPLICATIONS INFORMATION
WATCHDOG INPUT CURRENT
There is no way to disable the windowed watchdog functionality. Do not leave the WDI pin floating because this is not a valid mode of operation. If the WDI pin is not in a defined state at startup, this can lead to high supply current until the microprocessor is enabled and takes control of the WDI pin. A solution to this is to add a 100 kΩ pull-up or pull-down resistor on the
WDI pin to hold it in a defined state until the microprocessor is enabled.
NEGATIVE GOING V
CC
TRANSIENTS
To avoid unnecessary resets caused by fast power supply transients, the ADM8323 / ADM8324 are equipped with glitch rejection
circuitry. The typical performance characteristic in Figure 14
plots V
CC
transient duration vs. reset threshold overdrive. The curves show combinations of reset threshold overdrive and duration for which a reset is not generated for 5 V, 4.63 V, and
2.93 V reset threshold devices. For example, with the 2.93 V threshold, a transient that goes 100 mV below the threshold and lasts 80 µs typically does not cause a reset. However, if the transient is any larger in reset threshold overdrive or duration, a reset generates. An optional 0.1 µF bypass capacitor mounted near
V
CC
provides additional glitch rejection.
ADM8323/ADM8324
ENSURING RESET VALID TO V
CC
= 0 V
The reset output is guaranteed valid for V
CC
as low as 0.9 V.
However, by using an external resistor with the push-pull configured reset output on the ADM8323 , a valid output for V
CC as low as 0 V is possible. For this active low reset output, a resistor connected between RESET and ground pulls the output low when it is unable to sink current. Use a large resistance, such as
100 kΩ, so that it does not overload the reset output when V
CC is above 0.9 V.
V
CC
ADM8323
RESET
100k
Ω
Figure 24. Ensuring RESET Valid to V
CC
= 0 V
V
CC
RESET
ADM8323
MR WDI
RESET
MICROPROCESSOR
I/O
Figure 25. ADM8323 Typical Application Circuit
Rev. A | Page 11 of 16
ADM8323/ADM8324
MODEL OPTIONS
Table 4. Reset Timeout Options
Suffix Minimum
A
B
C
D
1
20
140
1120
Table 5. Watchdog Timeout Options
D
E
F
G
H
Suffix
A
B
C
Maximum
1.5
15
15
15
15
24
41
768
Table 6. Reset Voltage Threshold Options
33
32
31
30
29
28
27
26
25
37
36
35
34
41
40
39
38
Reset Threshold Number
50
45
44
43
42
49
48
47
46
3.267
3.168
3.049
2.970
2.901
2.772
2.673
2.604
2.475
4.059
3.960
3.861
3.762
3.663
3.564
3.465
3.366
Minimum
4.950
4.851
4.752
4.653
4.584
4.455
4.346
4.257
4.158
Data Sheet
Typical
1.4
28
200
1600
Fast
ms ms ms ms ms
Unit
ms ms ms
3.300
3.200
3.080
3.000
2.930
2.800
2.700
2.630
2.500
4.100
4.00
3.900
3.800
3.700
3.600
3.500
3.400
T
A
= 25°C
Typical
5.000
4.900
4.800
4.700
4.630
4.500
4.390
4.300
4.200
3.333
3.232
3.111
3.030
2.959
2.828
2.727
2.656
2.525
4.141
4.040
3.939
3.838
3.737
3.636
3.535
3.434
Maximum
5.050
4.949
4.848
4.747
4.676
4.545
4.434
4.343
4.242
Maximum
1.8
36
260
2080
Unit
ms ms ms ms
Minimum
10
100
300
10
60
44
76
1.24
3.250
3.152
3.033
2.955
2.886
2.758
2.659
2.590
2.462
4.038
3.940
3.841
3.743
3.644
3.546
3.447
3.349
T
A
= −40°C to +125°C
Minimum Maximum
4.925 5.075
4.826
4.728
4.629
4.560
4.432
4.324
4.235
4.137
4.974
4.872
4.771
4.700
4.568
4.456
4.365
4.263
3.350
3.248
3.127
3.045
2.974
2.842
2.741
2.670
2.538
4.162
4.060
3.959
3.857
3.756
3.654
3.553
3.451
Slow
sec sec ms ms sec
Unit
ms ms ms
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
Unit
V
Rev. A | Page 12 of 16
Data Sheet ADM8323/ADM8324
Table 7. Standard Models
Model Reset Threshold (V) Maximum Fast Timeout (ms) Minimum Slow Timeout (ms) Minimum Reset Timeout (ms)
ADM8323WCC29ARJZR7 2.93 15 300 140
ADM8323WCC46ARJZR7 4.63 15 300 140
ADM8324WAH29ARJZR7 2.93
ADM8324WCA29ARJZR7 2.93
ADM8324WCA46ARJZR7 4.63
768
1.5
1.5
1240
10
10
1
140
140
Rev. A | Page 13 of 16
ADM8323/ADM8324
OUTLINE DIMENSIONS
Data Sheet
1.70
1.60
1.50
3.00
2.90
2.80
5 4
1 2 3
1.90
BSC
0.95 BSC
3.00
2.80
2.60
1.30
1.15
0.90
0.15 MAX
0.05 MIN
0.50 MAX
0.35 MIN
1.45 MAX
0.95 MIN
0.20 MAX
0.08 MIN
SEATING
PLANE
10°
5°
0°
0.60
BSC
0.55
0.45
0.35
COMPLIANT TO JEDEC STANDARDS MO-178-AA
Figure 26. 5-Lead Small Outline Transistor Package [SOT-23]
(RJ-5)
Dimensions shown in millimeters
ADM83 W ARJZR7
GENERIC NUMBER
(23 OR 24)
ORDERING QUANTITY
R7: 3000-PIECE REEL, RoHS COMPLIANT
Z: RoHS COMPLIANT
W: AUTOMOTIVE QUAL
PACKAGE CODE
RJ: 5-LEAD SOT-23
RESET TIMEOUT PERIOD
A: 1ms (MIN)
B: 20ms (MIN)
C: 140ms (MIN)
D: 1120ms (MIN)
TEMPERATURE RANGE
A: –40°C TO +125°C
RESET THRESHOLD NUMBER
(25 TO 50)
WINDOWED WATCHDOG
TIMEOUT PERIOD (A-H)
Figure 27. Ordering Code Structure
ORDERING GUIDE
Model 1, 2, 3, 4 Temperature Range Ordering Quantity 5 Package Description
ADM8323WxxxxARJZR7
ADM8324WxxxxARJZR7
−40°C to +125°C
−40°C to +125°C
3,000
3,000
5-Lead SOT-23
5-Lead SOT-23
1
2
3
4
W = Qualified for Automotive Applications.
Z = RoHS Compliant Part.
5
Contact sales for the availability of nonstandard models. See Table 7 for a list of standard models.
A minimum of 12,000 (four reels) must be ordered for nonstandard models.
Package Option Branding
RJ-5
RJ-5
LNO
LMU
AUTOMOTIVE PRODUCTS
The ADM8323W / ADM8324W model are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. Note that these automotive models may have specifications that differ from the commercial models; therefore,
use in automotive applications. Contact your local Analog Devices, Inc., account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models.
Rev. A | Page 14 of 16
Data Sheet
NOTES
ADM8323/ADM8324
Rev. A | Page 15 of 16
ADM8323/ADM8324
NOTES
Data Sheet
©2013–2016 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D11802-0-3/16(A)
Rev. A | Page 16 of 16
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