MB39A110 4-ch DC/DC Converter IC with Synchronous Rectification

MB39A110 4-ch DC/DC Converter IC with Synchronous Rectification
FUJITSU SEMICONDUCTOR
DATA SHEET
DS04-27236-2E
ASSP For Power Supply Applications
(DC/DC Converter for DSC/Camcorder)
4-ch DC/DC Converter IC
with Synchronous Rectification
MB39A110
■ DESCRIPTION
The MB39A110 is a 4-channel DC/DC converter IC using pulse width modulation (PWM). This IC is ideal for up
conversion, down conversion, and up/down conversion.
This is built-in 4ch in TSSOP-38P package and operates at 2 MHz Max. Each channel can be controlled, and
soft-start.
This is an ideal power supply for high-performance portable devices such as digital still cameras.
This product is covered by US Patent Number 6,147,477.
■ FEATURES
•
•
•
•
•
•
•
•
•
•
•
Supports for down-conversion and up/down Zeta conversion (CH1 to CH3)
Supports for up-conversion and up/down Sepic conversion (CH4)
For synchronous rectification (CH1, CH2)
Power supply voltage range : 2.5 V to 11 V
Reference voltage : 2.0 V ± 1 %
Error amplifier threshold voltage : 1.23 V ± 1%
High-frequency operation capability: 2 MHz (Max)
Standby current : 0 µA (Typ)
Built-in soft-start circuit independent of loads
Built-in totem-pole type output for MOS FET
Short-circuit detection capability by external signal (−INS terminal)
■ PACKAGE
38-pin plastic TSSOP
(FPT-38P-M03)
MB39A110
■ PIN ASSIGNMENT
(TOP VIEW)
CS2
1
38
CS1
−INE2
2
37
−INE1
FB2
3
36
FB1
DTC2
4
35
DTC1
VCC
5
34
VCCO-P
CTL
6
33
OUT1-1
CTL1
7
32
OUT1-2
CTL2
8
31
OUT2-1
CTL3
9
30
OUT2-2
CTL4
10
29
GNDO1
VREF
11
28
GNDO2
RT
12
27
OUT3
CT
13
26
OUT4
GND
14
25
VCCO-N
CSCP
15
24
−INS
DTC3
16
23
DTC4
FB3
17
22
FB4
−INE3
18
21
−INE4
CS3
19
20
CS4
(FPT-38P-M03)
2
MB39A110
■ PIN DESCRIPTION
Block
CH1
CH2
CH3
CH4
Pin No.
Symbol
I/O
35
DTC1
I
Dead time control terminal
36
FB1
O
Error amplifier output terminal
37
−INE1
I
Error amplifier inverted input terminal
38
CS1

Soft-start setting capacitor connection terminal
33
OUT1-1
O
Pch drive output block ground terminal
(External main side FET gate driving)
32
OUT1-2
O
Nch drive output block ground terminal
(External synchronous rectification side FET gate driving)
4
DTC2
I
Dead time control terminal
3
FB2
O
Error amplifier output terminal
2
−INE2
I
Error amplifier inverted input terminal
1
CS2

Soft-start setting capacitor connection terminal
31
OUT2-1
O
Pch drive output block ground terminal
(External main side FET gate driving)
30
OUT2-2
O
Nch drive output block ground terminal
(External synchronous rectification side FET gate driving)
16
DTC3
I
Dead time control terminal
17
FB3
O
Error amplifier output terminal
18
−INE3
I
Error amplifier inverted input terminal
19
CS3

Soft-start setting capacitor connection terminal
27
OUT3
O
Pch drive output terminal
23
DTC4
I
Dead time control terminal
22
FB4
O
Error amplifier output terminal
21
−INE4
I
Error amplifier inverted input terminal
20
CS4

Soft-start setting capacitor connection terminal
26
OUT4
O
Nch drive output terminal
13
CT

Triangular wave frequency setting capacitor
connection terminal
12
RT

Triangular wave frequency setting resistor
connection terminal
OSC
Descriptions
(Continued)
3
MB39A110
(Continued)
Block
Pin No.
Control
Power
4
Symbol
I/O
Descriptions
6
CTL
I
Power supply control terminal
7
CTL1
I
Control terminal
8
CTL2
I
Control terminal
9
CTL3
I
Control terminal
10
CTL4
I
Control terminal
15
CSCP

24
−INS
I
34
VCCO-P

Pch drive output block power supply terminal
25
VCCO-N

Nch drive output block power supply terminal
5
VCC

Power supply terminal
11
VREF
O
Reference voltage output terminal
29
GNDO1

Drive output block ground terminal
28
GNDO2

Drive output block ground terminal
14
GND

Ground terminal
Short-circuit detection circuit capacitor connection
terminal
Short-circuit detection comparator inverted input
terminal
MB39A110
■ BLOCK DIAGRAM
PWM
+ Comp.1
+
−
1.23 V
FB1 36
DTC1 35
IO = 300 mA
CH1
at VCCO = 7 V
L priority
VREF priority Error
Amp1
1 µA
−
+
CS1 38
+
Dead Time
(td = 50 ns)
Threshold voltage
(1.23 V 1 )
34 VCCO-P
Drive1-1
Dead Time
L
−INE1 37
33 OUT1-1
Pch
Drive1-2
25 VCCO-N
32 OUT1-2
Nch
IO = 300 mA
at VCCO = 7 V
IO = 300 mA
CH2
L priority
at VCCO = 7 V
PWM
Drive2-1
+ Comp.2
L
VREF priority Error
Amp2
1 µA
−
+
1
CS2
+
+
−
1.23 V
FB2 3
DTC2 4
Dead Time
(td = 50 ns)
Threshold voltage
(1.23 V 1 )
Dead Time
−INE2 2
Pch
31 OUT2-1
Drive2-2
Nch
30 OUT2-2
IO = 300 mA
at VCCO = 7 V
L
−INE3 18
L priority
IO = 300 mA CH3
PWM at VCCO = 7 V
Drive3
+ Comp.3
VREF priority Error
Amp3
1 µA
−
+
CS3 19
+
+
−
1.23 V
FB3 17
DTC3 16
Threshold voltage
(1.23 V 1 )
−INE4 21
L
−INS 24
Short detection signal
(L: at short)
CSCP 15
CTL1
CTL2
CTL3
CTL4
7
8
9
10
SCP
− Comp.
+
1V
+
+
−
28 GNDO2
H : SCP
SCP
H : release
UVLO
OSC
12 13
RT CT
26 OUT4
Nch
29 GNDO1
0.9 V
0.4 V
CH
CTL
27 OUT3
L priority
IO = 300 mA CH4
PWM at VCCO = 7 V
Comp.4
Drive4
VREF priority Error
Amp4
1 µA
−
+
CS4 20
+
1.23 V
FB4 22
Threshold voltage
(1.23 V 1 )
DTC4 23
VREF
100 kΩ
Pch
ErrorAmp reference
1.23 V
bias
UVLO
ErrorAmp power supply
SCPComp. power supply
VREF
2.0 V
11
VREF
VR
Power
ON/OFF
CTL
5 VCC
6 CTL
14
GND
5
MB39A110
■ ABSOLUTE MAXIMUM RATINGS
Parameter
Power supply voltage
Symbol
VCC
Rating
Condition
Unit
Min
Max
VCC, VCCO terminal

12
V
Output current
IO
OUT1 to OUT4 terminal

20
mA
Peak output current
IOP
OUT1 to OUT4 terminal,
Duty ≤ 5% (t = 1 / fOSC×Duty)

400
mA
Power dissipation
PD
Ta ≤ +25 °C

1680*
mW
−55
+125
°C
Storage temperature

TSTG
* : The packages are mounted on the epoxy board (10 cm × 10 cm).
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
■ RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Power supply voltage
Reference voltage output current
VCC
IREF
Input voltage
Control input voltage
Output current
Oscillation frequency
Timing capacitor
Timing resistor
Soft-start capacitor
Short-circuit detection capacitor
Reference voltage output
capacitor
Operating ambient temperature
VINE
VDTC
VCTL
IO
fOSC
CT
RT
CS
CSCP
Condition
VCC, VCCO terminal
VREF terminal
−INE1 to −INE4 terminal
−INS terminal
DTC1 to DTC4 terminal
CTL terminal
OUT1 to OUT4 terminal



CS1 to CS4 terminal

Min
2.5
−1
0
0
0
0
−15
0.2
27
3.0


Value
Typ
7






1.02
100
6.8
0.1
0.1
Unit
Max
11
V
0
mA
VCC − 0.9
V
V
VREF
VREF
V
11
V
+15
mA
2.0
kHz
680
pF
39
kΩ
1.0
µF
1.0
µF
CREF


0.1
1.0
µF
Ta

−30
+25
+85
°C
WARNING: The recommended operating conditions are required in order to ensure the normal operation of the
semiconductor device. All of the device’s electrical characteristics are warranted when the device is
operated within these ranges.
Always use semiconductor devices within their recommended operating condition ranges. Operation
outside these ranges may adversely affect reliability and could result in device failure.
No warranty is made with respect to uses, operating conditions, or combinations not represented on
the data sheet. Users considering application outside the listed conditions are advised to contact their
FUJITSU representatives beforehand.
6
MB39A110
■ ELECTRICAL CHARACTERISTICS
Symbol
Pin No
VREF1
11
VREF = 0 mA
1.98
2.02
V
VREF2
11
VCC = 2.5 V to 11 V
1.975 2.000 2.025
V
VREF3
11
VREF = 0 mA to −1 mA
1.975 2.000 2.025
V
Input stability
Line
11
VCC = 2.5 V to 11 V

2*

mV
Load stability
Load
11
VREF = 0 mA to −1 mA

2*

mV
Temperature
stability
∆VREF
/VREF
11
Ta = 0 °C to +85 °C

0.20*

%
Output current
at short-circuit
IOS
11
VREF = 0 V

−300*

mA
Threshold
voltage
VTH
33
VCC =
1.7
1.8
1.9
V
Hysteresis
width
VH
33
0.05
0.1

V
Reset voltage
VRST
33
1.5
1.7
1.85
V
Threshold
voltage
VTH
15

0.65
0.70
0.75
V
Input source
current
ICSCP
15

−1.4
−1.0
−0.6
µA
0.97
1.02
1.07
MHz
1.076 MHz
Parameter
4. Triangular
wave oscillator
block [OSC]
3. Short-circuit
2. Under voltage
detection block lockout protection
[SCP]
circuit block [UVLO]
1. Reference
voltage
block [VREF]
Output voltage
5. Softstart
block
[CS1 to CS4]
(VCC = VCCO = 7 V, Ta = +25 °C)
Value
Conditions
Unit
Min
Typ
Max

VREF =
2.00
fOSC1
26, 27, 30 to 33 CT = 100 pF, RT = 6.8 kΩ
fOSC2
26, 27, 30 to 33
CT = 100 pF, RT = 6.8 kΩ,
0.964
VCC = 2.5 V to 11 V
1.02
Frequency
input stability
∆fOSC/
fOSC
26, 27, 30 to 33
CT = 100 pF, RT = 6.8 kΩ,
VCC = 2.5 V to 11 V

1.0*

%
Frequency
temperature
stability
∆fOSC/
fOSC
26, 27, 30 to 33
CT = 100 pF, RT = 6.8 kΩ,
Ta = 0 °C to +85 °C

1.0*

%
ICS
1, 19, 20, 38
−1.4
−1.0
−0.6
µA
Oscillation
frequency
Charge current
CS1 to CS4 = 0 V
* : Standard design value
(Continued)
7
MB39A110
Symbol
Pin No
VTH1
2, 18, 21, 37
VCC = 2.5 V to 11 V,
Ta = +25 °C
1.217 1.230 1.243
V
VTH2
2, 18, 21, 37
VCC = 2.5 V to 11 V,
Ta = 0 °C to +85 °C
1.215 1.230 1.245
V
∆VTH/
VTH
2, 18, 21, 37
Ta = 0 °C to +85 °C
Input bias
current
ΙB
2, 18, 21, 37
−INE1 to −INE4 = 0 V
Voltage gain
AV
3, 17, 22, 36
Frequency
bandwidth
BW
3, 17, 22, 36
VOH
3, 17, 22, 36
VOL
3, 17, 22, 36
ISOURCE
3, 17, 22, 36
ISINK
3, 17, 22, 36
Parameter
Threshold
voltage
Temperature
stability
6. Error amplifier
block
[Error Amp1 to
Error Amp4]
(VCC = VCCO = 7 V, Ta = +25 °C)
Value
Conditions
Unit
Min
Typ
Max

0.1*

%
−120
−30

nA
DC

100*

dB
AV = 0 dB

1.4*

MHz

1.7
1.9

V


40
200
mV
FB1 to FB4 = 0.65 V

−2
−1
mA
FB1 to FB4 = 0.65 V
150
200

µA
26, 27, 30 to 33 Duty cycle = 0%
0.3
0.4

V
26, 27, 30 to 33 Duty cycle = 100%
0.85
0.90
0.95
V
−2.0
−0.6

µA
Duty ≤ 5%
ISOURCE 26, 27, 30 to 33 (t = 1 / fOSC × Duty) ,
OUT1 to OUT4 = 0 V

−300*

mA
ISINK
Duty ≤ 5%
26, 27, 30 to 33 (t = 1 / fOSC × Duty) ,
OUT1 to OUT4 = 7 V

300*

mA
ROH
26, 27, 30 to 33 OUT1 to OUT4 = −15 mA

9
14
Ω
ROL
26, 27, 30 to 33 OUT1 to OUT4 = 15 mA

9
14
Ω
Output voltage
Output source
current
7. PWM
comparator block
[PWM Comp.1 to
PWM Comp.4]
Output sink
current
Threshold
voltage
Input current
8. Output block
[Drive1 to Drive4]
Output source
current
Output sink
current
Output ON
resistor
VT100
IDTC
4, 16, 23, 35
DTC = 0.4 V
tD1
30 to 33
OUT2
−OUT1

50*

ns
tD2
30 to 33
OUT1
−OUT2

50*

ns
Threshold
voltage
VTH
33
0.97
1.00
1.03
V
Input bias
current
IB
24
−25
−20
−17
µA
Dead time
9. Short-circuit
detection
comparator block
[SCP Comp.]
VT0

−INS = 0 V
*: Standard design value
(Continued)
8
MB39A110
(Continued)
Symbol
Pin No
Output ON
conditions
VIH
6, 7 to 10
CTL, CTL1 to CTL4
2

11
V
Output OFF
conditions
VIL
6, 7 to 10
CTL, CTL1 to CTL4
0

0.8
V
ICTLH
6, 7 to 10
CTL, CTL1 to CTL4 = 3 V

30
60
µA
ICTLL
6, 7 to 10
CTL, CTL1 to CTL4 = 0 V


1
µA
ICCS
5
CTL, CTL1 to CTL4 = 0 V

0
2
µA
ICCSO
25, 34
CTL = 0 V

0
1
µA
ICC
5
CTL = 3 V

3
4.5
mA
10. Control block
[CTL, CHCTL]
Parameter
11. General
(VCC = VCCO = 7 V, Ta = +25 °C)
Value
Conditions
Unit
Min
Typ
Max
Input current
Standby
current
Power supply
current
*: Standard design value
9
MB39A110
■ TYPICAL CHARACTERISTICS
Power Supply Current vs. Power Supply Voltage
5
Ta = +25 °C
CTL = 3 V
Reference voltage VREF (V)
Power supply current ICC (mA)
5
Reference Voltage vs. Power Supply Voltage
4
3
2
1
0
Ta = +25 °C
CTL = 3 V
VREF= 0 mA
4
3
2
1
0
0
2
4
6
8
10
12
0
2
Power supply voltage VCC (V)
4
6
8
10
12
Power supply voltage VCC (V)
Reference Voltage vs. Ambient Temperature
2.05
VCC = 7 V
CTL = 3 V
VREF= 0 mA
Reference voltage VREF (V)
2.04
2.03
2.02
2.01
2.00
1.99
1.98
1.97
1.96
1.95
−40
−20
0
20
40
60
80
100
Ambient temperature Ta (°C)
Reference voltage VREF (V)
5
Ta = +25 °C
VCC = 7 V
VREF= 0 mA
CTL = 3 V
4
3
2
1
0
0
2
4
6
8
10
CTL terminal voltage VCTL (V)
12
CTL terminal Current vs. CTL terminal Voltage
200
CTL terminal current ICTL (µA)
Reference Voltage vs. CTL terminal Voltage
Ta = +25 °C
VCC = 7 V
180
160
140
120
100
80
60
40
20
0
0
2
4
6
8
10
12
CTL terminal voltage VCTL (V)
(Continued)
10
MB39A110
Triangular Wave Oscillation Frequency
vs. Timing Resistor
Ta = +25 °C
VCC = 7 V
CTL = 3 V
1000
CT = 27 pF
CT = 100 pF
CT = 680 pF CT = 230 pF
100
10000
Triangular wave oscillation
frequency fOSC (kHz)
Triangular wave oscillation
frequency fOSC (kHz)
10000
Triangular Wave Oscillation Frequency
vs. Timing Capacitor
Ta = +25 °C
VCC = 7 V
CTL = 3 V
1000
RT = 3 kΩ
RT = 39 kΩ RT = 15 kΩ
100
10
10
1
10
100
10
1000
Timing resistor RT (kΩ)
Upper
0.90
0.80
0.70
0.60
0.50
0.40
Lower
0.30
0.20
0
10000
Triangular Wave Upper and Lower Limit Voltage
vs. Ambient Temperature
400
800
1200
1600
2000
Triangular wave oscillation frequency fOSC (kHz)
Triangular wave upper and
lower limit voltage VCT (V)
Triangular wave upper and
lower limit voltage VCT (V)
1.00
1000
1.20
Ta = +25 °C
VCC = 7 V
CTL = 3 V
RT = 6.8 kΩ
1.10
100
Timing capacitor CT (pF)
Triangular Wave Upper and Lower Limit Voltage
vs. Triangular Wave Oscillation Frequency
1.20
RT = 6.8 kΩ
VCC = 7 V
1.10 CTL = 3 V
1.00 RT = 6.8 kΩ
CT = 100 pF
0.90
Upper
0.80
0.70
0.60
0.50
0.40
Lower
0.30
0.20
−40
−20
0
20
40
60
80
100
Ambient temperature Ta (°C)
Triangular wave oscillation
frequency fOSC (kHz)
Triangular Wave Oscillation Frequency
vs. Ambient Temperature
1100
VCC = 7 V
CTL = 3 V
RT = 6.8 kΩ
CT = 100 pF
1080
1060
1040
1020
1000
980
960
940
920
900
−40
−20
0
20
40
60
80
100
Ambient temperature Ta (°C)
(Continued)
11
MB39A110
(Continued)
Error Amplifier Gain, Phase vs. Frequency
30
ϕ
20
Gain AV (dB)
Ta = +25 °C
180
VCC = 7 V
AV
90
10
0
0
−10
−20
−90
−30
−180
1k
10 k
100 k
1M
10 M
Frequency f (Hz)
Power Dissipation vs. Ambient Temperature
2000
Power dissipation PD (mW)
240 kΩ
10 kΩ
1 µF
+
2.4 kΩ
IN
10 kΩ
37
−
38
+
+
1.5 V
−40
1800
1680
1600
1400
1200
1000
800
600
400
200
0
−40
−20
0
20
40
60
80
Ambient temperature Ta (°C)
12
2.46 V
Phase φ (deg)
40
100
1.23 V
36
OUT
Error Amp1
the same as
other channels
MB39A110
■ FUNCTION DESCRIPTION
1. DC/DC Converter Functions
(1) Reference Voltage Block (VREF)
The reference voltage circuit generates a temperature-compensated reference voltage (2.0 V Typ) from the
voltage supplied from the power supply terminal (pin 5). The voltage is used as the reference voltage for the IC’s
internal circuit.
The reference voltage can supply a load current of up to 1 mA to an external device through the VREF terminal
(pin 11).
(2) Triangular-wave Oscillator Block (OSC)
The triangular wave oscillator incorporates a timing capacitor and a timing resistor connected respectively to
the CT terminal (pin 13) and RT terminal (pin 12) to generate triangular oscillation waveform amplitude of 0.4 V
to 0.9 V.
The triangular waveforms are input to the PWM comparator in the IC.
(3) Error Amplifier Block (Error Amp1 to Error Amp4)
The error amplifier detects the DC/DC converter output voltage and outputs PWM control signals. In addition,
an arbitrary loop gain can be set by connecting a feedback resistor and capacitor from the output terminal to
inverted input terminal of the error amplifier, enabling stable phase compensation to the system.
Also, it is possible to prevent rush current at power supply start-up by connecting a soft-start capacitor with the
CS1 terminal (pin 38) to CS4 terminal (pin 20) which are the non-inverted input terminal for Error Amp. The use
of Error Amp for soft-start detection makes it possible for a system to operate on a fixed soft-start time that is
independent of the output load on the DC/DC converter.
(4) PWM Comparator Block (PWM Comp.1 to PWM Comp.4)
The PWM comparator is a voltage-to-pulse width modulator that controls the output duty depending on the input/
output voltage.
The output transistor turns on while the error amplifier output voltage and DTC voltage remain higher than the
triangular wave voltage.
(5) Output Block (Drive1 to Drive 4)
The output block is in the totem pole type, capable of driving an external P-channel MOS FET (channel 1 and
2 main side and channel 3), and N-channel MOS FET (channel 1 and 2 synchronous rectification side and
channel 4).
13
MB39A110
2. Channel Control Function
The main or each channel is turned on and off depending on the voltage levels at the CTL terminal (pin 6), CS1
terminal (pin 38), CS2 terminal (pin 1), CS3 terminal (pin 19), and CS4 terminal (pin 20).
Channel On/Off Setting Conditions
CTL
CTL1
CTL2
CTL3
CTL4
Power
CH1
CH2
CH3
CH4
L
*
*
*
*
OFF
OFF
OFF
OFF
OFF
H
H
H
H
H
H
L
H
L
L
L
H
L
L
H
L
L
H
L
L
L
H
L
H
L
L
L
L
H
H
ON
ON
ON
ON
ON
ON
OFF
ON
OFF
OFF
OFF
ON
OFF
OFF
ON
OFF
OFF
ON
OFF
OFF
OFF
ON
OFF
ON
OFF
OFF
OFF
OFF
ON
ON
* : Undifined
Note : Note that current over stand-by current flows into VCC terminal when the CTL terminal is in “L” level and one
of terminals between CTL1 and CTL4 is set to “H” level.
(Refer to “■ I/O EQUIVALENT CIRCUIT”)
3. Protective Functions
(1) Timer-latch short-circuit protection circuit (SCP, SCP Comp.)
The short-circuit detection comparator (SCP) detects the output voltage level of each channel, and if any channel
output voltage becomes the short-circuit detection voltage or less, the timer circuits are actuated to start charging
the external capacitor CSCP connected to the CSCP terminal (pin 15).
When the capacitor (CSCP) voltage reaches about 0.7 V, the circuit is turned off the output transistor and sets the
dead time to 100 %.
In addition, the short-circuit detection from external input is capable by using −INS terminal (pin 24) on shortcircuit detection comparator (SCP Comp.) .
To release the actuated protection circuit, either turn the power supply off and on again or set the CTL terminal
(pin 6) to the “L” level to lower the VREF terminal (pin 11) voltage to 1.5 V (Min) or less. (See “■SETTING TIME
CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT”.)
(2) Under voltage lockout protection circuit (UVLO)
The transient state or a momentary decrease in supply voltage, which occurs when the power supply is turned
on, may cause the IC to malfunction, resulting in breakdown or degradation of the system. To prevent such
malfunctions, under voltage lockout protection circuit detects a decrease in internal reference voltage with respect
to the power supply voltage, turn off the output transistor, and set the dead time to 100% while holding the CSCP
terminal (pin 15) at the “L” level.
The circuit restores the output transistor to normal when the supply voltage reaches the threshold voltage of the
undervoltage lockout protection circuit.
■ PROTECTION CIRCUIT OPERATING FUNCTION TABLE
This table refers to output condition when protection circuit is operating.
Operating circuit
OUT1-1
OUT1-2
OUT2-1
14
OUT2-2
OUT3
OUT4
Short-circuit protection circuit
H
L
H
L
H
L
Under voltage lockout protection circuit
H
L
H
L
H
L
MB39A110
■ SETTING THE OUTPUT VOLTAGE
• CH1 to CH4
VO
R1
−
−INEX
R2
Error
Amp
+
+
VO (V) =
1.23
R2
(R1 + R2)
1.23 V
CSX
X: Each channel No.
■ SETTING THE TRIANGULAR OSCILLATION FREQUENCY
The triangular oscillation frequency is determined by the timing resistor (RT) connected to the RT terminal
(pin 12), and the timing capacitor (CT) connected to the CT terminal (pin 13).
Triangular oscillation frequency : fOSC
fOSC (kHz) =:
693600
CT (pF) •RT (kΩ)
15
MB39A110
■ SETTING THE SOFT-START TIME
To prevent rush currents when the IC is turned on, you can set a soft-start by connecting soft-start capacitors
(CS1 to CS4) to the CS1 terminal (pin 38) to the CS4 terminal (pin 20), respectively.
Setting each CTLX from “L” to “H” switches to charge the external soft-start capacitors (CS1 to CS4) connected
to the CS1 to CS4 terminals at 1 µA.
The error amplifier output (FB1 to FB4) is determined by comparison between the lower one of the potentials
at two non-inverted input terminals (1.23 V, CS terminal voltages) and the inverted input terminal voltage (−INE1
to −INE4).
The FB terminal voltage during the soft-start period (CS terminal voltage < 1.23 V) is therefore determined by
comparison between the −INE terminal and CS terminal voltages. The DC/DC converter output voltage rises in
proportion to the CS terminal voltage as the soft-start capacitor connected to the CS terminal is charged.
The soft-start time is obtained from the following formula:
Soft-start time: ts (time to output 100%)
ts (s) =: 1.23 × CSX (µF)
• Soft-Start Circuit
VO
VREF
1 µA
R1
−INEX
R2
L priority
Error Amp
−
+
+
CSX
1.23 V
CSX
FBX
CTLX
CHCTL
X: Each channel No.
16
MB39A110
■ TREATMENT WITHOUT USING CS TERMINAL
When not using the soft-start function, open the CS1 terminal (pin 38), the CS2 terminal (pin 1), the CS3 terminal
(pin 19), the CS4 terminal (pin 20).
• Without Setting Soft-Start Time
“OPEN”
“OPEN”
1
CS2
CS1
38
19
CS3
CS4
20
“OPEN”
“OPEN”
17
MB39A110
■ SETTING TIME CONSTANT FOR TIMER-LATCH SHORT-CIRCUIT PROTECTION CIRCUIT
Each channel uses the short-circuit detection comparator (SCP) to always compare the error amplifier′s output
level to the reference voltage.
While DC/DC converter load conditions are stable on all channels, the short-circuit detection comparator output
remains at “L” level, and the CSCP terminal (pin 15) is held at “L” level.
If the load condition on a channel changes rapidly due to a short-circuit of the load, causing the output voltage
to drop, the output of the short-circuit detection comparator on that channel goes to “H” level. This causes the
external short-circuit protection capacitor CSCP connected to the CSCP terminal to be charged at 1 µA.
Short-circuit detection time : tCSCP
tCSCP (s) =: 0.70 × CSCP (µF)
When the capacitor CSCP is charged to the threshold voltage (VTH =: 0.70 V), the latch is set and the external
FET is turned off (dead time is set to 100%). At this time, the latch input is closed and the CSCP terminal
(pin 15) is held at “L” level.
In addition, the short-circuit detection from external input is capable by using −INS terminal (pin 24) on the
short-circuit detection comparator (SCP Comp.). The short-circuit detection operation starts when −INS terminal
voltage is less than threshold voltage (VTH =: 1 V).
When the power supply is turn off and on again or VREF terminal (pin 11) voltage is less than 1.5 V (Min) by
setting CTL terminal (pin 6) to “L” level, the latch is released.
• Timer-latch short-circuit protection circuit
VO
FBX
R1
−
−INEX
Error
Amp
+
R2
1.23 V
SCP
Comp.
+
+
−
1.1 V
1 µA
To each channel
Drives
CTL
CSCP
15
VREF
S
R
Latch
UVLO
X: Each channel No.
18
MB39A110
■ TREATMENT WITHOUT USING CSCP TERMINAL
When not using the timer-latch short-circuit protection circuit, connect the CSCP terminal (pin 15) to GND with
the shortest distance.
• Treatment
without using CSCP terminal
14
GND
15
CSCP
19
MB39A110
■ SETTING THE DEAD TIME
When the device is set for step-up or inverted output based on the step-up or step-up/down Zeta conversion,
step-up/down Sepic conversion or flyback conversion, the FB terminal voltage may reach and exceed the triangular wave voltage due to load fluctuation. If this case happens, the output transistor is fixed to a full-ON state
(ON duty = 100 %). To prevent this, set the maximum duty of the output transistor. To set it, set the voltage at
the DTC terminal by applying a resistive voltage divider to the VREF voltage as shown below.
When the DTC terminal voltage is higher than the triangular wave voltage, the output transistor is turned on.
The maximum duty calculation formula assuming that triangular wave amplitude = 0.5 V and triangular wave
lower voltage = 0.4 V is given below.
DUTY (ON) Max =
Vdt − 0.4 V
× 100 (%) , Vdt =
0.5 V
Rb
Ra + Rb
× VREF
When the DTC terminal is not used, connect it directly to the VREF terminal (pin 11) as shown below (when no
dead time is set).
• When
using DTC to set dead time
Ra
DTCX
Rb
11 VREF
Vdt
X: Each channel No.
• When
no dead time is set
DTCX
11 VREF
X: Each channel No.
20
MB39A110
■ I/O EQUIVALENT CIRCUIT
〈〈Reference voltage block〉〉
〈〈Control block〉〉
〈〈Channel control block〉〉
VCC 5
1.23 V
ESD
Protection
Element
+
−
ESD
Protection
Element
CTLX
CTL 6
67
kΩ
76
kΩ
104
kΩ
76
kΩ
79
kΩ
11 VREF
ESD
Protection
Element
124
kΩ
GND 14
GND
GND
〈〈Triangular wave oscillator
block (CT)〉〉
〈〈Triangular wave oscillator
block (RT) 〉〉
〈〈Short-start block〉〉
VREF
(2.0 V)
VREF
(2.0 V)
VREF
(2.0 V)
+
0.7 V
CSX
−
CT 13
12 RT
GND
GND
GND
〈〈Error amplifier block (CH1 to CH4) 〉〉
〈〈Short-circuit detection block〉〉
VCC
VREF
(2.0 V)
−INEX
〈〈Short-circuit detection
comparator block〉〉
VCC
VREF
(2.0 V)
CSX
VREF
(2.0 V)
−INS 24
2 kΩ
100 kΩ
(1 V)
15 CSCP
FBX
1.23 V
GND
GND
〈〈PWM comparator block〉〉
〈〈Output block Pch (CH1 to CH3) 〉〉 〈〈Output block Nch (CH1, CH2, CH4) 〉〉
VCC
FB1 to FB4
GND
VCCO-P 34
VCCO-N 25
OUT1-X
OUTX
CT
OUT2-X
OUTX
DTCX
GND
GNDO1 29
GNDO1
GNDO2 28
GNDO2
X: Each channel No.
21
MB39A110
■ APPLICATION EXAMPLE
VIN
(5.5 V to
8.5 V)
R24 R25
0.2 kΩ 9.1 kΩ −INE1
A
37
R26
20 kΩ
CS1
38
R27
C20
1 kΩ
0.15 µF
FB1
36
C19
0.1 µF
35
DTC1
R9 R10
3.3 kΩ 22 kΩ −INE2
2
B
R11
15 kΩ
CS2
1
R12
C10
1 kΩ
0.15 µF
FB2
3
C11
0.1 µF
4
DTC2
R14 R15
3 kΩ 43 kΩ −INE3
18
C
R16
15 kΩ
CS3
19
R17
C16
1 kΩ
0.15 µF
FB3
17
C15
0.1 µF
16
R18 R19 DTC3
12 kΩ 100 kΩ −INE4
21
D
R20
10 kΩ
CS4
20
R21
C17
1 kΩ
0.15 µF
FB4
22
R22 C18
33 kΩ 0.1 µF
23
DTC4
R23
20 kΩ
−INS
Short-circuit
24
detection signal
(L : at short-circuit)
CSCP
15
C14
2200 pF
CTL1 7
CTL2 8
CTL3 9
CTL4 10
VCCO-P
34
C22 0.1 µF Q1
L1
6.8
µH
OUT1-1
VCCO-N
25
C23
0.1 µF
32
OUT1-2
C1
1 µF
Q2
D1
B
Q3
31
CH2
OUT2-1
C3
1 µF
Q4
OUT2-2
L2
6.8
µH
D2
Stepdown
VO1
(1.8 V)
IO1 =
550 mA
C2
2.2 µF
Stepdown
VO2
(3.3 V)
IO2 =
600 mA
C4
2.2 µF
30
C
Q5
OUT3
27
CH3
L3
10
µH
C5
1 µF
D3
D
D4
C7
1 µF
OUT4
GNDO1
29
GNDO2
28
VCC
5
C21
0.1 µF
6 CTL
12 13
11
CT
C13
100 pF
14
VREF
C12
0.1 µF
GND
D5
T1
26
CH4
RT
R13
6.8 kΩ
22
33
CH1
A
Q6
Stepdown
VO3
(5.0 V)
IO3 =
250 mA
C6
2.2 µF
Transformer
VO4-1
(15 V)
IO4-1 =
40 mA
VO4-2
(−15 V)
IO4-2 =
−10 mA
C8
C9
2.2 µF 2.2 µF
MB39A110
■ PARTS LIST
COMPONENT
ITEM
SPECIFICATION
VENDOR
PARTS No.
Q1, Q3, Q5
Q2, Q4
Q6
Pch FET
Nch FET
Nch FET
VDS = −20 V, ID = −1.0 A
VDS = 20 V, ID = 1.8 A
VDS = 30 V, ID = 1.4 A
SANYO
SANYO
SANYO
MCH3307
MCH3405
MCH3408
D1 to D3
D4, D5
Diode
Diode
VF = 0.4 V (Max) , IF = 1 A
VF = 0.55 V (Max) , IF = 0.5 A
SANYO
SANYO
SBS004
SB05-05CP
L1, L2
L3
Inductor
Inductor
6.8 µH
10 µH
1.1 A, 47 mΩ
0.94 A, 56 mΩ
TDK
TDK
RLF5018T6R8M1R1
RLF5018T100MR94
T1
Transformer


SUMIDA
CLQ52 5388-T139
C1, C3, C5, C7
C2, C4, C6, C8
C9, C11
C10, C16, C17
C11, C12, C15
C13
C14
C18, C19
C20
C21 to C23
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
Ceramics Condenser
1 µF
2.2 µF
2.2 µF
0.15 µF
0.1 µF
100 pF
2200 pF
0.1 µF
0.15 µF
0.1 µF
25 V
25 V
25 V
16 V
50 V
50 V
50 V
50 V
16 V
50 V
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
TDK
C3216JB1E105K
C3216JB1E225K
C3216JB1E225K
C1608JB1C154M
C1608JB1H104K
C1608CH1H101J
C1608JB1H222K
C1608JB1H104K
C1608JB1C154M
C1608JB1H104K
R9
R10
R11, R16
R12, R17, R21
R13
R14
R15
R18
R19
R20
R22
R23, R26
R24
R25
R27
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
Resistor
3.3 kΩ
22 kΩ
15 kΩ
1 kΩ
6.8 kΩ
3 kΩ
43 kΩ
12 kΩ
100 kΩ
10 kΩ
33 kΩ
20 kΩ
200 Ω
9.1 kΩ
1 kΩ
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
0.5%
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
ssm
RR0816P-332-D
RR0816P-223-D
RR0816P-153-D
RR0816P-102-D
RR0816P-682-D
RR0816P-302-D
RR0816P-433-D
RR0816P-123-D
RR0816P-104-D
RR0816P-103-D
RR0816P-333-D
RR0816P-203-D
RR0816P-201-D
RR0816P-912-D
RR0816P-102-D
Note : SANYO : SANYO Electric Co., Ltd.
TDK : TDK Corporation
SUMIDA : SUMIDA Electric Co., Ltd.
ssm : SUSUMU Co., Ltd.
23
MB39A110
■ REFERENCE DATA
TOTAL Efficiency vs. Input Voltage
TOTAL efficiency η (%)
100
95
90
85
Ta = +25 °C
VO1 = 1.8 V, 550 mA
VO2 = 3.3 V, 600 mA
VO3 = 5 V, 250 mA
VO4-1 = 15 V, 40 mA
VO4-2 = −15 V, −10 mA
fOSC = 1 MHz setting
80
75
70
5.0
5.5
6.0
6.5
7.0
7.5
8.0
8.5
9.0
Input voltage VIN (V)
Each CH Efficiency vs. Input Voltage
100
Each CH efficiency η (%)
95
CH3
CH2
90
85
CH1
80
75
70
5.0
Note: Only concerned CH is ON.
Include external SW Tr
operating current.
5.5
6.0
6.5
7.0
Ta = +25 °C
VO1 = 1.8 V, 550 mA
VO2 = 3.3 V, 600 mA
VO3 = 5 V, 250 mA
VO4-1 = 15 V, 40 mA
VO4-2 = −15 V, −10 mA
fOSC = 1 MHz setting
7.5
8.0
CH4
8.5
9.0
Input voltage VIN (V)
(Continued)
24
MB39A110
Conversion Efficiency vs. Load Current (CH1, CH2, CH3)
Conversion efficiency η (%)
100
Ta = +25 °C
VIN = 7.2 V
95
CH3
CH2
90
CH1
85
80
Note: Only concerned CH is ON.
Include external SW Tr
operating current.
IO2 ≤ 120 mA:
discontinuance mode
75
70
0
100
200
300
400
500
600
700
800
900
1000
load current IO (mA)
Conversion Efficiency vs. Load Current (CH4)
Conversion efficiency η (%)
100
Ta = +25 °C
VIN = 7.2 V
Notes : • Only feedback controlling
output is get by using
transformer channel.
VO4-2: IO = −10 mA fixed
• Only concerned CH is ON.
Include external SW Tr
operating current.
95
90
CH4
85
80
IO4−1 ≤ 30 mA:
discontinuance mode
75
70
0
10
20
30
40
50
60
load current lO (mA)
(Continued)
25
MB39A110
Switching Wave Form
OUT1-1 (V)
10
5
0
OUT1-2 (V)
10
8
5
6
0
CH1
VIN = 7.2 V
VO1 = 1.8 V
IO1 = 550 mA
VD (V)
4
2
0
t (µs)
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
OUT2-1 (V)
10
5
0
OUT2-2 (V)
10
8
5
6
0
CH2
VIN = 7.2 V
VO2 = 3.3 V
IO2 = 600 mA
VD (V)
4
2
0
t (µs)
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
CH3
VIN = 7.2 V
V O3 = 5 V
IO3 = 250 mA
OUT3 (V)
10
5
0
8
VD (V)
6
4
2
0
t (µs)
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
(Continued)
26
MB39A110
(Continued)
CH4
VIN = 7.2 V
VO4-1 = 15 V
IO4-1 = 40 mA
VO4-2 = −15 V
IO4-1 = −10 mA
OUT4 (V)
10
5
0
8
VD (V)
6
4
2
0
t (µs)
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
27
MB39A110
■ USAGE PRECAUTION
• Printed circuit board ground lines should be set up with consideration for common impedance.
• Take appropriate static electricity measures.
• Containers for semiconductor materials should have anti-static protection or be made of conductive material.
• After mounting, printed circuit boards should be stored and shipped in conductive bags or containers.
• Work platforms, tools, and instruments should be properly grounded.
• Working personnel should be grounded with resistance of 250 kΩ to 1 MΩ between body and ground.
• Do not apply negative voltages.
The use of negative voltages below –0.3 V may create parasitic transistors on LSI lines, which can cause
abnormal operation.
■ ORDERING INFORMATION
Part number
MB39A110PFT
28
Package
38-pin plastic TSSOP
(FPT-38P-M03)
Remarks
MB39A110
■ PACKAGE DIMENSION
38-pin plastic TSSOP
(FPT-38P-M03)
9.70±0.10(.382±.004)
1.10(.043)
MAX
0~8˚
0.60±0.10
(.024±.004)
0.25(.010)
0.10±0.10
(.004±.004)
4.40±0.10 6.40±0.10
(.173±.004) (.252±.004)
INDEX
0.127±0.05
(.005±.002)
0.50(.020)
0.90±0.05
(.035±.002)
0.10(.004)
9.00(.354)
C
2002 FUJITSU LIMITED F38003Sc-1-1
Dimensions in mm (inches)
29
MB39A110
FUJITSU LIMITED
All Rights Reserved.
The contents of this document are subject to change without notice.
Customers are advised to consult with FUJITSU sales
representatives before ordering.
The information and circuit diagrams in this document are
presented as examples of semiconductor device applications, and
are not intended to be incorporated in devices for actual use. Also,
FUJITSU is unable to assume responsibility for infringement of
any patent rights or other rights of third parties arising from the use
of this information or circuit diagrams.
The products described in this document are designed, developed
and manufactured as contemplated for general use, including
without limitation, ordinary industrial use, general office use,
personal use, and household use, but are not designed, developed
and manufactured as contemplated (1) for use accompanying fatal
risks or dangers that, unless extremely high safety is secured, could
have a serious effect to the public, and could lead directly to death,
personal injury, severe physical damage or other loss (i.e., nuclear
reaction control in nuclear facility, aircraft flight control, air traffic
control, mass transport control, medical life support system, missile
launch control in weapon system), or (2) for use requiring
extremely high reliability (i.e., submersible repeater and artificial
satellite).
Please note that Fujitsu will not be liable against you and/or any
third party for any claims or damages arising in connection with
above-mentioned uses of the products.
Any semiconductor devices have an inherent chance of failure. You
must protect against injury, damage or loss from such failures by
incorporating safety design measures into your facility and
equipment such as redundancy, fire protection, and prevention of
over-current levels and other abnormal operating conditions.
If any products described in this document represent goods or
technologies subject to certain restrictions on export under the
Foreign Exchange and Foreign Trade Law of Japan, the prior
authorization by Japanese government will be required for export
of those products from Japan.
F0303
 FUJITSU LIMITED Printed in Japan
Was this manual useful for you? yes no
Thank you for your participation!

* Your assessment is very important for improving the work of artificial intelligence, which forms the content of this project

Download PDF

advertisement