**611EE602**

th

The research reported here has been carried out in the

**Dept. of Electrical Engineering, **

**National Institute of Technology Rourkela at the Advanced Power System Laboratory.**

I am greatly indebted to many persons for helping me complete this dissertation.

First and foremost, I would like to express my sense of gratitude and indebtedness to my supervisors

**Prof. Prafulla Chandra Panda and Prof. Bidyadhar Subudhi**

, Department of

Electrical Engineering, for their inspiring guidance, encouragement, and untiring effort throughout the course of this work. Their timely help and painstaking efforts made it possible to present the work contained in this thesis. I consider myself fortunate to have worked under their guidance.

Also, I am indebted to them for providing all official and laboratory facilities.

I am grateful to Director,

**Prof. S.K. Sarangi**

and

**Prof. Anup Kumar Panda**

, Head of

Electrical Engineering Department, National Institute of Technology Rourkela, for their kind support and concern regarding my academic requirements.

I am grateful to my Mater Scrutiny Committee members,

**Prof.**

**K.B. Mohanty, Prof.**

**S. **

**Ganguly**

and

**Prof. S. Ari,**

for their valuable suggestions and comments during this research period. I express my thankfulness to the faculty and staff members of the Electrical

Engineering Department for their continuous encouragement and suggestions.

I express my heartfelt thanks to the

**conference organizers**

for intensely reviewing the published papers and for giving their valuable comments, which helped to carry the research work in a right direction.

I am especially indebted to my colleagues in the power system group. First, I would like to thank

**Mr. Nilamani Rout**

and

**Ms.**

**Rakhee Panigrahi **

who helped me in my research work.

We shared each other’s a lot of knowledge in the field of power systems. I would also like to thank other members of APS Lab,

**Dr. Rajendra Prasad Narne **

and

** Dr.**

**Jose P Therattil **

for extending their technical and personal support. It has been a great pleasure to work with such a helpful, hardworking, and creative group. I would also thank my friends

**Mr. A. **

**Mazumadar, Mr. A. Kumar, Mr. A. Mahapatra and Mr. S. Mahapatra **

for their valuable thoughts in my research and personal career.

I express my deep sense of gratitude and reverence to my beloved father

**Sri. Sadhu Charan **

**Swain**

, mother

**Smt. Chitrakala Swain, **

uncle

** Mr. Lakshmidar Swain, **

aunt

** Smt. Anjana **

**Swain, **

brothers

**Mr. Sabyasachi Swain, Mr. Satyabrata Swain, **

sister

** Ms. Suchitra Swain **

and my Sister-in-law

** Smt. Tapaswini Swain **

who supported and encouraged me all the time, no matter what difficulties I encountered. Without my family’s sacrifice and support, this research work would not have been possible. It is a great pleasure for me to acknowledge and express my appreciation to all

**my well-wishers**

for their understanding, relentless supports, and encouragement during my research work. Last but not the least, I wish to express my sincere thanks to all those who helped me directly or indirectly at various stages of this work.

Above all, I would like to thank

**The Almighty God**

for the wisdom and perseverance that he has been bestowed upon me during this research work, and indeed, throughout my life.

**Abbreviations **

**Notations **

**Abstract **

**List of Figures **

**List of Tables **

**1.**

**Introduction **

1.1

Overview of Power Quality

1.2

Power Quality Problems

1.2.1 Transients

(

*Causes & Effects*

)

1.2.2 Sag/Under-Voltage

(

*Causes & Effects*

)

1.2.3 Swell/Over-voltage

(

*Causes & Effects*

)

1.2.4 Voltage Fluctuation

(

*Causes & Effects*

)

1.2.5 Notches

(

*Causes & Effects*

)

1.2.6 Noise

(

*Causes & Effects*

)

1.3

1.2.7 Harmonic distortion

(

*Causes of harmonic distortion & Effects of harmonic distortion*

)

Total Harmonic Distortion (THD) & IEEE Standard

1.4

Solution to Power Quality Problems

1.5

Active Power Filters

1.5.1 Shunt Active Power Filter

1.5.2 Series Active Power Filter

1.5.3 Unified Power Quality Conditioner

1.6

Literature review of APFs and its control strategies

1.7

Research Objectives

**xvi **

**1 **

2

**v vii x xi **

3

4

5

6

7

7

8

8

14

15

16

18

10

11

12

13

[i]

1.8

Thesis outline

**2.**

**Generation of Reference Source Current using Voltage Controllers **

2.1

Introduction

2.2

Basic compensation principle of Shunt Active Power Filter

2.3

Control Strategy

Generation of Reference Source Current

*Frequency domain Technique*

*Time domain Technique *

2.3.2 Generation of Gate Signal

2.4

Reference source current generation using Synchronous Reference

Frame

2.5

Reference source current generation using Self Tuning Filter

2.5.1 Source Voltage Filtering using Self Tuning Filter

2.5.2 Estimation of Reference Source Current

2.6

DC Capacitor bus Voltage regulation using Voltage Controllers

2.6.1 DC Capacitor bus Voltage regulation using PI Controller

2.6.2 DC Capacitor bus Voltage regulation using PID Controller

2.6.3 DC Capacitor bus Voltage regulation using Fuzzy Logic

Controller

*Fuzzifier *

*Fuzzy Inference *

*Rule Base *

*Defuzzifier *

2.6.4 DC Capacitor bus Voltage regulation using Adaptive Fuzzy PID

Controller

2.7

Simulation Study

2.7.1 Sinusoidal Voltage condition

2.7.2 Non-Sinusoidal Voltage condition

2.7.3 Un-Balanced Load condition

39

39

44

48

[ii]

34

34

34

35

36

32

33

33

27

28

29

31

19

**21 **

22

22

24

24

25

25

25

25

2.8

Chapter Summary

**3.**

**Generation of Gate signals using Current Controllers **

3.1

Introduction

3.2

Hysteresis band Current Controller

3.3

Adaptive hysteresis band Current Controller

3.4

Weighted Adaptive Hysteresis Band Current Controller

3.4.1 HB based on Source Current THD

3.4.2 HB Based on Switching Frequency

3.4.3 HB based on switching loss

3.5

Simulation Study

3.5.1 Sinusoidal Voltage condition

3.5.2 Non-Sinusoidal Voltage condition

3.5.2 Un-Balanced Load condition

3.6

Chapter Summary

**4.**

**Lyapunov function based Stable Current Controller **

4.1

Introduction

4.2

Lyapunov Stability

4.3

Modelling of three phase Shunt Active Power Filter

4.4

Control strategy using Lyapunov function

4.5

Simulation Study

4.5.1 Sinusoidal Voltage condition

4.5.2 Non-Sinusoidal Voltage condition

4.5.3 Un-Balanced Load condition

4.5.4 Transient Load Condition

4.6

Chapter Summary

**5.**

**Hardware Set-Up **

5.1

An Overview of the Hardware Set-up

5.2

Auto-Transformer.

62

62

64

65

68

**69 **

70

58

59

61

61

51

**52 **

53

54

56

76

78

79

81

82

71

71

74

76

**83 **

84

86

[iii]

5.3

Non-Linear Load

5.4

Voltage Source Inverter

5.5

Filter Inductors

5.6

dSPACE 1104.

5.7

Voltage & Current Sensors

5.7.1 Design of Voltage Sensor Circuit

5.7.2 Design of Current Sensor Circuit

5.8

Signal Conditioning Circuit

5.8.1 Signal Conditioning Circuit for Voltage Sensor

5.8.2 Signal Conditioning Circuit for Current Sensor

5.9

Blanking Circuit

5.10

Opto-Isolation Circuit.

5.11

DC Power Supply

5.12

Power Quality Analyser

5.13

Experimental Study

5.13.1 Sinusoidal Voltage condition

5.14

5.13.2 Non-Sinusoidal Voltage condition

Chapter Summary

**6.**

**Conclusion and Future work **

6.1

Conclusion

6.2

Contribution of the Thesis

6.3

Future work

**Dissemination of the Work **

**References **

92

92

94

94

96

96

90

90

91

91

87

87

88

88

89

97

99

101

**103 **

104

105

105

**108 **

**110 **

[iv]

**BOA **

**COA **

**CSI **

**DC **

**DSP **

**DACs **

**EMI **

**APF **

**ASDs **

**ADC **

**AFPID **

**AHCC **

**FIS **

**FLC **

**IEEE **

**IGBT **

**I/O **

**MAR **

**MATLAB **

**MFs **

**MOM **

**MSO **

**NVE **

**NEB **

**NES **

**PC **

Active Power Filter

Adjustable Speed Drives

Analog-to-Digital Converter

Adaptive Fuzzy PID Controller

Adaptive Hysteresis band Current Controller

Bisector of Area

Centroid of Area

Current Source Inverter

Direct Current

Digital Signal Processor

Digital-to-Analog Converter

Electromagnetic Interference

Fuzzy Inference System

Fuzzy Logic Controller

Institute of Electrical and Electronics Engineers

Insulated Gate Bipolar Transistor

Input/output

Minimum Adaptive THD Reference

Matrix Laboratory

Membership Functions

Mean Value of Maximum

Mixed Signal Oscilloscope

Negative

Negative Big

Negative Small

Personnel Computer

[v]

**PCC **

**PF **

**PI **

**PID **

**PE **

**PLCs **

**PVE **

**PEB **

**PES **

**PWM **

**SAPF **

**SRF **

**STF **

**THD **

**UPQC **

**VSI **

**WAHBCC **

Point of Common Coupling

Power Factor

Proportional Integral

Proportional Integral Derivative

Power Electronics

Programmable Logic Controllers

Positive

Positive Big

Positive Small

Pulse Width Modulation

Shunt Active Power Filter

Synchronous Reference Frame

Self-Tuning Filter

Total Harmonic Distortion

Unified Power Quality Conditioner

Voltage Source Inverter

Weighted Adaptive Hysteresis band Current Controller

[vi]

𝑣

𝑆 𝑖

𝑆

𝐿 𝑠 𝑖

𝐿1

, 𝑖

𝐿2

, 𝑖

𝐿3

𝑉

𝑃𝐶𝐶 𝑖

𝐿 𝑖

𝐿𝑓 𝑖

𝐿ℎ

𝑇 𝑖

𝐿𝑎

(𝑡)

*,*

𝑖

𝐿𝑏

(𝑡)

* & *

𝑖

𝐿𝑐

(𝑡) 𝑖

𝐿𝑑

&

𝑖

𝐿𝑞 𝑖̃

𝐿𝑑

&

𝑖̃

𝐿𝑞 𝑖̅

𝐿𝑑

, 𝑖̅

𝐿𝑞

Source Voltage

Source Current

Source Inductance

Load Currents

Voltage at PCC

Load Current fundamental component of Load Current

Harmonic component of Load Current

Park transformation matrix

Load currents of Phase a, b & c.

Direct and Quadrature axis components of the Load current

Oscillating components of Load current in d and q axis.

Active and Reactive component of Load current in d and q axis.

Loss component of the current

𝐼 𝑑𝑐

𝑈 𝑥𝑦

&

𝑉 𝑥𝑦

𝐻(𝑆)

Instantaneous input and output signals

Transfer Function of Self-Tuning Filter

*K*

𝐼 𝑠𝑎

,

𝐼 𝑠𝑏

& 𝐼 𝑠𝑐

Constant in Self-Tuning Filter

𝑉 𝛼

, 𝑉 𝛽

& 𝑉

0

Source Voltages in α-β co-ordinates 𝑣

𝑆𝑎

(𝑡), 𝑣

𝑆𝑏

(𝑡) & 𝑣

𝑆𝑐

(𝑡)

Source voltages of Phase a, b & c. 𝑣 𝑠𝑎

, 𝑣 𝑠𝑏

& 𝑣 𝑠𝑐

Fundamental components of source voltages of Phase a, b & c. 𝑖

𝐿𝑎

(𝑡), 𝑖

𝐿𝑏

(𝑡), 𝑖

𝐿𝑐

(𝑡) 𝑝

𝐿𝑎

(𝑡)

Source currents of Phase a, b & c. instantaneous power

(𝑝

𝐿𝑎

) for phase ‘a’

∅ 𝑛 𝑝 𝑓𝑎

(𝑡), (𝑝 𝑟𝑎

(𝑡)

& 𝑝 ℎ𝑎

(𝑡)

𝑃

∗

Phase Difference

Active fundamental power Reactive power and Harmonic power

Total average power

Total active component of the load current for phase a, b & c.

𝑉 𝑠𝑎

, 𝑉 𝑠𝑏

&

𝑉 𝑠𝑐

RMS value of fundamental component of source voltage for phase a, b & c.

[vii]

𝐼

𝑆 𝑖 𝑝 𝑡 𝑣 𝑒 𝑑𝑣 𝑒

⁄ 𝑑𝑡 𝑣 𝑑𝑐 𝑣

∗ 𝑑𝑐

𝐾

𝐷

𝐾

𝐼

𝐾

𝑃

𝐶 𝑑𝑐 𝜉 𝜔

𝐴

1

, 𝐴

2

*& *

𝐴

3

𝐾

0

𝑃

, 𝐾

𝐼

0

&

𝐾

0

𝐷

𝐼

0 𝑑𝑐

∆𝐼 𝑑𝑐

∆𝐾

𝑃

, ∆𝐾

𝐼

and

∆𝐾

𝐷

S 𝑎

, S̅ 𝑎

S 𝑏

, S̅ 𝑏

S 𝑐

, S̅ 𝑐

HB

HB

1

, HB

2

& HB

3 𝑖

+

𝑆𝑎

& 𝑖

−

𝑆𝑎 𝑓 𝑐 𝑚

WF

1

, WF

2

& WF

3

𝑉(𝑥) 𝑑 𝑛𝑘 𝑖 𝑑

& 𝑖 𝑞

𝑉 𝑑

& 𝑉 𝑞

Average active component of the load current

Peak value of the reference source current

Time

Voltage Error signal change in voltage error signal

Dc capacitor bus voltage

Reference Dc capacitor bus voltage

Differential gain

Integral gain

Proportional gain

DC capacitance

Damping factor

Fundamental frequency

Membership function

Gain of Conventional PID output of the primary part of AFPID secondary part is given as

∆𝐼 𝑑𝑐

Gains of the secondary part of AFPID

Gate Pulse for Phase a

Gate Pulse for Phase b

Gate Pulse for Phase c

Hysteresis band

Hysteresis band components in WAHBCC

Are the rising and falling source current segments

Switching Freqency slope of reference source current

Weighting factors

Lyapunov Function

Switching state Function

Direct and Quadrature axis component of filter current

Direct and Quadrature axis component of source voltage

[viii]

𝑑 𝑑

& 𝑑 𝑞

∆𝑑 𝑑

& ∆𝑑 𝑞 𝑑 𝑑0

& 𝑑 𝑞0 𝑖 𝑑

∗

& 𝑖 𝑞

∗ 𝑥

1

, 𝑥

2

& 𝑥

3 𝛼 & 𝛽 𝑣 𝑜𝑣

𝑅 𝑜𝑣

𝐶𝑅 𝑣

𝑁

𝑃 𝑖 𝑖𝑐 𝑖 𝑜𝑐

𝐶𝑅 𝑖 𝑣 𝑜𝑐

𝑅 𝑖𝑣 𝑖 𝑖𝑣 𝑣 𝑖𝑣 𝑖 𝑜𝑣

𝑅 𝑜𝑐

𝑇 𝑑𝑡

𝑅 𝑒1

&

𝐶 𝑒1

𝐶

1

& 𝐶

2

Direct and Quadrature axis component of Switching Function

Global switching function in Direct and Quadrature axis

Steady state switching function in Direct and Quadrature axis

Direct and Quadrature axis component of reference filter current state variable

Controller gains

Input resistance of Voltage Sensor

Input current of Voltage Sensor

Input Voltage of Voltage Sensor

Output current of Voltage Sensor

Output Voltage of Voltage Sensor

Output Resistance of Voltage Sensor

Conversion ratio of Voltage sensor

Number of primary turns

Input current of Current Sensor

Output current of Current Sensor

Conversion ratio of Current sensor

Output Voltage of Current Sensor

Output Resistance of Current Sensor

Dead time

External resistance and capacitance in KΩ and pF

Electrolytic Capacitors

[ix]

As of late, the demand for electric power is increasing, which has developed a greater demand to maintain a higher level of power quality and continuity of power supply at the consumer end. But increased use of power electronic devices has imperatively degraded the overall power quality of the power system. Due to the non-linear nature of the power electronic devices various current and voltage harmonics are generated, causing harmonic distortion. These harmonics cause various undesirable effects such as equipment heating, nuisance tripping, overheating transformer, data losses, etc. Shunt Active Power Filters are a viable solution to mitigate these harmonics and thus improve the power quality.

In this thesis work, various control strategies of shunt active power filter based on voltage and current controller has been presented to mitigate the current harmonics. To extract the three phase reference source current we have developed control algorithm based on

Synchronous reference frame theory (id-iq) and Self Tuning Filter. For regulating the DC capacitor bus voltage various voltage controllers such as PI, PID, Fuzzy and Adaptive Fuzzy

PID controllers has been developed. While to generate the gate signal of SAPF multiple current controllers such as Hysteresis band current controller, adaptive hysteresis band current controller, weighted adaptive hysteresis band current controller and Lyapunov function based stable current controller has been developed. To analyze their performance, simulation models of these controllers have been developed using Matlab/Simulink for different operating conditions. A complete hardware setup of the three phase shunt active power filter has been developed using dSPACE 1104 to verify the credibility of the proposed controllers.

[x]

**Figure No. Title **

**Figure 1.1 **

**Figure 1.2 **

**Figure 1.3 **

Transients

**(a)**

**(a)**

Sag;

**(b)**

Swell;

**(a) **

**(b)**

Impulsive;

**(b)**

Under-Voltage

Over-Voltage

**CHAPTER - 1**

Oscillatory

**Figure 1.4 **

**Figure 1.5 **

**Figure 1.6 **

**Figure 1.7 **

**Figure 1.8**

**Figure 1.9**

Voltage fluctuation

**(a)**

Notches;

**(b)**

Noise

Block diagram of power system with nonlinear Loads

Different Solution to PQ Problems

Classification of Active Power Filter.

Inverter Based APF

**(a) **

Current Source Inverter;

** (b) **

Voltage Source

Inverter

**Figure 1.10**

Shunt Active Power Filter

**(a) **

Single Phase Two Wire;

** (b) **

Three Phase

Three Wire;

**(c) **

Three Phase Four Wire.

**Figure 1.11**

Schematic diagram of Series Active Power Filter.

**Figure 1.12 **

Schematic diagram of Unified power quality conditioner

**CHAPTER - 2**

**Figure. 2.1 **

**Figure. 2.2 **

**Figure. 2.3 **

**Figure. 2.4 **

Three Phase Shunt Active Power Filter

Basic compensation principle of the SAPF

Control Algorithm for reference source current generation using STF a-b-c to d-q transformation

Control Algorithm for reference source current generation using STF

**Figure. 2.5 **

**Figure. 2.6 **

**Figure. 2.7 **

**Figure. 2.8 **

**Figure. 2.9**

Block diagram of Self Tuning Filter

Block diagram to estimate the reference source current

DC Capacitor bus Voltage regulation

DC Capacitor bus Voltage regulation using PI controller

**Page **

**No **

4

5

6

12

13

14

9

11

7

7

26

28

28

30

32

32

23

24

26

15

16

[xi]

**Figure. 2.10**

DC Capacitor bus Voltage regulation using PID controller

**Figure. 2.11**

DC Capacitor bus Voltage regulation using Fuzzy Logic Controller

**Figure 2.12**

Membership function of

**(a)**

𝑣 𝑒

,

𝑣 𝑒

⁄ 𝑑𝑡

;

**(b)**

𝐼 𝑑𝑐

**Figure. 2.13**

DC Capacitor bus Voltage regulation using AFPIDC

**Figure. 2.14**

Membership function of

**(a)**

𝑣 𝑒

,

𝑣 𝑒

⁄ 𝑑𝑡

;

**(b)**

∆𝑣 𝑒𝑃

;

**(c)**

∆𝑣 𝑒𝐼

&

**(d)**

∆𝑣 𝑒𝐷

**Figure. 2.15**

Uncompensated Sinusoidal Source Voltage Condition

**(a)**

Source

Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

**Figure. 2.16**

(Sinu. Cond.) After Compensation by SRF method using

**(a)**

PI;

**(b)**

PID

**; **

**(c)**

FLC;

**(d)**

AFPID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

*Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

**Figure. 2.17**

(Sinu. Cond.) After Compensation by STF method using

**(a)**

PI;

**(b)**

PID

**; **

**(c)**

FLC;

**(d)**

AFPID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

*Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

**Figure. 2.18**

Source Current THD comparison for Sinusoidal Voltage Condition

**Figure. 2.19**

Uncompensated Non-Sinusoidal Source Voltage Condition

**(a)**

Source

Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

**Figure. 2.20**

(Non-Sinu.)After Compensation by SRF method using

**(a)**

PI;

**(b)**

PID;

**(c)**

FLC;

**(d)**

AFPID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

*Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

**Figure. 2.21**

(Non-Sinu.)After Compensation by STF method using

**(a)**

PI;

**(b)**

PID;

**(c)**

FLC;

**(d)**

AFPID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

*Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

**Figure. 2.22**

Source Current THD comparison for Non-Sinusoidal Voltage Condition

**Figure. 2.23**

Uncompensated Unbalanced Load Condition

**(a)**

Source Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

**Figure. 2.24**

(Un-Balanced Load current) Source Current after Compensation by SRF method using

**(a)**

PI;

**(b) **

PID;

**(c)**

FLC;

**(d)**

AFPID

**Figure. 2.25**

(Un-Balanced Load current) Source Current after Compensation by STF method using

**(a)**

PI;

**(b) **

PID;

**(c)**

FLC;

**(d)**

AFPID

**Figure. 2.26**

Source Current THD comparison for Un-Balanced Load Condition

**Figure. 2.27**

DC Capacitor Bus Voltage response using PI; PID; FLC and AFPID controllers

**Figure. 2.28**

Source Current in phase with Source Voltage

33

34

35

37

38

39

40

42

43

43

44

46

47

48

48

49

49

50

50

[xii]

**Figure. 3.1 **

**Figure. 3.2 **

**Figure. 3.3 **

**Figure. 3.4 **

**CHAPTER - 3 **

Current Control Techniques

**(a) **

Direct Current Control

**; (b) **

In-Direct

Current Control

Hysteresis Band Current Controller

Switching Pattern using HBCC

Adaptive Hysteresis Band Current Controller

**Figure. 3.5 **

Switching Pattern using AHCC

Block Diagram to calculate Adaptive hysteresis band

**Figure. 3.6 **

**Figure. 3.7 **

Block Diagram of WAHBCC

**Figure. 3.8 **

**Figure. 3.9 **

Block Diagram to compute

HB

1

Membership function of

**(a)**

THD error

,

**(b)**

HB

1

**Figure. 3.10 **

Block Diagram to compute

**(a)**

HB

2

,

**(b)**

HB

3

**Figure. 3.11 **

Membership function of

**(a)**

Switch Loss

**(b)**

HB

3

**Figure. 3.12 **

Uncompensated Sinusoidal Source Voltage Condition

**(a)**

Source

Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

**Figure. 3.13 **

(Sinusoidal Condition) After Compensation using

**(a)**

HBCC;

**(b)**

AHCC;

**(c)**

WAHBCC

**(**

*(i) *

*Load current;*

* (ii)*

* Source current; *

*(iii)*

* Filter *

*Current; *

*(iv)*

* Capacitor Voltage *

*(v)*

**)**

**Figure. 3.14 **

Source current THD Curve after compensation using WAHBCC

**Figure. 3.15 **

Uncompensated Non-Sinusoidal Source Voltage Condition

**(a)**

Source

Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

**Figure. 3.16 **

( Non-Sinusoidal Condition ) After Compensation using

**(a)**

HBCC;

**(b)**

AHCC;

**(c)**

WAHBCC

**(**

*(i) *

*Source current; *

*(ii) *

*FFT analysis*

**)**

**Figure. 3.17 **

Uncompensated Unbalanced Load Condition

**(a)**

Source Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

**Figure. 3.18 **

(Unbalanced Condition) After Compensation using

**(a)**

HBCC;

AHCC;

**(c)**

WAHBCC

**(**

*(i) *

*Source current; *

*(ii) *

*FFT analysis*

**)**

**(b)**

**Figure. 3.19 **

THD of source current using HBCC; AHCC & WAHBCC

**Figure. 3.20 **

Switching pulse

**(a)**

HBCC;

**(b)**

AHCC;

**(c)**

WAHBCC

**Figure. 4.1 **

**CHAPTER - 4**

Three Phase Shunt Active Power Filter

53

63

64

64

65

66

66

67

67

72

56

58

59

60

54

55

56

60

61

61

63

[xiii]

**Figure. 4.2 **

**Figure. 4.3 **

**Figure. 4.4 **

**Figure. 4.5 **

**Figure. 4.6 **

**Figure. 4.7 **

**Figure. 4.8 **

Block diagram of the proposed Lyapunav function Based Stable Current controller

Uncompensated Sinu. Source Voltage Cond.

**(a)**

Source Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

(Sinu. Condition) After Compensation using

**(a)**

WAHBCC;

**(b)**

Lyapunov (

*(i) *

*Load current;*

* (ii)*

* Source current; *

*(iii)*

* Filter Current; *

*(iv)*

*Capacitor Voltage *

*(v)*

* FFT analysis*

**)**

Uncompensated Non-Sinusoidal Source Voltage Condition

**(a)**

Source

Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

(Non-Sinu. Cond.) After Compensation using

**(a)**

WAHBCC;

**(b)**

Lyapunov

** (**

*(i) *

*Load current;*

* (ii)*

* Source current; *

*(iii)*

* Filter Current; *

*(iv)*

*Capacitor Voltage *

*(v)*

* FFT analysis*

**)**

Uncompensated Unbalanced Load Condition

**(a)**

Source Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

(Un-balanced Load) After Compensation using

**(a)**

WAHBCC;

Lyapunov

**(**

*(i) *

*Source current;*

* (ii)*

* Filter Current; *

*(iii)*

* FFT analysis*

**)**

**(b)**

**Figure. 4.9 **

(Transient Load) After Compensation using Lyapunov function

**((a) **

*Load current;*

** (b)**

*Source current;*

** (c)**

* Filter Current;*

**(d)**

*Capacitor *

*Voltage*

**)**

**Figure 4.10 **

THD of source current after compensation using WAHBCC &

Lyapunov function based stable current controller

**CHAPTER - 5 **

Block Diagram of the Hardware Set-Up

**Figure. 5.1 **

**Figure. 5.2 **

**Figure. 5.3 **

**Figure. 5.4 **

A Picture of the developed Hardware Set-Up

Picture of the three Phase Auto-Transformer

Picture of the Non-Linear Load

**(a) **

Rectifier;

** (b) **

Resistor;

**(c) **

Inductor

Picture of the three Phase IGBT based Voltage Source Inverter

**Figure. 5.5 **

**Figure. 5.6 **

Picture of the Filter Inductor

**Figure. 5.7 **

Picture of the dSPACE 1104 interfacing Board

Schematic Diagram of

** (a) **

Voltage Sensor;

** (b) **

Current Sensor

**Figure. 5.8 **

**Figure, 5.9 **

Signal Conditioning Circuit for

**(a) **

Voltage Sensor;

**(b) **

Current Sensor

**Figure. 5.10 **

Voltage signals obtained from Signal Conditioning Circuit

75

77

77

78

79

80

80

81

81

84

85

86

87

87

88

88

89

91

91

[xiv]

**Figure. 5.11 (a) **

Banking Circuit

** (b) **

Mono-stable Multi-vibrator circuit connection diagram

** (c) **

Timing Diagram (d) Switching pulse responses

**Figure. 5.12 **

Schematic Diagram of Opto-Coupler Circuit

**Figure. 5.13 **

DC Power Supply

** (a)**

±15 V DC supply circuit diagram;

**(b) **

Picture of the DC supply;

**(c)**

5-0-5 DC supply;

**(d) **

15-0-15 DC supply

**Figure. 5.14 **

Uncompensated Sinusoidal Source Voltage Condition

**(a)**

Source

Voltage & Source Current;

**(b)**

FFT analysis of Source Current

**Figure. 5.15 **

(Sinu. Source Vol. Cond.) Compensation using WAHBCC

**Figure. 5.16 **

(Sinu. Source Vol. Cond.) Compensation using Lyapunov function

**Figure. 5.17 **

(Sinu. Source Vol. Cond.) THD using

**(a) **

WAHBCC;

**(b) **

Lyapunov function

**Figure. 5.18 **

Uncompensated Non-Sinusoidal Source Voltage Condition

**(a)**

Source

Voltage

**(b)**

FFT analysis of Source Current

93

94

95

97

99

**Figure. 5.19 **

(Non-Sinu. Source Voltage Cond.) Compensation using WAHBCC

**Figure. 5.20 **

(Non-Sinu. Source Voltage Cond.) Compensation using Lyapunov function

100

100

**Figure. 5.21 **

(Non-Sin. Source Voltage Cond.) THD using

Lyapunov function

**(a) **

WAHBCC;

**(b) **

101

97

98

98

[xv]

**Table **

**No. **

**Title **

**Table 1.1 **

THD Level according IEEE 519 standard

**Table 2.1 **

Effect of increasing PID Controller gains independently

**. **

**Table 2.2 **

Range of the Parameters Chosen for FLC

**Table 2.3**

Fuzzy Rule Base for

𝐼 𝑑𝑐

**Table 2.4**

Range of the Parameters Chosen for AFPID

**Table 2.5**

Fuzzy Rule Base for

∆𝑣 𝑒𝑃

**Table 2.6**

Fuzzy Rule Base for

∆𝑣 𝑒𝐼

**Table 2.7**

Fuzzy Rule Base for

∆𝑣 𝑒𝐷

**Table 2.8**

System Parameters for Simulation Study

**Table.3.1 **

Fuzzy If-Then Rules for THD error

**Table 3.2 **

Fuzzy If-Then Rules for Switching Loss

**Table 3.3 **

System Parameters for Simulation Study

**Table 4.1 **

System Parameters for Simulation Study

**Table 5.1 **

DC supply necessary for various Circuits

**Table 5.2 **

System Parameters for Experimental Study

**Page No. **

39

60

62

62

76

95

96

37

38

38

38

10

33

35

36

[xvi]

**1.1**

**Overview of Power Quality **

The advancement in power electronics, which implies widespread use of power electronic devices not only in the industrial and commercial sectors, but also in the domestic environment due to their suitability to perform various functions such as storage, management, processing, control, exchange of digital data and so forth. But these power based devices are highly sensitive to short power interruptions, voltage surges and sags, harmonics, and other waveform distortions. In [1], it has been reported that more than 30% of the present power is consumed by sensitive equipments (such as microprocessors, computers, etc.), and the percentage is still increasing. It is therefore necessary to maintain a higher level of power quality and continuity of power supply at the consumer end.

Electric power is difficult to be quantify. There is no single accepted definition of Power

Quality (PQ), but the ultimate measure of power quality is determined by the performance and productivity of end-user equipment. Most of the important international standards define power quality as the physical characteristics of the electrical supply provided under normal operating conditions that do not disrupt or disturb the customer’s processes.

The international standards setting organization in electrical engineering (the IEC) used the term "electromagnetic compatibility” to define PQ. The following definition is given in

IEC 610001-1:

*“Electromagnetic compatibility is ability of the equipment or a system to function satisfactorily in its electromagnetic environment without introducing intolerable electromagnetic disturbances to anything in that environment”.*

In 1995 IEC standard [2], defined power quality as “

*set of parameters defining the properties of power quality as delivered to the user in normal operating conditions in terms of continuity of supply and characteristics of voltage (frequency, magnitude, waveform, symmetry)*

”. In 1997, the definition of power quality given in the IEEE dictionary [3] originated in the IEEE Std.

1100 is “

*Power quality is the concept of powering and grounding sensitive equipment in a manner that is suitable to the operation of that equipment and compatible with the premise *

Page | 2

*wiring system and other connected equipment*

”

*.*

From the above definitions mentioned, it can be concluded that electric power can be quantified on the basis of: “voltage quality”,

“current quality” and “continuity of supply”.

Voltage quality is the quality of the product delivered by the utility to the customers.

The power supply system can only control the quality of the voltage, it has no control over the currents that particular loads might draw. Therefore, the standards in the power quality area are devoted to maintaining the supply voltage within certain limits. Any significant deviation in the waveform magnitude, frequency or purity is a potential power quality problem.

Current quality is a complementary term to the voltage quality. It is concerned with deviations of the current waveform from the ideal sinusoidal waveform. In addition to the ideal current waveform (as demanded by the utility), the current sinusoidal wave should be in phase with supplied voltage to minimize the transmitted apparent power and consequently the power system ratings. Because voltage and current are closely related, a deviation of any of them from the ideal may (with a high probability) cause the other to deviate from the ideal case [4].

Continuity of supply is concerned with the probability of satisfactory operation of a power system over the long term. It denotes the ability to supply adequate electrical service on a nearly continuous basis, with few interruptions over an extended period of time [5]. If the electric power is inadequate of these needs, then the “quality” is lacking.

**1.2**

**Power Quality Problems **

Power systems are designed to operate at frequencies of 50 or 60Hz with a specific voltage and current level. Any change from the predefined voltage and current condition which causes the equipment failure can be considered as a Power Quality problem (PQP), which more precisely can be defined as “

*any power problem manifested in voltage, current, or frequency deviations which results in damage, upset, failure or malfunctioning of customer equipment*

”

In power system, loads can be divided into two categories i.e. linear and non-linear loads. A linear load does not change the shape of the waveform of the current, but may change the relative timing (phase) between voltage and current. For an inductive circuit voltage lead current while in a capacitive circuit current leads voltage. Hence the two

Page | 3

waveforms will be out of phase from one another on both the cases. However, there will be no waveform distortion. Some of the examples of linear loads are Incandescent lighting,

Electric heaters, Insulated cables, under grounded cables etc.

While, Non-linear loads distorts current waveform by injecting harmonics. Power electronic based appliances can be considered as non-linear loads such as TVs, PCs etc.

(domestic appliances); copiers, printers etc. (commercial appliances); programmable logic controllers (PLCs), adjustable speed drives (ASDs), rectifiers, inverters, CNC tools etc.

(industrial equipment) [5-7].

Almost all PQ problems are closely related with power electronics based devices (Nonlinear loads). With the widespread use of Power electronic equipment in the industrial, commercial and domestic sectors PQP are increasing. Various PQP are discussed below

[8, 26]:

**1.2.1**

**Transients **

Potentially transients in power system fall into two subcategories that are Impulsive transient and Oscillatory transients which are shown in Figure. 1.1.

**Figure. 1.1 **

Transients

**(a) **

Impulsive;

**(b)**

Oscillatory

**Impulsive transients**

are sudden high peak events that raise the voltage and/or current levels in either positive or negative direction. Impulsive transients can be very fast events

(5 nanoseconds [ns] rise time from steady state to the peak of the impulse) of short-term duration (less than 50 ns).

*Causes*

Impulsive transients are caused due to Lightning, poor grounding, the switching of inductive loads, utility fault clearing, and Electrostatic Discharge (ESD).

*Effects*

Loss or corruption of data and physical damage of equipment are effects of Impulsive transients.

Page | 4

An

**oscillatory transient**

is a sudden change in the steady-state condition of voltage, current, or both, at both the positive and negative signal limits, oscillating at the natural system frequency. In simple terms, the transient causes the power signal to alternately swell and then shrink, very rapidly. Oscillatory transients usually decay to zero within a cycle (a decaying oscillation).

*Causes*

Oscillatory transient are mainly caused due to turn off an inductive or capacitive load, such as a motor or capacitor bank. A long electrical distribution system can act like an oscillator when power is switched on or off, because all circuits have some inherent inductance and distributed capacitance that briefly energizes in a decaying form.

*Effects*

Loss (or corruption) of data, physical damage of equipment, reduction in efficiency and lifetime of equipment are effects of Impulsive transients.

**1.2.2**

**Sag/Under-Voltage **

A

**sag**

is a reduction of AC voltage at a given frequency for the duration more than 0.5 cycles to less than 1 minute as shown in Figure. 1.2 (a).

*Causes*

Sags are usually caused due to system faults, switching large loads (such as one might see when they first start up a large air conditioning unit) and remote fault clearing performed by utility equipment.

(a)

**(a)**

(a)

(b) (b)

** (b) **

**Figure. 1.2 (a)**

Sag;

**(b)**

Under-Voltage

*Effects*

Failure of contactors and switchgear, Malfunction of Adjustable Speed Drives (ASD’s), errors in industrial processing are the effects of sag.

** Under voltages**

is a decrease in the ac voltage to less than 90% at the power frequency for more than 1 min [Figure. 1.2 (b)]. The term “brownout” has been commonly used to describe this problem, and has been superseded by the term under-voltage.

Page | 5

*Causes*

Caused by system faults, switching on loads with heavy startup currents.

*Effects*

Overheating in motors, failure of non-linear loads such as computer power supplies.

More importantly, if an under-voltage remains constant, it may be a sign of a serious equipment fault, configuration problem, or that the utility supply needs to be addressed.

**1.2.3**

**Swell/Over-voltage **

A

**swell**

is the reverse form of a sag, having an increase in AC voltage for a duration more than half cycles and less than 1 minute as shown in Figure. 1.3 (a).

*Causes*

Swells, high-impedance neutral connections, sudden (especially large) load reductions, and a single-phase fault on a three-phase system.

*Effects*

Data errors, flickering of lights, degradation of electrical contacts, semiconductor damage in electronics devices, and insulation degradation.

**(a)**

**Figure. 1.3 (a)**

Swell;

**(b)**

Over-Voltage

**Over-voltages**

is increase in the ac voltage to more than 110% at the power frequency for more than 1 min as shown in Figure. 1.3 (a).

*Causes*

Supply transformer tap settings are set incorrectly and loads have been reduced. This is common in seasonal regions where communities reduce in power usage during off-season and the output set for the high usage part of the season is still being supplied even though the power need is much smaller.

*Effects*

Create high current draw and cause the unnecessary tripping of downstream circuit breakers, as well as overheating and putting stress on equipment.

Page | 6

**1.2.4**

**Voltage Fluctuation **

A voltage fluctuation as shown in Figure. 1.4 is a systematic variation of the voltage waveform or a series of random voltage changes, of small dimensions, namely 95 to 105% of nominal at a low frequency, generally below 25 Hz.

*Causes*

Any load exhibiting significant current variations can cause voltage fluctuations. Arc furnaces are the most common cause of voltage fluctuation on the transmission and distribution system.

*Effects*

**Figure. 1.4 **

Voltage fluctuation

Most common symptom of voltage fluctuation is flickering of incandescent lamps, data losses, system halt etc.

**1.2.5**

**Notches **

Notching is a periodic voltage disturbance which occur over each ½ cycle, which can be considered a waveform distortion problem [Figure. 1.5 (a)].

*Causes*

Electronic devices, such as variable speed drives, light dimmers and arc welders under normal operation.

*Effects*

Consequences of notching are system halts, data loss, system halt and data transmission problems.

(a)

**(a) (b)**

**Figure. 1.5 (a)**

Notches;

**(b)**

Noise

Page | 7

**1.2.6**

**Noise **

Noise is unwanted voltage or current superimposed on the power system voltage or current waveform [Figure. 1.5 (a)].

*Causes*

Noise can be generated by power electronic devices, control circuits, arc welders, switching power supplies, radio transmitters and so on. Poorly grounded sites make the system more susceptible to noise.

*Effects*

Noise can cause technical equipment problems such as data errors, equipment malfunction, long-term component failure, hard disk failure, and distorted video displays.

**1.2.7**

**Harmonic distortion **

**Harmonics**

are periodic steady-state phenomena that produce continuous distortion of voltage and current waveforms. These periodic non sinusoidal waveforms are described in terms of their harmonics order, whose magnitudes and phase angles are computed using

Fourier analysis.

On the basis of multiplication factor, Harmonics can be divided into

**Characteristic harmonics**

&

**Non-Characteristic harmonics**

. Characteristic harmonics or integer harmonics whose harmonic order is equal to an integer multiple of the fundamental frequency. Non-characteristic harmonics or non-integer harmonics whose harmonic order is equal to a non-integer multiple of the fundamental frequency. Two types of non-integer harmonics are identified:

**Sub-harmonics**

- the fundamental frequency multipliers are less than I, and therefore, the harmonic frequencies are lower than the fundamental frequency

[6].

**Inter-harmonics**

- the fundamental frequency multipliers are larger than 1, and therefore, the harmonic frequencies are higher than the fundamental frequency. The frequencies of inter-harmonics are between the frequencies of characteristic harmonics.

*Causes of harmonic distortion *

The Harmonics [5-7] are produced by rectifiers, ASDs, soft starters, electronic ballast for discharge lamps, switched-mode power supplies, and HVAC using ASDs or precisely by the presence of non-linear load. Equipment affected by harmonics includes

Page | 8

transformers, motors, cables, interrupters, and capacitors (resonance). Figure. 1.6 shows a systematic diagram of power system in which source voltage 𝑣 𝑠

is connected with the load through a transmission line whose source impedance is . Multiple loads are connected across point of common coupling (PCC). Suppose Load

𝐿

1

is a nonlinear Load, then load current 𝑖

𝐿1

is distorted. As the source current 𝑖

𝑆 is the summation of all the load current, the source also gets distorted due the non-linear

𝐿

1

. The source current 𝑖

𝑆 then interacts with source impedance to make the PCC voltage distorted which is explained by eq. (1.2).

As the PCC voltage

𝑉

𝑃𝐶𝐶

gets distorted it further distorts other loads. So it is clear that current harmonic induces voltage harmonics at it is important to mitigate current harmonics. In this thesis work we mainly concentrate on current harmonic mitigation. 𝑖

𝑆

= 𝑖

𝐿1

+ 𝑖

𝐿2

+ 𝑖

𝐿3

(1.1)

𝑉

𝑃𝐶𝐶

= 𝑣

𝑆

− 𝐿 𝑠 𝑑𝑖

𝑆

(1.2) 𝑑𝑡

*i*

L

1

*i*

*L*

*S i*

2

L

2

*v s*

PCC

*i*

3

L

3

**Figure. 1.6 **

Block diagram of power system with nonlinear Loads

*Effects of harmonic distortion *

Due to harmonic distortion following problems may occur [9-10]:

Increased heating losses, saturation, resonances, windings vibration and life span reduction of transformers.

Heating, pulsed torque, audible noise and life span reduction of rotating electrical machines;

Undue firing of power semiconductors in controlled rectifiers and voltage regulators;

Operation problems on protection relays, circuit breakers and fuses;

Increased losses on the electrical conductors;

Page | 9

Considerable increase of the capacitor’s thermal dissipation, leading to dielectric deterioration;

Life span reduction of lamps and luminous intensity fluctuation (flicker – when sub-harmonics occur);

Errors on the energy meters and other measurement devices;

Electromagnetic interference in communication equipments;

Malfunction or operation flaws in electronic equipment connected to the electrical grid, such as computers, programmable logic controllers (PLCs), control systems commanded by microcontrollers, etc. (these devices often control fabrication processes).

**1.3**

**Total Harmonic Distortion (THD) & IEEE Standard **

There are various harmonic indices to measure the level of harmonic distortion. The most commonly used harmonic indices is total harmonic distortion. The total harmonic distortion or THD is a measure of effective value of the harmonic components in a distorted waveform. It can be defined as potential heating value of the harmonics relative to the fundamental. In [11] it is defined as

𝑇𝐻𝐷 = √

𝑆𝑢𝑚 𝑜𝑓 𝑎𝑙𝑙 𝑠𝑞𝑢𝑎𝑟𝑒𝑠 𝑜𝑓 𝑎𝑚𝑝𝑙𝑖𝑡𝑢𝑑𝑒 𝑜𝑓 𝑎𝑙𝑙 ℎ𝑎𝑟𝑚𝑜𝑛𝑖𝑐 𝑣𝑜𝑙𝑡𝑎𝑔𝑒𝑠 𝑠𝑞𝑢𝑎𝑟𝑒 𝑜𝑓 𝑡ℎ𝑒 𝑎𝑚𝑝𝑙𝑖𝑡𝑢𝑑𝑒 𝑜𝑓 𝑡ℎ𝑒 𝑓𝑢𝑛𝑑𝑎𝑚𝑒𝑛𝑡𝑎𝑙 𝑣𝑜𝑙𝑡𝑎𝑔𝑒

× 100

𝑇𝐻𝐷 =

√∑ ℎ 𝑚𝑎𝑥 ℎ=2

𝑀 ℎ

2

𝑀

1

Where

*M h*

is the rms value of harmonic component

*h*

of the quantity

*M*

.

**Table1. 1 **

THD Level according IEEE 519 standard

**Current Magnitude THD Level **

0-20A

20-50A

50-100A

100-1000A

>1000A

5%

8%

12%

15%

20%

Page | 10

To maintain the harmonic distortion within acceptable level various standard have been form defines the harmonic distortion level on the basis of THD. One of the most stands are the IEEE 519 standard. According to this standard, current THD should be less that 5% to be acceptable. The THD level depends upon magnitude of current. Table shows the complete list of THD standard according to current level.

**1.4**

**Solution to Power Quality Problems **

There are basically two approaches to mitigate the power quality problem [13] as shown in Figure. 1.7. First approach is known as load conditioning, which ensures that the equipment is made less sensitive to power disturbances, allowing the operation even under significant voltage distortion. The other approach is to install line-conditioning systems that suppress or counteract the power system disturbances. Passive filters have been most commonly used to limit the flow of harmonic currents in distribution systems. They use reactive storage components, namely capacitors and inductors. Among the more commonly used passive filters are the shunt-tuned LC filters and the shunt low-pass

**Figure. 1.7 **

Different Solution to PQ Problems

LC filters. They have some advantages such as simplicity, reliability, efficiency, and cost.

Among the main, disadvantages are the resonances introduced into the ac supply; the filter effective-ness, which is a function of the overall system configuration; and the tuning and

Page | 11

possible detuning issues [14]. To overcome these drawbacks active power filters have proved to be an important and flexible alternative to compensate for current and voltage disturbances in power distribution systems.

**1.5**

** Active Power Filter **

The idea of active filters is relatively old, but their practical development was made possible with the new improvements in power electronics and microcomputer control strategies as well as with cost reduction in electronic components. The active filter introduces current or voltage components, which cancel the harmonic components of the nonlinear loads or supply lines, respectively. Figure. 1.8 shows the classification of active power filter on the basis of Converter type, topology and types of load [15].

Figure. 1.9 shows current source inverter (CSI) and voltage source invertrer (VSI). CSI behaves as a non-sinusoidal current source to meet the harmonic current requirement of

APF

Converter based

Topology based

Supply based

Voltage

Fed

Current

Fed

Series

APF

Series

APF

Single

Phase

Unified Power

Quality Conditioner

Three

Phase

Three

Wire

Four

Wire

**Figure. 1.8**

Classification of Active Power Filter. the non-linear load. A diode is used in series with the self-commutating device (IGBT) for reverse voltage blocking. However, GTO-based configurations do not need the series diode, but they have restricted frequency of switching. They are considered sufficiently reliable [16], but have higher losses and require higher values of parallel ac power

Page | 12

capacitors. While, VSI has a self-supporting dc voltage bus with a large dc capacitor which act an energy storage device. The voltage source inverters are more dominant over

Single Phase

Voltage

Source

*i*

*S*

*L*

*S i*

*F i*

*L*

Non-Linear Load

Single Phase

Voltage

Source

*i*

*S*

*L*

*S i*

*F i*

*L*

Non-Linear Load

**(a) **

**(b) **

**Figure. 1.9**

Inverter Based APF

**(a) **

Current Source Inverter;

** (b) **

Voltage Source Inverter current source inverter because it is lighter, Cheaper and expandable to multilevel and multistep version [17]. Depending on the particular application or problem to be solved, active power filters can be implemented as shunt type, series type, or a combination of shunt and series active filters (Unified Power Quality Conditioner).

**1.5.1**

**Shunt Active Power Filter **

Shunt Active Power Filters (SAPF) are usually connected across at the load side to compensate all current related problem like current harmonics, power factor improvement, reactive power compensation, load unbalance compensation and dc link voltage regulation. It act as a current source and inject compensating current at PCC to make the source current sinusoidal and in phase with the source voltage. different configuration shunt active power filters are shown in Figure. 1.10 for various types of loads.Two wire SAPF [Figure. 1.10 (a)] are used for low power ratings such as in commercial or educational buildings with computer loads [18, 19]. Three phase three wire

SAPF [Figure. 1.10 (b)] are used for balanced loads and where there is no requirement to balance currents or voltages in each phase and the aim is simply to eliminate as many current harmonics as possible [20]. For three unbalanced load currents or unsymmetrical supply voltages, three –phase four wire SAPF [Figure. 1.10 (c)] is a viable alternative [21].

Page | 13

Single Phase

Voltage

Source

*i*

*S*

*L*

*S i*

*L*

Non-Linear Load

*i*

*F*

C dc

**(a) **

Three Phase

Voltage

Source

*i*

*S*

*L*

*S i*

*L*

Three Phase

Voltage

Source

*i*

*S*

*L*

*S i*

*L*

Non-Linear Load

*i*

*F*

Non-Linear Load

C dc1

*i*

*F*

C dc

C dc2

**(b) (c) **

**Figure. 1.10**

Shunt Active Power Filter

**(a) **

Single Phase Two Wire;

** (b) **

Three Phase

Three Wire;

**(c) **

Three Phase Four Wire.

**1.5.2**

**Series Active Power Filter **

Series active power filters were introduced at the end of 1980. It is usually connected in series with a line through a series transformer. It acts as a controlled voltage source and can compensate all voltage related problem like voltage harmonics, voltage sag, voltage swell, etc. Figure. 1.11 shows the voltage source converter based series active power filter which are connected at the source side. In Figure. 1.11

𝑖 𝑠

, 𝑖

𝐿

and

𝑉

𝐴𝐹

represent source current, load current and injected voltage by the series transformer respectively. Series connected active power filter protect the voltage sensitive devices like super conductive magnetic-energy storage device, semiconductor devices and power system devices from an inadequate supply voltage quality [22]. In many cases series active power filters are used with passive LC filter [23], where the series active power filter work as a harmonic

Page | 14

isolator, forcing the load current harmonics to circulate mainly through the passive filter rather than power distribution system. Advantage of this connection is that the rated power of the series active filter is a small fraction of the load KVA rating. However in case of the voltage compensation the apparent power rating of the series active power filter may increase [24].

Voltage

Source

*i*

*S*

V

*F i*

*L*

Non-Linear Load

**Figure. 1.11**

Schematic diagram of Series active power filter.

**1.5.3**

**Unified Power Quality Conditioner **

Figure. 1.12 shows the system configuration of a unified power quality conditioner

(UPQC). It consist of two converters (6-semi-conductor device per converter) connected back to back with same DC-link capacitor. One inverter connected across the load and acts as shunt APF. This converter is controlled as a variable current source such that the load current related power quality problems do not appear across the source terminals.

Furthermore, the shunt inverter plays an important role in maintaining a constant and selfsupporting DC-bus voltage across two inverters. Second converter is connected in series with the line through a series transformer and functions as a series APF. This converter is controlled as a variable Voltage source and it isolates the load bus voltage from disturbances in the voltage at the point of common coupling (PCC) [25].

In 3-phase system, the adequate control of shunt and series VSI can support the load reactive power demand and compensate the load current harmonics, voltage harmonics, voltage sag/swell and voltage flicker [6]. The main drawback of UPQC are its large size and control complexity because of the large number of semiconductor devices involved

[15].

Page | 15

Voltage

Source

*i*

*S*

V

*F i*

*F i*

*L*

Non-Linear Load

**Figure. 1.12**

Schematic diagram of Unified Power Quality Conditioner

**1.6**

**Literature review of APFs and its control strategies **

Previously, the primary concerns related to electric equipment was power factor correction, for which capacitor banks or in some cases reactors were used. But with the advancement in power Electronics technology, power electronics based loads (non-linear loads) that consume non-sinusoidal current have increased significantly. Although these power electronics based equipments have quick response in controlling the voltages and/or currents, they draw reactive power as well as inject harmonic current into the power system thus causing various power quality problems [8, 26].

Conventionally, passive LC filters were used to reduce the propagation of harmonic current, hence minimizing the adverse effects of harmonics in electrical power system. But demerits like its bulky size, parallel and series resonance with source voltage harmonics, filtering characteristics [14] strongly affected by source impedance and fixed compensation characteristic motivated the power electronics and power system engineers to develop a dynamic and adjustable solution for the power quality problems, known as

Active Power Filters (APFs) which was first proposed by Gyugyi et al [27], in year 1976.

APFs along with harmonic compensation, they also can provide reactive power compensation, voltage regulation, power factor correction, suppress flicker, and loadbalancing. There are various configuration of APF, which are developed for mitigating a specific problem. Bhim Singh et al [15] has presented a complete classification of APFs on the basis of converter type (current source inverter or voltage source inverter), topology

Page | 16

based (shunt, series, or a combination of both), and the number of phases (single phase, three phase three wire, three phase four wire).

To mitigate the harmonics, an effective control strategy needs to be designed for the

APF.

Various control technique have been proposed in literature for APF. Instantaneous reactive power theory is one of the earliest popular technique developed for designing the

APF [28]. In p-q theory both current and voltage signal were used to generate the reference source current. It considers three-phase systems together and not as a superposition or sum of three single phase circuits, using the “αβ0-transformation,” also known as Clarke transformation [29], which is a real matrix that transforms three phase voltages and currents into αβ0-stationary reference frame.

In 1991, Bhattacharya proposed a new control theory, Synchronous Reference Frame

(SRF) theory which is otherwise called as I d

- I q

control strategy [30]. In SRF control strategy, only the currents signal are used which are transformed into direct I d

and quadratic I q

components to generate the reference source current [31, 32].

Improved controllers such as fuzzy logic controllers (FLCs) [33-35] has become popular for their applications in APFs. This is because of the fact that FLCs are modelled free controllers so that in absence of an accurate model of the system one can design a controller without any difficulty unlike in conventional controllers such as PI & PID controllers [36-38]. Various hybrid controllers which are combination of conventional controllers and fuzzy logic controllers also has been reported [39].

To generate the gate signal for the voltage source inverter various current control techniques has been reported in literature. In 1998, B.N Singh et al [40] distinguished current control techniques as direct and indirect current control. With more number of inputs and step, the computation time is more in case of direct current control and hence the response is slow. While in indirect current control technique the reference source current is directly compared with actual source current to generate the gate signal. With less no of inputs and steps, computation time is less and hence the overall system response is instantaneous, without any delay. In this technique negligible switching ripples are produced and hence it actively is able to eliminate the harmonics.

Conventionally hysteresis band current control (HBCC) method was used for its simplicity, fast transient response, simple implementation & higher accuracy in current tracking [41]. In 1990, Bimal K Bose, proposed an adaptive hysteresis-band current

Page | 17

control technique for a voltage-fed PWM inverter for the machine drive system [42]. It maintains the modulation frequency constant by adaptively changing the hysteresis band according to system parameters such as reference source current, source voltage, switching frequency & dc capacitor voltage.

Various controllers has been designed to maintain stability such as the pole-placement control method in [43] and state feedback-based transient control method proposed in [44] but these have disadvantages related to control circuit complexity, switching frequencies, and transient responses.

*Hasan*

in 1998 proposed a new control law based on Lyapunov’s stability theory where it is shown that the converter can be stabilized globally for handling large-signal disturbances [45]. Then in 2006 he used the same Lyapunov based controller for single phase shunt active power filters thus ensuring the stability APF under load variation [46].

Taking into account these control techniques discussed we have formulated some of the objectives to improve the performance of Shunt active power filter.

**1.7**

**Research Objectives **

To develop control strategies based on (Synchronous Reference Frame) SRF and (Self Tuning Filter) STF for three phase Shunt active power filter, to extract the three-phase reference source currents under sinusoidal source voltage, non- sinusoidal source voltage & un-balanced load conditions.

To develop various voltage controllers such as PI, PID, Fuzzy Logic Controller

(FLC) & the proposed Adaptive Fuzzy PID Controller (AFPID), for maintaining the DC capacitor bus voltage constant and compare their performance under various operating conditions in MATLAB/SIMULINK environment.

To develop various current controllers such as hysteresis band current control

(HBCC), adaptive hysteresis band current control (AHCC) & the proposed weighted adaptive hysteresis band current control (WAHCC), for generating the gate signal for the SAPF, while maintaining the switching frequency constant and hence reducing the losses.

To develop a Lyapunov function based stable current controller to generate the switching pulses for the SAPF while maintaining stability.

Page | 18

To develop a complete experimental setup for three phase Shunt active power filter using dSPACE 1104, so as to verify the effectiveness of the proposed controllers.

**1.8**

**Thesis Outline **

From the

*introduction, *

it can be considered that with increase in electric power demand it is required to maintain higher level of power quality. But due to nonlinear loads power quality is degrading causing harmonic distortion. Various mitigation approaches to mitigate harmonic distortion has been discussed among which APF is a viable alternative.

Detail of active power filter configurations and literature review on APF controllers has been discussed.

In

*chapter – 2*

, the reference source current extraction for three phase Shunt active filter using Synchronous Reference Frame (SRF) & Self-Tuning Filter (STF) based control strategies has been presented. While to regulate the DC capacitor bus voltage of the voltage source inverter (VSI), voltage controllers such as PI, PID, Fuzzy Logic Controller

(FLC) & the proposed Adaptive Fuzzy PID Controller (AFPID) has been developed. The detailed simulation results using

*MATLAB/Simulink*

software are presented to support the feasibility of proposed control strategies under varying operating condition.

In

*Chapter – 3,*

various current controllers such as hysteresis band current control

(HBCC), adaptive hysteresis band current control (AHCC) & the proposed weighted adaptive hysteresis band current control (WAHCC) has been developed to generate the required gate pulse for SAPF, so that it provides proper filtering action. The detailed simulation results using

*MATLAB/Simulink*

software are presented to support the feasibility of proposed control strategies under varying operating condition.

In

*Chapter – 4*

, a stable current controller based on Lyapunov’s stability theorem is proposed to generate the gate signal, thus guaranteeing the stability of the closed-currentloop. The detailed simulation results using

*MATLAB/Simulink*

software are presented to support the feasibility of proposed control strategies under varying operating condition.

* In Chapter-5,*

a complete hardware setup for three phase Shunt active power filter using dSPACE 1104 is develop, so as to verify the effectiveness of the proposed controllers. For generating the required control signal we have used dSPACE 1104, which interfaces the hardware part with the host computer. The proposed controllers, WAHBCC & Lyapunov

Page | 19

function based current controller has been tested experimentally in sinusoidal and nonsinusoidal voltage condition.

Finally in

*Chapter –6, *

the overall summary of the thesis work has been presented.

Based on these finding, some future prospective, to further enhance the performance of active filters to improve electric power quality has been discussed.

Page | 20

**2.1.**

**Introduction **

With the growth in the use of power electronic devices, Power quality (PQ) related issues are becoming more and more serious with each passing day. Among the different viable alternatives to improve electric power quality, active power filters (APF) has gained much more attention due to its excellent harmonic and reactive power compensation, and has become an important and flexible alternative for mitigating current and voltage disturbances in power distribution systems [15].

Although the concept of Active power filters is relatively old, almost 4 decades, but with new improvements in power electronics and microcomputer control strategies as well as with reduction in cost of electronic components, has made its industrial applications possible with varying configurations and control strategies. However, this technology is still developing, and many new contributions based on different topologies and new control strategy have been reported in the last few years [47,48].

In this chapter we concentrate on mitigating current harmonics using Shunt Active Power

Filter (SAPF). Control strategy for extracting the three phase reference source currents using various voltage controllers for three shunt active filter has been presented. The detailed simulation results using MATLAB/SIMULINK are presented to evaluate their performance under different source and load condition, hence verifying the effectiveness of the proposed controllers.

**2.2.**

**Basic compensation principle of Shunt Active Power Filter **

The concept of shunt active power filtering was first introduced by Gyugyi and Strycula in 1976 [27]. Figure. 2.1 shows a shunt active power filter which consists of a Voltage

Source Inverter (VSI) with filter inductor on ac side of the inverter. With the help a control strategy it determines the required gate signal in real time, and forces the VSI to synthesize

Page | 22

Three Phase

Voltage Source

A

B

C

*i s*

*L s*

*R s i*

*F i*

*L*

A

B

C

Non-Linear Load

A

B

C

C dc

**Figure. 2.1 **

Three Phase Shunt Active Power Filter

SAPF accurately the filter current for compensating the harmonic current produced by non-linear load. SAPF continuously tracks the changes in the harmonic content of the load current and accordingly changes the filter current such that harmonic current are confined at the load terminal, hindering its penetration into the power system.

The basic compensation principle of the shunt active power filter is shown in Figure. 2.2.

The non-linear load draws a fundamental current component

𝑖

𝐿𝑓 and a harmonic current

𝑖

𝐿ℎ from the source. The principal function of shunt active power filter is to compensate the load harmonic current, however it can also compensate the current harmonic induced on the source side due to distorted source voltage. It act as a current source and inject the required filter current at PCC to cancel the load current harmonics and make the source current sinusoidal and in phase with the source voltage.

When the load condition changes, there is a mismatch in the real power supply and real power demand between the source and the load. This real power difference is compensated by the DC capacitor of SAPF. To maintain the real power balance there is a corresponding change in the DC capacitor voltage. A sag is produced in the DC capacitor voltage if there is an increase in real power demand, while a swell is developed in the DC capacitor voltage

Page | 23

if the real power demand is decreased. If the DC capacitor voltage is recovered and attains the reference voltage, the real power supplied by the source is supposed to be equal to that consumed by the load again.

Hence in order to maintain satisfactory operation of the shunt active power filter, some good control strategy is to be designed, which would continuously and accurately calculate the reference source current and maintain the DC capacitor voltage at reference voltage level to get better compensating performance. In the next section control strategy for shunt active power filter to compensate current harmonics has been discussed.

Source

*i*

*S*

*R*

*F i*

*F*

PCC

*i*

*Lf*

*i*

*Lh*

*L*

*F*

Filter

Current

Shunt Active

Power Filter

**Figure. 2.2 **

Basic compensation principle of the SAPF

**2.3.**

**Control Strategy **

Shunt active power filter with help of a control strategy, generates the required filter current, which, cancels out load current harmonics, thus making source current sinusoidal.

Hence, the control strategy can be considered as the heart of SAPF, which can broadly be divided into two part:

**2.3.1**

**Generation of Reference Source Current **

Using the various sensed voltage and current signal, reference source current is calculated.

Generation of reference source current can be based on frequency-domain or time-domain techniques. Generation of reference source current based on Synchronous Reference Frame and Self Tuning filter using various voltage controllers is presented in section 2.4, 2.5 &

2.6.

Page | 24

*Frequency Domain Technique *

In frequency domain approach, compensating current/voltage signals are extracted from distorted voltage or current signals using Fourier analysis [49-53]. The main drawback of this approach is its unmanageable computation time. As the highest order of harmonic to be eliminated increases, number of calculations increases, hence a large response time.

Therefore, to manage the computation time, compensation is limited to 20 th

harmonic [49].

Recent development in fast processor, may improve the response time.

*Time domain Technique *

In time domain approach, compensating current/voltage signals are derived instantaneously from distorted and harmonic-polluted voltage or current signals. Various time domain has been reported in [49, 50, 52, 54-57]. Time domain approach has a fast response even in the transient period, easy to implement and has little computational burden.

**2.3.2**

**Generation of Gate Signal **

To generate gate signals for the VSI, reference current is compared with the actual current so that the actual current tracks the reference current and hence better compensation is obtained. Various approaches such as; hysteresis-based current control, PWM current or voltage control, deadbeat control, sliding mode control, Neural network-based current control, etc., are reported in [58-62]. Details of various approaches such as hysteresis-based current control, Adaptive hysteresis-based current control, weighted adaptive hysteresisbased current control and Lyapunov function based control are presented in Chapter 3.

**2.4.**

**Reference source current generation using Synchronous Reference Frame **

The synchronous reference frame (SRF) theory otherwise known as (

*d*

*q*

) theory is based on time domain approach to generate the reference source current [30]. Figure. 2.2 shows the block diagram to generate the reference source current using SRF theory. The three-phase load current ( 𝑖

𝐿𝑎

*,*

𝑖

𝐿𝑏

*, *

𝑖

𝐿𝑐

) in the stationary co-ordinates are transformed to direct axis (d) and quadratic axis (q) in the synchronously rotating coordinate (Figure. 2.3) by using Park transformation [31, 32].

The transformation is done using (2.1) & (2.2) [63].

𝑇 = √

2

3

1

⁄

√2

[ 𝑠𝑖𝑛(𝜔𝑡)

1

⁄

√2

1

⁄

√2

] (2.1)

Page | 25

*i*

*La i*

*Lb i*

*Lc v*

*

*dc*

_

*v dc*

d abc to q d-q transform

0

*i i*

*Ld i*

*Lq*

*L*

0

Voltage

Controller

LPF

*I dc i*

*Ld*

0 d d-q to q abc transform

0 0

*i*

*

*Sa i*

*

*Sb i*

*

*Sc v*

*Sa v*

*Sb v*

*Sc*

PLL

*t*

*t*

** Figure. 2.3**

Control Algorithm for source reference current generation using SRF

[ 𝑖 𝑖 𝑖

𝐿0

𝐿𝑑

𝐿𝑞

] = 𝑇 [ 𝑖 𝑖

𝐿𝑎

𝐿𝑏 𝑖

𝐿𝑐

] (2.2)

The reference frame is rotating synchronously with fundamental component of the load current. Hence the direct and quadrature axis components of the load current (

𝑖

𝐿𝑑

&

𝑖

𝐿𝑞

), include both oscillating/ac components ( 𝑖̃

𝐿𝑑

&

𝑖̃

𝐿𝑞

) and dc components ( 𝑖̅

𝐿𝑑

& 𝑖̅

𝐿𝑞

). The oscillating components ( 𝑖̃

𝐿𝑑

&

𝑖̃

𝐿𝑞

) of the current correspond to harmonic currents, and the dc components of the load current correspond to active ( 𝑖̅

𝐿𝑑

) and reactive (

𝑖̅

𝐿𝑞

) currents [64].

*i*

*Lc*

c axis

*i*

*Lq*

q axis

120°

120°

120° a axis

*i*

*La*

90° d axis b axis

*i*

*Lb*

** Figure. 2.4 **

a-b-c to d-q transformation

*i*

*Ld*

Page | 26

𝑖

𝐿𝑑

= 𝑖̅

𝐿𝑑

+ 𝑖̃

𝐿𝑑

&

𝑖

𝐿𝑞

= 𝑖̅

𝐿𝑞

+ 𝑖̃

𝐿𝑞

(2.3)

After a-b-c to d-q transformation, 𝑖 𝑑 current is sent through a low pass filter (LPF) to extract the fundamental component and filter out the harmonic components of the load current. The LPF allows only the fundamental frequency components. A second order low pass Butterworth filter is used with a cut off frequency of 50 Hz for eliminating the higher order harmonics. The DC-side capacitor voltage of voltage source inverter (VSI) is sensed and compared with the reference DC capacitor voltage for calculating the error voltage. This error voltage is passed through a Voltage controller to maintain the DC capacitor voltage constant at the reference voltage level. The output of the Voltage controller

𝐼 𝑑𝑐 is considered as the loss component of the current, which accounts for losses in the SAPF.

𝐼 𝑑𝑐 is then added to the filtered 𝑖

𝐿𝑑 current so that losses occurring in the SAPF are supplied by the source. Then by using inverse park transformation, current in the rotating co-ordinates are transformed to the stationary a-b-c co-ordinates to get the required three phase reference source current using (2.4) & (2.5). PLL circuit is used to make the reference source current in phase with the source voltage so that the power factor becomes unity.

T

−1

= √

2

3

[

1

⁄

√2

1

1

⁄

√2

⁄

√2 sin(ωt) cos(ωt)

⁄ )

]

(2.4)

[ 𝑖 𝑖 𝑖

∗

𝑆𝑎

∗

∗

𝑆𝑏

𝑆𝑐

] = 𝑇

−1

[ 𝑖

0

′

𝐿𝑑

0

] (2.5)

**2.5.**

**Reference source current generation using Self Tuning Filter **

In order to reduce the THD of the source current and simultaneously get unity power factor under non-sinusoidal source voltage, accurate angular position of the source voltage is required. We have developed a control strategy which uses Self Tuning Filter (STF) to filters the non-sinusoidal source voltage in real time, thus extracting the fundamental component of the source voltage. Then by using this filtered source voltage, the unfiltered source voltage, the load current and a small amount of loss component corresponding to capacitor switching losses, optimal reference source current is estimated, which is in phase with the fundamental voltage. The block diagram of the control method is shown in Figure.

2.5. The proposed control method is divided into 2 steps, which are as follows.

Page | 27

*v*

*Sa v*

*Sb v*

*Sc*

Source Voltage

Filtering using

STF

*v*

*Sa v*

*Sb v*

*Sc*

Unit Vector calculation

*u*

*Sa u*

*Sb u*

*Sc i*

*

*Sa v dc v*

*

*dc v e i*

*La i*

*La i*

*La*

*I dc*

Optimal

Reference

Source Current

Estimation

*

*i*

*Sb i*

*

*Sc*

Voltage

Controller

** Figure. 2.5**

Control Algorithm for reference source current generation using

**2.5.1**

STF

**Source Voltage Filtering using Self Tuning Filter**

In order to get the fundamental component of the source voltage, we have used the Self-

Tuning Filter (STF) as proposed by Hong-sock Song in [65], where it used STF to estimate the phase angle of PWM converter output. He defined:

𝑉 𝑥𝑦

(𝑡) = 𝑒 𝑗𝜔𝑡

∫ 𝑒

−𝑗𝜔𝑡

𝑈 𝑥𝑦

(𝑡)𝑑𝑡 (2.6)

Where,

𝑈 𝑥𝑦 and

𝑉 𝑥𝑦 are the instantaneous input and output signals. The transfer function after Laplace transformation is given as:

𝐻(𝑆) =

𝑉 𝑥𝑦

(𝑆)

𝑈 𝑥𝑦

(𝑆)

=

𝑆

𝑆 + 𝑗𝜔

2

+ 𝜔

2

(2.7)

*V*

*K*

1 s

*V*

*c*

*c*

*V*

*K*

1 s

*V*

** Figure. 2.6**

Block diagram of Self Tuning Filter

Page | 28

As in [66], by introducing the parameter

*K *

in

*H*

(

*s*

) (2.7), the transfer function magnitude is equal to one. Except the integral effect on the input magnitude, the STF does not change the phase of the input signal, i.e. the input

𝑈 𝑥𝑦 and output

𝑉 𝑥𝑦

have the same phase. Thus, by using a STF, the fundamental component can be extracted from the non-sinusoidal source voltage without any phase delay and change in amplitude. The block diagram of STF is shown in Figure. 2.6.

𝐻(𝑆) =

𝑉 𝑥𝑦

(𝑆)

𝑈 𝑥𝑦

(𝑆)

= 𝑘

(𝑆 + 𝑘) + 𝑗𝜔 𝑐

(𝑆 + 𝑘)

2

+ 𝜔 𝑐

2

(2.8)

[

𝑉 𝛼

𝑉 𝛽

𝑉

0

] = √

2

3

1

0

1

[

√2

−

1

2

√3

2

1

√2

−

1

−

2

√3

1

2 𝑣

𝑆𝑎

[ 𝑣 𝑣

𝑆𝑏

𝑆𝑐

] (2.9)

√2 ]

The three phase non-sinusoidal source voltage are transformed into α-β co-ordinates using the Clarke transformation as in eq. (2.9).Then by using Laplace transformation,

𝑉 𝛼

&𝑉 𝛽 are converted into

𝑉 𝛼

(𝑠)& 𝑉 𝛽

(𝑠)

.The fundamental components are given as:

𝑉 𝛼

(𝑆) = 𝑘

𝑆

[𝑉 𝛼

(𝑆) − 𝑉 𝛼

(𝑆)] − 𝜔 𝑐

𝑆

𝑉 𝛽

(𝑆) (2.10)

𝑉 𝛽

(𝑆) =

[ 𝑣

𝑆𝑎 𝑣 𝑣

𝑆𝑏

𝑆𝑐

] = √

2

3 𝑘

𝑆

[𝑉 𝛽

(𝑆) − 𝑉 𝛽

(𝑆)] −

1

√2

1

√2

1

[

√2

−

0

√3

2

√3

2

−

1

1

−

2

1

2] 𝜔 𝑐

𝑆

𝑉 𝛼

(𝑆) (2.11)

[

𝑉

𝑉

𝑉 𝛼 𝛽

0

] (2.12)

Then by applying the inverse Laplace transformation and inverse Clarke transformation we get

𝑉 𝛼

(𝑆) & 𝑉 𝛽

(𝑆)

, we get the required fundamental source voltages [ 𝑣 𝑠𝑎

, 𝑣 𝑠𝑏

, 𝑣 𝑠𝑐

] (2.12).

**2.5.2**

**Estimation of Reference Source Current **

The nonlinear load current

𝑖

𝐿𝑎

(𝑡) can be expressed in terms of fundamental component and the harmonic component.

∞ 𝑖

𝐿𝑎

(𝑡) = ∑ 𝐼 𝑎𝑛 𝑠𝑖𝑛( 𝑛𝜔𝑡 + ∅ 𝑛

) (2.13) 𝑛=1

𝑖

𝐿𝑎

(𝑡) = 𝑖 𝑎1 𝑠𝑖𝑛(𝜔𝑡 + ∅

1

) + ∑

∞ 𝑛=2 𝑖 𝑎𝑛 𝑠𝑖𝑛( 𝑛𝜔𝑡 + ∅ 𝑛

) (2.14)

Page | 29

The instantaneous power

(𝑝

𝐿𝑎

(𝑡)) for phase ‘a’ is then given as (2.14), where 𝑣

𝑆𝑎

(𝑡)

is the phase ‘a’ source voltage.

*

*v dc v dc*

Voltage

Controller

*i*

*La v*

*Sa i*

*Lb v*

*Sb i*

*Lc v*

*Sc v*

*Sa v*

*Sb v*

*Sc*

1

*V*

*Sa*

*V*

*Sb*

*V*

*Sc*

2

2

2

2

3

*V*

2

*Sa*

*V*

2

*Sb*

*V*

2

*Sc*

*u*

*Sa u*

*Sb u*

*Sc*

1 3

*I*

*S*

*I dc i*

*S*

*

*i*

*Sa i*

*

*Sb i*

*

*Sc*

** Figure. 2.7**

Block diagram to estimate the reference source current 𝑝

𝐿𝑎

(𝑡) = 𝑣

𝑆𝑎

(𝑡) ∗ 𝑖

𝐿𝑎

(𝑡) (2.15)

This instantaneous power 𝑝

𝐿𝑎

(𝑡) in (3) has three components, active fundamental power

(𝑝 𝑓𝑎

(𝑡))

**,**

reactive power

(𝑝 𝑟𝑎

(𝑡))

and harmonic power

(𝑝 ℎ𝑎

(𝑡))

, which is represented in eq. (2.16).

𝑝

𝐿𝑎

(𝑡) = 𝑝 𝑓𝑎

(𝑡) + 𝑝 𝑟𝑎

(𝑡) + 𝑝 ℎ𝑎

(𝑡) (2.16)

The computation of the Optimal Reference Source Current is based on the calculation of the active current. In order to obtain this, it is necessary to calculate the real work done by the load which corresponds to total average power which is given as

𝑃

∗

=

1

𝑇

𝑇

∫ 𝑝

𝐿𝑎

0

(𝑡)𝑑𝑡

=

1

𝑇

𝑇

∫ 𝑣

𝑆𝑎

0

(𝑡) ∗ 𝑖

𝐿𝑎

(𝑡)𝑑𝑡

(2.17)

Hence the total active component of the load current for phase ‘a’ is given as

𝐼 𝑠𝑎

(2.18), where

𝑉 𝑠𝑎

corresponds to the RMS value of fundamental component of source voltage.

Page | 30

𝐼

𝑆𝑎

=

𝑃

∗

𝑉 𝑠𝑎

(2.18)

Similarly

𝐼

𝑆𝑏

&

𝐼

𝑆𝑐

for phase ‘b’& ‘c’ are calculate. To balance the source current in three phases, average of the active components of the load current is taken.

𝐼

𝑆

= (𝐼

𝑆𝑎

+ 𝐼

𝑆𝑏

+𝐼

𝑆𝑐

) 3

A small overhead current

𝐼 𝑑𝑐

, which correspond for the converter switching losses and capacitor leakage caused in the VSI is added to the average active component of the load current, to obtain the peak value of the reference source current.

𝑖 𝑝

= 𝐼

𝑆

+ 𝐼 𝑑𝑐

(2.20)

Using equation (2.21) we get the in phase unit reference current vectors

(𝑢

𝑆𝑎

(𝑡), 𝑢

𝑆𝑏

(𝑡), 𝑢

𝑆𝑐

(𝑡)) from the fundamental source voltage [ 𝑣

𝑆𝑎

, 𝑣

𝑆𝑏

, 𝑣

𝑆𝑐

]

**, **

which are then multiplied with the peak value of the reference current to get the reference source current as given in (2.22) [67]. The block diagram to estimate the reference source current is shown in

Figure. 2.7. 𝑢

𝑆𝑎

(𝑡) = 𝑣

𝑆𝑎

(𝑡)

𝑉 𝑥

; 𝑢

𝑆𝑏

(𝑡) = 𝑣

𝑆𝑏

(𝑡)

𝑉 𝑥

; 𝑢

𝑆𝑐

(𝑡) = 𝑣

𝑆𝑐

(𝑡)

(2.21)

𝑉 𝑥

Where,

𝑉 𝑥

= √

2

3

2

(𝑉

𝑆𝑎

2

+ 𝑉

𝑆𝑏

2

+ 𝑉

𝑆𝑐

) 𝑖

∗

𝑆𝑎

(𝑡) = 𝑖 𝑝

. 𝑢

𝑆𝑎

(𝑡) = 𝑖 𝑝

. 𝑠𝑖 𝑛(𝜔𝑡) ; 𝑖

∗

𝑆𝑏

(𝑡) = 𝑖 𝑝

. 𝑢

𝑆𝑏

(𝑡) = 𝑖 𝑝

. 𝑠𝑖𝑛(𝜔𝑡 − 120); 𝑖

∗

𝑆𝑐

(𝑡) = 𝑖 𝑝

. 𝑢

𝑆𝑐

(𝑡) = 𝑖 𝑝

. 𝑠𝑖𝑛(𝜔𝑡 + 120) (2.22)

**2.6.**

**DC Capacitor bus Voltage regulation using Voltage Controllers **

To get good compensating performance of SAPF, the real power flowing into it must controlled, which is done by regulating and maintaining the DC capacitor bus voltage at the reference voltage level. During the compensation process, some losses such as converter switching losses and capacitor leakage are caused in the VSI. While if the DC capacitor bus voltage falls below the peak value of PCC voltage, SAPF would not be able to provide proper compensation, hence it is essential to regulate the DC capacitor bus voltage for proper compensation.

DC capacitor bus voltage regulation in SAPF is done by comparing the actual DC capacitor bus voltage ( 𝑣 𝑑𝑐

) of the SAPF with a reference voltage level ( 𝑣

∗ 𝑑𝑐

) and the error signal 𝑣 𝑒

(14) is then passed through a voltage controller. The output of the Voltage

Page | 31

controller accounts for the losses in SAPF [Figure. 2.8]. It is considered as loss component of the current which is added with active current component of the load to get the peak value of the reference source current. Previously, various voltage controllers such PI & PID controllers have been used to regulate the DC capacitor bus voltage as reported in [36-38].

In this section we will discuss in details about these conventional controllers and proposed some new controllers to overcome the drawbacks of these conventional controllers.

*

*v dc v e*

Voltage

Controller

*I dc v dc*

**Figure. 2.8**

DC Capacitor bus Voltage regulation

**2.6.1**

**DC Capacitor bus Voltage regulation using PI Controller **

The dc voltage error signal 𝑣 𝑒

is passed through the PI controller to maintain the dc capacitor bus voltage constant. The PI controller has two parts, proportional and the integral

𝐼 𝑑𝑐

= 𝐾

𝑃

∗ 𝑣 𝑒

+ 𝐾

𝐼

∫ 𝑣 𝑒 𝑑𝑡 (2.23)

*

*v dc v e*

*K*

*P*

1

*I dc v dc*

*K*

*I*

1 s

**Figure. 2.9**

DC Capacitor bus Voltage regulation using PI controller part as shown in Figure. 2.9. The output of the PI controller is considered as the loss component of the current (

𝐼 𝑑𝑐

), which is given as in (14), where

𝐾 𝑝 is the proportional gain which determines the dynamic response of the dc capacitor bus voltage and

𝐾

𝐼 is the integral gain which is used to eliminate the steady state error of the dc capacitor bus voltage.

The closed loop transfer function of the dc voltage control is given as (12) [38] which is a typical second order system as given in (13). 𝑣 𝑑𝑐 𝑣

∗ 𝑑𝑐

= 𝑣 𝑑𝑐 𝑣

∗ 𝑑𝑐

=

S

2

S

2

+ 𝐾

𝑃

⁄

𝐾

𝑃

. 𝐾

𝐼

𝐶 𝑑𝑐

. S

⁄

𝐶 𝑑𝑐

+ 𝐾

𝑃

. 𝐾

𝐼

⁄ 𝐶 𝑑𝑐

(2.24) 𝜔

2

+ 2. 𝜉. 𝜔. S + 𝜔

2

(2.25)

Page | 32

By comparing eq. (12) & eq. (13)

𝐾

𝑃

= 2. 𝜉. 𝜔. 𝐶 𝑑𝑐

& 𝐾

𝐼

(2.26)

Where, 𝜉 = √2/2

is the damping factor and 𝜔

is the fundamental frequency of the source voltage. Using eq. (15) we can tune

𝐾

𝑃

& 𝐾

𝐼 values according the system parameter (

𝐶 𝑑𝑐

).

*K*

*P*

*

*v dc v e*

*K*

*I*

1

S

*I dc v dc*

*K*

*D*

S

**Figure. 2.10**

DC Capacitor bus Voltage regulation using PID controller

**2.6.2**

**DC Capacitor bus Voltage regulation using PID Controller **

Figure 2.10 shows proportional-integral-derivative controller (PID Controller) to regulate the dc capacitor voltage [68, 69]. The PID controller output is given as in (12), where

𝐾

𝑃

, 𝐾

𝐼

& 𝐾

𝐷 are the proportional, Integral and Derivative gains respectively. Table 2.1 shows the effects of increasing

𝐾

𝑃

, 𝐾

𝐼

& 𝐾

𝐷 independently. So by introducing a small value 𝑘

𝐷

the settling will be reduce and also improves the transient response. As

𝐾

𝑃

, 𝐾

𝐼

& 𝐾

𝐷

are dependent on each other, so by changing one of these gain can change the effect of the other two. Therefore tuning the gains must be done carefully.

**Table 2.1 **

Effect of increasing PID Controller gains independently

**. **

**Parameter Rise time Overshoot Settling time S-S error**

𝑲

𝑷

𝑲

𝑰

𝑲

𝑫

Decreases

Decreases

Minor Change

Increases

Increases

Decreases

Small change

Increase

Decrease

Decrease

Eliminate

No effect

𝐼 𝑑𝑐

= 𝐾

𝑃

∗ 𝑣 𝑒

+ 𝐾

𝐼

∫ 𝑣 𝑒 𝑑𝑡 + 𝐾

𝐷 𝑑𝑣 𝑒

(2.27) 𝑑𝑡

**2.6.3**

** DC Capacitor bus Voltage regulation using Fuzzy Logic Controller **

Figure. 2.11 shows the block diagram of Fuzzy Logic Controller (FLC) to maintain the dc capacitor voltage constant. Inputs to the FLC are the voltage error signal 𝑣 𝑒 and change

Page | 33

in voltage error signal 𝑑𝑣 𝑒

⁄ 𝑑𝑡

and the output of the FLC is

𝐼 𝑑𝑐

, the loss component of the current.

*

*v dc v e d dt*

Rule Base

*I dc*

Inference

*v dc*

Fuzzy Logic controller

**Figure. 2.11**

DC Capacitor bus Voltage regulation using Fuzzy Logic Controller

Fuzzy systems are knowledge-based or rule based system, which transforms human knowledge into fuzzy IF-THEN rules in a systematic procedure to provide control action.

Fuzzy logic control was first proposed by Professor Lofti Zadeh in 1965 [70], where he deduced FLC from fuzzy set theory, in which, transition is being the fuzzy between membership and non-membership function. Since then FLCs has been successfully implemented in active power filters as reported in [33-35]. Various components of the FLC are explained in brief:

*Fuzzifier *

The fuzzifier acts as an interface between the real world and the fuzzy inference, which converts the real-time values into a linguistic variable (Fuzzy number) [71].

*Fuzzy Inference *

The fuzzy inference are used to combine fuzzy IF-THEN rules to map a fuzzy set A in U to a fuzzy set B in V. It is considered as the brain of the FLC. We have used Mamdani's

'min' operator for our FLC.

*Rule Base *

Fuzzy rule base consists of set of simple fuzzy IF-THEN statements based on input and output of FLC. It is considered as the heart of the FLC as all other components are used to implement these rules in a reasonable and efficient manner in order provide proper control.

An example of the fuzzy IF-THEN rules in the fuzzy rule base is given in (2.28), where

𝑣 𝑒

*, *

𝑑𝑣 𝑒 𝑑𝑡

*& *

𝐼 𝑑𝑐 are the input and output of the FLC and

𝐴

1

, 𝐴

2

*& *

𝐴

3 are the membership functions.

Page | 34

*If *

𝑣 𝑒

* is *

𝐴

1

* and *

𝑑𝑣 𝑒

⁄ 𝑑𝑡

* is*

𝐴

2

*, then *

𝐼 𝑑𝑐

* is *

𝐴

3

(2.28)

*Defuzzifier *

The output generated by fuzzy inference are in terms of linguistic variable. But for most application, the control output must be real valued numbers. Therefore an interface between fuzzy inference and the real world must be constructed. The defuzzifier is an interface which converts the linguistic variables into a crisp value for real time applications. There are various methods of defuzzification such as Bisector of area (BOA), Centroid of area (COA),

Middle of Maximum (MOM), Smallest of Maximum (SOM) and Largest of Maximum

(LOM), etc., [72]. We have used centroid of area method for its simplicity and accuracy.

NEB

NES

0 PES PEB

NEB

NES

0

PES PEB

-10

-5 0

**(a) **

5 10

*e e*

-5 -2.5

0

**(b) **

**Figure. 2.12**

Membership function of

**(a)**

𝑣 𝑒

,

𝑣 𝑒

⁄ 𝑑𝑡

;

**(b) **

𝐼 𝑑𝑐

2.5

**Table 2.2 **

Range of the Parameters Chosen for FLC

**Parameters **

**Range**

𝒗 𝒆

-10 10 𝒅𝒗 𝒆

⁄ 𝒅𝒕

-10 10

𝑰 𝒅𝒄

-5 5

5

*I dc*

To realize the FLC, a two input and single output Fuzzy Inference System (FIS) is developed in MATLAB/Simulink using Fuzzy Toolbox. The inputs of the FIS are

[𝑣 𝑒

, 𝑑𝑣 𝑒 𝑑𝑡

*,*

while the output is [

𝐼 𝑑𝑐

]. We have used Mamdani's 'min' operator to design the FIS. For both the inputs and outputs we have used triangular membership functions with

5 fuzzy sets, which are [NEB NES 0 PES PEB. The input and output membership function of FIS is shown in Figure. 2.12. Hence we have 25 IF-Then fuzzy rules which is presented in Table 2.3. To make optimal use of FLC we have chosen the following range for the parameters given in Table 2.2.

Page | 35

** Table 2. 3**

Fuzzy Rule Base for

𝐼 𝑑𝑐

𝒅𝒗 𝒆

⁄ 𝒅𝒕

**NEB NES **

𝒗 𝒆

**0 PES PEB **

**NEB **

NEB NEB NEB NES 0

**NES **

NEB NEB NES 0 PES

**0 **

**PES **

**PEB **

NEB

NES

0

NES

0

0

PES

PES

PEB

PEB

PEB

PES PEB PEB PEB

**2.6.4**

**DC Capacitor bus Voltage regulation using Adaptive Fuzzy PID Controller **

To enhance the performance of the conventional PID and to make it adaptive we have used Adaptive Fuzzy PID Controller (AFPIDC). In this paper AFPIDC is used to regulate the DC capacitor bus voltage. Figure. 2.13 show a simple AFPIDC which consists of two parts [73]. The primary part is similar to the conventional PID controller, where the error signal 𝑣 𝑒

is input and the output of the primary part is given as

𝐼

0 𝑑𝑐

in (2.29).

𝐼

0 𝑑𝑐

= 𝐾

0 𝑝

∗ 𝑣 𝑒

+ 𝐾

𝐼

0

∫ 𝑣 𝑒 𝑑𝑡 + 𝐾

0

𝐷 𝑑𝑣 𝑒

(2.29) 𝑑𝑡

The parameters

(𝐾

0

𝑃

, 𝐾

𝐼

0

&

𝐾

0

𝐷

)

in (13) are fixed gains as in case of a conventional PID and cannot be changed corresponding to any change in system condition. To make the controller adaptive the secondary part is used. The secondary part of AFPIDC consists of two input three output fuzzy logic controller, where the inputs are 𝑣 𝑒 and

𝑑𝑣 𝑒

⁄ 𝑑𝑡

.

∆𝐼 𝑑𝑐

= ∆𝑣 𝑒𝑝

+ ∫ ∆𝑣 𝑒𝑖 𝑑𝑡 + 𝑑∆𝑣 𝑒𝑑

(2.30) 𝑑𝑡

Where,

∆𝑣 𝑒𝑃

= ∆𝐾

𝑃

∗ 𝑣 𝑒

∆𝑣 𝑒𝐼

= ∆𝐾

𝐼

∗ 𝑣 𝑒

∆𝑣 𝑒𝐷

= ∆𝐾

𝐷

∗ 𝑣 𝑒

(2.31)

The output of the secondary part is given as

∆𝐼 𝑑𝑐

in (2.30). The signals

∆𝑣 𝑒𝑃

, ∆𝑣 𝑒𝐼 and

∆𝑣 𝑒𝐷 is proportional to error signal

𝑣 𝑒

in (2.31), while

∆𝐾

𝑃

, ∆𝐾

𝐼

and

∆𝐾

𝐷 are the gains. These gains can be adaptively changed on real time basis by using the fuzzy

Page | 36

If-Then rules. By adding the outputs of primary part

(𝐼

0 𝑑𝑐

)

and secondary part

(∆𝐼 𝑑𝑐

)

of

AFPIDC, we get the output of AFPIDC

( 𝐼 𝑑𝑐

)

, which is represented in (2.33).

𝐼 𝑑𝑐

= 𝐼

0 𝑑𝑐

+ ∆𝐼 𝑑𝑐

(2.32)

𝐼 𝑑𝑐

= [𝐾

0

𝑃

∗ 𝑣 𝑒

+ ∆𝑣 𝑒𝑃

] + ∫[𝐾

𝐼

0

. 𝑣 𝑒

+ ∆𝑣 𝑒𝐼

]𝑑𝑡 + 𝑑[𝐾

0

𝐷

. 𝑣 𝑒

+∆𝑣 𝑒𝐷

]

(2.33) 𝑑𝑡

*d dt k*

0

*p*

Fuzzy Logic

Controller

*v ep*

*v ei*

*v ed*

1

*v*

*

*dc v dc v e k i*

0

*k d*

0

1 S

S

*I dc*

AFPIDC

** Figure. 2.13**

DC Capacitor bus Voltage regulation using AFPIDC

It is clear that by changing

∆𝐾

𝑃

, ∆𝐾

𝐼

and

∆𝐾

𝐷

, it would lead to the change in

∆𝑣 𝑒𝑃

, ∆𝑣 𝑒𝐼 and

∆𝑣 𝑒𝐷

, hence change in

∆𝐼 𝑑𝑐

. The change in

∆𝐼 𝑑𝑐

implies implicit adaptation of

𝐼 𝑑𝑐

, hence implicit adaptation of AFPIDC is done [74].

To change

∆𝑘

𝑃

, ∆𝑘

𝐼

and

∆𝑘

𝐷

adaptively, we have used FLC for which a two input and three output Fuzzy Inference System (FIS) is developed in MATLAB/Simulink using Fuzzy

Toolbox. The inputs of the FIS are

[𝑣 𝑒

, 𝑑𝑣 𝑒

⁄ 𝑑𝑡 ]

*,*

while the outputs are

[

∆𝑣 𝑒𝑃

, ∆𝑣 𝑒𝐼 and

∆𝑣 𝑒𝐷

]. We have used Mamdani's 'min' operator to design the FIS. For both the inputs and outputs we have used triangular membership functions, with 3 fuzzy sets which are [NVE 0 PVE] shown in Figure. 2.14.

Hence there are 9 IF-Then fuzzy rules for every output of the FIS which are shown in Table 2.5, 2.6 & 2.7. To fine tune

∆𝑘 𝑝

, ∆𝑘 𝑖

and

∆𝑘 𝑑

we have used the same fuzzy If-Then rules as given in [74, 75, 76].

To make optimal use of FLC we have chosen the following range for the parameters given in Table 2.1

**Table 2. 4 **

Range of the Parameters Chosen for AFPID

**Parameters **

𝒗 𝒆 𝒅𝒗 𝒆

⁄ 𝒅𝒕 ∆𝒗 𝒆𝑷

∆𝒗 𝒆𝑰

∆𝒗 𝒆𝑫

**Range**

-10 10 -10 10 -0.25 0.25 -5 5 -0.1 0.1

Page | 37

NVE

0

PVE

NVE

0

PVE

-10

NVE

0

**(a) **

0

10

*e e*

PVE

-.25

NVE

0

**(b) **

0

.25

*v eP*

PVE

-5

0

**(c) **

5

*v eI*

-.1

0

**(d) **

.1

*v eD*

**Figure. 2.14**

Membership function of

**(a)**

𝑣 𝑒

,

𝑣 𝑒

⁄ 𝑑𝑡

;

**(b)**

∆𝑣 𝑒𝑃

;

**(c)**

∆𝑣 𝑒𝐼

&

**(d)**

∆𝑣 𝑒𝐷

**Table 2. 5 **

Fuzzy Rule Base for

∆𝑣 𝑒𝑃

**Table 2. 6 **

Fuzzy Rule Base for

∆𝑣 𝑒𝐼

𝒅𝒗 𝒆

⁄ 𝒅𝒕 𝒗 𝒆

**NVE **

**NVE **

PVE

**0 **

PVE

**PVE **

0

𝒅𝒗 𝒆

⁄ 𝒅𝒕 𝒗 𝒆

**NVE **

**NVE **

NVE

**0 **

NVE

**PVE **

0

**0 **

**PEB **

PVE 0 NVE

**0 **

0

NVE NVE

**PEB **

**Table 2. 5 **

Fuzzy Rule Base for

∆𝑣 𝑒𝐷

NVE

0

0 PVE

PVE PVE

𝒅𝒗 𝒆

⁄ 𝒅𝒕 𝒗 𝒆

**NVE **

**NVE **

NVE

**0 **

**PEB **

NVE

0

**0 **

0

0

0

**PVE **

0

NVE

PVE

Page | 38

5

100

0

0

-100

.300

.325

.350

Time in Sec

.375

**(a) **

.400

-5

.300

.325

.350

Time in Sec

.375

**(b) **

.400

**(c) **

**Figure. 2.15**

Uncompensated Sinusoidal Source Voltage Condition

**(a)**

Source Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

**2.7.**

**Simulation Study **

To analyze the performance of shunt active power filter, the computer aided simulation models has been developed in the MATLAB / SIMULINK environment using Simpower tools [77-78]. For simulation study the non-linear load consists of diode based rectifier with a series RL load in the DC side. All the system parameters for simulation study are presented in Table 2.8. For simplification only phase ‘a’ responses are shown. The simulation models has been developed for sinusoidal source voltage, non- sinusoidal source voltage & unbalanced load conditions. For simulation analysis we have used a simple hysteresis band current controller to generate the reference current.

**Table 2. 8 **

System Parameters for Simulation Study

**System Parameters **

Source voltage ( v s

)

System frequency ( f

)

Source impedance (

R s

, L s

)

Filter impedance (

R c

, L c

)

Load impedance (

R

L

, L

L

)

DC link capacitance

(C

DC

)

Reference DC link voltage (

V

∗

DC

)

**Values **

100 V (peak)

50 Hz

0.1Ω;0.15 mH

0.4Ω;2.5 mH

40Ω;20 mH

2350 μF

230 V

**2.7.1**

**Sinusoidal Voltage condition **

For sinusoidal voltage condition an ideal three phase voltage source of constant amplitude as shown Figure. 2.15 (a). The uncompensated source current shown in Figure 2.15 (a) and

FFT analysis of source current shows that the THD is 30.74% (Figure. 2.15(c)).

Page | 39

Figure. 2.16 shows the results after compensation with SRF control strategy using PI; PID;

FLC and AFPID controllers under sinusoidal voltage condition. In case of PI controller source current have more ripples [Figure. 2.16 (a)(i)] and the FFT analysis shows that the

THD of the source current after compensation is 4.14% which is pretty higher for sinusoidal voltage [Figure. 2.16(a)(iv)]. With the use of PID controller we get slightly better results that PI with less ripple contents in the source current [Figure. 2.16 (b)(i)] and its THD is reduced to 3.70% [Figure. 2.16 (b)(i)]. While with FLC we get much improved performance with lesser ripple contents in the source current [Figure. 2.16 (c)(i)] and its THD is also reduced to a lower value of 3.11% [Figure. 2.16 (c)(iv)]. Figure. 2.16 (c)(iii) shows that

FLC provides better dc capacitor bus voltage regulation than the conventional PI & PID controllers. But AFPID provides the best results with a lowest THD value of 2.79% [Figure.

5

0

-5

.300

5

0

-5

.300

250

200

150

100

.300

.325

.350

Time in Sec

**(i) **

.375

.325

.325

.350

Time in Sec

**(ii) **

.350

Time in Sec

**(iii) **

.375

.375

.400

.400

250

200

150

.400

5

0

5

0

.325

.350

Time in Sec

**(i) **

.375

.400

.325

.350

Time in Sec

**(ii) **

.375

.400

.325

.350

Time in Sec

**(iii) **

.375

.400

**(iv) **

**(a) **

**(iv) **

**(b) **

**Figure. 2.16**

(

Sinu. Cond.) After Compensation by SRF method using

**(a)**

PI;

**(b)**

PID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

* Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

Page | 40

5

0

-5

.300

250

200

150

100

.300

5

0

-5

.300

.325

.350

Time in Sec

**(i) **

.375

.325

.350

Time in Sec

**(ii) **

.375

.325

.350

Time in Sec

**(iii) **

.375

.400

.400

.400

250

200

150

5

0

5

0

.325

.350

Time in Sec

**(i) **

.375

.400

.325

.350

Time in Sec

**(ii) **

.375

.400

.325

.350

Time in Sec

**(iii) **

.375

.400

**(iv) **

**(c) **

**(iv) **

**(d) **

**Figure. 2.16**

(

Sinu. Cond.) After Compensation by SRF method using

**(c)**

FLC;

**(d)**

AFPID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

* Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

2.16(d)(iv)], with minimum ripple content in the source current [Figure. 2.16 (d)(i)] while maintaining the dc capacitor voltage constant.

Results obtained using STF method shows that the source current after compensation has higher THD values for sinusoidal voltage condition. To get more improved results STF based control strategy has been developed. Figure. 2.17 shows the results after compensation with STF control strategy using various voltage controllers (PI; PID; FLC and AFPID) under sinusoidal voltage condition. The FFT analysis shows that the THD of the source current after compensation is reduced to 3.55%, 2.96% and 2.28% using PI; PID and FLC controllers respectively [Figure. 2.17(a) (iv), (b)(iv) & (c)(iv)]. But AFPID provides the best results, reducing the THD of source current to a lowest value of 1.89% [Figure. 2.17(d)(iv)] with minimum ripple content in the source current [Figure. 2.17 (d)(i)] while effectively maintaining the dc capacitor voltage constant [Figure. 2.17 (d)(iii)].

Page | 41

5

0

-5

.300

5

0

-5

.300

250

200

150

100

.300

.325

.350

Time in Sec

**(i) **

.375

.325

.350

Time in Sec

**(ii) **

.375

.325

.350

Time in Sec

**(iii) **

.375

.400

5

0

-5

.300

.400

.400

5

0

-5

.300

250

200

150

100

.300

.325

.350

Time in Sec

**(i) **

.375

.325

.350

Time in Sec

**(ii) **

.375

.325

.350

Time in Sec

**(iii) **

.375

.400

.400

.400

**(iv) **

**(a) **

**(iv) **

**(b) **

**Figure. 2.17**

(

Sinu. Cond.) After Compensation by STF method using

**(c)**

PI;

**(d)**

PID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

* Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

5

0

-5

.300

5

0

-5

.300

250

200

150

100

.300

.325

.325

.350

Time in Sec

**(i) **

.350

Time in Sec

**(ii) **

.375

.375

.325

.350

Time in Sec

**(iii) **

.375

.400

.400

.400

0

-5

.300

250

200

150

100

.300

5

0

-5

.300

5

.325

.325

.350

Time in Sec

**(i) **

.375

.350

Time in Sec

**(ii) **

.375

.400

.400

.325

.350

Time in Sec

**(iii) **

.375

.400

Page | 42

**(iv) **

**(c) **

**(iv) **

**(d)**

250

200

150

5

0

-5

.300

5

0

-5

.300

.325

.350

Time in Sec

**(i) **

.375

.325

.325

.350

Time in Sec

**(ii) **

.350

Time in Sec

**(iii) **

.375

.375

.400

.400

.400

5

0

-5

.300

5

0

-5

.300

250

200

150

100

.300

.325

.325

.350

Time in Sec

**(i) **

.350

Time in Sec

**(ii) **

.375

.375

.325

.350

Time in Sec

**(iii) **

.375

.400

.400

.400

**(iv) **

**(c) **

**(iv) **

**(d)**

**Figure. 2.17**

(

Sinu. Cond.) After Compensation by STF method using

**(c)**

FLC;

**(d)**

AFPID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

* Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

A comparative analysis of the two controller strategy using various voltage controllers, on the basis of the source current THD after compensation for sinusoidal voltage conditionis shown in Figure. 2.18. In SRF method we get a lowest THD of 2.79% using AFPID. While in STF method we get much more reduced value of THD of 1.89% using AFPID. So it can be concluded that the STF based control strategy using AFPID controller provides the best results.

**Figure. 2.18**

Source Current THD comparison for Sinusoidal Voltage Condition

5

100

50

0

0

-50

-100

.300

.325

.350

Time in Sec

(a)

.375

.400

.325

.350

Time in Sec

(b)

.375

.400

(c)

**Figure. 2.19**

Uncompensated Non-Sinusoidal Source Voltage Condition

**(a)**

Source Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

Page | 43

5

0

-5

.300

250

200

150

5

0

5

.300

**2.7.2**

**Non-Sinusoidal Voltage condition **

For non-sinusoidal voltage condition a programmed voltage source of constant amplitude with some distortion is considered which is shown Figure. 2.19 (a). The uncompensated source current shown in Figure. 2.19 (b) and FFT analysis of source current shows that the

THD is 31.09% [Figure. 2.19 (c)].

Figure. 2.20 shows the results after compensation with SRF control strategy using PI;

PID; FLC and AFPID controllers under sinusoidal voltage condition. Using PI & PID controllers, the STF method provides ineffective compensation with source current THD of

5.88% [Figure. 2.20 (a)(iv)] and 5.09% [Figure. 2.20 (b)(iv)] respectively which are higher than that of the IEEE 519 standards. There are higher no. of ripples contents in the source current after compensation as shown in Figure. 2.20 (a)(i) and (b)(i). With the use of FLC

.325

.325

.325

.350

Time in Sec

**(i) **

.350

Time in Sec

**(ii) **

.350

Time in Sec

**(iii) **

.375

.375

.375

.400

5

0

.400

-5

.300

250

200

150

.400

100

.300

10

5

0

-5

.325

.325

.325

.350

Time in Sec

**(i) **

.350

Time in Sec

**(ii) **

.350

Time in Sec

**(iii) **

.375

.375

.375

.400

.400

.400

**(iv) **

**(a) **

**(iv) **

**(b) **

**Figure. 2.20**

(Non-Sinu.)

After Compensation by SRF method using

**(a)**

PI;

**(b)**

PID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

* Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

Page | 44

0

-5

.300

250

200

150

100

.300

5

0

-5

.300

5

.325

.350

Time in Sec

**(i) **

.375

.325

.350

Time in Sec

**(ii) **

.375

.325

.350

Time in Sec

**(iii) **

.375

.400

5

0

-5

.300

5

0

.400

-5

.300

.400

250

200

150

.300

.325

.325

.350

Time in Sec

**(i) **

.375

.350

Time in Sec

**(ii) **

.375

.325

.350

Time in Sec

**(iii) **

.375

.400

.400

.400

**(iv) **

**(c) **

**(iv) **

**(d)**

**Figure. 2.20**

(Non-Sinu.)

After Compensation by SRF method using

**(c)**

FLC;

**(d)**

AFPID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

* Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

controller we get satisfactory results, reducing the THD to 4.49% [Figure. 2.20 (c)(iv)] which is below 5% (IEEE 519 Standard). While with AFPID controller we get much improved performance with lesser ripple contents in the source current [Figure. 2.20 (d)(i)] and its THD is also reduced to a lower value of 3.97% [Figure. 2.20 (d)(iv)] while maintaining the dc capacitor voltage constant.

Results obtained by STF method provides ineffective compensation using PI & PID controllers, while some satisfactory results are obtained using FLC and AFPID. To get further improved results and effective compensation, STF based control strategy has been developed. Figure. 2.21 shows the results after compensation with STF control strategy using various voltage controllers (PI; PID; FLC and AFPID) under non-sinusoidal voltage condition. The FFT analysis shows that the THD of the source current after compensation

Page | 45

is reduced to 4.03%, 3.57% and 3.24% using PI; PID and FLC controllers respectively

[Figure. 2.21 (a)(iv), (b)(iv) & (c)(iv)]. AFPID provides the best results, reducing the THD of source current to a lowest value of 2.82% [Figure. 2.21 (d)(iv)] with minimum ripple content in the source current [Figure. 2.21 (d)(i)) while effectively maintaining the dc capacitor voltage constant [Figure. 2.21 (d)(iii)].

The source current THD after compensation for non-sinusoidal source voltage condition, using the two control strategy with various voltage controllers has been compared which is shown in Figure 2.22. In SRF method THD is reduced to 3.97% using AFPID while in STF method we get much more reduced value of THD of 2.89% using AFPID. So it can be concluded that even under non-sinusoidal source voltage condition, the STF based control strategy using AFPID controller provides the best performance.

250

200

150

5

0

-5

.300

5

0

-5

.300

.325

.325

.350

Time in Sec

**(i) **

.375

.350

Time in Sec

**(ii) **

.375

.325

.350

Time in Sec

**(iii) **

.375

.400

5

0

5

.300

.400

.400

250

200

150

.300

5

0

5

.300

.325

.350

Time in Sec

**(i) **

.375

.325

.325

.350

Time in Sec

**(ii) **

.350

Time in Sec

**(iii) **

.375

.375

.400

.400

.400

**(iv) **

**(a) **

**(iv) **

**(b)**

**Figure. 2.21**

(Non-Sinu.)

After Compensation by STF method using

**(a)**

PI;

**(b)**

PID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

* Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

Page | 46

5

0

-5

.300

250

200

150

5

0

-5

.300

.325

.350

Time in Sec

**(i) **

,375

.325

.350

Time in Sec

**(ii) **

.375

.325

.350

Time in Sec

**(iii)**

.375

.400

.400

5

0

-5

.300

5

0

-5

.300

250

200

150

.400

.325

.350

Time in Sec

**(i) **

.375

.325

.350

Time in Sec

**(ii) **

.375

.325

.350

Time in Sec

**(iii) **

.375

.400

.400

.400

**(iv) **

**(c) **

**(iv) **

**(d) **

**Figure. 2.21**

(Non-Sinu.)

After Compensation by STF method using

**(c)**

FLC;

**(d)**

AFPID

**(**

*(i)*

* Source current; *

*(ii)*

* Filter Current; *

*(iii)*

* Capacitor Voltage *

*(iv)*

* FFT analysis*

**)**

**Figure. 2.22**

Source Current THD comparison for Non-Sinusoidal Voltage Condition

Page | 47

**2.7.1**

**Un-Balanced Load condition**

100

0

5

0

-100

.300

.325

.350

Time in Sec

.375

**(a) **

.400

-5

.300

.325

.350

Time in Sec

**(b) **

.375

.400

**(c) **

**Figure. 2.23**

Uncompensated Unbalanced Load Condition

**(a)**

Source Voltage;

**(b)**

Source

Current;

**(c)**

FFT analysis of Source Current

For unbalanced load condition, we have used three different RL loads which are connected in parallel to the diode rectifier based RL load. The uncompensated source current shown in Figure. 2.23 (a) and FFT analysis source current shows that the THD is 30.74%

[Figure. 2.23(c)]. Figure 2.23 (a). shows the sinusoidal voltage source with constant amplitude.

5 5

0

0

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.325

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Time in Sec

**(a) **

.375

.400

-5

.300

.325

.350

Time in Sec

**(b) **

.375

.400

5 5

0

0

-5

.300

.325

.350

Time in Sec

**(c) **

.375

.400

-5

.300

.325

.350

Time in Sec

**(d) **

.375

.400

**Figure. 2.24**

(Un-Balanced Load current) Source Current after Compensation by SRF

5

0

5 method using

**(a)**

PI;

**(b) **

PID;

**(c)**

FLC;

**(d)**

AFPID

0

.300

.325

.350

.375

.400

.300

.325

.350

.375

.400

PID; FLC and AFPID controllers under sinusoidal voltage condition. Using PI; PID & FLC

**(a) **

**(b) **

controllers, the STF method provides ineffective compensation as the source current has

5

5

0

-5

-5 and three phase source current are unbalanced. With the use of AFPID ripple contents in the

.300

.325

.350

.375

.400

.300

.325

.350

.375

.400

Time in Sec Time in Sec

**(d) **

unbalanced.

STF method is ineffective in balancing the source current. To make the source current balanced and further reduce the ripple contents of the source voltage, STF based control

Page | 48

5 5 control strategy using various voltage controllers (PI; PID; FLC and AFPID) under

-5

-5

.300

.325

.350

.375

.400

.300

.325

.350

Time in Sec

.375

.400

**(a) **

**(b) **

2.25(a) & (b)] are largely reduced but the three source current are still unbalanced. FLC

5 5 controllers provides better compensation with reduced ripple content and slightly balanced

0 0 three phase source current [Figure. 2.25(c)]. But AFPID provides the best results, by

-5

-5

.300

.325

.350

.375

.400

.300

.325

.350

.375

.400

minimizing the ripple content and almost making the three phase source current balanced

Time in Sec Time in Sec

**(c) **

(Figure 2.25(d)).

**(d) **

5

0

5

0

-5

.300

.325

.350

Time in Sec

**(a) **

.375

.400

-5

.300

.325

.350

Time in Sec

**(b) **

.375

.400

5

0

5

0

-5

-5

.300

.325

.350

Time in Sec

**(c) **

.375

.400

.300

.325

.350

Time in Sec

**(d) **

.375

**Figure. 2.25**

(Un-Balanced Load current) Source Current after Compensation by STF method using

**(a)**

PI;

**(b) **

PID;

**(c)**

FLC;

**(d)**

AFPID

.400

**Figure. 2.26**

Source Current THD comparison for

Un-Balanced Load

Condition

A comparative analysis of source current THD after compensation for unbalanced load condition is shown in Figure. 2.26 for the two control strategy using various voltage controllers. In SRF method we get a lowest THD of 4.7% using AFPID while in STF method we get much more reduced value of THD of 3.0% using AFPID, while making the three

Page | 49

phase source current balanced. So it can be concluded that the STF based control strategy using AFPID controller provides the best results even under unbalanced load condition.

To analyze the performance of the voltage controllers under study we have used the capacitor voltage response during compensation. Capacitor voltage response using PI, PID,

FLC & AFPID controllers are shown in Figure. 2.27. It can be observed that response with

PI control has the highest overshoot large and the settling time is more than .10 sec. While the response with FLC provide lower overshoot than PI &PID controller, the settling time is similar to PID control which is slightly more than .05 sec. AFPID provides the best control response with lower overshoot and a settling of about .05 sec.

280

260

240

220

200

180

160

PI

PID

Fuzzy

AFPID

140

0 .05

.10

.15

Time in Sec

.20

.25

**Figure. 2.27**

DC Capacitor Bus Voltage response using PI; PID; FLC and

AFPID controllers

In STF control strategy we generate the reference source current by calculating the inphase unit vector to make source current in phase with source voltage. Figure shows the source voltage and the compensated source, which is sinusoidal and in-phase with the source voltage thus making the overall power factor or the true power factor almost unity.

100

20

50 10

0

-50

0

-10

-100

.300

.325

.350

.375

**Figure. 2.28**

Source Current in phase with Source Voltage

-20

.400

Page | 50

**2.8.**

**Chapter Summary **

In this chapter, the reference source current extraction for three phase Shunt active filter is done using Synchronous Reference Frame (SRF) & Self-Tuning Filter (STF) based control strategies has been presented. While to regulate the DC capacitor bus voltage of the voltage source inverter (VSI), voltage controllers such as PI, PID, Fuzzy Logic Controller

(FLC) & the proposed Adaptive Fuzzy PID Controller (AFPID) has been developed.

The simulation result shows that the STF based control strategy provides better compensation that SRF method under sinusoidal source voltage, non- sinusoidal source voltage & un-balanced load conditions due to its better filtering technique. It makes the source current sinusoidal, thus reducing its THD well below 5% (IEEE 519 standard) and simultaneously makes the source current in phase with the source voltage. The proposed

AFPID controller provided better and faster control than other voltage controllers in study, hence effectively maintained the DC capacitor voltage constant at the reference voltage level with minimum overshoot, steady state error and less settling time.

To further enhance the performance and simultaneously reduce the losses, we have developed various adaptive current control techniques to generate the reference source current in the next chapter.

Page | 51

**3.1**

**Introduction **

Mitigation of the harmonic current by Shunt Active Power Filter (SAPF), requires proper filter current injection so that it cancels out the harmonics produced by the nonlinear load. To generate the required filter current, Voltage Source Inverter (VSI) of the

SAPF requires the necessary gate signal for turning ON and turning OFF the IGBTs. So, for generating the required gate signals for the VSI, reference current is compared with the actual current and the error is passed through a current controller to generate the gate signal. Various current control approaches such as; hysteresis-based current control, PWM current or voltage control, deadbeat control, sliding mode control, Neural network-based current control, etc., are reported in [58-62].

Broadly, the current control technique are of two types; direct current control and indirect current control technique [40]. Figure. 3.1 shows the block diagram of the direct current control and indirect current control technique to generate the gate signal for phase

‘a’. In direct control technique, first the reference filter current are obtained by subtracting the load current from the reference filter current, and then the reference filter current is compared with the actual filter current to generate the gate signal. With more number of inputs and step the computation time is more and hence the response is slow. While in indirect current control technique the reference source current is directly compared with

*i i*

*

*Sa*

*La*

**+ **

**- **

*i*

*

*Fa*

**+ **

**- **

Current

Controller

*S a*

*S a i*

*

*Sa*

**+ **

**- **

Current

Controller

*i*

*Fa i*

*Sa*

(

**a) (b)**

** Figure. 3. 1 **

Current Control Techniques

**(a) **

Direct Current Control

**; (b) **

In-

Direct Current Control

*S a*

*S a*

Page | 53

actual source current to generate the gate signal. With less no of inputs and steps computation time is less and hence the overall system response is instantaneous, without any delay. In this technique negligible switching ripples are produced and hence it actively able to eliminates the harmonics.

Therefore, to get efficient performance of SPAF, the current controller should be simple in design, stable, have less computation time, should produce lower switching losses, accurate tracking and minimize the current THD.

In this chapter we discuss various current controllers for Shunt Active Power Filter

(SAPF) to generate the gate signal. Along with the conventional current controller such hysteresis band current control (HBCC) and adaptive hysteresis band current control

(AHCC), a new proposed weighted adaptive hysteresis band current control (WAHCC) has been presented. The detailed simulation results using MATLAB/SIMULINK are presented to evaluate their performance and hence verify the effectiveness of the proposed controller.

**3.2**

**Hysteresis band Current Controller **

Conventionally hysteresis band current control (HBCC) method was used for its simplicity, fast transient response, simple implementation & higher accuracy in current tracking [41]. Figure. 3.2 shows the block diagram of hysteresis band current controller.

*i*

*

*Sa i*

*Sa i*

*

*Sb i*

*Sb*

*

*i*

*Sc i*

*Sc*

**+ **

**- **

**+ **

**- **

**+ **

**- **

S

*a*

S

*a*

S

*b*

S

*b*

S

*c*

S

*c*

HBCC

** Figure. 3. 2 **

Hysteresis Band Current Controller

Page | 54

For generation of the gate signal, the reference source current is compared with actual source current and the error signal is passed through a fixed hysteresis band. The required gating signal are produced using the following switching law (for phase ‘a’):

If 𝑖

𝑆𝑎

> (𝑖

∗

𝑆𝑎

+ 𝐻𝐵)

The Upper switch of the i th leg is OFF and lower switch is

ON.

If 𝑖

𝑆𝑎

< (𝑖

∗

𝑆𝑎

− 𝐻𝐵)

The Upper switch of the i th leg is ON and the lower switch is

OFF.

If the error signal exceeds the upper limit of the hysteresis band, the upper switch of the

VSI for phase ‘a’ is turned OFF and the lower switch is turned ON, so that the actual current is reduced and it comes into the hysteresis band and starts to track the reference source current. While if the error signal crosses the lower limit of the hysteresis band, the lower switch of the VSI for phase ‘a’ is turned OFF and the upper switch is turned ON, so that the actual current is increased and it comes back into the hysteresis band and starts to track the reference source current. Hence by following the switching the law, the

Hysteresis band current controller (HBCC) forces the actual source current to track the reference current within the hysteresis band. Figure. 3.3 shows the turn ON and turn OFF gate pulses to drive the VSI of the SAPF.

Reference Source

Current

Lower Hysteresis

Band

Upper Hysteresis

Band

Actual Source

Current

0

π

HB

*t*

Gate Pulse

**Figure. 3. 3 **

Switching Pattern using HBCC

Page | 55

**3.3**

**Adaptive hysteresis band Current Controller **

In Hysteresis band current control (HBCC), it has a fixed hysteresis band due which the switching frequency are not constant, are uneven in nature. Due to these uneven switching frequency acoustic noise is produced, losses are also more and difficulty in designing input filters.

To overcome these drawbacks of HBCC with fixed hysteresis band, Adaptive

Hysteresis Band Current Controller (AHCC) shown in Figure. 3.4 has been adopted for three phase shunt active power filter. AHCC was first proposed by B.K Bose for PWM inverter in machine drive [42]. In Adaptive Hysteresis Band Current Control technique it

*i*

*

*Sa v*

*Sa v dc*

Adaptive hysteresis Band

Calculation

HB

*

*i*

*Sa*

*S a*

**+ **

**- **

*i*

*Sa*

Relay

*S a*

AHCC

**Figure. 3. 4 **

Adaptive Hysteresis Band Current Controller

*i*

*Sa i*

*Sa*

HB

*i*

*

*Sa*

*t*

Gate pluse

*t*

1

*t*

2

**Figure. 3. 5 **

Switching Pattern using AHCC

Page | 56

adaptively changes the hysteresis band according to system parameters such as reference source current, source voltage, switching frequency & dc capacitor voltage, so that the switching frequency is maintained almost constant.

The current waveform and gate pulse for phase ‘a’ is shown in Figure. 3.5, here

𝑖

∗

𝑆𝑎 is the desired reference source current and 𝑖

𝑆𝑎

is the actual source current. When the source current tries to leave the hysteresis band appropriate switch is turned ON or OFF to force the ramping of the current within the hysteresis band. The following equations can be written in the respective switching intervals 𝑡

1 and 𝑡

2 from Figure. 3.5. 𝑑𝑖

+

𝑆𝑎 𝑑𝑡

=

1

𝐿

𝐹

(0.5𝑣 𝑑𝑐

+ 𝑉 𝑠

) (3.1) 𝑑𝑖

−

𝑆𝑎 𝑑𝑡

1

= −

𝐿

𝐹

(0.5𝑣 𝑑𝑐

+ 𝑉 𝑠

) (3.2)

Where,

𝐿

𝐹

is the filter inductor, 𝑖

+

𝑆𝑎 and 𝑖

−

𝑆𝑎 are the respective rising and falling current segments. From the geometry of Figure. 3.5 we get the following equations: 𝑑𝑖

+

𝑆𝑎 𝑑𝑡 𝑡

1

− 𝑑𝑖

∗

𝑆𝑎 𝑑𝑡 𝑡

1

= 2𝐻𝐵 (3.3) 𝑑𝑖

−

𝑆𝑎 𝑑𝑡 𝑡

2

− 𝑑𝑖

∗

𝑆𝑎 𝑑𝑡 𝑡

2

= −2𝐻𝐵 (3.4) 𝑡

1

+ 𝑡

2

= 𝑇 𝑐

=

1

(3.5) 𝑓 𝑐

Where, 𝑓 𝑐 is the switching frequency and

𝑖

∗

𝑆𝑎

is the desired reference source current.

Adding (3.3) & (3.4) and substituting in (3.5), we will get 𝑡

1 𝑑𝑖

+

𝑆𝑎 𝑑𝑡

− 𝑡

2 𝑑𝑖

−

𝑆𝑎 𝑑𝑡

1

− 𝑓 𝑐 𝑑𝑖

∗

𝑆𝑎 𝑑𝑡

= 0 (3.6)

Subtracting (3.3) from (3.4), we get

4𝐻𝐵 = 𝑡

1 𝑑𝑖

+

𝑆𝑎 𝑑𝑡

− 𝑡

2 𝑑𝑖

−

𝑆𝑎 𝑑𝑡

− (𝑡

1

− 𝑡

2

) 𝑑𝑖

∗ 𝑠𝑎

(3.7) 𝑑𝑡

Substituting (3.1) & (3.2) in (3.6), we get

(𝑡

2

− 𝑡

1

) = −

2𝐿

𝐹 𝑣 𝑑𝑐 𝑓 𝑐

( 𝑣

𝑆𝑎

𝐿

𝐹

+ 𝑑𝑖

+

𝑆𝑎

) (3.8) 𝑑𝑡

Substituting (3.1) & (3.2) in (3.7), we get

Page | 57

4𝐻𝐵 =

0.5 𝑣 𝑑𝑐 𝑓 𝑐

𝐿

𝐹

− (𝑡

1

− 𝑡

2

) ( 𝑣

𝐿

𝑆𝑎

𝐹

+ 𝑑𝑖

∗

𝑆𝑎

) (3.9) 𝑑𝑡

Substituting (3.8) in (3.9) and simplifying, we get

𝐻𝐵 =

0.125𝑣 𝑑𝑐

[1 − 𝑓 𝑐

𝐿

𝐹

4𝐿

2 𝑣

2 𝑑𝑐

( 𝑣

𝑆𝑎

𝐿

𝐹

+ 𝑚

2

)

2

] (3.10)

Where,

𝑚 = 𝑑𝑖

∗

𝑆𝑎

⁄ 𝑑𝑡

is the slope of desired reference source current. Hysteresis band

(HB) calculated in (3.10) is modulated at different points of fundamental frequency cycle to maintain the switching frequency of the inverter constant [63]. Figure. 3.6 shows the complete block diagram to calculate the Hysteresis band. The required gating signal are produced using same switching law as used in HCC which are given below:

If 𝑖

𝑆𝑎

> (𝑖

∗

𝑆𝑎

+ 𝐻𝐵)

The Upper switch of the i th leg is OFF and lower switch is

ON.

If 𝑖

𝑆𝑎

< (𝑖

∗

𝑆𝑎

− 𝐻𝐵)

The Upper switch of the i th leg is ON and the lower switch is

OFF.

Here ‘

*HB*

’ is the adaptive hysteresis band calculate using the system parameters.

*i*

*

*Sa du dt v*

*Sa*

1

*L*

*F*

2

*L*

*F*

1 u

*u*

2

1

HB

*v dc*

1

8*

*f c*

*

*L*

*F*

**3.4**

**Figure. 3. 6 **

Block Diagram to calculate Adaptive hysteresis band

**Weighted Adaptive Hysteresis Band Current Controller **

Conventionally fixed hysteresis band (HB) were used in current controllers, but fixed hysteresis band results in uneven switching frequency that causes acoustic noise, losses and difficulty in designing input filters. So it is necessary to optimally vary the HB to overcome these drawbacks. If we increase the HB, switching frequency VSI decreases,

Page | 58

hence the switching losses are reduced, but poor compensation with higher THD is obtained. Similarly by decreasing HB, switching frequency increases which results in better compensation with lower THD, but switching losses increases. So to calculate the optimal HB we should take into account THD, switching frequency and switching losses.

We proposed a new Weighted Adaptive Hysteresis Band Current Controller

(WAHBCC) as shown in Figure. 3.7, where the HB is calculated optimally such that we get better and efficient compensation with lower THD and reduced losses [79]. In

WAHBCC we calculate three HB components based on source current THD, switching frequency and switching losses. These HB components are then multiplied with their respective Weighting Factor (WF). WF are selected according to the objective or priority.

As our main priority is to reduce the source current THD, HB component corresponding to source current THD has the highest WF. While the switching losses in our case is very

HB Based on

Source Current

THD

HB Based on

Switching

Frequency

HB Based on

Switching

Losses

WF

1

WF

1

WF

1

HB

1

HB

2

HB

3

*i*

***

*Sa*

*i*

*Sa*

HB

HB Calculator

*S a*

*S a*

**Figure. 3. 7 **

Block Diagram of WAHBCC low, so HB component corresponding to switching losses has lowest WF. The three HB components after multiplication with their respective WF are added to get the optimal HB of WAHBCC.

A brief description on how to obtain the three HB components of WAHBCC is discussed below:

**3.4.1**

**HB based on Source Current THD **

The average source current THD of the three phases is calculated and it is then compared with the Minimum Adaptive THD Reference (MAR) to get the THD error. MAR is

Page | 59

calculated by finding the minimum between average source current THD, previous value of MAR and 5% THD. As it is not easy to derive a relation between THD error and HB, we have used Fuzzy Logic Controller (FLC) to map a relation between THD error and HB

[80]. The FLC has one input and one output and for the both we have used triangular membership function with three fuzzy sets as [A B C]. The membership function for both input and output of FLC are show in Figure. 3.9 (a) & (b). The fuzzy rules are based on the assumption that when THD error is small, HB should be high to reduce the losses, while

*i*

*Sa i*

*Sa i*

*Sa*

Average

THD

Fuzzy Logic

Controller

WF

1

HB

1

*z*

1

Minimum

Adaptive THD

Reference

5

A

B

**Figure. 3. 8 **

Block Diagram to compute

HB

1

C

A

B

C

0

20

40

THD Error

0.3

.55

.80

**(a) (b) **

**Figure. 3. 9 **

Membership function of

**(a)**

THD error

,

**(b)**

HB

1

HB

1 for higher THD error, HB should be lower show that source current THD is reduced to an acceptable value at a faster rate. The fuzzy If –Then are shown in Table 3.1. The output of

FLC is then multiplied with

WF

1

to obtain HB component based on source current THD

(

HB

1

)

.

In our case we have chosen

WF

1

as 0.5. A complete block diagram to obtain

HB

1 is shown in Figure. 3.8.

**Table 3. 1 **

Fuzzy If-Then Rules for THD error

A B C

**THD Error**

𝐇𝐁

𝟏

C B A

Page | 60

**3.4.2**

**HB Based on Switching Frequency **

As discussed earlier the AHCC proposed by B.K Bose in [42], where the hysteresis band is calculated according to system parameters such as reference current, source voltage & dc capacitor voltage, such that the switching frequency is maintained nearly constant. The calculation of the hysteresis band is done as proposed by B.K Bose as given in (3.10) and then it is multiplied by

WF

2

to obtain

HB

2

as given in (3.11).

HB

2

Corresponds for maintaining switching frequency constant. In our case we have chosen

WF

2

as 0.3. Block diagram to obtain

HB

2

is shown in Figure. 3.10 (a).

HB

2

=

0.125𝑣 𝑑𝑐

[1 − 𝑓 𝑐

𝐿

4𝐿

2 𝑣

2 𝑑𝑐

( 𝑣 𝑠𝑎

𝐿

+ 𝑚

2

)

2

] [WF

2

] (3.11)

Where, 𝑚 = 𝑑𝑖

∗ 𝑎

⁄ 𝑑𝑡

is the slope of desired reference source current waveform, 𝑓 𝑐 is the switching frequency and

𝐿 is the filter inductance.

**3.4.3**

**HB based on Switching Loss **

The loss component of the current

𝐼 𝑑𝑐

which is obtained after bus voltage error is processed though voltage controller, can be considered as proportional to the losses corresponding to switching losses. We have used FLC to map a relation between switching losses and HB as it is difficult to derive a relation between the two. FLC has single input and single output and for both we have used triangular membership function with three fuzzy sets as [A B C]. The membership function for input & output are shown in Figure.

*i*

*

*Sa v*

*Sa v dc*

Hysteresis Band

Calculation

WF

2

HB

2

Switch Loss

Fuzzy Logic

Controller

**(a) (b) **

**Figure. 3.10 **

Block Diagram to compute (a)

HB

2

, (b)

HB

3

WF

3

HB

3

A

B

C

A B C

0

5

**(a) **

10

Switch Loss

0.3

.55

**(b) **

.80

HB

1

**Figure. 3. 11**

Membership function of (a) Switch Loss (b)

HB

3

Page | 61

3.11 (a) & (b). Fuzzy If –Then are shown in Table 3.2 which is based assumption that when loss is small, HB should be small to have lower THD, while for higher switching loss HB should be high to reduce the losses. The block diagram to obtain

HB

3

is shown in

Figure. 3.10. In our case we have used

WF

3 as 0.2.

**Table 3. 2 **

Fuzzy If-Then Rules for Switching Loss

**THD error**

𝐇𝐁

𝟏

A B C

A B C

**3.5**

**Simulation Study **

To analyze the performance of the current control techniques for generating the gate signals for the three phase shunt active power filter, we have used MATLAB / SIMULINK to develop various simulation models under sinusoidal source voltage, non- sinusoidal source voltage & un-balanced load conditions

. For simulation study we have considered a diode based rectifier with a series RL load in the DC side, as the non-linear load. All the system parameters for simulation study are presented in Table 3.3. For simplification, only phase ‘a’ responses are shown . To investigate the performance of the current controllers we have shown waveforms of source current, filter current, dc capacitor voltage, FFT analysis of source current and switching frequency after compensation.

**Table 3. 3 **

System Parameters for Simulation Study

**System Parameters **

Source voltage ( v s

)

System frequency ( f

)

Source impedance (

R s

, L s

)

Filter impedance (

R c

, L c

)

Load impedance (

R

L

, L

L

)

DC link capacitance

(C

DC

)

Reference DC link voltage (

V

∗

DC

)

**Values **

100 V (peak)

50 Hz

0.1Ω;0.15 mH

0.4Ω;2.5 mH

40Ω;20 mH

2350 μF

230 V

**3.5.1**

**Sinusoidal Voltage condition **

For sinusoidal voltage condition an ideal three phase voltage source of constant amplitude as shown Figure. 3.12 (a). The uncompensated source current shown in Figure.

3.12 (b) and FFT analysis of source current shows, THD is 30.74% [Figure. 3.12(c)].

Page | 62

5

0

-5

.300

5

0

-5

.300

250

200

150

5

100

0

0

-100

.300

.325

.350

Time in Sec

.375

.400

-5

.300

.325

.350

Time in Sec

.375

.400

**(a) **

**(b) (c) **

**Figure. 3.12**

Uncompensated Sinusoidal Source Voltage Condition

**(a)**

Source Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

5

0

5

0

5

0

20

15

10

5

.325

.350

Time in Sec

**(i)**

.375

.325

.350

Time in Sec

**(ii)**

.375

.325

.350

Time in Sec

**(iii)**

.375

.325

.350

Time in Sec

**(iv) **

.375

.325

.350

Time in Sec

**(v) **

.375

.400

.400

.400

-5

0

-5

.300

5

0

-5

.300

250

200

150

.400

20

15

10

5

.400

.325

.350

Time in Sec

**(i)**

.375

.325

.350

Time in Sec

**(ii)**

.375

.325

.350

Time in Sec

**(iii)**

.375

.325

.350

Time in Sec

**(iv) **

.375

.325

.350

Time in Sec

**(v) **

.375

.400

.400

.400

.400

.400

20

15

10

5

5

0

-5

.300

250

200

150

5

0

-5

.300

.325

.350

Time in Sec

**(i)**

.375

.325

.350

Time in Sec

**(ii)**

.375

.325

.350

Time in Sec

**(iii)**

.375

.325

.350

Time in Sec

**(iv) **

.375

.325

.350

Time in Sec

**(v) **

.375

.400

.400

.400

.400

.400

**(vi) **

**(a) **

**(vi) **

**(b) **

**(vi) **

**(c) **

**Figure. 3.13**

(Sinusoidal Condition) After Compensation using

**(a)**

HBCC;

**(b)**

AHCC;

**(c)**

WAHBCC

**(**

*(i) *

*Load current;*

* (ii)*

* Source current; *

*(iii)*

* Filter Current; *

*(iv)*

* Capacitor Voltage; *

*(v)*

*Switching Frequency; *

*(vi) *

*FFT analysis*

**)**

Figure. 3.13 shows the results obtained after compensation using HBCC, AHCC &

WAHBCC for sinusoidal voltage condition. In case of HBCC, the source current after compensation becomes sinusoidal [Figure. 3.13 (a)(i)] with a THD of 1.89% [Figure 3.13

Page | 63

(a)(i)]. In Figure 3.13 (a)(v) switching frequency vs time graph is shown, from which it can be observed that there is wide range of variation in the switching frequency in case of HBCC as a result the losses are more. By using AHCC the variation in the switching frequency [Figure. 3.13 (b)(v)] is drastically reduced and at the same time it reduces the

THD to 1.64%. While by using WAHBCC we get much better compensating results

[Figure. 3.13 (c)(i)], where THD of the source current follows the minimum adaptive

THD reference as shown in Figure. 2.14 and finally it is reduced to 1.41% while minimizing the variation in the switching frequency and hence minimizing the losses

[Figure. 3.13 (c)(v)].

8

7

6

5

4

3

2

1

0

Minimum Adaptive Source

Current THD Reference

Actual Source Current THD

0.05

0.10

0.15

Time in Sec

**Figure. 3.14 **

Source current THD Curve after compensation using WAHBCC

**3.5.2**

**Non-Sinusoidal Voltage condition **

For non-sinusoidal voltage condition a programmed voltage source of constant amplitude with some distortion is considered which is shown in Figure. 3.15 (a). The

5

100

50

0

-50

-100

.300

0

.325

.350

Time in Sec

(a)

.375

.400

-5

.300

.325

.350

Time in Sec

(b)

.375

.400

(c)

**Figure. 3.15**

Uncompensated Non-Sinusoidal Source Voltage Condition

**(a)**

Source

Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current uncompensated source current is shown in Figure. 3.15 (b) and FFT analysis of the source current shows that the THD is 31.09% [Figure. 3.15 (c)].

Figure. 3.16 shows the results obtained after compensation using HBCC, AHCC &

WAHBCC for non-sinusoidal voltage condition. In case of HBCC, the source current after compensation have some ripple content in it as shown in Figure 3.16 (a)(i) with a THD of

Page | 64

2.82% [Figure. 3.16 (a)(vi)]. From the switching frequency vs time graph shown in Figure.

3.16 (a)(v), it can be observed that there is higher range of variation in the switching frequency, in case of HBCC as a result the losses are more. By using AHCC the variation in the switching frequency [Figure. 3.16 (b)(v)] is comparatively reduced and in the same time THD of the source current is also reduced to 2.44% [Figure. 3.16 (b)(vi)].

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5

5 5

5

5

5

5

5

0

0

0 0

5 5

0 0

0

0

0

0

5

0

0

0

5

0

5

0

0

0

0

0

0

0

0 0

0

-5

.300

0

-5

.300

5

5

.325

.325

.325

.325

.325

.350

Time in Sec

(a)

**(i)**

.350

(a)

Time in Sec

(a)

(a)

.375

.375

.400

.400

0

.300

0

-5

.300

5

5

5

5

5

.325

.325

.325

Time in Sec

Time in Sec

.350

Time in Sec

(g)

.350

(g)

(g)

(g)

.350

.350

.375

.400

0

.400

.400

0

5

-5

.300

5

5

5

5

.325

.325

.325

.325

.350

Time in Sec

(l)

Time in Sec

Time in Sec

(l)

.350

.350

(l)

(l)

.375

5

5

5

5

5

5

5

0

0

0

0

0

-5

-5

-5

-5

0

-5

.300

.300

5

0

0

-5

.300

.325

.325

.325

.350

.350

.350

(b)

Time in Sec

Time in Sec

(b)

.350

.375

.375

.375

.375

.375

5

0

0 0

5

0

0

-5

-5

-5

-5

0

-5

.300

-5

-5

.400

.300

.300

0

-5

.325

.325

.325

.350

.350

.350

.350

.375

.375

.375

.375

.375

.375

.400

5

0

.400

.400

.400

0

.400

.400

.400

.400

.300

.300

-5

-5

-5

.300

.300

.300

5

0

0

0

0

.300

0

** (ii) (ii) (ii) **

5

5

5

5

5

0

-5

.300

5

5

0

0

-5

0

-5

.325

(b)

(b)

.400

.400

.400

-5

-5

.300

-5

-5 -5

-5

-5

-5

0

.300

-5

0

.325

.325

(h)

(h)

5

5

5

0

5

5 5

5

0

0 0

0

5

0

.325

.325

.325

.325

(m)

.350

.350

.350

Time in Sec

(m)

Time in Sec

(m)

(m)

.375

0

0

0

0

0

0

-5

-5

-5

.300

-5

-5

.300

-5

250

250

250

250

250

200

200

.300

200

.300

.325

.325

.325

.325

250

200

150

.325

.350

.350

.350

.350

.375

.375

.375

.375

Time in Sec

(c)

(c)

(c)

(c)

.375

.400

0

.400

.400

.400

.400

-5

0

0

0

0

0

.400

0

0

.300

-5

-5 -5

-5

-5

.300

.300

250

200

.300

250

250

250

-5

.300

200

200

200

200

200

150

.325

.325

.325

.325

.325

.350

(i)

(i)

Time in Sec

.350

Time in Sec

(i)

(i)

(i)

.375

.375

.375

.375

.375

.400

0

.300

-5

0

.400

.400

-5

.400

.300

.400

-5

-5

-5

-5

-5

.300

.300

250

200

250

250

200

200

200

150

.325

.325

.325

.325

(n)

.350

.350

.350

Time in Sec

(n)

(n)

150

150

150

150

150

100

.300

.325

.350

.375

150

150

150

150 100

.300

.325

.350

.375

150

150

100

.300

.325

.350

15

15

15

10

10

10

5

5

5

5

100

.300

15

15

15

10

10

10

5

15

10

5

0

.300

.325

.325

.325

.325

.325

Time in Sec

.350

.375

5

.325

.325

.325

.325

Time in Sec

.350

(g)

Time in Sec

Time in Sec

(g)

.350

.375

.375

.375

.400

.400

.400

.375

5

,400

5

5

5

5 0

.300

.325

.325

.325

Time in Sec

.350

.350

.350

Time in Sec

** (iv) (iv) (iv) **

.325

.350

.350

.350

(d)

.375

.375

.375

.400

.400

.400

.400

.400

15

10

100

.300

15

15

5

5

5

5

5

5

100

.300

10

10

10

10

5

15

10

5

15

10

100

.300

15

15

15

15 10

10

10

10

10

10

5

5

.325

.350

0

.300

0

.300

.375

.400

.375

.375

.375

.375

.375

.400

.375

.375

.375

.375

.400

.375

.375

.375

.400

.375

.325

.325

.325

.325

.350

Time in Sec

(e)

(e)

.350

(e)

.375

.375

.375

.375

.400

.400

.400

.400

0

.400

.325

.325

.325

.325

.325

.350

Time in Sec

(j)

.350

.350

Time in Sec

Time in Sec

(j)

(j)

.375

.375

.375

.375

,400

,400

,400

0

.300

0

.300

0

.300

.325

.325

.325

.325

.350

Time in Sec

.350

.350

.350

(p)

Time in Sec

(p)

(p)

.375

.375

.375

.375

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

.400

(k)

(q)

(f)

(f)

(f)

(f)

(f)

(f)

(f)

(k)

(k)

(k)

(k)

(k)

(q)

(q)

(q)

(q)

(q)

(q)

(q)

**Figure. 3.16**

(Non-Sinusoidal Condition) After Compensation using

**(a)**

HBCC;

**(b)**

AHCC;

**(c)**

WAHBCC

*(i) *

*Load current;*

* (ii)*

* Source current; *

*(iii)*

* Filter Current; *

*(iv)*

* Capacitor Voltage *

*(v)*

*Switching Frequency; *

*(vi) *

*FFT analysis*

But the best result are obtained using WAHBCC, with lesser ripple content in source current [Figure. 3.16 (c)(i)], where THD of the source is reduced to 2.19% [Figure. 3.16

(c)(vi)], while reducing the variation in the switching frequency as shown in Figure. 3.16

(c)(v), hence minimizing the losses.

Page | 65

**3.5.3**

**Unbalanced load condition**

For unbalanced load condition, we have used three different RL loads which are connected in parallel to the diode rectifier based RL load. The uncompensated source current is shown in Figure. 3.17 (b) and FFT analysis of the source current shows [Figure.

3.17 (c)] that the THD is 32.13%.

100

5

0

0

-100

.300

.325

.350

Time in Sec

.375

**(a) **

.400

-5

.300

.325

.350

Time in Sec

**(b) **

.375

.400

**(c) **

**Figure. 3.17 **

Uncompensated Unbalanced Load Condition

**(a)**

Source Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

5

0

-5

.300

.325

.350

Time in Sec

**(i)**

.375

.400

**(a) **

** (ii) **

5

0

-5

.300

.325

.350

Time in Sec

**(i)**

.375

.400

** (ii) **

**(b) **

5

0

-5

.300

.325

.350

Time in Sec

**(i)**

.375

.400

** (ii) **

**(c) **

**Figure. 3.18**

(Unbalanced Condition) After Compensation using

**(a)**

HBCC;

**(b)**

AHCC;

**(c)**

WAHBCC

*(i) *

*Source current; *

*(ii) *

*FFT analysis*

Page | 66

Figure. 3.18 shows the results obtained after compensation using HBCC, AHCC &

WAHBCC for unbalanced load condition. The ripple content are little higher in case of

**Figure. 3.19**

THD of source current using HBCC; AHCC & WAHBCC

1.5

1

0.5

0

-0.5

.300

.325

.350

Time in Sec

**(a) **

.375

.400

1.5

1

0.5

0

-0.5

.300

.325

.350

Time in Sec

**(b) **

.375

.400

1.5

1

0.5

0

-0.5

.300

.325

.350

Time in Sec

.375

**(c) **

**Figure. 3.20**

Switching pulse

**(a)**

HBCC;

**(b)**

AHCC;

**(c)**

WAHBCC

.400

HBCC with the THD of 3.03% of the source current [Figure. 3.18 (a) (ii)]. The three phase

Page | 67

source current is slightly unbalanced as shown in Figure. 3.18 (a)(i). In AHCC the THD is reduced to 2.74% with almost balanced three phase source current. Better results are obtained using WAHBCC with almost balanced three phase source current and slightly reduced THD of 2.59 % [Figure. 3.18 (c) (i) & (ii)].

Figure. 3.19 shows the bar graph of the source current THD obtained using HBCC,

AHCC and WAHBCC under sinusoidal source voltage, non- sinusoidal source voltage & un-balanced load conditions. It can be concluded that WAHBCC reduces the THD to a lowest value even under sinusoidal source voltage, non- sinusoidal source voltage & unbalanced load conditions. Figure. 3.20 shows the switching pulses obtained using

HBCC,

AHCC and WAHBC. In HBCC the switching pulses are not uniform and hence the switching frequency vary over a wide range

[Figure. 3.19 (a)]

. While there is a considerable uniformity in the switching pulses and hence less variation in the switching frequency

[Figure. 3.20 (b)]

. With WAHBCC we get better results, with minimum variation in switching frequency

[Figure. 3.20 (c)]

.

**3.6**

**Chapter Summary **

In this chapter various current control techniques such as the hysteresis band current control (HBCC), adaptive hysteresis band current control (AHCC) & the proposed weighted adaptive hysteresis band current control (WAHCC) has been developed to generate the required gate pulse for SAPF, so as get proper filtering action.

The three current controllers were successfully implemented using

*MATLAB/SIMULINK*

and the simulation results shows that WAHBCC provides better compensation than HBCC and AHCC, by reducing the source current THD to minimum value below the IEEE standards, under varying operating condition, while maintain the switching frequency constant and hence reducing the losses.

The current controllers developed in this chapter are effective in maintaining the switching frequency constant and reducing the THD and losses, but there is no guarantee of the stability of the closed-current-loop of SAPF. So in the next chapter we proposed a new stable current controller, based on Lyapunov’s stability theorem.

Page | 68

**4.1**

**Introduction **

In the previous chapter we discussed various current control techniques for generating the gate signal, where the objective while designing the controllers were to have fixed switching frequency, lower THD and reduced losses. Although these controllers were effective in maintaining the switching frequency constant and reducing the THD and losses, but there is no guarantee of the stability of the closed-current-loop of

SAPF. In this chapter we aim to design a stable current controller for generating the gate signal.

There are various control techniques which have designed in order to maintain the stability of the active filters such as linear feedback control [81], nonlinear control [82], repetitive control [83], adaptive control [84, 85]. These control strategies have a common drawback concerning the global stability of the closed-loop system. Sliding-mode controller proposed in [86] somewhat solved the stability problem, but it is too complicated. Digital repetitive control approach proposed in [87] increased the gain of the current loop, but based on linearized model of active filter and does not guarantee global stability. Deadbeat current control in [88] designed for single-phase active filters, provides a faster current control response due to the deadbeat nature, but system parameter dependency is one of its drawback. The need to predict the reference source current further complicates the technique. Some papers modeled the state-space equations of active filters to analyze the stability. In [46], authors propose a new current control technique based on

Lyapunov’s stability, for single phase active filters to improve the stability. In [89] the authors successfully developed similar current control technique by using an energy based

Lyapunov function to improve the stability of three-phase shunt hybrid filter.

In this paper, we have adopted a similar current control technique using Lyapunov’s stability criteria to guarantee global stability for three phase Shunt Active Power Filter

(SAPF). Using the state-space equations of the three phase SAPF and Lyapunov’s stability criteria, globally stable switching functions for the three phase are calculated. Various

Page | 70

simulation results using MATLAB/SIMULINK are presented to verify the effectiveness of the proposed Lyapunov function based current controller for three phase SAPF.

**4.2**

**Lyapunov Stability **

Lyapunov’s direct method of stability was first introduced by Russian mathematician

A.M. Lyapunov in the late 19 th

century. In Lyapunov direct method, the stability properties of system is determined by constructing a scalar “energy-like” function for the system and examining the function’s time variation [90]. According to Lyapunov’s stability theorem, a nonlinear system is globally asymmetrically stable if the Lyapunov function

𝑉(𝑥)

satisfies the following properties [45, 46, 89].

𝑉(𝑥) =

𝑉(0) = 0

𝑉(𝑥) > 0, 𝑓𝑜𝑟 𝑎𝑙𝑙 𝑥 ≠ 0

𝑉̇(𝑥) < 0, 𝑓𝑜𝑟 𝑎𝑙𝑙 𝑥 ≠ 0

{ 𝑉(𝑥) → ∞, 𝑎𝑠 ‖𝑥‖ → ∞ (4.1)

**4.3**

**Modelling of three phase Shunt Active Power Filter **

The three phase shunt active power is shown in Figure. 4.1. The non-linear load consists of diode rectifier based RL Load. By using the Kirchhoff’s voltage and current law for the three phase shunt active power, the following differential equations for the three phases can be developed: 𝑣 𝑣 𝑣 𝑐 𝑎 𝑏 𝑑𝑡

= 𝐿

𝐹𝑎 𝑑𝑖

𝐹𝑎 𝑑𝑡

+ 𝑅

𝐹𝑎 𝑖

𝐹𝑎

+ 𝑉 𝑎𝑚

+ 𝑉 𝑚𝑛

= 𝐿

𝐹𝑏

= 𝐿

𝐹𝑐 𝑑𝑖 𝑑𝑡

𝐹𝑏 𝑑𝑡 𝑑𝑖

𝐹𝑐

+ 𝑅

𝐹𝑏 𝑖

𝐹𝑏

+ 𝑅

𝐹𝑐 𝑖

𝐹𝑐

+ 𝑉 𝑏𝑚

+ 𝑉 𝑐𝑚

+ 𝑉

+ 𝑉 𝑚𝑛 𝑚𝑛

(4.2) 𝑑𝑣 𝑑𝑐

=

𝐶

1 𝑑𝑐

(𝑖 𝑑𝑐

) (4.3)

Assuming that the three phase ac supply voltages are balanced i.e.

(𝑣 𝑎

+ 𝑣 𝑏

+ 𝑣 𝑐

= 0)

, eq.

(4.4) can be derived using eq. (4.2).

𝑉 𝑚𝑛

= −

1

3

(𝑉 𝑎𝑚

+ 𝑉 𝑏𝑚

+ 𝑉 𝑐𝑚

) (4.4)

The k th

dynamic equation for SAPF is given as 𝑑𝑖

𝐹

𝐾 𝑑𝑡

= −

𝑅

𝐹𝑘

𝐿

𝐹𝑘 𝑖

𝐹

𝐾

−

1

𝐿

𝐹𝑘

(𝑆

𝐾

−

1

3

(T a

+ T b

+ T c

)) 𝑣 𝑑𝑐

1

+

𝐿

𝐹𝑘

(4.5)

Page | 71

Where

𝑆

𝐾 is the switching function of the

𝐾 𝑡ℎ leg of the converter (for k= a, b, c) is defined as

𝑆

𝐾

= {

1 if T

K

0 if T

K

̅

K

̅

K is off

is on

*v a*

A

Three Phase

Voltage Source

A

*i*

*Sa*

B

*i*

*Sb*

C

*i*

*Sc n*

*L*

*Sa*

*L*

*Sb*

*L*

*Sc*

*R*

*Sa*

*R*

*Sb*

*R*

*Sc v c v b i i i*

*La*

*Lb*

*Lc*

B

C

Non-Linear Load

T a

T b

T c

*i*

*Fc i*

*Fb i*

*Fa*

A

C dc

B

T a

T b

C

T c

*v cm v bm v am m*

SAPF

**Figure 4. 1 **

Three Phase Shunt Active Power Filter

Therefore,

𝑉 𝑘𝑚

= 𝑆

𝐾 𝑣 𝑑𝑐

(4.6)

Then the Switching state function is defined as 𝑑 𝑛𝑘

= (𝑆

𝐾

−

1

3

(T a

+ T b

+ T c

) ) (4.7)

Using the eight possible switching states of Shunt active power, the conversion from [

𝑆

𝐾

] to [ 𝑑 𝑛𝑘

] is given in the matrix form as 𝑑 𝑛𝑎

[ 𝑑 𝑛𝑏

] = 𝑑 𝑛𝑣

1

3

[

2

−1

−1 −1

2

−1 −1

−1

] [

2

T a

T b

] (4.8)

T c

In order to reduce the complexities, differential equations of the three-phase system are transformed into a two-phase synchronous orthogonal rotating reference frame using the

Page | 72

Park’s transformation. The resulting transformed model in the synchronous orthogonal d-q co-ordinates is given as:

𝐿

𝐹 𝑑𝑖 𝑑 𝑑𝑡

= −𝑅

𝐹 𝑖 𝑑

+ 𝐿

𝐹 𝜔𝑖 𝑞

− 𝑣 𝑑𝑐 𝑑 𝑑

+ 𝑉 𝑑

𝐿

𝐹 𝑑𝑖 𝑞 𝑑𝑡

= −𝑅

𝐹 𝑖 𝑞

+ 𝐿

𝐹 𝜔𝑖 𝑑

− 𝑣 𝑑𝑐 𝑑 𝑞

+ 𝑉 𝑞

𝐶 𝑑𝑐 𝑑𝑣 𝑑𝑐 𝑑𝑡

= 𝑑 𝑑 𝑖 𝑑

+ 𝑑 𝑞 𝑖 𝑞

(4.9)

Equation (4.9) can be simplified to obtain the switching function in the synchronous frame, which are given as: 𝑑 𝑑

=

1 𝑣 𝑑𝑐

(𝑉 𝑑

− 𝑅

𝐹 𝑖 𝑑

+ 𝐿

𝐹 𝜔𝑖 𝑞

− 𝐿

𝐹 𝑑𝑖 𝑑

) 𝑑𝑡 𝑑 𝑞

=

1 𝑣 𝑑𝑐

(𝑉 𝑞

− 𝑅

𝐹 𝑖 𝑞

+ 𝐿

𝐹 𝜔𝑖 𝑑

− 𝐿

𝐹 𝑑𝑖 𝑞

) (4.10) 𝑑𝑡

The switching state function 𝑑 𝑑

& 𝑑 𝑞 are divided into steady state switching function the global switching function, where 𝑑 𝑑0

& 𝑑 𝑞0 are the steady state switching function while

∆𝑑 𝑑

& ∆𝑑 𝑞 are the global switching function. 𝑑 𝑑

= 𝑑 𝑑0

+ ∆𝑑 𝑑 𝑑 𝑞

= 𝑑 𝑞0

+ ∆𝑑 𝑞

(4.11)

To obtain the steady state switching function the reference source current and reference dc capacitor voltage are replaced in eq. (4.10) 𝑑 𝑑0

=

1 𝑣 𝑑𝑐

∗

(𝑉 𝑑

− 𝑅

𝐹 𝑖 𝑑

∗

+ 𝐿

𝐹 𝜔𝑖 𝑞

∗

− 𝐿

𝐹 𝑑𝑖 𝑑

∗

) 𝑑𝑡 𝑑 𝑞0

=

1 𝑣 𝑑𝑐

∗

(𝑉 𝑞

Where, 𝑖

𝐹

∗

− 𝑅

= 𝑖 𝑠

∗

− 𝑖

𝐿

𝐹 𝑖 𝑞

∗

+ 𝐿

𝐹 𝜔𝑖 𝑑

∗

− 𝐿

𝐹 𝑑𝑖 𝑞

∗

) (4.12) 𝑑𝑡

To obtain the global switching function, the three differential equation of the SAPF in dq co-ordinates are developed (4.9). For these three differential equations we have used three state variables, which are: 𝑥

1

= 𝑖 𝑑

− 𝑖 𝑑

∗

𝑥

2

= 𝑖 𝑞

− 𝑖 𝑞

∗ 𝑥

3

= 𝑣 𝑑𝑐

− 𝑣 𝑑𝑐

∗

(4.13)

Page | 73

Where,

𝑥

1

, 𝑥

2

& 𝑥

3

are state variable of the system,

𝑖 𝑑

∗

& 𝑖 𝑞

∗ are the reference filter current components in d-q co-ordinates 𝑣 𝑑𝑐

∗

is the reference DC capacitor voltage. By using the equations in (4.13) in (4.9), the following relation are derived as given in (4.14),

(4.15) & (4.16).

For state variable 𝑥

1

,

𝐿

𝐹 𝑑(𝑖 𝑑

∗

+ 𝑥 𝑑𝑡

1

)

= −𝑅

𝐹

(𝑖 𝑑

∗

+ 𝑥

1

) + 𝐿

𝐹 𝜔(𝑖 𝑞

∗

+ 𝑥

2

) − 𝑑 𝑑

(𝑣 𝑑𝑐

∗

+ 𝑥

3

) + 𝑉 𝑑

𝐿

𝐹 𝑥̇

1

+ 𝐿

𝐹 𝑑𝑖 𝑑

∗ 𝑑𝑡

= −𝑅

𝐹 𝑖 𝑑

∗

− 𝑅

𝐹 𝑥

1

+ 𝐿

𝐹 𝜔𝑖 𝑞

∗

+ 𝐿

𝐹 𝜔𝑥

2

−(𝑑 𝑑0

+ ∆𝑑 𝑑

)(𝑣 𝑑𝑐

∗

+ 𝑥

3

) + 𝑉 𝑑

𝐿

𝐹 𝑥̇

1

+ 𝐿

𝐹 𝑑𝑖 𝑑

∗ 𝑑𝑡

− 𝐿

𝐹 𝜔𝑖 𝑞

∗

+ 𝑅

𝐹 𝑖 𝑑

∗

= −𝑅

𝐹 𝑥

1

+ 𝐿

𝐹 𝜔𝑥

2

− 𝑑 𝑑0

(𝑣 𝑑𝑐

∗

+ 𝑥

3

)

−∆𝑑 𝑑

(𝑉 𝑑𝑐

∗

+ 𝑥

3

) + 𝑉 𝑑

𝐿

𝐹 𝑥̇

1

= −𝑅

𝐹 𝑥

1

+ 𝐿

𝐹 𝜔𝑥

2

− 𝑑 𝑑0 𝑥

3

− ∆𝑑 𝑑

(𝑣 𝑑𝑐

∗

+ 𝑥

3

) (4.14)

For state variable

𝑥

2

,

𝐿

𝐹 𝑑(𝑖 𝑞

∗

+ 𝑥

2

) 𝑑𝑡

= −𝑅

𝐹

(𝑖 𝑞

∗

+ 𝑥

2

) − 𝐿

𝐹 𝜔(𝑖 𝑑

∗

+ 𝑥

1

) − 𝑑 𝑞

(𝑣 𝑑𝑐

∗

+ 𝑥

3

) + 𝑉 𝑑𝑞

𝐿

𝐹 𝑥̇

2

+ 𝐿

𝐹 𝑑𝑖 𝑞

∗ 𝑑𝑡

= −𝑅

𝐹 𝑖 𝑞

∗

− 𝑅

𝐹 𝑥

2

− 𝐿

𝐹 𝜔𝑖 𝑑

∗

+ 𝐿

𝐹 𝜔𝑥

1

− 𝑑 𝑞0

(𝑣 𝑑𝑐

∗

+ 𝑥

3

)

−∆𝑑 𝑞

(𝑣 𝑑𝑐

∗

+ 𝑥

3

) + 𝑉 𝑞

𝐿

𝐹 𝑥̇

2

= −𝑅

𝐹 𝑥

2

− 𝐿

𝐹 𝜔𝑥

1

− 𝑑 𝑞0 𝑥

3

− ∆𝑑 𝑞

(𝑉 𝑑𝑐

∗

+ 𝑥

3

) (4.15)

For state variable

𝑥

3

𝐶 𝑑𝑐 𝑑(𝑣 𝑑𝑐

∗ 𝑑𝑡

+ 𝑥

3

)

= 𝑑 𝑞

(+𝑥

2

) + 𝑑 𝑑

(𝑖 𝑑

∗

+ 𝑥

1

)

𝐶 𝑑𝑐 𝑥̇

3

+ 𝐶 𝑑𝑐 𝑑𝑉 𝑑𝑐

∗ 𝑑𝑡

= 𝑑 𝑞0

(𝑖 𝑞

∗

+ 𝑥

2

) + ∆𝑑 𝑞

(𝑖 𝑞

∗

+ 𝑥

2

)

+𝑑 𝑑0

(𝑖 𝑑

∗

+ 𝑥

1

) + ∆𝑑 𝑑

(𝑖 𝑑

∗

+ 𝑥

1

)

𝐶 𝑑𝑐 𝑥̇

3

= 𝑑 𝑞0 𝑥

2

+ 𝑑 𝑞0 𝑥

1

+ ∆𝑑 𝑞

(𝑖 𝑞

∗

+ 𝑥

2

) + ∆𝑑 𝑑

(𝑖 𝑑

∗

+ 𝑥

1

) (4.16)

**4.4**

**Control strategy using Lyapunov function **

A positive definite Lyapunov function is used which is defined as the storage energy of the SAPF, it is given as

Page | 74

𝑉(𝑥) =

1

2

𝐿

𝐹 𝑥

1

2

+

1

2

𝐿

𝐹 𝑥

2

2

+

1

2

𝐶 𝑑𝑐 𝑥

3

2

(4.17)

According to Lyapunov’s stability criteria, if the Lyapunov function satisfies eq. (4.1) then the nonlinear system is globally stable. To verify the global stability the time derivative of

𝑉(𝑥) should be negative. The time derivative of the Lyapunov function is given as

𝑉̇(𝑥) = 𝑥

1

𝐿

𝐹 𝑥̇

1

+ 𝑥

2

𝐿

𝐹 𝑥̇

2

+ 𝑥

3

𝐿

𝐹 𝑥̇

3

(4.18)

Putting eq. (4.14), (4.15) and (4.16) in eq. (4.18) we get

𝑉̇(𝑥) = −𝑅

𝐹 𝑥

1

+ 𝐿

𝐹 𝜔𝑥

2

− 𝑑 𝑑0 𝑥

3

− ∆𝑑 𝑑

(𝑣 𝑑𝑐

∗

+ 𝑥

3

)

−𝑅

𝐹 𝑥

2

− 𝐿

𝐹 𝜔𝑥

1

− 𝑑 𝑞0 𝑥

3

− ∆𝑑 𝑞

(𝑣 𝑑𝑐

∗

+ 𝑥

3

)

+𝑑 𝑞0 𝑥

2

+ 𝑑 𝑞0 𝑥

1

+ ∆𝑑 𝑞

(𝑖 𝑞

∗

+ 𝑥

2

) + ∆𝑑 𝑑

(𝑖 𝑑

∗

+ 𝑥

1

)

= −𝑅

𝐹

(𝑥

1

2

+ 𝑥

2

2

) − ∆𝑑 𝑑 𝑥

1 𝑣 𝑑𝑐

∗

− ∆𝑑 𝑑 𝑥

1 𝑥

3

− ∆𝑑 𝑞 𝑥

2 𝑣 𝑑𝑐

∗

+ ∆𝑑 𝑞

𝑥

3 𝑖 𝑑

∗

−∆𝑑 𝑞 𝑥

2 𝑥

3

+ ∆𝑑 𝑞 𝑥

2 𝑥

3

+ ∆𝑑 𝑑 𝑥

1 𝑥

3

+ ∆𝑑 𝑑 𝑥

3 𝑖 𝑞

∗

𝑉̇(𝑥) = −𝑅

𝐹

(𝑋

1

2

+ 𝑋

2

2

) − ∆𝑑 𝑑

(𝑋

1 𝑣 𝑑𝑐

∗

− 𝑋

3 𝑖 𝑑

∗

)

−∆𝑑 𝑞

(𝑋

2 𝑣 𝑑𝑐

∗

− 𝑋

3 𝑖 𝑞

∗

) (4.19)

So from eq. (4.19) it can be observed that the first term is –ve and

𝑉̇(𝑥)

along any

*v sa v sb v sc i*

*

*Sa i*

*

*La i*

*

*Sb i*

*

*Lb i*

*

*Sc i*

*

*LC i*

*Fa i*

*Fb i*

*Fc*

abc to d-q transform

*v d v q*

Carrier

Signal

*i*

*

*Fa i*

*

*Fb*

abc to d-q transform

*i d*

*

*i*

*

*q*

Eq. (10)

*v*

*

*dc v dc*

abc to d-q transform

PWM

*i*

*

*Fc*

abc to d-q transform

*i d i q*

Eq. (11)

**Figure 4. 2 **

Block diagram of the proposed Lyapunav function Based

Stable Current controller

Page | 75

trajectory becomes –ve only if the global switching function

(∆𝑑 𝑑

& ∆𝑑 𝑞

)

are chosen as:

∆𝑑 𝑑

∆𝑑 𝑞

= 𝛼(𝑥

3 𝑖 𝑑

∗

= 𝛽(𝑥

3 𝑖 𝑞

∗

− 𝑥

1 𝑣 𝑑𝑐

∗

) 𝛼 < 0

− 𝑥

2 𝑣 𝑑𝑐

∗

) 𝛽 < 0 (4.20)

Here

𝛼 & 𝛽

are the controller gains. It is important to choose a correct value of

𝛼 & 𝛽 to get fast response of the dynamics of the closed-loop system [8]. As the time derivative of the Lyapunov function is –ve it guarantees the globally stability of the closed-loop system even under large load variations.

The overall bock diagram of the control strategy is shown in Figure. 4.2.

**4.5**

**Simulation Study **

We have used MATLAB / SIMULINK to develop various simulation models to evaluate the performance of the proposed Lyapunov based stable current controller to generate the gate signals for the three phase shunt active power filter, under sinusoidal source voltage, non- sinusoidal source voltage, un-balanced load and transient load conditions

. For simulation study we have considered a diode based rectifier with a series

RL load in the DC side, as the non-linear load. All the system parameters for simulation study are presented in Table 4.1. For simplification only phase ‘a’ responses are shown

.

**Table 4.1 **

System Parameters for Simulation Study

**System Parameters **

Source voltage ( v s

)

System frequency ( f

)

Source impedance (

R s

, L s

)

Filter impedance (

R c

, L c

)

Load impedance (

R

L

, L

L

)

DC link capacitance

(C

DC

)

Reference DC link voltage (

V

∗

DC

)

**Values **

100 V (peak)

50 Hz

0.1Ω;0.15 mH

0.4Ω;2.5 mH

40Ω;20 mH

2350 μF

230 V

**4.5.1**

**Sinusoidal Voltage condition **

For sinusoidal voltage condition an ideal three phase voltage source of constant amplitude is used as shown in Figure. 4.3 (a). The uncompensated source current shown in

Page | 76

Figure. 4.3 (b) is nonlinear in nature due to the load current and FFT analysis of the source current shows that the THD is 30.74% [Figure. 3.11(c)].

5

0

-5

.300

250

200

150

100

.300

5

100

0

0

-100

.300

.325

.350

Time in Sec

.375

.400

-5

.300

.325

.350

Time in Sec

.375

.400

**(a) (b) **

**(c) **

**Figure. 4.3**

Uncompensated Sinu. Source Voltage Cond.

**(a)**

Source Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

5

5

0

0

-5

.300

.375

.400

.325

.350

Time in Sec

**(i)**

.325

.350

Time in Sec

**(i)**

.375

.400

5

0

-5

.300

.375

.400

5

0

-5

.300

.375

.400

.325

.350

Time in Sec

**(ii)**

.325

.350

Time in Sec

**(ii)**

.325

.350

Time in Sec

**(iii)**

.375

.325

.350

Time in Sec

**(iv) **

.375

.400

.400

250

200

150

5

0

-5

.300

.325

.350

Time in Sec

**(iii)**

.375

.325

.350

Time in Sec

**(iv) **

.375

.400

.400

**(v) **

**(a) **

**(iv) **

**(b) **

**Figure. 4.4 **

(Sinu. Condition) After Compensation using

**(a)**

WAHBCC;

**(b)**

Lyapunov

*(i) *

*Load current;*

* (ii)*

* Source current; *

*(iii)*

* Filter Current; *

*(iv)*

* Capacitor Voltage *

*(v)*

* FFT analysis *

Page | 77

Figure. 4.4 shows the results after compensation using WAHBCC and the proposed

Lyapunov Function based stable current controller for sinusoidal voltage condition. In case of WAHBCC based SAAPF, the source current after compensation becomes sinusoidal

[Figure. 4.4 (a)(i)] with a THD of 1.41% [Figure. 4.4 (a)(v)] by the injecting the required filter current [Figure. 4.4 (a)(iii)]. But by using the proposed Lyapunov Function based

Shunt active power filter, we get slightly better compensating results [Figure. 4.4 (b)(i)], where source current becomes sinusoidal with reduced THD of 1.28% [Figure. 4.4 (b)(v)] by the injecting the required filter current [Figure. 4.4 (a)(iii)], while maintaining the stability.

**4.5.2**

**Non-Sinusoidal Voltage condition **

For non-sinusoidal voltage condition a programmed voltage source of constant amplitude with some distortion is considered which is shown Figure. 4.5 (a). The uncompensated source current shown in Figure. 4.5 (b) and FFT analysis of the source current shows that the THD is 31.09% [Figure. 4.5(c)].

5

100

50

0

-50

0

-100

.300

.325

.350

Time in Sec

(a)

.375

.400

-5

.300

.325

.350

Time in Sec

(b)

.375

.400

(c)

**Figure. 4.5**

Uncompensated Non-Sinusoidal Source Voltage Condition

**(a)**

Source Voltage;

**(b)**

Source Current;

**(c)**

FFT analysis of Source Current

The results after compensation using WAHBCC and the proposed Lyapunov Function based stable current controller for non-sinusoidal voltage condition is presented in Figure.

4.6. WAHBCC based SAPF, provides effective compensation by making the source current sinusoidal with very little harmonic content as shown in Figure. 4.6 (a)(i) and reduces the THD of the compensated source current to 2.19% [Figure. 4.6 (a)(v)] which is well below the IEEE 519 standard, by injecting the required filter current at PCC [Figure.

4.6 (a)(iii)]. But WAHBCC does not account for stability of the closed loop system.

The Lyapunov Function based stable current controller generates the switching functions for the three phase shunt active power filter by satisfying the Lyapunov’s stability theorem. Using these switch function the VSI generates the required filter current

[Figure. 4.6 (b)(iii)] which are then injected at PCC make the source current sinusoidal

Page | 78

5

0

-5

.300

250

200

150

100

.300

5

0

-5

.300

[Figure. 4.6 (b)(i)]. The source current THD after compensation is slightly reduced to

2.06% as shown in Figure. 4.6 (b)(v).

5

5

0

0

-5

.300

.400

.325

.350

Time in Sec

**(i)**

.375

.325

.350

Time in Sec

**(ii)**

.375

.325

.350

Time in Sec

**(iii)**

.375

.325

.350

Time in Sec

**(iv) **

.375

.400

-5

.300

.400

.400

.400

250

200

150

100

.300

5

0

-5

.300

5

0

-5

.300

.325

.350

Time in Sec

**(i)**

.375

.325

.350

Time in Sec

**(ii)**

.375

.325

.350

Time in Sec

**(iii)**

.375

.325

.350

Time in Sec

**(iv) **

.375

.400

.400

.400

**(v) **

**(a) **

**(v) **

**(b) **

**Figure. 4.6**

(Non-Sinu. Cond.) After Compensation using

**(a)**

WAHBCC;

**(b)**

Lyapunov

**(**

*(i) *

*Load current;*

* (ii)*

* Source current; *

*(iii)*

* Filter Current; *

*(iv)*

* Capacitor Voltage *

*(v)*

* FFT analysis*

**)**

**4.5.3**

**Unbalanced load condition**

For unbalanced load condition, we have used three different RL loads which are connected in parallel to the diode rectifier based RL load such that the overall load current

Page | 79

5

0

-5

.300

5

0

-5

.300

each phase is unbalanced. The uncompensated source current shown in Figure. 4.7 (a) and

FFT analysis of the source current shows that the THD is 32.13% [Figure. 4.7 (b)].

100

5

0

0

-100

.300

.325

.350

Time in Sec

.375

**(a) **

.400

-5

.300

.325

.350

Time in Sec

**(b) **

.375

.400

**(c) **

**Figure. 4.7 **

Uncompensated Unbalanced Load Condition

**(a)**

Source Voltage;

**(b)**

Source

Current;

**(c)**

FFT analysis of Source Current

To analyze the performance of the two current controllers under unbalanced load condition, the simulation results are presented in Figure. 4.8 after compensation by

WAHBCC and the Lyapunov Function based stable current controller. Figure. 4.8 (a) shows the response produced by WAHBCC based SAPF, where three phase source current is almost balanced [Figure. 4.8 (a)(i)] with a THD of 2.59% [Figure. 4.8 (a)(v)]. But slightly better results are obtained using Lyapunov based SAPF with a reduced THD of

2.44% [Figure. 4.8 (b)(v)] and balanced three phase source current [Figure. 4.8 (b)(i)].

.325

.350

Time in Sec

**(i)**

.375

.325

.350

Time in Sec

**(ii)**

.375

.400

5

0

-5

.300

.400

5

0

-5

.300

.325

.350

Time in Sec

**(i)**

.375

.325

.350

Time in Sec

**(ii)**

.375

.400

.400

**(iii) **

**(a)**

**(iii) **

**(b)**

**Figure. 4.8 **

(Un-balanced Load) After Compensation using

**(a)**

WAHBCC;

**(b)**

Lyapunov

**(**

*(i) *

*Source current;*

* (ii)*

* Filter Current; *

*(iii)*

* FFT analysis*

**)**

Page | 80

**4.5.4**

**Transient load condition**

To verify the effectiveness of the proposed Lyapunov function based stable current controller, we tested its response in transient load condition. The magnitude of the load current was reduced at 0.2 sec and then it was increased at .3 sec to realize a transient condition as shown in Figure. 4.9 (a).

From Figure. 4.9 (b) is can be concluded that the prosed Lyapunov control based SAPF provides effective compensation even under transient load condition. Figure. 4.9 (d) shows the capacitor bus voltage response, which comes into steady state with 1 or 2 cycles thus

5

0

5

0

-5

.1

.2

.3

.4

-5

.1

.2

.3

Time in Sec

**(a)**

Time in Sec

**(b)**

260

5

240

220

0

200

-5

.1

.2

.3

.4

180

.1

.2

Time in Sec

.3

**(d) **

.4

Time in Sec

**(c)**

**Figure. 4.9 **

(Transient Load) After Compensation using Lyapunov function

**((a) **

*Load current;*

** (b)**

*Source current;*

** (c)**

* Filter Current;*

**(d)**

*Capacitor Voltage*

**)**

.4

**Figure. 4.10**

THD of source current after compensation using WAHBCC & Lyapunov function based stable current controller maintaining the stability.

Figure. 4.10 shows the bar graph of the source current THD obtained using and

WAHBCC and Lyapunov function based stable current controller under sinusoidal source voltage, non- sinusoidal source voltage & un-balanced load conditions. It can be concluded that the Lyapunov function based controller reduces the THD to a lowest value

Page | 81

even under sinusoidal source voltage, non- sinusoidal source voltage & un-balanced load conditions.

**4.6**

**Chapter Summary **

In this chapter we proposed a new stable control controller based on Lyapunov’s stability theorem, which generates the switching function satisfying the Lyapunov’s stability so that the stability of the closed loop system is maintained.

The proposed current controller based SAPF was successfully implemented using

*MATLAB/SIMULINK*

and the simulation results shows that the Lyapunov function based stable current controller provides better compensation than WAHBCC by reducing the source current THD to a lower value below the IEEE standards, under varying operating condition. The proposed also provides effective compensation even under transient load condition, while maintaining the system stability against load variation.

To verify the effectiveness of the proposed current controllers

*,*

a complete hardware setup for three phase Shunt active power filter using dSPACE 1104 is developed, whose details are given below.

Page | 82

**5.1**

**An Overview of the Hardware Set-Up **

The overall block diagram of the hardware set-up for compensating the harmonic current, produced due to the presence of non-linear load, by Shunt Active Power Filter

(SAPF) is shown in Figure. 5.1. To implement the control algorithm in real time, we have used dSPACE 1104, which interfaces the hardware part with the host computer. dSPACE

1104 is a popular DSP which has been successfully used for APFs [85, 89], as Simulink models can easily be debugged into the DSP and also it allows users to change controller parameter online.

Source Current Load Current

Three Phase

Voltage

Source

Non-Linear

Load

Voltage & Current

Sensor Circuit

Filter Current

*L*

*F*

Signal

Conditioning

Circuit

ADC dSPACE

Interfacing

Board

Blanking

Circuit

Three Phase IGBT based

Voltage Source

Inverter

Gate Signal

Opto-Isolation

Circuit

*C dc*

Oscilloscope

PC dSPACE 1104

**Figure. 5.1 **

Block Diagram of the Hardware Set-Up

Page | 84

The three phase power quantities (voltages and currents) which are required for generation of the gate signal are converted to low-level voltage signals using the Hall

Effect voltage and current sensor. These signals are further conditioned using signal conditioning circuits so that the sensed voltage signals are within ±10V range so that they are compatible with the Analog-to-Digital Converters (ADCs) of the dSPACE 1104. These voltage signal are then given to the ADCs on the dSPACE 1104 interfacing board. The control algorithm developed in Simulink is debugged into the dSPACE 1104 using the dSPACE software. Using the signal given to its ADCs as input signal, dSPACE 1104 generates the required switching pulses for the VSI. These pulses are taken from the PWM ports on the dSPACE 1104 interfacing board, which are then passed through the blanking circuit to include a dead time of 4µsec in order to prevent short circuit of the capacitor through switches in the same leg of the VSI. The blanking circuit output pulses are given to the opto-isolator circuit to isolate the high power network and the signal level circuits.

The output of the opto-isolator circuit are given to the VSI which then generates the required filter current so that source current is sinusoidal and in phase which source voltage, thus improving the power quality. A picture of the developed hardware-setup is shown in Figure. 5.2.

**Power Quality **

**Auto-Transformer **

**Analyzer **

**Voltage & Current **

**Sensors with Signal **

**Conditioning Ckt. dSPACE 1104 **

**Interfacing board **

**Oscilloscope **

**Blanking & Opto-**

**Isolation Ckt **

**Three Phase Voltage **

**Source Inverter **

**Filter Inductors **

**Figure. 5.2 **

A Picture of the developed Hardware Set-up

Page | 85

The major components which are used for the hardware setup are given as follows:

1.

Auto-Transformer.

2.

Non-Linear Load

3.

Voltage source Inverter

4.

Filter Inductors

5.

dSPACE 1104.

6.

Current & Voltage sensor circuit

7.

Signal conditioning circuit

8.

Blanking circuit

9.

Opto-isolation circuit.

10.

DC Power supply

11.

Power Quality Analyzer

The design details and the development of above mentioned circuits are presented in the following sections.

**5.2**

**Auto- Transformer: **

A continuously variable three phase auto-transformer has been used which act as variable voltage source, by which we can change the voltage level and so that the compensating characteristic of the SAPF can be tested at various voltage range. The three phase auto-transformer is shown in Figure. 5.3, which has a max. Current capacity of 28 A per phase and voltage range of 0-415 V. It has an over over-voltage range of 0-470 V.

**Figure. 5.3 **

Picture of the three Phase Auto-Transformer

Page | 86

**5.3**

**Non-Linear Load **

We have used a diode based rectifier with a series RL load in the DC side as the nonlinear load, which gives a non-sinusoidal load current. To change the current level of the load we have made both RL variable. The variable resistive load resistance ranges from 0-

100 Ω with 10 no. of tapping available to change its resistance. While variable inductive

** (b) (c) (a)**

**Figure. 5.4 **

Picture of the Non-Linear Load

**(a) **

Rectifier;

** (b) **

Resistor;

** (c) **

Inductor load inductance range from 0-30 mH with 10 no. of tapping available to change its inductance. The rectifier, the resistive and the inductive load are shown in Figure. 5.4 (a),

(b) & (c) respectively.

**5.4**

** Voltage Source Inverter **

A Semikron made 3-Phase IGBT based voltage source inverter has been used as shown in Figure. 5.5. It has 415 V max. AC output voltage and 35 A max. AC output current with a frequency of 50 Hz. It has a max. Switching frequency of 25 kHz. On the DC side 2

**Figure. 5.5 **

Picture of the three Phase IGBT based Voltage Source Inverter

Page | 87

capacitors are connected in series which has a equivalent capacitance of 2350 µF/900 V.

The voltage source inverter generates the required compensating current by using the gate signal generated by the control algorithm.

**5.5**

**Filter Inductors **

The filter inductors

𝐿

𝐹 are connected in the AC side of the VSI. Small value

𝐿

𝐹 may inject larger switching ripples into the supply current, while a larger value of

𝐿

𝐹

would cause poor tracking of the compensating current. An optimum value of

𝐿

𝐹

is necessary to

**Figure. 5.6 **

Picture of the Filter Inductor obtain better compensation. We have used variable inductors as shown in Figure. 5.6, so that optimum value of

𝐿

𝐹

is chosen according to voltage and current level. The variable inductor has a max. Current capacity of 25A and the inductance range is 0-30mH with 10 tapping to vary the inductance value.

**5.6**

**dSPACE 1104 **

The dSPACE 1104 is a real time control system based on 603powerPC floating point processor running at 250MHz and a slave DSP subsystem based on TMS320F240 DSP.

**Figure. 5.7 **

Picture of the dSPACE 1104 interfacing Board

Page | 88

dSPACE is a hardware interface which takes real time signals at the input channels of the interfacing board and then give these real time signals to the connected computer at fix sampling time. It also gives real time signals at the output channels of the interfacing board. To convert the real time signals into digital signal, it is having ADCs inbuilt at its input channels. To convert the digital signals coming out from the computer, it uses DAC which is inbuilt at its output channels. The control program designed in Simulink are executed in real time using the dSPACE interfacing board. Once the controller has been built in Simulink block-set, machine codes are achieved that runs on the

DS1104’TMS320F240 DSP processor. While the experiment is running, the dSPACE

DS1104 provides a mechanism that allows the user to change controller parameter online.

Thus, it is possible for the user to view the real process while the experiment is in progress. Control Desk developer version 3.5, dSPACE’s experiment software, provides all the functions to control, monitor and automate experiments and makes the development of controllers more effective. A picture of the dSPACE 1104 interfacing Board is shown in

Figure. 5.7.

**5.7**

**Voltage & Current Sensors **

The power quantities i.e. the voltage and current quantities are necessary for the generation of the gate signal are sensed using the Hall Effect voltage and current sensors which transforms higher level voltage and current quantities to low-level voltage signals.

The Hall Effect sensors also provide isolation between the power network and the signal level circuits. LEM LV 25-P voltage sensor and LEM LA 55-P current sensor are used in our work to convert the higher level voltage and current quantities to low-level voltage signals in the ±10V range so that they are compatible with the Analog-to-Digital

+15V -15V

+15V -15V

Source

Voltage

*R iv*

LV 25-P

*i s*

Source

Current

LA 55-P

M

M

*R ov*

Sensor Output

Voltage

*R oi*

**(a) (b) **

**Figure. 5.8 **

Schematic Diagram of

** (a) **

Voltage Sensor,

** (b) **

Current Sensor

Sensor Output

Voltage

Page | 89

Converters (ADCs) of the dSPACE 1104.

**5.7.1**

**Design of the Voltage Sensor Circuit**

The schematic diagram of the Hall Effect voltage sensor (LEM LV 25-P) is shown in

Figure. 5.8 (a). For our experiment, input voltage level is ±100 V which is to be transformed to range below ±10 V range. The input resistance

𝑅 𝑖𝑣 is chosen such that the output resistance falls in the range of 100

‑

350

Ω

as specified by the data sheet of the sensor [91].

For 𝑣 𝑖𝑣

100 V and

𝑅 𝑖𝑣

15 kV, the input current 𝑖 𝑖𝑣

is computed as 𝑖 𝑖𝑣

= 𝑣 𝑖𝑣

𝑅 𝑖𝑣

100

=

15 × 10

3

= 6.67mA

The conversion ratio (

𝐶𝑅 𝑣

) for LEM LV 25-P voltage sensor is 2500:1000. Thus the output current 𝑖 𝑜𝑣 is found as 𝑖 𝑜𝑣

= 𝑖 𝑖𝑣

× 𝐶𝑅 𝑣

= 6.67 × 2.5 = 16.67 mA

The output resistance is chosen as 300 Ω so that the sensed output voltage level is little high within the range of ±10 V. Thus the sensed output voltage corresponding to an input of ±100V is given as: 𝑣 𝑜𝑣

= 𝑅 𝑜𝑣

× 𝑖 𝑜𝑣

== 300 × 16.67 × 10

−3

= 5V

**5.7.2**

**Design of the Current Sensor Circuit **

The schematic diagram for the Hall Effect current sensor (LEM LA 55-P) is shown in

Figure. 5.8 (b). Here a current of ±4.5 A in the power network is converted to range below

±10 V range. The number of primary turns (

𝑁

𝑃

) is chosen such that the output resistance falls in the range of 0-300 Ω as specified by the data sheet of the sensor [92]. The conversion ratio (

𝐶𝑅 𝑖

) for this Hall Effectsensor is 1:1000. For

𝑁

𝑃

= 8 and primary current

( 𝑖 𝑖𝑐

) = 5 A, the output current is obtained as follows: 𝑖 𝑜𝑐

=

𝑁

𝑃

× 𝑖

𝐶𝑅 𝑖 𝑖𝑐

=

4.5 × 8

1000

= .036 A

The output resistance is chosen as 100 Ω so that the sensed output voltage level is in the range of ±10 V. Thus the sensed output voltage corresponding to an input of ±4.5 A is give as: 𝑣 𝑜𝑐

= 𝑅 𝑜𝑐

× 𝑖 𝑜𝑐

== 100 × 0.036 = 3.6V

Page | 90

Low-Pass Filter

Phase Corrector

1.5k

+15V

1.5k

1.5k

1.5k

4.7k

Input

27k 27k

TL064

0.1µF

TL064

ADC

*v i*

*R*

1

LF351

OP-AMP

100

0.1µF 0.1µF

R c

100k

*R*

2

-15V

*R f*

4.7k

**(a) (b) **

**Figure. 5.9 **

Signal Conditioning Circuit for

** (a) **

Voltage Sensor;

** (b) **

Current Sensor

ADC

*v o*

**Figure. 5.10 **

Voltage signals obtained from Signal Conditioning Circuit

*Distorted Source Voltage (*

*Scale 10V/div*

**), **

*Filtered *

*Source Voltage (*

* Filtered *

*Source Voltage (*

*Scale 5V/div),*

*Scale 5V/div),*

**5.8**

**Signal Conditioning Circuit **

The Signal Conditioning Circuit is used to convert and maintain the low-level bipolar voltage signals from the Hall Effect voltage and current sensors within a range ±10 V, so that the sensed voltage and current signal are made compatible with the analog channels of the dSPACE 1104 . The Signal Conditioning Circuit for voltage and current sensors are shown in Figure. 5.9 (a) & (b) respectively, details of which are explained below [93].

**5.8.1.**

**Signal Conditioning Circuit for Voltage Sensor **

The source voltages may be distorted and may not possess sharp zero crossings. While for the generation of reference source current, is necessary to extract the fundamental component of the source voltage. This is achieved by the OPAMP (TL064)-based signal

Page | 91

conditioning circuit [94] shown in Figure. 5.9 (a). It is a combination of a low-pass filter and a phase corrector. A second-order low-pass Butterworth filter is designed for a cut-off frequency of 50 Hz. The phase shift introduced by the low-pass filter is corrected using the phase corrector by adjusting the control resistance

*Rc*

. OPAMP TL064 has been selected as it has a slew rate of 3.5 V/µs which is enough not to distort the sensed voltage signal from the Hall Effect voltage sensors. In Figure. 5.10 the light blue signal is the distorted source voltage, while the dark blue signal is filter voltage which is out of phase and pink signal is the in-phase filter voltage.

**5.8.2.**

**Signal Conditioning Circuit for Current Sensor **

The sensed output voltage signals of the current sensor are passed through the signal conditioning circuit as shown in Figure. 5.9 (b), before it is given to ADCs on the dSPACE

1104 interfacing board. It consists of LF 351 OP-AMP. For the working of this circuit a

DC supply of ±15 V is given. The function of the signal conditioning circuit is to limit the output signal of the current sensor within ±10 V so that the ADCs on the dSPACE 1104 interfacing board are not damaged.

**5.9**

**Blanking Circuit **

By loading the control algorithm on dSPACE 1104 using dSPACE software, it generates the switching pulses for the VSI. These pulses are taken from the PWM ports on the dSPACE 1104 interfacing board. These are then given to the blanking circuit in order to prevent short-circuit of the dc capacitor of the VSI during the turn ON and turn OFF of both the switches in the same leg. Thus the blanking circuit is used to include a dead band- time between the turn ON and turn OFF of the switches in the same leg. Figure. 5.11 (a) shows the blanking circuit for phase-

*a*

. The blanking circuit inputs are switching pulses

𝑆 𝑎 and

𝑆̅ 𝑎 generated by dSPACE 1104. Two identical units of mono-stable multivibrator (SN74LS123), has been used to generate two short pulses

𝑆 𝑎𝑑

& 𝑆̅ 𝑎𝑑 with a duration of

𝑇 𝑑𝑡

. The detailed circuit diagram for two channels of the blanking circuit using mono-stable multi-vibrator is shown in Figure. 5.11 (b). The gate signal

𝐺 𝑎

& 𝐺̅ 𝑎 is generated by summing

𝑆 𝑎 and

𝑆 𝑎𝑑

*&*

𝑆 𝑎 and

𝑆̅ 𝑎𝑑 respectively using IC 7408 and then, passing these signal through a buffer (CD4050) and a transistor (CL100). Figure. 5.11 (c) shows the complete timing diagram of,

𝑆 𝑎

& 𝑆̅ 𝑎

,

𝑆 𝑎𝑑

& 𝑆̅ 𝑎𝑑 and

𝐺 𝑎

& 𝐺̅ 𝑎

. The expression to find the dead beat time duration of mono-stable multi-vibrater which is to be included in the swtiching pulse is given as in [95] where

𝑅 𝑒1 and

𝐶 𝑒1 are the external resistance and

𝑇 𝑑𝑡

= 6 + 0.05𝐶 𝑒1

+ 0.45𝐶 𝑒1

𝑅 𝑒1

+ 11.6𝑅 𝑒1

Page | 92

capacitance in KΩ and pF, respectively. For the Semikron made IGBT based VSI, a dead band time of 4µs is required. In order to get a dead band time of 4µs, the values of

𝑅 𝑒1 and

𝐶 𝑒1 are chosen as18kΩ And 470 pF respectively. To test the blanking circuit a test switching pulse is applied to it and the result taken using mixed signal oscilloscope (MSO) is shown in

S a

2

7408

4050

+5V

200

CL100

1.2k

G a

10

4

S ad

S ad

12

S a

7408

4050

200

1.2k

CL100

+5V

G a

S ad

S a

+5V

18k

*R e*

1

*C e*

1

16

15 14 13

12

11

10

9

**(a) **

S a

S ad

SN74LS123

1 2

3 4 5

6 7

8

*C e*

2

470pF

*R e*

2

S a

S ad

GND

** (b) (c) **

G a

S a

S ad

G a

**(d) **

**Figure. 5.11 (a) **

Banking Circuit

** (b) **

Mono-stable Multi-vibrator circuit connection diagram

** (c) **

Timing Diagram (d) Switching pulse responses

*Switching pulses*

(𝑆 𝑎

)

* (*

*Scale 5V/div), *

Gate signal

(𝐺 𝑎

*Short pulses *

(𝑆

)

* (*

*Scale 5V/div),*

𝑎𝑑

)

* (*

*Scale 10V/div*

**), **

Page | 93

Figure. 5.11 (d). The blue signal is the test switching pulse, while the green signal is the short pulse of 4µs generated using mono-stable multi-vibrator. By summing the blue and green signal using IC 7408 we get the gate signal which is represented by the pink signal.

The figure shows that a dead-time of 4µs is included in the gate signal.

**5.10**

**Opto-Isolation Circuit **

To isolate the gate signals generated by the blanking circuit from the high-power level network, opto-isolation circuit is used. Thus we have used a high-speed opto-coupler

(HCPL2601) to isolate the low voltage level control circuit from the high-power level network. The high-speed opto-coupler (HCPL2601) is provided with isolated dc power supplies. The detailed circuit diagram of the opto-coupler is shown in Figure. 5.12 [96].

HPCL2601

1 8

*V cc*

+5V

G a

*R ip*

360

2 7

6

3

Output Gate

Signal

4

5

**Figure. 5.12 **

Schematic Diagram of Opto-Coupler Circuit

**5.11**

**DC Power supply **

To build our hardware set-up we have designed various circuits which have been already discussed. For functioning of these circuits they require regulated dc power supplies with different voltage levels, details of which is given in Table 5.1. Figure. 5.13

(a) shows the circuit diagram to get ±15 V dc supply. To generate ±15 V dc a 230/18-0-18

V Centre-tapped step-down transformer of 750 mA rating is used. The ac voltage is then converted into dc by the use of a full-bridge diode (IN4007) rectifier, which is built using

4 diodes (D1-D4). Two identical electrolytic capacitors

𝐶

1

& 𝐶

2

, with 25V and 2200 µF are used to reduce ripple and smoothen the dc output voltage produced by the full bridge rectifier. Mid-point of the electrolytic capacitors

𝐶

1

& 𝐶

2

and center tap of the transformer are connected to ground so as to gate +15V dc and -15V dc. The unregulated +15V and -

15V dc voltage are then given as input to the positive voltage regulator IC7815 and negative voltage regulator IC7915 respectively, to produce regulated dc output voltages of

Page | 94

+15 Vand -15 V respectively. Figure. 5.13 (b) shows a picture of the ±15 V dc supply. To get +15 V dc voltage we used two full wave rectifier so that we get two +15 V source point and at the same time we fully utilize the Centre-tapped transformer. In similar way we get +5 V dc, but in this case we use a 230/9-0-9 V Centre-tapped step-down

**Table 5. 1 **

DC supply necessary for various Circuits

**SL No. **

**1. **

**Circuits **

Hall Effect Current Sensor Circuit

**2. **

Hall Effect Voltage Sensor Circuit

**3. **

**4. **

**5. **

**6. **

**7. **

Signal Conditioning Circuit for Current Sensor

Signal Conditioning Circuit for Voltage Sensor

Blanking Circuit

Opto-Isolation Circuit

Driver Circuit of VSI

**Dc Voltage **

±15 V

±15 V

±15 V

±15 V

±5 V

±5 V

±15 V

+15V

D

1

D

3

D

4

D

2

230/18-0-18 V

D

1

D

4

-15V

**(a) (b) **

D

3

D

1

D

3

+5V

D

2

D

4

D

2

+15V

D

5

D

7

D

5

D

7

230/9-0-9 V

D

8

D

6

+5V

230/18-0-18 V

D

8

D

6

+15V

**(c) (d) **

**Figure. 5.13 **

DC Power Supply

** (a)**

±15 V DC supply circuit diagram;

**(b) **

Picture of the

DC supply;

**(c)**

5-0-5 DC supply;

**(d) **

15-0-15 DC supply

Page | 95

transformer of 750 mA and the positive voltage regulator is IC7805.

The circuit diagram for +5 V and +15V dc voltage is shown in Figure. 5.13 (c) & (d) respectively.

**5.12**

**Power Quality Analyzer **

For analyzing the power quality, we have used a single phase power quality analyzer

(Fluke 43b). Fluke 43b is capable of measuring current, voltage, active power and reactive power as well as can display their waveforms. It also measures the THD, sag, swell, transients and frequency of voltage and current signal. It can be interfaced with the PC, where the waveform can be recorded for analytical study.

**5.13**

**Experimental Study **

To verify and analyze the effectiveness of the proposed controllers, we have used dSPACE 1104 for experimental implementation of the proposed controllers. The proposed current controllers, WAHBCC & Lyapunov function based stable current controller has been implemented experimentally. The simulation model developed in Matlab/Simulink are executed in real time by debugging it into dSPACE 1104. For the experimental study the non-linear load consists of diode based rectifier with a series RL load in the DC side.

All the system parameters for experimental study are presented in Table 5.2. For simplification only phase ‘a’ responses are shown. We have tested the controllers for sinusoidal source voltage & non- sinusoidal source voltage.

**Table 5. 2 **

System Parameters for Experimental Study

**System Parameters **

Source voltage ( 𝑣 s

)

System frequency ( f

)

Filter Inductance (

𝐿

𝐹

)

Load impedance (

𝑅

𝐿

, 𝐿

𝐿

*)*

DC link capacitance

(𝑐 𝑑𝑐

)

Reference DC link voltage ( 𝑣

∗ 𝑑𝑐

)

Switching Frequency

**Values **

100 V (peak)

50 Hz

2.5mH

40Ω; 20 mH

2350 μF

230 V

10kHz

Page | 96

**5.13.1**

**Sinusoidal Voltage condition **

For sinusoidal voltage condition, the distorted voltages from the three phase autotransformer are sensed by the voltage sensors and passed through a low pass filter to

**(a) (b) **

**Figure. 5.14**

Uncompensated Sinusoidal Source Voltage Condition

**(a)**

Source Voltage &

Source Current;

**(b)**

FFT analysis of Source Current

*Uncompensated Load current (*

*Scale 5A/div), *

* Source Voltage (*

*Scale 5V/div),*

**Figure. 5.15**

(Sinu. Source Vol. Cond.) Compensation using WAHBCC

* Load current (*

*Scale 5A/div), *

*(*

*Scale 5A/div),*

*Source current (*

*Scale 5A/div),*

*capacitor voltage (*

*Scale 10V/div*

**) **

*Filter current *

Page | 97

filtered sinusoidal voltage, details of which is already discussed in section 5.9.1. The uncompensated source current shown and the three phase sinusoidal source voltages are

**Figure. 5.16**

(Sinu. Source Vol. Cond.)Compensation using Lyapunov function

* Load current (*

*Scale 5A/div), *

*5A/div),*

*Source current (*

*Scale 5A/div),*

*capacitor voltage (*

*Scale 10V/div*

**) **

*Filter current (*

*Scale *

shown in Figure. 5.14 (a) and FFT analysis of the source current shows that the THD is

25.9% (Figure. 5.14(b)).

Figure. 5.15 shows the waveform after compensation using WAHBCC based SAPF. It provides effective compensation by injecting required filter current and thus making the

**(a) (b) **

**Figure. 5.17**

Compensation using

**(a) **

WAHBCC;

** (b) **

Lyapunov function

Page | 98

source current sinusoidal with some ripple content. FFT analysis of the source after compensation shows [Figure. 5.17 (a)] that the THD of source current is reduced to 1.5%.

While Lyapunov function based SAPF [Figure. 5.16] provides better compensation, with source current become almost sinusoidal by using the filter current and at the same time dc capacitor voltage is also maintained constant. The FFT analysis shows that the

THD of source current after compensation is reduced to 1.3% [Figure. 5.17 (b)] which below the IEEE 519 standard.

**5.13.2**

**Non-Sinusoidal Voltage condition **

To realize the non-sinusoidal voltage condition, the distorted voltages from the three phase auto-transformer are sensed by the voltage sensors and directly given to the ADC after proper amplification to maintain it within the ±10V range, so that it is compatible with ADC channels of the dSPACE 1104. The three phase non-sinusoidal source voltages are shown in Figure. 5.18 (a) and FFT analysis of the source current shows that the THD is

25.9% [Figure. 5.18 (b)].

**(b) (b) **

**Figure. 5.18**

Uncompensated Non-Sinusoidal Source Voltage Condition

**(a)**

Source Voltage;

**(b)**

FFT analysis of Source Current

*Non Sinusoidal *

*Source Voltages (*

*Scale 5V/div)*

Figure 5.19 shows the waveform after compensation using WAHBCC based SAPF. It provides effective compensation by filtering the source voltage and injecting required filter current to make the source current sinusoidal. There are some ripple content in the

Page | 99

compensated source because of non-sinusoidal voltage condition. FFT analysis done using the power quality analyzer of the source after compensation shows [Figure. 5.19] that the

**Figure. 5.19**

(Non-Sinu. Source Voltage Cond.) Compensation using WAHBCC

* Load current (*

*Scale 5A/div), *

*(*

*Scale 5A/div),*

*Source current (*

*Scale 5A/div),*

*capacitor voltage (*

*Scale 10V/div*

**)**

*Filter current *

**Figure. 5.20**

(Non-Sinu. Source Voltage Cond.)Compensation using Lyapunov function

* Load current (*

*Scale 5A/div), *

*(*

*Scale 5A/div),*

*Source current (*

*Scale 5A/div),*

*capacitor voltage (*

*Scale 10V/div*

**)**

*Filter current *

Page | 100

THD of the source current is reduced to 2.3% [Figure. 5.21 (a)] which is below the IEEE standard.

But better compensating performance are obtained using Lyapunov function based

SAPF [Figure. 5.20]. It reduces ripple contents in the source current and thus makes the source current almost sinusoidal by required amount of filter current and at the same time dc capacitor voltage is also maintained constant. The FFT analysis shows that the THD of source current after compensation is reduced to 2.1% [Figure. 5.21 (b)] which is below

5%, the IEEE 519 recommended standard.

**(a) (b) **

**Figure. 5.21 **

(Non-Sinu. Voltage Cond.) Compensation using

**(a) **

WAHBCC;

**(b) **

Lyapunov function

**5.14**

**Chapter Summary **

A complete hardware setup for three phase Shunt active power filter using dSPACE

1104 is develop, so as to verify the effectiveness of the proposed controllers. dSPACE

1104 is used to interfaces the hardware part with the host computer. The control algorithm developed in Simulink are executed in real time by debugging the Simulink model into dSPACE 1104. Three phase power quantities (voltages and currents) which are required for generation of the gate signal are sensed using the Hall Effect voltage and current sensor and converted to low-level voltage signals. Other circuit such as the signal conditioning circuits, banking circuit and Opto-isolator circuit are successfully developed.

Page | 101

The proposed current controllers, WAHBCC & Lyapunov function based current controller has been successfully tested in real time using dSPACE 1104. The experimental results shows that Lyapunov function based SAPF provide better compensation under both sinusoidal & non-sinusoidal voltage condition. From the wave form analysis it can be observed that source current becomes sinusoidal, for both sinusoidal & no-sinusoidal voltage condition, while the capacitor voltage is maintained constant. The simulation results shows that the THD of the source current is reduced to about 1.5% & 2.3% for sinusoidal & non-sinusoidal voltage conditions respective using WAHBCC. We get a slightly better result with Lyapunov function based current controller where the THD is reduced to 1.3% & 2.1% for sinusoidal & no-sinusoidal voltage conditions respective, which is well below 5% the IEEE-519 standard recommended.

Page | 102

**6.1**

**Conclusions **

Some of the imperative conclusions, which has been found out form the analysis of this thesis work are presented below:

Simulation results implies that, Synchronous Reference Frame (SRF) based control strategy provides in-effective compensation under un-balanced load & non-sinusoidal source voltage conditions. To improve the compensation performance, Self-Tuning

Filter (STF) based control strategy has been developed.

STF based control strategy successfully compensates the load current harmonics, reducing the source current THD below 5% (IEEE-519 standards), under un-balanced load & non-sinusoidal source voltage conditions.

To regulate and maintain the DC capacitor bus voltage constant, various voltage controllers such as PI, PID, Fuzzy Logic Controller (FLC) & Adaptive Fuzzy PID

Controller (AFPID) has been developed. Simulation results shows that the proposed

AFPID provides better and faster compensation due to its adaptive nature. The THD of the source current is reduced to 1.89%, 2.82% and 3.03% under sinusoidal source voltage, non- sinusoidal source voltage & un-balanced load & conditions, respectively.

To generate the gate signal, various current controllers has been developed such as hysteresis band current control (HBCC), adaptive hysteresis band current control

(AHCC) & weighted adaptive hysteresis band current control (WAHCC). Simulation results shows that WAHCC effective reduces the losses by maintaining the switching frequency and also reduces the THD of the source current to 1.41%, 2.19% and 2.59% under sinusoidal source voltage, non- sinusoidal source voltage & un-balanced load conditions, respectively.

To ensure the stability of the current controller, a Lyapunov function based current controller has been developed. The gate signal are generated satisfying the Lyapunov

Stability, thus ensuring the stability. The proposed Lyapunov based controller reduces

Page | 104

the THD of the source current to 1.28%, 2.06% and 2.48% under sinusoidal source voltage, non- sinusoidal source voltage & un-balanced load conditions, respectively.

Experimental results shown the WAHBBC based SAPF provides good compensation for sinusoidal source voltage & non- sinusoidal source voltage conditions. But better compensation are obtained by using Lyapunov function based SAPF, reducing the

THD of the source current to 1.3% & 2.3% under sinusoidal source voltage & non- sinusoidal source voltage condition, respectively, while maintaining the stability.

**6.2**

**Contribution of thesis **

STF based Control Strategy has been developed to generate the reference source current even under non-sinusoidal voltage condition.

A new hybrid controller (AFPID), which is a combination of the conventional PID controller and Fuzzy logic controller has been developed to effective regulate the DC capacitor Voltage.

To generate the gate signal WAHBCC is developed, where the hysteresis band (HB) is calculated optimally to get better compensation with lower THD and reduced losses.

A Lyapunov function based stable current controller has been developed to ensure the stability of the current controller even under load variation.

A complete hardware setup of the three phase shunt active power filter has been developed using dSPACE 1104, to verify the effectiveness of the proposed controllers.

**6.3**

**Suggestions for Future Work **

In this thesis work, the proposed controllers effectively improved the power quality, but to further improve the power quality, analysis of some new approaches is necessary:

As voltage and current harmonics are interrelated to each other, so mitigation of both voltage & current harmonics is necessary. Unified Power Quality Conditioner (UPOC) which is a combination of active series and active shunt power filter is a suitable solution. So mitigation of voltage and current using UPQC can be considered for further investigation.

Page | 105

Predictive filtering technique based control strategies such as Kalman filtering approach may be used to estimate the reference source current, to further enhance the performance.

In this research work, we had considered various current controllers for generation of gating signals. New current control techniques such as sliding mode control can still improve the output quality.

Due to the environment friendly nature of the Renewable energy source, they are becoming more popular. But due to the variable and unpredictable power output from wind, solar, or other alternative sources, various issues such as voltage stability and regulation, reactive power compensation, harmonic distortion, etc. is needed to be considered. So harmonic mitigation for renewable energy application can be considered for future investigation.

Page | 106

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S. Swain, P.C. Panda and B.D. Subudhi, “Power Quality Improvement Using

Adaptive Fuzzy PID controlled Shunt Active Power Filter Under Non-Sinusoidal

Voltage Condition,” Int. conf. on Electronics Engineering and Image Processing,

Bangkok, April 1-2 2014, ISBN: 9788192710457.

2.

S. Swain, P.C. Panda and B.D. Subudhi, “Three Phase Shunt Active Power Filter

Using a new Weighted Adaptive Hysteresis Band Current Controller,” Int. Conf. on Circuit, Power and Computing Technologies, IEEE, pp. 781-786, Kanyakumari,

March 20-21 2014.

3.

S. Swain, P.C. Panda, B.D. Subudhi and R. Panigrahi, “An Adaptive Fuzzy PID

Controlled Three Phase Shunt Active Power Filter,” 5 th

Int. Conf. on Computer

Applications in Electrical Engineering-Recent Advances (CERA-13), pp. 238-243,

Oct’2013

4.

S. Swain, P.C. Panda and B.D. Subudhi “A Comparative Study of two Control

Strategies for three Phase Shunt Active Power Filter using Adaptive Hysteresis

Band Current Controller”, IEEE 2 nd

Student Conf. on Engineering & System,

MNIT, Allahabad, 2013.

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