Atmel AT30TS75 9- to 12-bit Selectable, ±0.5°C Accurate Digital Temperature Sensor
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Atmel AT30TS75
9- to 12-bit Selectable, ±0.5°C Accurate
Digital Temperature Sensor
DATASHEET
See Applicable Errata in Section 12.
Features
Single 2.7V - 5.5V supply
Measures temperature from -55
C to +125C
Highly accurate temperature measurements requiring no external components
±0.5
C accuracy (typical) over the 0
C to +85
C range
±1.0
C accuracy (typical) over the -25
C to +105
C range
±2.0
C accuracy (typical) over the -40
C to +125
C range
User-configurable resolution
9 to 12 bits (0.5
C to 0.0625
C)
User-configurable high and low temperature limits
ALERT output pin for indicating temperature alarms
2-wire I
2
C and SMBus
™
compatible serial interface
Supports SMBus Timeout
Supports SMBus Alert and Alert Response Address (ARA)
Selectable addressing allows up to eight devices on the same bus
I
2
C High-Speed (HS) mode compatible
3.4MHz maximum clock frequency
Built-in noise suppression filtering for clock and data input signals
Low power dissipation
75μA active current (typical) during temperature measurements
Shutdown mode to minimize power consumption
1μA shutdown current (typical)
One-shot mode for single temperature measurement while in Shutdown mode
Pin and software compatible to industry-standard LM75-type devices
Industry standard green (Pb/Halide-free/RoHS compliant) package options
8-lead SOIC (150-mil)
8-lead MSOP (3 x 3mm)
8-pad Ultra Thin DFN (UDFN - 2 x 3 x 0.6mm)
8748B–DTS–4/12
Table of Contents
1. Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2. Pin Descriptions and Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3. Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4. Device Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.1
Start Condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2
Stop Condition. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.3
Acknowledge (ACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.4
No-Acknowledge (NACK) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5. Device Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.1
High-Speed Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
5.2
Temperature Measurements. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.3
Temperature Alarm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.3.1
Fault Tolerance Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.3.2
Comparator Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.3.3
Interrupt Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.4
Shutdown Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.4.1
One-shot Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
6. Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.1
Pointer Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.2
Temperature Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.3
Configuration Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
6.3.1
OS Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.3.2
R1:R0 Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.3.3
FT1:FT0 Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.3.4
POL Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
6.3.5
CMP/INT Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.3.6
SD Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
6.4
T
LOW
and T
HIGH
Limit Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7. SMBus Features and I
2
C General Call . . . . . . . . . . . . . . . . . . . . . . 23
7.1
SMBus Alert . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.2
SMBus Timeout. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.3
General Call . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
8. Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.1
Absolute Maximum Ratings* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.2
DC and AC Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
8.3
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
8.4
Temperature Sensor Accuracy and Conversion Characteristics . . . . . . . . . . 27
8.5
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
8.6
Power-up Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
8.7
Pin Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
8.8
Input Test Waveforms and Measurement Levels . . . . . . . . . . . . . . . . . . . . . . 29
8.9
Output Test Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
2
9. Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
9.1
Atmel Ordering Code Detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
9.2
Green Package Options (Pb/Halide-Free/RoHS Compliant) . . . . . . . . . . . . . 30
10. Part Marking Detail . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
11. Packaging Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
11.1 8S1 - JEDEC SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
11.2 8XM - MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
11.3 8MA2 - UDFN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
12. Errata . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
12.1 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
12.2 Temperature Sensor Accuracy Characteristics. . . . . . . . . . . . . . . . . . . . . . . . 36
12.3 Fault Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
12.4 ALERT pin. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
13. Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
3
1.
Description
The Atmel
®
AT30TS75 is a complete, precise temperature monitoring device designed for use in a variety of applications that require the measuring of local temperatures as an integral part of the system's function and/or reliability. The
AT30TS75 device combines a high-precision digital temperature sensor, programmable high and low temperature alarms, and a 2-wire I
2
C and SMBus (System Management Bus) compatible serial interface into a single, compact package.
The temperature sensor can measure temperatures over the full -55
C to +125C temperature range and has a typical accuracy as precise as ±0.5
C from 0C to +85C. The result of the digitized temperature measurements are stored in one of the AT30TS75 internal registers, which is readable at any time through the device's serial interface.
The AT30TS75 utilizes flexible, user-programmable internal registers to configure the temperature sensor's performance and response to high and low temperature conditions. A dedicated alarm output activates if the temperature measurement exceeds the user-defined temperature and fault count limits. To reduce current consumption and save power, the AT30TS75 features a Shutdown mode that turns off all internal circuitry except for the internal Power-On
Reset (POR) and serial interface circuits.
The AT30TS75 is factory-calibrated and requires no external components to measure temperature. With its flexibility and high-degree of accuracy, the AT30TS75 is ideal for extended temperature measurements in a wide variety of communication, computer, consumer, environmental, industrial, and instrumentation applications.
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
4
2.
Pin Descriptions and Pinouts
Table 1.
Pin Description
Symbol Name and Function
SCL Serial Clock: This pin is used to provide a clock to the device and is used to control the flow of data to and from the device. Command and input data present on the SDA pin is always latched in on the rising edge of SCL, while output data on the SDA pin is always clocked out on the falling edge of SCL.
The SCL pin must either be forced high when the serial bus is idle or pulled-high using an external pull-up resistor.
SDA Serial Data: The SDA pin is an open-drain bidirectional input/output pin used to serially transfer data to and from the device.
The SDA pin must be pulled-high using an external pull-up resistor and may be wire-ANDed with any number of other open-drain or open-collector pins from other devices on the same bus.
ALERT Alert: The ALERT pin is an open-drain output pin used to indicate when the temperature goes beyond the user-programmed temperature limits. The ALERT pin can be operated in one of two different modes (Interrupt or Comparator mode) as defined by the CMP/INT bit in the Configuration Register. The ALERT pin defaults to an active-low output upon device power-up or reset but can be reconfigured as an active-high output by setting the POL bit in the Configuration Register.
This pin can be wire-ANDed together with ALERT pins from other devices on the same bus. When wire-ANDing pins together, the ALERT pin should be configured as an active-low output so that when a single ALERT pin on the common alert bus goes active, the entire common alert bus will go low and the host controller will be properly notified since other ALERT pins that may be in the inactive-high state will not mask the true alert signal. In an SMBus environment, the SMBus host can respond by sending an SMBus ARA (Alert Response Address) command to determine which device on the
SMBus generated the alert signal.
The ALERT pin must be pulled-high using an external pull-up resistor even when it is not used. Care must also be taken to prevent this pin from being shorted directly to ground without a resistor at any time whether during testing or normal operation.
A
2-0
Address Inputs: The A
2-0
pins are used to select the device address and correspond to the three least-significant bits (LSBs) of the I
2
C/SMBus 7-bit slave address. These pins can be directly connected in any combination to V
CC
A
2-0
or GND, and by utilizing the
pins, up to eight devices may be addressed on a single bus.
The A
2-0
pins are internally pulled to GND and may be left floating. However, it is highly recommended that the A ensure a known address state.
2-0
pins always be directly connected to V
CC
or GND to
V
CC
GND
Device Power Supply: The V
CC
pin is used to supply the source voltage to the device.
Operations at invalid V
CC attempted.
voltages may produce spurious results and should not be
Ground: The ground reference for the power supply. GND should be connected to the system ground.
Asserted
State
—
—
—
—
—
—
Type
Input
Input/Output
Output
Input
Power
Power
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
5
Figure 1.
SDA
SCL
ALERT
GND
Pin Configurations
8-SOIC
(Top View)
1
2
3
4
8
7
6
5
V
CC
A
0
A
1
A
2
SDA
SCL
ALERT
GND
1
2
3
4
8-MSOP
(Top View)
8
7
6
5
V
CC
A
0
A
1
A
2
SDA
SCL
ALERT
GND
1
2
3
4
8-UDFN
(Top View)
8
7
6
5
V
CC
A
0
A
1
A
2
3.
Block Diagram
Figure 3-1. Block Diagram
Pointer
Register
Configuration
Register
SCL
SDA
I 2 C/SMBus
Interface
Control and
Logic
A
2-0
3
T
HIGH
Limit
Register
T
LOW
Limit
Register
Temperature
Register
A/D
Converter
Temperature
Sensor
Digital
Comparator
ALERT
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
6
4.
Device Communication
The AT30TS75 operates as a slave device and utilizes a simple 2-wire I
2
C and SMBus compatible digital serial interface to communicate with a host controller, commonly referred to as the bus Master. The Master initiates and controls all
Read and Write operations to the slave devices on the serial bus, and both the Master and the slave devices can transmit and receive data on the bus.
The serial interface is comprised of just two signal lines: Serial Clock (SCL) and Serial Data (SDA). The SCL pin is used to receive the clock signal from the Master, while the bidirectional SDA pin is used to receive command and data information from the Master as well as to send data back to the Master. Data is always latched into the AT30TS75 on the rising edge of SCL and always output from the device on the falling edge of SCL. Both the SCL and SDA pin incorporate integrated spike suppression filters and Schmitt Triggers to minimize the effects of input spikes and bus noise.
All command and data information is transferred with the Most-Significant Bit (MSB) first. During bus communication, one data bit is transmitted every clock cycle, and after eight bits (one byte) of data has been transferred, the receiving device must respond with either an acknowledge (ACK) or a no-acknowledge (NACK) response bit during a ninth clock cycle (ACK/NACK clock cycle) generated by the Master. Therefore, nine clock cycles are required for every one byte of data transferred. There are no unused clock cycles during any Read or Write operation, so there must not be any interruptions or breaks in the data stream during each data byte transfer and ACK or NACK clock cycle.
During data transfers, data on the SDA pin must only change while SCL is low, and the data must remain stable while
SCL is high. If data on the SDA pin changes while SCL is high, then either a Start or a Stop condition will occur. Start and Stop conditions are used to initiate and end all serial bus communication between the Master and the slave devices.
The number of data bytes transferred between a Start and a Stop condition is not limited and is determined by the
Master.
In order for the serial bus to be idle, both the SCL and SDA pins must be in the logic-high state at the same time.
4.1
Start Condition
A Start condition occurs when there is a high-to-low transition on the SDA pin while the SCL pin is stable in the logic-high state. The Master uses a Start condition to initiate any data transfer sequence, and the Start condition must precede any command. The AT30TS75 will continuously monitor the SDA and SCL pins for a Start condition, and the device will not respond unless one is given.
4.2
Stop Condition
A Stop condition occurs when there is a low-to-high transition on the SDA pin while the SCL pin is stable in the logic-high state. The Master uses the Stop condition to end a data transfer sequence to the AT30TS75 which will subsequently return to the idle state. The Master can also utilize a repeated Start condition instead of a Stop condition to end the current data transfer if the Master will perform another operation.
4.3
Acknowledge (ACK)
After every byte of data received, the AT30TS75 must acknowledge to the Master that it has successfully received the data byte by responding with an ACK. This is accomplished by the Master first releasing the SDA line and providing the
ACK/NACK clock cycle (a ninth clock cycle for every byte). During the ACK/NACK clock cycle, the AT30TS75 must output a Logic 0 (ACK) for the entire clock cycle such that the SDA line must be stable in the logic-low state during the entire high period of the clock cycle.
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
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4.4
No-Acknowledge (NACK)
When the AT30TS75 is transmitting data to the Master, the Master can indicate that it is done receiving data and wants to end the operation by sending a NACK response to the AT30TS75 instead of an ACK response. This is accomplished by the Master outputting a Logic 1 during the ACK/NACK clock cycle, at which point the AT30TS75 will release the SDA line so that the Master can then generate a Stop condition.
In addition, the AT30TS75 can use a NACK to respond to the Master instead of an ACK for certain invalid operation cases such as an attempt to write to a Read-only Register (e.g. an attempt to write to the Temperature Register).
Figure 4-1. Start, Stop, and ACK
Data
Must be
Stable
Data
Must be
Stable
Data
Must be
Stable
SCK
1 2 8 9
SDA
Start
Condition
Data
Change
Allowed
Data
Change
Allowed
Data
Change
Allowed
Data
Change
Allowed
ACK
Stop
Condition
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
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5.
Device Operation
Commands used to configure and control the operation of the AT30TS75 are sent to the device from the Master via the serial interface. Likewise, the Master can read the temperature data from the AT30TS75 via the serial interface.
However, since multiple slave devices can reside on the serial bus, each slave device must have its own unique 7-bit address so that the Master can access each device independently.
For the AT30TS75, the first four MSBs of its 7-bit address are the device type identifier and are fixed at 1001. The remaining three LSBs correspond to the states of the hard-wired A
2-0
address pins.
Example:
If the A
2-0
pins are connected to GND, then the 7-bit device address would be 1001000.
In order for the Master to select and access the AT30TS75, the Master must first initiate a Start condition. Following the
Start condition, the Master must output the device address byte. The device address byte consists of the 7-bit device address plus a Read/Write (R/W) control bit, which indicates whether the Master will be performing a Read or a Write to the AT30TS75. If the R/W control bit is a Logic 1, then the Master will be reading data from the AT30TS75. Alternatively, if the R/W control bit is a Logic 0, then the Master will be writing data to the AT30TS75.
Table 5-1.
Atmel AT30TS75 Address Byte
Bit 7
1
Bit 6 Bit 5
Device Type Identifier
0 0
Bit 4
1
Bit 3
A2
Bit 2
Device Address
A1
Bit 1
A0
Bit 0
Read/Write
R/W
If the 7-bit address sent by the Master matches that of the AT30TS75, then the device will respond with an ACK after it has received the full address byte. If there is an address mismatch, then the AT30TS75 will respond with a NACK and return to the idle state.
5.1
High-Speed Mode
The AT30TS75 supports the I
2
C High-Speed (HS) mode allowing it to operate at clock frequencies up to 3.4MHz. In order to put the AT30TS75 into the HS mode, the Master must first initiate a Start condition followed by the HS mode master code of 00001XXX. Since the HS mode master code is meant to be recognized by all slave devices that support the HS mode, the AT30TS75 will not ACK the HS mode master code. Instead, the Master will output a NACK during the
ACK/NACK clock cycle.
Once the AT30TS75 receives the HS mode master code, it will switch its input filters on SDA and SCL to the HS mode to allow transfers up to 3.4MHz. The device will then return to the idle state and wait for a repeated Start condition before the next operation can occur.
To begin the next operation, the Master must issue a repeated Start condition followed by the device address byte. The
AT30TS75 will continue to operate in the HS mode until the Master sends a Stop condition; therefore, the Master should use repeated Start conditions to begin new operations rather than a Stop-Start sequence. Once the AT30TS75 receives a Stop condition, the device will switch its input and output filters back to the standard I
2
C mode.
Figure 5-1. High-Speed Mode
1 2 3 4 5 6 7 8 9
SCK
Master Code
SDA
0
MSB
0 0 0 1 X X X 1
Start by
Master
NACK from
Master
Repeated
Start by
Master
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
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5.2
Temperature Measurements
The AT30TS75 utilizes a band-gap type temperature sensor with an internal sigma-delta Analog-to-Digital Converter
(ADC) to measure and convert the temperature reading into a digital value with a selectable resolution as high as
0.0625
C. The measured temperature is calibrated in degrees Celsius; therefore, a lookup table or conversion routine is necessary for applications that wish to deal in degrees Fahrenheit.
The result of the digitized temperature measurements are stored in the internal Temperature Register of the AT30TS75, which is readable at any time through the device's serial interface. When in the normal operating mode, the device performs continuous temperature measurements and updates the contents of the Temperature Register (see
“Temperature Register” on page 16 ) after each analog-to-digital conversion.
The resolution of the temperature measurement data can be configured to 9, 10, 11, or 12 bits which corresponds to temperature increments of 0.5
C, 0.25C, 0.125C, and 0.0625C, respectively. Selecting the temperature resolution is done using the R1 and R0 bits in the Configuration Register (see
Section 6.3 “Configuration Register” on page 18
). The
ADC conversion time does increase with each bit of higher resolution, so careful consideration should be given to the resolution versus conversion time relationship. The default resolution after device power-up or reset is nine bits, which retains backwards compatibility to industry-standard LM75-type devices.
With 12 bits of resolution, the AT30TS75 can theoretically measure a temperature range of 255
C (-128C to +127C); however, the device is only designed to measure temperatures over a range of -55
C to +125C.
5.3
Temperature Alarm
After the measured temperature value has been stored into the Temperature Register, the data will be compared with both the high and low temperature limits defined by the values stored in the T
HIGH
Limit Register and T
LOW
Limit Register.
If the comparison results in a valid fault condition (see
Section 5.3.1 “Fault Tolerance Limits” on page 10
), then the device will activate the ALERT output pin.
The polarity and function of the ALERT pin can be configured by using specific bits in the Configuration Register. The
ALERT pin defaults to the active low state after device power-up or reset but can be reconfigured to active high by setting the POL bit in the Configuration Register to a Logic 1. The function of the ALERT pin changes based on the Alarm
Section 5.3.3 “Interrupt Mode” on page 12
) by using the CMP/INT bit in the Configuration
Register. The Comparator mode is the default operating mode after the device powers up or resets.
The value of the high temperature limit stored in the T
HIGH temperature limit stored in the T
LOW
Limit Register must be greater than the value of the low
Limit Register in order for the ALERT function to work properly; otherwise, the
ALERT pin will output erroneous results and will falsely signal temperature alarms.
5.3.1
Fault Tolerance Limits
A temperature fault occurs if the measured temperature meets or exceeds either the high temperature limit set by the
T
HIGH
Limit Register or the low temperature limit set by the T
LOW
Limit Register. To prevent false alarms due to environmental or temperature noise, the device incorporates a fault tolerance queue that requires consecutive temperature faults to occur before resulting in a valid fault condition. The fault tolerance queue value is controlled by the
FT1 and FT0 bits in the Configuration Register and can be set to a single fault count of 1 or a count of 2, 4, or 6 consecutive faults.
An internal counter that automatically increments after a temperature fault is used to determine if the fault tolerance queue setting has been met. After incrementing the fault counter, the device will compare the count to the fault tolerance queue setting to see if a valid fault condition should be triggered. Once a valid fault condition occurs, the device will activate the ALERT output pin. If the most recent measured temperature does not meet or exceed the high or low temperature limit, then the internal fault counter will be reset back to zero.
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Figure 5-2. Fault Count Example
T
HIGH
Limit
Temperature
T
LOW
Limit
Temperature Measurements/Conversions
5.3.2
Comparator Mode
When the device operates in the Comparator mode, then the ALERT pin goes active if the measured temperature meets or exceeds the high temperature limit set by the T
HIGH
Limit Register and a valid fault condition exists (the consecutive number of temperature faults has been reached). The ALERT pin will return to the inactive state after the measured temperature drops below the T
LOW
Limit Register value the appropriate number of times to create a subsequent valid fault condition. The ALERT pin only changes state based on the high and low temperature limits and fault conditions; reading from or writing to any register or putting the device into Shutdown mode will not affect the state of the ALERT pin.
The high temperature limit set by the T
HIGH
Limit Register must be greater than the low temperature limit set by the T
LOW
Limit Register in order for the ALERT pin to activate correctly.
If switching from Interrupt mode to Comparator mode while the ALERT pin is already active, then the ALERT pin will remain active until the measured temperature is below the T
LOW
Limit Register value the appropriate number of times to create a valid fault condition.
The ALERT pin will return to the inactive state if the device receives the General Call Reset command. In addition, the state of the Configuration Register will return to the power-on default state, and the device will remain in the Comparator mode.
device configured for the Comparator mode and a fault tolerance queue setting of two.
Figure 5-3. Comparator Mode (Fault Tolerance Queue = 2)
T
HIGH
Limit
Temperature
T
LOW
Limit
ALERT
(Active High, POL = 1)
ALERT
(Active Low, POL = 0)
Temperature Measurements/Conversions
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5.3.3
Interrupt Mode
Similar to the Comparator mode, when the device operates in the Interrupt mode, the ALERT pin will go active if the measured temperature meets or exceeds the high temperature limit set by the T
HIGH
Limit Register and a valid fault condition exists (the consecutive number of temperature faults has been reached). Unlike the Comparator mode, however, the ALERT pin will remain active until one of three normal operation events takes place: any one of the device's registers is read, the device responds to an SMBus Alert Response Address (ARA), or the device is put into
Shutdown mode.
Once the ALERT pin returns to the inactive state, it will not go active again until the measured temperature drops below the low temperature limit set by the T
LOW
Limit Register for the appropriate number of consecutive faults. Again, the
ALERT pin will remain active until one of the device's registers is read, the device responds to an SMBus ARA, or the device is placed into the Shutdown mode.
After the ALERT pin becomes inactive again, the cycle will repeat itself with the ALERT pin going active after the measured temperature meets or exceeds the T
HIGH
Limit Register value for the proper number of consecutive faults.
This process is cyclical between T
HIGH
and T
LOW
temperature alarms (e.g. T
HIGH
event, ALERT clear, T
LOW
event, ALERT clear, T
HIGH
event, ALERT clear, T
LOW
event, etc.).
In order for the ALERT pin to normally become active for the first time in the Interrupt Mode, the first event must be a
T
HIGH
T
LOW
temperature alarm event. Therefore, even if the measured temperature initially starts off between the T
HIGH
and
limits and then drops below the T
LOW
temperature limit and has met valid fault conditions, the ALERT pin will still not go active. The high temperature limit set by the T
HIGH the T
LOW
Limit Register must be greater than the low temperature limit set by
Limit Register in order for the ALERT pin to activate correctly.
If switching from Comparator mode to Interrupt mode while the ALERT pin is already active, then the ALERT pin will remain active until it is cleared by one of the events already detailed: any one of the device's registers is read, the device responds to an SMBus ARA, or the device is put into Shutdown mode. The ALERT pin will also return to the inactive state if the device receives the General Call Reset command. When reset, the state of the Configuration Register will return to the power-on default state which will put the device back into the Comparator mode.
show both the active high and active low ALERT pin response for a sample temperature
how the ALERT pin output would look if there was a longer delay between the ALERT trigger and the reading of a register.
Figure 5-4. Interrupt Mode (Fault Tolerance Queue = 2)
T
HIGH
Limit
Temperature
T
LOW
Limit
ALERT
(Active High, POL = 1)
ALERT
(Active Low, POL = 0)
Read Register Read Register Read Register
Temperature Measurements/Conversions
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Figure 5-5. Interrupt Mode (Fault Tolerance Queue = 2) Delay Before Reading Register
T
HIGH
Limit
Temperature
T
LOW
Limit
ALERT
(Active High, POL = 1)
ALERT
(Active Low, POL = 0)
Read Register Read Register
Temperature Measurements/Conversions
5.4
Shutdown Mode
To reduce current consumption and save power, the device features a Shutdown mode that disables all internal device circuitry except for the serial interface and POR circuits. While in the Shutdown mode, the internal temperature sensor is not active, so no temperature measurements will be made. Entering and exiting the Shutdown mode is controlled by the
SD bit in the Configuration Register.
Entering the Shutdown mode can affect the ALERT pin depending on the Alarm Thermostat mode. If the device is configured to operate in the Interrupt mode, then the ALERT pin will go inactive when the device enters the Shutdown mode. However, the ALERT pin will not change states if the device is operating in the Comparator mode.
The fault count information will not change when the device enters or exits the Shutdown mode. Therefore, the number of previous temperature faults recorded by the internal fault counter will be retained unless the device is power-cycled or reset. When exiting the Shutdown mode, the ALERT pin will go active if operating in Interrupt mode, a valid fault condition exists, and the T
HIGH followed by a T
LOW
and T
LOW
event cycles are maintained (i.e. T
event when exiting Shutdown mode).
HIGH
event before entering Shutdown mode
5.4.1
One-shot Mode
The AT30TS75 features a One-shot Temperature mode that allows the device to perform a single temperature measurement while in the Shutdown mode. By keeping the device in the Shutdown mode and utilizing the One-shot mode, the AT30TS75 can remain in a lower power state and only go active to take temperature measurements on an as-needed basis. The internal fault counter will be updated when taking a temperature measurement using the One-shot mode; therefore, a valid fault condition can be generated by the One-shot temperature measurements. If operating in
Comparator mode, then the fault condition will cause the ALERT pin to go either active or inactive depending on if the fault condition is a result of a T
HIGH
or T
LOW
event. If operating in Interrupt mode, the fault condition will cause the ALERT pin to pulse active for a short duration of time to indicate a T
HIGH return to the inactive state.
or T
LOW
event has occurred. The ALERT pin will then
The One-shot mode is controlled using the OS bit in the Configuration Register (see
Section 6.3.1 “OS Bit” on page 19 ).
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6.
Registers
The AT30TS75 contains five registers (a Pointer Register and four data registers) that are used to control the operational mode and performance of the temperature sensor, store the user-defined high and low temperature limits, and store the digitized temperature measurements. All accesses to the device are performed using these five registers. In order to read from and write to one of the device's four data registers, the user must first select a desired data register by utilizing the Pointer Register.
Table 6-1.
Registers
Register
Pointer Register
Temperature Register
Configuration Register
T
LOW
Limit Register
T
HIGH
Limit Register
Address
n/a
00h
01h
02h
03h
Read/Write
W
R
R/W
R/W
R/W
Size
8-bit
16-bit
16-bit
16-bit
16-bit
Power-on Default
00h
0000h
0000h
4B00h (75
C)
5000h (80
C)
The Configuration Register, despite being 16-bits wide, is compatible to industry standard LM75-type temperature sensors that use an 8-bit wide register in that only the first 8-bits of the Configuration Register need to be written to or read from.
6.1
Pointer Register
The 8-bit Write-only Pointer Register is used to address and select which one of the device's four data registers
(Temperature Register, Configuration Register, T
LOW to.
Limit Register, or T
HIGH
Limit Register) will be read from or written
For Read operations from the AT30TS75, once the Pointer Register is set to point to a particular data register, it remains pointed to that same data register until the Pointer Register value is changed.
Example:
If the user sets the Pointer Register to point to the Temperature Register, then all subsequent reads from the device will output data from the Temperature Register until the Pointer Register value is changed.
For Write operations to the AT30TS75, the Pointer Register value must be refreshed each time a Write to the device is to be performed, even if the same data register is going to be written to a second time in a row.
Example:
If the Pointer Register is set to point to the Configuration Register, once the subsequent Write operation to the Configuration Register has completed, the user cannot write again into the Configuration Register without first setting the Pointer Register value again. As long as a Write operation is to be performed, the device will assume that the Pointer Register value is the first data byte received after the address byte.
Since only four data registers are available for access, only the two LSBs (P1 and P0) of the Pointer Register are used; the remaining six bits (P7-P2) of the Pointer Register should always be set to zero to allow for future migration paths to other temperature sensor devices that have more than four data registers.
Table 6-2 shows the bit assignments of the
Pointer Register and the associated pointer addresses of the data registers available. Attempts to write any values other than those listed in
Table 6-2 into the Pointer Register will be ignored by the device, and the contents of the Pointer
Register will not be changed. However, the device will respond back to the Master with an ACK to indicate that the device successfully received a data byte even though no operation will be performed.
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Table 6-2.
Pointer Register and Address Assignments
P7
0
0
0
0
P6
0
0
0
0
0
0
0
0
Pointer Register Value
P5 P4 P3 P2
0
0
0
0
0
0
0
0
0
0
0
0
P1
0
0
1
1
P0
0
1
0
1
Associated
Address
00h
01h
02h
03h
Register Selected
Temperature Register
Configuration Register
T
LOW
Limit Register
T
HIGH
Limit Register
To set the value of the Pointer Register, the Master must first initiate a Start condition followed by the AT30TS75's device address byte (1001AAA0 where "AAA" corresponds to the hard-wired A
2-0
address pins). After the AT30TS75 has received the proper address byte, the device will send an ACK to the Master. The Master must then send the appropriate data byte to the AT30TS75 to set the value of the Pointer Register.
After device power-up or reset, the Pointer Register defaults to 00h which is the Temperature Register location; therefore, the Temperature Register can be read from immediately after device power-up or reset without having to set the Pointer Register.
Figure 6-1. Write Pointer Register
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
SCK
SDA
Start by
Master
Address Byte Pointer Register Byte
1 0 0 1 A A A 0 0 P7 P6 P5 P4 P3 P2 P1 P0 0
MSB MSB
ACK from
Slave
ACK from
Slave
Stop by
Master
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6.2
Temperature Register
The Temperature Register is a 16-bit Read-only Register that stores the digitized value of the most recent temperature measurement. The temperature data value is represented in the twos complement format, and, depending on the resolution selected, up to 12 bits of data will be available for output with the remaining LSBs being fixed in the Logic 0 state. The Temperature Register can be read at any time, and since temperature measurements are performed in the background, reading the Temperature Register does not affect any other operation that may be in progress.
The MSB (bit 15) of the Temperature Register contains the sign bit of the measured temperature value with a zero indicating a positive number and a one indicating a negative number. The remaining MSBs of the Temperature Register
shows some examples for 12-bit resolution Temperature Register data values and the associated temperature readings.
Table 6-3.
Temperature Register Format
Resolution
12 bits
11 bits
10 bits
9 bits
Upper Byte Lower Byte
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Sign TD TD TD TD TD TD TD TD TD TD TD 0 0 0 0
Sign TD
Sign TD
Sign TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
TD
0
TD
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Note: TD = Temperature Data
Table 6-4.
12-bit Resolution Temperature Data/Values Examples
Temperature
+125°C
+100°C
+75°C
+50.5°C
+25.25°C
+10.125°C
+0.0625°C
0°C
-0.0625°C
-10.125°C
-25.25°C
-50.5°C
-55°C
Temperature Register Data
Binary Value
0111 1101 0000 0000
Hex Value
7D00h
0110 0100 0000 0000
0100 1011 0000 0000
0011 0010 1000 0000
0001 1001 0100 0000
6400h
4B00h
3200h
1940h
0000 1010 0010 0000
0000 0000 0001 0000
0000 0000 0000 0000
1111 1111 1111 0000
1111 0101 1110 0000
1110 0111 1100 0000
1100 1110 1000 0000
1100 1001 0000 0000
0A20h
0010h
0000h
FFF0h
F5E0h
E7C0h
CE80h
C900h
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After each temperature measurement and digital conversion is complete, the new temperature data is loaded into the
Temperature Register if the register is not currently being read. If a Read is in progress, then the previous temperature data will be output.
In order to read the most recent temperature measurement data, the Pointer Register must be set or have been previously set to 00h. If the Pointer Register has already been set to 00h, the Temperature Register can be read by having the Master first initiate a Start condition followed by the AT30TS75 device address byte (1001AAA1 where "AAA" corresponds to the hard-wired A
2-0
address pins). After the AT30TS75 has received the proper address byte, the device will send an ACK to the Master. The Master can then read the upper byte of the Temperature Register. After the upper byte of the Temperature Register has been clocked out of the AT30TS75, the Master must send an ACK to indicate that it is ready for the lower byte of the temperature data. The AT30TS75 will then clock out the lower byte of the
Temperature Register, after which the Master must send a NACK to end the operation. When the AT30TS75 receives the NACK, it will release the SDA line so that the Master can send a Stop or repeated Start condition. If the Master does not send a NACK but instead sends an ACK after the lower byte of the Temperature Register has been clocked out, then the device will repeat the sequence by outputting new temperature data starting with the upper byte of the Temperature
Register.
If 8-bit temperature resolution is satisfactory, then the lower byte of the Temperature Register does not need to be read.
In this case, the Master would send a NACK instead of an ACK after the upper byte of the Temperature Register has been clocked out of the AT30TS75. When the AT30TS75 receives the NACK, the device will know that it should not send out the lower byte of the Temperature Register and will instead release the SDA line so the Master can send a Stop or repeated Start condition.
The Temperature Register defaults to 0000h after device power-up or reset; therefore, the system should wait the maximum conversion time (t
CONV
) for the selected resolution before attempting to read valid temperature data. Since the
Temperature Register is a Read-only register, any attempts to write to the register will be ignored, and the device will subsequently respond by sending a NACK back to the Master.
Figure 6-2. Read Temperature Register – 16 Bits
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
SCK
Address Byte Temperature Register Upper Byte Temperature Register Lower Byte
SDA
Note:
Start by
Master
MSB MSB MSB
ACK from
Slave
ACK from
Master
Assumes the Pointer Register was previously set to point to the Temperature Register.
NACK from
Master
Stop by
Master
Figure 6-3. Read Temperature Register – 8 Bits
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
SCK
Address Byte Temperature Register Upper Byte
SDA
Start by
Master
Note:
MSB MSB
ACK from
Slave
NACK from
Master
Stop by
Master
Assumes the Pointer Register was previously set to point to the Temperature Register.
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6.3
Configuration Register
The Configuration Register is used to control key operational modes and settings of the device such as the One-shot mode, the temperature conversion resolution, the fault tolerance queue, the ALERT pin polarity, the Alarm Thermostat mode, and the Shutdown mode. The Configuration Register is a 16-bit wide Read/Write register; however, only the first
8-bits of the register are actually used while the least-significant 8-bits are reserved for future use to provide an upward migration path to other temperature sensor devices that have enhanced features. Since only the most-significant 8-bits of the Configuration Register are used, the device is backwards compatible to industry standard LM75-type temperature sensors that use 8-bit wide registers.
After device power-up or reset, the Configuration Register defaults to 0000h; therefore, the system should update the
Configuration Register with the desired settings prior to attempting to read the Temperature Register unless the default
Configuration Register settings are satisfactory for the application.
Table 6-5.
Configuration Register
Bit
15
14:13
12:11
10
9
8
7:0
Name
OS
R1:R0
FT1:FT0
POL
CMP/INT
SD
RFU
One-shot Mode
Conversion Resolution
Fault Tolerance Queue
ALERT Pin Polarity
Alarm Thermostat Mode
Shutdown Mode
Reserved for Future Use
Type Description
0 Normal Operation (Default)
R/W
1 Perform One-shot Measurement (Valid in Shutdown Mode Only)
00 9-bits (Default)
R/W
01 10-bits
10 11-bits
11 12-bits
00 Alarm after 1 Fault (Default)
R/W
R/W
R/W
R/W
R
01 Alarm after 2 Consecutive Faults
10 Alarm after 4 Consecutive Faults
11 Alarm after 6 Consecutive Faults
0 ALERT pin is Active Low (Default)
1 ALERT pin is Active High
0 Comparator Mode (Default)
1 Interrupt Mode
0 Temperature Sensor Performing Active Measurements (Default)
1 Temperature Sensor Disabled and Device In Shutdown Mode
0 Reserved for Future Use
To set the value of the Configuration Register, the Master must first initiate a Start condition followed by the AT30TS75's device address byte (1001AAA0 where "AAA" corresponds to the hard-wired A
2-0
address pins). After the AT30TS75 has received the proper address byte, the device will send an ACK to the Master. The Master must then send the appropriate Pointer Register byte of 01h to select the Configuration Register. After the Pointer Register byte of 01h has been sent, the AT30TS75 will send another ACK to the Master. After receiving the ACK from the AT30TS75, the Master must then send the appropriate data byte to the AT30TS75 to set the value of the Configuration Register. Only the first data byte sent to the AT30TS75 will be recognized as valid data; any subsequent bytes received by the device will simply be ignored. If the Master does not send a complete byte of Configuration Register data prior to issuing a Stop or repeated Start condition, then the AT30TS75 will ignore the data and the contents of the Configuration Register will be unchanged.
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6.3.1
OS Bit
The OS bit is used to enable the One-shot Temperature Measurement mode. When a Logic 1 is written to the OS bit while the AT30TS75 is in the Shutdown mode, the device will become active and perform a single temperature measurement and conversion. After the Temperature Register has been updated with the measured temperature data, the device will return to the low-power Shutdown mode and clear the OS bit.
Writing a one to the OS bit when the device is not in the Shutdown mode will have no affect. When reading the
Configuration Register, the OS bit will always be read as a Logic 0.
6.3.2
R1:R0 Bits
The R1 and R0 bits are used to select the conversion resolution of the internal sigma-delta ADC. Four possible resolutions can be set to maximize for either higher resolution or faster conversion times. The R1 and R0 bits default to the Logic 0 state after device power-up or reset to retain backwards compatibility to industry-standard LM75-type devices.
Table 6-6.
Conversion Resolution
R1
0
0
1
1
R0
0
1
0
1
Conversion Resolution
9 bits
10 bits
11 bits
12 bits
0.5°C
0.25°C
0.125°C
0.0625°C
Conversion Time
25ms
50ms
100ms
200ms
6.3.3
FT1:FT0 Bits
The FT1 and FT0 bits are used to set the fault tolerance queue value which defines how many consecutive faults must occur before the ALERT pin will be activated (see
Section 5.3.1 “Fault Tolerance Limits” on page 10 ). The FT1 and FT0
bit settings provide four different fault values as detailed in
Table 6-7 . After the device powers up or resets, both the FT1
and FT0 bits will default to the Logic 0 state.
Table 6-7.
Fault Tolerance Queue
NVFT1
0
0
1
1
NVFT0
0
1
0
1
Consecutive Faults Required
1
2
4
6
6.3.4
POL Bit
The ALERT pin polarity is controlled by the POL bit. When the POL bit is in the Logic 0 state, the ALERT pin will be an active low output (the default setting after device power-up or reset). To configure the ALERT pin as an active high output, the POL bit must be set to the Logic 1 state.
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6.3.5
CMP/INT Bit
The CMP/INT bit controls whether the device will operate in the Comparator mode or the Interrupt mode. Setting the
CMP/INT bit to the Logic 0 state will put the device into the Comparator mode (default after device power-up or reset).
Alternatively, when the CMP/INT bit is set to the Logic 1 state, then the device will operate in the Interrupt mode. The function of the ALERT pin changes based on the CMP/INT bit setting.
6.3.6
SD Bit
The SD bit is used to enable or disable the device's Shutdown mode. When the SD bit is in the Logic 0 state (default after device power-up or reset), the device will be in the normal operational mode and perform continuous temperature measurements and conversions. When the SD bit is set to the Logic 1 state, the device will finish the current temperature measurement and conversion and will store the result in the Temperature Register, after which the device will then enter the Shutdown mode.
Resetting the SD bit back to a Logic 0 will return the device to the normal operating mode.
Figure 6-4. Write to Configuration Register
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
SCK
Address Byte Pointer Register Byte Configuration Register Upper Byte
SDA
Start by
Master
MSB
ACK from
Slave
MSB
ACK from
Slave
MSB
ACK from
Slave
Stop by
Master
Figure 6-5. Read from Configuration Register
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
SCK
Address Byte
Configuration Register Upper Byte
SDA
Note:
Start by
Master
MSB MSB
ACK from
Slave
NACK from
Master
Stop by
Master
Assumes the Pointer Register was previously set to point to the Configuration Register.
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6.4
T
LOW
and T
HIGH
Limit Registers
The 16-bit T
LOW
and T
HIGH
Limit Registers store the user-programmable lower and upper temperature limits for the temperature alarm. Like the Temperature Register, the temperature data values of the T
LOW
and T
HIGH
Limit Registers are stored in the twos complement format with the MSB (bit 15) of the registers containing the sign bit (zero indicates a positive number and a one indicates a negative number).
As with the Temperature Register, the resolution selected by the R1 and R0 bits of the Configuration Register will determine how many bits of the T
LOW
T
HIGH
and T
HIGH
Limit Registers will be used. Therefore, when writing to the T
LOW
and
Limit Registers, up to 12 bits of data will be recognized by the device with the remaining LSBs being internally fixed to the Logic 0 state. Similarly, when reading from the registers, up to 12 bits of data will be output from the device with the remaining LSBs fixed in the Logic 0 state.
Table 6-8.
T
LOW
Limit Register and T
HIGH
Limit Register Format
Resolution
12 bits
11 bits
10 bits
9 bits
Upper Byte Lower Byte
Bit 15 Bit 14 Bit 13 Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Sign TD TD TD TD TD TD TD TD TD TD TD 0 0 0 0
Sign TD TD TD TD TD TD TD TD TD TD 0 0 0 0 0
Sign TD
Sign TD
TD TD
TD TD
TD TD
TD TD
TD TD
TD TD
TD TD
TD 0
0
0
0
0
0
0
0
0
0
0
0
0
Note: TD = Temperature Data
To set the value of either the T
LOW
or T
HIGH
Limit Register, the Master must first initiate a Start condition followed by the
AT30TS75 device address byte (1001AAA0 where "AAA" corresponds to the hard-wired A
2-0
address pins). After the
AT30TS75 has received the proper address byte, the device will send an ACK to the Master. The Master must then send the appropriate Pointer Register byte of 02h to select the T
LOW
Limit Register or 03h to select the T
HIGH
Limit Register.
After the Pointer Register byte has been sent, the AT30TS75 will send another ACK to the Master. After receiving the
ACK from the AT30TS75, the Master must then send two data bytes to the AT30TS75 to set the value of the T
LOW
T
HIGH
or
Limit Register. Any subsequent bytes sent to the AT30TS75 will simply be ignored by the device. If the Master does not send two complete bytes of data prior to issuing a Stop or repeated Start condition, then the AT30TS75 will ignore the data and the contents of the register will not be changed.
In order to read the T
LOW
or T
HIGH
Limit Register, the Pointer Register must be set or have been previously set to 02h to select the T
LOW
Limit Register or 03h to select the T
HIGH
Limit Register (if the previous operation was a Write to one of the registers, then the Pointer Register will already be set for that particular limit register). If the Pointer Register has already been set appropriately, the T
LOW
or T
HIGH
Limit Register can be read by having the Master first initiate a Start condition followed by the AT30TS75 device address byte (1001AAA1 where "AAA" corresponds to the hard-wired A
2-0
address pins). After the AT30TS75 has received the proper address byte, the device will send an ACK to the Master. The Master can then read the upper byte of the T
LOW
or T
HIGH
Limit Register. After the upper byte of the register has been clocked out of the AT30TS75, the Master must send an ACK to indicate that it is ready for the lower byte of data. The AT30TS75 will then clock out the lower byte of the register, after which the Master must send a NACK to end the operation. When the AT30TS75 receives the NACK, it will release the SDA line so that the Master can send a Stop or repeated Start condition. If the Master does not send a NACK but instead sends an ACK after the lower byte of the register has been clocked out, then the device will repeat the sequence by outputting the data again starting with the upper byte of the register.
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The T
LOW
Limit Register defaults to 4B00h (+75°C) and the T
HIGH
Limit Register defaults to 5000h (+80°C) after the device powers up or resets; therefore, both registers will need to be modified after power-up/reset if these default temperature limits are not satisfactory for the application. The value of the high temperature limit stored in the T
HIGH
Register must be greater than the value of the low temperature limit stored in the T
LOW
ALERT function to work properly; otherwise, the ALERT pin will output erroneous results and will falsely signal
Limit
Limit Register in order for the temperature alarms. In addition, changing either value of the T
HIGH counter to reset back to zero.
or T
LOW
Limit Register will cause the internal fault
Figure 6-6. Write to T
LOW
or T
HIGH
Limit Register
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
SCK
Address Byte Pointer Register Byte
SDA
Start by
Master
MSB
ACK from
Slave
MSB
ACK from
Slave
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
T
LOW
or T
HIGH
Limit Register
Upper Byte
T
LOW
or T
HIGH
Limit Register
Lower Byte
D15 D14 D13 D12 D11 D10 D9 D8 0 D7 D6 D5 D4 D3 D2 D1 D0 0
MSB MSB
ACK from
Slave
ACK from
Slave
Stop by
Master
Figure 6-7. Read from T
LOW
or T
HIGH
Limit Register
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
SCK
Address Byte
T
LOW
or T
HIGH
Limit Register
Upper Byte
T
LOW
or T
HIGH
Limit Register
Lower Byte
SDA
Note:
Start by
Master
MSB MSB MSB
ACK from
Slave
ACK from
Master
Assumes the Pointer Register was previously set to point to the T
LOW
or T
HIGH
Limit Register.
NACK from
Master
Stop by
Master
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
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7.
SMBus Features and I
2
C General Call
7.1
SMBus Alert
The AT30TS75 utilizes the ALERT pin to support the SMBus Alert function when the Alarm Thermostat mode is set to the
Interrupt mode (the CMP/INT bit of the Configuration Register is set to one) and the ALERT pin polarity is set to active low (the POL bit of the Configuration Register is set to zero). The AT30TS75 is a slave-only device, and normally, slave devices on the SMBus cannot signal to the Master that they want to communicate. However, the AT30TS75 uses the
SMBus Alert function (the ALERT pin) to signal to the Master that it wants to communicate.
Several SMBus Alert pins from different slave devices can be connected to a common SMBus Alert input on the Master.
When the SMBus Alert input on the Master is pulled low by one of the slave devices, the Master can perform a specialized Read operation from the slave devices to determine which device sent the SMBus Alert signal.
The specialized Read operation is known as an SMBus ARA and requires that the Master first initiate a Start condition followed by the SMBus ARA code of 00011001. The slave device that generated the SMBus Alert signal will respond to the Master with an ACK. After sending the ACK, the slave device will then output its own device address (1001AAA for the AT30TS75 where "AAA" corresponds to the hard-wired A
2-0
address pins) on the bus. Since the device address is seven bits long, the remaining eighth bit (the LSB) is used as an indicator to notify the Master which temperature limit caused the alarm (the LSB will be a Logic 1 if the T
HIGH
T
LOW
limit was exceeded).
limit was met or exceeded, and the LSB will be a Logic 0 if the
The SMBus ARA can activate several slave devices at the same time; therefore, if more than one slave responds, standard SMBus arbitration rules apply and the device with the lowest address wins the arbitration. The device winning the arbitration will clear its SMBus Alert output after it has responded to the SMBus ARA and provided its device address.
All other devices with higher addresses do not generate an ACK and continue to hold their SMBus Alert outputs low until cleared. The Master will continue to issue SMBus ARA sequences until all slave devices that generated an SMBus Alert signal have responded and cleared their SMBus Alert outputs.
Figure 7-1. SMBus Alert
1 2 3 4 5 6 7 8 9 1 2 3 4 5 6 7 8 9
SCK
SMBus ARA Code AT30TS75 Device Address Byte
SDA
Note:
MSB MSB
Start by
Master
ACK from
Slave
NACK from
Master
Stop by
Master
The "Limit" bit (the LSB) of the device address byte will be "1" or "0" depending on if the T
HIGH was exceeded.
or T
LOW
limit
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
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7.2
SMBus Timeout
The AT30TS75 supports the SMBus Timeout feature in which the AT30TS75 will reset its serial interface and release the
SMBus (stop driving the bus and let SDA float high) if the SCL pin is held low for more than the minimum t
TIMEOUT specification. The AT30TS75 will be ready to accept a new Start condition before t
TIMEOUT
maximum has elapsed.
Figure 7-2. SMBus Timeout
t
TIMEOUT (MAX) t
TIMEOUT (MIN)
SCL
Device will release Bus and be ready to accept a new
Start Condition within this Time
7.3
General Call
The AT30TS75 will respond to an I
2
C general call address (0000000) from the Master only if the eighth bit (the LSB) of the general call address byte is zero. If the general call address byte is 00000000, then the device will send an ACK to the Master and await a command byte from the Master.
If the Master sends a command byte of 04h, then the AT30TS75 will re-latch the status of its address pins in case the system has assigned a new address to the device. If the Master sends a command byte of 06h (General Call Reset), then the AT30TS75 will re-latch the status of its address pins and perform a reset sequence. The reset sequence will reset all registers to their power-up defaults, and the device will be busy for a maximum time of t
POR
during the Reset operation.
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
24
8.
Electrical Specifications
8.1
Absolute Maximum Ratings*
Temperature under Bias . . . . . . . . . . . . . -55°C to +125°C
Storage Temperature . . . . . . . . . . . . . . . -65°C to +150°C
Supply voltage with respect to ground . . . . . . . . . . . . . . . . -0.5V to +7.0V
All other input voltages (including NC pins) with respect to ground . . . . . . . . . . . . -0.5V to V
CC
+ 0.5V
All output voltages with respect to ground . . . . . . . . . . . . -0.5V to V
CC
+ 0.5V
*Notice: Stresses beyond those listed under "Absolute
Maximum Ratings" may cause permanent damage to the device. Functional operation of the device at these ratings or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Voltage extremes referenced in the "Absolute Maximum Ratings" are intended to accommodate short duration undershoot/overshoot conditions and does not imply or guarantee functional device operation at these levels for any extended period of time.
8.2
DC and AC Operating Range
Operating Temperature (Case) Industrial High Temperature
V
CC
Power Supply
Notes: 1. Device operation is guaranteed from -40 ° C to +125 ° C.
2. Device operation is not guaranteed at -55
°
C but ensured by characterization.
Atmel AT30TS75
-55
2.7V to 5.5V
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
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8.3
DC Characteristics
Symbol Parameter Condition Min
I
CC
I
SD
Active Current
Shutdown Mode Current
Active Temperature Conversions,
Bus Inactive, V
CC
= 3.3V
Active Temperature Conversions,
Bus Inactive, V
CC
= Max
Active Temperature Conversions, f
SCL
= 400KHz, V
CC
= 3.3V
Active Temperature Conversions, f
SCL
= 400KHz, V
CC
= Max f
Active Temperature Conversions,
SCL
= 3.4MHz, V
CC
= 3.3V
f
Active Temperature Conversions,
SCL
= 3.4MHz, V
CC
= Max
Bus Inactive, V
CC
= 3.3V
Bus Inactive, V
CC
= Max f
SCL
= 400KHz, V
CC
= 3.3V
f
SCL
= 400KHz, V
CC
= Max f
SCL
= 3.4MHz, V
CC
= 3.3V
f
SCL
= 3.4MHz, V
CC
= Max
V
IN
= CMOS Levels
V
OUT
= CMOS Levels
I
LI
I
LO
V
IL
V
IH
V
OL1
V
OL2
Input Leakage Current
Output Leakage Current
Input Low Voltage
Input High Voltage
Output Low Voltage I
OL
= 3mA
Output Low Voltage, ALERT Pin I
OL
= 4mA
0.7 x V
CC
V
OH
Output High Voltage I
OH
= -100μA
Note: 1. Typical values characterized at T
A
= +25°C unless otherwise noted.
V
CC
- 0.2
Typ
75
100
125
180
350
400
0.6
1.1
115
170
310
360
Max
100
150
175
230
650
750
1.5
3.0
165
220
600
700
±1
±1
0.3 x V
CC
0.4
0.4
Unit s
μA
μA
V
V
V
μA
μA
V
V
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
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8.4
Temperature Sensor Accuracy and Conversion Characteristics
Symbol Parameter
T
ACC
Sensor Accuracy
Condition
T
A
= 0°C to +85°C
T
A
= -20°C to +105°C
T
A
= -40°C to +125°C
T
A
= -55°C to +125°C
Selectable 9 to 12 bits
Min Typ
±0.5
±1.0
±2.0
±3.0
T
RES
Conversion Resolution 0.5 (9 bits)
9-bit Resolution
10-bit Resolution
25
50 t
CONV
Conversion Time
11-bit Resolution
12-bit Resolution
100
200
Notes: 1. Typical values characterized at V
CC
= 3.3V, T
A
= +25°C unless otherwise noted.
2. Sensor accuracy characterized to this range but not tested or guaranteed.
Max
±1.0
±2.0
±3.0
0.0625 (12 bits)
37.5
75
150
300
Units
C
C ms
8.5
AC Characteristics
Fast Mode High-Speed Mode
Symbol Parameter
t
V t
OH t
BUF t
SUSTA t
HDSTA t
SUSTO t
NS t
TIMEOUT f
SCL t
SCLH t
SCLL t
R t
F t
SUDAT t
HDDAT
Serial Clock Frequency
Clock High Time
Clock Low Time
Clock/Data Input Rise Time
Clock/Data Input Fall Time
Data In Setup Time
Data In Hold Time
Output Valid Time
Output Hold Time
Bus Free Time Between Stop and Start Condition
Repeated Start Condition Setup Time (SCL High to SDA Low)
Start Condition Hold Time (SDA Low to SCL Low)
Stop Condition Setup Time (SCL High to SDA High)
Noise Suppression Input Filter Time
SMBus Timeout Time
Min
1
600
1300
50
0
0
600
50
50
50
25
Max
400
300
300
450
50
75
Min
1
10
0
0
160
50
50
50
25
Max
3400
100
100
50
10
75
C
LOAD
Capacitive Load for SCL and SDA Lines 400 100
Note: 1. Minimum clock frequency must be at least 1KHz to avoid activating the SMBus Timeout feature.
ns ns ns ms pF ns ns ns ns ns ns ns ns
Units
KHz ns ns
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
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Figure 8-1. SMBus/I
2
C Timing Diagram
t t t
SCKL
SCL
SDA t
SUDAT
IN t
HDDAT
IN t
R
OUT t
OH t
V
OUT
Start
Condition t
F t
SUSTO t
BUF
Stop
Condition
Start
Condition t
HDSTA
IN t
SUSTA
Repeated Start
Condition
IN
8.6
Power-up Conditions
Symbol
t
POR
V
POR
Parameter
Power-on Reset Time
Power-on Reset Voltage Range
Min
1.7
Max
500
2.3
Units
μs
V
Figure 8-2. Power-up Timing
V
CC
V
CC
(min)
V
POR
(max)
V
POR
(min)
Do Not Attempt
Device Access
During this Time
Device Access Permitted t
POR
Time
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
28
8.7
Pin Capacitance
Symbol Parameter Min
C
I/O
C
IN
Input/Output Capacitance (SDA and ALERT pins)
Input Capacitance (A
2-0
and SCL pins)
V
I/O
= 0V
V
IN
= 0V
Note: 1. Not 100% tested (value guaranteed by design and characterization).
8.8
Input Test Waveforms and Measurement Levels
AC
Input
Levels
0.9V
CC
0.1V
CC t
R
, t
F
< 5ns (10% to 90%)
V
CC
2
AC
Measurement
Level
Max
8
6
Units
pF pF
8.9
Output Test Load
Device
Under
Test
100pF
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
29
9.
Ordering Information
9.1
Atmel Ordering Code Detail
A T 3 0 T S 7 5 - S S 8 - B
Atmel Designator
Product Family
30TS = Digital Temperature Sensor
Device Type
Shipping Carrier Option
B = Bulk (tubes)
T = Tape and reel
Device Grade
8 = Green, NiPdAu lead finish,
Industrial high temperature range
(–40°C to +125°C) Accuracy guaranteed
Package Option
SS = 8-lead, 0.150" wide SOIC
XM = 8-lead, 3 x 3mm MSOP
MA = 8-pad, 2 x 3 x 0.6mm
9.2
Green Package Options (Pb/Halide-free/RoHS Compliant)
Atmel Ordering Code
AT30TS75-SS8-B
AT30TS75-SS8-T
AT30TS75-XM8-B
AT30TS75-XM8-T
AT30TS75-MA8-T
Note:
Package
8S1
8XM
8MA2
Lead (Pad)
Finish
NiPdAu
Operating
Voltage
2.7V to 5.5V
The shipping carrier option code is not marked on the devices.
Max. Freq.
(KHz)
3400
Operation Range
Industrial High Temperature
(-55°C to +125°C)
8S1
8XM
8MA2
Package Type
8-lead, 0.150" wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8-lead, 3 x 3 mm, Plastic Miniature Small Outline (MSOP)
8-pad, 2 x 3 x 0.6 mm, Thermally Enhanced Plastic Ultra Thin Dual Flat No Lead (UDFN)
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
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10.
Part Marking Detail
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
31
11.
Packaging Information
11.1 8S1 - JEDEC SOIC
C
1
E
E1
TOP VIEW
N
L
Ø
END VIEW
e b
D
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc.
Package Drawing Contact:
TITLE
A
A1
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
NOM
MAX
NOTE
A 1.35 – 1.75
A1 0.10 – 0.25 b 0.31 – 0.51
C 0.17 – 0.25
D 4.80
E1 3.81
–
–
5.05
3.99
E 5.79 – 6.20
e 1.27 BSC
L 0.40 – 1.27
Ø 0° – 8°
8S1, 8-lead (0.150” Wide Body), Plastic Gull
Wing Small Outline (JEDEC SOIC)
GPC
SWB
6/22/11
DRAWING NO.
REV.
8S1 G
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
32
11.2 8XM - MSOP
3 2 1
Pin 1
E
-B-
CL
E1
1
1 2 3
0.20
C
2X
(N/2 TIPS)
B A N
3
TOP VIEW
SEE
DETAIL "A"
A
2
N b
BOTTOM VIEW
END VIEW
e
A
0.25
BSC
0.07 R. MIN
2 PLACES
SEATING PLANE
0.10
C
4
L 2
A
1
-C-
-H-
D
1
SIDE VIEW
-A-
DETAIL 'A'
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
NOM MAX NOTE
NOTES:
1.
2.
3.
DIMENSIONS "D" & "E1" DO NOT INCLUDE MOLD
FLASH OR PROTRUSIONS, AND ARE MEASURED
AT DATUM PLANE -H- , MOLD FLASH OR
PROTRUSIONS SHALL NOT EXCEED 0.15mm PER SIDE.
DIMENSION IS THE LENGTH OF TERMINAL
FOR SOLDERING TO A SUBSTRATE.
TERMINAL POSITIONS ARE SHOWN FOR REFERENCE ONLY.
4.
FORMED LEADS SHALL BE PLANAR WITH RESPECT TO
ONE ANOTHER WITHIN 0.10mm AT SEATING PLANE.
5. DATUMS -A- AND -B- TO BE DETERMINED BY DATUM
PLANE -H- .
Package Drawing Contact:
A
1
0.05 0.15
A
2
0.75 0.95
b 0.22 - 0.38
E e
4.90 BSC
E
1
2.90
0.65 BSC
L
O C
0.40
0°
0.55
4°
0.80
8°
GPC
2
3/1/11
DRAWING NO. REV. TITLE
8XM, 8-lead, 3.0x3.0mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP/MSOP)
TZD 8XM A
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
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11.3 8MA2 - UDFN
E
3
4
1
2
Pin 1 ID
6
5
8
7
D
C
A2
A1
A b (8x)
8
7
6 e (6x)
5
Pin#1 ID
L (8x)
E2
K
1
2
D2
3
4
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL MIN
D
E
D2
E2
1.40
1.20
NOM
2.00 BSC
MAX
3.00 BSC
1.50 1.60
1.30 1.40
A
A1
A2
C
L
e
b
K
0.50
0.0
–
0.30
0.152 REF
0.35
0.18
0.20
NOTE
0.55
0.60
0.02 0.05
– 0.55
0.50 BSC
0.40
0.25 0.30
– –
3
Package Drawing Contact:
TITLE
8MA2, 8-pad, 2 x 3 x 0.6 mm Body, Thermally
Enhanced Plastic Ultra Thin Dual Flat No
Lead Package (UDFN)
GPC
YNZ
7/15/11
DRAWING NO. REV.
8MA2 B
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
34
12.
Errata
12.1 DC Characteristics
Issue: Devices currently do not meet the Active Current and Shutdown Mode Current specifications. The current version of the devices will consume slightly elevated levels current as indicated in the table below.
Datasheet
Specification
Typ
Max Symbol Parameter Condition
I
CC
I
SD
Active
Current
Shutdown
Mode
Current
Active Temperature Conversions,
Bus Inactive, V
CC
= 3.3V
Active Temperature Conversions,
Bus Inactive, V
CC
= Max
Active Temperature Conversion, f
SCL
= 400KHz, V
CC
= 3.3V
Active Temperature Conversions, f
SCL
= 400KHz, V
CC
= Max
Active Temperature Conversions, f
SCL
= 3.4MHz, V
CC
= 3.3V
Active Temperature Conversions, f
SCL
= 3.4MHz, V
CC
= Max
Bus Inactive, V
CC
= 3.3V
Bus Inactive, V
CC
= Max f
SCL
= 400KHz, V
CC
= 3.3V
f
SCL
= 400KHz, V
CC
= Max f
SCL
= 3.4MHz, V
CC
= 3.3V
75
100
125
180
350
400
0.6
1.1
115
170
310
100
150
175
230
650
750
1.5
3.0
165
220
600 f
SCL
= 3.4MHz, V
CC
= Max 360 700
Note: 1. Typical values characterized at T
A
= +25°C unless otherwise noted.
Errata Specification
Typ
Max
95 125
120 175
No Change No Change
200 250
No Change No Change
No Change No Change
0.6
1.1
125
1.6
3.5
No Change
185 No Change
No Change No Change
No Change No Change
Units
μA
μA
Workaround: None. Devices will consume higher levels of current as specified above.
Resolution:
The Active Current and Shutdown Mode Current consumption will be reduced with a new revision of the device. Please contact Atmel for the estimated availability of the new revision and the method for distinguishing between device versions.
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
35
12.2 Temperature Sensor Accuracy Characteristics
Issue: Devices currently do not meet the temperature sensor accuracy specification. The current version of the devices may have some slight deviation in accuracy over the V
CC
temperature range as indicated in the table below.
and
Symbol Parameter
Datasheet
Condition
Datasheet
Specification
Typ
Max
Errata
Condition
T
ACC
Sensor
Accuracy
T
A
= 0
C to +85C
V
CC
= 2.7V to 5.5V
T
A
= -20
C to +105C
V
CC
= 2.7V to 5.5V
T
A
= -40
C to +125C
V
CC
= 2.7V to 5.5V
T
A
= -55
C to +125C
V
CC
= 2.7V to 5.5V
±0.5
±1.0
±2.0
±1.0
±2.0
±3.0
±3.0
T
A
= 0
C to +55C
V
CC
= 2.7V to 3.6V
T
A
= -5
C to +90C
V
CC
= 2.7V to 3.6V
T
A
= -20
C to +125C
V
CC
= 2.7V to 3.6V
T
A
= -40
C to +125C
V
CC
= 2.7V to 5.5V
T
A
= 0
C to +55C
V
CC
= 3.6V to 5.5V
T
A
= -20
C to +105C
V
CC
= 3.6V to 5.5V
Notes: 1. Typical values characterized at V
CC
= 3.3V, T
A
= +25°C unless otherwise noted.
2. Sensor accuracy characterized to this range but not tested or guaranteed.
Errata
Specification
Max
±1.0
±1.0
±2.0
±3.0
±1.0
±2.0
±1.5
±2.0
±3.0
±2.0
±3.0
Units
C
Workaround: None. Devices may not meet the original accuracy conditions as specified above.
Resolution:
The temperature sensor accuracy issues will be improved with a new revision of the device with the goal to meet the original specified accuracy conditions. Please contact Atmel for the estimated availability of the new revision and the method for distinguishing between device versions.
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
36
12.3 Fault Counter
Issue:
The internal fault counter will be reset when updating the Configuration Register, the T
HIGH
Register, or the T
LOW
Limit Register.
Limit
Workaround: None. The current version of the device was intentionally designed to operate this way. However, it has been discovered that resetting of the fault counter when updating the registers is not preferred.
Resolution:
The operation of the device will be changed with a new revision of the device so that updating the
Configuration Register, the T
HIGH
Limit Register, or the T
LOW
Limit Register will not affect the internal fault counter. Please contact Atmel for the estimated availability of the new revision and the method for distinguishing between device versions.
12.4 ALERT pin
Issue: Depending on Power supply Ramp time, the ALERT pin may not be configured in the proper state to be a true open drain.
Workaround: The ALERT pin must be pulled-high using an external pull-up resistor even when it is not used.
Care must also be taken to prevent this pin from being shorted directly to ground without a resistor at any time whether during testing or normal operation.
Resolution:
The operation of the ALERT Pin will be changed with a new revision of the device so that it is a true open drain.
13.
Revision History
Doc. Rev.
Date
8748B
8748A
04/2012
03/2011
Comments
Update alert pin’s function description and errata.
Update Power-up Timing figure.
Add device operation temperatures (–40°C to +125°C) accuracy guaranteed.
Add sensor accuracy typical ±3.0 and remove value from max.
Correct Clock High Time max value from 40KHz to 400KHz.
Change 45μA to 75μA for low power dissipation typical active current.
Change 0.1μA to 1μA for Shutdown mode typical active current.
Change 200 to 500 for POR Time max value.
Remove preliminary status.
Update template.
Inital document release.
Atmel AT30TS75 [DATASHEET]
8748B–DTS–4/12
37
Atmel Corporation
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USA
Tel: (+1) (408) 441-0311
Fax: (+1) (408) 487-2600 www.atmel.com
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