High Speed Clock Sources and Their Effect on Electromagnetic Compatibility

High Speed Clock Sources and Their Effect on Electromagnetic Compatibility
System clocks of 100 MHz and above are becoming not
uncommon in today’s desktop personal systems. These
higher speed personal computers will generate more unwanted noise due to their faster frequencies and edge rates.
This noise can be in many forms, but the most common one
is EMI. EMI, ElectroMagnetic Interference can be defined as
a form of noise pollution. This noise occurs when changes
in electric fields which are created by the transitioning voltage signals combine with the magnetic field changes which
are created by the changing current directions. This Electromagnetic field can either be conducted via the printed circuit
traces or even at the same time radiated through the board
material and space to the outside world.
EMI is of interest to everyone. For this reason many govenments and their agencies have issued specifications requiring compliance by all the electro, electro-mechanical and
electronic equipment and their manufacturers. These specifications are to ensure that certain techniques are applied
so that the products can interoperate in a common environment such that no degradation of performance would existdue to internally or externally conducted or radiated EM
emissions. This is defined as the Electromagnetic Compatibility or simply the EMC.
National’s Clock Generation and Support product family
consists of clock drivers and generators which are designed
to operate above 50 MHz. At such speeds, the use of these
products requires many design consideration for noise reduction.
Below is a brief tutorial aimed at such purpose. In order to
minimize and contain possible electromagnetic radiation
one must first understand its causes and sources.
This theory simply states that within each system there exists a source (typically a high frequency component) that
generates the noise, and then there is a victim or receptor
of the same high frequency signal or noise (Figure 1) .
The coupling path can take two forms. If there is an actual
connection between the source and the receptor this coupling path causes the interference to take a conductive
form. A typical example would be ribbons, cables and
traces. If the source and the receptor are separated by
space and no physical connections exist between the two,
then the interference takes the form of radiation.
National Semiconductor
Application Note 988
Behzad Bakshandeh
July 1995
In practice most systems have both forms of interference,
conducted and radiated, and they co-exist at the same time.
TL/F/12399 – 1
FIGURE 1. Source, Path and Receptor
This theory can also be looked at differently. EMI sources,
paths and victims can be further separated into three categories within each system:
1. Power Plane/loop for all or individual components.
This consists of the power supply (receptor), power/ground
planes and traces (paths) and components (sources). This
loop can take the form of conducted interference since
there exists an actual connection between the power pins of
every component and the power supply via either power
planes or power traces (Figure 2) .
TL/F/12399 – 2
FIGURE 2. Power Distribution Loop
High Speed Clock Sources and Their Effect on Electromagnetic Compatibility
High Speed Clock Sources
and Their Effect on
2. Signal paths.
These paths are typically signal traces or cables that are
carrying high frequency signals thoughout the board, either
from point to point or in a bus fashion. The sources in this
case are the drivers or their outputs, while the victims are
the receivers or other components inputs. The path includes
the termination network as well as signal traces.
C1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
High Speed Clock Sources and Their Effect on
Electromagnetic Compatibility (Continued)
The EMI that is associated with these paths are both conducted and radiated. Conducted since there are actual connections between the sources and the receptors, while
there will be radiation as well since there exists a decoupling path thru different layers and their mutual inductances
to the power planes as well as outside of the enclosure.
Minimizing the coupled inductance between these paths
helps to minimize the overall radiated noise from the system. The coupled loop area between the adjacent traces
and characteristic impedance of the interconnect lines also
play an important role in the overall level of the created
TL/F/12399 – 4
Time Domain
TL/F/12399 – 5
Frequency Domain
FIGURE 4. Time to Frequency Domain
As it is shown the frequency component of any signal can
be represented by the amplitude, period, rise and fall time of
the same signal in real time. Reducing the amplitude (i.e.
from 5V to 3V signal swing) can reduce the total power
associated with the signal, while slowing the edge rates
helps to decrease the rate (slope) at which the energy is
Here are some suggestions in order to accomplish such:
FIGURE 3. Signal Path
3. Package radiation.
This form of EMI can be caused within the high speed components which are radiating outside as well as within the
system’s enclosure itself. This form can be classified as radiated EMI.
In this case the sources or the emitters are internal to the
components. This radiation is caused by electromagnetic
wave propagation through space or material. This is the
most important (least desired) form of EMI since it not only
involves other equipments, but also is the most difficult one
to contain.
Below are some recommendations that can help to minimize the electomagnetic interference. These suggestions
are common practices during the device and board level
system design. There are also some suggestions for decoupling the power planes and shielding the system.
# Rounded-off edges contain less high frequency components
# Minimizing output voltage swing reduces noise. Low Voltage technologies such as TTL, LVDS and 3.3V supply
will help to lower emissions.
# The edge rate must be as slow as they can be allowed
without violating overall system timing.
As the frequencies increase the parasitic effects of the
printed circuit boards become more visible. Some common
practice for minimizing such effects are listed below. Employing these guidelines can help to reduce the overall EMI
levels. Figure 5 represents some of these suggestions.
# Multi-layer Printed Circuit board should be used.
# Wire-wraps should be avoided since they can act as antennas.
These recommendations need to be implemented during
the chip level design. The primary task at this point is to
design the components in a way that not only they meet the
system’s timing requirements, but also they produce the
least amount of radiated and decoupled noise as well.
Figure 4 reflects a time domain translation of a trapezoidal
signal to its frequency domain. In order to reduce any emissions both the amplitude and slopes of this signal must be
# Power and ground PLANES must be used instead of
traces when possible.
# The effective distance between these planes should be
as small as possible to increase the bulk decoupling capacitance.
# No sockets!
# Multi-via pads for power and ground pad connections
can help to reduce the effective impedance.
# Trace lengths should be as short as possible.
High Speed Clock Sources and Their Effect on
Electromagnetic Compatibility (Continued)
# If Analog sections exist, use of Islands for both the power
# Twisted pairs of Coax (rigid, semi-rigid or flexable) cable
and ground busses are preferred for Isolation techniques.
must be used for lines that can not be placed on the
printed circuit board.
# High frequency signal traces must be sandwiched be-
# All I/O cables must be shielded and tied to chassis
tween ground traces or planes for minimizing cross talk.
ground with a low impedance connection.
# Avoid using sharp corners/bends on traces carrying high
# All the enclosure’s opening must be minimized in number
frequency signals.
and size.
# Number of outputs that need to be switching simulta-
One of the most susceptible victims of EMI is the power
supply. This path (loop) includes the power supply, planes
(VCC and Ground) as well as the device power pins. Minimizing the size of this loop helps to reduce EMI since it
helps to contain the noise in a smaller area.
neously must be kept at minimum for reduced X-talk.
# Terminations must be used for minimizing reflections.
Summary and Conclusion:
In order to meet the Electromagnetic standards, many design guidelines and practices must be followed. These practices if done properly will help to minimize the level of the
noise that is generated by the system.
In addition, it is preferred to spend the time and money prior
to production commitment compared to a costly last minute
fix to become EMI compliant.
# Bypass caps must be used, sometimes in multiples and
should be as close as possible to the device Vcc pin and
the ground plane.
# Bypassing must be done for ALL power pins.
# Multiple value bypass capacitors must be used in order
to filter out the right analog VCC will help to filter some
high frequency noise components.
1. Cocovich, Joe, EMI/RFI Board Design. National Semiconductor Application Note 643. Dec. 1989.
2. Gerke, Darryl & Kimmel, William. Designer’s Guide to
Electromagnetic compatibility. EDN Supplement Jan 20,
# Electrolytic capacitors are more preferred for decoupling.
And finally some suggestions to be observed throughout the
whole system design. These suggestions, no matter how
large the amount of noise, will help to contain the interferences within the system.
TL/F/12399 – 6
FIGURE 5. Suggested Printed Circuit Layout
High Speed Clock Sources and Their Effect on Electromagnetic Compatibility
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