BMC150 6-axis eCompass Bosch Sensortec

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BMC150 6-axis eCompass  Bosch Sensortec | Manualzz
Data sheet
BMC150
6-axis eCompass
Bosch Sensortec
BMC150: Data sheet
Document revision
1.0
Document release date
14 July 2014
Document number
BST-BMC150-DS000-04
Technical reference code(s)
0 273 141 156
Notes
Product photos and pictures are for illustration purposes only and may
differ from the real product’s appearance.
Datasheet
eCompass BMC150
Page 2
BMC150
ECOMPASS WITH 3-AXIS GEOMAGNETIC SENSOR
AND 12 BIT 3-AXIS ACCELEROMETER
Key features
Three-axis magnetic field sensor and 12bit three-axis accelerometer in one package
 Accelerometer can still be used independently from magnetometer operation
 Ultra-Small package
14-Pin LGA package, footprint 2.2 × 2.2mm2,
height 0.95 mm
 Digital interface
SPI (4-wire, 3-wire), I²C, 4 interrupt pins
(2 acceleration sensor, 2 magnetic sensor interrupt pins)
 Low voltage operation
VDD supply voltage range: 1.62V to 3.6V
VDDIO interface voltage range: 1.2V to 3.6V
 Flexible functionality
Acceleration ranges ±2g/±4g/±8g/±16g
Acceleration Low-pass filter bandwidths 1 kHz - <8Hz
 Magnetic field range
±1300µT (x, y-axis), ±2500µT (z-axis)
Magnetic field resolution of ~0.3µT
 On-chip FIFO
Integrated FIFO with a depth of 32 frames
 On-chip interrupt controller
Motion-triggered interrupt-signal generation for
- new data (separate for accelerometer and magnetometer)
- any-motion (slope) detection
- tap sensing (single tap / double tap)
- orientation recognition
- flat detection
- low-g/high-g detection
- magnetic Low-/High-Threshold detection
 Ultra-low power
Low current consumption (190µA @ 10 Hz including
accelerometer and magnetic sensor in low power preset),
short wake-up time, advanced features for system power
management
 Temperature range
-40 °C … +85 °C
 Temperature sensor
 RoHS compliant, halogen-free
Typical applications
 Tilt-compensated electronic compass for map rotation, navigation and augmented reality
 6-axis orientation for gaming
 Display profile switching
 Menu scrolling, tap / double tap sensing
 Pedometer / step counting
 Free-fall detection
 Drop detection for warranty logging
 Advanced system power management for mobile applications
 Gaming
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 3
General Description
The BMC150 is an integrated electronic compass solution for consumer market
applications. It comprises a 12bit leading edge triaxial, low-g acceleration sensor and an
ultra-low power, high precision triaxial magnetic field sensor. It allows measurements of
acceleration and magnetic field in three perpendicular axes. Performance and features
of both sensing technologies are carefully tuned and perfectly match the demanding
requirements of all 6-axis mobile applications such as electronic compass, navigation or
augmented reality.
An evaluation circuitry (ASIC) converts the output of the micromechanical sensing
structures (MEMS) to digital results which can be read out over the industry standard
digital interfaces.
Package and interfaces of the BMC150 have been designed to match a multitude of
hardware requirements. As the sensor features an ultra-small footprint and a flat
package, it is ingeniously suited for mobile applications.
The BMC150 offers ultra-low voltage operation (VDD voltage range from 1.62V to 3.6V,
VDDIO voltage range 1.2V to 3.6V) and can be programmed to optimize functionality,
performance and power consumption in customer specific applications. The
programmable interrupt engine sets new standards in terms of flexibility.
The BMC150 senses orientation, tilt, motion, shock, vibration and heading in cell
phones, handhelds, computer peripherals, man-machine interfaces, virtual reality
features and game controllers.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 4
Index of Contents
1. SPECIFICATION ........................................................................................................................ 7
1.1 COMPASS ELECTRICAL SPECIFICATION ................................................................................. 7
1.2 ACCELEROMETER SPECIFICATION ........................................................................................ 8
1.3 MAGNETOMETER SPECIFICATION ....................................................................................... 11
2. ABSOLUTE MAXIMUM RATINGS .......................................................................................... 15
3. BLOCK DIAGRAM ................................................................................................................... 16
4. FUNCTIONAL DESCRIPTION ................................................................................................. 17
4.1 SUPPLY VOLTAGE AND POWER MANAGEMENT ..................................................................... 17
4.2 POWER MODES ................................................................................................................. 17
4.2.1 ACCELEROMETER POWER MODES ................................................................................................. 18
4.2.2 MAGNETOMETER POWER MODES .................................................................................................. 22
4.2.3 BMC150 OVERALL POWER CONSUMPTION .................................................................................... 25
4.3 SENSOR DATA .................................................................................................................. 26
4.3.1 ACCELERATION DATA ................................................................................................................... 26
4.3.2 TEMPERATURE SENSOR................................................................................................................ 27
4.3.3 MAGNETIC FIELD DATA.................................................................................................................. 27
4.3.4 MAGNETIC FIELD DATA TEMPERATURE COMPENSATION................................................................... 29
4.4 SELF-TEST ....................................................................................................................... 30
4.4.1 ACCELEROMETER SELF-TEST ........................................................................................................ 30
4.4.2 MAGNETOMETER SELF-TEST ......................................................................................................... 31
4.5 ACCELEROMETER OFFSET COMPENSATION ......................................................................... 33
4.5.1 SLOW COMPENSATION.................................................................................................................. 35
4.5.2 FAST COMPENSATION ................................................................................................................... 35
4.5.3 MANUAL COMPENSATION .............................................................................................................. 36
4.5.4 INLINE CALIBRATION ..................................................................................................................... 36
4.6 NON-VOLATILE MEMORY .................................................................................................... 37
4.6.1 ACCELEROMETER NON-VOLATILE MEMORY .................................................................................... 37
4.6.2 MAGNETOMETER NON-VOLATILE MEMORY ..................................................................................... 37
4.7 ACCELEROMETER INTERRUPT CONTROLLER ....................................................................... 38
4.7.1 GENERAL FEATURES .................................................................................................................... 38
4.7.2 MAPPING TO PHYSICAL INTERRUPT PINS (INTTYPE TO INT PIN#) ..................................................... 39
4.7.3 ELECTRICAL BEHAVIOR (INT PIN# TO OPEN-DRIVE OR PUSH-PULL) .................................................. 40
4.7.4 NEW DATA INTERRUPT .................................................................................................................. 40
4.7.5 SLOPE / ANY-MOTION DETECTION .................................................................................................. 41
4.7.6 TAP SENSING ............................................................................................................................... 43
4.7.7 ORIENTATION RECOGNITION ......................................................................................................... 46
4.7.8 FLAT DETECTION .......................................................................................................................... 51
4.7.9 LOW-G INTERRUPT ....................................................................................................................... 52
4.7.10 HIGH-G INTERRUPT .................................................................................................................... 53
4.7.11 NO-MOTION / SLOW MOTION DETECTION ...................................................................................... 54
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 5
4.8 ACCELEROMETER SOFTRESET ........................................................................................... 56
4.9 MAGNETOMETER INTERRUPT CONTROLLER ........................................................................ 57
4.9.1 GENERAL FEATURES .................................................................................................................... 57
4.9.2 ELECTRICAL BEHAVIOR OF MAGNETIC INTERRUPT PINS ................................................................... 58
4.9.3 DATA READY / DRDY INTERRUPT .................................................................................................. 58
4.9.4 LOW-THRESHOLD INTERRUPT........................................................................................................ 59
4.9.5 HIGH-THRESHOLD INTERRUPT ....................................................................................................... 60
4.9.6 OVERFLOW .................................................................................................................................. 61
5. FIFO OPERATION.................................................................................................................... 62
5.1 FIFO OPERATING MODES ................................................................................................. 62
5.2 FIFO DATA READOUT ....................................................................................................... 63
5.3 FIFO FRAME COUNTER AND OVERRUN FLAG ..................................................................... 63
5.4 FIFO INTERRUPTS ............................................................................................................ 64
6. ACCELEROMETER REGISTER DESCRIPTION.................................................................... 65
6.1 GENERAL REMARKS .......................................................................................................... 65
6.2 REGISTER MAP ................................................................................................................. 66
6.3 CHIP ID ............................................................................................................................ 67
6.4 ACCELERATION DATA ........................................................................................................ 68
6.5 TEMPERATURE DATA ......................................................................................................... 72
6.6 STATUS REGISTERS .......................................................................................................... 73
6.7 G-RANGE SELECTION ......................................................................................................... 77
6.8 BANDWIDTHS .................................................................................................................... 78
6.9 POWER MODES ................................................................................................................. 79
6.10 SPECIAL CONTROL SETTINGS ........................................................................................... 81
6.11 INTERRUPT SETTINGS ...................................................................................................... 83
6.12 SELF-TEST ..................................................................................................................... 96
6.13 NON-VOLATILE MEMORY CONTROL (EEPROM)................................................................. 97
6.14 INTERFACE CONFIGURATION ............................................................................................ 98
6.15 OFFSET COMPENSATION.................................................................................................. 99
6.16 NON-VOLATILE MEMORY BACK-UP .................................................................................. 102
6.17 FIFO CONFIGURATION AND FIFO DATA .......................................................................... 103
7. MAGNETOMETER REGISTER DESCRIPTION ................................................................... 105
7.1 GENERAL REMARKS ........................................................................................................ 105
7.2 REGISTER MAP ............................................................................................................... 105
7.3 CHIP ID .......................................................................................................................... 106
7.4 MAGNETIC FIELD DATA .................................................................................................... 106
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 6
7.5 INTERRUPT STATUS REGISTER ......................................................................................... 109
7.6 POWER AND OPERATION MODES, SELF-TEST AND DATA OUTPUT RATE CONTROL REGISTERS 110
7.7 INTERRUPT AND AXIS ENABLE SETTINGS CONTROL REGISTERS ........................................... 112
7.8 NUMBER OF REPETITIONS CONTROL REGISTERS ............................................................... 114
8. DIGITAL INTERFACES .......................................................................................................... 116
8.1 SERIAL PERIPHERAL INTERFACE (SPI) .............................................................................. 117
8.2 INTER-INTEGRATED CIRCUIT (I²C) .................................................................................... 121
8.2.1 SPI AND I²C ACCESS RESTRICTIONS .......................................................................................... 126
9. PIN-OUT AND CONNECTION DIAGRAM............................................................................. 127
9.1 PIN-OUT ......................................................................................................................... 127
9.2 CONNECTION DIAGRAM 4-WIRE SPI ................................................................................. 128
9.3 CONNECTION DIAGRAM 3-WIRE SPI ................................................................................. 129
9.4 CONNECTION DIAGRAM I2C .............................................................................................. 130
10. PACKAGE ............................................................................................................................ 131
10.1 OUTLINE DIMENSIONS.................................................................................................... 131
10.2 SENSING AXES ORIENTATION ......................................................................................... 132
10.3 ANDROID AXES ORIENTATION ......................................................................................... 133
10.4 LANDING PATTERN RECOMMENDATION ........................................................................... 135
10.5 MARKING...................................................................................................................... 136
10.5.1 MASS PRODUCTION DEVICES .................................................................................................... 136
10.5.2 ENGINEERING SAMPLES ............................................................................................................ 136
10.6 SOLDERING GUIDELINES ................................................................................................ 137
10.7 HANDLING INSTRUCTIONS .............................................................................................. 138
10.8 TAPE AND REEL SPECIFICATION...................................................................................... 139
10.8.1 TAPE AND REEL DIMENSIONS..................................................................................................... 139
10.8.2 ORIENTATION WITHIN THE REEL................................................................................................. 139
10.9 ENVIRONMENTAL SAFETY .............................................................................................. 140
10.9.1 HALOGEN CONTENT ................................................................................................................. 140
10.9.2 INTERNAL PACKAGE STRUCTURE ............................................................................................... 140
11. LEGAL DISCLAIMER........................................................................................................... 141
11.1 ENGINEERING SAMPLES................................................................................................. 141
11.2 PRODUCT USE .............................................................................................................. 141
11.3 APPLICATION EXAMPLES AND HINTS ............................................................................... 141
12. DOCUMENT HISTORY AND MODIFICATION ................................................................... 142
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 7
1. Specification
If not stated otherwise, the given values are over lifetime and full performance temperature and
voltage ranges, minimum/maximum values are ±3. The specifications are split into
accelerometer part and magnetometer part of BMC150.
1.1 Compass electrical specification
Table 1: Compass electrical parameter specification
Compass Operating Conditions
Parameter
Supply Voltage
Internal Domains
Supply Voltage
I/O Domain
Voltage Input
Low Level
Voltage Input
High Level
Voltage Output
Low Level
Voltage Output
High Level
Symbol
Condition
Min
Typ
Max
Unit
VDD
1.62
2.4
3.6
V
VDDIO
1.2
1.8
3.6
V
0.3VDDIO
-
VIL,a
SPI & I²C
VIH,a
SPI & I²C
VOL
VOH
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
VDDIO = 1.2V
IOL = 3mA, SPI & I²C
VDDIO = 1.62V
IOH = 2mA, SPI & I²C
0.7VDDIO
0.2VDDIO
0.8VDDIO
-
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 8
1.2 Accelerometer specification
Table 2: Accelerometer parameter specification
ACCELEROMETER Operating Conditions
Parameter
Symbol
Condition
Acceleration
Range
gFS2g
gFS4g
gFS8g
gFS16g
Selectable
via serial digital
interface
±2
±4
±8
±16
g
g
g
g
Total Supply
Current in
Normal Mode
IDD
TA=25°C, bw = 1kHz
VDD = VDDIO = 2.4V
130
µA
IDDlp1
TA=25°C, bw = 1kHz
VDD = VDDIO = 2.4V
6.5
µA
TA=25°C, bw = 1kHz
VDD = VDDIO = 2.4V
66
µA
Total Supply
Current in
Low-Power Mode
1
Total Supply
Current in
Low-Power Mode
2
Min
Typ
Max
Unit
sleep duration = 25ms
IDDlp2
sleep duration = 25ms
Total Supply
Current in
Deep Suspend
Mode
IDDsm,a
TA=25°C
VDD = VDDIO = 2.4V
1
µA
Total Supply
Current in
Suspend Mode
IDDsum
TA=25°C
VDD = VDDIO = 2.4V
2.1
µA
Total Supply
Current in
Standby Mode
IDDsbm
TA=25°C
VDD = VDDIO = 2.4V
62
µA
Wake-Up Time 1
tw_up,a1
Wake-Up Time 2
tw_up,a2
Start-Up Time
ts_up,a
Non-volatile
memory (NVM)
write-cycles
nNVM
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
from Low-power
Mode 1 or Suspend
Mode or Deep
Suspend Mode
bw = 1kHz
from Low-power
Mode 2 or Stand-by
Mode
bw = 1kHz
POR, bw = 1kHz
1.3
1.8
ms
1.0
1.2
µs
3
ms
15
cycles
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Operating
Temperature
Same for
accelerometer and
magnetometer
TA
Page 9
-40
+85
°C
Max
Unit
ACCELEROMETER OUTPUT SIGNAL
Parameter
Device
Resolution
Symbol
Condition
Dres,a
gFS2g
0.98
mg
Sensitivity
S2g
S4g
S8g
S16g
1024
512
256
128
LSB/g
LSB/g
LSB/g
LSB/g
Sensitivity
Temperature Drift
TCSa
±0.02
%/K
Zero-g Offset
Off
±80
mg
Zero-g Offset
Temperature Drift
TCO
gFS2g, TA=25°C
gFS4g, TA=25°C
gFS8g, TA=25°C
gFS16g, TA=25°C
gFS2g,
Nominal VDD supplies
gFS2g, TA=25°C,
nominal VDD supplies,
over life-time
gFS2g,
Nominal VDD supplies
±1
mg/K
Bandwidth
bw8
bw16
bw31
bw63
bw125
bw250
bw500
bw1000
2nd order filter,
bandwidth
programmable
8
16
31
63
125
250
500
1000
Hz
Hz
Hz
Hz
Hz
Hz
Hz
Hz
Nonlinearity
NL,a
best fit straight line,
gFS2g
±0.5
%FS
Output Noise
Density
nrms,a
gFS2g, TA=25°C
Nominal VDD supplies
Normal mode
150
µg/Hz
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Min
Typ
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Temperature
Sensor
Measurement
Range1
Page 10
TS
-40
85
°C
Temperature
Sensor Slope1
dTS
0.5
K/LSB
Temperature
Sensor Offset1
OTS
±2
K
ACCELEROMETER MECHANICAL CHARACTERISTICS
1
Parameter
Symbol
Cross Axis
Sensitivity
Sa
Alignment Error
EA,a
Condition
relative contribution
between any two of
the three axes
relative to package
outline
Min
Typ
Max
Unit
1
%
±0.5
°
Tentative value
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 11
1.3 Magnetometer specification
Table 3: Magnetometer Parameter Specification
MAGNETOMETER Operating Conditions
Parameter
Symbol
Condition
Magnetic field
range
Brg,xy
Brg,z
TA=25°C2
Magnetometer
heading
accuracy 3
Acheading
System heading
accuracy4
Asheading
IDD,lp,m
Supply Current
in
Active Mode
(average)5
IDD,rg,m
IDD,eh,m
IDD,ha,m
Supply Current
in
Suspend Mode
IDDsm,m
Peak supply
current in Active
Mode
IDDpk,m
Peak logic
supply current in
active mode
IDDIOpk,m
30µT horizontal
geomagnetic field
component, TA=25°C
30µT horizontal
geomagnetic field
component, TA=25°C
Low power preset
Nominal VDD supplies
TA=25°C, ODR=10Hz
Regular preset
Nominal VDD supplies
TA=25°C, ODR=10Hz
Enhanced regular
preset
Nominal VDD supplies
TA=25°C, ODR=10Hz
High accuracy preset
Nominal VDD supplies
TA=25°C, ODR=20Hz
Nominal VDD/VDDIO
supplies, TA=25°C
In measurement
phase
Nominal VDD supplies
TA=25°C
Only during
measurement phase
Nominal VDDIO
supplies
TA=25°C
Min
Typ
Max
±1300
±2500
Unit
µT
µT
±2.5
degree
±3.0
degree
170
µA
0.5
mA
0.8
mA
4.9
mA
1
µA
18
mA
210
µA
2
Full linear measurement range considering sensor offsets.
The heading accuracy depends both on hardware and software. For detailed information of the
software performance please contact Bosch Sensortec.
4
Heading accuracy of the tilt-compensated 6-axis eCompass system, assuming calibration with
Bosch Sensortec eCompass software (only available for Android and Windows operating
sytems and requires the conclusion of a software licence agreement). Average value over
various device orientations (typical device usage).
5
For details on magnetometer current consumption calculation refer to chapter 4.2.2 and 4.2.3.
3
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
POR time
tw_up,m
Start-Up Time
ts_up,m
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
from OFF to Suspend;
time starts when
VDD>1.5V and
VDDIO>1.1V
from Suspend to
sleep
Page 12
1.0
ms
3.0
ms
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 13
MAGNETOMETER OUTPUT SIGNAL
Parameter
Device
Resolution
Gain error
6
Symbol
Condition
Dres,m
TA=25°C
Gerr,m
Min
After API temperature
compensation
TA=25°C
Nominal VDD supplies
After API temperature
compensation
-40°C ≤ TA ≤ +85°C
Nominal VDD supplies
Typ
Max
Unit
0.3
µT
±2
%
±0.01
%/K
Sensitivity
Temperature
Drift
TCSm
Zero-B offset
OFFm
TA=25°C
±40
µT
Zero-B offset
OFFm,cal
After software
calibration with Bosch
Sensortec eCompass
software7
-40°C ≤ TA ≤ +85°C
±2
µT
Zero-B offset
Temperature
Drift
TCOm
-40°C ≤ TA ≤ +85°C
Nominal VDD supplies
±0.07
µT/K
odrlp
Low power preset
10
Hz
odrrg
Regular preset
10
Hz
odreh
Enhanced regular
preset
10
Hz
odrha
High accuracy preset
20
Hz
odrlp
Low power preset
0
>300
Hz
odrrg
Regular preset
Enhanced regular
preset
0
100
Hz
0
60
Hz
odrha
High accuracy preset
0
20
Hz
Full-scale
Nonlinearity
NLm, FS
best fit straight line
1
%FS
Output Noise
nrms,lp,m,xy
Low power preset
x, y-axis, TA=25°C
Nominal VDD supplies
ODR (data
output rate),
normal mode
ODR (data
output rate),
forced mode
odreh
1.0
µT
6
Definition: gain error = ( (measured field after API compensation) / (applied field) ) - 1
Magnetic zero-B offset assuming calibration with Bosch Sensortec eCompass software (only
available for Android and Windows operating sytems and requires the conclusion of a software
licence agreement). Typical value after applying calibration movements containing various
device orientations (typical device usage).
7
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
nrms,lp,m,z
nrms,rg,m
nrms,eh,m
nrms,ha,m
Power Supply
Rejection Rate
PSRRm
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Low power preset
z-axis, TA=25°C
Nominal VDD supplies
Regular preset
TA=25°C
Nominal VDD supplies
Enhanced regular
preset
TA=25°C
Nominal VDD supplies
High accuracy preset
TA=25°C
Nominal VDD supplies
TA=25°C
Nominal VDD supplies
Page 14
1.4
µT
0.6
µT
0.5
µT
0.3
µT
±0.5
µT/V
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 15
2. Absolute maximum ratings
The absolute maximum ratings provided in Table 4 apply to both the accelerometer and
magnetometer part of BMC150. At or above these maximum ratings operability is not given. The
specification limits in Chapter 1 only apply under normal operating conditions.
Table 4: Absolute maximum ratings
Parameter
Condition
Min
Max
Unit
VDD Pin
-0.3
4.0
V
VDDIO Pin
-0.3
4.0
V
Voltage at any Logic Pad
Non-Supply Pin
-0.3
Operating Temperature, TA
Passive Storage Temp. Range
Active operation
≤ 65% rel. H.
-40
-50
None-volatile memory (NVM)
Data Retention
T = 85°C,
after 15 cycles
10
Voltage at Supply Pin
Mechanical Shock
ESD
Magnetic field
Duration ≤ 200µs
Duration ≤ 1.0ms
Free fall onto hard
surfaces
HBM, at any Pin
CDM
MM
Any direction
VDDIO +
0.3
+85
+150
V
°C
°C
year
10,000
2,000
g
g
1.8
m
2
500
200
>7
kV
V
V
T
Note:
Stress above these limits may cause damage to the device. Exceeding the specified limits may
affect the device reliability or cause malfunction.
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Datasheet
eCompass BMC150
Page 16
3. Block diagram
Figure 1 shows the basic building blocks of the BMC150:
Accelerometer
MEMS
VDD
VDD
Accelerometer ASIC
GND
GND
X
VDDIO
Vref
PS
a
INT1
Regulator
Y
M
U
X
Gain &
Offset
C/U
ADC
Logic
Z
NVM
Osc
I
n
t
e
r
f
a
c
e
VDDIO
INT2
PS1
SDI
INT1
SDO
INT2
SCK
SDI
CSB
SDO
INT3
SCK
DRDY
CSB1
FlipCores
VDD
Magnetometer ASIC
X
Vref
X, Y
FlipCore
Y
GND
Regulator
Drive &
Sense
ADC
VDDIO
Logic
Z Hall
element
Drive &
Sense
NVM
Osc
I
n
t
e
r
f
a
c
e
PS2
INT3
DRDY
SDI
SDO
SCK
CSB2
Figure 1: Block diagram of BMC150
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eCompass BMC150
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4. Functional description
BMC150 is a SiP (system in package) integration of a triaxial accelerometer (Sensing element
and ASIC) and a triaxial geomagnetic sensor (Sensing element and ASIC) in one package. The
two ASICs act as two separate slave devices on the digital bus (with different I²C address in I²C
mode), which allows an independent operation of accelerometer and magnetometer parts in
order to fit into a wide range of usage scenarios.
4.1 Supply voltage and power management
The BMC150 has two distinct power supply pins which supply both the acceleration sensor part
and the magnetometer sensor part:
• VDD is the main power supply for all internal analog and digital functional blocks;
• VDDIO is a separate power supply pin, used for the supply of the digital interface as well as the
magnetic sensor’s logic.
There are no limitations on the voltage levels of both pins relative to each other, as long as each
of them lies within its operating range. Furthermore, the device can be completely switched off
(VDD = 0V) while keeping the VDDIO supply within operating range or vice versa.
It is absolutely prohibited to keep any interface at a logical high level when V DDIO is switched off.
Such a configuration will permanently damage the device (i.e. if VDDIO = 0  [SDI & SDO & SCK
& CSB] ≠ high).
The device contains a power on reset (POR) generator for each of the sensor parts,
accelerometer part and magnetometer part. It resets the logic part and the register values of the
concerned ASIC after powering-on VDD and VDDIO. Please note, that all application specific
settings which are not equal to the default settings (refer to register maps chapter 6.2 and 7.2 ),
must be re-set to its designated values after POR.
There are no constraints on the sequence of switching on both supply voltages. In case the I²C
interface is used, a direct electrical connection between VDDIO supply and the PS pin is needed
in order to ensure reliable protocol selection. For SPI interface mode the PS pin must be directly
connected to GND.
4.2 Power modes
The BMC150 features separately configurable power modes for the accelerometer and the
magnetometer part. The advantage is that different characteristics regarding optimum system
power saving of the two sensor types are exploited, and that the accelerometer part may also
be used alone in certain usage scenarios where no magnetic field data is required. In such an
example, the magnetometer part is able to suspend and save power during the time in which it
is not required.
In the following chapters, power modes for both accelerometer and magnetometer part are
described.
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eCompass BMC150
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4.2.1 Accelerometer power modes
The BMC150 accelerometer part has six different power modes (see Figure 2). Besides normal
mode, which represents the fully operational state of the device, there are five energy saving
modes: deep-suspend mode, suspend mode, standby mode, low-power mode 1 and low-power
mode 2.
The possible transitions between the power modes are illustrated in Figure 2 :
DEEPSUSPEND
Mode
SUSPEND
Mode
NORMAL
Mode
Low Power
Mode 1
STANDBY
Mode
Low Power
Mode 2
Figure 2: Power mode transition diagram
After power-up the accelerometer part of BMC150 is in normal mode so that this part is held
powered-up and data acquisition is performed continuously.
In deep-suspend mode the device reaches the lowest possible power consumption. Only the
interface section is kept alive. No data acquisition is performed and the content of the
configuration registers is lost. Deep suspend mode is entered (left) by writing ‘1’ (‘0’) to the
(0x11) deep_suspend bit while (0x11) suspend bit is set to ‘0’. The I2C watchdog timer remains
functional. The (0x11) deep_ suspend bit, the (0x34) spi3 bit, (0x34) i2c_wdt_en bit and the
(0x34) i2c_wdt_sel bit are functional in deep-suspend mode. Equally the interrupt level and
driver configuration registers (0x20) int1_lvl, (0x20) int1_od, (0x20) int2_lvl, and (0x20) int2_od
are accessible. Still it is possible to enter normal mode by performing a softreset as described in
chapter 4.8. Please note, that all application specific settings which are not equal to the default
settings (refer to 6.2), must be re-set to its designated values after leaving deep-suspend mode.
In suspend mode the whole analog part is powered down. No data acquisition is performed.
While in suspend mode the latest acceleration data and the content of all configuration registers
are kept. Writing to and reading from registers is supported except from the (0x3E)
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eCompass BMC150
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fifo_config_1, (0x30) fifo_config_0 and (0x3F) fifo_data register. It is possible to enter normal
mode by performing a softreset as described in chapter.7.6.
Suspend mode is entered (left) by writing ´1´ (´0´) to the (0x11) suspend bit after bit (0x12)
lowpower_mode has been set to ‘0’. Although write access to registers is supported at the full
interface clock speed (SCL or SCK), a waiting period must be inserted between two consecutive
write cycles (please refer also to section 8.2.1).
In standby mode the analog part is powered down, while the digital part remains largely
operational. No data acquisition is performed. Reading and writing registers is supported
without any restrictions. The latest acceleration data and the content of all configuration
registers are kept. Standby mode is entered (left) by writing ´1´ (´0´) to the (0x11) suspend bit
after bit (0x12) lowpower_mode has been set to ‘1’. It is also possible to enter normal mode by
performing a softreset as described in chapter 7.6.
In low-power mode 1, the device is periodically switching between a sleep phase and a wakeup phase. The wake-up phase essentially corresponds to operation in normal mode with
complete power-up of the circuitry. The sleep phase essentially corresponds to operation in
suspend mode. Low-power mode is entered (left) by writing ´1´ (´0´) to the (0x11) lowpower_en
bit after bit (0x12) lowpower_mode has been set to ‘0’. Read access to registers is possible
except from the (0x3F) fifo_data register. However, unless the register access is synchronised
with the wake-up phase, the restrictions of the suspend mode apply.
Low-power mode 2 is very similar to low-power mode 1, but register access is possible at any
time without restrictions. It consumes more power than low-power mode 1. In low-power mode 2
the device is periodically switching between a sleep phase and a wake-up phase. The wake-up
phase essentially corresponds to operation in normal mode with complete power-up of the
circuitry. The sleep phase essentially corresponds to operation in standby mode. Low-power
mode is entered (left) by writing ´1´ (´0´) to the (0x11) lowpower_en bit with bit (0x12)
lowpower_mode set to ‘1’.
The timing behaviour of the low-power modes 1 and 2 depends on the setting of the (0x12)
sleeptimer_mode bit. When (0x12) sleeptimer_mode is set to ‘0’, the event-driven time-base
mode (EDT) is selected. In EDT the duration of the wake-up phase depends on the number of
samples required by the enabled interrupt engines. If an interrupt is detected, the device stays
in the wake-up phase as long as the interrupt condition endures (non-latched interrupt), or until
the latch time expires (temporary interrupt), or until the interrupt is reset (latched interrupt). If no
interrupt is detected, the device enters the sleep phase immediately after the required number
of acceleration samples have been taken and an active interface access cycle has ended. The
EDT mode is recommended for power-critical applications which do not use the FIFO. Also,
EDT mode is compatible with legacy BST sensors.
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Figure 3 shows the timing diagram for low-power modes 1 and 2 when EDT is selected.
Settle
Sample
Sample
Sample
Settle
Sample
Sleep phase
Settle
Sample
Sample
Active phase
Sample
tACTIVE
State
tSLEEP
tSLEEP
t
Figure 3: Timing Diagram for low-power mode ½, EDT
When (0x12) sleeptimer_mode is set to ‘1’, the equidistant-sampling mode (EST) is selected.
The use of the EST mode is recommended when the FIFO is used since it ensures that
equidistant samples are sampled into the FIFO regardless of whether the active phase is
extended by active interrupt engines or interface activity. In EST mode the sleep time tSLEEP,a is
defined as shown in Figure 4. The FIFO sampling time tSAMPLE,a is the sum of the sleep time
tSLEEP,a and the sensor data sampling time tSSMP,a. Since interrupt engines can extend the active
phase to exceed the sleep time tSLEEP,a, equidistant sampling is only guaranteed if the bandwidth
has been chosen such that 1/(2 * bw) = n * tSLEEP,a where n is an integer. If this condition is
infringed, equidistant sampling is not possible. Once the sleep time has elapsed the device will
store the next available sample in the FIFO. This set-up condition is not recommended as it may
result in timing jitter.
Sampled into FIFO
tSLEEP
tSSMP
tSAMPLE
tSLEEP
tSAMPLE
Settle
Sample
Settle
Sample
Sample
Sample
Settle
Sample
Sleep phase
Settle
Sample
Sample
Active phase
Sample
State
tSLEEP
tSAMPLE
t
Figure 4: Timing Diagram for low-power mode ½, EST
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eCompass BMC150
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The sleep time for lower-power mode 1 and 2 is set by the (0x11) sleep_dur bits as shown in
the following table:
Table 5: Sleep phase duration settings
(0x11) sleep_dur
Sleep Phase Duration
tSLEEP,a
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
0.5ms
0.5ms
0.5ms
0.5ms
0.5ms
0.5ms
1ms
2ms
4ms
6ms
10ms
25ms
50ms
100ms
500ms
1s
The current consumption of the BMC150 accelerometer part in low-power mode 1 (IDDlp1) and
low-power mode 2 (IDDlp2) can be estimated with the following formulae:
I DDlp1,a 
I DDlp 2,a 
t sleep,a  I DDsum,a  t active,a  I DD ,a
t sleep,a  t active,a
t sleep,a  I DDsbm,a  t active,a  I DD ,a
t sleep,a  t active,a
When estimating the length of the wake-up phase tactive, the corresponding typical wake-up time,
tw,up1 or tw,up2 and tut (given in table 5) have to be considered:
If bandwidth is >=31.25 Hz:
tactive = tut + tw,up1 – 0.9 ms (or tactive = tut + tw,up2 – 0.9 ms)
else:
tactive = 4 tut + tw,up1 – 0.9 ms (or tactive = 4 tut + tw,up2 – 0.9 ms)
During the wake-up phase all analog modules are held powered-up, while during the sleep
phase most analog modules are powered down. Consequently, a wake-up time of at least tw,up1
(tw,up2) is needed to settle the analog modules so that reliable acceleration data are generated.
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eCompass BMC150
Page 22
4.2.2 Magnetometer power modes
The BMC150 magnetometer part features configurable power modes. The four power modes of
the BMC150 magnetometer are decribed in the following chapters.
Power off mode
In Power off mode, VDD and/or VDDIO are unpowered. The magnetometer part does not operate
in this mode. When only one of VDD or VDDIO is supplied, the magnetic sensor will still be in
Power off mode. Power on reset is performed after both VDD and VDDIO have risen above their
detection thresholds.
Suspend mode
Suspend mode is the default power mode of BMC150 magnetometer part after the chip is
powered. When VDD and VDDIO are turned on the POR (power on reset) circuits operate and
the device’s registers are initialized. After POR becomes inactive, a start up sequence is
executed. In this sequence NVM content is downloaded to shadow registers located in the
device core. After the start up sequence the device is put in the Suspend mode. In this mode
only registers which store power control bit information and SPI 3 wire enable can be accessed
by the user. In this mode only registers supplied directly by VDDIO which store I2C slave device
address, power control bit information and some others can be accessed by the user. No other
registers can be accessed in Suspend mode. All registers loose their content, except the control
register (0x4B). In particular, in this mode a Chip ID read (register 0x40) returns “0x00” (I²C) or
high-Z (SPI).
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Sleep mode
The user puts device from suspend into Sleep mode by setting the Power bit to “1”, or from
active modes (normal or forced) by setting OpMode bits to “11”. In this state the user has full
access to the device registers. In particular, the Chip ID can be read. Setting the power control
bit to “0” (register 0x4B bit0) will bring the device back into Suspend mode. From the Sleep
mode the user can put the device back into Suspend mode or into Active mode.
Active mode
The device can switch into Active mode from Sleep mode by setting OpMode bits (register
0x4C). In active mode the magnetic field measurements are performed. In active mode, all
registers are accessible.
In active mode, two operation modes can be distinguished:
 Normal mode: selected channels are periodically measured according to settings set in
user registers. After measurements are completed, output data is put into data registers
and the device waits for the next measurement period, which is set by programmed
output data rate (ODR). From normal mode, the user can return to sleep mode by setting
OpMode to “11” or by performing a soft reset (see chapter 7.6). Suspend mode can be
entered by setting power control bit to “0”.
 Forced mode (single measurement): When set by the host, the selected channels are
measured according to settings programmed in user registers. After measurements are
completed, output data is put into data registers, OpMode register value returns to “11”
and the device returns to sleep mode. The forced mode is useful to achieve
synchronized operation between host microcontroller and BMC150. Also, different data
output rates from the ones selectable in normal mode can be achieved using forced
mode.
Figure 5: Magnetometer power mode transition diagram
In Active Mode and normal operation, in principle any desired balance between output noise
and active time (hence power consumption) can be adjusted by the repetition settings for x/yaxis and z-axis and the output data rate ODR. The average power consumption depends on the
ratio of high current phase time (during data acquisition) and low current phase time (between
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eCompass BMC150
Page 24
data acquisitions). Hence, the more repetitions are acquired to generate one magnetic field data
point, the longer the active time ratio in one sample phase, and the higher the average current.
Thanks to longer internal averaging, the noise level of the output data reduces with increasing
number of repetitions.
By using forced mode, it is possible to trigger new measurements at any rate. The user can
therefore trigger measurements in a shorter interval than it takes for a measurement cycle to
complete. If a measurement cycle is not allowed to complete, the resulting data will not be
written into the data registers. To prevent this, the manually triggered measurement intervals
must not be shorter than the active measurement time which is a function of the selected
number of repetitions. The maximum selectable read-out frequency in forced mode can be
calculated as follows:
f max,ODR 
1
145µs  nXY  500µs  nZ  980µs
Hereby nXY is the number of repetitions on X/Y-axis (not the register value) and nZ the number
of repetitions on Z-axis (not the register value) (see description of XY_REP and Z_REP
registers in chapter 7).
Although the repetition numbers for X/Y and Z axis and the ODR can be adjusted independently
and in a wide range, there are four recommended presets (High accuracy preset, Enhanced
regular preset, Regular preset, Low power preset) which reflect the most common usage
scenarios, i.e. required output accuracy at a given current consumption, of the BMC150
magnetometer part.
The four presets consist of the below register configurations, which are automatically set by the
BMC150 API or driver provided by Bosch Sensortec when a preset is selected. Table 6 shows
the recommended presets and the resulting magnetic field output noise and magnetometer part
current consumption:
Table 6: Magnetometer presets in Active operation and normal mode:
Preset
Low
power
preset
Regular
preset
Enhanced
regular preset
High accuracy
preset
X/Y rep
Z rep
ODR
ODRmax
(forced
mode)
RMS Noise
x/y/z
Average
current
consumption
3
3
10 Hz
>300 Hz
1.0/1.0/1.4 µT
170 µA
9
15
10 Hz
100 Hz
0.6/0.6/0.6 µT
0.5 mA
15
27
10 Hz
60 Hz
0.5/0.5/0.5 µT
0.8 mA
47
83
20 Hz
20 Hz
0.3/0.3/0.3 µT
4.9 mA
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eCompass BMC150
Page 25
4.2.3 BMC150 overall power consumption
Below, Table 7 shows the overall current consumption of BMC150 (sum of accelerometer and
magnetometer part) in typical scenarios such as a tilt-compensated electronic compass
application.
Table 7: BMC150 overall current consumption in typical usage scenarios:
Compass
preset
Low power
preset
Regular preset
Enhanced
regular preset
High accuracy
preset
Acc. Active /
sleep interval
Acc. BW /
DOR
Mag. Avg.
current
Acc. avg.
current
Total
average
current
8 / 50 ms
62.5 / 17 Hz
170 µA
20 µA
190 µA
16 / 50 ms
31 / 15 Hz
0.5 mA
35 µA
0.54 mA
16 / 50 ms
31 / 15 Hz
0.8 mA
35 µA
0.84 mA
16 /25 ms
31 / 24 Hz
4.9 mA
55 µA
5.0 mA
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eCompass BMC150
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4.3 Sensor data
4.3.1 Acceleration data
The width of acceleration data is 12 bits given in two´s complement representation. The 12 bits
for each axis are split into an MSB upper part (one byte containing bits 11 to 4) and an LSB
lower part (one byte containing bits 3 to 0 of acceleration and a (0x02, 0x04, 0x06) new_data
flag). Reading the acceleration data registers shall always start with the LSB part. In order to
ensure the integrity of the acceleration data, the content of an MSB register is locked by reading
the corresponding LSB register (shadowing procedure). When shadowing is enabled, the MSB
must always be read in order to remove the data lock. The shadowing procedure can be
disabled (enabled) by writing ´1´ (´0´) to the bit shadow_dis. With shadowing disabled, the
content of both MSB and LSB registers is updated by a new value immediately. Unused bits of
the LSB registers may have any value and should be ignored. The (0x02, 0x04, 0x06) new_data
flag of each LSB register is set if the data registers have been updated. The flag is reset if either
the corresponding MSB or LSB part is read.
Two different streams of acceleration data are available, unfiltered and filtered. The unfiltered
data is sampled with 2kHz. The sampling rate of the filtered data depends on the selected filter
bandwidth and is always twice the selected bandwidth (BW = ODR/2). Which kind of data is
stored in the acceleration data registers depends on bit (0x13) data_high_bw. If (0x13)
data_high_bw is ´0´ (´1´), then filtered (unfiltered) data is stored in the registers. Both data
streams are offset-compensated.
The bandwidth of filtered acceleration data is determined by setting the (0x10) bw bit as
followed:
Table 8: Bandwidth configuration
bw
Bandwidth
Update Time tut
00xxx
01000
01001
01010
01011
01100
01101
01110
01111
1xxxx
*)
7.81Hz
15.63Hz
31.25Hz
62.5Hz
125Hz
250Hz
500Hz
1000Hz
*)
64ms
32ms
16ms
8ms
4ms
2ms
1ms
0.5ms
-
*) Note:
Settings 00xxx result in a bandwidth of 7.81 Hz; settings 1xxxx result in a bandwidth of 1000 Hz.
It is recommended to actively use the range from ´01000b´ to ´01111b´ only in order to be
compatible with future products.
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eCompass BMC150
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The BMC150’s accelerometer part supports four different acceleration measurement ranges. A
measurement range is selected by setting the (0x0F) range bits as follows:
Table 9: Range selection
Range
Acceleration measurement
range
Resolution
0011
0101
1000
1100
others
±2g
±4g
±8g
±16g
reserved
0.98mg/LSB
1.95mg/LSB
3.91mg/LSB
7.81mg/LSB
-
4.3.2 Temperature sensor
The width of temperature data is 8 bits given in two´s complement representation. Temperature
values are available in the (0x08) temp register.
The slope of the temperature sensor is 0.5K/LSB, its center temperature is 23°C [(0x08) temp =
0x00].
4.3.3 Magnetic field data
The representation of magnetic field data is different between X/Y-axis and Z-axis. The width of
X- and Y-axis magnetic field data is 13 bits each and stored in two’s complement.
DATAX_LSB (0x42) contains 5-bit LSB part [4:0] of the 13 bit output data of the X-channel.
DATAX_MSB (0x43) contains 8-bit MSB part [12:5] of the 13 bit output data of the X-channel.
DATAY_LSB (0x44) contains 5-bit LSB part [4:0] of the 13 bit output data of the Y-channel.
DATAY_MSB (0x45) contains 8-bit MSB part [12:5] of the 13 bit output data of the Y-channel.
The width of the Z-axis magnetic field data is 15 bit word stored in two’s complement.
DATAZ_LSB (0x46) contains 7-bit LSB part [6:0] of the 15 bit output data of the Z-channel.
DATAZ_MSB (0x47) contains 8-bit MSB part [14:7] of the 15 bit output data of the Z-channel.
For all axes, temperature compensation on the host is used to get ideally matching sensitivity
over the full temperature range. The temperature compensation is based on a resistance
measurement of the hall sensor plate. The resistance value is represented by a 14 bit unsigned
output word.
RHALL_LSB (0x48) contains 6-bit LSB part [5:0] of the 14 bit output data of the RHALLchannel.
RHALL_MSB (0x49) contains 8-bit MSB part [13:6] of the 14 bit output data of the RHALLchannel.
All signed register values are in two´s complement representation. Bits which are marked
“reserved” can have different values or can in some cases not be read at all (read will return
0x00 in I²C mode and high-Z in SPI mode).
Data register readout and shadowing is implemented as follows:
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After all enabled axes have been measured, complete data packages consisting of DATAX,
DATAY, DATAZ and RHALL are updated at once in the data registers. This way, it is prevented
that a following axis is updated while the first axis is still being read (axis mix-up) or that MSB
part of an axis is updated while LSB part is being read.
While reading from any data register, data register update is blocked. Instead, incoming new
data is written into shadow registers which will be written to data registers after the previous
read sequence is completed (i.e. upon stop condition in I²C mode, or CSB going high in SPI
mode, respectively). Hence, it is recommended to read out at all data at once (0x42 to 0x49 or
0x4A if status bits are also required) with a burst read.
Single bytes or axes can be read out, while in this case it is not assured that adjacent registers
are not updated during readout sequence.
The “Data ready status” bit (register 0x48 bit0) is set “1” when the data registers have been
updated but the data was not yet read out over digital interface. Data ready is cleared (set “0”)
directly after completed read out of any of the data registers and subsequent stop condition
(I²C) or lifting of CSB (SPI).
In addition, when enabled the “Data overrun” bit (register 0x4A bit7) turns “1” whenever data
registers are updated internally, but the old data was not yet read out over digital interface (i.e.
data ready bit was still high). The “Data overrun” bit is cleared when the interrupt status register
0x4A is read out. This function needs to be enabled separately by setting the “Data overrun En”
bit (register 0x4D bit7)).
Note:
Please also see chapter 7 for detailed register descriptions.
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4.3.4 Magnetic field data temperature compensation
The raw register values DATAX, DATAY, DATAZ and RHALL are read out from the host
processor using the BMC150 API/driver which is provided by Bosch Sensortec. The API/driver
performs an off-chip temperature compensation and outputs x/y/z magnetic field data in
16 LSB/µT to the upper application layer:
Software
application level
Application
Config
Software
driver level
BMC150
API / driver
(provided by
Bosch Sensortec)
Config
Hardware level
Temperature compensated
magnetic field data x/y/z in
signed int, (16 LSB/µT) or float
Magnetometer raw register data
(DATAX, DATAY, DATAZ, RHALL)
BMC150
sensor
Figure 6: Calculation flow of magnetic field data from raw BMC150 register data
The API/driver performs all calculations using highly optimized fixed-point C-code arithmetic.
For platforms that do not support C code, a floating-point formula is available as well.
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4.4 Self-test
4.4.1 Accelerometer self-test
This feature permits to check the BMC150’s accelerometer part functionality by applying
electrostatic forces to the sensor core instead of external accelerations. By actually deflecting
the seismic mass, the entire signal path of the sensor can be tested. Activating the self-test
results in a static offset of the acceleration data; any external acceleration or gravitational force
applied to the sensor during active self-test will be observed in the output as a superposition of
both acceleration and self-test signal.
Before the self-test is enabled the g-range should be set to 8 g.The self-test is activated
individually for each axis by writing the proper value to the (0x32) self_test_axis bits (´01b´ for xaxis, ´10b´ for y-axis, ´11b´ for z-axis, ´00b´ to deactivate self-test). It is possible to control the
direction of the deflection through bit (0x32) self_test_sign. The excitation occurs in negative
(positive) direction if (0x32) self_test_sign = ´0b´ (´1b´). The amplitude of the deflection has to
be set high by writing (0x32) self_test_amp=´1b´. After the self-test is enabled, the user should
wait 50ms before interpreting the acceleration data.
In order to ensure a proper interpretation of the self-test signal it is recommended to perform the
self-test for both (positive and negative) directions and then to calculate the difference of the
resulting acceleration values. Table 10 shows the minimum differences for each axis. The
actually measured signal differences can be significantly larger.
Table 10: Self-test difference values
x-axis signal
resulting minimum
difference signal
800 mg
y-axis signal
800 mg
z-axis signal
400 mg
It is recommended to perform a reset of the device after a self-test has been performed. If the
reset cannot be performed, the following sequence must be kept to prevent unwanted interrupt
generation: disable interrupts, change parameters of interrupts, wait for at least 50ms, enable
desired interrupts.
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4.4.2 Magnetometer self-test
BMC150 supports two self-tests modes for the magnetometer part: Normal self-test and
advanced self-test.
Normal self test
During normal self-test, the following verifications are performed:
 FlipCore signal path is verified by generating signals on-chip. These are processed
through the signal path and the measurement result is compared to known thresholds.
 FlipCore (X and Y) bondwires to ASIC are checked for connectivity
 FlipCore (X and Y) bondwires and MEMS are checked for shorts
 Hall sensor connectivity is checked for open and shorted connections
 Hall sensor signal path and hall sensor element offset are checked for overflow.
To perform a self test, the sensor must first be put into sleep mode (OpMode = “11”). Self-test
mode is then entered by setting the bit “Self test” (register 0x4C bit0) to “1”. After performing self
test, this bit is set back to “0”. When self-test is successful, the corresponding self-test result bits
are set to “1” (“X-Self-Test” register 0x42 bit0, “Y-Self-Test” register 0x44 bit0, “Z-Self-Test”
register 0x46 bit0). If self-test fails for an axis, the corresponding result bit returns “0”.
Advanced self test
Advanced self test performs a verification of the Z channel signal path functionality and
sensitivity. An on-chip coil wound around the hall sensor can be driven in both directions with a
calibrated current to generate a positive or negative field of around 100 µT.
Advanced self test is an option that is active in parallel to the other operation modes. The only
difference is that during the active measurement phase, the coil current is enabled. The
recommended usage of advanced self test is the following:
1. Set sleep mode
2. Disable X, Y axis
3. Set Z repetitions to desired level
4. Enable positive advanced self test current
5. Set forced mode, readout Z and R channel after measurement is finished
6. Enable negative advanced self test current
7. Set forced mode, readout Z and R channel after measurement is finished
8. Disable advanced self test current (this must be done manually)
9. Calculate difference between the two compensated field values. This difference should
be around 200 µT with some margins.
10. Perform a soft reset of manually restore desired settings
Please refer to the corresponding application note for the exact thresholds to evaluate
advanced self-test.
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Below table describes how the advanced self-test is controlled:
Table 11: Magnetometer advanced self-test control
(0x4C)
Adv.ST <1:0>
00b
01b
10b
11b
Configuration
Normal operation
(no self-test), default
Reserved, do not use
Negative on-chip magnetic
field generation
Positive on-chip magnetic
field generation
The BMC150 API/driver provided by Bosch Sensortec provides a comfortable way to perform
both self-tests and to directly obtain the result without further calculations. It is recommended to
use this as a reference.
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4.5 Accelerometer offset compensation
Offsets in measured acceleration signals can have several causes but they are always
unwanted and disturbing in many cases. Therefore, the accelerometer part of BMC150 offers an
advanced set of four digital offset compensation methods which are closely matched to each
other. These are slow, fast, and manual compensation, and inline calibration.
The compensation is performed with unfiltered data, and is then applied to both, unfiltered and
filtered data. If necessary the result of this computation is saturated to prevent any overflow
errors (the smallest or biggest possible value is set, depending on the sign). However, the
registers used to read and write compensation values have only a width of 8 bits.
An overview of the offset compensation principle is given in
Figure 7:
I2C/SPI/NVM mapping
12 bit acceleration data range
+-16g
+-8g
+-4g
8g
Sign
4g
4g
Sign
2g
2g
2g
Sign
1g
1g
1g
1g
500mg
500mg
500mg
500mg
500mg
250mg
250mg
250mg
250mg
250mg
125mg
125mg
125mg
125mg
125mg
62.5mg
62.5mg
62.5mg
62.5mg
31.2mg
31.2mg
31.2mg
31.2mg
31.2mg
15.6mg
15.6mg
15.6mg
15.6mg
15.6mg
7.8mg
7.8mg
7.8mg
7.8mg
3.9mg
3.9mg
MSB
Read/
Write
62.5mg
LSB
Sign
Sign
+-2g
MSB
MSB
-
1.9mg
LSB
MSB
LSB
MSB
LSB
LSB
7.8mg
3.9mg
1.9mg
0.97mg
Figure 7: Principle of offset compensation
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The public offset compensation registers (0x38) offset_x, (0x39) offset_y, (0x3A) offset_z are
images of the corresponding registers in the NVM. With each image update (see section 4.6 for
details) the contents of the NVM registers are written to the public registers. The public register
can be over-written by the user at any time. After changing the contents of the public registers
by either an image update or manually, all 8bit values are extended to 12bit values for internal
computation. In the opposite direction, if an internally computed value changes it is converted to
an 8bit value and stored in the public register.
Depending on the selected g-range the conversion from 12bit to 8bit values can result in a loss
of accuracy of one to several LSB. This is shown in
Figure 7.
In case an internally computed compensation value is too small or too large to fit into the
corresponding register, it is saturated in order to prevent an overflow error.
By writing ´1´ to the (0x36) offset_reset bit, all offset compensation registers are reset to zero.
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4.5.1 Slow compensation
Slow compensation is based on a 1st order high-pass filter, which continuously drives the
average value of the output data stream of each axis to zero. The bandwidth of the high-pass
filter is configured with bit (0x37) cut_off according to .
Table 12: Compensation period settings
(0x37)
cut_off
high-pass filter
bandwidth
Example
bw = 500 Hz
0b
1b
*bw: please insert selected decimal data bandwidth value [Hz] from table 8
The slow compensation can be enabled (disabled) for each axis independently by setting the
bits (0x36) hp_x_en, hp_y_en, hp_z_en to ´1´ (´0´), respectively.
Slow compensation should not be used in combination with low-power mode. In low-power
mode the conditions (availability of necessary data) for proper function of slow compensation
are not fulfilled.
4.5.2 Fast compensation
Fast compensation is a one-shot process by which the compensation value is set in such a way
that when added to the raw acceleration, the resulting acceleration value of each axis
approches the target value. This is best suited for “end-of-line trimming” with the customer’s
device positioned in a well-defined orientation. For fast compensation the g-range has to be
switched to 2g.
The algorithm in detail: An average of 16 consecutive acceleration values is computed and the
difference between target value and computed value is written to (0x38, 0x39, 0x3A)
offset_filt_x/y/z. The public registers (0x38, 0x39, 0x3A) offset_filt_x/y/z are updated with the
contents of the internal registers (using saturation if necessary) and can be read by the user.
Fast compensation is triggered for each axis individually by setting the (0x36) cal_trigger bits as
shown in Table 13:
Table 13: Fast compensation axis selection
(0x36) cal_trigger
Selected Axis
00b
01b
10b
11b
none
x
y
z
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Register (0x36) cal_trigger is a write-only register. Once triggered, the status of the fast
correction process is reflected in the status bit (0x36) cal_rdy. Bit (0x36) cal_rdy is ‘0’ while the
correction is in progress. Otherwise it is ‘1’. Bit (0x36) cal_rdy is ´0´ when (0x36) cal_trigger is
not ´00´.
For the fast offset compensation, the compensation target can be chosen by setting the bits
(0x37) offset_target_x, (0x37) offset_target_y, and (0x37) offset_target_z according to Table 14:
Table 14: Offset target settings
(0x37)
offset_target_x/y/z
00b
01b
10b
11b
Target value
0g
+1g
-1g
0g
Fast compensation should not be used in combination with any of the low-power modes. In lowpower mode the conditions (availability of necessary data) for proper function of fast
compensation are not fulfilled.
4.5.3 Manual compensation
The contents of the public compensation registers (0x38, 0x39, 0x3A) offset_filt_x/y/z can be
set manually via the digital interface. It is recommended to write into these registers directly
after a new data interrupt has occurred in order not to disturb running offset computations.
Writing to the offset compensation registers is not allowed while the fast compensation
procedure is running.
4.5.4 Inline calibration
For certain applications, it is often desirable to calibrate the offset once and to store the
compensation values permanently. This can be achieved by using one of the aforementioned
offset compensation methods to determine the proper compensation values and then storing
these values permanently in the NVM. See chapter 4.6.1 for details of the storing procedure.
Each time the device is reset, the compensation values are loaded from the non-volatile
memory into the image registers and used for offset compensation until they are possibly
overwritten using one of the other compensation methods.
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4.6 Non-volatile memory
4.6.1 Accelerometer non-volatile memory
The memory of the accelerometer part of BMC150 consists of three different kinds of registers:
hard-wired, volatile, and non-volatile. Part of it can be both read and written by the user. Access
to non-volatile memory is only possible through (volatile) image registers.
Altogether, there are eight registers (octets) with NVM backup which are accessible by the user.
The addresses of the image registers range from 0x38 to 0x3C. While the addresses up to 0x3A
are used for offset compensation (see section 4.5), addresses 0x3B and 0x3C are general
purpose registers not linked to any sensor-specific functionality.
The content of the NVM is loaded to the image registers after a reset (either POR or soft reset)
or after a user request which is performed by writing ´1´ to the write-only bit (0x33) nvm_load.
As long as the image update is in progress, bit (0x33) nvm_rdy is ´0´, otherwise it is ´1´.
The image registers can be read and written like any other register.
Writing to the NVM is a three-step procedure:
1. Write the new contents to the image registers.
2. Write ´1´ to bit (0x33) nvm_prog_mode in order to unlock the NVM.
3. Write ´1´ to bit (0x33) nvm_prog_trig and keep ´1´ in bit (0x33) nvm_prog_mode in order
to trigger the write process.
Writing to the NVM always renews the entire NVM contents. It is possible to check the write
status by reading bit (0x33) nvm_rdy. While (0x33) nvm_rdy = ´0´, the write process is still in
progress; if (0x33) nvm_rdy = ´1´, then writing is completed. As long as the write process is
ongoing, no change of power mode and image registers is allowed. Also, the NVM write cycle
must not be initiated while image registers are updated, in low-power mode, and in suspend
mode.
Please note that the number of permitted NVM write-cycles is limited as specified in Table 2.
The number of remaining write-cycles can be obtained by reading bits (0x33) nvm_remain.
4.6.2 Magnetometer non-volatile memory
Some of the memory of the BMC150 magnetometer is non-volatile memory (NVM). This NVM is
pre-programmed in Bosch Sensortec fabrication line and cannot be modified afterwards. It
contains trimming data which are required for sensor operation and sensor data compensation,
thus it is read out by the BMC150 API/driver during initialization.
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4.7 Accelerometer interrupt controller
The accelerometer part of BMC150 is equipped with eight programmable interrupt engines.
Each interrupt can be independently enabled and configured. If the trigger condition of an
enabled interrupt is fulfilled, the corresponding status bit is set to ´1´ and the selected interrupt
pin is activated. There are two interrupt pins for the accelerometer part, INT1 and INT2;
interrupts can be freely mapped to any of these pins. The state of a specific interrupt pin is
derived from a logic ´or´ combination of all interrupts mapped to it.
The interrupt status registers are updated when a new data word is written into the acceleration
data registers. If an interrupt is disabled, all active status bits associated with it are immediately
reset.
4.7.1 General features
An interrupt is cleared depending on the selected interrupt mode, which is common to all
interrupts. There are three different interrupt modes: non-latched, latched, and temporary. The
mode is selected by the (0x21) latch_int bits according to Table 15.
Table 15 : Accelerometer interrupt mode selection
(0x21) atch_int
Interrupt mode
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
non-latched
temporary, 250ms
temporary, 500ms
temporary, 1s
temporary, 2s
temporary, 4s
temporary, 8s
latched
non-latched
temporary, 250µs
temporary, 500µs
temporary, 1ms
temporary, 12.5ms
temporary, 25ms
temporary, 50ms
latched
An interrupt is generated if its activation condition is met. It cannot be cleared as long as the
activation condition is fulfilled. In the non-latched mode the interrupt status bit and the selected
pin (the contribution to the ´or´ condition for INT1 and/or INT2) are cleared as soon as the
activation condition is no more valid. Exceptions to this behavior are the new data, orientation,
and flat interrupts, which are automatically reset after a fixed time.
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In latched mode an asserted interrupt status and the selected pin are cleared by writing ´1´ to bit
(0x21) reset_int. If the activation condition still holds when it is cleared, the interrupt status is
asserted again with the next change of the acceleration registers.
In the temporary mode an asserted interrupt and selected pin are cleared after a defined period
of time. The behavior of the different interrupt modes is shown graphically in Figure 8. The
timings in this mode are subject to the same tolerances as the bandwidths (see Table 2).
internal signal from
interrupt engine
interrupt output
non-latched
latch period
temporary
latched
Figure 8: Interrupt modes
Several interrupt engines can use either unfiltered or filtered acceleration data as their input. For
these interrupts, the source can be selected with the bits in register (0x1E). These are (0x1E)
int_src_data, (0x1E) int_src_tap, (0x1E) int_src_slo_no_mot, (0x1E) int_src_slope, (0x1E)
int_src_high, and (0x1E) int_src_low. Setting the respective bits to ´0´ (´1´) selects filtered
(unfiltered) data as input. The orientation recognition and flat detection interrupt always use
filtered input data.
It is strongly recommended to set interrupt parameters prior to enabling the interrupt. Changing
parameters of an already enabled interrupt may cause unwanted interrupt generation and
generation of a false interrupt history. A safe way to change parameters of an enabled interrupt
is to keep the following sequence: disable the desired interrupt, change parameters, wait for at
least 10ms, and then re-enable the desired interrupt.
4.7.2 Mapping to physical interrupt pins (inttype to INT Pin#)
Registers (0x19) to (0x1B) are dedicated to mapping of interrupts to the interrupt pins “INT1” or
“INT2”. Setting (0x19) int1_”inttype” to ´1´ (´0´) maps (unmaps) “inttype” to pin “INT1”.
Correspondingly setting (0x1B) int2_”inttype” to ´1´ (´0´) maps (unmaps) “inttype” to pin “INT2”.
Note:
“inttype” to be replaced with the precise notation, given in the memory map in chapter 5.
Example: For flat interrupt (int1_flat): Setting (0x19) int1_flat to ´1´ maps int1_flat to pin “INT1”.
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4.7.3 Electrical behavior (INT pin# to open-drive or push-pull)
Both interrupt pins can be configured to show the desired electrical behavior. The ´active´ level
of each interrupt pin is determined by the (0x20) int1_lvl and (0x20) int2_lvl bits.
If (0x20) int1_lvl = ´1´ (´0´) / (0x20) int2_lvl = ´1´ (´0´), then pin “INT1” / pin “INT2” is active ´1´
(´0´). The characteristic of the output driver of the interrupt pins may be configured with bits
(0x20) int1_od and (0x20) int2_od. By setting bits (0x20) int1_od / (0x20) int2_od to ´1´, the
output driver shows open-drive characteristic, by setting the configuration bits to ´0´, the output
driver shows push-pull characteristic. When open-drive characteristic is selected in the design,
external pull-up or pull-down resistor should be applied according the int_lvl configuration.
4.7.4 New data interrupt
This interrupt serves for synchronous reading of acceleration data. It is generated after storing a
new value of z-axis acceleration data in the data register. The interrupt is cleared automatically
when the next data acquisition cycle starts. The interrupt status is ´0´ for at least 50µs.
The interrupt mode of the new data interrupt is fixed to non-latched.
It is enabled (disabled) by writing ´1´ (´0´) to bit (0x17) data_en. The interrupt status is stored in
bit (0x0A) data_int.
Due to the settling time of the filter, the first interrupt after wake-up from suspend or standby
mode will take longer than the update time
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4.7.5 Slope / any-motion detection
Slope / any-motion detection uses the slope between successive acceleration signals to detect
changes in motion. An interrupt is generated when the slope (absolute value of acceleration
difference) exceeds a preset threshold. It is cleared as soon as the slope falls below the
threshold. The principle is made clear in Figure 9.
acceleration
acc(t0)
acc(t0−1/(2*bw))
time
slope(t0)=acc(t0)−acc(t0−1/(2*bw))
slope
slope_th
time
slope_dur
slope_dur
INT
time
Figure 9: Principle of any-motion detection
The threshold is defined through register (0x28) slope_th. In terms of scaling 1 LSB of (0x28)
slope_th corresponds to 3.91 mg in 2g-range (7.81 mg in 4g-range, 15.6 mg in 8g-range and
31.3 mg in 16g-range). Therefore the maximum value is 996 mg in 2g-range (1.99g in 4g-range,
3.98g in 8g-range and 7.97g in 16g-range).
The time difference between the successive acceleration signals depends on the selected
bandwidth and equates to 1/(2*bandwidth) (t=1/(2*bw)). In order to suppress false triggers, the
interrupt is only generated (cleared) if a certain number N of consecutive slope data points is
larger (smaller) than the slope threshold given by (0x28) slope_th. This number is set by the
(0x27) slope_dur bits. It is N = (0x27) slope_dur + 1 for (0x27).
Example: (0x27) slope_dur = 00b, …, 11b = 1decimal, …, 4decimal.
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4.7.5.1 Enabling (disabling) for each axis
Any-motion detection can be enabled (disabled) for each axis separately by writing ´1´ (´0´) to
bits (0x16) slope_en_x, (0x16) slope_en_y, (0x16) slope_en_z. The criteria for any-motion
detection are fulfilled and the slope interrupt is generated if the slope of any of the enabled axes
exceeds the threshold (0x28) slope_th for [(0x27) slope_dur +1] consecutive times. As soon as
the slopes of all enabled axes fall or stay below this threshold for [(0x27) slope_dur +1]
consecutive times the interrupt is cleared unless interrupt signal is latched.
4.7.5.2 Axis and sign information of slope / any motion interrupt
The interrupt status is stored in bit (0x09) slope_int. The any-motion interrupt supplies additional
information about the detected slope. The axis which triggered the interrupt is given by that one
of bits (0x0B) slope_first_x, (0x0B) slope_first_y, (0x0B) slope_first_z that contains a value of
´1´. The sign of the triggering slope is held in bit (0x0B) slope_sign until the interrupt is
retriggered. If (0x0B) slope_sign = ´0´ (´1´), the sign is positive (negative).
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4.7.6 Tap sensing
Tap sensing has a functional similarity with a common laptop touch-pad or clicking keys of a
computer mouse. A tap event is detected if a pre-defined slope of the acceleration of at least
one axis is exceeded. Two different tap events are distinguished: A ‘single tap’ is a single event
within a certain time, followed by a certain quiet time. A ‘double tap’ consists of a first such
event followed by a second event within a defined time frame.
Single tap interrupt is enabled (disabled) by writing “1” (“0”) to bit (0x16) s_tap_en. Double tap
interrupt is enabled (disabled) by writing “1” (“0”) to bit (0x16) d_tap_en. While temporary
latching is used do not simultaneously enable single tap interrupt and double tap interrupt.
The status of the single tap interrupt is stored in bit (0x09) s_tap_int, the status of the double tap
interrupt is stored in bit (0x09) d_tap_int.
The slope threshold for detecting a tap event is set by bits (0x2B) tap_th. The meaning of
(0x2B) tap_th depends on the range setting. 1 LSB of (0x2B) tap_th corresponds to a slope of
62.5mg in 2g-range, 125mg in 4g-range, 250mg in 8g-range, and 500mg in 16g-range.
In Figure 10 the meaning of the different timing parameters is visualized:
slope
1st tap
2nd tap
tap_th
time
a
tap_shock
tap_quiet
tap_dur
tap_shock
tap_quiet
single tap detection
12.5 ms
time
double tap detection
12.5 ms
time
Figure 10: Timing of tap detection
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The parameters (0x2A) tap_shock and (0x2A) tap_quiet apply to both single tap and double tap
detection, while (0x2A) tap_dur applies to double tap detection only. Within the duration of
(0x2A) tap_shock any slope exceeding (0x2B) tap_th after the first event is ignored. Contrary to
this, within the duration of (0x2A) tap_quiet no slope exceeding (0x2B) tap_th must occur,
otherwise the first event will be cancelled.
4.7.6.1 Single tap detection
A single tap is detected and the single tap interrupt is generated after the combined durations of
(0x2A) tap_shock and (0x2A) tap_quiet, if the corresponding slope conditions are fulfilled. The
interrupt is cleared after a delay of 12.5 ms. Do not map single-tap to any INT pin if you do not
want to use it.
4.7.6.2 Double tap detection
A double tap interrupt is generated if an event fulfilling the conditions for a single tap occurs
within the set duration in (0x2A) tap_dur after the completion of the first tap event. The interrupt
is automatically cleared after a delay of 12.5 ms.
4.7.6.3 Selecting the timing of tap detection
For each of parameters (0x2A) tap_shock and (0x2A) tap_quiet two values are selectable. By
writing ´0´ (´1´) to bit (0x2A) tap_shock the duration of (0x2A) tap_shock is set to 50 ms (75 ms).
By writing ´0´ (´1´) to bit (0x2A) tap_quiet the duration of (0x2A) tap_quiet is set to 30 ms (20
ms).
The length of (0x2A) tap_dur can be selected by setting the (0x2A) tap_dur bits according to
Table 16:
Table 16: Selection of tap_dur
(0x2A) tap_dur
length of tap_dur
000b
001b
010b
011b
100b
101b
110b
111b
50 ms
100 ms
150 ms
200 ms
250 ms
375 ms
500 ms
700 ms
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4.7.6.4 Axis and sign information of tap sensing
The sign of the slope of the first tap which triggered the interrupt is stored in bit (0x0B) tap_sign
(´0´ means positive sign, ´1´ means negative sign). The value of this bit persists after clearing
the interrupt.
The axis which triggered the interrupt is indicated by bits (0x0B) tap_first_x, (0x0B) tap_first_y,
and (0x0B) tap_first_z.
The bit corresponding to the triggering axis contains a ´1´ while the other bits hold a ´0´. These
bits are cleared together with clearing the interrupt status.
4.7.6.5 Tap sensing in low power mode
In low-power mode, a limited number of samples is processed after wake-up to decide whether
an interrupt condition is fulfilled. The number of samples is selected by bits (0x2B) tap_samp
according to Table 17.
Table 17: Meaning of (0x2B) tap_samp
(0x2B) tap_samp
Number of Samples
00b
01b
10b
11b
2
4
8
16
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4.7.7 Orientation recognition
The orientation recognition feature informs on an orientation change of the sensor with respect
to the gravitational field vector ‘g’. The measured acceleration vector components with respect
to the gravitational field are defined as shown in Figure 11.
Figure 11: Definition of vector components
Therefore, the magnitudes of the acceleration vectors are calculated as follows:
acc_x = 1g x sin x cos
acc_y = −1g x sin x sin
acc_z = 1g x cos
acc_y/acc_x = −tan
Depending on the magnitudes of the acceleration vectors the orientation of the device in the
space is determined and stored in the three (0x0C) orient bits. These bits may not be reset in
the sleep phase of low-power mode. There are three orientation calculation modes with different
thresholds for switching between different orientations: symmetrical, high-asymmetrical, and
low-asymmetrical. The mode is selected by setting the (0x2C) orient_mode bits as given in
Table 18.
Table 18: Orientation mode settings
(0x2C) orient_mode
Orientation Mode
00b
01b
10b
11b
symmetrical
high-asymmetrical
low-asymmetrical
symmetrical
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For each orientation mode the (0x0C) orient bits have a different meaning as shown in Table 19
to Table 21:
Table 19: Meaning of the (0x0C) orient bits in symmetrical mode
(0x0C) orient
Name
Angle
Condition
x00
portrait upright
315° <  < 45°
|acc_y| < |acc_x| - ‘hyst’
and acc_x – ‘hyst’’ ≥ 0
x01
portrait upside down
135° <  < 225°
|acc_y| < |acc_x| - ‘hyst’
and acc_x + ‘hyst’ < 0
x10
landscape left
45° <  < 135°
|acc_y| ≥ |acc_x| + ‘hyst’
and acc_y < 0
x11
landscape right
225° <  < 315°
|acc_y| ≥ |acc_x| + ‘hyst’
and acc_y ≥ 0
Table 20: Meaning of the (0x0C) orient bits in high-asymmetrical mode
(0x0C) orient
Name
Angle
Condition
x00
portrait upright
297° <  < 63°
|acc_y| < 2∙|acc_x| - ‘hyst’
and acc_x – ‘hyst’ ≥ 0
x01
portrait upside down
117° <  < 243°
|acc_y| < 2∙|acc_x| - ‘hyst’
and acc_x + ‘hyst’ < 0
x10
landscape left
63° <  < 117°
|acc_y| ≥ 2∙|acc_x| + ‘hyst’
and acc_y < 0
x11
landscape right
243° <  < 297°
|acc_y| ≥ 2∙|acc_x| + ‘hyst’
and acc_y ≥ 0
Table 21: Meaning of the (0x0C) orient bits in low-asymmetrical mode
(0x0C) orient
Name
Angle
Condition
x00
portrait upright
333° <  < 27°
|acc_y| < 0.5∙|acc_x| - ‘hyst’
and acc_x – ‘hyst’ ≥ 0
x01
portrait upside down
153° <  < 207°
|acc_y| < 0.5∙|acc_x| - ‘hyst’
and acc_x + ‘hyst’ < 0
x10
landscape left
27° <  < 153°
x11
landscape right
207° <  < 333°
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|acc_y| ≥ 0.5∙|acc_x| +
‘hyst’ and acc_y < 0
|acc_y| ≥ 0.5∙|acc_x| +
‘hyst’ and acc_y ≥ 0
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In the preceding tables, the parameter ‘hyst’ stands for a hysteresis, which can be selected by
setting the (0x2C) orient_hyst bits. 1 LSB of (0x2C) orient_hyst always corresponds to 62.5 mg,
in any g-range (i.e. increment is independent from g-range setting). It is important to note that by
using a hysteresis ≠ 0 the actual switching angles become different from the angles given in the
tables since there is an overlap between the different orientations.
The most significant bit of the (0x0C) orient bits (which is displayed as an ´x´ in the above given
tables) contains information about the direction of the z-axis. It is set to ´0´ (´1´) if acc_z ≥ 0
(acc_z < 0).
Figure 12 shows the typical switching conditions between the four different orientations for the
symmetrical mode i.e. without hysteresis:
portrait
portraitupright
upright
landscape left
portrait
portraitupside
upside
down
landscape
landscaperight
right
portrait upright
2
1.5
1
0.5
0
0
45
90
135
180
225
270
315
360
-0.5
acc_y/acc_x
-1
acc_x/sin(theta)
-1.5
acc_y/sin(theta)
-2
phi

Figure 12: Typical orientation switching conditions w/o hysteresis
The orientation interrupt is enabled (disabled) by writing ´1´ (´0´) to bit (0x16) orient_en. The
interrupt is generated if the value of (0x0C) orient has changed. It is automatically cleared after
one stable period of the (0x0C) orient value. The interrupt status is stored in the (0x09)
orient_int bit. The register (0x0C) orient always reflects the current orientation of the device,
irrespective of which interrupt mode has been selected. Bit (0x0C) orient<2> reflects the device
orientation with respect to the z-axis. The bits (0x0C) orient<1:0> reflect the device orientation in
the x-y-plane. The conventions associated with register (0x0C) orient are detailed in chapter 5.
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4.7.7.1 Orientation blocking
The change of the (0x0C) orient value and – as a consequence – the generation of the interrupt
can be blocked according to conditions selected by setting the value of the (0x2C)
orient_blocking bits as described by Table 22.
Table 22: Blocking conditions for orientation recognition
(0x2C) orient_blocking
Conditions
00b
no blocking
theta blocking
or
acceleration in any axis > 1.5g
theta blocking
or
acceleration slope in any axis > 0.2 g
or
acceleration in any axis > 1.5g
theta blocking
or
acceleration slope in any axis > 0.4 g
or
acceleration in any axis > 1.5g and
value of orient is not stable for at least
100 ms
01b
10b
11b
The theta blocking is defined by the following inequality:
tan  
blocking _ theta
.
8
The parameter blocking_theta of the above given equation stands for the contents of the (0x2D)
orient_theta bits. It is possible to define a blocking angle between 0° and 44.8°. The internal
blocking algorithm saturates the acceleration values before further processing. As a
consequence, the blocking angles are strictly valid only for a device at rest; they can be different
if the device is moved.
Example:
To get a maximum blocking angle of 19° the parameter blocking_theta is determined in the
following way: (8 * tan(19°) )² = 7.588, therefore, blocking_value = 8dec = 001000b has to be
chosen.
In order to avoid unwanted generation of the orientation interrupt in a nearly flat position (z ~ 0,
sign change due to small movements or noise), a hysteresis of 0.2 g is implemented for the zaxis, i. e. a after a sign change the interrupt is only generated after |z| > 0.2 g.
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4.7.7.2 Up-Down Interrupt Suppression Flag
Per default an orientation interrupt is triggered when any of the bits in register (0x0C) orient
changes state. The BMA255 can be configured to trigger orientation interrupts only when the
device position changes in the x-y-plane while orientation changes with respect to the z-axis are
ignored. A change of the orientation of the z-axis, and hence a state change of bit (0x0C)
orient<2> is ignored (considered) when bit (0x2D) orient_ud_en is set to ‘0’ (‘1’).
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4.7.8 Flat detection
The flat detection feature gives information about the orientation of the devices´ z-axis relative
to the g-vector, i. e. it recognizes whether the device is in a flat position or not.
The flat angle  is adjustable by (0x2E) flat_theta from 0° to 44.8°. The flat angle can be set
according to following formula:
1

  atan
flat_theta 
8

A hysteresis of the flat detection can be enabled by (0x2F) flat_hy bits. In this case the flat
position is set if the angle drops below following threshold:
1
flat _ hy  flat _ hy 

 hyst,ll  atan
flat_theta  1 

8

1024 
16



The flat position is reset if the angle exceeds the following threshold:
1
flat _ hy  flat _ hy 

 hyst,ul  atan flat_theta  1 

8
1024 
16 


The flat interrupt is enabled (disabled) by writing ´1´ (´0´) to bit (0x16) flat_en. The flat value is
stored in the (0x0C) flat bit if the interrupt is enabled. This value is ´1´ if the device is in the flat
position, it is ´0´ otherwise. The flat interrupt is generated if the flat value has changed and the
new value is stable for at least the time given by the (0x2F) flat_hold_time bits. A flat interrupt
may be also generated if the flat interrupt is enabled. The actual status of the interrupt is stored
in the (0x09) flat_int bit. The flat orientation of the sensor can always be determined from
reading the (0x0C) flat bit after interrupt generation. If unlatched interrupt mode is used, the
(0x09) flat_int value and hence the interrupt is automatically cleared after one sample period. If
temporary or latched interrupt mode is used, the (0x09) flat_int value is kept fixed until the latch
time expires or the interrupt is reset.
The meaning of the (0x2F) flat_hold_time bits can be seen from Table 23.
Table 23: Meaning of flat_hold_time
(0x2F) flat_hold_time
Time
00b
01b
10b
11b
0
512 ms
1024 ms
2048 ms
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4.7.9 Low-g interrupt
This interrupt is based on the comparison of acceleration data against a low-g threshold, which
is most useful for free-fall detection.
The interrupt is enabled (disabled) by writing “1” (“0”) to the (0x17) low_en bit. There are two
modes available, ‘single’ mode and ‘sum’ mode. In ‘single’ mode, the acceleration of each axis
is compared with the threshold; in ‘sum’ mode, the sum of absolute values of all accelerations
|acc_x| + |acc_y| + |acc_z| is compared with the threshold. The mode is selected by the
contents of the (0x24) low_mode bit: “0” means ‘single’ mode, “1” means ‘sum’ mode.
The low-g threshold is set through the (0x23) low_th register. 1 LSB of (0x23) low_th always
corresponds to an acceleration of 7.81 mg (i.e. increment is independent from g-range setting).
A hysteresis can be selected by setting the (0x24) low_hy bits. 1 LSB of (0x24) low_hy always
corresponds to an acceleration difference of 125 mg in any g-range (as well, increment is
independent from g-range setting).
The low-g interrupt is generated if the absolute values of the acceleration of all axes (´and´
relation, in case of single mode) or their sum (in case of sum mode) are lower than the threshold
for at least the time defined by the (0x22) low_dur register. The interrupt is reset if the absolute
value of the acceleration of at least one axis (´or´ relation, in case of single mode) or the sum of
absolute values (in case of sum mode) is higher than the threshold plus the hysteresis for at
least one data acquisition. In bit (0x09) low_int the interrupt status is stored.
The relation between the content of (0x22) low_dur and the actual delay of the interrupt
generation is: delay [ms] = [(0x22) low_dur + 1] • 2 ms. Therefore, possible delay times range
from 2 ms to 512 ms.
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4.7.10 High-g interrupt
This interrupt is based on the comparison of acceleration data against a high-g threshold for the
detection of shock or other high-acceleration events.
The high-g interrupt is enabled (disabled) per axis by writing “1” (“0”) to bits (0x17) high_en_x,
(0x17) high_en_y, and (0x17) high_en_z, respectively. The high-g threshold is set through the
(0x26) high_th register. The meaning of an LSB of (0x26) high_th depends on the selected grange: it corresponds to 7.81 mg in 2g-range, 15.63 mg in 4g-range, 31.25 mg in 8g-range, and
62.5 mg in 16g-range (i.e. increment depends from g-range setting).
A hysteresis can be selected by setting the (0x24) high_hy bits. Analogously to (0x26) high_th,
the meaning of an LSB of (0x24) high_hy is g-range dependent: it corresponds to an
acceleration difference of 125 mg in 2g-range, 250 mg in 4g-range, 500 mg in 8g-range, and
1000mg in 16g-range (as well, increment depends from g-range setting).
The high-g interrupt is generated if the absolute value of the acceleration of at least one of the
enabled axes (´or´ relation) is higher than the threshold for at least the time defined by the
(0x25) high_dur register. The interrupt is reset if the absolute value of the acceleration of all
enabled axes (´and´ relation) is lower than the threshold minus the hysteresis for at least the
time defined by the (0x25) high_dur register. In bit (0x09) high_int the interrupt status is stored.
The relation between the content of (0x25) high_dur and the actual delay of the interrupt
generation is delay [ms] = [(0x22) low_dur + 1] • 2 ms. Therefore, possible delay times range
from 2 ms to 512 ms. The interrupt will be cleared immediately once acceleration is lower than
threshold.
4.7.10.1 Axis and sign information of high-g interrupt
The axis which triggered the interrupt is indicated by bits (0x0C) high_first_x, (0x0C)
high_first_y, and (0x0C) high_first_z. The bit corresponding to the triggering axis contains a “1”
while the other bits hold a “0”. These bits are cleared together with clearing the interrupt status.
The sign of the triggering acceleration is stored in bit (0x0C) high_sign. If (0x0C) high_sign = “0”
(“1”), the sign is positive (negative).
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Datasheet
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Page 54
4.7.11 No-motion / slow motion detection
The slow-motion/no-motion interrupt engine can be configured in two modes.
In slow-motion mode an interrupt is triggered when the measured slope of at least one enabled
axis exceeds the programmable slope threshold for a programmable number of samples. Hence
the engine behaves similar to the any-motion interrupt, but with a different set of parameters. In
order to suppress false triggers, the interrupt is only generated (cleared) if a certain number N of
consecutive slope data points is larger (smaller) than the slope threshold given by (0x27)
slo_no_mot_dur<1:0>. The number is N = (0x27) slo_no_mot_dur<1:0> + 1.
In no-motion mode an interrupt is generated if the slope on all selected axes remains smaller
than a programmable threshold for a programmable delay time. Figure 13 shows the timing
diagram for the no-motion interrupt. The scaling of the threshold value is identical to that of the
slow-motion interrupt. However, in no-motion mode register (0x27) slo_no_mot_dur defines the
delay time before the no-motion interrupt is triggered. Table 24 lists the delay times adjustable
with register (0x27) slo_no_mot_dur. The timer tick period is 1 second. Hence using short delay
times can result in considerable timing uncertainty.
If bit (0x18) slo_no_mot_sel is set to ‘1’ (‘0’) the no-motion/slow-motion interrupt engine is
configured in the no-motion (slow-motion) mode. Common to both modes, the engine monitors
the slopes of the axes that have been enabled with bits (0x18) slo_no_mot_en_x, (0x18)
slo_no_mot_en_y, and (0x18) slo_no_mot_en_z for the x-axis, y-axis and z-axis, respectively.
The measured slope values are continuously compared against the threshold value defined in
register (0x29) slo_no_mot_th. The scaling is such that 1 LSB of (0x29) slo_no_mot_th
corresponds to 3.91 mg in 2g-range (7.81 mg in 4g-range, 15.6 mg in 8g-range and 31.3 mg in
16g-range). Therefore the maximum value is 996 mg in 2g-range (1.99g in 4g-range, 3.98g in
8g-range and 7.97g in 16g-range). The time difference between the successive acceleration
samples depends on the selected bandwidth and equates to 1/(2 * bw).
Table 24: No-motion time-out periods
(0x27)
slo_no_mot_dur
0
1
2
...
14
15
Delay
time
1s
2s
3s
...
15 s
16 s
(0x27)
slo_no_mot_dur
16
17
18
19
20
21
Delay
time
40 s
48 s
56 s
64 s.
72 s
80 s
(0x27)
slo_no_mot_dur
32
33
34
...
62
63
Delay
Time
88 s
96 s
104 s
...
328 s
336 s
Note: slo_no_mot_dur values 22 to 31 are not specified
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eCompass BMC150
acceleration
Page 55
acc(t0+Δt)
acc(t0)
slope
axis x, y, or z
slope(t0+Δt)= acc(t0+Δt) - acc(t0)
axis x, y, or z
slo_no_mot_th
-slo_no_mot_th
slo_no_mot_dur
timer
INT
time
Figure 13: Timing of No-motion interrupt
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4.8 Accelerometer softreset
A softreset causes all user configuration settings to be overwritten with their default value and
the sensor to enter normal mode.
A softreset is initiated by means of writing value 0xB6 to register (0x14) softreset. Subsequently
a waiting time of tw,up1 (max.) is required prior to accessing any configuration registers.
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4.9 Magnetometer interrupt controller
Four magnetometer based interrupt engines are integrated in the magnetometer part of
BMC150: Low-Threshold, High-Threshold, Overflow and Data Ready (DRDY). Each interrupt
can be enabled independently.
When enabled, an interrupt sets the corresponding status bit in the interrupt status register
(0x4A) when its condition is satisfied.
When the “Interrupt Pin Enable” bit (register 0x4E bit6) is set, any occurring activated interrupts
are flagged on the BMC150’s INT3 output pin. By default, the interrupt pin is disabled (high-Z
status).
Low-Threshold, High-Threshold and Overflow interrupts are mapped to the INT3 pin when
enabled, Data Ready (DRDY) interrupt is mapped to the DRDY pin of BMC150 when enabled.
For High- and Low-Threshold interrupts each axis X/Y/Z can be enabled separately for interrupt
detection in the registers “High Int Z en”, “High Int Y en”, “High Int X en”, “Low Int Z en”, “Low Int
Y En” and “Low Int X En” in register 0x4D bit5-bit0. Overflow interrupt is shared for X, Y and Z
axis.
When the “Data Ready Pin En” bit (register 0x4E bit7) is set, the Data Ready (DRDY) interrupt
event is flagged on the BMC150’s DRDY output pin (by default the “Data Ready Pin En” bit is
not set and DRDY pin is in high-Z state).
The interrupt status registers are updated together with writing new data into the magnetic field
data registers. The status bits for Low-/High-Threshold interrupts are located in register 0x4A,
the Data Ready (DRDY) status flag is located at register 0x48 bit0.
If an interrupt is disabled, all active status bits and pins are reset after the next measurement
was performed.
4.9.1 General features
An interrupt is cleared depending on the selected interrupt mode, which is common to all
interrupts. There are two different interrupt modes: non-latched and latched. All interrupts
(except Data Ready) can be latched or non-latched. Data Ready (DRDY) is always cleared after
readout of data registers ends.
A non-latched interrupt will be cleared on a new measurement when the interrupt condition is
not valid anymore, whereas a latched interrupt will stay high until the interrupts status register
(0x4A) is read out. After reading the interrupt status, both the interrupt status bits and the
interrupt pin are reset. The mode is selected by the “Interrupt latch” bit (register 0x4A bit1),
where the default setting of “1” means latched. Figure 14 shows the difference between the
modes for the example Low-Threshold interrupt.
INT3 and DRDY pin polarity can be changed by the “Interrupt polarity” bit (register 0x4E bit0)
and “DR polarity” (register 0x4E bit2), from the default high active (“1”) to low active (“0”).
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Page 58
Low threshold
measurements
INT3 pin (non-latched)
INT3 pin (latched)
Readings of interrupt status register (0x4A)
Figure 14: Interrupt latched and non-latched mode
4.9.2 Electrical behavior of magnetic interrupt pins
Both interrupt pins INT3 and DRDY are push/pull when the corresponding interrupt pin enable
bit is set, and are floating (High-Z) when the corresponding interrupt pin enable bit is disabled
(default).
4.9.3 Data ready / DRDY interrupt
This interrupt serves for synchronous reading of magnetometer data. It is generated after
storing a new set of values (DATAX, DATAY, DATAZ, RHALL) in the data registers:
Active measurement time
Inactive time
Data write into
output registers
Preset time
Measurement
Measurement
Data
Dataprocessing
processing
DRDY =’1 ’
Measurement phase start
Data readout
Figure 15: Data acquisition and DRDY operation (DRDY in “high active” polarity)
The interrupt mode of the Data Ready (DRDY) interrupt is fixed to non-latched.
It is enabled (disabled) by writing “1” (“0”) to “Data Ready pin En” in register 0x4E bit7.
DRDY pin polarity can be changed by the “DR polarity” bit (register 0x4E bit2), from the default
high active (“1”) to low active (“0”).
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Page 59
4.9.4 Low-threshold interrupt
When the data registers’ (DATAX, DATAY and DATAZ) values drop below the threshold level
defined by the “Low Threshold register (0x4F), the corresponding interrupt status bits for those
axes are set (“Low Int X”, “Low Int Y” and “Low Int Z” in register 0x4A). This is done for each
axis independently. Please note that the X and Y axis value for overflow is -4096. However, no
interrupt is generated on these values. See chapter 4.9.6 for more information on overflow.
Hereby, one bit in “Low Threshold” corresponds to roughly 6µT (not exactly, as the raw
magnetic field values DATAX, DATAY and DATAZ are not temperature compensated).
The Low-threshold interrupt is issued on INT3 pin when one or more values of the data registers
DATAX, DATAY and DATAZ drop below the threshold level defined by the “Low Threshold”
register (0x4F), and when the axis where the threshold was exceeded is enabled for interrupt
generation:
Result =
(DATAX < “Low Threshold” x 16) AND “Low Int X en” is “0” OR
(DATAY < “Low Threshold” x 16) AND “Low Int Y en” is “0” OR
(DATAZ < “Low Threshold” x 16) AND “Low Int Z en” is “0”
Note: Threshold interrupt enable bits (“Low INT [XYZ] en”) are active low and “1” (disabled) by
default.
Low threshold
a
a
measurements
INT3 pin (non-latched)
INT3 pin (latched)
Read interrupt status
register (0x4A)
Figure 16: Low-threshold interrupt function
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4.9.5 High-threshold interrupt
When the data registers’ (DATAX, DATAY and DATAZ) values exceed the threshold level
defined by the “High Threshold register (0x50), the corresponding interrupt status bits for those
axes are set (“High Int X”, “High Int Y” and “High Int Z” in register 0x4A). This is done for each
axis independently.
Hereby, one bit in “High Threshold” corresponds to roughly 6µT (not exactly, as the raw
magnetic field values DATAX, DATAY and DATAZ are not temperature compensated).
The High-threshold interrupt is issued on INT3 pin when one or more values of the data
registers DATAX, DATAY and DATAZ exceed the threshold level defined by the “High
Threshold” register (0x50), and when the axis where the threshold was exceeded is enabled for
interrupt generation:
Result =
(DATAX > “High Threshold” x 16) AND “High Int X en” is “0” OR
(DATAY > “High Threshold” x 16) AND “High Int Y en” is “0” OR
(DATAZ > “High Threshold” x 16) AND “High Int Z en” is “0”
Note:
Threshold interrupt enable bits (“High INT [XYZ] en”) are active low and “1” (disabled) by
default.
High threshold
a
a
measurements
INT3 pin (non-latched)
INT3 pin (latched)
Read interrupt status
register (0x4A)
Figure 17: High-threshold interrupt function
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Page 61
4.9.6 Overflow
When a measurement axis had an overflow, the corresponding data register is saturated to the
most negative value. For X and Y axis, the data register is set to the value -4096. For the Z axis,
the data register is set to the value -16384.
The “Overflow” flag (register 0x4A bit6) indicates that the measured magnetic field raw data of
one or more axes exceeded maximum range of the device. The overflow condition can be
flagged on the INT3 pin by setting the bit “overflow int enable” (register 0x4D bit6, active high,
default value “0”). The channel on which overflow occurred can by determined by assessing the
DATAX/Y/Z registers.
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5. FIFO Operation
5.1 FIFO Operating Modes
The IC of the accelerometer part of BMC150 features an integrated FIFO memory capable of
storing up to 32 frames. Conceptually each frame consists of three 16-bit words corresponding
to the x, y and z- axis, which are sampled at the same point in time. At the core of the FIFO is a
buffer memory, which can be configured to operate in the following modes:

FIFO Mode: In FIFO mode the acceleration data of the selected axes are stored in the
buffer memory. If enabled, a watermark interrupt is triggered when the buffer has filled
up to a configurable level. The buffer will be continuously filled until the fill level reaches
32 frames. When it is full the data collection is stopped, and all additional samples are
ignored. Once the buffer is full, a FIFO-full interrupt is generated if it has been enabled.

STREAM Mode: In STREAM mode the acceleration data of the selected axes are
stored in the buffer until it is full. The buffer has a depth of 31 frames. When the buffer is
full the data collection continues and oldest entry is discarded. If enabled, a watermark
interrupt is triggered when the buffer is filled to a configurable level. Once the buffer is
full, a FIFO-full interrupt is generated if it has been enabled.

BYPASS Mode: In bypass mode, only the current sensor data can be read out from the
FIFO address. Essentially, the FIFO behaves like the STREAM mode with a depth of 1.
Compared to reading the data from the normal data registers, the advantage to the user
is that the packages X, Y, Z are from the same timestamp, while the data registers are
updated sequentially and hence mixing of data from different axes can occur.
The primary FIFO operating mode is selected with register (0x3E) fifo_mode according to ‘00b’
for BYPASS mode, ‘01b’ for FIFO mode, and ‘10b’ for STREAM mode. Writing to register
(0x3E) clears the buffer content and resets the FIFO-full and watermark interrupts. When
reading register (0x3E) fifo_mode always contains the current operating mode.
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5.2 FIFO Data Readout
The FIFO stores the data that are also available at the acceleration read-out registers (0x02) to
(0x07). Thus, all configuration settings apply to the FIFO data as well as the acceleration data
readout registers. The FIFO read out is possible through register (0x3F). The readout can be
performed using burst mode since the read address counter is no longer incremented, when it
has reached address (0x3F). This implies that the trapping also occurs when the burst read
access starts below address (0x3F). A single burst can read out one or more frames at a time.
Register (0x3E) fifo_data_select controls the acceleration data of which axes are stored in the
FIFO. Possible settings for register (0x3E) fifo_data_select are ‘00b’ for x, y- and z-axis, ‘01b’
for x-axis only, ‘10b’ for y-axis, ‘11b’ for z-axis only. The depth of the FIFO is independent of
whether all or a single axis have been selected. Writing to register (0x3E) clears the buffer
content and resets the FIFO-full and watermark interrupts.
If all axes are enabled, the format of the data read-out from register (0x3F) is as follows:
…
X LSB
X MSB
Y LSB
Y MSB
Z LSB
Z MSB
…
Frame 1
If only one axis is enabled, the format of the data read-out from register (0x3F) is as follows
(example shown: y-axis only, other axes are equivalent).
Y LSB
Y MSB
Frame 1
Y LSB
Y MSB
…
Frame 2
If a frame is not completely read due to an incomplete read operation, the remaining part of the
frame is discarded. In this case the FIFO aligns to the next frame during the next read
operation. In order for the discarding mechanism to operate correctly, there must be a delay of
at least 1.5 us between the last data bit of the partially read frame and the first address bit of the
next FIFO read access. Otherwise frames must not be read out partially.
If the FIFO is read beyond the FIFO fill level zeroes (0) will be read. If the FIFO is read beyond
the FIFO fill level the read or burst read access time must not exceed the sampling time tSAMPLE.
Otherwise frames may be lost.
5.3 FIFO Frame Counter and Overrun Flag
Register (0x0E) fifo_frame_counter reflects the current fill level of the buffer. If additional frames
are written to the buffer although the FIFO is full, the (0x0E) fifo_overrun bit is set to ‘1’. The
FIFO buffer is cleared, the FIFO fill level indicated in register (0x0E) fifo_frame_counter and the
(0x0E) fifo_overrun bit are both set to ‘0’ each time one a write access to one of the FIFO
configuration registers (0x3E) or (0x30) occurs. The (0x0E) fifo_overrun bit is not reset when the
FIFO fill level (0x0E) fifo_frame_counter has decremented to ‘0’ due to reading from register
(0x3F).
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5.4 FIFO Interrupts
The FIFO controller can generate two different interrupt events, a FIFO-full and a watermark
event. The FIFO-full and watermark interrupts are functional in all FIFO operating modes. The
watermark interrupt is asserted when the fill level in the buffer has reached the frame count
defined by register (0x30) fifo_water_mark_trigger_retain. In order to enable (disable) the
watermark interrupt, the (0x17) int_fwm_en bit must be set to ‘1’ (‘0’). To map the watermark
interrupt signal to INT1 pin (INT2 pin), (0x1A) int1_fwm ((0x1A) int2_fwm) bit must be set to ‘1’.
The status of the watermark interrupt may be read back through the (0x0A) fifo_wm_int bit.
Writing to register (0x30) fifo_water_mark_trigger_retain clears the FIFO buffer.
The FIFO-full interrupt is triggered when the buffer has been completely filled. In FIFO mode
this occurs 32, in STREAM mode 31 samples, and in BYPASS mode 1 sample after the buffer
has been cleared. In order to enable the FIFO-full interrupt, bit (0x17) int_ffull_en as well as one
or both of bits (0x1A) int1_fful or (0x1A) int2_fful must also be set to ‘1’. The status of the FIFOfull interrupt may be read back through bit (0x0A) fifo_full_int.
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6. Accelerometer register description
6.1 General remarks
The entire communication with the device is performed by reading from and writing to registers.
Registers have a width of 8 bits; they are mapped to a common space of 64 addresses from
(0x00) up to (0x3F). Within the used range there are several registers which are either
completely or partially marked as ‘reserved’. Any reserved bit is ignored when it is written and
no specific value is guaranteed when read. It is recommended not to use registers at all which
are completely marked as ‘reserved’. Furthermore it is recommended to mask out (logical and
with zero) reserved bits of registers which are partially marked as reserved.
Registers with addresses from (0x00) up to (0x0E) are read-only. Any attempt to write to these
registers is ignored. There are bits within some registers that trigger internal sequences. These
bits are configured for write-only access, e. g. (0x21) reset_int or the entire (0x14) softreset
register, and read as value ´0´.
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6.2 Register map
Register Address
0x3F
0x3E
0x3D
0x3C
0x3B
0x3A
0x39
0x38
0x37
0x36
0x35
0x34
0x33
0x32
0x31
0x30
0x2F
0x2E
0x2D
0x2C
0x2B
0x2A
0x29
0x28
0x27
0x26
0x25
0x24
0x23
0x22
0x21
0x20
0x1F
0x1E
0x1D
0x1C
0x1B
0x1A
0x19
0x18
0x17
0x16
0x15
0x14
0x13
0x12
0x11
0x10
0x0F
0x0E
0x0D
0x0C
0x0B
0x0A
0x09
0x08
0x07
0x06
0x05
0x04
0x03
0x02
0x01
0x00
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Access Default
fifo_data_output_register<7:0>
fifo_mode<1:0>
fifo_data_select<1:0>
GP1<7:0>
GP0<7:0>
offset_z<7:0>
offset_y<7:0>
offset_x<7:0>
offset_target_y<1:0>
cal_rdy
offset_target_z<1:0>
cal_trigger<1:0>
offset_reset
nvm_remain<3:0>
offset_target_x<1:0>
hp_z_en
hp_y_en
i2c_wdt_en
nvm_rdy
self_test_sign
nvm_load
self_test_amp
cut_off
hp_x_en
i2c_wdt_sel
spi3
nvm_prog_trig
nvm_prog_mode
self_test_axis<1:0>
fifo_water_mark_level_trigger_retain<5:0>
flat_hold_time<1:0>
flat_hy<2:0>
flat_theta<5:0>
orient_theta<5:0>
orient_blocking<1:0>
tap_th<4:0>
orient_ud_en
orient_hyst<2:0>
tap_samp<1:0>
tap_quiet
tap_shock
orient_mode<1:0>
tap_dur<2:0>
slo_no_mot_th<7:0>
slope_th<7:0>
slo_no_mot_dur<5:0>
slope_dur<1:0>
high_th<7:0>
high_dur<7:0>
high_hy<1:0>
low_mode
low_hy<1:0>
low_th<7:0>
low_dur<7:0>
reset_int
int2_od
int2_lvl
latch_int<3:0>
int1_od
int1_lvl
int_src_data
int_src_tap
int_src_slo_no_mot
int_src_slope
int_src_high
int_src_low
int2_slope
int1_ffull
int1_slope
slo_no_mot_en_z
high_en_z
slope_en_z
int2_high
int1_fwm
int1_high
slo_no_mot_en_y
high_en_y
slope_en_y
int2_low
int1_data
int1_low
slo_no_mot_en_x
high_en_x
slope_en_x
int2_flat
int2_data
int1_flat
int2_orient
int2_fwm
int1_orient
int2_s_tap
int2_ffull
int1_s_tap
int2_d_tap
int2_slo_no_mot
int1_d_tap
flat_en
int_fwm_en
orient_en
int_ffull_en
s_tap_en
data_en
d_tap_en
int1_slo_no_mot
slo_no_mot_sel
low_en
shadow_dis
lowpower_mode
lowpower_en
sleeptimer_mode
deep_suspend
softreset
data_high_bw
suspend
sleep_dur<3:0>
bw<4:0>
range<3:0>
fifo_overrun
flat
tap_sign
data_int
flat_int
fifo_frame_counter<6:0>
tap_first_z
fifo_wm_int
orient_int
orient<2:0>
tap_first_y
fifo_full_int
s_tap_int
tap_first_x
high_sign
slope_sign
d_tap_int
slo_no_mot_int
temp<7:0>
acc_z_msb<11:4>
acc_z_lsb<3:0>
high_first_z
slope_first_z
high_first_y
slope_first_y
high_first_x
slope_first_x
slope_int
high_int
low_int
new_data_z
acc_y_msb<11:4>
acc_y_lsb<3:0>
new_data_y
acc_x_msb<11:4>
acc_x_lsb<3:0>
new_data_x
chip_id<7:0>
ro
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
w/r
wo
w/r
w/r
w/r
w/r
w/r
ro
w/r
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
ro
0x00
0x00
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x10
0x00
0x00
0xF0
0x00
0xFF
0x00
0x11
0x08
0x48
0x18
0x0A
0x04
0x14
0x14
0x00
0xC0
0x0F
0x81
0x30
0x09
0x00
0x05
0xFF
0x00
0xFF
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0xFF
0x00
0x00
0x00
0x00
0x0F
0x03
0x00
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
-0xFA
common w/r registers: Application specific settings which are not equal to the default settings,
must be re-set to its designated values after POR, soft-reset and wake up from deep suspend.
user w/r registers: Initial default content = 0x00. Freely programmable by the user.
Remains unchanged after POR, soft-reset and wake up from deep suspend.
Figure 18: Register map
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 67
6.3 Chip ID
Register 0x00 (BGW_CHIPID)
The register contains the chip identification code.
Name
Bit
Read/Write
Reset
Value
Content
0x00
7
R
n/a
Bit
Read/Write
Reset
Value
Content
3
R
n/a
chip_id<7:0>:
6
R
n/a
BGW_CHIPID
5
R
n/a
4
R
n/a
chip_id<7:4>
2
R
n/a
1
R
n/a
0
R
n/a
chip_id<3:0>
Fixed value b’1111’1010
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 68
6.4 Acceleration data
Register 0x02 (ACCD_X_LSB)
The register contains the least-significant bits of the X-channel acceleration readout value.
When reading out X-channel acceleration values, data consistency is guaranteed if the
ACCD_X_LSB is read out before the ACCD_X_MSB and shadow_dis=’0’. In this case, after the
ACCD_X_LSB has been read, the value in the ACCD_X_MSB register is locked until the
ACCD_X_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_X_LSB at any time except
during power-up and in DEEP_SUSPEND mode.
Name
Bit
Read/Write
Reset
Value
Content
0x02
7
R
n/a
Bit
Read/Write
Reset
Value
Content
3
R
n/a
2
R
n/a
1
R
n/a
0
R
n/a
undefined
undefined
‘0’
new_data_x
acc_x_lsb<3:0>:
undefined:
New_data_x:
ACCD_X_LSB
5
R
n/a
6
R
n/a
4
R
n/a
acc_x_lsb<3:0>
Least significant 4 bits of acceleration read-back value; (two’s-complement
format)
random data; to be ignored.
‘0’: acceleration value has not been updated since it has been read out last
‘1’: acceleration value has been updated since it has been read out last
Register 0x03 (ACCD_X_MSB)
The register contains the most-significant bits of the X-channel acceleration readout value.
When reading out X-channel acceleration values, data consistency is guaranteed if the
ACCD_X_LSB is read out before the ACCD_X_MSB and shadow_dis=’0’. In this case, after the
ACCD_X_LSB has been read, the value in the ACCD_X_MSB register is locked until the
ACCD_X_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_X_MSB at any time except
during power-up and in DEEP_SUSPEND mode.
Name
Bit
Read/Write
Reset
Value
Content
0x03
7
R
n/a
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
6
R
n/a
ACCD_X_MSB
5
R
n/a
4
R
n/a
acc_x_msb<11:8>
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Bit
Read/Write
Reset
Value
Content
3
R
n/a
2
R
n/a
Page 69
1
R
n/a
0
R
n/a
acc_x_msb<7:4>
acc_x_msb<11:4>: Most significant 8 bits of acceleration readback value (two’s-complement
format)
Register 0x04 (ACCD_Y_LSB)
The register contains the least-significant bits of the Y-channel acceleration readout value.
When reading out Y-channel acceleration values, data consistency is guaranteed if the
ACCD_Y_LSB is read out before the ACCD_Y_MSB and shadow_dis=’0’. In this case, after the
ACCD_Y_LSB has been read, the value in the ACCD_Y_MSB register is locked until the
ACCD_Y_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_Y_LSB at any time except
during power-up and in DEEP_SUSPEND mode.
Name
Bit
Read/Write
Reset
Value
Content
0x04
7
R
n/a
Bit
Read/Write
Reset
Value
Content
3
R
n/a
2
R
n/a
1
R
n/a
0
R
n/a
undefined
undefined
‘0’
new_data_y
acc_y_lsb<3:0>:
undefined:
new_data_y:
ACCD_Y_LSB
5
R
n/a
6
R
n/a
4
R
n/a
acc_y_lsb<3:0>
Least significant 4 bits of acceleration readback value; (two’s-complement
format)
random data; to be ignored
‘0’: acceleration value has not been updated since it has been read out last
‘1’: acceleration value has been updated since it has been read out last
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 70
Register 0x05 (ACCD_Y_MSB)
The register contains the most-significant bits of the Y-channel acceleration readout value.
When reading out Y-channel acceleration values, data consistency is guaranteed if the
ACCD_Y_LSB is read out before the ACCD_Y_MSB and shadow_dis=’0’. In this case, after the
ACCD_Y_LSB has been read, the value in the ACCD_Y_MSB register is locked until the
ACCD_Y_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_Y_MSB at any time except
during power-up and in DEEP_SUSPEND mode.
Name
Bit
Read/Write
Reset
Value
Content
0x05
7
R
n/a
Bit
Read/Write
Reset
Value
Content
3
R
n/a
ACCD_Y_MSB
5
R
n/a
6
R
n/a
4
R
n/a
acc_y_msb<11:8>
2
R
n/a
1
R
n/a
0
R
n/a
acc_y_msb<7:4>
acc_y_msb<11:4>: Most significant 8 bits of acceleration readback value (two’s-complement
format)
Register 0x06 (ACCD_Z_LSB)
The register contains the least-significant bits of the Z-channel acceleration readout value.
When reading out Z-channel acceleration values, data consistency is guaranteed if the
ACCD_Z_LSB is read out before the ACCD_Z_MSB and shadow_dis=’0’. In this case, after the
ACCD_Z_LSB has been read, the value in the ACCD_Z_MSB register is locked until the
ACCD_Z_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_Z_LSB at any time except
during power-up and in DEEP_SUSPEND mode.
Name
Bit
Read/Write
Reset
Value
Content
0x06
7
R
n/a
ACCD_Z_LSB
5
R
n/a
Bit
Read/Write
Reset
Value
Content
3
R
n/a
2
R
n/a
1
R
n/a
0
R
n/a
undefined
undefined
‘0’
new_data_z
6
R
n/a
4
R
n/a
acc_z_lsb<3:0>
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 71
Acc_z_lsb<3:0>: Least significant 4 bits of acceleration readback value; (two’s-complement
format)
undefined:
random data; to be ignored
new_data_z:
‘0’: acceleration value has not been updated since it has been read out last
‘1’: acceleration value has been updated since it has been read out last
Register 0x07 (ACCD_Z_MSB)
The register contains the most-significant bits of the Z-channel acceleration readout value.
When reading out Z-channel acceleration values, data consistency is guaranteed if the
ACCD_Z_LSB is read out before the ACCD_Z_MSB and shadow_dis=’0’. In this case, after the
ACCD_Z_LSB has been read, the value in the ACCD_Z_MSB register is locked until the
ACCD_Z_MSB has been read. This condition is inherently fulfilled if a burst-mode read access
is performed. Acceleration data may be read from register ACCD_Z_MSB at any time except
during power-up and in DEEP_SUSPEND mode.
Name
Bit
Read/Write
Reset
Value
Content
0x07
7
R
n/a
Bit
Read/Write
Reset
Value
Content
3
R
n/a
6
R
n/a
ACCD_Z_MSB
5
R
n/a
4
R
n/a
acc_z_msb<11:8>
2
R
n/a
1
R
n/a
0
R
n/a
acc_z_msb<7:4>
acc_z_msb<11:4>: Most significant 8 bits of acceleration readback value (two’s-complement
format)
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 72
6.5 Temperature data
Register 0x08 (ACCD_TEMP)
The register contains the current chip temperature represented in two’s complement format. A
readout value of temp<7:0>=0x00 corresponds to a temperature of 24°C.
Name
Bit
Read/Write
Reset
Value
Content
0x08
7
R
n/a
Bit
Read/Write
Reset
Value
Content
3
R
n/a
temp<7:0>:
6
R
n/a
ACCD_TEMP
5
R
n/a
4
R
n/a
temp<7:4>
2
R
n/a
1
R
n/a
0
R
n/a
temp<3:0>
Temperature value (two s-complement format)
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 73
6.6 Status registers
Register 0x09 (INT_STATUS_0)
The register contains interrupt status flags. Each flag is associated with a specific interrupt
function. It is set when the associated interrupt triggers. The setting of latch_int<3:0> controls if
the interrupt signal and hence the respective interrupt flag will be permanently latched,
temporarily latched or not latched. The interrupt function associated with a specific status flag
must be enabled.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
6
R
n/a
INT_STATUS_0
5
R
n/a
4
R
n/a
flat_int
orient_int
s_tap_int
d_tap_int
3
R
n/a
2
R
n/a
1
R
n/a
0
R
n/a
slo_no_mot_int
slope_int
high_int
low_int
flat_int:
orient_int :
s_tap_int:
d_tap_int
slo_not_mot_int:
slope_int:
high_int:
low_int:
0x09
7
R
n/a
flat interrupt status: ‘0’inactive, ‘1’ active
orientation interrupt status : ‘0’inactive, ‘1’ active
single tap interrupt status: ‘0’inactive, ‘1’ active
double tap interrupt status: ‘0’inactive, ‘1’ active
slow/no-motion interrupt status: ‘0’inactive, ‘1’ active
slope interrupt status: ‘0’inactive, ‘1’ active
high-g interrupt status: ‘0’inactive, ‘1’ active
low-g interrupt status: ‘0’inactive, ‘1’ active
Register 0x0A (INT_STATUS_1)
The register contains interrupt status flags. Each flag is associated with a specific interrupt
function. It is set when the associated interrupt engine triggers. The setting of latch_int<3:0>
controls if the interrupt signal and hence the respective interrupt flag will be permanently
latched, temporarily latched or not latched. The interrupt function associated with a specific
status flag must be enabled.
Name
Bit
Read/Write
Reset
Value
Content
0x0A
7
R
n/a
6
R
n/a
INT_STATUS_1
5
R
n/a
4
R
n/a
data_int
fifo_wm_int
fifo_full_int
reserved
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Bit
Read/Write
Reset
Value
Content
data_int:
fifo_wm_int:
fifo_full_int:
reserved:
3
R
n/a
2
R
n/a
Page 74
1
R
n/a
0
R
n/a
reserved
data ready interrupt status: ‘0’inactive, ‘1’ active
FIFO watermark interrupt status: ‘0’inactive, ‘1’ active
FIFO full interrupt status: ‘0’inactive, ‘1’ active
reserved, write to ‘0’
Register 0x0B (INT_STATUS_2)
The register contains interrupt status flags. Each flag is associated with a specific interrupt
engine. It is set when the associated interrupt engine triggers. The setting of latch_int<3:0>
controls if the interrupt signal and hence the respective interrupt flag will be permanently
latched, temporarily latched or not latched. The interrupt function associated with a specific
status flag must be enabled.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
tap_sign:
tap_first_z:
tap_first_y:
tap_first_x:
slope_sign:
slope_first_z:
slope_first_y:
slope_first_x:
0x0B
7
R
n/a
6
R
n/a
INT_STATUS_2
5
R
n/a
4
R
n/a
tap_sign
tap_first_z
tap_first_y
tap_first_x
3
R
n/a
2
R
n/a
1
R
n/a
0
R
n/a
slope_sign
slope_first_z
slope_first_y
slope_first_x
sign of single/double tap triggering signal was ‘0’positive, or ‘1’ negative
single/double tap interrupt: ‘1’  triggered by, or ‘0’not triggered by z-axis
single/double tap interrupt: ‘1’  triggered by, or ‘0’not triggered by y-axis
single/double tap interrupt: ‘1’  triggered by, or ‘0’not triggered by x-axis
slope sign of slope tap triggering signal was ‘0’positive, or ‘1’ negative
slope interrupt: ‘1’  triggered by, or ‘0’not triggered by z-axis
slope interrupt: ‘1’  triggered by, or ‘0’not triggered by y-axis
slope interrupt: ‘1’  triggered by, or ‘0’not triggered by x-axis
Register 0x0C (INT_STATUS_3)
The register contains interrupt status flags. Each flag is associated with a specific interrupt
engine. It is set when the associated interrupt engine triggers. With the exception of orient<3:0>
the setting of latch_int<3:0> controls if the interrupt signal and hence the respective interrupt
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 75
flag will be permanently latched, temporarily latched or not latched. The interrupt function
associated with a specific status flag must be enabled.
Name
Bit
Read/Write
Reset
Value
Content
0x0C
7
R
n/a
Bit
Read/Write
Reset
Value
Content
3
R
n/a
2
R
n/a
1
R
n/a
0
R
n/a
high_sign
high_first_z
high_first_y
high_first_x
flat:
orient<2>:
Orient<1:0>:
High_sign:
high_first_z:
high_first_y:
high_first_x:
6
R
n/a
flat
INT_STATUS_3
5
R
n/a
4
R
n/a
orient<2:0>
device is in ‘1’  flat, or ‘0’ non flat position;
only valid if (0x16) flat_en = ‘1’
Orientation value of z-axis: ´0´  upward looking, or ´1´  downward
looking. The flag always reflect the current orientation status, independent of
the setting of latch_int<3:0>. The flag is not updated as long as an
orientation blocking condition is active.
orientation value of x-y-plane:
‘00’portrait upright;
‘01’portrait upside down;
‘10’landscape left;
‘11’landscape right;
The flags always reflect the current orientation status, independent of the
setting of latch_int<3:0>. The flag is not updated as long as an orientation
blocking condition is active.
sign of acceleration signal that triggered high-g interrupt was ‘0’positive, ‘1’
negative
high-g interrupt: ‘1’  triggered by, or ‘0’not triggered by z-axis
high-g interrupt: ‘1’  triggered by, or ‘0’not triggered by y-axis
high-g interrupt: ‘1’  triggered by, or ‘0’not triggered by x-axis
Register 0x0E (FIFO_STATUS)
The register contains FIFO status flags.
Name
Bit
Read/Write
Reset
Value
Content
0x0E
7
R
n/a
fifo_overrun
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
6
R
n/a
FIFO_STATUS
5
R
n/a
4
R
n/a
fifo_frame_counter<6:4>
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Bit
Read/Write
Reset
Value
Content
3
R
n/a
2
R
n/a
Page 76
1
R
n/a
0
R
n/a
fifo_frame_counter<3:0>
fifo_overrun:
FIFO overrun condition has ‘1’  occurred, or ‘0’not occurred; flag can be
cleared by writing to the FIFO configuration register FIFO_CONFIG_1 only
fifo_frame_counter<6:4>:
Current fill level of FIFO buffer. An empty FIFO corresponds to
0x00. The frame counter can be cleared by reading out all frames from the
FIFO buffer or writing to the FIFO configuration register FIFO_CONFIG_1.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 77
6.7 g-range selection
Register 0x0F (PMU_RANGE)
The register allows the selection of the accelerometer g-range.
Name
Bit
Read/Write
Reset
Value
Content
0x0F
7
R/W
0
6
R/W
0
PMU_RANGE
5
R/W
0
4
R/W
0
reserved
0
Bit
Read/Write
Reset
Value
Content
range<3:0>:
reserved:
3
R/W
0
2
R/W
0
1
R/W
1
0
R/W
1
range<3:0>
Selection of accelerometer g-range:
´0011b´  ±2g range; ´0101b´  ±4g range; ´1000b´  ±8g range;
´1100b´  ±16g range; all other settings  reserved (do not use)
write ‘0’
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 78
6.8 Bandwidths
Register 0x10 (PMU_BW)
The register allows the selection of the acceleration data filter bandwidth.
Name
Bit
Read/Write
Reset
Value
Content
0x10
7
R/W
0
PMU_BW
5
R/W
0
6
R/W
0
reserved
4
R/W
0
bw<4>
0
Bit
Read/Write
Reset
Value
Content
bw<4:0>:
reserved:
3
R/W
1
2
R/W
1
1
R/W
1
0
R/W
1
bw<3:0>
Selection of data filter bandwidth:
´00xxxb´  7.81 Hz,
´01000b´  7.81 Hz, ´01001b´  15.63 Hz,
´01010b´  31.25 Hz, ´01011b´  62.5 Hz, ´01100b´  125 Hz,
´01101b´  250 Hz,
´01110b´  500 Hz, ´01111b´  1000 Hz,
´1xxxxb´  1000 Hz
write ‘0’
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 79
6.9 Power modes
Register 0x11 (PMU_LPW)
Selection of the main power modes and the low power sleep period.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
0x11
7
R/W
0
6
R/W
0
PMU_LPW
5
R/W
0
4
R/W
0
suspend
lowpower_en
deep_suspend
sleep_dur<3>
3
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
sleep_dur<2:0>
reserved
suspend, low_power_en, deep_suspend:
Main power mode configuration setting {suspend; lowpower_en;
deep_suspend}:
{0; 0; 0} 
NORMAL mode;
{0; 0; 1} 
DEEP_SUSPEND mode;
{0; 1; 0} 
LOW_POWER mode;
{1; 0; 0} 
SUSPEND mode;
{all other} 
illegal
Please note that only certain power mode transitions are permitted.
Sleep_dur<3:0>: Configures the sleep phase duration in LOW_POWER mode:
´0000b´ to ´0101b´
 0.5 ms,
´0110b´  1 ms,
´0111b´
 2 ms,
´1000b´  4 ms,
´1001b´
 6 ms,
´1010b´  10 ms,
´1011b´
 25 ms,
´1100b´  50 ms,
´1101b´
 100 ms,
´1110b´  500 ms,
´1111b´
1s
Register 0x12 (PMU_LOW_POWER)
Configuration settings for low power mode.
Name
Bit
Read/Write
Reset
Value
Content
0x12
7
R/W
0
reserved
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
6
R/W
0
PMU_LOW_POWER
5
R/W
0
4
R/W
0
lowpower_mode
sleeptimer_mode
reserved
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Bit
Read/Write
Reset
Value
Content
3
R/W
0
2
R/W
0
Page 80
1
R/W
0
0
R/W
0
reserved
lowpower_mode: select ‘0’  LPM1, or ‘1´  LPM2 configuration for SUSPEND and
LOW_POWER mode. In the LPM1 configuration the power consumption in
LOW_POWER mode and SUSPEND mode is significantly reduced when
compared to LPM2 configuration, but the FIFO is not accessible and writing
to registers must be slowed down. In the LPM2 configuration the power
consumption in LOW_POWER mode is reduced compared to NORMAL
mode, but the FIFO is fully accessible and registers can be written to at full
speed.
Sleeptimer_mode: when in LOW_POWER mode ‘0’  use event-driven time-base mode
(compatible with BMA250), or ‘1´  use equidistant sampling time-base
mode. Equidistant sampling of data into the FIFO is maintained in equidistant
time-base mode only.
Reserved:
write ‘0’
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 81
6.10 Special control settings
Register 0x13 (ACCD_HBW)
Acceleration data acquisition and data output format.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
data_high_bw:
Shadow_dis:
Reserved:
0x13
7
R/W
0
data_high_bw
6
R/W
0 (1 in 8-bit
mode)
shadow_dis
3
R/W
0
2
R/W
0
ACCD_HBW
5
R/W
0
4
R/W
0
reserved
1
R/W
0
0
R/W
0
reserved
select whether ‘1´ unfiltered, or ‘0’ filtered data may be read from the
acceleration data registers.
‘1´ disable, or ‘0’ the shadowing mechanism for the acceleration data
output registers. When shadowing is enabled, the content of the acceleration
data component in the MSB register is locked, when the component in the
LSB is read, thereby ensuring the integrity of the acceleration data during
read-out. The lock is removed when the MSB is read.
write ‘1’
Register 0x14 (BGW_SOFTRESET)
Controls user triggered reset of the sensor.
Name
Bit
Read/Write
Reset
Value
Content
0x14
7
W
0
Bit
Read/Write
Reset
Value
Content
3
W
0
softreset:
6
W
0
BGW_SOFTRESET
5
W
0
4
W
0
softreset
2
W
0
1
W
0
0
W
0
softreset
0xB6  triggers a reset. Other values are ignored. Following a delay, all user
configuration settings are overwritten with their default state or the setting
stored in the NVM, wherever applicable. This register is functional in all
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 82
operation modes. Please note that all application specific settings which are
not equal to the default settings (refer to chapter 6.2), must be reconfigured
to their designated values.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 83
6.11 Interrupt settings
Register 0x16 (INT_EN_0)
Controls which interrupt engines in group 0 are enabled.
Name
Bit
Read/Write
Reset
Value
Content
0x16
7
R/W
0
6
R/W
0
INT_EN_0
5
R/W
0
4
R/W
0
flat_en
orient_en
s_tap_en
d_tap_en
Bit
Read/Write
Reset
Value
Content
3
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
reserved
slope_en_z
slope_en_y
slope_en_x
flat_en:
orient_en:
s_tap_en:
d_tap_en
reserved:
slope_en_z:
slope_en_y:
slope_en_x:
flat interrupt: ‘0’disabled, or ‘1’ enabled
orientation interrupt: ‘0’disabled, or ‘1’ enabled
single tap interrupt: ‘0’disabled, or ‘1’ enabled
double tap interrupt: ‘0’disabled, or ‘1’ enabled
write ‘0’
slope interrupt, z-axis component: ‘0’disabled, or ‘1’ enabled
slope interrupt, y-axis component: ‘0’disabled, or ‘1’ enabled
slope interrupt, x-axis component: ‘0’disabled, or ‘1’ enabled
Register 0x17 (INT_EN_1)
Controls which interrupt engines in group 1 are enabled.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
reserved:
0x17
7
R/W
0
6
R/W
0
INT_EN_1
5
R/W
0
4
R/W
0
reserved
int_fwm_en
int_ffull_en
data_en
3
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
low_en
high_en_z
high_en_y
high_en_x
write ‘0’
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
int_fwm_en:
int_ffull_en:
data_en
low_en:
high_en_z:
high_en_y:
high_en_x:
Page 84
FIFO watermark interrupt: ‘0’disabled, or ‘1’ enabled
FIFO full interrupt: ‘0’disabled, or ‘1’ enabled
data ready interrupt: ‘0’disabled, or ‘1’ enabled
low-g interrupt: ‘0’disabled, or ‘1’ enabled
high-g interrupt, z-axis component: ‘0’disabled, or ‘1’ enabled
high-g interrupt, y-axis component: ‘0’disabled, or ‘1’ enabled
high-g interrupt, x-axis component: ‘0’disabled, or ‘1’ enabled
Register 0x18 (INT_EN_2)
Controls which interrupt engines in group 2 are enabled.
Name
Bit
Read/Write
Reset
Value
Content
0x18
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
slo_no_mot_sel
INT_EN_2
5
R/W
0
4
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
slo_no_mot_en_z
slo_no_mot_en_y
slo_no_mot_en_x
6
R/W
0
reserved
reserved:
write ‘0’
slo_no_mot_sel: select ‘0’slow-motion, ‘1’ no-motion interrupt function
slo_no_mot_en_z: slow/n-motion interrupt, z-axis component: ‘0’disabled, or ‘1’ enabled
slo_no_mot_en_y: slow/n-motion interrupt, y-axis component: ‘0’disabled, or ‘1’ enabled
slo_no_mot_en_x: slow/n-motion interrupt, x-axis component: ‘0’disabled, or ‘1’ enabled
Register 0x19 (INT_MAP_0)
Controls which interrupt signals are mapped to the INT1 pin.
Name
Bit
Read/Write
Reset
Value
Content
0x19
7
R/W
0
6
R/W
0
INT_MAP_0
5
R/W
0
4
R/W
0
int1_flat
int1_orient
int1_s_tap
int1_d_tap
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Bit
Read/Write
Reset
Value
Content
Page 85
3
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
int1_slo_no_mot
int1_slope
int1_high
int1_low
int1_flat:
int1_orient:
int1_s_tap:
int1_d_tap:
int1_slo_no_mot:
int1_slope:
int1_high:
int1_low:
map flat interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
map orientation interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
map single tap interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
map double tap interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
map slow/no-motion interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
map slope interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
map high-g to INT1 pin: ‘0’disabled, or ‘1’ enabled
map low-g to INT1 pin: ‘0’disabled, or ‘1’ enabled
Register 0x1A (INT_MAP_1)
Controls which interrupt signals are mapped to the INT1 and INT2 pins.
Name
Bit
Read/Write
Reset
Value
Content
0x1A
7
R/W
0
6
R/W
0
INT_MAP_1
5
R/W
0
4
R/W
0
int2_data
int2_fwm
int2_ffull
reserved
Bit
Read/Write
Reset
Value
Content
3
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
reserved
int1_ffull
int1_fwm
int1_data
int2_data:
int2_fwm:
int2_ffull:
reserved:
int1_ffull:
int1_fwm:
int1_data:
map data ready interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
map FIFO watermark interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
map FIFO full interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
write ‘0’
map FIFO full interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
map FIFO watermark interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
map data ready interrupt to INT1 pin: ‘0’disabled, or ‘1’ enabled
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 86
Register 0x1B (INT_MAP_2)
Controls which interrupt signals are mapped to the INT2 pin.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
6
R/W
0
INT_MAP_2
5
R/W
0
4
R/W
0
int2_flat
int2_orient
int2_s_tap
int2_d_tap
3
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
int2_slo_no_mot
int2_slope
int2_high
int2_low
int2_flat:
int2_orient:
int2_s_tap:
int2_d_tap:
int2_slo_no_mot:
int2_slope:
int2_high:
int2_low:
0x1B
7
R/W
0
map flat interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
map orientation interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
map single tap interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
map double tap interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
map slow/no-motion interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
map slope interrupt to INT2 pin: ‘0’disabled, or ‘1’ enabled
map high-g to INT2 pin: ‘0’disabled, or ‘1’ enabled
map low-g to INT2 pin: ‘0’disabled, or ‘1’ enabled
Register 0x1E (INT_SRC)
Contains the data source definition for interrupts with selectable data source.
Name
Bit
Read/Write
Reset
Value
Content
0x1E
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
int_src_slo_no_m
ot
reserved:
int_src_data:
int_src_tap:
INT_SRC
5
R/W
0
4
R/W
0
int_src_data
int_src_tap
2
R/W
0
1
R/W
0
0
R/W
0
int_src_slope
int_src_high
int_src_low
6
R/W
0
reserved
write ‘0’
select ‘0’filtered, or ‘1’ unfiltered data for new data interrupt
select ‘0’filtered, or ‘1’ unfiltered data for single-/double tap interrupt
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 87
int_src_slo_no_mot: select ‘0’filtered, or ‘1’ unfiltered data for slow/no-motion interrupt
int_src_slope:
select ‘0’filtered, or ‘1’ unfiltered data for slope interrupt
int_src_high:
select ‘0’filtered, or ‘1’ unfiltered data for high-g interrupt
int_src_low:
select ‘0’filtered, or ‘1’ unfiltered data for low-g interrupt
Register 0x20 (INT_OUT_CTRL)
Contains the behavioural configuration (electrical 87ehavior) of the interrupt pins.
Name
Bit
Read/Write
Reset
Value
Content
0x20
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
2
R/W
1
1
R/W
0
0
R/W
1
int2_od
int2_lvl
int1_od
int1_lvl
reserved:
int2_od:
int2_lvl:
int1_od:
int1_lvl:
INT_OUT_CTRL
5
R/W
0
6
R/W
0
4
R/W
0
reserved
write ‘0’
select ‘0’push-pull, or ‘1’ open drain behavior for INT2 pin
select ‘0’active low, or ‘1’active high level for INT2 pin
select ‘0’push-pull, or ‘1’ open drain behavior for INT1 pin
select ‘0’active low, or ‘1’active high level for INT1 pin
Register 0x21 (INT_RST_LATCH)
Contains the interrupt reset bit and the interrupt mode selection.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
0x21
7
W
0
6
R/W
0
reset_int
3
R/W
0
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
INT_RST_LATCH
5
R/W
0
4
R/W
0
reserved
2
R/W
0
1
R/W
0
0
R/W
0
latch_int<3:0>
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
reset_int:
reserved:
latch_int<3:0>:
Page 88
write ‘1’  clear any latched interrupts, or ‘0’  keep latched interrupts
active
write ‘0’
´0000b´  non-latched,
´0001b´  temporary, 250 ms,
´0010b´  temporary, 500 ms, ´0011b´  temporary, 1 s,
´0100b´  temporary, 2 s,
´0101b´  temporary, 4 s,
´0110b´  temporary, 8 s,
´0111b´  latched,
´1000b´  non-latched,
´1001b´  temporary, 250 s,
´1010b´  temporary, 500 s, ´1011b´  temporary, 1 ms,
´1100b´  temporary, 12.5 ms, ´1101b´  temporary, 25 ms,
´1110b´  temporary, 50 ms, ´1111b´  latched
Register 0x22 (INT_0)
Contains the delay time definition for the low-g interrupt.
Name
Bit
Read/Write
Reset
Value
Content
0x22
7
W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
1
low_dur<7:0>:
6
R/W
0
INT_0
5
R/W
0
4
R/W
0
1
R/W
0
0
R/W
1
low_dur<7:4>
2
R/W
0
low_dur<3:0>
low-g interrupt trigger delay according to [low_dur<7:0> + 1] • 2 ms in a
range from 2 ms to 512 ms; the default corresponds to a delay of 20 ms.
Register 0x23 (INT_1)
Contains the threshold definition for the low-g interrupt.
Name
Bit
Read/Write
Reset
Value
Content
0x23
7
W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
6
R/W
0
INT_1
5
R/W
1
4
R/W
1
1
R/W
0
0
R/W
0
low_th<7:4>
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
2
R/W
0
low_th<3:0>
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© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
low_th<7:0>:
Page 89
low-g interrupt trigger threshold according to low_th<7:0> • 7.81 mg in a
range from 0 g to 1.992 g; the default value corresponds to an acceleration
of 375 mg
Register 0x24 (INT_2)
Contains the low-g interrupt mode selection, the low-g interrupt hysteresis setting, and the highg interrupt hysteresis setting.
Name
Bit
Read/Write
Reset
Value
Content
0x24
7
R/W
1
Bit
Read/Write
Reset
Value
Content
3
R/W
0
2
R/W
0
reserved
low_mode
high_hy<1:0>:
low_mode:
low_hy<1:0>:
INT_2
5
R/W
0
6
R/W
0
high_hy<1:0>
4
R/W
0
reserved
1
R/W
0
0
R/W
1
low_hy<1:0>
hysteresis of high-g interrupt according to high_hy<1:0> · 125 mg (2-g
range), high_hy<1:0> · 250 mg (4-g range), high_hy<1:0> · 500 mg (8-g
range), or high_hy<1:0> · 1000 mg (16-g range)
select low-g interrupt ‘0’ single-axis mode, or ‘1’ axis-summing mode
hysteresis of low-g interrupt according to low_hy<1:0> · 125 mg independent
of the selected accelerometer g-range
Register 0x25 (INT_3)
Contains the delay time definition for the high-g interrupt.
Name
Bit
Read/Write
Reset
Value
Content
0x25
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
1
high_dur<7:0>:
6
R/W
0
INT_3
5
R/W
0
4
R/W
0
high_dur<7:4>
2
R/W
1
1
R/W
1
0
R/W
1
high_dur<3:0>
high-g interrupt trigger delay according to [high_dur<7:0> + 1] • 2 ms in a
range from 2 ms to 512 ms; the default corresponds to a delay of 32 ms.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 90
Register 0x26 (INT_4)
Contains the threshold definition for the high-g interrupt.
Name
Bit
Read/Write
Reset
Value
Content
0x26
7
R/W
1
Bit
Read/Write
Reset
Value
Content
3
R/W
0
high_th<7:0>:
6
R/W
1
INT_4
5
R/W
0
4
R/W
0
1
R/W
0
0
R/W
0
high_th<7:4>
2
R/W
0
high_th<3:0>
threshold of high-g interrupt according to high_th<7:0> · 7.81 mg (2-g range),
high_th<7:0> · 15.63 mg (4-g range), high_th<7:0> · 31.25 mg (8-g range), or
high_th<7:0> · 62.5 mg (16-g range)
Register 0x27 (INT_5)
Contains the definition of the number of samples to be evaluated for the slope interrupt (anymotion detection) and the slow/no-motion interrupt trigger delay.
Name
Bit
Read/Write
Reset
Value
Content
0x27
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
6
R/W
0
INT_5
5
R/W
0
4
R/W
0
slo_no_mot_dur<5:2>
2
R/W
0
slo_no_mot_dur<1:0>
1
R/W
0
0
R/W
0
slope_dur<1:0>
slo_no_mot_dur<5:0>:
Function depends on whether the slow-motion or no-motion
interrupt function has been selected. If the slow-motion interrupt function has
been enabled (slo_no_mot_sel = ‘0’) then [slo_no_mot_dur<1:0>+1]
consecutive slope data points must be above the slow/no-motion threshold
(slo_no_mot_th) for the slow-/no-motion interrupt to trigger. If the no-motion
interrupt function has been enabled (slo_no_mot_sel = ‘1’) then
slo_no_motion_dur<5:0> defines the time for which no slope data points
must exceed the slow/no-motion threshold (slo_no_mot_th) for the slow/nomotion interrupt to trigger. The delay time in seconds may be calculated
according with the following equation:
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
slope_dur<1:0>:
Page 91
slo_no_mot_dur<5:4>=’b00’  [slo_no_mot_dur<3:0> + 1]
slo_no_mot_dur<5:4>=’b01’  [slo_no_mot_dur<3:0> · 4 + 20]
slo_no_mot_dur<5>=’1’  [slo_no_mot_dur<4:0> · 8 + 88]
slope interrupt triggers if [slope_dur<1:0>+1] consecutive slope data points
are above the slope interrupt threshold slope_th<7:0>
Register 0x28 (INT_6)
Contains the threshold definition for the any-motion interrupt.
Name
Bit
Read/Write
Reset
Value
Content
0x28
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
slope_th<7:0>:
6
R/W
0
INT_6
5
R/W
0
4
R/W
1
slope_th<7:4>
2
R/W
1
1
R/W
0
0
R/W
0
slope_th<3:0>
Threshold of the any-motion interrupt. It is range-dependent and defined as a
sample-to-sample difference according to
slope_th<7:0> · 3.91 mg (2-g range) /
slope_th<7:0> · 7.81 mg (4-g range) /
slope_th<7:0> · 15.63 mg (8-g range) /
slope_th<7:0> · 31.25 mg (16-g range)
Register 0x29 (INT_7)
Contains the threshold definition for the slow/no-motion interrupt.
Name
Bit
Read/Write
Reset
Value
Content
0x29
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
6
R/W
0
INT_7
5
R/W
0
4
R/W
1
slo_no_mot_th<7:4>
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
2
R/W
1
1
R/W
0
0
R/W
0
slo_no_mot_th<3:0>
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 92
slo_no_mot_th<7:0>: Threshold of slow/no-motion interrupt. It is range-dependent and defined
as a sample-to-sample difference according to
slo_no_mot_th<7:0> · 3..91 mg (2-g range),
slo_no_mot_th<7:0> · 7.81 mg (4-g range),
slo_no_mot_th<7:0> · 15.63 mg (8-g range),
slo_no_mot_th<7:0> · 31,25 mg (16-g range)
Register 0x2A (INT_8)
Contains the timing definitions for the single tap and double tap interrupts.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
tap_quiet:
tap_shock:
reserved:
tap_dur<2:0>:
0x2A
7
R/W
0
6
R/W
0
INT_8
5
R/W
0
4
R/W
0
tap_quiet
tap_shock
reserved
reserved
3
R/W
0
2
R/W
1
1
R/W
0
0
R/W
0
reserved
tap_dur<2:0>
selects a tap quiet duration of ‘0’ 30 ms, ‘1’ 20 ms
selects a tap shock duration of ‘0’ 50 ms, ‘1’75 ms
write ‘0’
selects the length of the time window for the second shock event for double
tap detection according to ´000b´  50 ms, ´001b´  100 ms, ´010b´  150
ms, ´011b´  200 ms, ´100b´  250 ms, ´101b´  375 ms, ´110b´  500
ms, ´111b´  700 ms.
Register 0x2B (INT_9)
Contains the definition of the number of samples processed by the single / double-tap interrupt
engine after wake-up in low-power mode. It also defines the threshold definition for the single
and double tap interrupts.
Name
Bit
Read/Write
Reset
Value
Content
0x2B
7
R/W
0
Bit
Read/Write
Reset
3
R/W
1
6
R/W
0
tap_samp<1:0>
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
2
R/W
0
INT_9
5
R/W
0
4
R/W
0
reserved
tap_th<4>
1
R/W
1
0
R/W
0
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Datasheet
eCompass BMC150
Value
Content
tap_samp<1:0>:
reserved:
tap_th<4:0>:
Page 93
tap_th<3:0>
selects the number of samples that are processed after wake-up in the lowpower mode according to ´00b´  2 samples, ´01b´  4 samples, ´10b´  8
samples, and ´11b´  16 samples
write ‘0’
threshold of the single/double-tap interrupt corresponding to an acceleration
difference of tap_th<4:0> · 62.5mg (2g-range), tap_th<4:0> · 125mg (4grange), tap_th<4:0> · 250mg (8g-range), and tap_th<4:0> · 500mg (16grange).
Register 0x2C (INT_A)
Contains the definition of hysteresis, blocking, and mode for the orientation interrupt
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
0x2C
7
R/W
0
6
R/W
0
reserved
3
R/W
1
INT_A
5
R/W
0
4
R/W
1
orient_hyst<2:0>
2
R/W
0
orient_blocking<1:0>
1
R/W
0
0
R/W
0
orient_mode<1:0>
reserved:
write ‘0’
orient_hyst<2:0>: sets the hysteresis of the orientation interrupt; 1 LSB corresponds to 62.5 mg
irrespective of the selected g-range
orient_blocking<1:0>:
selects the blocking mode that is used for the generation of the
orientation interrupt. The following blocking modes are available:
´00b´  no blocking,
´01b´  theta blocking or acceleration in any axis > 1.5g,
´10b´  ,theta blocking or acceleration slope in any axis > 0.2 g or
acceleration in any axis > 1.5g
´11b´  theta blocking or acceleration slope in any axis > 0.4 g or
acceleration in any axis > 1.5g and value of orient is not stable for
at least 100ms
orient_mode<1:0>: sets the thresholds for switching between the different orientations. The
settings: ´00b´  symmetrical, ´01b´  high-asymmetrical, ´10b´  lowasymmetrical, ´11b´ symmetrical.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 94
Register 0x2D (INT_B)
Contains the definition of the axis orientation, up/down masking, and the theta blocking angle
for the orientation interrupt.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
0x2D
7
R/W
n/a
INT_B
5
R/W
0
6
R/W
1
reserved
orient_ud_en
3
R/W
1
2
R/W
0
4
R/W
0
orient_theta<5:4>
1
R/W
0
0
R/W
0
orient_theta<3:0>
orient_ud_en:
change of up/down-bit ´1´  generates an orientation interrupt, ´0´  is
ignored and will not generate an orientation interrupt
orient_theta<5:0>: defines a blocking angle between 0° and 44.8°
Register 0x2E (INT_C)
Contains the definition of the flat threshold angle for the flat interrupt.
Name
Bit
Read/Write
Reset
Value
Content
0x2E
7
R/W
n/a
Bit
Read/Write
Reset
Value
Content
3
R/W
1
reserved:
flat_theta<5:0>:
6
R/W
n/a
INT_C
5
R/W
0
reserved
4
R/W
0
flat_theta<5:4>
2
R/W
0
1
R/W
0
0
R/W
0
flat_theta<3:0>
write ‘0’
defines threshold for detection of flat position in range from 0° to 44.8°.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 95
Register 0x2F (INT_D)
Contains the definition of the flat interrupt hold time and flat interrupt hysteresis.
Name
Bit
Read/Write
Reset
Value
Content
0x2F
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
6
R/W
0
reserved
reserved
INT_D
5
R/W
0
4
R/W
1
flat_hold_time<1:0>
2
R/W
0
1
R/W
0
0
R/W
1
flat_hy<2:0>
reserved:
write ‘0’
flat_hold_time<1:0>: delay time for which the flat value must remain stable for the flat interrupt
to be generated: ´00b´  0 ms, ´01b´  512 ms, ´10b´  1024 ms,
´11b´  2048 ms
flat_hy<2:0>:
defines flat interrupt hysteresis; flat value must change by more than twice
the value of flat interrupt hysteresis to detect a state change. For details see
chapter 4.7.8.
‘000b’  hysteresis of the flat detection disabled
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 96
6.12 Self-test
Register 0x32 (PMU_SELF_TEST)
Contains the settings for the sensor self-test configuration and trigger.
Name
Bit
Read/Write
Reset
Value
Content
0x32
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
2
R/W
0
reserved_0
self_test_sign
reserved:
reserved_0:
self_test_amp;
self_test_sign:
self_test_axis:
6
R/W
0
PMU_SELF_TEST
5
R/W
0
reserved
4
R/W
0
self_test_amp
1
R/W
0
0
R/W
0
self_test-axis<1:0>
write ‘0x0’
write ‘0x0’
select amplitude of the selftest deflection ´1´  high,
default value is low (´0´)
select sign of self-test excitation as ´1´  positive, or ´0´  negative
select axis to be self-tested: ´00b´  self-test disabled, ´01b´  x-axis, ´10b´
 y-axis, or ´11b´  z-axis; when a self-test is performed, only the
acceleration data readout value of the selected axis is valid; after the self-test
has been enabled a delay of a least 50 ms is necessary for the read-out
value to settle
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 97
6.13 Non-volatile memory control (EEPROM)
Register 0x33 (TRIM_NVM_CTRL)
Contains the control settings for the few-time programmable non-volatile memory (NVM).
Name
Bit
Read/Write
Reset
Value
Content
0x33
7
R
n/a
Bit
Read/Write
Reset
Value
Content
3
R/W
0
2
R
n/a
1
W
0
0
R/W
0
nvm_load
nvm_rdy
nvm_prog_trig
nvm_prog_mode
6
R
n/a
TRIM_NVM_CTRL
5
R
n/a
4
R
n/a
nvm_remain<3:0>
nvm_remain<3:0>: number of remaining write cycles permitted for NVM; the number is
decremented each time a write to the NVM is triggered
nvm_load:
´1´  trigger, or ‘0’  do not trigger an update of all configuration registers
from NVM; the nvm_rdy flag must be ‘1’ prior to triggering the update
nvm_rdy:
status of NVM controller: ´0´  NVM write / NVM update operation is in
progress, ´1´  NVM is ready to accept a new write or update trigger
nvm_prog_trig:
‘1’  trigger, or ‘0’ do not trigger an NVM write operation; the trigger is only
accepted if the NVM was unlocked before and nvm_remain<3:0> is greater
than ‘0’; flag nvm_rdy must be ‘1’ prior to triggering the write cycle
nvm_prog_mode: ‘1’  unlock, or ‘0’  lock NVM write operation
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 98
6.14 Interface configuration
Register 0x34 (BGW_SPI3_WDT)
Contains settings for the digital interfaces.
Name
Bit
Read/Write
Reset
Value
Content
0x34
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
reserved
i2c_wdt_en
i2c_wdt_sel
spi3
reserved:
i2c_wdt_en:
i2c_wdt_sel:
spi3:
BGW_SPI3_WDT
5
R/W
0
6
R/W
0
4
R/W
0
Reserved
write ‘0’
if I²C interface mode is selected then ‘1´  enable, or ‘0’  disables the
watchdog at the SDI pin (= SDA for I²C)
select an I²C watchdog timer period of ‘0’  1 ms, or ‘1’  50 ms
select ´0´  4-wire SPI, or ´1´  3-wire SPI mode
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 99
6.15 Offset compensation
Register 0x36 (OFC_CTRL)
Contains control signals and configuration settings for the fast and the slow offset
compensation.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
0x36
7
W
0
offset_reset
OFC_CTRL
5
W
0
6
W
0
4
R
0
cal_trigger<1:0>
cal_rdy
3
R/W
0
2
R/W
0
1
R/W
0
0
R/W
0
reserved
hp_z_en
hp_y_en
hp_x_en
offset_reset:
´1´  set all offset compensation registers (0x38 to 0x3A) to zero, or ‘0’ 
keep their values
offset_trigger<1:0>: trigger fast compensation for ´01b´  x-axis, ´10b´  y-axis, or ´11b´ 
z-axis; ´00b´  do not trigger offset compensation; offset compensation must
not be triggered when cal_rdy is ‘0’
cal_rdy:
indicates the state of the fast compensation: ´0´  offset compensation is in
progress, or ´1´  offset compensation is ready to be retriggered
reserved:
write ‘0’
hp_z_en:
‘1´  enable, or ‘0’  disable slow offset compensation for the z-axis
hp_y_en:
‘1´  enable, or ‘0’  disable slow offset compensation for the y-axis
hp_x_en:
‘1´  enable, or ‘0’  disable slow offset compensation for the x-axis
Register 0x37 (OFC_SETTING)
Contains configuration settings for the fast and the slow offset compensation.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
0x37
7
R/W
0
reserved
3
R/W
0
offset_target_y<0
>
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
6
R/W
0
OFC_SETTING
5
R/W
0
offset_target_z<1:0>
2
R/W
0
1
R/W
0
offset_target_x<1:0>
4
R/W
0
offset_target_y<1>
0
R/W
0
cut_off
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Datasheet
eCompass BMC150
Page 100
reserved:
write ‘0’
offset_target_z<1:0>: offset compensation target value for z-axis is ´00b´  0 g, ´01b´  +1 g,
´10b´  -1 g, or ´11b´  0 g
offset_target_y<1:0>: offset compensation target value for y-axis is ´00b´  0 g, ´01b´  +1 g,
´10b´  -1 g, or ´11b´  0 g
offset_target_x<1:0>: offset compensation target value for x-axis is ´00b´  0 g, ´01b´  +1 g,
´10b´  -1 g, or ´11b´  0 g
cut_off:
(0x37)
cut_off
high-pass filter
bandwidth
Example
bw = 500 Hz
0b
1b
*bw: please insert selected decimal data bandwidth value [Hz] from table 8
Register 0x38 (OFC_OFFSET_X)
Contains the offset compensation value for x-axis acceleration readout data.
Name
Bit
Read/Write
Reset
Value
Content
0x38
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
offset_x<7:0>:
6
R/W
0
OFC_OFFSET_X
5
R/W
0
4
R/W
0
offset_x<7:4>
2
R/W
0
1
R/W
0
0
R/W
0
offset_x<3:0>
offset value, which is subtracted from the internal filtered and unfiltered xaxis acceleration data; the offset value is represented with two’s complement
notation, with a mapping of +127  +0.992g, 0  0 g, and -128  -1 g; the
scaling is independent of the selected g-range; the content of the
offset_x<7:0> may be written to the NVM; it is automatically restored from
the NVM after each power-on or softreset; offset_x<7:0> may be written
directly by the user; it is generated automatically after triggering the fast
offset compensation procedure for the x-axis
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 101
Register 0x39 (OFC_OFFSET_Y)
Contains the offset compensation value for y-axis acceleration readout data.
Name
Bit
Read/Write
Reset
Value
Content
0x39
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
offset_y<7:0>:
6
R/W
0
OFC_OFFSET_Y
5
R/W
0
4
R/W
0
offset_y<7:4>
2
R/W
0
1
R/W
0
0
R/W
0
offset_y<3:0>
offset value, which is subtracted from the internal filtered and unfiltered yaxis acceleration data; the offset value is represented with two’s complement
notation, with a mapping of +127  +0.992g, 0  0 g, and -128  -1 g; the
scaling is independent of the selected g-range; the content of the
offset_y<7:0> may be written to the NVM; it is automatically restored from
the NVM after each power-on or softreset; offset_y<7:0> may be written
directly by the user; it is generated automatically after triggering the fast
offset compensation procedure for the y-axis
Register 0x3A (OFC_OFFSET_Z)
Contains the offset compensation value for z-axis acceleration readout data.
Name
Bit
Read/Write
Reset
Value
Content
0x3A
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
offset_z<7:0>:
6
R/W
0
OFC_OFFSET_Z
5
R/W
0
4
R/W
0
offset_z<7:4>
2
R/W
0
1
R/W
0
0
R/W
0
offset_z<3:0>
offset value, which is subtracted from the internal filtered and unfiltered zaxis acceleration data; the offset value is represented with two’s complement
notation, with a mapping of +127  +0.992g, 0  0 g, and -128  -1 g; the
scaling is independent of the selected g-range; the content of the
offset_z<7:0> may be written to the NVM; it is automatically restored from
the NVM after each power-on or softreset; offset_z<7:0> may be written
directly by the user; it is generated automatically after triggering the fast
offset compensation procedure for the z-axis
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 102
6.16 Non-volatile memory back-up
Register 0x3B (TRIM_GP0)
Contains general purpose data register with NVM back-up.
Name
Bit
Read/Write
Reset
Value
Content
0x3B
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
GP0<7:0>:
TRIM_GP0
5
R/W
0
6
R/W
0
4
R/W
0
GP0<7:4>
2
R/W
0
1
R/W
0
0
R/W
0
GP0<3:0>
general purpose NVM image register not linked to any sensor-specific
functionality; register may be written to NVM and is restored after each
power-up or softreset
Register 0x3C (TRIM_GP1)
Contains general purpose data register with NVM back-up.
Name
Bit
Read/Write
Reset
Value
Content
0x3C
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
GP1<7:0>:
6
R/W
0
TRIM_GP1
5
R/W
0
4
R/W
0
GP1<7:4>
2
R/W
0
1
R/W
0
0
R/W
0
GP1<3:0>
general purpose NVM image register not linked to any sensor-specific
functionality; register may be written to NVM and is restored after each
power-up or softreset
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 103
6.17 FIFO configuration and FIFO data
Register 0x30 (FIFO_CONFIG_0)
Contains the FIFO watermark level.
Name
Bit
Read/Write
Reset
Value
Content
Bit
Read/Write
Reset
Value
Content
0x30
7
R/W
n/a
6
R/W
n/a
FIFO_CONFIG_0
5
R/W
0
Reserved
3
R/W
0
4
R/W
0
fifo_water_mark_level_trigger_
retain<5:4>
2
R/W
0
1
R/W
0
0
R/W
0
fifo_water_mark_level_trigger_retain<3:0>
reserved:
write ‘0’
fifo_water_mark_level_trigger_retain<5:0>:
fifo_water_mark_level_trigger_retain<5:0> defines the FIFO watermark level.
An interrupt will be generated, when the number of entries in the FIFO is
equal to fifo_water_mark_level_trigger_retain<5:0>;
Register 0x3E (FIFO_CONFIG_1)
Contains FIFO configuration settings. The FIFO buffer memory is cleared and the fifo-full flag is
cleared when writing to FIFO_CONFIG_1 register.
Name
Bit
Read/Write
Reset
Value
Content
0x3E
7
R/W
0
Bit
Read/Write
Reset
Value
Content
3
R/W
0
fifo_mode<1:0>:
6
R/W
0
FIFO_CONFIG_1
5
R/W
0
fifo_mode<1:0>
Reserved
2
R/W
0
Reserved
4
R/W
0
1
R/W
0
0
R/W
0
fifo_data_select<1:0>
selects the FIFO operating mode:
´00b´  BYPASS (buffer depth of 1 frame; old data is discarded),
´01b´  FIFO (data collection stops when buffer is filled with 32 frames),
´10b´  STREAM (sampling continues when buffer is full; old is discarded),
´11b´  reserved, do not use
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 104
fifo_data_select<1:0>: selects whether ´00b´  X+Y+Z, ´01b´  X only, ´10b´  Y only, ´11b´
 Z only acceleration data are stored in the FIFO.
Register 0x3F (FIFO_DATA)
FIFO data readout register. The format of the LSB and MSB components corresponds to that of
the acceleration data readout registers. The new data flag is preserved. Read burst access may
be used since the address counter will not increment when the read burst is started at the
address of FIFO_DATA. The entire frame is discarded when a fame is only partially read out.
Name
Bit
Read/Write
Reset
Value
Content
0x3F
7
R
n/a
Bit
Read/Write
Reset
Value
Content
3
R
n/a
6
R
n/a
FIFO_DATA
5
R
n/a
4
R
n/a
fifo_data_output_register<7:4>
2
R
n/a
1
R
n/a
0
R
n/a
fifo_data_output_register<3:0>
fifo_data_output_register<7:0>:
FIFO data readout; data format depends on the setting of
register fifo_data_select<1:0>:
if X+Y+Z data are selected, the data of frame n is reading out in the order of
X-lsb(n), X-msb(n), Y-lsb(n), Y-msb(n), Z-lsb(n), Z-msb(n);
if X-only is selected, the data of frame n and n+1 are reading out in the order
of X-lsb(n), X-msb(n), X-lsb(n+1), X-msb(n+1); the Y-only and Z-only modes
behave analogously
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 105
7. Magnetometer register description
7.1 General remarks
The entire communication with the device’s magnetometer part is performed by reading from
and writing to registers. Registers have a width of 8 bits; they are mapped to a common space
of 50 addresses from (0x40) up to (0x71). Within the used range there are several registers
which are marked as ‘reserved’. Any reserved bit is ignored when it is written and no specific
value is guaranteed when read. Especially, in SPI mode the SDO pin may stay in high-Z state
when reading some of these registers.
Registers with addresses from (0x40) up to (0x4A) are read-only. Any attempt to write to these
registers is ignored.
7.2 Register map
Register Address
0x71
0x70
0x6F
0x6E
0x6D
0x6C
0x6B
0x6A
0x69
0x68
0x67
0x66
0x65
0x64
0x63
0x62
0x61
0x60
0x5F
0x5E
0x5D
0x5C
0x5B
0x5A
0x59
0x58
0x57
0x56
0x55
0x54
0x53
0x52
0x51
0x50
0x4F
0x4E
0X4D
0x4C
0x4B
0x4A
0x49
0x48
0x47
0x46
0x45
0x44
0x43
0x42
0x41
0x40
Default Value
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0x00
0x00
0x00
0x00
0x07
0x3F
0x06
0x01
0x00
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
0x32
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
reserved
Data Ready Pin En
Interrupt Pin En
Overflow Int En
Data Overrun En
Adv. ST [1:0]
Soft Reset '1'
fixed '0'
Data Overrun
Overflow
REPZ Number Of Repetitions (valid for Z) [7:0]
REPXY Number Of Repetitions (valid for XY) [7:0]
High Threshold [7:0]
Low Threshold [7:0]
Channel Z
Channel Y
Channel X
High Int Z en
High Int Y en
High Int X en
Data Rate [2:0]
fixed '0'
fixed '0'
fixed '0'
High Int Z
High Int Y
High Int X
RHALL [13:6] MSB
RHALL [5:0] LSB
DATA Z [14:7] MSB
DATA Z [6:0] LSB
DATA Y [12:5] MSB
DATA Y [4:0] LSB
DATA X [12:5] MSB
DATA X [4:0] LSB
reserved
Chip ID = 0x32 (can only be read if power control bit ="1")
DR Polarity
Interrupt Latch
Low Int Z en
Low Int Y en
Opmode [1:0]
SPI3en
Soft Reset '1'
Low Int Z
Low Int Y
Interrupt Polarity
Low Int X en
Self Test
Power Control Bit
Low Int X
fixed '0'
Data Ready Status
fixed '0'
fixed '0'
Y-Self-Test
fixed '0'
fixed '0'
X-Self-Test
Z-Self-Test
w/r
w/r accessible
in suspend mode
read only
reserved
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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Datasheet
eCompass BMC150
Page 106
7.3 Chip ID
Register (0x40) Chip ID contains the magnetometer chip identification number, which is 0x32.
This number can only be read if the power control bit (register 0x4B bit0) is enabled.
Table 25: Chip identification number, register (0x40)
Bit 7
0
Bit 6
0
Bit 5
1
Bit 4
1
Bit 3
0
Bit 2
0
Bit 1
1
Bit 0
0
Register (0x41) is reserved
7.4 Magnetic field data
Register (0x42) contains the LSB part of x-axis magnetic field data and the self-test result flag
for the x-axis.
Table 26: LSB part of x-axis magnetic field, register (0x42)
(0x42) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
DATAX_lsb <4>
DATAX_lsb <3>
DATAX_lsb <2>
DATAX_lsb <1>
DATAX_lsb <0>
SelfTestX
Description
Bit 4 of x-axis magnetic field data
Bit 3 of x-axis magnetic field data
Bit 2 of x-axis magnetic field data
Bit 1 of x-axis magnetic field data
Bit 0 of x-axis magnetic field data = x LSB
(fixed to 0)
(fixed to 0)
Self-test result flag for x-axis, default is “1”
Register (0x43) contains the MSB part of x-axis magnetic field data.
Table 27: MSB part of x-axis magnetic field, register (0x43)
(0x43) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
DATAX_msb <12>
DATAX_msb <11>
DATAX_msb <10>
DATAX_msb <9>
DATAX_msb <8>
DATAX_msb <7>
DATAX_msb <6>
DATAX_msb <5>
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Description
Bit 12 of x-axis magnetic field data = x MSB
Bit 11 of x-axis magnetic field data
Bit 10 of x-axis magnetic field data
Bit 9 of x-axis magnetic field data
Bit 8 of x-axis magnetic field data
Bit 7 of x-axis magnetic field data
Bit 6 of x-axis magnetic field data
Bit 5 of x-axis magnetic field data
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eCompass BMC150
Page 107
Register (0x44) contains the LSB part of y-axis magnetic field data and the self-test result flag
for the y-axis.
Table 28: LSB part of y-axis magnetic field, register (0x44)
(0x44) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
DATAY_lsb <4>
DATAY_lsb <3>
DATAY_lsb <2>
DATAY_lsb <1>
DATAY_lsb <0>
SelfTestY
Description
Bit 4 of y-axis magnetic field data
Bit 3 of y-axis magnetic field data
Bit 2 of y-axis magnetic field data
Bit 1 of y-axis magnetic field data
Bit 0 of y-axis magnetic field data = y LSB
(fixed to 0)
(fixed to 0)
Self-test result flag for y-axis, default is “1”
Register (0x45) contains the MSB part of y-axis magnetic field data.
Table 29: MSB part of y-axis magnetic field, register (0x45)
(0x45) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
DATAY_msb <12>
DATAY_msb <11>
DATAY_msb <10>
DATAY_msb <9>
DATAY_msb <8>
DATAY_msb <7>
DATAY_msb <6>
DATAY_msb <5>
Description
Bit 12 of y-axis magnetic field data = y MSB
Bit 11 of y-axis magnetic field data
Bit 10 of y-axis magnetic field data
Bit 9 of y-axis magnetic field data
Bit 8 of y-axis magnetic field data
Bit 7 of y-axis magnetic field data
Bit 6 of y-axis magnetic field data
Bit 5 of y-axis magnetic field data
Register (0x46) contains the LSB part of z-axis magnetic field data and the self-test result flag
for the z-axis.
Table 30: LSB part of z-axis magnetic field, register (0x46)
(0x46) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
DATAZ_lsb <6>
DATAZ_lsb <5>
DATAZ_lsb <4>
DATAZ_lsb <3>
DATAZ_lsb <2>
DATAZ_lsb <1>
DATAZ_lsb <0>
SelfTestZ
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Description
Bit 6 of z-axis magnetic field data
Bit 5 of z-axis magnetic field data
Bit 4 of z-axis magnetic field data
Bit 3 of z-axis magnetic field data
Bit 2 of z-axis magnetic field data
Bit 1 of z-axis magnetic field data
Bit 0 of z-axis magnetic field data = z LSB
Self-test result flag for z-axis, default is “1”
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eCompass BMC150
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Register (0x47) contains the MSB part of z-axis magnetic field data.
Table 31: MSB part of z-axis magnetic field, register (0x47)
(0x47) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
DATAZ_msb <14>
DATAZ_msb <13>
DATAZ_msb <12>
DATAZ_msb <11>
DATAZ_msb <10>
DATAZ_msb <9>
DATAZ_msb <8>
DATAZ_msb <7>
Description
Bit 14 of y-axis magnetic field data = z MSB
Bit 13 of y-axis magnetic field data
Bit 12 of y-axis magnetic field data
Bit 11 of y-axis magnetic field data
Bit 10 of y-axis magnetic field data
Bit 9 of y-axis magnetic field data
Bit 8 of y-axis magnetic field data
Bit 7 of y-axis magnetic field data
Register (0x48) contains the LSB part of hall resistance and the Data Ready (DRDY) status bit.
Table 32: LSB part of hall resistance, register (0x48)
(0x48) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
RHALL_lsb <5>
RHALL_lsb <4>
RHALL_lsb <3>
RHALL_lsb <2>
RHALL_lsb <1>
RHALL_lsb <0>
Data Ready Status
Description
Bit 5 of hall resistance
Bit 4 of hall resistance
Bit 3 of hall resistance
Bit 2 of hall resistance
Bit 1 of hall resistance
Bit 0 of hall resistance = RHALL LSB
(fixed to 0)
Data ready (DRDY) status bit
Register (0x49) contains the MSB part of hall resistance.
Table 33: MSB part of hall resistance, register (0x49)
(0x49) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
RHALL_msb <13>
RHALL_msb <12>
RHALL_msb <11>
RHALL_msb <10>
RHALL_msb <9>
RHALL_msb <8>
RHALL_msb <7>
RHALL_msb <6>
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Description
Bit 13 of hall resistance = RHALL MSB
Bit 12 of hall resistance
Bit 11 of hall resistance
Bit 10 of hall resistance
Bit 9 of hall resistance
Bit 8 of hall resistance
Bit 7 of hall resistance
Bit 6 of hall resistance
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eCompass BMC150
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7.5 Interrupt status register
Register (0x4A) contains the states of all magnetometer interrupts.
Table 34: Interrupt status, register (0x4A)
(0x4A) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Data overrun
Overflow
High Int Z
High Int Y
High Int X
Low Int Z
Low Int Y
Low Int X
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Description
Data overrun status flag
Overflow status flag
High-Threshold interrupt z-axis status flag
High-Threshold interrupt y-axis status flag
High-Threshold interrupt x-axis status flag
Low-Threshold interrupt z-axis status flag
Low-Threshold interrupt y-axis status flag
Low-Threshold interrupt x-axis status flag
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eCompass BMC150
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7.6 Power and operation modes, self-test and data output rate control registers
Register (0x4B) contains control bits for power control, soft reset and interface SPI mode
selection. This special control register is also accessible in suspend mode.
Soft reset is executed when both bits (register 0x4B bit7 and bit1) are set “1”. Soft reset does
not execute a full POR sequence, but all registers are reset except for the “trim” registers above
register 0x54 and the power control register (0x4B). Soft reset always brings the device into
sleep mode. When device is in the suspend mode, soft reset is ignored and the device remains
in suspend mode. The two “Soft Reset” bits are reset to “0” automatically after soft reset was
completed. To perform a full POR reset, bring the device into suspend and then back into sleep
mode.
When SPI mode is selected, the “SPI3En” bit enables SPI 3-wire mode when set “1”. When
“SPI3En” is set “0” (default), 4-wire SPI mode is selected.
Setting the “Power Control bit” to “1” brings the device up from Suspend mode to Sleep mode,
when “Power Control bit” is set “0” the device returns to Suspend mode (see chapter 4.2.2 for
details of magnetometer power modes).
Table 35: Power control, soft reset and SPI mode control register (0x4B)
(0x4B) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Soft Reset ‘1’
SPI3en
Soft Reset ‘1’
Power Control bit
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Description
One of the soft reset trigger bits.
(fixed to 0)
(fixed to 0)
(fixed to 0)
(fixed to 0)
Enable bit for SPI3 mode
One of the soft reset trigger bits.
When set to “0”, suspend mode is selected
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Register (0x4C) contains control bits for operation mode, output data rate and self-test.
The two “Adv. ST” bits control the on-chip advanced self-test (see chapter 4.4.2 for details of the
magnetometer advanced self-test).
The three “Data rate” bits control the magnetometer output data rate according to below Table
37.
The two “Opmode” bits control the operation mode according to below Table 38 (see chapter
4.2.2 for a detailed description of magnetometer power modes).
Table 36: Operation mode, output data rate and self-test control register (0x4C)
(0x4C) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
Adv. ST <1>
Adv. ST <0>
Data rate <2>
Data rate <1>
Data rate <0>
Opmode <1>
Opmode <0>
Self Test
Description
Advanced self-test control bit 1
Advanced self-test control bit 0
Data rate control bit 2
Data rate control bit 1
Data rate control bit 0
Operation mode control bit 1
Operation mode control bit 0
Normal self-test control bit
Three “Data rate” bits control the output data rate (ODR) of the BMC150 magnetometer part:
Table 37: Output data rate (ODR) setting (0x4C)
(0x4C)
Data rate <2:0>
000b
001b
010b
011b
100b
101b
110b
111b
Magnetometer output data rate
(ODR) [Hz]
10 (default)
2
6
8
15
20
25
30
Two “Opmode” bits control the operation mode of the BMC150 magnetometer part:
Table 38: Operation mode setting (0x4C)
(0x4C)
Opmode <1:0>
00b
01b
10b
11b
8
Magnetometer operation mode8
Normal mode
Forced mode
Reserved, do not use
Sleep Mode
See chapter 4.2.2 for a detailed description of magnetometer power modes.
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7.7 Interrupt and axis enable settings control registers
Register (0x4D) contains control bits for interrupt settings. (Also refer to chapter 0 for the
details of magnetometer interrupt operation).
Table 39: Interrupt settings control register (0x4D)
(0x4D) Bit
Bit 7
Name
Data Overrun En
Bit 6
Overflow Int En
Bit 5
High Int Z En
Bit 4
High Int Y En
Bit 3
High Int X En
Bit 2
Low Int Z En
Bit 1
Low Int Y En
Bit 0
Low Int X En
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Description
Enables data overrun indication in the “Data Overrun”
flag (active high, default is “0” disabled)
Activates mapping of Overflow flag status to the INT3
pin (active high, default is “0” disabled)
Enables the z-axis detection for High-Threshold
interrupts (active low, default is “1” disabled)
Enables the y-axis detection for High-Threshold
interrupts (active low, default is “1” disabled)
Enables the x-axis detection for High-Threshold
interrupts (active low, default is “1” disabled)
Enables the z-axis detection for Low-Threshold
interrupts (active low, default is “1” disabled)
Enables the y-axis detection for Low-Threshold
interrupts (active low, default is “1” disabled)
Enables the x-axis detection for Low-Threshold
interrupts (active low, default is “1” disabled)
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Register (0x4E) contains control bits interrupt settings and axes enable bits. (Also refer to
chapter 0 for the details of magnetometer interrupt operation). If a magnetic measurement
channel is disabled, its last measured magnetic output values will remain in the data registers. If
the Z channel is disabled, the resistance measurement will also be disabled and the resistance
output value will be set to zero. If interrupts are set to trigger on an axis that has been disabled,
these interrupts will still be asserted based on the last measured value.
Table 40: Interrupt settings and axes enable bits control register (0x4E)
(0x4E) Bit
Name
Bit 7
Data Ready Pin En
Bit 6
Interrupt Pin En
Bit 5
Channel Z
Bit 4
Channel Y
Bit 3
Channel X
Bit 2
DR Polarity
Bit 1
Interrupt Latch
Bit 0
Interrupt Polarity
Description
Enables data ready status mapping on DRDY pin
(active high, default is “0” disabled)
Enables interrupt status mapping on INT3 pin
(active high, default is “0” disabled)
Enable z-axis and resistance measurement
(active low, default is “0” enabled)
Enable y-axis
(active low, default is “0” enabled)
Enable x-axis
(active low, default is “0” enabled)
Data ready (DRDY) pin polarity
(“0” is active low, “1” is active high, default is “1”
active high)
Interrupt latching
(“0” means non-latched – interrupt pin is on as long
as the condition is fulfilled, “1” means latched –
interrupt pin is on until interrupt status register 0x4A
is read, default is ‘”1” latched)
Interrupt pin INT3 polarity selection
(“1” – is active high, “0” is active low, default is “1”
active high)
Register (0x4F) contains the Low-Threshold interrupt threshold setting. (Also refer to chapter 0
for the details of magnetometer interrupt operation and the threshold setting).
Table 41: Low-threshold interrupt threshold setting control register (0x4F)
(0x4F) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
LowThreshold <7>
LowThreshold <6>
LowThreshold <5>
LowThreshold <4>
LowThreshold <3>
LowThreshold <2>
LowThreshold <1>
LowThreshold <0>
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Description
Bit 7 of Low-Threshold interrupt threshold setting
Bit 6 of Low-Threshold interrupt threshold setting
Bit 5 of Low-Threshold interrupt threshold setting
Bit 4 of Low-Threshold interrupt threshold setting
Bit 3 of Low-Threshold interrupt threshold setting
Bit 2 of Low-Threshold interrupt threshold setting
Bit 1 of Low-Threshold interrupt threshold setting
Bit 0 of Low-Threshold interrupt threshold setting
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Register (0x50) contains the High-Threshold interrupt threshold setting. (Also refer to chapter 0
for the details of magnetometer interrupt operation and the threshold setting).
Table 42: High-threshold interrupt threshold setting control register (0x4F)
(0x50) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
HighThreshold <7>
HighThreshold <6>
HighThreshold <5>
HighThreshold <4>
HighThreshold <3>
HighThreshold <2>
HighThreshold <1>
HighThreshold <0>
Description
Bit 7 of High-Threshold interrupt threshold setting
Bit 6 of High-Threshold interrupt threshold setting
Bit 5 of High-Threshold interrupt threshold setting
Bit 4 of High-Threshold interrupt threshold setting
Bit 3 of High-Threshold interrupt threshold setting
Bit 2 of High-Threshold interrupt threshold setting
Bit 1 of High-Threshold interrupt threshold setting
Bit 0 of High-Threshold interrupt threshold setting
7.8 Number of repetitions control registers
Register (0x51) contains the number of repetitions for x/y-axis. Table 44 below shows the
number of repetitions resulting out of the register configuration. The performed number of
repetitions nXY can be calculated from unsigned register value as nXY = 1+2xREPXY as shown
below, where b7-b0 are the bits 7 to 0 of register 0x51:
nXY  1  2  (b 7  2 7  b 6  2 6  b 5  2 5  b 4  2 4  b 3  2 3  b 2  2 2  b1  21  b 0  2 0 )
 1  2  (REPXY )
Table 43: x/y-axis repetitions control register (0x51)
(0x51) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
REPXY <7>
REPXY <6>
REPXY <5>
REPXY <4>
REPXY <3>
REPXY <2>
REPXY <1>
REPXY <0>
Description
Bit 7 of number of repetitions (valid for XY)
Bit 6 of number of repetitions (valid for XY)
Bit 5 of number of repetitions (valid for XY)
Bit 4 of number of repetitions (valid for XY)
Bit 3 of number of repetitions (valid for XY)
Bit 2 of number of repetitions (valid for XY)
Bit 1 of number of repetitions (valid for XY)
Bit 0 of number of repetitions (valid for XY)
Table 44: Numbers of repetition for x/y-axis depending on value of register (0x51)
(0x51)
register
value
(binary)
00000000b
00000001b
00000010b
00000011b
…
11111111b
(0x51)
value
(hex)
register Number of repetitions for x- and y-axis each
0x00h
0x01h
0x02h
0x03h
0xFFh
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
1
3
5
7
…
511
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Register (0x52) contains the number of repetitions for z-axis. Table 46 below shows the
number of repetitions resulting out of the register configuration. The performed number of
repetitions nZ can be calculated from unsigned register value as nZ = 1+REPZ as shown below,
where b7-b0 are the bits 7 to 0 of register 0x52:
nZ  1  1  (b 7  27  b 6  26  b 5  25  b 4  24  b 3  23  b 2  22  b1  21  b 0  20 )
 1  REPZ
Table 45: Z-axis repetitions control register (0x52)
(0x52) Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Name
REPZ <7>
REPZ <6>
REPZ <5>
REPZ <4>
REPZ <3>
REPZ <2>
REPZ <1>
REPZ <0>
Description
Bit 7 of number of repetitions (valid for Z)
Bit 6 of number of repetitions (valid for Z)
Bit 5 of number of repetitions (valid for Z)
Bit 4 of number of repetitions (valid for Z)
Bit 3 of number of repetitions (valid for Z)
Bit 2 of number of repetitions (valid for Z)
Bit 1 of number of repetitions (valid for Z)
Bit 0 of number of repetitions (valid for Z)
Table 46: Numbers of repetition for z-axis depending on value of register (0x52)
(0x52)
register
value
(binary)
00000000b
00000001b
00000010b
00000011b
…
11111111b
(0x52) register
value
(hex)
Number of repetitions for z-axis
0x00h
0x01h
0x02h
0x03h
1
2
3
4
…
256
0xFFh
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8. Digital interfaces
The BMC150 supports two serial digital interface protocols for communication as a slave with a
host device for each of the accelerometer and magnetometer part: SPI and I²C. Accelerometer
part and magnetometer part alone operate either both in I²C mode or either both in SPI mode,
mixed communication protocols are not possible because the interface pins are shared.
The active interface is selected by the state of the “protocol select” pin (PS):
“0” (“1”) selects SPI (I²C).
By default, SPI operates in the standard 4-wire configuration. It can be re-configured by
software to work in 3-wire mode instead of standard 4-wire mode for both the accelerometer
part and magnetometer part.
Both interfaces share the same pins. The mapping for each interface is given in the following
table:
Table 47: Mapping of the interface pins
Pin#
1
14
Name
SDO
SDI
use w/
SPI
use w/ I²C
SDO
Accelerometer
and
magnetometer
part I²C address
selection
SDI
SDA
12
CSB
CSB
Magnetometer
part I²C address
selection
11
SCK
SCK
SCL
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Description
SPI: Data Output (4-wire mode)
I²C: Used to set LSB of I²C address of
accelerometer part and magnetometer part
SPI: Data Input (4-wire mode) Data Input /
Output
(3-wire mode)
I²C: Serial Data
SPI: Chip Select for accelerometer and
magnetometer part (enable)
I²C: Used to set bit1 of I²C address of
magnetometer part, always high in I2C mode
SPI: Serial Clock
I²C: Serial Clock
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The following table shows the electrical specifications of the interface pins:
Table 48: Electrical specification of the interface pins
Parameter
Symbol
Pull-up Resistance
Rup,SPI
CSB in SPI mode
Pull-up Resistance
Rup,I2C
CSB in I2C mode
Input Capacitance
Condition
Internal
Pull-up
Resistance to VDDIO
Internal
Pull-up
Resistance to VDDIO
Min
Typ
Max
Unit
37
55
74
k
70
120
190
k
20
pF
400
pF
Cin
I²C
Bus
Load
Capacitance (max. CI2C_Load
drive capability)
8.1 Serial peripheral interface (SPI)
The timing specification for SPI of the BMC150 is given in the following table:
Table 49: SPI timing for BMC150 accelerometer and magnetometer part
Parameter
Clock Frequency
SCK Low Pulse
SCK High Pulse
SDI Setup Time
SDI Hold Time
SDO Output Delay
CSB Setup Time
CSB Hold Time
Idle time between
write accesses, normal
mode, standby mode,
low-power mode 2
Idle time between
write accesses,
suspend mode, lowpower mode 1
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Symbol
Condition
fSPI
Max
Units
Max. Load on SDI
or SDO = 25pF,
VDDIO ≥ 1.62V
10
MHz
VDDIO < 1.62V
7.5
MHz
tSCKL
tSCKH
20
20
20
20
tSDI_setup
tSDI_hold
tSDO_OD
Min
Load = 25pF,
VDDIO ≥ 1.62V
Load = 25pF,
VDDIO < 1.62V
Load = 250pF,
VDDIO > 2.4V
ns
ns
ns
ns
30
ns
50
ns
40
ns
tCSB_setup
tCSB_hold
20
40
ns
ns
tIDLE_wacc_nm
2
µs
tIDLE_wacc_sum
450
µs
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The following figure shows the definition of the SPI timings given in Table 49:
tCSB_setup
tCSB_hold
CSB
SCK
tSCKL tSCKH
SDI
SDO
tSDI_setup
tSDI_hold
tSDO_OD
Figure 19: SPI timing diagram
The SPI interface of the BMC150 is compatible with two modes, “00” and “11”. The automatic
selection between [CPOL = “0” and CPHA = “0”] and [CPOL = “1” and CPHA = “1”] is done
based on the value of SCK after a falling edge of CSB.
Two configurations of the SPI interface are supported by the BMC150: 4-wire and 3-wire. The
same protocol is used by both configurations. The device operates in 4-wire configuration by
default. It can be switched to 3-wire configuration by writing “1” to (0x34) “spi3” for the
accelerometer part and writing “1” to (0x4B) “SPI3en” for the magnetometer part (after power
control bit was set). Pin SDI is used as the common data pin in 3-wire configuration.
For single byte read as well as write operations, 16-bit protocols are used. The BMC150 also
supports multiple-byte read operations.
In SPI 4-wire configuration CSB (chip select low active), SCK (serial clock), SDI (serial data
input), and SDO (serial data output) pins are used. The communication starts when the CSB is
pulled low by the SPI master and stops when CSB is pulled high. SCK is also controlled by SPI
master. SDI and SDO are driven at the falling edge of SCK and should be captured at the rising
edge of SCK.
The basic write operation waveform for 4-wire configuration is depicted in Figure 20. During the
entire write cycle SDO remains in high- impedance state.
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CSB
SCK
SDI
R/W
AD6
AD5
AD4
AD3
AD2
AD1
AD0
SDO
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
Z
tri-state
Figure 20: 4-wire basic SPI write sequence (mode “11”)
The basic read operation waveform for 4-wire configuration is depicted in Figure 21:
CS
B
SC
K
SD
I
R/W AD
6
AD5
A 4
D
A 3 A 2
D
D
AD
1
AD
0
SD
O
DO
7
DO
6
DO
5
DO
4
DO
3
DO
2
DO
1
DO tr -stat
0
i e
Figure 21: 4-wire basic SPI read sequence (mode “11”)
The data bits are used as follows:
Bit0: Read/Write bit. When 0, the data SDI is written into the chip. When 1, the data SDO from
the chip is read.
Bit1-7: Address AD(6:0).
Bit8-15: when in write mode, these are the data SDI, which will be written into the address.
When in read mode, these are the data SDO, which are read from the address.
Multiple read operations are possible by keeping CSB low and continuing the data transfer.
Only the first register address has to be written. Addresses are automatically incremented after
each read access as long as CSB stays active low. Note that a complete burst read over
accelerometer and magnetometer register addresses is not supported. Instead, a second burst
read must be started at address 0x40 if the entire BMC150 memory map is to be read.
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The principle of multiple read is shown in Figure 22:
Control byte
Start
RW
CSB
=
0
1
Register adress (02h)
0
0
0
0
0
1
0
X
X
Data byte
Data byte
Data byte
Data register - adress 02h
Data register - adress 03h
Data register - adress 04h
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Stop
X
X
CSB
=
1
Figure 22: SPI multiple read
In SPI 3-wire configuration CSB (chip select low active), SCK (serial clock), and SDI (serial
data input and output) pins are used. The communication starts when the CSB is pulled low by
the SPI master and stops when CSB is pulled high. SCK is also controlled by SPI master. SDI is
driven (when used as input of the device) at the falling edge of SCK and should be captured
(when used as the output of the device) at the rising edge of SCK.
The protocol as such is the same in 3-wire configuration as it is in 4-wire configuration. The
basic operation waveform (read or write access) for 3-wire configuration is depicted in Figure
23:
CSB
SCK
SDI
RW
AD6
AD5
AD4
AD3
AD2
AD1
AD0
DI7
DI6
DI5
DI4
DI3
DI2
DI1
DI0
Figure 23: 3-wire basic SPI read or write sequence (mode “11”)
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8.2 Inter-Integrated Circuit (I²C)
The I²C bus uses SCL (= SCK pin, serial clock) and SDA (= SDI pin, serial data input and
output) signal lines. Both lines must be connected to VDDIO externally via pull-up resistors so that
they are pulled high when the bus is free.
The I²C interface of the BMC150 is compatible with the I²C Specification UM10204 Rev. 03 (19
June 2007), available at http://www.nxp.com. The BMC150 supports I²C standard mode and
fast mode, only 7-bit address mode is supported.
An overview is given in the table below:
Table 50: BMC150 I²C addresses
CSB pin
SDO pin
VDDIO
VDDIO
GND
VDDIO
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Accelerometer part
I²C address
0x10
0x11
Magnetometer part I²C
address
0x12
0x13
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The timing specification for I²C of the BMC150 is given in:
Table 51: I²C timings
Parameter
Clock Frequency
SCL Low Period
SCL High Period
SDA Setup Time
SDA Hold Time
Setup Time for a
repeated Start
Condition
Hold Time for a Start
Condition
Setup Time for a Stop
Condition
Time before a new
Transmission can
start
Idle time between
write accesses,
normal mode, standby
mode, low-power
mode 2
Idle time between
write accesses,
suspend mode, lowpower mode 1
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Symbol
fSCL
tLOW
tHIGH
tSUDAT
tHDDAT
Condition
Min
Max
400
Units
kHz
1.3
0.6
0.1
0.0
tSUSTA
0.6
tHDSTA
0.6
tSUSTO
0.6
µs
tBUF
tIDLE_wacc_n
m
tIDLE_wacc_s
um
1.3
2
450
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Below Figure shows the definition of the I²C timings given in Table 51: I²C timings:
SD A
tBUF
tf
t LOW
SC L
tHIGH
tHDSTA
tr
tHDDAT
t SUDAT
SD A
tSUSTA
t SUSTO
Figure 24: I²C timing diagram
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The I²C protocol works as follows:
START: Data transmission on the bus begins with a HIGH to LOW transition on the SDA line
while SCL is held HIGH (start condition (S) indicated by I²C bus master). Once the START
signal is transferred by the master, the bus is considered busy.
STOP: Each data transfer should be terminated by a Stop signal (P) generated by master. The
STOP condition is a LOW to HIGH transition on SDA line while SCL is held HIGH.
ACK: Each byte of data transferred must be acknowledged. It is indicated by an acknowledge
bit sent by the receiver. The transmitter must release the SDA line (no pull down) during the
acknowledge pulse while the receiver must then pull the SDA line low so that it remains stable
low during the high period of the acknowledge clock cycle.
In the following diagrams these abbreviations are used:
S
P
ACKS
ACKM
NACKM
RW
Start
Stop
Acknowledge by slave
Acknowledge by master
Not acknowledge by master
Read / Write
A START immediately followed by a STOP (without SCK toggling from logic “1” to logic “0”) is
not supported. If such a combination occurs, the STOP is not recognized by the device.
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I²C write access:
I²C write access can be used to write a data byte in one sequence.
The sequence begins with start condition generated by the master, followed by 7 bits slave
address and a write bit (RW = 0). The slave sends an acknowledge bit (ACK = 0) and releases
the bus. Then the master sends the one byte register address. The slave again acknowledges
the transmission and waits for the 8 bits of data which shall be written to the specified register
address. After the slave acknowledges the data byte, the master generates a stop signal and
terminates the writing protocol.
Example of an I²C write access:
Control byte
Slave Adress
Start
S
0
0
1
0
0
Register adress (0x10)
RW ACKS
0
0
0
Data byte
0
0
0
1
0
0
Data (0x09)
ACKS
0
0
X
X
X
X
X
ACKS Stop
X
X
X
P
Figure 25: Example of an I²C write access
I²C read access:
I²C read access also can be used to read one or multiple data bytes in one sequence.
A read sequence consists of a one-byte I²C write phase followed by the I²C read phase. The
two parts of the transmission must be separated by a repeated start condition (Sr). The I²C write
phase addresses the slave and sends the register address to be read. After slave
acknowledges the transmission, the master generates again a start condition and sends the
slave address together with a read bit (RW = 1). Then the master releases the bus and waits for
the data bytes to be read out from slave. After each data byte the master has to generate an
acknowledge bit (ACK = 0) to enable further data transfer. A NACKM (ACK = 1) from the master
stops the data being transferred from the slave. The slave releases the bus so that the master
can generate a STOP condition and terminate the transmission.
The register address is automatically incremented and, therefore, more than one byte can be
sequentially read out. Once a new data read transmission starts, the start address will be set to
the register address specified in the latest I²C write command. By default the start address is set
at 0x00. In this way repetitive multi-bytes reads from the same starting address are possible.
In order to prevent the I²C slave of the device to lock-up the I²C bus, a watchdog timer (WDT) is
implemented in the accelerometer part of BMC150. The WDT observes internal I²C signals and
resets the I²C interface if the bus is locked-up by the BMC150 accelerometer part. The activity
and the timer period of the WDT can be configured through the bits (0x34) i2c_wdt_en and
(0x34) i2c_wdt_sel.
Writing ´1´ (´0´”) to (0x34) i2c_wdt_en activates (de-activates) the WDT. Writing “0” (“1”) to
(0x34) i2c_wdt_se selects a timer period of 1 ms (50 ms).
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 126
Example of an I²C multiple read accesses:
Data byte
Slave Adress
Start
Sr
0
0
1
0
0
Read Data (0x02)
RW ACKS
0
0
1
Data byte
X
X
X
X
X
X
Read Data (0x03)
ACKM
X
X
X
X
X
Data byte
X
…
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Data byte
Data byte
Read Data (0x07)
X
X
…
X
Read Data (0x05)
ACKM
Read Data (0x06)
X
X
Data byte
Read Data (0x04)
…
X
ACKM
X
ACKM
X
X
X
X
X
X
X
X
ACKM
X
…
X
NACK
X
X
Stop
P
Figure 26: Example of an I²C multiple read access
8.2.1 SPI and I²C Access Restrictions
In order to allow for the correct internal synchronisation of data written to the BMC150
accelerometer, certain access restrictions apply for consecutive write accesses or a write/read
sequence through the SPI as well as I2C interface. The required waiting period depends on
whether the device is operating in normal mode (or standby mode, or low-power mode 2) or
suspend mode (or low-power mode 1).
As illustrated in figure 21, an interface idle time of at least 2 µs is required following a write
operation when the device operates in normal mode (or standby mode, or low-power mode 2).
In suspend mode (or low-power mode 1) an interface idle time of least 450 µs is required.
X-after-Write
Write-Operation
X-Operation
Register Update Period
(> 2us / 450us)
Figure 27: Post-Write Access Timing Constraints
For the magnetometer, only the power control bit can be accessed in suspend mode. After
setting power control to ‘1’, the user must wait ts_up,m before the other registers can be accessed.
These can then be accessed without any restrictions.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 127
9. Pin-out and connection diagram
9.1 Pin-out
14
SDI
13
PS
12
CSB
12
CSB
1
SDO
2
INT1
TOP VIEW
(pads not visible)
3
INT2
4
DRDY
5
INT3
6
GND
11
SCK
11
SCK
10
VDDIO
10
VDDIO
9
GND
9
GND
8
VDD
8
VDD
7
GND
14
SDI
1
SDO
BOTTOM VIEW
(pads visible)
2
INT1
3
INT2
4
DRDY
7
GND
Figure 28: Pin-out top view
13
PS
6
GND
5
INT3
Figure 29: Pin-out bottom view
Table 52: Pin description
Pin
Name
I/O Type
Sensor
Description
1
SDO
Out
Mag+Acc
SPI: Data out
2
INT1
Out
Acc
3
INT2
Out
Acc
4
DRDY
Out
Mag
5
INT3
Out
Mag
6
GND
Supply
Mag+Acc
7
GND
Supply
Mag+Acc
8
VDD
Supply
Mag+Acc
9
GND
Supply
10
VDDIO
11
Interrupt
output #1
Interrupt
output #2
Data ready
Interrupt
output #3
Ground
SPI4W
SDO /
MISO
Connect to
SPI3W
I²C
DNC
GND for
(float) default address
INT 1 input or DNC if unused
INT2 input or DNC if unused
DRDY input or DNC if unused
INT3 input or DNC if unused
GND
GND
Mag+Acc
Ground
Supply
voltage
Ground
Supply
Mag+Acc
I/O voltage
VDDIO
SCK
In
Mag+Acc
Serial clock
SCK
SCK
12
CSB
In
Mag+Acc
Chip Select
CSB
CSB
13
PS
In
Mag+Acc
GND
GND
VDDIO
14
SDI
In/Out
Mag+Acc
SDI /
MOSI
SDA
SDA
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Protocol
select
SPI: Data in,
I²C: Data
VDD
GND
SCL
DNC (float) or
VDDIO
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 128
9.2 Connection diagram 4-wire SPI
SDI
14
SDI
VDDIO
CSB
13
PS
VDD
12
CSB
SDO
1
SDO
11
SCK
INT1
or NC
2
INT1
10
VDDIO
INT2
or NC
3
INT2
DRDY
or NC
4
DRDY
TOP VIEW
(pads not visible)
SCK
9
GND
8
VDD
5
INT3
6
GND
7
GND
C2
C1
INT3
or NC
Figure 30: 4-wire SPI connection diagram
Note:
The recommended value for C1 and C2 is 100 nF.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 129
9.3 Connection diagram 3-wire SPI
SDI/SDO
14
SDI
VDDIO
CSB
13
PS
VDD
12
CSB
1
SDO
11
SCK
INT1
or NC
2
INT1
10
VDDIO
INT2
or NC
3
INT2
DRDY
or NC
4
DRDY
TOP VIEW
(pads not visible)
SCK
9
GND
8
VDD
5
INT3
6
GND
7
GND
C2
C1
INT3
or NC
Figure 31: 3-wire SPI connection diagram
Note:
The recommended value for C1 and C2 is 100 nF.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 130
9.4 Connection diagram I2C
SDA
14
SDI
VDDIO
13
PS
VDD
12
CSB
I²C address bit 0
GND: 0; VDDIO: '1'
1
SDO
11
SCK
INT1
or NC
2
INT1
10
VDDIO
INT2
or NC
3
INT2
DRDY
or NC
4
DRDY
TOP VIEW
(pads not visible)
SCL
9
GND
8
VDD
5
INT3
6
GND
7
GND
C2
C1
INT3
or NC
Figure 32: I²C connection diagram
Note:
The recommended value for C1 and C2 is 100 nF.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 131
10. Package
10.1 Outline dimensions
The sensor housing is a standard LGA 2.2 x 2.2 14-lead package. Its dimensions are the
following:
Figure 33: Package outline dimensions
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 132
10.2 Sensing axes orientation
The magnetic and acceleration sensing axes of the BMC150 are matching.
If the sensor is accelerated in the indicated directions, the corresponding channel will deliver a
positive acceleration signal (dynamic acceleration). If the sensor is at rest and the force of
gravity is acting along the indicated directions, the output of the corresponding channel will be
negative (static acceleration). If a positive magnetic field is applied in the indicated directions,
the corresponding channel will deliver a positive acceleration signal.
Example: If the sensor is at rest or at uniform motion in a gravitational and magnetic field
according to the figure given below, the output signals are
 0 g for the X acceleration channel, 0 µT for the X magnetic channel
 0 g for the Y acceleration channel, 0 µT for the Y magnetic channel
 +1 g for the Z acceleration channel, -|B| for the Z magnetic channel
N
B
S
Figure 34: Orientation of sensing axes (acceleration and magnetic)
Please note that the planet’s North pole is a magnetic south pole. This means that when the
BMC150’s X axis points towards the North pole, the measured field will be negative.
The following table lists all corresponding output signals on X, Y, and Z while the sensor is at
rest or at uniform motion in a gravity field under assumption of a ±2g range setting and a top
down gravity and magnetic vector as shown above.
Table 53: Output signals depending on sensor orientation
Output Signal Y
Output Signal Z
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
0g / 0LSB
0 µT
-1g / 256LSB
+|B| µT
0g / 0LSB
0 µT
+1g /
256LSB
-|B| µT
0g / 0LSB
0 µT
0g / 0LSB
0 µT
0g / 0LSB
0 µT
+1g /
256LSB
-|B| µT
0g / 0LSB
0 µT
upright
upright
Sensor Orientation
(gravity vector  =
acceleration vector ,
magnetic vector )
Output Signal X
-1g / 256LSB
+|B| µT
0g / 0LSB
0 µT
0g / 0LSB
0 µT
0g / 0LSB
0 µT
0g / 0LSB
0 µT
0g / 0LSB
0 µT
0g / 0LSB
0 µT
+1g /
256LSB
-|B| µT
-1g / 256LSB
+|B| µT
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 133
10.3 Android axes orientation
The Android coordinate system is shown in Figure 35. The origin is in the lower-left corner with
respect to the screen, with the X axis horizontal and pointing right, the Y axis vertical and
pointing up and the Z axis pointing outside the front face of the screen. In this system,
coordinates behind the screen have negative Z values.
Figure 35: Android coordinate system
Attitude terms are defined in the following way (see Figure 36):
 Heading / Azimuth – angle between the magnetic north direction and the Y axis, around
the Z axis (0° to 360°). 0° = North, 90° = East, 180° = South, 270° = West.
 Pitch – rotation around X axis (-180° to 180°), with positive values when the z-axis
moves toward the y-axis.
 Roll – rotation around Y axis (-90° to 90°), with positive values when the x-axis moves
toward the z-axis.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 134
Figure 36: Heading, pitch and roll in Android coordinate frame
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 135
10.4 Landing pattern recommendation
For the design of the landing pattern, we recommend the following dimensioning:
Figure 37: Landing patterns relative to the device pins, dimensions are in mm
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 136
10.5 Marking
10.5.1 Mass production devices
Table 54: Marking of mass production samples
Labeling
CCC
TL
Name
Symbol
Remark
First letter of
second row
T
internal use
Second letter of
second row
L
internal use
Lot counter
CCC
Numerical counter
Pin 1 identifier

10.5.2 Engineering samples
Table 55: Marking of engineering samples
Labeling
TXX
Y+
Name
Symbol
Remark
Product number
T
1 alphanumeric digit, fixed
to identify product type, T = “C”
Engineering lot
XX
2 alphanumerical digits to identify the
engineering lot
Sample Stage
Y
“A” for A-samples, “C” for C-samples
Sample status
Cx
x = Numerical counter
Pin 1 identifier

BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 137
10.6 Soldering guidelines
The moisture sensitivity level of the BMC150 sensors corresponds to JEDEC Level 1, see also:
 IPC/JEDEC J-STD-020C “Joint Industry Standard: Moisture/Reflow Sensitivity
Classification for non-hermetic Solid State Surface Mount Devices”
 IPC/JEDEC J-STD-033A “Joint Industry Standard: Handling, Packing, Shipping and Use of
Moisture/Reflow Sensitive Surface Mount Devices”.
The sensor fulfils the lead-free soldering requirements of the above-mentioned IPC/JEDEC
standard, i.e. reflow soldering with a peak temperature up to 260°C.
Figure 38: Soldering profile
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 138
10.7 Handling instructions
Micromechanical sensors are designed to sense acceleration with high accuracy even at low
amplitudes and contain highly sensitive structures inside the sensor element. The MEMS sensor
can tolerate mechanical shocks up to several thousand g. However, these limits might be
exceeded in conditions with extreme shock loads such as e.g. hammer blow on or next to the
sensor, dropping of the sensor onto hard surfaces etc.
We recommend avoiding g-forces beyond the specified limits during transport, handling and
mounting of the sensors in a defined and qualified installation process.
This device has built-in protections against high electrostatic discharges or electric fields (e.g.
2kV HBM); however, anti-static precautions should be taken as for any other CMOS component.
Unless otherwise specified, proper operation can only occur when all terminal voltages are kept
within the supply voltage range. Unused inputs must always be tied to a defined logic voltage
level.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 139
10.8 Tape and reel specification
10.8.1 Tape and reel dimensions
The following picture describes the dimensions of the tape used for shipping the BMC150
sensor device. The material of the tape is made of conductive polystyrene (IV).
Figure 39: Tape and reel dimensions in mm
10.8.2 Orientation within the reel
 Processing direction 
Figure 40: Orientation of the BMC150 devices relative to the tape
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 140
10.9 Environmental safety
The BMC150 sensor meets the requirements of the EC restriction of hazardous substances
(RoHS) directive, see also:
Directive 2002/95/EC of the European Parliament and of the Council of 8 September
2011 on the restriction of the use of certain hazardous substances in electrical and
electronic equipment.
10.9.1 Halogen content
The BMC150 is halogen-free. For more details on the analysis results please contact your
Bosch Sensortec representative.
10.9.2 Internal package structure
Within the scope of Bosch Sensortec’s ambition to improve its products and secure the mass
product supply, Bosch Sensortec qualifies additional sources (e.g. 2nd source) for the LGA
package of the BMC150.
While Bosch Sensortec took care that all of the technical packages parameters are described
above are 100% identical for all sources, there can be differences in the chemical content and
the internal structural between the different package sources.
However, as secured by the extensive product qualification process of Bosch Sensortec, this
has no impact to the usage or to the quality of the BMC150 product.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 141
11. Legal disclaimer
11.1 Engineering samples
Engineering Samples are marked with an asterisk (*) or (e) or (E). Samples may vary from the
valid technical specifications of the product series contained in this data sheet. They are
therefore not intended or fit for resale to third parties or for use in end products. Their sole
purpose is internal client testing. The testing of an engineering sample may in no way replace
the testing of a product series. Bosch Sensortec assumes no liability for the use of engineering
samples. The Purchaser shall indemnify Bosch Sensortec from all claims arising from the use of
engineering samples.
11.2 Product use
Bosch Sensortec products are developed for the consumer goods industry. They may only be
used within the parameters of this product data sheet. They are not fit for use in life-sustaining
or security sensitive systems. Security sensitive systems are those for which a malfunction is
expected to lead to bodily harm or significant property damage. In addition, they are not fit for
use in products which interact with motor vehicle systems.
The resale and/or use of products are at the purchaser’s own risk and his own responsibility.
The examination of fitness for the intended use is the sole responsibility of the Purchaser.
The purchaser shall indemnify Bosch Sensortec from all third party claims arising from any
product use not covered by the parameters of this product data sheet or not approved by Bosch
Sensortec and reimburse Bosch Sensortec for all costs in connection with such claims.
The purchaser must monitor the market for the purchased products, particularly with regard to
product safety, and inform Bosch Sensortec without delay of all security relevant incidents.
11.3 Application examples and hints
With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Bosch Sensortec hereby disclaims any and
all warranties and liabilities of any kind, including without limitation warranties of noninfringement of intellectual property rights or copyrights of any third party. The information given
in this document shall in no event be regarded as a guarantee of conditions or characteristics.
They are provided for illustrative purposes only and no evaluation regarding infringement of
intellectual property rights or copyrights or regarding functionality, performance or error has
been made.
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
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© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Datasheet
eCompass BMC150
Page 142
12. Document history and modification
Rev. No
Chapter
0.1
9.1
0.2
0.3
0.4
1.0
1.3
10.1
10.5
10.8.1
1.2
1.3
8.2
8
10
6.2
1.2
1.3
2
4.2.1
4.3.1, 6.5
4.5.1
4.5.2
4.7.3
4.7.6
4.7.7
4.7.8, 6.11
4.7.10
6.7
6.9
6.11
6.12
6.15
8.1
8.2
10.1
10.9
Description of modification/changes
Date
Document creation
Page 1: Technical reference code corrected
Table 52: Pin description, corresponding sensor of CSB
changed from Acc to Mag+Acc, PS from Mag to
Mag+Acc (both pins are shared by accelerometer and
magnetometer)
Table 56: “1300µT exchanged by “±1300µT”
Figure 41: Contains position and dimensions of Pin1
marking
device marking updated
Tape and reel specification added
Table 2: dTS and OTS updated
Table 3: Brg,z updated
Table 51: I²C timings updated
Table 47 updated
number of pins corrected
Figure 18: Chip ID update
Final status
Updated current consumption in power mode
Footnote heading accuracy edited
ESD MM specification added (was already available in
Qualification Report)
Power mode description update
Center temperature update -> 23°C
Description of slow compensation updated
“Fast compensation” description improved
Electrical behavior updated
Description of tab interrupt updated
Typo corrected, orient_hyst ->(0x2c)
Description of flat detection updated, (0x2F)
Description of high-g interrupt updated
Description g-range selection updated
PMU_LOW_NOISE renamed PMU_LOW_POWER
0x2B:tap_th<3:0> ->tap_tap_th<4:0>, 0x2F: flat_hy,
0x37: cut_off updated
Typo in self test waiting time -> 50 ms
0x38, 0x39, 0x3A offset_target_x/y/z -> offset_x/y/z
SPI timings updated, VDDIO<1.62 V  7.5 MHz limit of
SPI frequency
I²C description update, Figure 24: Update
Update package outline dimensions
Sensor fulfills newest EC restrictions (RoHS)
2012-07-30
2012-11-06
2012-12-06
2013-02-05
2014-07-14
Bosch Sensortec GmbH
Gerhard-Kindler-Strasse 8
72770 Reutlingen / Germany
[email protected]
www.bosch-sensortec.com
Modifications reserved | Printed in Germany
Specifications subject to change without notice
Document number: BST-BMC150-DS000-04
Version_1.0_072014
BST-BMC150-DS000-04 | Revision 1.0 | July 2014
Bosch Sensortec
© Bosch Sensortec GmbH reserves all rights even in the event of industrial property rights. We reserve all rights of disposal such as copying and passing on to
third parties. BOSCH and the symbol are registered trademarks of Robert Bosch GmbH, Germany.
Note: Specifications within this document are subject to change without notice. Not intended for publication.
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Bosch:
BMC150 0330.SB0.156

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