L6384E High voltage half-bridge driver Description -
L6384E
High voltage half-bridge driver
Datasheet - production data
Description
DIP-8
SO-8
Features
 High voltage rail up to 600 V
 dV/dt immunity ± 50 V/nsec in full temperature
range
 Driver current capability
– 400 mA source
– 650 mA sink
 Switching times 50/30 nsec rise/fall with 1 nF
load
 CMOS/TTL Schmitt trigger inputs with
hysteresis and pull-down
 Shutdown input
 Deadtime setting
 Undervoltage lockout
 Integrated bootstrap diode
 Clamping on VCC
 Available in DIP-8/SO-8 packages
Applications
 Home appliances
 Induction heating
 HVAC
The L6384E is a high voltage gate driver,
manufactured with the BCD™ “offline”
technology, and able to drive a half-bridge of
power MOSFET or IGBT devices. The high-side
(floating) section is able to work with voltage rail
up to 600 V. Both device outputs can sink and
source 650 mA and 400 mA respectively and
cannot be simultaneously driven high thanks to
single input configuration. Further prevention
from outputs cross conduction is guaranteed by
the deadtime function, tunable by the user
through an external resistor connected to the
DT/SD pin.
The L6384E device has one input pin, one enable
pin (DT/SD) and two output pins, and guarantees
matched delays between low-side and high-side
sections, thus simplifying device's high frequency
operation. The logic inputs are CMOS/TTL
compatible to ease the interfacing with controlling
devices. The bootstrap diode is integrated inside
the device, allowing a more compact and reliable
solution.
The L6384E features the UVLO protection and
a voltage clamp on the VCC supply voltage. The
voltage clamp is typically around 15.6 V and is
useful in order to ensure a correct device
functioning in cases where VCC supply voltage is
ramped up too slowly or is subject to voltage
drops.
The device is available in a DIP-8 tube and SO-8
tube and tape and reel packaging options.
 Industrial applications and drives
 Motor drivers
– DC, AC, PMDC and PMAC motors
 Lighting applications
 Factory automation
 Power supply systems
September 2015
This is information on a product in full production.
DocID13862 Rev 3
1/18
www.st.com
Contents
L6384E
Contents
1
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
2
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.1
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2.3
Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
5
4.1
AC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.2
DC operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4.3
Timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Bootstrap driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
CBOOT selection and charging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
6
Typical characteristic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
7
Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.1
DIP-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
7.2
SO-8 package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
8
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2/18
DocID13862 Rev 3
L6384E
Block diagram
1
Block diagram
Figure 1. Block diagram
H.V.
VCC
2
8
VBOOT
BOOTSTRAP DRIVER
HVG
DRIVER
UV
DETECTION
R
IN
1
OUT
LEVEL
SHIFTER
Idt
DT/SD
DEAD
TIME
HVG
7
LOGIC
VCC
3
S
CBOOT
LVG
DRIVER
VCC
6
5
LVG
4
GND
LOAD
Vthi
D97IN518A
DocID13862 Rev 3
3/18
18
Electrical data
L6384E
2
Electrical data
2.1
Absolute maximum ratings
Table 1. Absolute maximum ratings
Symbol
Parameter
VOUT
Output voltage
VCC
Supply voltage(1)
Is
VBOOT
Value
Unit
-3 to VBOOT -18
V
- 0.3 to 14.6
V
25
mA
-1 to 618
V
(1)
Supply current
Floating supply voltage
Vhvg
High-side gate output voltage
-1 to VBOOT
V
Vlvg
Low-side gate output voltage
-0.3 to VCC +0.3
V
Logic input voltage
-0.3 to VCC +0.3
V
Shutdown/deadtime voltage
-0.3 to VCC +0.3
V
Allowed output slew rate
50
V/ns
Ptot
Total power dissipation (Tj = 85 °C)
750
mW
TJ
Junction temperature
150
°C
Ts
Storage temperature
-50 to 150
°C
ESD
Human body model
2
kV
Vi
VSD
dVout/dt
1. The device has an internal clamping Zener between GND and the VCC pin, it must not be supplied by a low
impedance voltage source.
2.2
Thermal data
Table 2. Thermal data
Symbol
Rth(JA)
4/18
Parameter
Thermal resistance junction to ambient
DocID13862 Rev 3
SO-8
DIP-8
Unit
150
100
°C/W
L6384E
2.3
Electrical data
Recommended operating conditions
Table 3. Recommended operating conditions
Symbol
Pin
Parameter
Test condition
Min.
VOUT
6
Output voltage
(1)
VBS(2)
8
Floating supply voltage
(1)
fsw
VCC
Tj
Switching frequency
2
HVG, LVG load CL = 1 nF
Supply voltage
Junction temperature
-45
Typ.
Max.
Unit
580
V
17
V
400
kHz
Vclamp
V
125
°C
1. If the condition VBOOT - VOUT < 18 V is guaranteed, VOUT can range from -3 to 580 V.
2. VBS = VBOOT - VOUT.
DocID13862 Rev 3
5/18
18
Pin connection
3
L6384E
Pin connection
Figure 2. Pin connection (top view)
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Table 4. Pin description
No.
Pin
Type
Function
1
IN
I
Logic input: it is in phase with HVG and in opposition of phase with LVG. It is compatible
to VCC voltage. (Vil Max = 1.5 V, Vih Min = 3.6 V).
2
VCC
P
Supply input voltage: there is an internal clamp [typ. 15.6 V].
3
DT/SD
I
High impedance pin with two functionalities. When pulled lower than Vdt (typ. 0.5 V), the
device is shut down. A voltage higher than Vdt sets the deadtime between the high-side
gate driver and low-side gate driver. The deadtime value can be set forcing a certain
voltage level on the pin or connecting a resistor between the pin 3 and ground. Care
must be taken to avoid below threshold spikes on the pin 3 that can cause undesired
shutdown of the IC. For this reason the connection of the components between the pin 3
and ground has to be as short as possible. This pin can not be left floating for the same
reason. The pin has not be pulled through a low impedance to VCC, because of the drop
on the current source that feeds Rdt. The operative range is: Vdt … 270 K Idt, that
allows a dt range of 0.4 - 3.1 s.
4
GND
P
Ground
5
LVG
O
Low-side driver output: the output stage can deliver 400 mA source and 650 mA sink
(typ. values). The circuit guarantees 0.3 V max. on the pin (at Isink = 10 mA) with
VCC > 3 V and lower than the turn-on threshold. This allows to omit the bleeder resistor
connected between the gate and the source of the external MOSFET normally used to
hold the pin low; the gate driver ensures low impedance also in SD conditions.
6
VOUT
P
High-side driver floating reference: layout care has to be taken to avoid below ground
spikes on this pin.
O
High-side driver output: the output stage can deliver 400 mA source and 650 mA sink
(typ. values). The circuit guarantees 0.3 V max. between this pin and VOUT
(at Isink = 10 mA) with VCC > 3 V and lower than the turn-on threshold. This allows to omit
the bleeder resistor connected between the gate and the source of the external MOSFET
normally used to hold the pin low; the gate driver ensures low impedance also in SD
conditions.
P
Bootstrap supply voltage: it is the high-side driver floating supply. The bootstrap capacitor
connected between this pin and the pin 6 can be fed by an internal structure named
“bootstrap driver” (a patented structure). This structure can replace the external
bootstrap diode.
7
8
6/18
HVG
VBOOT
DocID13862 Rev 3
L6384E
Electrical characteristics
4
Electrical characteristics
4.1
AC operation
Table 5. AC operation electrical characteristics (VCC = 14.4 V; TJ = 25 °C)
Symbol
Pin
ton
1 vs. 5, 7
High/low-side driver turn-on
propagation delay
tonsd
3 vs. 5, 7
Shutdown input propagation
delay
1 vs. 5, 7
High/low-side driver turn-off
propagation delay
toff
Parameter
Test condition
Min.
Typ.
Max.
200+
dt
VOUT = 0 V Rdt= 47 k
Unit
ns
220
280
ns
VOUT = 0 V Rdt = 47 k
250
300
ns
VOUT = 0 V Rdt = 146 k
200
250
ns
VOUT = 0 V Rdt = 270 k
170
200
ns
tr
5, 7
Rise time
CL = 1000 pF
50
ns
tf
5, 7
Fall time
CL = 1000 pF
30
ns
4.2
DC operation
Table 6. DC operation electrical characteristics (VCC = 14.4 V; TJ = 25 °C)
Symbol
Pin
Parameter
Test condition
Min.
Typ.
Max. Unit
Is = 5 mA
14.6
15.6
16.6
V
Supply voltage section
Vclamp
2
Supply voltage clamping
VCCth1
2
VCC UV turn-on threshold
11.5
12
12.5
V
VCC UV turn-off threshold
9.5
10
10.5
V
VCCth2
VCC UV hysteresis
VCChys
IQCCU
2
IQCC
Undervoltage quiescent supply
current
2
V
VCC 11 V
150
A
VIN = 0
380
500
A
17
V
IN = HIGH
100
A
Vhvg = VOUT = VBOOT = 600 V
10
A
Quiescent current
Bootstrapped supply voltage section
VBOOT
IQBS
ILK
Bootstrap supply voltage
8
Quiescent current
High voltage leakage current
Bootstrap driver
Rdson
on-resistance(1)
VCC 12.5 V; IN = LOW
125

High/low-side driver
Iso
Isi
5, 7
Source short-circuit current
VIN = Vih (tp < 10 s)
300
400
mA
Sink short-circuit current
VIN = Vil (tp < 10 s)
500
650
mA
DocID13862 Rev 3
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18
Electrical characteristics
L6384E
Table 6. DC operation electrical characteristics (continued) (VCC = 14.4 V; TJ = 25 °C)
Symbol
Pin
Parameter
Test condition
Min.
Typ.
Max. Unit
Logic inputs
Low level logic threshold voltage
Vil
Vih
1.5
High level logic threshold
voltage
1, 3
3.6
Iih
High level logic input current
VIN = 15 V
Iil
Low level logic input current
VIN = 0 V
Iref
3
Deadtime setting current
dt
3 vs. 5, 7
Deadtime setting range(2)
Vdt
3
V
Rdt = 47 k
Rdt = 146 k
Rdt = 270 k
V
50
0.4
Shutdown threshold
70
A
1
A
28
A
0.5
1.5
2.7
s
s
s
3.1
0.5
1. RDS(on) is tested in the following way:
 V CC – V BOOT1  –  V CC – V BOOT2 
R DSON = ----------------------------------------------------------------------------------------------I 1  V CC ,V BOOT1  – I 2  V CC ,V BOOT2 
Where I1 is the pin 8 current when VBOOT = VBOOT1, I2 when VBOOT = VBOOT2.
2. The pin 3 is a high impedance pin. Therefore dt can be set also forcing a certain voltage V3 on this pin. The deadtime is the
same obtained with an Rdt if it is: Rdt × Iref = V3.
4.3
Timing diagram
Figure 3. Input/output timing diagram
IN
SD
HVG
LVG
D99IN1017
8/18
DocID13862 Rev 3
V
L6384E
5
Bootstrap driver
Bootstrap driver
A bootstrap circuitry is needed to supply the high voltage section. This function is normally
accomplished by a high voltage fast recovery diode (Figure 4 a). In the L6384E device
a patented integrated structure replaces the external diode. It is realized by a high voltage
DMOS, driven synchronously with the low-side driver (LVG), with a diode in series, as
shown in Figure 4 b. An internal charge pump (Figure 4 b) provides the DMOS driving
voltage. The diode connected in series to the DMOS has been added to avoid undesirable
turn-on.
CBOOT selection and charging
To choose the proper CBOOT value the external MOSFET can be seen as an equivalent
capacitor. This capacitor CEXT is related to the MOSFET total gate charge:
Equation 1
Q gate
C EXT = --------------V gate
The ratio between the capacitors CEXT and CBOOT is proportional to the cyclical voltage loss.
It has to be:
CBOOT>>>CEXT
E.g.: if Qgate is 30 nC and Vgate is 10 V, CEXT is 3 nF. With CBOOT = 100 nF the drop would be
300 mV.
If HVG has to be supplied for a long time, the CBOOT selection has to take into account also
the leakage losses.
E.g.: HVG steady state consumption is lower than 100 A, so if HVG TON is 5 ms, CBOOT
has to supply 0.5 C to CEXT. This charge on a 1 F capacitor means a voltage drop of
0.5 V.
The internal bootstrap driver gives great advantages: the external fast recovery diode can
be avoided (it usually has a great leakage current).
This structure can work only if VOUT is close to GND (or lower) and in the meanwhile the
LVG is on. The charging time (Tcharge ) of the CBOOT is the time in which both conditions are
fulfilled and it has to be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop due to the DMOS RDSON (typical value:
125 ). At low frequency this drop can be neglected. Anyway increasing the frequency it
must be taken in to account.
The following equation is useful to compute the drop on the bootstrap DMOS:
Equation 2
Q gate
V drop = I ch arg e R dson  V drop = -------------------R dson
T ch arg e
where Qgate is the gate charge of the external power MOSFET, Rdson is the on-resistance of
the bootstrap DMOS, and Tcharge is the charging time of the bootstrap capacitor.
DocID13862 Rev 3
9/18
18
Bootstrap driver
L6384E
For example: using a power MOSFET with a total gate charge of 30 nC, the drop on the
bootstrap DMOS is about 1 V, if the Tcharge is 5 s. In fact:
Equation 3
30nC
V drop = ---------------  125  0.8V
5s
Vdrop has to be taken into account when the voltage drop on CBOOT is calculated: if this drop
is too high, or the circuit topology doesn’t allow a sufficient charging time, an external diode
can be used.
Figure 4. Bootstrap driver
DBOOT
VS
VBOOT
VBOOT
VS
H.V.
H.V.
HVG
HVG
CBOOT
VOUT
TO LOAD
TO LOAD
LVG
LVG
a
10/18
CBOOT
VOUT
b
DocID13862 Rev 3
D99IN1067
L6384E
Typical characteristic
Figure 5. Typical rise and fall times
vs. load capacitance
time
(nsec)
D99IN1015
250
Figure 6. Quiescent current vs. supply
voltage
Iq
(μA)
104
D99IN1016
200
Tr
103
150
Tf
100
102
50
0
10
0
1
2
3
4
5 C (nF)
For both high and low side buffers @25˚C Tamb
Figure 7. Deadtime vs. resistance
0
4
6
8
10
14
VS(V)
@ Vcc = 14.4V
@ Vcc = 14.4V
300
2.0
Ton,Toff (ns)
2.5
Typ.
1.5
1.0
200
100
@ Rdt = 47kOhm
Typ.
Typ.
@ Rdt = 270kOhm
Typ.
@ Rdt = 146kOhm
0.5
0.0
50
100
150
200
Rdt (k)
250
0
300
Figure 9. Deadtime vs. temperature
-45
-25
0
25
50
Tj (°C)
75
100
125
Figure 10. Shutdown threshold
vs. temperature
1
3
2.5
12
400
3.0
dt (s)
2
Figure 8. Driver propagation delay
vs. temperature
3.5
Typ.
R=270K
0.8
@ Vcc = 14.4V
2
1.5
@ Vcc = 14.4V
Typ.
R=146K
Typ.
R=47K
1
0.6
Vdt (V)
dt (s)
6
Typical characteristic
0.4
Typ.
0.2
0.5
0
-45
-25
0
25
50
75
100
125
Tj (°C)
0
-45
-25
0
25
50
75
100
125
Tj (°C)
DocID13862 Rev 3
11/18
18
Typical characteristic
L6384E
Figure 11. VCC UV turn-on vs. temperature
Figure 12. Output source current
vs. temperature
1000
15
800
Current (mA)
Vccth1 (V)
14
13
12
Typ.
11
-45
-25
0
25
50
Tj (°C)
75
100
0
-45
125
-25
0
25
50
Tj (°C)
75
100 125
Figure 14. Output sink current
vs. temperature
13
1000
12
800
@ Vcc = 14.4V
Current (mA)
Vccth2 (V)
Figure 13. VCC UV turn-off
vs. temperature
11
10
Typ.
400
200
10
Typ.
9
Typ.
600
400
200
8
0
-45
12/18
@ Vcc = 14.4V
600
-25
0
25
50
Tj (°C)
75
100
125
DocID13862 Rev 3
-45
-25
0
25
50
Tj (°C)
75
100 125
L6384E
7
Package information
Package information
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK
specifications, grade definitions and product status are available at: www.st.com.
ECOPACK is an ST trademark.
7.1
DIP-8 package information
Figure 15. DIP-8 package outline
$0Y
DocID13862 Rev 3
13/18
18
Package information
L6384E
Table 7. DIP-8 package mechanical data
Dimensions (mm)
Dimensions (inch)
Symbol
Min.
A
Typ.
Min.
3.32
Typ.
Max.
0.131
a1
0.51
0.020
B
1.15
1.65
0.045
0.065
b
0.356
0.55
0.014
0.022
b1
0.204
0.304
0.008
0.012
D
E
10.92
7.95
9.75
0.430
0.313
0.384
e
2.54
0.100
e3
7.62
0.300
e4
7.62
0.300
F
6.6
0.260
I
5.08
0.200
L
Z
14/18
Max.
3.18
3.81
1.52
DocID13862 Rev 3
0.125
0.150
0.060
L6384E
7.2
Package information
SO-8 package information
Figure 16. SO-8 package outline
$0Y
DocID13862 Rev 3
15/18
18
Package information
L6384E
Table 8. SO-8 package mechanical data
Dimensions (mm)
Dimensions (inch)
Symbol
Min.
Typ.
A
Max.
Min.
Typ.
1.750
0.0689
A1
0.100
A2
1.250
b
0.280
0.480
0.0110
0.0189
c
0.170
0.230
0.0067
0.0091
(1)
4.800
4.900
5.000
0.1890
0.1929
0.1969
E
5.800
6.000
6.200
0.2283
0.2362
0.2441
E1(2)
3.800
3.900
4.000
0.1496
0.1535
0.1575
D
e
0.250
Max.
0.0039
0.0098
0.0492
1.270
0.0500
h
0.250
0.500
0.0098
0.0197
L
0.400
1.270
0.0157
0.0500
L1
k
ccc
1.040
0°
0.0409
8°
0.100
0°
8°
0.0039
1. Dimension “D” does not include mold flash, protrusions or gate burrs. Mold flash, protrusions or gate burrs
shall not exceed 0.15 mm in total (both sides).
2. Dimension “E1” does not include interlead flash or protrusions. Interlead flash or protrusions shall not
exceed 0.25 mm per side.
16/18
DocID13862 Rev 3
L6384E
8
Order codes
Order codes
Table 9. Order code
9
Order code
Package
Packaging
L6384E
DIP-8
Tube
L6384ED
SO-8
Tube
L6384ED013TR
SO-8
Tape and reel
Revision history
Table 10. Document revision history
Date
Revision
12-Oct-2007
1
First release
2
Added Section : Applications on page 1.
Updated Section : Description on page 1 (replaced by new description).
Updated Table 1: Device summary on page 1 (moved from page 15 to page 1,
updated title).
Updated Figure 1: Block diagram on page 3 (moved from page 1 to page 3,
numbered and added title to Section 1: Block diagram on page 3).
Updated Section 2.1: Absolute maximum ratings on page 4 (removed note below
Table 2: Absolute maximum ratings).
Updated Table 5: Pin description on page 5 (updated “Type” of several pins).
Updated Table 7 on page 6 (updated “Max.” value of IQBS symbol).
Updated Section : CBOOT selection and charging on page 8 (updated values of
“E.g.: HVG”).
Numbered Equation 1 on page 8, Equation 2 on page 8 and Equation 3 on page 9.
Updated Section 7: Package information on page 12 [updated/added titles, updated
ECOPACK text, reversed order of Figure 15 and Table 8, Figure 16 and Table 9
(numbered tables), removed 3D package figures, minor modifications].
Minor modifications throughout document.
3
Updated Table 1 on page 4 (added ESD parameter and value, minor modifications).
Updated note 1. below Table 6 on page 7 (replaced VCBOOTx by VBOOTx).
Moved Table 9 on page 17 (moved from page 1 to page 17, updated titles).
Updated cross-references throughout document.
Minor modifications throughout document.
20-Jun-2014
16-Sep-2015
Changes
DocID13862 Rev 3
17/18
18
L6384E
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the design of Purchasers’ products.
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Resale of ST products with provisions different from the information set forth herein shall void any warranty granted by ST for such product.
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Information in this document supersedes and replaces information previously supplied in any prior versions of this document.
© 2015 STMicroelectronics – All rights reserved
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