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CY8CKIT-030
PSoC
®
3 Development Kit Guide
Doc. # 001-61038 Rev. *H
Cypress Semiconductor
198 Champion Court
San Jose, CA 95134-1709
Phone (USA): 800.858.1810
Phone (Intnl): 408.943.2600
http://www.cypress.com
Copyrights
Copyrights
© Cypress Semiconductor Corporation, 2011-2013. The information contained herein is subject to change without notice.
Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a
Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user.
The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Any Source Code (software and/or firmware) is owned by Cypress Semiconductor Corporation (Cypress) and is protected by and subject to worldwide patent protection (United States and foreign), United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source
Code except as specified above is prohibited without the express written permission of Cypress.
Disclaimer: CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATE-
RIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein.
Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
Use may be limited by and subject to the applicable Cypress software license agreement.
PSoC Creator™ is a trademark, and PSoC
®
and CapSense
®
are registered trademarks of Cypress Semiconductor Corp. All other trademarks or registered trademarks referenced herein are property of the respective corporations.
Flash Code Protection
Cypress products meet the specifications contained in their particular Cypress PSoC datasheets. Cypress believes that its family of PSoC products is one of the most secure families of its kind on the market today, regardless of how they are used.
There may be methods, unknown to Cypress, that can breach the code protection features. Any of these methods, to our knowledge, would be dishonest and possibly illegal. Neither Cypress nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as ‘unbreakable’.
Cypress is willing to work with the customer who is concerned about the integrity of their code. Code protection is constantly evolving. We at Cypress are committed to continuously improving the code protection features of our products.
2 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Contents
4.2.1.1 Power Supply Jumper Settings........................................................18
4.2.1.3 Low-Power Functionality..................................................................19
4.2.2.1 Onboard Programming Interface .....................................................19
4.2.2.2 JTAG/SWD Programming................................................................20
PSoC 3 Development Kit Expansion Ports ....................................................25
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 3
Contents
Programming the Code Examples ................................................................. 31
4 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
1.
Introduction
1.1
1.2
Thank you for your interest in the CY8CKIT-030 PSoC
®
3 Development Kit. This kit allows you to develop precision analog and low-power designs using PSoC 3. You can design your own projects with PSoC Creator™ or alter the sample projects provided with this kit.
The CY8CKIT-030 PSoC 3 Development Kit is based on the PSoC 3 family of devices. PSoC 3 is a
Programmable System-on-Chip™ platform for 8-bit and 16-bit applications. It combines precision analog and digital logic with a high-performance CPU. With PSoC, you can create the exact combination of peripherals and integrated proprietary IP to meet your application requirements.
Kit Contents
■
■
■
■
The PSoC 3 Development Kit contains:
■
Development board
Kit DVD
Quick start guide
USB A to mini-B cable
3.3-V LCD module
Inspect the contents of the kit; if you find any part missing, contact your nearest Cypress sales office for help.
PSoC Creator
Cypress's PSoC Creator software is a state-of-the-art, easy-to-use integrated development environment (IDE) that introduces a hardware and software design environment based on classic schematic entry and revolutionary embedded design methodology.
With PSoC Creator, you can:
■
Create and share user-defined, custom peripherals using hierarchical schematic design.
■
■
Automatically place and route select components and integrate simple glue logic, normally located in discrete muxes.
Trade off hardware and software design considerations allowing you to focus on what matters and getting to market faster.
PSoC Creator also enables you to tap into an entire tools ecosystem with integrated compiler tool chains, RTOS solutions, and production programmers to support both PSoC 3 and PSoC 5LP.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 5
Introduction
1.3
1.3.1
1.3.2
1.3.3
1.3.4
Additional Learning Resources
Visit http://www.cypress.com
for additional learning resources in the form of datasheets, application notes, and technical reference manual.
Beginner Resources
AN54181 - Getting Started with PSoC® 3
PSoC Creator Training
Engineers Looking for More
AN54460 - PSoC 3®, PSoC 4, and PSoC 5LP Interrupts
AN52705 - PSoC 3® and PSoC 5LP - Getting Started with DMA
AN52701 - PSoC 3® and PSoC 5LP - Getting Started with Controller Area Network (CAN)
AN54439 - PSoC 3® and PSoC 5LP External Crystal Oscillators
AN52927 - PSoC 3® and PSoC 5LP - Segment LCD Direct Drive
Cypress continually strives to provide the best support. Click here to view a growing list of application notes for PSoC 3, PSoC 4, and PSoC 5LP.
Learning from Peers
Cypress Developer Community Forums
More Code Examples
PSoC Creator provides several example projects that make code development fast and easy. To access these example projects, click on Find Example Project… under the Example and Kits section in the Start Page of PSoC Creator or navigate to File > Open > Example Project….
Figure 1-1. Find Example Project
6 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Introduction
The Find Example Project section has various filters that help you locate the most relevant project.
PSoC Creator provides several starter designs. These designs highlight features that are unique to
PSoC devices. They allow you to create a design with various components, instead of creating an empty design; the code is also provided. To use a starter design for your project, navigate to File >
New > Project and select the design required.
Figure 1-2. New Project
The starter designs and the example project contain a PDF within the project that explains the features of the project and its configuration.
Figure 1-3. Project PDF Location
The example projects and starter designs are designed for the CY8CKIT-001 PSoC Development
Kit. However, these projects can be converted for use with the CY8CKIT-030 PSoC 3 Development
Kit or CY8CKIT-050 PSoC 5 Development Kit by following the procedure in the knowledge base article Migrating Project from CY8CKIT-001 to CY8CKIT-030 or CY8CKIT-050 .
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 7
Introduction
1.4
1.5
Document History
Revision
**
*A
PDF Creation
Date
01/06/2011
04/28/2011
*B
*C
12/02/2011
05/03/2012
*D
*E
*F
07/09/2012
09/07/2012
01/03/2013
*G
*H
02/28/2013
09/23/2013
Origin of
Change
QVS
RKAD
SASH
SASH
SASH
SASH
SASH
SASH
SASH
Description of Change
Initial version of kit guide
Updated Schematic
Added Pin Assignment table in the Appendix. Minor content updates
Updated Additional Resources section
Updated DVD Installation on page 9
.
Updated Figure 5-1 in Code Examples chapter on page 31 .
Updated images
Added 1.3.4 More Code Examples and
sections
Updated Figure 2-1 and Figure 5-1. Updates for PSoC Creator
2.2.
Updated PSoC Creator images. Added programming steps in section 3.1.
Documentation Conventions
Table 1-1. Document Conventions for Guides
Convention
Courier New
Italics
[Bracketed, Bold]
File > Open
Bold
Times New Roman
Text in gray boxes
Usage
Displays file locations, user entered text, and source code:
C:\ ...cd\icc\
Displays file names and reference documentation:
Read about the sourcefile.hex file in the PSoC Designer User Guide.
Displays keyboard commands in procedures:
[Enter] or [Ctrl] [C]
Represents menu paths:
File > Open > New Project
Displays commands, menu paths, and icon names in procedures:
Click the File icon and then click Open.
Displays an equation:
2 + 2 = 4
Describes cautions or unique functionality of the product.
8 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
2.
Getting Started
2.1
This chapter describes how to install and configure the PSoC 3 Development Kit. The
Operation chapter on page 11 explains how to program a PSoC 3 device with PSoC Programmer
and use the kit with the help of a code example. To reprogram the PSoC device with PSoC Creator, see the installation instructions for PSoC Creator. The
details the
hardware operation. The Code Examples chapter on page 31 provides instructions to create a
simple code example. The Appendix section provides the Schematics ,
and other useful information regarding the PSoC 3 Development Kit.
DVD Installation
Follow these steps to install the PSoC 3 Development Kit software:
1. Insert the kit DVD into the DVD drive of your PC. The DVD is designed to auto-run and the kit menu appears.
Figure 2-1. Kit Menu
Note If auto-run does not execute, double-click cyautorun.exe on the root directory of the DVD.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 9
Getting Started
2.2
2.3
2.4
2.5
10
After the installation is complete, the kit contents are available at the following location:
<Install_Directory>\Cypress\PSoC 3 Development Kit\<version>
Install Hardware
No hardware installation is required for this kit.
Install Software
■
■
When installing the PSoC 3 Development Kit, the installer checks if your system has the required software. These include PSoC Creator, PSoC Programmer, Windows Installer, .NET, and Keil Complier. If these applications are not installed, the installer installs them in your PC before installing the kit. If the Acrobat Reader application is not installed in your PC, then the installer provides the link to install the same; this does not prevent kit installation. Note that Acrobat Reader is required to view the kit documents. Install the following software from the kit DVD:
PSoC Creator 3.0 or later
■
PSoC Programmer 3.19.1 or later
Note When installing PSoC Programmer, select Typical on the Installation Type page.
Code examples (provided in the Firmware folder)
Important for Win7 and Vista Users: Rename the _tools.ini file in <Install_Directory>:\
PSoC Creator\<version>\PSoC Creator\import\keil\pk51\<version>
to tools.ini for the Keil registration to be successful.
Uninstall Software
The software can be uninstalled using one of the following methods:
■
Go to Start > Control Panel > Programs > Uninstall a program; select the Uninstall button in
Windows 7.
■
■
Go to Start > All Programs > Cypress > Cypress Update Manager > Cypress Update Man-
ager; select the Uninstall button next to the software to be uninstalled.
Insert the installation DVD and click Install PSoC 3 Development Kit button. In the CyInstaller
for PSoC 3 Development Kit 1.0 window, select Remove from the Installation Type drop-down menu. Follow the instructions to uninstall.
Verify Kit Version
To know the kit revision, look for the white sticker on the bottom left, on the reverse of the kit box. If the revision reads CY8CKIT-030A, then, you own the latest version.
To upgrade CY8CKIT-030 to CY8CKIT-030A, you can purchase our latest kits at: http://www.cypress.com/go/CY8CKIT-030
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
3.
Kit Operation
3.1
The code examples in the PSoC 3 Development Kit help you develop precision analog applications using the PSoC 3 family of devices. The board also has hooks to enable low-power measurements for low-power application development and evaluation.
Programming PSoC 3 Device
The default programming interface for the board is a USB-based onboard programming interface. To program the device, plug the USB cable to the programming USB connector J1, as shown in
.
Figure 3-1. Connect USB Cable to J1
When plugged in, the board enumerates as DVKProg (unconfigured). The DVKProg is configured after opening either the PSoC Creator or PSoC Programmer application. If either of these applications are opened before connecting the DVK to the PC, the DVKProg configuration happens instantaneously.
After enumeration, initiate a build of the code example and program using PSoC Creator.
When using onboard programming, it is not necessary to power the board from the 12-V or 9-V DC supply or a battery. You can use the USB power to the programming section.
If the board is already powered from another source, plugging in the programming USB does not damage the board.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 11
Kit Operation
The PSoC 3 device on the board can also be programmed using a MiniProg3 (CY8CKIT-002). To use MiniProg3 for programming, use the connector J3 on the board, as shown in
.
Note The MiniProg3 (CY8CKIT-002) is not part of the PSoC 3 Development Kit contents. It can be purchased from the Cypress Online Store .
Figure 3-2. Connect MiniProg3
With the MiniProg3, programming is similar to the onboard programmer; however, the setup enumerates as a MiniProg3.
The Select Debug Target window may be displayed, as shown in
.
12 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Kit Operation
Figure 3-3. Select Debug Target Window
Click Port Acquire. The window appears as follows. Click Connect to start programming.
Figure 3-4. Port Acquire > Connect
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 13
Kit Operation
14 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
4.
Hardware
4.1
System Block Diagram
■
■
■
■
■
■
■
■
■
■
The PSoC 3 Development Kit has the following sections:
■
Power supply system
Programming interface
USB communications
Boost convertor
PSoC 3 and related circuitry
32-kHz crystal
24-MHz crystal
Port E (analog performance port) and port D (CapSense
® or generic port)
RS-232 communications interface
Prototyping area
Character LCD interface
■
CapSense buttons and sliders
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 15
Hardware
Figure 4-1. PSoC 3 Development Kit Details
Power Adapter
Communication USB
9-V Battery Boost Converter
Input
10-Pin JTAG/SWD/SWO
Debug and Prog Header
On-board
Programming
USB
32-kHz Crystal
24-MHz Crystal
Port E
(Analog Port)
Variable
Resistor/
Potentiometer
Port D
(CapSense/
Miscellaneous
Port)
Reset Button
CapSense
RS-232
Interface
4.2
4.2.1
Character LCD Interface
Switches/LEDs
Prototyping Area
Functional Description
Power Supply
■
■
■
■
■
■
The power supply system on this board is versatile; input supply can be from the following sources:
9-V or 12-V wall wart supply using connector J4
9-V battery connector using connectors BH1 and BH2
USB power from communications section using connector J2
USB power from the onboard programming section using connector J1
Power from JTAG/SWD programming interface using connector J3
Power through boost convertor that uses the input test points VBAT and GND
16 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Hardware
The board power domain has five rails:
■
Vin rail: This is where the input of the onboard regulators are connected. This domain is powered through protection diodes.
■
■
5-V rail: This is the output of the 5-V regulator U2. The rail has a fixed 5-V output regardless of jumper settings. The voltage in this rail can be less than 5 V only when the board is powered by the USB. This 5-V rail powers the circuits that require fixed 5-V supply.
3.3-V rail: This is the output of the 3.3-V regulator U4. This rail remains 3.3 V regardless of jumper settings or power source changes. It powers the circuits requiring fixed 3.3-V supply such as the onboard programming section.
■
■
Vddd rail: This rail provides power to the digital supply for the PSoC device. It can be derived from either the 5-V or 3.3-V rail. The selection is made using J10 (3-pin jumper).
Vdda rail: This rail provides power to the analog supply of the PSoC device. It is the output of a low-noise regulator U1. The regulator is a variable output voltage and can be either 3.3 V or 5 V.
This is done by changing the position on J11 (3-pin jumper).
The following block diagram shows the structure of the power system on the board.
Figure 4-2. Power System Structure
USB
Programming
5 V
3.3 V
USB
Communication
Power
Vin
3.3-V Regulator
Vddd
Selection
(J10)
Vddd
9-V Battery
5-V Regulator
5 V
12-V/9-V Wall wart
5-V/3.3-V Analog
Regulator
Vdda
Selection
(J11)
Vdda
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 17
Hardware
4.2.1.1
Power Supply Jumper Settings
Figure 4-3. Jumper Settings
Two jumpers govern the power rails on the board. J10 is responsible for the selection of Vddd (digital power) and J11 selects Vdda (analog power).
The jumper settings for each power scheme are as follows.
Powering Scheme
Vdda = 5 V, Vddd = 5 V
Vdda = 3.3 V, Vddd = 3.3 V
Vdda = 5 V, Vddd = 3.3 V
Vdda = 3.3 V, Vddd = 5 V
Jumper Settings
J10 in 5-V setting and J11 in 5-V setting.
J10 in 3.3-V setting and J11 in 3.3-V setting.
J10 in 3.3-V setting and J11 in 5-V setting.
Can be achieved, but is an invalid condition because the PSoC 3 silicon performance cannot be guaranteed.
Warning
■
■
Ensure that the Vdda is always higher than Vddd–J11 should not be set to 3.3 V position when
J10 is at 5 V position.
When USB power is used, ensure a 3.3-V setting on both J10 and J11. This is because the 5-V rail of the USB power is not accurate and is not recommended.
4.2.1.2
Grounding Scheme
The board design considers analog designs as major target applications. Therefore, the grounding scheme in the board is unique to ensure precision analog performance.
The board has three types of ground:
■
■
GND - This is the universal ground where all the regulators are referred. Both Vssd and Vssa connect to this ground through a star connection.
Vssd - This is the digital ground and covers the digital circuitry on the board, such as RS-232 and
LCD.
■ Vssa - This is the analog ground and covers the grounding for analog circuitry present on the board, such as the reference block.
When creating custom circuitry in the prototyping area provided on the board, remember to use the
Vssa for the sensitive analog circuits and Vssd for the digital ones.
Port E on the board is the designated analog expansion connector. This connector brings out ports 0, 3, and 4, which are the best performing analog ports on PSoC 3 and PSoC 5 devices. Port E has two types of grounds. One is the analog ground (GND_A in the silkscreen, Vssa in the
18 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Hardware schematic), which connects directly to the analog ground on the board. The other ground, known as
GND, is used for the digital and high-current circuitry on the expansion board. This differentiation on the connector grounds helps the expansion board designer to separate the analog and digital ground on any high-precision analog boards being designed for port E.
4.2.1.3
Low-Power Functionality
The kit also facilitates application development, which requires low power consumption. Low-power functions require a power measurement capability, also available in this kit.
The analog supply is connected to the device through the 0-
resistor (R23). By removing this resistor and connecting an ammeter in series using the test points, Vdda_p and Vdda, you can measure the analog power used by the system.
The digital supply can be monitored by removing the connection on jumper J10 and connecting an ammeter in place of the short. This allows to measure the digital power used by the system.
The board provides the ability to measure analog and digital power separately. To measure power at a single point, rather than at analog and digital separately, remove resistor R23 to disconnect the analog regulator from powering the Vdda and short Vdda and Vddd through R30. The net power can now be measured at jumper J10 similar to the digital power measurement. To switch repeatedly between R23 and R30, moving around the 0-
resistors can be discomforting. Hence, a J38
(unpopulated) is provided to populate a male 3-pin header and have a shorting jumper in the place of
R23/R30.
■
■
While measuring device power, make the following changes in the board to avoid leakage through other components that are connected to the device power rails.
■
Disconnect the RS-232 power by disconnecting R58. An additional jumper capability is available as J37 if you populate it with a 2-pin male header.
Disconnect the potentiometer by disconnecting J30.
Ground the boost pins if boost operation is not used by populating R1, R28, and R29. Also, make sure R25 and R31 are not populated.
4.2.2
Programming Interface
This kit allows programming in two modes:
■
Using the onboard programming interface
■
Using the JTAG/SWD programming interface with a MiniProg3
4.2.2.1
Onboard Programming Interface
The onboard programmer interfaces with your PC through a USB connector, as shown in Figure 4-4 .
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 19
Hardware
Figure 4-4. Onboard Programming Interface
When the USB programming is plugged into the PC, it enumerates as DVKProg and you can use the normal programming interface from PSoC Creator to program this board through the onboard programmer.
A 0-
resistor R9 is provided on the board to disconnect power to the onboard programmer.
4.2.2.2
JTAG/SWD Programming
Apart from the onboard programming interface, the board also provides the option of using the
MiniProg3. This interface is much faster than the onboard program interface. The JTAG/SWD programming is done through the 10-pin connector, J3.
20 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Figure 4-5. JTAG/SWD Programming
Hardware
4.2.3
The JTAG/SWD programming using J3 requires the MiniProg3 programmer, which can be purchased from http://www.cypress.com/go/CY8CKIT-002 .
USB Communication
The board has a USB communications interface that uses the connector, as shown in Figure 4-6
.
The USB connector connects to the D+ and D– lines on the PSoC to enable development of USB applications using the board. This USB interface can also supply power to the board, as discussed in
.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 21
Hardware
Figure 4-6. USB Interface
4.2.4
Boost Convertor
The PSoC 3 device has the unique capability of working from a voltage supply as low as 0.5 V. This is possible using the boost convertor. The boost convertor uses an external inductor and a diode.
These components are prepopulated on the board.
shows the boost convertor.
■
■
To enable the boost convertor functionality, make the following hardware changes on the board:
Populate resistors R25, R27, R29, and R31
Ensure that R1 and R28 are not populated
After making these changes, you can configure the project to make a boost convertor-based design.
The input power supply to the boost convertor must be provided through the test points marked Vbat and GND.
22 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Hardware
Figure 4-7. Boost Converter
4.2.5
4.2.6
32-kHz and 24-MHz Crystal
PSoC 3 has an on-chip real time clock (RTC), which can function in sleep. This requires an external
32-kHz crystal, which is provided on the board to facilitate RTC-based designs. The PSoC 3 also has an external MHz crystal option in applications where the IMO tolerance is not satisfactory. In these applications, the board has a 24-MHz crystal to provide an accurate main oscillator.
Protection Circuit
A reverse-voltage and over-voltage protection circuit is added to the expansion port on the 5-V and
3.3-V lines.
The protection circuit consists of two P-channel MOSFET on the power line, allowing the current to flow from input to output depending on the voltages applied at the external board connector.
are protection circuits placed between EBK and the onboard components on the 5-V and 3.3-V lines.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 23
Hardware
Figure 4-8. Schematic for Protection Circuit on 5-V Power Line
Figure 4-9. Schematic for Protection Circuit on 3.3-V Power Line
4.2.6.1
Functional Description
The protection circuit will protect from a maximum over-voltage or reverse-voltage of 12 V. The cutoff voltage on the 5-V line is 5.7 V and on the 3.3-V line is 3.6 V. This means, if you apply more than this voltage level from the external board connector side, the p-MOS Q5 will turn off, thus protecting
PSoC and other onboard components. The current consumption of these protection circuits is less than 6 mA.
When voltage from the external connector is between 1.8 V and 3.3 V, the p-MOS Q4 conducts.
Because the voltage across R16 is less than the threshold voltage (Vth) of p-MOS Q6, it will turn off and the p-MOS Q5 conducts, allowing voltage supply to the DVK.
When the external power supply exceeds 3.3 V, the p-MOS Q5 starts conducting. This eventually turns off p-MOS Q6 at 3.6 V, protecting the DVK from over-voltage.
When a reverse voltage is applied across the protection circuit from the external connector side, Q4
P-MOS will turn off, thus protecting the components on the board from reverse voltage.
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Hardware
If you are using the regulator power supply from the board to power the external modules, both the
P-MOS Q4 and Q5 will always be in the On state, allowing the flow of current with a maximum of
22 mV drop across the circuit when the current consumed by the external module is 150 mA.
Note The working of protection circuit on the 3.3-V and 5-V lines is as described. For the purpose of
explanation, the annotation of 3.3-V protection circuitry ( Figure 4-9 ) is used.
4.2.7
PSoC 3 Development Kit Expansion Ports
The PSoC 3 Development Kit has two expansion ports, port D and port E, each with their own unique features.
4.2.7.1
Port D
This is the miscellaneous port designed to handle CapSense-based application boards and digital application boards. The signal routing to this port adheres to the stringent requirements needed to provide good performance CapSense. This port can also be used for other functions and expansion board kits (EBKs).
This port is not designed for precision analog performance. The pins on the port are functionally compatible to port B of the PSoC Development Kit. Any project made to function on port B of the
PSoC Development Kit can be easily ported over to port D on this board. A caveat to this is that there is no opamp available on this port; therefore, opamp-based designs are not recommended for use on this port.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 25
Hardware
The following figure shows the pin mapping for the port.
Figure 4-10. Port D
26 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Hardware
4.2.7.2
Port E
This is the analog port on the kit and has special layout considerations. It also brings out all analog resources such as dedicated opamps to a single connect. Therefore, this port is ideal for precision analog design development. This port is functionally compatible to port A of the PSoC Development
Kit and it is easy to port an application developed on port A.
The port has two types of grounds, CGND1 and CGND2. The two grounds are connected to the
GND on the board, but are provided for expansion boards designed for analog performance. The expansion boards have an analog and digital ground. The two grounds on this port help to keep it distinct even on this board until it reaches the GND plane.
Figure 4-11. Port E
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 27
Hardware
4.2.8
RS-232 Interface
The board has an RS-232 transceiver for designs using RS-232 (UART). The RS-232 section power can be disconnected through a single resistor R58. This is useful for low-power designs.
Figure 4-12. RS-232 Interface
4.2.9
Prototyping Area
The prototyping area on the board has two complete ports of the device for simple custom circuit development. The ports in the area are port 0 and port 3, which bring out the four dedicated opamp pins on the device. Therefore, these ports can be used with the prototyping area to create simple yet elegant analog designs. It also brings SIOs such as port 12[4], port 12[5], port 12[6], and port 12[7] and GPIOs such as port P6[0] and port P6[6]. Power and ground connections are available close to the prototyping space for convenience.
The area also has four LEDs and two switches for applications development. The two switches on the board are hard-wired to port 15[5] and port 6[1]. Two LEDs out of the four are hard-wired to port
6[2] and port 6[3] and the other two are brought out on pads closer to the prototyping area.
28 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Hardware
Figure 4-13. Prototyping Area
This area also comprises of a potentiometer to be used for analog system development work. The potentiometer connects from Vdda, which is a noise-free supply and is hence capable of being used for low-noise analog applications. The potentiometer output is available on P6[5] and VR on header
P6 in the prototyping area.
4.2.10
Character LCD
The kit has a character LCD module, which goes into the character LCD header, P8. The LCD runs on a 3.3-V supply and can function regardless of the voltage on which PSoC is powered. A 0-
resistor setting is available on the LCD section (R71/72), making it possible to convert it to a 3.3-V
LCD.
CAUTION When the resistor is shifted to support a 5-V LCD module, plugging in a 3.3-V LCD module into the board can damage the LCD module.
Figure 4-14. Pin 1 Indication
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 29
Hardware
Figure 4-15. LCD Connected on P8 Connector
4.2.11
CapSense Sensors
The board layout considers the special requirements for CapSense. It has two CapSense buttons and a five-element CapSense slider. The CapSense buttons are connected to pins P5[6] and P5[5].
The slider elements are connected to pins P5[0:4].
The Cmod (modulation capacitor) is connected to pin P6[4] and an optional Rb (bleeder resistor) is available on P15[4].
Figure 4-16. CapSense Sensors
30 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
5.
Code Examples
5.1
Introduction
To access code examples described in this section, open the PSoC Creator Start Page. For additional code examples, visit http://www.cypress.com
.
Figure 5-1. PSoC Creator Start Page
5.1.1
Programming the Code Examples
Follow these steps to open and program code examples:
1. In the PSoC Creator start page, go to Examples and Kits > Kits > CY8CKIT-030 3.0 and click on a code example.
2. Create a folder in the desired location and click OK.
3. The project opens in PSoC Creator and is saved to that folder.
4. Build the code example to generate the hex file.
5. To program, connect the board to a computer using the USB cable connected to port J1, as described in
Onboard Programming Interface on page 19 . The board is detected as DVKProg.
6. Click Debug > Program.
7. The programming window opens up. If the silicon is not yet acquired, select the DVKProg and click on the Port Acquire button.
8. After the silicon is acquired, it is shown in a tree structure below the DVKProg. Click Connect.
9. Click OK to exit the window and start programming.
10.Click the Program icon to program the board.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 31
Code Examples
5.2
5.2.1
5.2.2
5.2.3
VoltageDisplay
Project Description
This example code measures a simple analog voltage controlled by the potentiometer. The code uses the internal Delta-Sigma ADC configured for a 20-bit operation; the ADC range is 0 to Vdda.
The voltage measurement resolution is in microvolts. The results are displayed on the character
LCD module.
Note The PSoC 3 Development Kit is factory-programmed with the Voltage Display code example.
Hardware Connections
The example requires the character LCD on P8. Because it uses the potentiometer, the jumper
POT_PWR (J30) should be in place. This connects the potentiometer to the Vdda.
DelSig ADC Configuration
To view or configure the DelSig ADC component, double-click the component in the TopDe-
sign.cysch
file.
Figure 5-2. Delta-Sigma ADC Configuration
32
■
■
The DelSig ADC is configured as follows:
Continuous mode of operation is selected because the ADC scans only one channel.
Conversion rate is set to 187 samples/sec, which is the maximum sample rate possible at 20-bit resolution.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Code Examples
5.2.4
■
Range is set to Vssa to Vdda in single-ended mode because the potentiometer output is a singleended signal that can go from 0 to Vdda. Therefore, at 20-bit resolution, the ADC will resolve in steps of Vdda/2
20
.
Verify Output
Build and program the code example, as explained in
5.1.1 Programming the Code Examples , and
reset the device. The LCD shows the voltage reading corresponding to the voltage on the potentiometer.
demonstrates the functionality. When you turn the potentiometer, the voltage value changes. You can also verify the voltage on the potentiometer using a precision multimeter.
Note The potentiometer connects to a differential ADC, which works in single-ended mode. This means the ADC input is measured against internal Vssa. Any offset in the measurement can be positive or negative. This can result in a small offset voltage even when the potentiometer is zero.
Figure 5-3. Voltage Display
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 33
Code Examples
5.3
5.3.1
5.3.2
5.3.3
IntensityLED
Project Description
This example code uses a pulse-width modulator (PWM) to illuminate an LED. When the pulse width of the PWM varies, the LED brightness changes. By continuously varying the pulse width of the
PWM, the example code makes an LED go from low brightness to a high brightness and back.
Hardware Connections
No hardware connections are required for this project, because all the connections are hard-wired to specific pins on the board.
Verify Output
When the example code is built and programmed into the device, reset the device by pressing the
Reset button or power cycling the board.
The project output is LED3 glowing with a brightness control that changes with time (see
Note If the CY8CKIT-030 is programmed with any other code example involving LCD display before programming the IntensityLED.hex file, the LCD continues to display the output of the previous project because the LCD component is not used in the IntensityLED project. The LCD display is cleared by power cycling the board.
Figure 5-4. Verify Output - Code Example
34 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Code Examples
5.4
5.4.1
5.4.2
5.4.3
LowPowerDemo
Project Description
This code example demonstrates the low-power functionality of PSoC 3. The project implements an
RTC based code, which goes to sleep and wakes up on the basis of switch inputs.
The RTC uses an accurate 32-kHz clock generated using the external crystal provided on the board.
When there is a key press, the device is put to sleep while the RTC is kept active.
Hardware Connections
The project requires a 3.3-V LCD to view the time display. No extra connections are required for project functionality. To make low-power measurements using this project, implement the changes proposed in
Low-Power Functionality on page 19 .
Verify Output
In normal operation, the project displays the time starting from 00:00:00 and LED3 is in On state.
When you press the SW2 button, the device is put to sleep and LED3 is in Off state. If an ammeter is connected to measure the system current (see
Low-Power Functionality on page 19
for details), a system current of less than 2 µA is displayed.
The device wakes up when SW2 is pressed again and displays the time on the LCD. The following figures show the output display.
Figure 5-5. PSoC 3 in Active Mode
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 35
Code Examples
Figure 5-6. PSoC 3 in Sleep Mode
5.5
5.5.1
5.5.2
5.5.3
CapSense Example
Project Description
This code example provides a platform to build CapSense-based projects using PSoC 3. The example uses two CapSense buttons and one five-element slider provided on the board. Each capacitive sensor on the board is scanned using the Cypress CSD algorithm. The buttons are pretuned in the example code to take care of factors such as board parasitic.
Hardware Connections
This project uses the LCD for display; therefore, ensure that it is plugged into the port. No specific hardware connections are required for this project because all connections are hard-wired on the board.
Verify Output
Build and program the code example, and reset the device. The LCD displays the status of the two buttons as On/Off. The LCD also shows the slider touch position as a percentage. When you touch either of the buttons, the corresponding button's state changes on the LCD. When you touch the slider, the corresponding finger position is displayed as a percentage on the LCD.
36 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Figure 5-7. CapSense Slider
Code Examples
Figure 5-8. CapSense Button
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 37
Code Examples
5.6
5.6.1
5.6.2
5.6.3
ADC_DAC Example
Project Description
This project demonstrates sine wave generation by using an 8-bit DAC and DMA. The sine wave period is based on the current value of the ADC value of the potentiometer.
The firmware reads the voltage output by the board potentiometer and displays the raw counts on the board character LCD display. An 8-bit DAC outputs a table generated sine wave to an LED using
DMA at a frequency proportional to the ADC count.
Hardware Connections
For this example, the character LCD must be installed on P8. The example uses the potentiometer; therefore, the jumper POT_PWR (J30) should also be in place. This jumper connects the potentiometer to the Vdda.
Verify Output
Build, program the device, and press the Reset button on the PSoC 3 Development Kit to see the
ADC output displayed on the LCD. LED4 is an AC signal output whose period is based on the ADC.
Turning the potentiometer results in LCD value change. This also results in change in the period of the sine wave fed into LED4, which can also be observed.
Figure 5-9. ADC Output
38 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
A.
Appendix
A.1
Schematics
VDDD
VDDD
VSSD
1
1
NO LOAD
VBUS2
VSSD
VSSB
P15[4]
Rbleed
VSSD
TP5
NO LOAD
NO LOAD
P2[5]
P2[6]
P2[7]
P12[4]
P12[5]
P6[4]
P6[5]
P6[6]
P6[7]
Ind
Vboost
VBAT
/XRES
P5[0]
P5[1]
P5[2]
P5[3]
SWDIO
SWDCK
P1[2]
SWO
TDI
P1[5]
16
17
18
19
20
21
22
23
24
25
9
10
11
7
8
1
2
3
4
5
6
12
13
14
15
P5_0
P5_1
P5_2
P5_3
P1_0
P1_1
P1_2
P1_3
P1_4
P1_5
P2_5
P2_6
P2_7
P12_4 I2C0_SCL, SIO
P12_5 I2C0_SDA, SIO
P6_4
P6_5
P6_6
P6_7
VSSb
Ind
Vboost
Vbat
VSSd
XRES
1
1
NO LOAD
VSSD
VDDD
VSSD
VDDD
VCCd
VCCd
VDDD VDDA
VSSD
NO LOAD NO LOAD
1
1
VDDio0
P0_3
P0_2
P0_1
P0_0
P4_1
P4_0
SIO_P12_3
SIO_P12_2
VSSd
VDDa
VSSa
VCCa
NC8
NC7
NC6
NC5
NC4
NC3
P15_3
P15_2
SIO, I2C1_SDA P12_1
SIO, I2C1_SCL P12_0
P3_7
P3_6
60
59
58
57
56
55
54
53
52
51
69
68
67
66
65
75
74
73
72
71
70
64
63
62
61
NO LOAD
P0[3]
P0[2]
P0[1]
P0[0]
P4[1]
P4[0]
P12[3]
P12[2]
P12[1]
P12[0]
P3[7]
P3[6]
VDDA
VDDA
VSSA
VCCa
VSSA
1 2
VSSD
VSSD
VSSA
1
1
NO LOAD
VSSA
VDDA
VSSA
VSSD
VSSA
PSoC 3 Section
VSSA
Note:
Place De-Caps near to the Chip
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 39
40
PLACE ONE CAP PER EACH VCC ON U5.
VIN V5.0
3V3_FX12P
GND
PLACE C11 AND C16 CLOSE
CLOSE TO U5-3 AND U5-7.
V3.3
3 1
GND
VBUS
DM
DP
ID
GND
1
2
3
4
5
GND
VBUS1
D+
D-
GND
1
0402 0402
2
8
VCC
GND
1
NO LOAD
1
3V3_FX12P
SCL
GND
SDA
6
4
5
GND
3V3_FX12P
1
TP2
42
9
8
3
7
AVCC1
AVCC2
RESET#
DMINUS
DPLUS
13
54
44
29
30
31
1
2
IFCLK
CLKOUT
WAKEUP#
CTL0/FLAGA
CTL1/FLAGB
CTL2/FLAGC
RDY0/SLRD
RDY1/SLWR
15
16
SCL
SDA
FX2LP Programmer
GND
PA0/nINT0
PA1/nINT1
PA2/SLOE
PA3/WU2
PA4/FIFOADR0
PA5/FIFOADR1
PA6/PKTEND
PA7/FLAGD
PB0/FD0
PB1/FD1
PB2/FD2
PB3/FD3
PB4/FD4
PB5/FD5
PB6/FD6
PB7/FD7
PD0/FD8
PD1/FD9
PD2/FD10
PD3/FD11
PD4/FD12
PD5/FD13
PD6/FD14
PD7/FD15
18
19
20
21
22
23
24
25
45
46
47
48
49
50
51
52
33
34
35
36
37
38
39
40
/XRES
SWDIO
SWDCK
SWO
1
GND
FIRMWARE UPDATE
REQUIRED FOR
USB BACKVOLTAGE
COMPLIANCE.
GND
VBUS1
VDDD
1
3
5
7
9
8
10
2
4
6
SWDIO
SWDCK
SWO
TDI
/XRES
SWD/SWV/JTAG
VSSD
VSSD
VDDD
VSSD
5
7
1
3
9
NO LOAD
6
8
2
4
10
P2[3]
P2[4]
P2[5]
P2[6]
P2[7]
10-PIN TRACE HEADER
Prototype Area
NO LOAD
LED1 2
NO LOAD
VDDA
1
2
1
2
3 1
P6[5]
LED2 2
P6[2] 2
P6[5]
1 3
NO LOAD
Note: Load R56 for
high precision analog
VSSA
P15[5]
P6[3] 2
1A
1B
2A
2B
/XRES 1A
1B
2A
2B
NO LOAD
1 1
0805 0805
2
1 1
0805 0805
2
1 1 2
0805 0805
1 1
R59
P6[1]
0805 0805
2
1A
1B
VSSD
2A
2B
VDDD
1
1 NO LOAD
VSSD
VSSD VSSD
VDDA
6
5
4
8
7
3
2
1
NO LOAD
5
4
3
2
1
8
7
6
P6[5]
LED1
LED2
V5.0
V3.3
VSSA
VSSD
NO LOAD
1
1
1 PIN HDR
VSSD
NO LOAD
1
1
VSSA
1 PIN HDR
VDDD
VDDD
1
1 NO LOAD
VDDA
VDDA
1
NO LOAD
1
NO LOAD
NO LOAD
VDDD
VSSA VSSA
VSSD
NO LOAD
NO LOAD
VSSA
VSSD
VSSD
Note: Un-Load R48 - R54 to disconnect Capacitive Sensors
CapSense Button and Slider
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
GND
CGND1
Use Separate Track for CGND1 to GND
Expansion Connectors
P3[6]
P3[4]
P3[2]
P3[0]
1
1
NO LOAD
P0[6]
P0[4]
P0[2]
P0[0]
1
NO LOAD
1
NO LOAD
1
P4[6]
P4[4]
P4[2]
P4[0]
1
SCL
P12[2]
P12[0]
V5.0
1
1
NO LOAD
CGND1
10
12
14
16
18
2
4
6
8
20
22
24
26
28
30
32
34
36
38
40
9
11
13
15
17
1
3
5
7
19
21
23
25
27
29
31
33
35
37
39
10
12
14
16
18
2
4
6
8
20
22
24
26
28
30
32
34
36
38
40
9
11
13
15
17
1
3
5
7
19
21
23
25
27
29
31
33
35
37
39
P3[7]
P3[5]
P3[3]
P3[1]
P0[7]
P0[5]
P0[3]
P0[1]
P4[7]
P4[5]
P4[3]
P4[1]
P12[3]
P12[1] SDA
V3.3
VSSA
VIN
CGND1
Port E (Analog EBK Connector)
P1[6]
TDI
P1[2]
SWDIO
1
1
NO LOAD
P2[6]
P2[4]
P2[2]
P2[0]
1
1
NO LOAD
P5[6]
P5[4]
P5[2]
P5[0]
1
NO LOAD
1
P12[2]
SCL
P12[0]
1
NO LOAD
1
V5.0
12
14
16
18
20
22
24
8
10
2
4
6
26
28
30
32
34
36
38
40
12
14
16
18
20
22
24
2
4
6
8
10
26
28
30
32
34
36
38
40
11
13
15
17
19
21
23
1
3
5
7
9
25
27
29
31
33
35
37
39
VSSD
11
13
15
17
19
21
23
1
3
5
7
9
25
27
29
31
33
35
37
39
P1[7]
P1[5]
SWO
SWDCK
P2[7]
P2[5]
P2[3]
P2[1]
P5[7]
P5[5]
P5[3]
P5[1]
P12[3]
P12[1]
V3.3
SDA
VIN
VSSD
Port D (Misc Connector)
VDDA
2
VIN
LM4140 NO LOAD
6
VREF
3
EN
VREF
VREF 1
NO LOAD
0805 0805
2
1.0 uFd
NO LOAD
NC
5
VSSA
VSSA
NO LOAD
1
0805 0805
2 P0[3]
1
0805 0805
2 P3[2]
VSSA
Voltage Reference
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 41
42
VIN
V5.0
VBUS
DM
DP
ID
GND
1
2
3
4
5
VBUS2
DM
DP
0402 0402
1 2
C9 0.01 uFd
VSSD
USB MinB
Note: Load R72 for 5V operation,
Load R71 for 3.3V operation
V5.0
VLCD
VLCD
V3.3
R72 0E
2
NO LOAD
1
R71
2
0E
1
11
12
13
14
15
16
8
9
6
7
10
3
4
1
2
5
1
3
NO LOAD
1
VSSD
0603 0603
2 1
100 ohm
R68
0603 0603
2
P2[0]
P2[1]
P2[2]
P2[3]
P2[4]
P2[5]
P2[6]
VSSD
VLCD
VSSD
LCD Display
NO LOAD
0805 0805
VDDD
1
Note: Un-Load R58 to disconnect RS-232 Power
NO LOAD
0805 0805
2
3
7
4
8
2
5
9
6
1
4
C2+ C1+
1
RTS
RX
CTS
TX
VSSD
TX
RX
CTS
RTS
5
14
13
C2C1-
TR1OUT
RX1IN
TR1IN
RX1OUT
3
11
12
7
8
TR2OUT
RX2IN
TR2IN
RX2OUT
10
9
2
V+ V-
6
SERIAL_RX
SERIAL_TX
SERIAL_CTS
SERIAL_RTS
3
4
1
2
NO LOAD
VSSD
1
1
VSSD
0603 0603
0805 0805
0603 0603
0805 0805
SERIAL_TX
2 SERIAL_RX
2
SERIAL_CTS
SERIAL_RTS
RS 232
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
A.2
A.2.1
Board Layout
PDC-09589 Top
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 43
A.2.2
PDC-09589 Power
44 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
A.2.3
PDC-09589 Ground
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 45
A.2.4
PDC-09589 Bottom
46 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
A.3
Bill of Materials (BOM)
Item Qty Reference Value Description Manufacturer Mfr Part Number
1
2
3
4
5
6
7
8
9
10 1
11
1
1
9
2
BH1
BH2
C2,C4,C5,C13,C14,
C15,C28,C45,C46
C6,C22
BAT 9V MALE BATTERY HOLDER 9V
Male PC MT
BAT 9V
FEMALE
10 uFd 16v
22 uFd
29 C7,C10,C12,C16,C
17,C18,C19,C20,C2
1,C26,C32,C33,C34
,C35,C36,C38,C40,
C41,C43,C47,C48,
C49,C50,C51,C52,
C53, C1, C3, C23
0.1 uFd
2 C8,C9 0.01 uFd
BATTERY HOLDER 9V
Female PC MT
Keystone Electronics 594
CAP 10UF 16V TANTALUM AVX
10% 3216
TAJA106K016R
CAP CER 22UF 10V 10%
X5R 1210
CAP .1UF 16V CERAMIC
Y5V 0402
Keystone Electronics 593
Kemet
Panasonic - ECG
C1210C226K8PACT
U
ECJ-0EF1C104Z
ECJ-0EB1C103K
1 C11 2.2 uFd
CAP 10000PF 16V
CERAMIC 0402 SMD
Panasonic - ECG
CAP CER 2.2UF 6.3V 20%
X5R 0402
Panasonic - ECG ECJ-0EB0J225M
4
4
C29,C37,C42,C44 1.0 uFd
C30,C31,C25, C27 22pF
CAP CERAMIC 1.0UF 25V
X5R 0603 10%
Taiyo Yuden
CAP, CER, 22 pF, 50V, 5%, Panasonic - ECG
COG, 0603, SMD
TMK107BJ105KA-T
ECJ-0EC1H220J
6
GRM2165C1H222JA
01D
SS12-E3/61T
12
13
14
15
1
1
6
2
C39
D1,D2,D3,D4, D7,
D8
D5
D6
D9, D10, D11, D12,
D13, D14
J1,J2
2200 pFd SMD/SMT 0805 2200pF
50volts C0G 5%
Murata
SS12-E3/61T DIODE SCHOTTKY 20V 1A Vishay/General
SMA Semiconductor
LED Green LED GREEN CLEAR 0805
SMD
Chicago Miniature
ZHCS
ESD diode
USB MINI B
DIODE SCHOTTKY 40V
1.0A SOT23-3
Zetex
SUPPRESSOR ESD 5VDC
0603 SMD
Bourns Inc.
CONN USB MINI B SMT
RIGHT ANGLE
TYCO
CMD17-21VGC/TR8
ZHCS1000TA
CG0603MLC-05LE
1734035-2
16 1
17
18
19
20
1
1
1
1
D15
D16
J3
J4
J50
4.3V Zener
Diode
2.0V Zener
Diode
DIODE ZENER 4.3V 1W
SOD-106
Rohm
Semiconductor
DIODE ZENER 2V 500MW
SOD-123
Diodes Inc
Samtec 50MIL KEYED
SMD
CONN HEADER 10 PIN
50MIL KEYED SMD
POWER JACK
P-5
CONN JACK POWER
2.1mm PCB RA
CUI
Breadboard BREADBOARD 17x5x2 3M
PTZTE254.3B
BZT52C2V0-7-F
FTSH-105-01-L-DV-
K
PJ-102A
923273-I
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 47
Item Qty
21 5
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
4
1
2
1
1
4
6
1
1
2
6
2
3
1
1
1
5
8
Reference Value Description Manufacturer Mfr Part Number
TP1, J26, J27, J35,
J28
LED1,LED2,LED3,L
ED4
L1
P1,P2
P7
BLACK TEST
POINT
LED Red
TEST POINT PC MINI
.040"D Black
LED RED CLEAR 0805
SMD
22 uH INDUCTOR SHIELD PWR
22UH 7032
20x2 RECP RA CONN FMALE 40POS DL
.100 R/A GOLD
DB9 FEMALE CONN DB9 FMALE VERT
PRESSFIT SLD
Rohm
Semiconductor
TDK Corporation
Sullins Electronics
Corp.
Norcomp Inc.
P8
P3,P4,P6,P9
R3,R4
R9,R23,R24,R26,R
27,R71
R5,R6
LCD HEADER
W/O
BACKLIGHT
RECP 8X1
CONN RECEPT 16POS
.100 VERT AU
CONN RECT 8POS .100
VERT
Q1,Q2,Q3,Q4,Q5,Q
6
P-MOS, 30V
3.8A SOT23 in
Protection circuit
MOSFET P-CH 30V 3.8A
SOT23-3
R7
R16
RES 220 OHM
1/10W 1% 0603
SMD
Panasonic - ECG
RES 442 OHM
1/10W 1% 0603
SMD
Panasonic - ECG
100K
ZERO
2.2K
Tyco Electronics
3M
Diodes Inc
ERJ-3EKF2200V
ERJ-3EKF4420V
RES 100K OHM 1/16W 5%
0402 SMD
Panasonic - ECG
Panasonic-ECG RES 0.0 OHM 1/10W 5%
0805 SMD
RES 2.2K OHM 1/16W 5%
0402 SMD
Panasonic - ECG
R11,R10,R18 1K
Keystone Electronics 5001
SML-210LTT86
SLF7032T-
220MR96-2-PF
PPPC202LJBN-RC
191-009-223R001
1-534237-4
929850-01-08-RA
DMP3098L-7
ERJ-3EKF2200V
ERJ-3EKF4420V
ERJ-2GEJ104X
ERJ-6GEY0R00V
ERJ-2GEJ222X
R12
R13
R14
R15,R59,R60,R61,
R62
R17,R40,R41,R42,
R43,R44,R45, R46
3.16K
3.74K
100K
330 ohm
10K
RES 1.0K OHM 1/8W 5%
0805 SMD
RES 3.16K OHM 1/10W
.5% 0603 SMD
Panasonic - ECG
Yageo
RES 3.74K OHM 1/10W 1%
0603 SMD
Panasonic - ECG
ERJ-6GEYJ102V
RT0603DRD073K16
L
ERJ-3EKF3741V
RES 100K OHM 1/10W 1%
0603 SMD
Yageo
RES 330 OHM 1/10W 5%
0805 SMD
Panasonic - ECG
RES 10K OHM 1/16W 5%
0402 SMD
RC0603FR-07100KL
ERJ-6GEYJ331V
Stackpole Electronics
Inc
RMCF 1/16S 10K 5%
R
48 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Item Qty Reference
40 13 R35,R36,R39,R47,
R48,R49,R50,
R51,R52,R53,R54,
R64,R66
41 2 R32,R33
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
2
1
1
1
1
3
1
1
1
1
1
1
1
1
1
1
3
1
2
R63,R65
R56
R58
R68
R69
SW1,SW2,SW3
U1
U2
U3
U4
U5
U7
U8
Y1
Y2
Y3
J8,J33, TP2
R38
J10,J11
Value
ZERO
Description Manufacturer
RES ZERO OHM 1/16W 5% Panasonic - ECG
0603 SMD
Mfr Part Number
ERJ-3GEY0R00V
22E
100 ohm
POT 10K
10E
RES 22 OHM 1/16W 1%
0603 SMD
Panasonic - ECG ERJ-3EKF22R0V
RES 100 OHM 1/8W 5%
0805 SMD
POT 10K OHM 1/8W CARB CTS
VERTICAL Electrocomponents
RES 10 OHM 1/8W 5%
0805 SMD
Rohm MCR10EZHJ101
296UD103B1N
Stackpole Electronics
Inc
RMCF 1/10 10 5% R
Panasonic - ECG ERJ-3GEYJ101V 100 ohm
10K
RES 100 OHM 1/16W 5%
0603 SMD
RES 10K OHM 1/16W 5%
0603 SMD
SW
PUSHBUTTON
LT SWITCH 6MM 160GF
H=2.5MM SMD
Panasonic - ECG
Panasonic - ECG
ERJ-3GEYJ103V
EVQ-Q2P02W
LT1763CS8 IC LDO REG LOW NOISE
ADJ 8-SOIC
Linear Technology
AP1117D50G IC REG LDO 1.0A 5.0V TO-
252
Diodes Inc
LT1763CS8#PBF
AP1117D50G-13
24LC00/SN 24LC00/SN
LM1117MPX-
3.3
CY7C68013A-
56LTXC
IC EEPROM 128BIT
400KHZ 8SOIC
IC REG 3.3V 800MA LDO
SOT-223
Microchip
Technology
National
Semiconductor
IC, FX2 HIGH-SPEED USB
PERIPHERAL
CONTROLLER QFN56
Cypress
Semiconductor
LM1117IMP-3.3/
NOPB
CY7C68013A-
56LTXC
CY8C3866AXI-
040 TQFP100
PSoC3 Mixed-Signal Array Cypress
Semiconductor
MAX3232CDR IC 3-5.5V LINE DRVR/
RCVR 16-SOIC
CY8C3866AXI-040
Texas Insturments MAX3232IDR
24 MHz CER RESONATOR 24.0
MHz SMD
Murata
32.768KHz
XTAL
CRYSTAL 32.768 KHZ CYL
12.5PF CFS308
24 MHz Crystal CRYSTAL 24.000MHZ
20PF SMD
Citizen America
Corporation
ECS Inc
CSTCW24M0X53-R0
CFS308-
32.768KDZF-UB
ECS-240-20-5PX-TR
Keystone Electronics 5000 RED TEST
POINT
2.2K
TEST POINT PC MINI
.040"D RED
RES 2.2KOHM 1/16W
2700PPM 5%0603
Panasonic - ECG ERA-V27J222V
3p_jumper CONN HEADER VERT SGL
3POS GOLD
3M 961103-6404-AR
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 49
Item Qty Reference Value Description Manufacturer Mfr Part Number
61
62
63
64
65
66
67
1
1
1
1
1
1
1
J30
NA
NA
R21
R22
P5
J31, J32, J29, J34
2p_jumper CONN HEADER VERT SGL
2POS GOLD
3M
3.3V LCD
Module 16POS w/16 pin header installed
3.3V LCD Module 16POS w/
16 pin header installed
Lumex
16 pin header CONN HEADER VERT
SGL 16POS GOLD
39K RES 39.0K OHM 1/10W 1%
0603 SMD
3M
Rohm
Semiconductor
62K RES 62.0K OHM 1/10W 1%
0603 SMD
Rohm
Semiconductor
4x1 RECP
4x1 RECP
CONN RECEPT 4POS .100
VERT GOLD
3M
CONN RECEPT 4POS .100
VERT GOLD
3M
No Load Components
68 1 C24 1.0 uFd
69 11 J5,J6,J12,J14,J18,J
70 2
22,J25,TP3,TP4,J1
6,J39
J7,J36
RED
BLACK
961102-6404-AR
LCM-S01602DTR/A-
3
961116-6404-AR
MCR03EZPFX3902
MCR03EZPFX6202
929850-01-04-RA
929850-01-04-RA
CAP CERAMIC 1.0UF 25V
X5R 0603 10%
Taiyo Yuden
TEST POINT PC MINI
.040"D RED
TMK107BJ105KA-T
Keystone Electronics 5000
Keystone Electronics 5001
71
72
73
1
1
12
74 1
TP5
R67
R30,R34,R57,R72,
R25,R31,R70,R37,
R29, R73,R74,R75
R55
WHITE
10K
ZERO
10K
TEST POINT PC MINI
.040"D Black
TEST POINT PC MINI
.040"D WHITE
POT 10K OHM 1/4" SQ
CERM SL ST
RES 0.0 OHM 1/10W 5%
0805 SMD
Keystone Electronics 5002
Bourns Inc.
Panasonic-ECG
3362P-1-103LF
ERJ-6GEY0R00V
75
76
77
78
79
80
2
1
1
1
1
1
R1,R28,
U6
R8
R2
J38
J37
ZERO
LM4140
1.5K
3K
3p_jumper
2p_jumper
TRIMPOT 10K OHM 4MM
TOP ADJ SMD
Bourns Inc.
RES ZERO OHM 1/10W 5%
0603 SMD
Panasonic - ECG
3214W-1-103E
ERJ-3GEY0R00V
IC REF PREC VOLT
MICROPWR 8-SOIC
RES 1.5KOHM 1/10W
1500PPM 5%0805
National
Semiconductor
Panasonic - ECG
LM4140ACM-1.0/
NOPB
ERA-S15J152V
RES 1/10W 3K OHM 0.1%
0805
CONN HEADER VERT SGL
3POS GOLD
Stackpole Electronics
Inc
RNC 20 T9 3K 0.1%
R
3M 961103-6404-AR
CONN HEADER VERT SGL
2POS GOLD
3M 961102-6404-AR
50 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Item Qty Reference Value Description Manufacturer
81 1
82 2
J40
CSB1,CSB2
50MIL KEYED
SMD
CapSense
CONN HEADER 10 PIN
50MIL KEYED SMD
CapSense Button
83 1 CSS1 CapSense
Linear Slider 5
Seg
CapSense Slider
84 11 J9,J13,J15,J17,J19,
J20,J21,J23,J24,J4
1,J42
PADS PADS
Samtec
Cypress
Cypress
85 2 TV1,TV2 PADS PADS
Install On Bottom of PCB As Close To Corners As Possible
86 5 BUMPER CLEAR .500X.23"
SQUARE
Richco Plastic Co
Special Jumper Installation Instructions
87 1 J30 Install jumper across pins 1 and 2
88 2 J10, J11 Install jumper across pins 1 and 2
External Assembly
89 1
Rectangular Connectors
MINI JUMPER GF 13.5
CLOSE TYPE BLACK
Rectangular Connectors
MINI JUMPER GF 13.5
CLOSE TYPE BLACK
3.3V label
Kobiconn
Kobiconn
90 2
Install 3.3V label as per assembly spec
4-40 X 5 +13
Brass Spacer
Stud with Nut
Spacer and nut for RS232
Connector P7
Mfr Part Number
FTSH-105-01-L-DV-
K
RBS-3R
151-8030-E
151-8030-E
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 51
A.4
Pin Assignment Table
Port
71
72
73
Pin Pin Name
P0[0]
P0[1]
P0[2]
Port 0
Port 1
74
20
21
22
23
24
25
27
28
76
77
78
79
P0[3]
P0[4]
P0[5]
P0[6]
P0[7]
P1[0]
P1[1]
P1[2]
P1[3]
P1[4]
P1[5]
P1[6]
P1[7]
Description
Connected to pin 18 on port E
Connected to pin 17 on port E
Connected to pin 16 on port E
Connected to two points:
1. Voltage reference chip*
2. Connected to pin 15 on port E
Connected to pin 14 on port E
Connected to pin 13 on port E
Connected to pin 12 on port E
Connected to pin 11 on port E
Connected to three points:
1. Connected to pin 2 on programming header J3
2. Connected to pin 45 on U5
3. Connected to pin 8 (SWDIO) on port D
Connected to three points:
1. Connected to pin 4 on programming header
2. Connected to pin 56 on U5
3. Connected to pin 7 (SWDCK) on port D
Connected to pin 6 on port D
Connected to three points:
1. Connected to pin 6 on programming header
2. Connected to pin 47 on U5
3. Connected to pin 5 (SWO) on port D
Connected to two points:
1. Connected to pin 8 on programming header
2. Connected to pin 4 (TDI) on port D
Connected to pin 3 on port D
Connected to pin 2 on port D
Connected to pin 1 on port D
52 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
3
44
45
46
47
48
49
51
52
69
70
80
81
82
83
84
85
Port
95
Pin
Port 2
Port 3
Port 4
96
97
98
99
1
2
P3[3]
P3[4]
P3[5]
P3[6]
P3[7]
P4[0]
P4[1]
P4[2]
P4[3]
P4[4]
P4[5]
P4[6]
P4[7]
Pin Name
P2[0]
P2[1]
P2[2]
P2[3]
P2[4]
P2[5]
P2[6]
P2[7]
P3[0]
P3[1]
P3[2]
Description
Connected to two points:
1. Connected to LCD module
2. Connected to pin 18 on port D
Connected to two points:
1. Connected to LCD module
2. Connected to pin 17 on port D
Connected to two points:
1. Connected to LCD module
2. Connected to pin 16 on port D
Connected to three points:
1. Connected to pin 2 on trace header J40
2. Connected to LCD module
3. Connected to pin 15 on port D
Connected to three points:
1. Connected to pin 4 on trace header J40
2. Connected to LCD module
3. Connected to pin 14 on port D
Connected to three points:
1. Connected to pin 6 on trace header J40
2. Connected to LCD module
3. Connected to pin 13 on port D
Connected to three points:
1. Connected to pin 8 on trace header J40
2. Connected to LCD module
3. Connected to pin 12 on port D
Connected to three points:
1. Connected to pin 10 on trace header J40
2. Connected to LCD module
3. Connected to pin 11 on port D
Connected to pin 8 on port E
Connected to pin 7 on port E
Connected to two points:
1. Voltage reference chip*
2. Connected to pin 6 on port E
Connected to pin 5 on port E
Connected to pin 4 on port E
Connected to pin 3 on port E
Connected to pin 2 on port E
Connected to pin 1 on port E
Connected to pin 28 on port E
Connected to pin 27 on port E
Connected to pin 26 on port E
Connected to pin 25 on port E
Connected to pin 24 on port E
Connected to pin 23 on port E
Connected to pin 22 on port E
Connected to pin 21 on port E
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 53
54
Port 6
Port 12
Port 15
33
34
89
90
91
92
6
7
56
93
94
42
43
55
35
36
68
4
5
29
30
8
9
53
54
67
Port
16
Pin
Port 5
17
18
19
31
32
P5[7]
P6[0]
P6[1]
P6[2]
P6[3]
P6[4]
P15[0]
P15[1]
P15[2]
P15[3]
P15[4]
P15[5]
P15[6]
P15[7]
P6[6]
P6[7]
P12[0]
P12[1]
P12[2]
P12[3]
P12[4]
P12[5]
P12[6]
P12[7]
Pin Name
P5[0]
P5[1]
P5[2]
P5[3]
P5[4]
P5[5]
P5[6]
P6[5]
Description
Connected to two points:
1. Connected to CapSense slider segment
2. Connected to pin 28 on port D
Connected to two points:
1. Connected to CapSense slider segment
2. Connected to pin 27 on port D
Connected to two points:
1. Connected to CapSense slider segment
2. Connected to pin 26 on port D
Connected to two points:
1. Connected to CapSense slider segment
2. Connected to pin 25 on port D
Connected to two points:
1. Connected to CapSense slider segment
2. Connected to pin 24 on port D
Connected to two points:
1. Connected to CapSense button CSB1
2. Connected to pin 23 on port D
Connected to two points:
1. Connected to CapSense button CSB2
2. Connected to pin 22 on port D
Connected to pin 21 on port D
Connected to pin 5 on P9
Connected to SW2 push button
Connected to LED3
Connected to LED4
Connected to CapSense Modulation Capacitor CMOD
Connected to two points:
1. Connected to VR POT
2. Connected to pin 5 on P6
Connected to pin 6 on P9
Unused/No Connect
Connected to pin 34 (SCL) on port D and port E
Connected to pin 33 (SDA) on port D and port E
Connected to pin 32 on port D and port E
Connected to pin 31 on port D and port E
Connected to pin 1 on P9
Connected to pin 2 on P9
Connected to pin 3 on P9
Connected to pin 4 on P9
Connected to 24-MHz crystal
Connected to 24-MHz crystal
Connected to 32-kHz crystal
Connected to 32-kHz crystal
Connected to Rbleed resistor
Connected to SW3 push button
Connected to USB D+
Connected to USB D–
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Port
Other
Pins
Pin
50
64
10
37
88
75
26
100
14
38
66
87
39
86
65
13
12
63
15
58
59
60
11
40
41
57
61
62
Pin Name
Vbat
Vboost
VCCa
VCCd
VCCd
VDDa
VDDd
VDDd
VDDio0
VDDio1
VDDio2
VDDio3
VSSa
VSSb
VSSd
VSSd
VSSd
VSSd
XRES
Ind
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
Description
Connected to Vbat
Connected to Vboost
Connected to VCCa
Connected to VCCd
Connected to VCCd
Connected to VDDa
Connected to VDDd
Connected to VDDd
Connected to VDDio0
Connected to VDDio1
Connected to VDDio2
Connected to VDDio3
Connected to GND
Connected to GND
Connected to GND
Connected to GND
Connected to GND
Connected to GND
Connected to three points:
1. Connected to pin 10 on J3
2. Connected to SW1
3. Connected to pin 20 on U5
Connected to inductor
Unused/No Connect
Unused/No Connect
Unused/No Connect
Unused/No Connect
Unused/No Connect
Unused/No Connect
Unused/No Connect
Unused/No Connect
Note* To enable voltage reference, populate resistors R34, R37, R73, and low dropout voltage ref-
erence IC LM4140. See “Bill of Materials (BOM)” on page 47
for more details of components.
CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H 55
A.5
Using RBLEED Resistor for CapSense
An RBLEED resistor value of 2.2 K provides good SNR values for the onboard CapSense buttons and sliders. However, tuning CapSense with a fixed RBLEED value is difficult because the analog switch divider and scan resolution are the only tunable parameters.
For onboard CapSense buttons and sliders, with RBLEED of 2.2 K, the following SNR is achieved.
Button 0
Button 1
Sensor
Linear Slider, Element 0
Linear Slider, Element 1
Linear Slider, Element 2
Linear Slider, Element 3
Linear Slider, Element 4
Parameter
Analog Switch Divider
Scan Resolution
SNR
Analog Switch Divider
Scan Resolution
SNR
Analog Switch Divider
Scan Resolution
SNR (individual sensor)
Analog Switch Divider
Scan Resolution
SNR (individual sensor)
Analog Switch Divider
Scan Resolution
SNR (individual sensor)
Analog Switch Divider
Scan Resolution
SNR (individual sensor)
Analog Switch Divider
Scan Resolution
SNR (individual sensor)
If RBLEED is used for CapSense, remember the following:
■
■
■
Use RBLEED only if all IDACs in the device are used for other purposes. IDAC sourcing/sinking method is recommended because it provides better flexibility and automatic tuning feature.
Use multiple RBLEED resistors if there are different types of sensors in the design. PSoC 3 and
PSoC 5 supports up to three RBLEED resistors per channel.
Use variable resistors for RBLEED, for better tunability.
10 bits
85
2
10 bits
85
2
10 bits
85
Value
2
10 bits
74
3
10 bits
76
2
2
10 bits
85
2
10 bits
85
56 CY8CKIT-030 PSoC 3 Development Kit Guide, Doc. # 001-61038 Rev. *H
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Cypress Semiconductor
:
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Table of contents
- 5 Kit Contents
- 5 PSoC Creator
- 6 Additional Learning Resources
- 6 Beginner Resources
- 6 Engineers Looking for More
- 6 Learning from Peers
- 6 More Code Examples
- 8 Document History
- 8 Documentation Conventions
- 9 DVD Installation
- 10 Install Hardware
- 10 Install Software
- 10 Uninstall Software
- 10 Verify Kit Version
- 11 Programming PSoC 3 Device
- 15 System Block Diagram
- 16 Functional Description
- 16 Power Supply
- 18 4.2.1.1 Power Supply Jumper Settings
- 18 4.2.1.2 Grounding Scheme
- 19 4.2.1.3 Low-Power Functionality
- 19 Programming Interface
- 19 4.2.2.1 Onboard Programming Interface
- 20 4.2.2.2 JTAG/SWD Programming
- 21 USB Communication
- 22 Boost Convertor
- 23 32-kHz and 24-MHz Crystal
- 23 Protection Circuit
- 24 4.2.6.1 Functional Description
- 25 PSoC 3 Development Kit Expansion Ports
- 25 4.2.7.1 Port D
- 27 4.2.7.2 Port E
- 28 RS-232 Interface
- 28 Prototyping Area
- 29 4.2.10 Character LCD
- 30 4.2.11 CapSense Sensors
- 31 Introduction
- 31 Programming the Code Examples
- 32 VoltageDisplay
- 32 Project Description
- 32 Hardware Connections
- 32 DelSig ADC Configuration
- 33 Verify Output
- 34 IntensityLED
- 34 Project Description
- 34 Hardware Connections
- 34 Verify Output
- 35 LowPowerDemo
- 35 Project Description
- 35 Hardware Connections
- 35 Verify Output
- 36 CapSense Example
- 36 Project Description
- 36 Hardware Connections
- 36 Verify Output
- 38 ADC_DAC Example
- 38 Project Description
- 38 Hardware Connections
- 38 Verify Output
- 39 Schematics
- 43 Board Layout
- 43 A.2.1 PDC-09589 Top
- 44 A.2.2 PDC-09589 Power
- 45 A.2.3 PDC-09589 Ground
- 46 A.2.4 PDC-09589 Bottom
- 47 Bill of Materials (BOM)
- 52 Pin Assignment Table
- 56 Using RBLEED Resistor for CapSense