WL18xxMOD WiLink™ 8 Single-Band Combo Module – Wi-Fi Bluetooth ®

WL18xxMOD WiLink™ 8 Single-Band Combo Module – Wi-Fi Bluetooth ®

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WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152L – JULY 2013 – REVISED DECEMBER 2015

WL18xxMOD WiLink™ 8 Single-Band Combo Module –

Wi-Fi

®

, Bluetooth

®

, and Bluetooth Low Energy (LE)

1 Device Overview

1

1.1

Features

General

– Integrates RF, Power Amplifiers (PAs), Clock,

RF Switches, Filters, Passives, and Power

Management

– Quick Hardware Design With TI Module

Collateral and Reference Designs

– Operating Temperature: –20°C to 70°C

– Small Form Factor: 13.3 × 13.4 × 2 mm

– 100-Pin MOC Package

– FCC, IC, ETSI/CE, and TELEC Certified

Wi-Fi

– WLAN Baseband Processor and RF Transceiver

Support of IEEE Std 802.11a, 802.11b, 802.11g, and 802.11n

– 20- and 40-MHz SISO and 20-MHz 2 × 2 MIMO at 2.4 GHz for High Throughput: 80 Mbps

(TCP), 100 Mbps (UDP)

– 2.4-GHz MRC Support for Extended Range

– Fully Calibrated: Production Calibration Not

Required

– 4-Bit SDIO Host Interface Support

– Wi-Fi Direct Concurrent Operation

(Multichannel, Multirole) space

Bluetooth and Bluetooth LE (WL183xMOD

Only)

Bluetooth 4.1 Compliance and CSA2 Support

– Host Controller Interface (HCI) Transport for

Bluetooth Over UART

– Dedicated Audio Processor Support of SBC

Encoding + A2DP

– Dual-Mode Bluetooth and Bluetooth LE

– TI's Bluetooth- and Bluetooth LE-Certified Stack

Key Benefits

– Reduces Design Overhead

– Differentiated Use-Cases by Configuring WiLink

8 Simultaneously in Two Roles (STA and AP) to

Connect Directly With Other Wi-Fi Devices on

Different RF Channel (Wi-Fi Networks)

– Best-in-Class Wi-Fi With High-Performance

Audio and Video Streaming Reference

Applications With Up to 1.4X the Range Versus

One Antenna

– Different Provisioning Methods for In-Home

Devices Connectivity to Wi-Fi in One Step

– Lowest Wi-Fi Power Consumption in Connected

Idle (< 800 µA)

– Configurable Wake on WLAN Filters to Only

Wake up the System

– Wi-Fi-Bluetooth Single Antenna Coexistence

1.2

Applications

• Internet of Things (IoT)

• Multimedia

• Home Electronics

• Home Appliances and White Goods

• Industrial and Home Automation

• Smart Gateway and Metering

• Video Conferencing

• Video Camera and Security

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications, intellectual property matters and other important disclaimers. PRODUCTION DATA.

WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152L – JULY 2013 – REVISED DECEMBER 2015

www.ti.com

1.3

Description

The certified WiLink 8 module from TI offers high throughput and extended range along with Wi-Fi and

Bluetooth coexistence (WL1835MOD only) in a power-optimized design. The WL18x5MOD device is a

2.4-GHz module, two antenna solution. The device is FCC, IC, ETSI/CE, and TELEC certified for AP and client. TI offers drivers for high-level operating systems such as Linux

® and Android™. Additional drivers, such as WinCE and RTOS, which includes QNX, Nucleus, ThreadX, and FreeRTOS, are supported through third parties.

WL1801MOD

WL1805MOD

ORDER NUMBER

WL1831MOD

WL1835MOD

Device Information

(1)

PACKAGE

MOC (100)

MOC (100)

MOC (100)

MOC (100)

(1) For more information, see

Section 9 , Mechanical Packaging and Orderable Information.

space

1.4

Functional Block Diagram

Figure 1-1

shows a functional block diagram of the WL1835MOD variant.

BODY SIZE

13.3 mm × 13.4 mm × 2 mm

13.3 mm × 13.4 mm × 2 mm

13.3 mm × 13.4 mm × 2 mm

13.3 mm × 13.4 mm × 2 mm

RF_ANT2

ZigBee

COEX

Interface

BT_UART

BG1

F

WRF2

WLAN_SDIO

BT_EN

WLAN_EN

WRF1

BG2

2.4-GHz

SPDT

BT

32 kHz

BTRF

26M XTAL

VIO

VBAT

PM

NOTE: Dashed lines indicate optional configurations and are not applied by default.

Figure 1-1. WL1835MOD Functional Block Diagram

space

F

RF_ANT1

2

Device Overview

Copyright © 2013–2015, Texas Instruments Incorporated

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WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152L – JULY 2013 – REVISED DECEMBER 2015

Table of Contents

1 Device Overview

.........................................

1

1.1

Features

..............................................

1

1.2

Applications

...........................................

1

1.3

Description

............................................

2

1.4

Functional Block Diagram

............................

2

2 Revision History

.........................................

3

3 Device Comparison

.....................................

5

4 Terminal Configuration and Functions

..............

6

4.1

Pin Description

5 Specifications

.......................................

8

..........................................

11

5.1

Absolute Maximum Ratings

.........................

11

5.2

ESD Ratings

........................................

11

5.3

Power-On Hours (POH)

.............................

11

5.4

Recommended Operating Conditions

...............

12

5.5

External Digital Slow Clock Requirements

..........

12

5.6

Thermal Characteristics for MOC 100-Pin Package

12

5.7

WLAN Performance: 2.4-GHz Receiver

Characteristics

.......................................

13

5.8

WLAN Performance: 2.4-GHz Transmitter Power

5.9

WLAN Performance: Currents

..

14

......................

15

5.10

Bluetooth Performance: BR, EDR Receiver

Characteristics—In-Band Signals

...................

15

5.11

Bluetooth Performance: Transmitter, BR

...........

16

5.12

Bluetooth Performance: Transmitter, EDR

..........

16

5.13

Bluetooth Performance: Modulation, BR

............

17

5.14

Bluetooth Performance: Modulation, EDR

..........

17

5.15

Bluetooth LE Performance: Receiver

Characteristics – In-Band Signals

...................

17

5.16

Bluetooth LE Performance: Transmitter

Characteristics

.......................................

18

5.17

Bluetooth LE Performance: Modulation

Characteristics

.......................................

18

5.18

Bluetooth BR and EDR Dynamic Currents

..........

18

5.19

Bluetooth LE Currents

..............................

19

5.20

Timing and Switching Characteristics

...............

19

6 Detailed Description

...................................

28

6.1

WLAN Features

.....................................

29

6.2

Bluetooth Features

..................................

29

6.3

Bluetooth LE Features

..............................

29

6.4

WiLink 8 Module Markings

..........................

30

6.5

Test Grades

.........................................

30

7 Applications and Implementation

...................

31

7.1

Application Information

..............................

31

8 Device and Documentation Support

8.1

Device Support

...............

37

......................................

37

8.2

Related Links

........................................

37

8.3

Community Resources

..............................

37

8.4

Trademarks

..........................................

37

8.5

Electrostatic Discharge Caution

.....................

38

8.6

Glossary

.............................................

38

9 Mechanical Packaging and Orderable

Information

..............................................

39

9.1

TI Module Mechanical Outline

9.2

Tape and Reel Information

......................

39

..........................

40

9.3

Packaging Information

..............................

42

2 Revision History

NOTE: Page numbers for previous revisions may differ from page numbers in the current version.

Changes from Revision K (November 2014) to Revision L Page

• Changed Features section

..........................................................................................................

1

• Changed

Section 1.3

, Description

..................................................................................................

2

• Added support at 802.11 g/n to note 1 in

Table 3-1

.............................................................................

5

• Changed to reflect correct corner pin marking in

Figure 4-1

and

Figure 4-2

.................................................

6

• Changed pin 64 to GND in

Table 4-1

.............................................................................................

8

• Changed description for pin 14 (WL_IRQ_1V8) in

Table 4-1

..................................................................

8

• Changed description of WL_IRQ_1V8 in

Table 4-1

..............................................................................

9

• Added storage temperature to

Section 5.1

, Absolute Maximum Ratings

....................................................

11

• Added

Section 5.2

, ESD Ratings (removed Handling Ratings table)

........................................................

11

• Added TYP values for VBAT, VIO in

Section 5.4

, Recommended Operating Conditions

.................................

12

• Added VIO parameter in

Section 5.4

, Recommended Operating Conditions

• Changed

Section 5.6

, Thermal Characteristics

...............................................

12

.................................................................................

12

• Changed parameter heading from "2G4_ANT2_W + 2G4_ANT1_WB Pins" in

Section 5.8

, WLAN Performance:

2.4-GHz Transmitter Power

........................................................................................................

14

• Added note on maximum transmitter power degradation and changed note on regulatory constraints in

Section 5.8

, WLAN Performance: 2.4-GHz Transmitter Power

...............................................................

14

• Added note 1 in

Section 5.10

, Bluetooth Performance: BR, EDR Receiver Characteristics—In-Band Signals

........

15

• Added note 1 in

Section 5.11

, Bluetooth Transmitter, BR

.....................................................................

16

• Changed note 3 from "Assumes VBAT ADC measurement accuracy of 5%" in

Section 5.11

, Bluetooth

Transmitter, BR

......................................................................................................................

16

• Changed BR RF output power from 12.7 dBm typical in

Section 5.11

, Bluetooth Performance: Transmitter, BR

...

16

Revision History

3

Copyright © 2013–2015, Texas Instruments Incorporated

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WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152L – JULY 2013 – REVISED DECEMBER 2015

www.ti.com

• Added note 1 in

Section 5.11

, Bluetooth Transmitter, BR

.....................................................................

16

• Changed note 3 from "Assumes VBAT ADC measurement accuracy of 5%" in

Section 5.12

, Bluetooth

Transmitter, EDR

....................................................................................................................

16

• Added note 1 in

Section 5.13

, Bluetooth Performance: Modulation, BR

.....................................................

17

• Added note 1 in

Section 5.14

, Bluetooth Performance: Modulation, EDR

...................................................

17

• Added note 1 in

Section 5.15

, Bluetooth LE Performance: Receiver Characteristics – In-Band Signals

• Changed note 3 from "Assumes VBAT ADC measurement accuracy of 5%"

...............

17

..............................................

18

• Changed Bluetooth LE RF transmitter output power from 10.0 dBm typical (VBAT ≥ 3V) and 7.2 dBM (VBAT ≤

3V) in

Section 5.16

, Bluetooth LE Performance: Transmitter Characteristics

...............................................

18

• Added note 1 through note 3 in

Section 5.16

, Bluetooth LE Performance: Transmitter Characteristics

................

18

• Deleted note: "To reduce the maximum BLE power, use a VS command. The optional extra margin is offered to compensate for design losses, such as trace and filter losses, and to achieve the maximum allowed output power at system level." in

Section 5.16

, Bluetooth LE Performance: Transmitter Characteristics

• Added note 1 in

Section 5.17

, Bluetooth LE Performance: Modulation Characteristics

......................

18

...................................

18

• Changed BR power from 12.7 dBm in

Section 5.18

, Bluetooth-BLE Dynamic Currents

.................................

18

• Added power supply current of VIO 60 µA for WLAN and Bluetooth sleep modes in

Table 6-3

.........................

29

• Changed from Bluetooth 4.0 in

Section 6.2

, Bluetooth

........................................................................

29

• Changed reference design from WL1835MODB in

Section 7.1.1

, Typical Application – WL1835MODGB

.............

31

• Changed

Figure 7-1

.................................................................................................................

31

• Changed BOM in

Table 7-1 Section 7.1.1

, Typical Application – WL1835MODGB

........................................

32

• Added note in

Section 7.1.3

, RF Trace and Antenna Layout Recommendations

• Changed board name from TMDXWL1835MODCOM8B in

Figure 7-2

.........................................

33

......................................................

33

• Changed note in

Section 7.1.6.2

, SMT Recommendations.

...................................................................

36

• Changed corner marking from pin 1 in

Figure 9-1

..............................................................................

39

• Added module weight in

Section 9.1

, Mechanical Packaging and Orderable Information

................................

39

• Added

Section 9.2

, Tape and Reel Information

................................................................................

40

4

Revision History

Copyright © 2013–2015, Texas Instruments Incorporated

Submit Documentation Feedback

Product Folder Links:

WL1801MOD WL1805MOD WL1831MOD WL1835MOD

www.ti.com

WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152L – JULY 2013 – REVISED DECEMBER 2015

3 Device Comparison

The TI WiLink 8 module offers four footprint-compatible 2.4-GHz variants providing stand-alone Wi-Fi and

Bluetooth combo connectivity.

Table 3-1

compares the features of the module variants.

Table 3-1. TI WiLink 8 Module Variants

DEVICE

WL1835MOD

WL1831MOD

WL1805MOD

WL1801MOD

WLAN 2.4-GHZ SISO

(1)

WLAN 2.4-GHZ MIMO

(1)

WLAN 2.4-GHZ MRC

(1)

BLUETOOTH

(1) SISO: single input, single output; MIMO: multiple input, multiple output; MRC: maximum ratio combining, supported at 802.11 g/n.

Copyright © 2013–2015, Texas Instruments Incorporated

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Device Comparison

5

WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152L – JULY 2013 – REVISED DECEMBER 2015

4 Terminal Configuration and Functions

Figure 4-1

shows the pin assignments for the 100-pin MOC package.

www.ti.com

PIN 32 - RF_ANT1

PIN 31 - GND

PIN 30 - GND

PIN 29 - GND

PIN 28 - GND

PIN 27 - GPIO1

PIN 26 - GPIO2

PIN 25 - GPIO4

PIN 24 - GND

PIN 23 - GND

PIN 22 - RESERVED2

PIN 21 - RESERVED1

PIN 20 - GND

PIN 19 - GND

PIN 18 - RF_ANT2

PIN 17 - GND

GND

GND GND

GND GND

GND

GND

GND GND

GND GND GND

GND GND GND

GND

GND

GND

GND GND

GND

GND GND GND

GND GND

GND

GND GND GND

GND GND GND

GND

GND

GND

PIN 49 - GND

PIN 50 - BT_HCI_RTS

PIN 51 - BT_HCI_CTS

PIN 52 - BT_HCI_TX

PIN 53 - BT_HCI_RX

PIN 54 - GND

PIN 55 - GND

PIN 56 - BT_AUD_IN

PIN 57 - BT_AUD_OUT

PIN 58 - BT_AUD_FSYNC

PIN 59 - GND

PIN 60 - BT_AUD_CLK

PIN 61 - GND

PIN 62 - RESERVED3

PIN 63 - GND

PIN 64 - RESERVED

Pin 2 Indicator

Figure 4-1. 100-Pin MOC Package (Bottom View)

6

Terminal Configuration and Functions

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WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152L – JULY 2013 – REVISED DECEMBER 2015

Figure 4-2

shows the recommended PCB pattern of the 100-pin MOC package.

Recommended PCB Pattern

12.05

9.80

7.70

Surround each pad with a 0.03-mm-wide solder mask.

2.10

1.40

11.95

9.80

7.70

1.40

1.00

1.00

1.00

1.00

A

0.03 All around

0.40

0.75

0.03 All around

0.03 All around

NOTE: 1. Module size: 13.4 mm × 13.3 mm

NOTE: 2. Signal pad size: 0.75 mm × 0.40 mm

NOTE: 3. 4 x corner ground size: 0.75 mm × 0.75 mm

NOTE: 4. Central ground pin size: 1.00 mm × 1.00 mm

NOTE: 5. Pitch: 0.7 mm

Figure 4-2. Recommended PCB Pattern of 100-Pin MOC Package

Figure 4-3

shows the recommended stencil outline of the 100-pin MOC package.

0.75

0.75

Recommended Stencil

12.05

9.80

7.70

2.10

0.7

0.70

11.95

9.80

7.70

2.10

A

0.525

0.33

R0.165

0.75

Figure 4-3. Recommended Stencil Outline of 100-Pin MOC Package

0.525

Copyright © 2013–2015, Texas Instruments Incorporated

Terminal Configuration and Functions

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7

WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152L – JULY 2013 – REVISED DECEMBER 2015

www.ti.com

4.1

Pin Description

Table 4-1

describes the module pins.

Table 4-1. Pin Description

PIN NAME PIN TYPE/ SHUTDOWN AFTER

DIR STATE POWER

UP

(1)

Clocks and Reset Signals

WL_SDIO_CLK 8 I Hi-Z Hi-Z

VOLTAGE

LEVEL

1.8 V

CONNECTIVITY (2)

1801 1805 1831 1835

v v v v

EXT_32K

WLAN_EN

BT_EN

36

40

41

ANA

I

I PD

PD

PD

PD

1.8 V

1.8 V v v x v v x v v v v v v

DESCRIPTION

WLAN SDIO clock.

Must be driven by the host.

Input sleep clock:

32.768 kHz

Mode setting: high = enable

Mode setting: high = enable

Power-Management Signals

VIO_IN 38 POW PD PD 1.8 V v v v v

VBAT_IN

VBAT_IN

46

47

POW

POW

VBAT

VBAT v v v v v v v v

Connect to 1.8-V external VIO

Power supply input,

2.9 to 4.8 V

Power supply input,

2.9 to 4.8 V

TI Reserved

GPIO11 2 I/O PD PD 1.8 V v v v v

GPIO9

GPIO10

GPIO12

RESERVED1

RESERVED2

GPIO4

RESERVED3

3

4

5

21

22

25

62

I/O

I/O

I/O

I

I

I/O

O

PD

PU

PU

PD

PD

PD

PD

PD

PU

PU

PD

PD

PD

PD

1.8 V

1.8 V

1.8 V

1.8 V

1.8 V

1.8 V

1.8 V v v v x x v x v v v x x v x v v v x x v x v v v x x v x

Reserved for future use. NC if not used.

Reserved for future use. NC if not used.

Reserved for future use. NC if not used.

Reserved for future use. NC if not used.

Reserved for future use. NC if not used.

Reserved for future use. NC if not used.

Reserved for future use. NC if not used.

Reserved for future use. NC if not used.

WLAN Functional Block: Int Signals

WL_SDIO_CMD_1V

8

6 I/O

WL_SDIO_D0_1V8 10 I/O

Hi-Z

Hi-Z

Hi-Z

Hi-Z

1.8 V

1.8 V v v v v v v v v

WL_SDIO_D1_1V8

WL_SDIO_D2_1V8

WL_SDIO_D3_1V8

11

12

13

I/O

IO

I/O

Hi-Z

Hi-Z

Hi-Z

Hi-Z

Hi-Z

PU

1.8 V

1.8 V

1.8 V v v v v v v v v v v v v

WLAN SDIO

command (3)

WLAN SDIO data bit

0 (3)

WLAN SDIO data bit

1 (3)

WLAN SDIO data bit

2 (3)

WLAN SDIO data bit

3. Changes state to

PU at WL_EN or

BT_EN assertion for card detects. Later disabled by software during

initialization.

(3)

8

Terminal Configuration and Functions

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WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152L – JULY 2013 – REVISED DECEMBER 2015

PIN NAME

WL_IRQ_1V8

RF_ANT2

GPIO2

GPIO1

RF_ANT1

Table 4-1. Pin Description (continued)

PIN TYPE/ SHUTDOWN AFTER

DIR STATE POWER

UP

(1)

14 O PD 0

VOLTAGE

LEVEL

1.8 V

CONNECTIVITY (2)

1801 1805 1831 1835

v v v v

18

26

27

32

ANA

I/O

I/O

ANA

PD

PD

PU

PD

PD

PU

1.8 V

1.8 V

1.8 V x v v v v v v v v v x v v v v v v v v v

DESCRIPTION

WLAN SDIO out-ofband interrupt line.

Set to rising edge

(active high) by default. (To extract the debug option

WL_RS232_TX/RX interface out, pull up the IRQ line at power up before applying enable.)

2.4-GHz ANT2 TX,

RX; 2.4-GHz secondary antenna

MRC/MIMO only.

WL_RS232_RX

(when WLAN_IRQ =

1 at power up)

WL_RS232_TX

(when WLAN_IRQ =

1 at power up)

2.4-GHz WLAN main antenna SISO,

Bluetooth

Option: WLAN logger WL_UART_DBG 42 O

Bluetooth Functional Block: Int Signals

BT_UART_DBG 43 O PU PU 1.8 V x x v v

BT_HCI_RTS_1V8

BT_HCI_CTS_1V8

BT_HCI_TX_1V8

BT_HCI_RX_1V8

BT_AUD_IN

BT_AUD_OUT

BT_AUD_FSYNC

BT_AUD_CLK

50

51

52

53

56

57

58

60

O

I

O

I

I

O

I/O

I/O

PU

PU

PU

PU

PD

PD

PD

PD

PU

PU

PU

PU

PD

PD

PD

PD

1.8 V

1.8 V

1.8 V

1.8 V

1.8 V

1.8 V

1.8 V

1.8 V x x x x x x x x x x x x x x x x v v v v v v v v v v v v v v v v

Option: Bluetooth logger

UART RTS to host.

NC if not used.

UART CTS from host. NC if not used.

UART TX to host. NC if not used.

UART RX from host.

NC if not used.

Bluetooth PCM/I2S bus. Data in. NC if not used.

Bluetooth PCM/I2S bus. Data out. NC if not used.

Bluetooth PCM/I2S bus. Frame sync. NC if not used.

Bluetooth PCM/I2S bus. NC if not used.

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Terminal Configuration and Functions

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SWRS152L – JULY 2013 – REVISED DECEMBER 2015

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Table 4-1. Pin Description (continued)

PIN NAME PIN TYPE/ SHUTDOWN AFTER

DIR STATE POWER

UP

(1)

Ground Pins

GND

39,

44,

45,

48,

49,

54,

55,

59,

61,

63,

64,

G1-

G36

28,

29,

30,

31,

33,

34,

35,

37,

1, 7, GND

9, 15,

16,

17,

19,

20,

23,

24,

(1) PU = pullup; PD = pulldown.

VOLTAGE

LEVEL

(2) v = connect; x = no connect.

(3) Host must provide PU using a 10-K resistor for all non-CLK SDIO signals.

CONNECTIVITY (2)

1801 1805 1831 1835

v v v v

DESCRIPTION

10

Terminal Configuration and Functions

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WL1801MOD, WL1805MOD, WL1831MOD, WL1835MOD

SWRS152L – JULY 2013 – REVISED DECEMBER 2015

5 Specifications

All specifications are measured at the module pins using the TI WL1835MODCOM8 evaluation board. All measurements are performed with V antennas, unless otherwise indicated.

BAT

= 3.7 V, V

IO

= 1.8 V, 25°C for typical values with matched RF

NOTE

For level-shifting I/Os with the TI WL18x5MOD, see Level Shifting WL18xx I/Os Application

Report ( SWRA448 ).

NOTE

This device as presently configured has been granted US Federal Communications

Commission (FCC) equipment authorization (reference number Z64-WL18DBMOD). Any modifications to the device software or configuration, including but not limited to the init files, can cause device performance to vary beyond the scope of the currently referenced FCC authorization. Accordingly, if any user modifications are sought to be made to the device software or configuration, the user may be required to independently seek fresh FCC and other regulatory authorizations as relevant before distributing or marketing the devices or products incorporating the same.

5.1

Absolute Maximum Ratings

(1)

over operating free-air temperature range (unless otherwise noted)

PARAMETER

V

BAT

V

IO

Input voltage to analog pins

Input voltage limits (CLK_IN)

Input voltage to all other pins

Operating ambient temperature range

Storage temperature, T stg

VALUE

4.8

(2)

–0.5 to 2.1

–0.5 to 2.1

–0.5 to VDD_IO

–0.5 to (VDD_IO + 0.5 V)

–20 to +70

(3)

–40 to +85

V

V

°C

°C

UNIT

V

V

V

(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) 4.8 V cumulative to 2.33 years, including charging dips and peaks

(3) Operating free-air temperature range at which the device can operate reliably for 15K cumulative active TX power-on hours (assuming a maximum junction temperature of (T j

) of 125°C).

Section 5.3

, Power-On Hours (POH), describes the correlation between T the WL18xx system, a control mechanism automatically ensures T j

< 125°C. Whenever T j j and PoH. In approaches the threshold, this mechanism controls the transmitter patterns.

5.2

ESD Ratings

V

(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/JEDEC JS-001

(1)

Charged device model (CDM), per JEDEC specification JESD22-C101

(2)

VALUE

±1000

±250

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

5.3

Power-On Hours (POH)

(1)

OPERATING JUNCTION TEMPERATURE (°C)

125

120

115

POH

15,000

20,000

27,000

UNIT

V

(1) This information is provided solely to give the customer an estimation of the POH under certain specified conditions and does not extend the warranty for the device under TI’s Standard Terms and Conditions.

Specifications

11

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Power-On Hours (POH)

(1)

(continued)

OPERATING JUNCTION TEMPERATURE (°C)

110

105

5.6

Thermal Characteristics for MOC 100-Pin Package

NAME

θ

JA

θ

JB

θ

JC

Junction to free air

Junction to board

Junction to case

(3)

(2)

AIR FLOW

DESCRIPTION

(1) °C/W = degrees Celsius per watt

(2) According to the JEDEC EIA/JESD 51 document

(3) Modeled using the JEDEC 2s2p thermal test board with 36 thermal vias

POH

37,000

50,000

5.4

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

V

BAT

(1)

V

IO

V

IH

V

IL

V

IH_EN

V

IL_EN

V

OH

V

OL

T r

,T f

T

T f r

Maximum power dissipation

DC supply range for all modes

1.8-V I/O ring power supply voltage

I/O high-level input voltage

I/O low-level input voltage

Enable inputs high-level input voltage

Enable inputs low-level input voltage

High-level output voltage

Low-level output voltage

Input transitions time T r to 90% (digital I/O)

(2)

,T f from 10%

Output rise time from 10% to 90%

(digital pins)

(2)

Output fall time from 10% to 90%

(digital pins)

(2)

Ambient operating temperature

WLAN operation

Bluetooth operation

@ 4 mA

@ 4 mA

C

C

L

L

< 25 pF

< 25 pF

MIN

2.9

1.62

0.65 x VDD_IO

0

1.365

0

VDD_IO –0.45

0

1

–20

TYP

3.7

1.8

(1) 4.8 V is applicable only for 2.33 years (30% of the time). Otherwise, maximum V

BAT

(2) Applies to all digital lines except PCM and slow clock lines must not exceed 4.3 V.

MAX UNIT

4.8

V

1.95

VDD_IO

0.35 × VDD_IO

VDD_IO

V

V

V

V

0.4

VDD_IO

V

V

0.45

V

10 ns

5.3

ns

4.9

ns

70 ºC

2.8

W

0.2

5.5

External Digital Slow Clock Requirements

The supported digital slow clock is 32.768 kHz digital (square wave). All core functions share a single input.

PARAMETER

Input slow clock frequency

CONDITION

Input slow clock accuracy (Initial + temp + WLAN, Bluetooth aging)

Input transition time T r

,T f

(10% to 90%)

Frequency input duty cycle

Input voltage limits Square wave, DCcoupled

Input impedance

Input capacitance

SYMBOL

T r

,T f

V

IH

V

IL

MIN

15%

0.65 x VDD_IO

0

1

TYP

32768

50%

MAX UNIT

Hz

±250 ppm

200 ns

85%

VDD_IO V peak

0.35 x VDD_IO

M Ω

5 pF

(°C/W)

(1)

16.6

6.06

5.13

12

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5.7

WLAN Performance: 2.4-GHz Receiver Characteristics

over operating free-air temperature range (unless otherwise noted). All RF and performance numbers are aligned to the module pin.

PARAMETER CONDITION MAX UNIT

Operation frequency range

Sensitivity: 20-MHz bandwidth. At < 10% PER limit

Maximum input level

Adjacent channel rejection: Sensitivity level +3 dB for

OFDM; Sensitivity level +6 dB for 11b

1 Mbps DSSS

2 Mbps DSSS

5.5 Mbps CCK

11 Mbps CCK

6 Mbps OFDM

9 Mbps OFDM

12 Mbps OFDM

18 Mbps OFDM

24 Mbps OFDM

36 Mbps OFDM

48 Mbps OFDM

54 Mbps OFDM

MCS0 MM 4K

MCS1 MM 4K

MCS2 MM 4K

MCS3 MM 4K

MCS4 MM 4K

MCS5 MM 4K

MCS6 MM 4K

MCS7 MM 4K

MCS0 MM 4K 40 MHz

MCS7 MM 4K 40 MHz

MCS0 MM 4K MRC

MCS7 MM 4K MRC

MCS13 MM 4K

MCS14 MM 4K

MCS15 MM 4K

OFDM

CCK

DSSS

2 Mbps DSSS

11 Mbps CCK

54 Mbps OFDM

MIN TYP

RF_ANT1 pin 2.4-GHz SISO

2412

–96.3

–93.2

–90.6

–87.9

–92.0

–90.4

–89.5

–87.2

–84.1

–80.7

–76.5

–74.9

–90.4

–87.6

–85.9

–82.8

–79.4

–75.2

–20.0

–10.0

–4.0

42.0

38.0

2.0

–73.5

–72.4

–86.7

–67.0

–92.7

–75.2

–73.7

–72.3

–71.0

–10.0

–6.0

–1.0

2484 MHz dBm dBm dB

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5.8

WLAN Performance: 2.4-GHz Transmitter Power

over operating free-air temperature range (unless otherwise noted). All RF and performance numbers are aligned to the module pin.

PARAMETER CONDITION

(1)

MIN TYP MAX UNIT

Output Power: Maximum RMS output power measured at 1 dB from IEEE spectral mask or EVM

(2)

Operation frequency range

Return loss

Reference input impedance

1 Mbps DSSS

2 Mbps DSSS

5.5 Mbps CCK

11 Mbps CCK

6 Mbps OFDM

9 Mbps OFDM

12 Mbps OFDM

18 Mbps OFDM

24 Mbps OFDM

36 Mbps OFDM

48 Mbps OFDM

54 Mbps OFDM

MCS0 MM

MCS1 MM

MCS2 MM

MCS3 MM

MCS4 MM

MCS5 MM

MCS6 MM

MCS7 MM

(3)

MCS0 MM 40 MHz

MCS7 MM 40 MHz

MCS12 (WL18x5)

MCS13 (WL18x5)

MCS14 (WL18x5)

MCS15 (WL18x5)

RF_ANT1 Pin 2.4-GHz SISO

17.3

17.3

17.3

17.3

17.1

17.1

17.1

17.1

16.2

16.1

16.1

15.3

14.6

13.8

15.3

14.6

13.8

16.1

16.1

12.6

14.8

11.3

RF_ANT1 + RF_ANT2

18.5

17.4

14.5

13.4

RF_ANT1 + RF_ANT2

2412

–10.0

50.0

2484 dBm dBm

MHz dB

(1) Maximum throughput (TP) degradation of up to 30% is expected, starting from 80°C ambient temperature on MIMO operation

(2) Regulatory constraints limit TI module output power to the following:

• Channel 14 is used only in Japan; to keep the channel spectral shaping requirement, the power is limited:14.5 dBm.

• Channels 1, 11 @ OFDM legacy and HT 20-MHz rates: 12 dBm

• Channels 1, 11 @ HT 40-MHz rates: 10 dBm

• Channel 7 @ HT 40-MHz lower rates: 10 dBm

• Channel 5 @ HT 40-MHz upper rates: 10 dBm

• All 11B rates are limited to 16 dBm to comply with the ETSI PSD 10 dBm/MHz limit.

• All OFDM rates are limited to 16.5 dBm to comply with the ETSI EIRP 20 dBm limit.

• For clarification regarding power limitation, see the WL18xx .INI File Application Report (SWRU422) .

(3) To ensure compliance with the EVM conditions specified in the PHY chapter of IEEE Std 802.11™ – 2012:

• MCS7 20 MHz channel 12 output power is 2 dB lower than the typical value.

• MCS7 20 MHz channel 8 output power is 1 dB lower than the typical value.

14

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5.9

WLAN Performance: Currents

over operating free-air temperature range (unless otherwise noted). All RF and performance numbers are aligned to the module pin.

UNITS

Receiver

Transmitter

SPECIFICATION ITEMS

Low-power mode (LPM) 2.4-GHz RX SISO20 single chain

2.4 GHz RX search SISO20

2.4-GHz RX search MIMO20

2.4-GHz RX search SISO40

2.4-GHz RX 20 M SISO 11 CCK

2.4-GHz RX 20 M SISO 6 OFDM

2.4-GHz RX 20 M SISO MCS7

2.4-GHz RX 20 M MRC 1 DSSS

2.4-GHz RX 20 M MRC 6 OFDM

2.4-GHz RX 20 M MRC 54 OFDM

2.4-GHz RX 40 MHz MCS7

2.4-GHz TX 20 M SISO 6 OFDM 15.4 dBm

2.4-GHz TX 20 M SISO 11 CCK 15.4 dBm

2.4-GHz TX 20 M SISO 54 OFDM 12.7 dBm

2.4-GHz TX 20 M SISO MCS7 11.2 dBm

2.4-GHz TX 20 M MIMO MCS15 11.2 dBm

2.4-GHz TX 40 M SISO MCS7 8.2 dBm

TYP (AVG) – 25°C

49

54

74

59

56

61

65

74

81

85

77

285

273

247

238

420

243 mA mA

5.10 Bluetooth Performance: BR, EDR Receiver Characteristics—In-Band Signals

(1)

over operating free-air temperature range (unless otherwise noted)

PARAMETER

Bluetooth BR, EDR operation frequency range

Bluetooth BR, EDR channel spacing

Bluetooth BR, EDR input impedance

CONDITION

Bluetooth BR, EDR sensitivity

(2)

Dirty TX on

BR, BER = 0.1%

EDR2, BER = 0.01%

EDR3, BER = 0.01%

Bluetooth EDR BER floor at EDR2 sensitivity + 10 dB

Dirty TX off (for 1,600,000 bits)

EDR3

Bluetooth BR, EDR maximum BR, BER = 0.1% usable input power

EDR2, BER = 0.1%

EDR3, BER = 0.1%

Bluetooth BR intermodulation Level of interferers for n = 3, 4, and 5

MIN

2402

1e-6

1e-6

–5.0

–15.0

–15.0

–36.0

TYP

1

50

–92.2

–91.7

–84.7

–30.0

MAX

2480 dBm dBm dBm

UNIT

MHz

MHz

(1) All RF and performance numbers are aligned to the module pin.

(2) Sensitivity degradation up to –3 dB may occur due to fast clock harmonics with dirty TX on.

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Bluetooth Performance: BR, EDR Receiver Characteristics—In-Band Signals

(1)

(continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER

BR, co-channel

EDR, co-channel

CONDITION

EDR2

EDR3

Bluetooth BR, EDR C/I performance

Numbers show wanted signal-to-interfering-signal ratio. Smaller numbers indicate better C/I performances (Image frequency = –1 MHz)

BR, adjacent ±1 MHz

EDR, adjacent ±1 MHz,

(image)

BR, adjacent +2 MHz

EDR, adjacent +2 MHz

BR, adjacent –2 MHz

EDR, adjacent –2 MHz

EDR2

EDR3

EDR2

EDR3

EDR2

EDR3

BR, adjacent ≥Ι±3Ι MHz

EDR, adjacent ≥Ι±3Ι MHz EDR2

EDR3

Bluetooth BR, EDR RF return loss

MIN TYP

–10.0

UNIT

dB dB

MAX

10

12

20

–3.0

–3.0

2.0

–33.0

–33.0

–28.0

–20.0

–20.0

–13.0

–42.0

–42.0

–36.0

5.11 Bluetooth Performance: Transmitter, BR

(1)

over operating free-air temperature range (unless otherwise noted)

BR RF output power

(2)

BR gain control range

BR power control step

PARAMETER

BR adjacent channel power |M-N| = 2

BR adjacent channel power |M-N| > 2

V

BAT

≥ 3 V

(3)

V

BAT

< 3 V

(3)

MIN TYP

11.7

7.2

30.0

5.0

–43.0

–48.0

(1) All RF and performance numbers are aligned to the module pin.

(2) Values reflect maximum power. Reduced power is available using a vendor-specific (VS) command.

(3) VBAT is measured with an on-chip ADC that has an accuracy error of up to 5%.

5.12 Bluetooth Performance: Transmitter, EDR

(1)

over operating free-air temperature range (unless otherwise noted)

EDR output power

(2)

EDR gain control range

EDR power control step

PARAMETER

EDR adjacent channel power |M-N| = 1

EDR adjacent channel power |M-N| = 2

EDR adjacent channel power |M-N| > 2

V

BAT

≥ 3 V

(3)

V

BAT

< 3 V

(3)

MIN

(1) All RF and performance numbers are aligned to the module pin.

(2) Values reflect default maximum power. Maximum power can be changed using a VS command.

(3) VBAT is measured with an on-chip ADC that has an accuracy error of up to 5%.

TYP

7.2

5.2

30

5

–36

–30

–42

MAX

MAX

UNIT

dBm dB dB dBm dBm

UNIT

dBm dB dB dBc dBm dBm

16

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5.13 Bluetooth Performance: Modulation, BR

(1)

over operating free-air temperature range (unless otherwise noted)

CHARACTERISTICS CONDITION

(2)

BR –20 dB bandwidth

BR modulation characteristics

BR carrier frequency drift

BR drift rate

BR initial carrier frequency tolerance

(3)

∆f1avg

∆f2max ≥ limit for Mod data = at least 99.9% of 1010101...

all Δf2max

∆f2avg, ∆f1avg

Mod data = 4 1s, 4

0s:

111100001111...

One-slot packet

Three- and five-slot packet lfk+5 – fkl , k =

0 …. max f0–fTX

(1) All RF and performance numbers are aligned to the module pin.

(2) Performance values reflect maximum power.

(3) Numbers include XTAL frequency drift over temperature and aging.

MIN

145

120

85%

–25

–35

±75

TYP

925

160

130

88%

5.14 Bluetooth Performance: Modulation, EDR

(1)

over operating free-air temperature range (unless otherwise noted)

PARAMETER

(2)

CONDITION

EDR carrier frequency stability

EDR initial carrier frequency tolerance

(3)

EDR RMS DEVM

EDR 99% DEVM

EDR peak DEVM

EDR2

EDR3

EDR2

EDR3

EDR2

EDR3

(1) All RF and performance numbers are aligned to the module pin.

(2) Performance values reflect maximum power.

(3) Numbers include XTAL frequency drift over temperature and aging.

MIN

–5

±75

TYP

4%

4%

9%

9%

5.15 Bluetooth LE Performance: Receiver Characteristics – In-Band Signals

(1)

over operating free-air temperature range (unless otherwise noted)

PARAMETER CONDITION

(2)

Bluetooth LE operation frequency range

Bluetooth LE channel spacing

Bluetooth LE input impedance

Bluetooth LE sensitivity

(3)

Dirty TX on

Bluetooth LE maximum usable input power

Bluetooth LE intermodulation characteristics

Level of interferers.

For n = 3, 4, 5

MIN

2402

–5

–36

TYP

2

50

–92.2

–30

MAX

995

170

MAX

5

±75

15%

10%

30%

20%

25%

18%

MAX

2480

UNIT

kHz kHz kHz

25

35 kHz kHz

15 kHz/50 µs

±75 kHz

UNIT

kHz kHz

UNIT

MHz

MHz

Ω dBm dBm dBm

(1) All RF and performance numbers are aligned to the module pin.

(2) BER of 0.1% corresponds to PER of 30.8% for a minimum of 1500 transmitted packets, according to the Bluetooth LE test specification.

(3) Sensitivity degradation of up to –3 dB can occur due to fast clock harmonics.

Specifications

17

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Bluetooth LE Performance: Receiver Characteristics – In-Band Signals

(1)

(continued)

over operating free-air temperature range (unless otherwise noted)

PARAMETER CONDITION

(2)

Bluetooth LE C/I performance.

Note: Numbers show wanted signal-tointerfering-signal ratio. Smaller numbers indicate better C/I performance.

Image = –1 MHz

LE, co-channel

LE, adjacent ±1 MHz

LE, adjacent +2 MHz

LE, adjacent –2 MHz

LE, adjacent ≥ |±3|MHz

MIN TYP MAX

12

0

–38

–15

–40

UNIT

dB

5.16 Bluetooth LE Performance: Transmitter Characteristics

(1)

over operating free-air temperature range (unless otherwise noted)

PARAMETER

Bluetooth LE RF output power

(2)

V

BAT

≥ 3 V

(3)

V

BAT

< 3 V

(3)

Bluetooth LE adjacent channel power |M-N| = 2

Bluetooth LE adjacent channel power |M-N| > 2

MIN

(1) All RF and performance numbers are aligned to the module pin.

(2) Bluetooth LE power is restricted to comply with the ETSI 10-dBm EIRP limit requirement.

(3) VBAT is measured with an on-chip ADC that has an accuracy error of up to 5%.

5.17 Bluetooth LE Performance: Modulation Characteristics

(1)

over operating free-air temperature range (unless otherwise noted)

CHARACTERISTICS CONDITION

(2)

∆f1avg

Bluetooth LE modulation characteristics

∆f2max ≥ limit for at least 99.9% of all

Δf2max

∆f2avg, ∆f1avg

Mod data = 4 1s, 4 0s:

111100001111...

Mod data = 1010101...

Bluetooth LE carrier frequency drift

Bluetooth LE drift rate

Bluetooth LE initial carrier frequency tolerance

(3) lf0 – fnl , n = 2,3 …. K lf1 – f0l and lfn – fn-5l , n = 6,7…. K fn – fTX

MIN

240

195

85%

–25

±75

(1) All RF and performance numbers are aligned to the module pin.

(2) Performance values reflect maximum power.

(3) Numbers include XTAL frequency drift over temperature and aging.

5.18 Bluetooth BR and EDR Dynamic Currents

Current is measured at output power as follows: BR at 11.7 dBm; EDR at 7.2 dBm.

USE CASE

(1) (2)

BR voice HV3 + sniff

EDR voice 2-EV3 no retransmission + sniff

Sniff 1 attempt 1.28 s

EDR A2DP EDR2 (master). SBC high quality – 345 kbps

EDR A2DP EDR2 (master). MP3 high quality – 192 kbps

Full throughput ACL RX: RX-2DH5

(3) (4)

Full throughput BR ACL TX: TX-DH5

(4)

Full throughput EDR ACL TX: TX-2DH5

(4)

TYP

11.6

5.9

178.0

10.4

7.5

18.0

50.0

33.0

TYP

7.0

7.0

–51.0

–54.0

TYP

250

215

90%

MAX

MAX

260

UNIT

dBm dBm dBm

UNIT

kHz

25 kHz

15 kHz/50 µs

±75 kHz

UNIT

mA mA

µA mA mA mA mA mA

(1) The role of Bluetooth in all scenarios except A2DP is slave.

(2) CL1P5 PA is connected to V

BAT

, 3.7 V.

(3) ACL RX has the same current in all modulations.

(4) Full throughput assumes data transfer in one direction.

18

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Bluetooth BR and EDR Dynamic Currents (continued)

Current is measured at output power as follows: BR at 11.7 dBm; EDR at 7.2 dBm.

USE CASE

(1) (2)

Page scan or inquiry scan (scan interval is 1.28 s or 11.25 ms, respectively)

Page scan and inquiry scan (scan interval is 1.28 s and 2.56 s, respectively)

TYP

253.0

332.0

5.19 Bluetooth LE Currents

All current measured at output power of 7.0 dBm

USE CASE

(1)

Advertising, not connectable

(2)

Advertising, discoverable

(2)

Scanning

(3)

Connected, master role, 1.28-s connect interval

(4)

Connected, slave role, 1.28-s connect interval

(4)

(1) CL1p% PA is connected to V

BAT

, 3.7 V.

(2) Advertising in all three channels, 1.28-s advertising interval, 15 bytes advertise data

(3) Listening to a single frequency per window, 1.28-s scan interval, 11.25-ms scan window

(4) Zero slave connection latency, empty TX and RX LL packets

TYP

131

143

266

124

132

UNIT

µA

µA

UNIT

µA

µA

µA

µA

µA

5.20 Timing and Switching Characteristics

5.20.1 Power Management

5.20.1.1 Block Diagram – Internal DC2DCs

The device incorporates three internal DC2DCs (switched-mode power supplies) to provide efficient internal supplies, derived from V

BAT

.

WL18xx Top Level

VIO_IN

V

IO

V

BAT

V

BAT

VBAT_IN_MAIN_DC2DC

VBAT_IN_PA_DC2DC

V

BAT

MAIN_DC2DC_OUT

LDO_IN_DIG

SW

FB

Main DC2DC

1.8 V

PA

DC2DC

SW

PA_DC2DC_OUT

FB

2.2 – 2.7 V

FB_IN_PA_DC2DC

DIG_DC2DC_OUT

VDD_DIG

SW

1 V

FB

Digital DC2DC

Figure 5-1. Internal DC2DCs

5.20.2 Power-Up and Shut-Down States

The correct power-up and shut-down sequences must be followed to avoid damage to the device.

While V

BAT or V

IO or both are deasserted, no signals should be driven to the device. The only exception is the slow clock that is a fail-safe I/O.

While V

BAT

, V

IO

, and slow clock are fed to the device, but WL_EN is deasserted (low), the device is in

SHUTDOWN state. In SHUTDOWN state all functional blocks, internal DC2DCs, clocks, and LDOs are disabled.

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To perform the correct power-up sequence, assert (high) WL_EN. The internal DC2DCs, LDOs, and clock start to ramp and stabilize. Stable slow clock, V enable signals.

IO

, and V

BAT are prerequisites to the assertion of one of the

To perform the correct shut-down sequence, deassert (low) WL_EN while all the supplies to the device

(V

BAT

, V

IO

, and slow clock) are still stable and available. The supplies to the chip (V deasserted only after both enable signals are deasserted (low).

BAT and V

IO

) can be

Figure 5-2

shows the general power scheme for the module, including the power-down sequence.

VBAT

1

VIO

5 5

SCLK (32 KHz)

>10 µs 2 >10 µs 4

WL EN

3

> 60 µs

NOTE: 1. Either VBAT or VIO can come up first.

NOTE: 2. VBAT and VIO supplies and slow clock (SCLK), must be stable prior to EN being asserted and at all times

NOTE: when the EN is active.

NOTE: 3. At least 60 µs is required between two successive device enables. The device is assumed to be in

NOTE: shutdown state during that period, meaning all enables to the device are LOW for that minimum duration.

NOTE: 4. EN must be deasserted at least 10 µs before VBAT or VIO supply can be lowered. (Order of supply turn off

NOTE: after EN shutdown is immaterial)

NOTE: 5. SCLK - Fail safe I/O

Figure 5-2. Power-Up System

5.20.3 Chip Top-level Power-Up Sequence

Figure 5-3

shows the top-level power-up sequence for the chip.

VBAT / VIO input

SLOWCLK input

WL_EN input

Main 1V8 DC2DC

DIG DC2DC

SRAM LDO

Top RESETZ

TCXO_CLK_REQ output

4.5 ms delay

Internal power stable = 5 ms

Figure 5-3. Chip Top-Level Power-Up Sequence

20

Specifications

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5.20.4 WLAN Power-Up Sequence

Figure 5-4

shows the WLAN power-up sequence.

VBAT / VIO input

SLOWCLK input

WL_EN input

TCXO_CLK_REQ output

TXCO_LDO output

TCXO input

SDIO_CLK input

Indicates completion of firmware download and internal initialization

WLAN_IRQ output

NLCP

Wake-up time

Indicates completion of firmware download and internal initialization

WLAN_IRQ output

MCP

Wake-up time

Host configures device to reverse WLAN_IRQ polarity

Figure 5-4. WLAN Power-Up Sequence

5.20.5 Bluetooth-Bluetooth LE Power-Up Sequence

Figure 5-5

shows the Bluetooth-Bluetooth LE power-up sequence.

NLCP: trigger at rising edge

MCP: trigger at low level

Completion of Bluetooth firmware initialztion.

100 ms maximum

Figure 5-5. Bluetooth-Bluetooth LE Power-Up Sequence

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5.20.6 WLAN SDIO Transport Layer

The SDIO is the host interface for WLAN. The interface between the host and the WL18xx module uses an SDIO interface and supports a maximum clock rate of 50 MHz.

The device SDIO also supports the following features of the SDIO V3 specification:

• 4-bit data bus

• Synchronous and asynchronous in-band interrupt

• Default and high-speed (HS, 50 MHz) timing

• Sleep and wake commands

5.20.6.1 SDIO Timing Specifications

Figure 5-6

and

Figure 5-7

show the SDIO switching characteristics over recommended operating conditions and with the default rate for input and output.

V

DD

Clock Input

V

SS

V

DD

Data Input

V

SS t

V

THL

IH

Not Valid

V

IL t t

WL

ISU

V

IH t

WH

V

IL

V

IH

Valid

V

IL

V

IH

V

IL t

TLH t

IH

V

IH

Not Valid

Figure 5-6. SDIO Default Input Timing

V

DD

Clock Input

V

SS t

THL

V

IH

V

IL t

WL

V

IL

V

IH t

WH

V

IH t

TLH

V

DD t

ODLY(max) t

ODLY(min)

Data Output

Not Valid

V

OH

V

OL

Valid

V

OH

V

OL

Not Valid

V

SS

Figure 5-7. SDIO Default Output Timing

Table 5-1

lists the SDIO default timing characteristics.

Table 5-1. SDIO Default Timing Characteristics

(1)

f clock

DC t

TLH t

THL t

ISU t

IH t

ODLY

C l

PARAMETER

(2)

Clock frequency, CLK

Low, high duty cycle

Rise time, CLK

Fall time, CLK

Setup time, input valid before CLK

Hold time, input valid after CLK ↑

Delay time, CLK ↓ to output valid

Capacitive load on outputs

MIN

0.0

40.0%

3.0

2.0

7.0

MAX

26.0

60.0%

(1) To change the data out clock edge from the falling edge (default) to the rising edge, set the configuration bit.

(2) Parameter values reflect maximum clock frequency.

10.0

10.0

10.0

15.0

UNIT

MHz ns ns ns ns ns pF

22

Specifications

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5.20.6.2 SDIO Switching Characteristics – High Rate

Figure 5-8

and

Figure 5-9

show the parameters for maximum clock frequency.

V

DD

Clock Input

V

SS

V

DD

Data Input

V

SS t

V

THL

IH

Not Valid

V

IL t

WL t

V

IL

ISU t

WH

V

IH

50% V

DD t

TLH t

IH

V

IH

V

IL

Valid

V

IH

V

IL

V

IH

Not Valid

Figure 5-8. SDIO HS Input Timing

V

DD

Clock Input

50% V

DD t

THL

V

IH t

WL t

WH

V

IH

50% V

DD

V

IH

V

IL

V

IL

V

SS t

TLH f clock

DC t

TLH t

THL t

ISU t

IH t

ODLY

C l

V

DD t

ODLY(max)

Data Output

Not Valid

V

OH

V

OL

Valid

V

OH

V

OL

V

SS

Figure 5-9. SDIO HS Output Timing

Table 5-2

lists the SDIO high-rate timing characteristics.

t

OH(min)

Not Valid

Table 5-2. SDIO HS Timing Characteristics

PARAMETER

Clock frequency, CLK

Low, high duty cycle

Rise time, CLK

Fall time, CLK

Setup time, input valid before CLK ↑

Hold time, input valid after CLK ↑

Delay time, CLK ↑ to output valid

Capacitive load on outputs

MIN

0.0

40.0%

3.0

2.0

7.0

MAX

52.0

60.0%

3.0

3.0

10.0

10.0

UNIT

MHz ns ns ns ns ns pF

5.20.7 HCI UART Shared-Transport Layers for All Functional Blocks (Except WLAN)

The device incorporates a UART module dedicated to the Bluetooth shared-transport, host controller interface (HCI) transport layer. The HCI interface transports commands, events, and ACL between the

Bluetooth device and its host using HCI data packets acting as a shared transport for all functional blocks except WLAN.

space

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WLAN

WLAN HS SDIO

SHARED HCI FOR ALL FUNCTIONAL BLOCKS EXCEPT WLAN BLUETOOTH VOICE-AUDIO

Over UART Bluetooth PCM

The HCI UART supports most baud rates (including all PC rates) for all fast-clock frequencies up to a maximum of 4 Mbps. After power up, the baud rate is set for 115.2 Kbps, regardless of the fast-clock frequency. The baud rate can then be changed using a VS command. The device responds with a

Command Complete Event (still at 115.2 Kbps), after which the baud rate change occurs.

HCI hardware includes the following features:

• Receiver detection of break, idle, framing, FIFO overflow, and parity error conditions

• Receiver-transmitter underflow detection

• CTS, RTS hardware flow control

• 4 wire (H4)

Table 5-3

lists the UART default settings.

Table 5-3. UART Default Setting

PARAMETER VALUE

Bit rate

Data length

Stop-bit

Parity

115.2 Kbps

8 bits

1

None

5.20.7.1 UART 4-Wire Interface – H4

The interface includes four signals:

• TXD

• RXD

• CTS

• RTS

Flow control between the host and the device is byte-wise by hardware.

When the UART RX buffer of the device passes the flow-control threshold, the buffer sets the UART_RTS signal high to stop transmission from the host. When the UART_CTS signal is set high, the device stops transmitting on the interface. If HCI_CTS is set high in the middle of transmitting a byte, the device finishes transmitting the byte and stops the transmission.

Figure 5-10

shows the UART timing.

24

Specifications

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_ _

Figure 5-10. UART Timing Diagram

Table 5-4

lists the UART timing characteristics.

PARAMETER

Baud rate

Baud rate accuracy per byte

Baud rate accuracy per bit

CTS low to TX_DATA on

CTS high to TX_DATA off

CTS high pulse width

RTS low to RX_DATA on

RTS high to RX_DATA off

Table 5-4. UART Timing Characteristics

CONDITION SYMBOL

Receive-transmit

Receive-transmit

Hardware flow control

Interrupt set to 1/4 FIFO

Figure 5-11

shows the UART data frame.

t3 t4 t6 t1 t2

MIN

37.5

–2.5%

–12.5%

0.0

1.0

0.0

TX STR tb

D0 D1 D2 Dn PAR

TYP

2.0

2.0

MAX

4364

+1.5%

+12.5%

1.0

16.0

STP

STR-Start-bit; D0..Dn - Data bits (LSB first); PAR - Parity bit (if used); STP - Stop-bit

Figure 5-11. UART Data Frame

5.20.8 Bluetooth Codec-PCM (Audio) Timing Specifications

Figure 5-12

shows the Bluetooth codec-PCM (audio) timing diagram.

UNIT

Kbps

µs

Byte

Bit

µs

Bytes

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CLK t is t ih t

W t

W t op

Figure 5-12. Bluetooth Codec-PCM (Audio) Master Timing Diagram www.ti.com

26

Specifications

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Table 5-5

lists the Bluetooth codec-PCM master timing characteristics.

PARAMETER

Cycle time

High or low pulse width

AUD_IN setup time

AUD_IN hold time

AUD_OUT propagation time

FSYNC_OUT propagation time

Capacitive loading on outputs

Table 5-5. Bluetooth Codec-PCM Master Timing Characteristics

SYMBOL

T clk

T w t is t ih t op t op

C l

MIN

162.76 (6.144 MHz)

35% of T clk min

10.6

0

0

0

MAX

15625 (64 kHz)

15

15

40

Table 5-6

lists the Bluetooth codec-PCM slave timing characteristics.

PARAMETER

Cycle time

High or low pulse width

AUD_IN setup time

AUD_IN hold time

AUD_FSYNC setup time

AUD_FSYNC hold time

AUD_OUT propagation time

Capacitive loading on outputs

Table 5-6. Bluetooth Codec-PCM Slave Timing Characteristics

MAX SYMBOL

T clk

T w t is t ih t is t ih t op

C l

MIN

81.38 (12.288 MHz)

35% of T clk min

5

0

5

0

0 19

40

UNIT

ns pF

UNIT

ns pF

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6 Detailed Description

The WiLink 8 module is a self-contained connectivity solution based on WiLink 8 connectivity. As the eighth-generation connectivity combo chip from TI, the WiLink 8 module is based on proven technology.

Figure 6-1

shows a high-level view of the WL1835MOD variant.

Figure 6-1. WL1835MOD High-Level System Diagram

Table 6-1

through

Table 6-3

list performance parameters along with shutdown and sleep currents.

Table 6-1. WLAN Performance Parameters

Maximum TX power

Minimum sensitivity

Sleep current

Connected IDLE

WLAN

(1)

RX search

RX current (SISO20)

TX current (SISO20)

Maximum peak current consumption during calibration

(2)

SPECIFICATION (TYP)

17.3 dBm

–96.3 dBm

160 µA

750 µA

54 mA

65 mA

238 mA

850 mA

CONDITIONS

1 Mbps DSSS

1 Mbps DSSS

Leakage, firmware retained

No traffic IDLE connect

Search (SISO20)

MCS7, 2.4 GHz

MCS7, 2.4 GHz, +11.2 dBm

(1) System design power scheme must comply with both peak and average TX bursts.

(2) Peak current V

BAT can hit 850 mA during device calibration.

• At wakeup, the WiLink 8 module performs the entire calibration sequence at the center of the 2.4-GHz band.

• Once a link is established, calibration is performed periodically (every 5 minutes) on the specific channel tuned.

• The maximum VBAT value is based on peak calibration consumption with a 30% margin.

BLUETOOTH

Maximum TX power

Minimum sensitivity

Sniff

Page or inquiry

A2DP

Table 6-2. Bluetooth Performance Parameters

SPECIFICATION (TYP)

11.7 dBm

–92.2 dBm

178 µA

253 µA

7.5 mA

CONDITIONS

GFSK

GFSK

1 attempt, 1.28 s (+4 dBm)

1.28-s interrupt, 11.25-ms scan window (+4 dBm)

MP3 high quality 192 kbps (+4 dBm)

28

Detailed Description

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PARAMETER

Shutdown mode

All functions shut down

WLAN sleep mode

Bluetooth sleep mode

Table 6-3. Shutdown and Sleep Currents

POWER SUPPLY CURRENT

VBAT

VIO

VBAT

VIO

VBAT

VIO

TYP

10

2

160

60

110

60

UNIT

µA

µA

µA

6.1

WLAN Features

The device supports the following WLAN features:

• Integrated 2.4-GHz power amplifiers (PAs) for a complete WLAN solution

• Baseband processor: IEEE Std 802.11b/g and IEEE Std 802.11n data rates with 20- or 40-MHz SISO and 20-MHz MIMO

• Fully calibrated system (production calibration not required)

• Medium access controller (MAC)

– Embedded ARM

® central processing unit (CPU)

– Hardware-based encryption-decryption using 64-, 128-, and 256-bit WEP, TKIP, or AES keys

– Requirements for Wi-Fi-protected access (WPA and WPA2.0) and IEEE Std 802.11i (includes hardware-accelerated Advanced Encryption Standard [AES])

• New advanced coexistence scheme with Bluetooth and Bluetooth LE wireless technology

• 2.4-GHz radio

– Internal LNA and PA

– IEEE Std 802.11b, 802.11g, and 802.11n

• 4-bit SDIO host interface, including high speed (HS) and V3 modes

6.2

Bluetooth Features

The device supports the following Bluetooth features:

Bluetooth 4.1 as well as CSA2

• Concurrent operation and built-in coexisting and prioritization handling of Bluetooth and Bluetooth LE wireless technology, audio processing, and WLAN

• Dedicated audio processor supporting on-chip SBC encoding + A2DP

– Assisted A2DP (A3DP): SBC encoding implemented internally

– Assisted WB-speech (AWBS): modified SBC codec implemented internally

6.3

Bluetooth LE Features

The device supports the following Bluetooth LE features:

Bluetooth 4.0 LE dual-mode standard

• All roles and role combinations, mandatory as well as optional

• Up to 10 LE connections

• Independent LE buffering allowing many multiple connections with no affect on BR-EDR performance

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6.4

WiLink 8 Module Markings

Figure 6-2

shows the markings for the TI WiLink 8 module.

Model: WL18 MODGB

Test Grade:&&

FCC ID: Z64

-

WL18SBMOD

IC: 451I

-

WL18SBMOD

LTC: YYWW SSF

R 201-135370 www.ti.com

Figure 6-2. WiLink 8 Module Markings

Table 6-4

describes the WiLink 8 module markings.

MARKING

WL18 MODGB

&&

Z64-WL18SBMOD

451I-WL18SBMOD

YYWW SSF

201-135370

Table 6-4. Description of WiLink 8 Module Markings

DESCRIPTION

Model

Test grade (for more information, see

Section 6.5

, Test Grades)

FCC ID: single modular FCC grant ID

IC: single modular IC grant ID

LTC (lot trace code):

• YY = year (for example, 12 = 2012)

• WW = week

• SS = serial number (01 to 99) matching manufacturer lot number

• F = Reserved for internal use

R: single modular TELEC grant ID

TELEC compliance mark

CE CE compliance mark

6.5

Test Grades

To minimize delivery time, TI may ship the device ordered or an equivalent device currently available that contains at least the functions of the part ordered. From all aspects, this device will behave exactly the same as the part ordered. For example, if a customer orders device WL1801MOD, the part shipped can be marked with a test grade of 35, 05 (see

Table 6-5 ).

MARK 1

0&

3&

MARK 2

&1

&5

Table 6-5. Test Grade Markings

WLAN

Tested

Tested

WLAN 2.4 GHz

Tested

Tested

BLUETOOTH

Tested

MIMO 2.4 GHz

Tested

30

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7 Applications and Implementation

NOTE

Information in the following Applications section is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

7.1

Application Information

7.1.1

Typical Application – WL1835MODGB Reference Design

Figure 7-1

shows the TI WL1835MODGB reference design.

BT_EN

WLAN_EN

WLAN/BT Enable Control.

Connect to Host GPIO.

For Debug only

TP1 TP2

VBAT_IN

VIO_IN

C1

1uF

0402

BT_HCI_RTS_1V8

BT_HCI_CTS_1V8

BT_HCI_TX_1V8

BT_HCI_RX_1V8

Connect to Host HCI Interface.

BT_AUD_IN

BT_AUD_OUT

BT_AUD_FSYNC

BT_AUD_CLK

Connect to Host BT PCM Bus.

TP8

C2

10uF

0603

C3

0.1uF

0402

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

G26

G27

G28

G29

G30

G31

G32

G33

G34

G35

G36

G19

G20

G21

G22

G23

G24

G25

49

GND

50

BT_HCI_RTS

51

BT_HCI_CTS

52

BT_HCI_TX

53

63

BT_HCI_RX

54

55

GND

56

60

BT_AUD_IN

57

BT_AUD_OUT

58

BT_AUD_FSYNC

59

GND

BT_AUD_CLK

61

GND

62

GND

RESERVED3

GND

64

GND

U1

WL1835MODGB

E-13.4X13.3-N100_0.75-TOP

SLOW_CLK

R6

0R

0402

3

OSC1

1V8 / 32.768kHz

OSC-3.2X2.5

1

OUT EN

2

GND VCC

4

VIO_IN

C4

0.1uF

0402

RF_ANT1

GND

31

GND

GND

GND

RESERVED1

28

27

GPIO_1

26

GPIO_2

GPIO_4

25

24

GND

23

GND

22

RESERVED2

21

20

GND

29

19

GND

30

RF_ANT2

18

17

GND

32

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

G1

G2

G3

G4

G5

G6

G7

G8

G9

G10

G11

G12

G13

G14

G15

G16

G17

G18

WL_RS232_TX_1V8

WL_RS232_RX_1V8

TP5

TP3

TP4

For Debug only

TP6

TP7

C7

NU_10pF

0402

C5

10pF

0402

2

1

3 J5

U.FL-R-SMT(10)

U.FL

For Debug only

L1

1.1nH

0402

ANT1- WL_2.4_IO2/BT

C13

8pF

0402

ANT1

ANT016008LCD2442MA1

ANT-N3-1.6X0.8MM-A

A

FEED

2.4G

5G

C9

2.2pF

0402

C10

NU_0.3pF

0402

The value of antenna matching components is for WL1835MODCOM8B

C8

NU_10pF

0402

C6

10pF

0402

2

1

3 J6

U.FL-R-SMT(10)

U.FL

For Debug only

L2

1.5nH

0402

C14

4pF

0402

ANT2- WL_2.4_IO1

ANT2

ANT016008LCD2442MA1

ANT-N3-1.6X0.8MM-B

A

FEED

2.4G

5G

C11

1.2pF

0402

C12

NU

0402

The value of antenna matching components is for WL1835MODCOM8B

TP10 TP11 TP12

VIO_IN

R20

NU

RES1005

For Debug only

WL_IRQ_1V8

WL_SDIO_D3_1V8

WL_SDIO_D2_1V8

WL_SDIO_D1_1V8

WL_SDIO_D0_1V8

WL_SDIO_CLK_1V8

WL_SDIO_CMD_1V8

Connect to Host SDIO Interface.

Figure 7-1. TI Module Reference Schematics

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Table 7-1

lists the bill materials (BOM).

ITEM

1

2

3

DESCRIPTION

TI WL1835 Wi-Fi / Bluetooth module

XOSC 3225 / 32.768 kHz / 1.8 V /

±50 ppm

Antenna / chip / 2.4 and 5 GHz / peak gain > 5 dBi

8

9

6

7

Mini RF header receptacle

Inductor 0402 / 1.1 nH / ±0.05 nH SMD

Inductor 0402 / 1.5 nH / ±0.05 nH SMD

Capacitor 0402 / 1.2 pF / 50 V / C0G /

±0.1 pF

10 Capacitor 0402 / 2.2 pF / 50 V / C0G /

±0.1 pF

11 Capacitor 0402 / 4 pF / 50 V / C0G /

±0.1 pF

12 Capacitor 0402 / 8 pF / 50 V / C0G /

±0.1 pF

13 Capacitor 0402 / 10 pF / 50 V / NPO /

±5%

14 Capacitor 0402 / 0.1 µF / 10 V / X7R /

±10%

15 Capacitor 0402 / 1 µF / 6.3 V / X5R /

±10% / HF

16 Capacitor 0603 / 10 µF / 6.3 V / X5R /

±20%

Table 7-1. BOM

PART NUMBER

WL1835MODGI

7XZ3200005

ANT016008LCD2442MA1

U.FL-R-SMT-1 (10)

LQP15MN1N1W02

LQP15MN1N5W02

GJM1555C1H1R2BB01

GJM1555C1H1R2BB01

GJM1555C1H4R0BB01

GJM1555C1H8R0BB01

0402N100J500LT

0402B104K100CT

GRM155R60J105KE19D

C1608X5R0J106M

PACKAGE

13.4 x 13.3 x 2.0mm

3.2 x 2.5 x 1.0 mm

1.6 mm x 0.8 mm

REF.

U1

OSC1

ANT1, ANT2

QTY

1

1

2

3.0 x 2.6 x 1.25 mm

0402

0402

0402

0402

0402

0402

0402

0402

0402

0603

J5,J6

L1

L2

C11

C9

C14

C13

C5, C6

C3, C4

C1

C2

1

1

2

1

1

1

1

2

1

1

1

MFR

TI

TXC

TDK

Hirose

Murata

Murata

Murata

Murata

Murata

Walsin

Walsin

Walsin

Murata

TDK

7.1.2

Design Recommendations

This section describes the layout recommendations for the WL1835 module, RF trace, and antenna.

Table 7-2

summarizes the layout recommendations.

Table 7-2. Layout Recommendations Summary

ITEM

4

5

6

1

2

3

Thermal

The proximity of ground vias must be close to the pad.

DESCRIPTION

Signal traces must not be run underneath the module on the layer where the module is mounted.

Have a complete ground pour in layer 2 for thermal dissipation.

Have a solid ground plane and ground vias under the module for stable system and thermal dissipation.

Increase the ground pour in the first layer and have all of the traces from the first layer on the inner layers, if possible.

Signal traces can be run on a third layer under the solid ground layer, which is below the module mounting layer.

7

8

9

RF Trace and Antenna Routing

The RF trace antenna feed must be as short as possible beyond the ground reference. At this point, the trace starts to radiate.

The RF trace bends must be gradual with an approximate maximum bend of 45 degrees with trace mitered. RF traces must not have sharp corners.

RF traces must have via stitching on the ground plane beside the RF trace on both sides.

10 RF traces must have constant impedance (microstrip transmission line).

11 For best results, the RF trace ground layer must be the ground layer immediately below the RF trace. The ground layer must be solid.

12 There must be no traces or ground under the antenna section.

13 RF traces must be as short as possible. The antenna, RF traces, and modules must be on the edge of the PCB product. The proximity of the antenna to the enclosure and the enclosure material must also be considered.

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Table 7-2. Layout Recommendations Summary (continued)

ITEM DESCRIPTION

Supply and Interface

14 The power trace for V

BAT must be at least 40-mil wide.

15 The 1.8-V trace must be at least 18-mil wide.

16 Make VBAT traces as wide as possible to ensure reduced inductance and trace resistance.

17 If possible, shield V

BAT traces with ground above, below, and beside the traces.

18 SDIO signals traces (CLK, CMD, D0, D1, D2, and D3) must be routed in parallel to each other and as short as possible (less than

12 cm). In addition, every trace length must be the same as the others. There should be enough space between traces – greater than 1.5 times the trace width or ground – to ensure signal quality, especially for the SDIO_CLK trace. Remember to keep these traces away from the other digital or analog signal traces. TI recommends adding ground shielding around these buses.

19 SDIO and digital clock signals are a source of noise. Keep the traces of these signals as short as possible. If possible, maintain a clearance around them.

7.1.3

RF Trace and Antenna Layout Recommendations

Figure 7-2

shows the location of the antenna on the WL1835MODCOM8B board as well as the RF trace routing from the WL1835 module (TI reference design). The Pulse multilayer antennas are mounted on the board with a specific layout and matching circuit for the radiation test conducted in FCC, CE, and IC certifications.

NOTE

For reuse of the regulatory certification, a trace of 1-dB attenuation is required on the final application board.

Antennas are orthogonal to each other.

Antennas distance is Higher than half wavelength.

76.00mm

No sharp corners.

Constant 50 OHM control impedance RF Trace.

Antenna placement on the edge of the board.

Figure 7-2. Location of Antenna and RF Trace Routing on the WL1835MODCOM8B Board

Follow these RF trace routing recommendations:

• RF traces must have 50Ω impedance.

• RF traces must not have sharp corners.

• RF traces must have via stitching on the ground plane beside the RF trace on both sides.

• RF traces must be as short as possible. The antenna, RF traces, and module must be on the edge of the PCB product in consideration of the product enclosure material and proximity.

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7.1.4

Module Layout Recommendations

Figure 7-3

shows layer 1 and layer 2 of the TI module layout.

Layer 1

Layer 2 (Solid GND)

www.ti.com

Figure 7-3. TI Module Layout

Follow these module layout recommendations:

• Ensure a solid ground plane and ground vias under the module for stable system and thermal dissipation.

• Do not run signal traces underneath the module on a layer where the module is mounted.

• Signal traces can be run on a third layer under the solid ground layer and beneath the module mounting.

• Run the host interfaces with ground on the adjacent layer to improve the return path.

• TI recommends routing the signals as short as possible to the host.

7.1.5

Thermal Board Recommendations

The TI module uses µvias for layers 1 through 6 with full copper filling, providing heat flow all the way to the module ground pads.

TI recommends using one big ground pad under the module with vias all the way to connect the pad to all ground layers (see

Figure 7-4 ).

34

Applications and Implementation

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Module

COM8 Board

Figure 7-4. Block of Ground Pads on Bottom Side of Package

Figure 7-5

shows via array patterns, which are applied wherever possible to connect all of the layers to the TI module central or main ground pads.

Figure 7-5. Via Array Patterns

7.1.6

Baking and SMT Recommendations

7.1.6.1

Baking Recommendations

Follow these baking guidelines for the WiLink 8 module:

• Follow MSL level 3 to perform the baking process.

• After the bag is open, devices subjected to reflow solder or other high temperature processes must be mounted within 168 hours of factory conditions (< 30°C/60% RH) or stored at <10% RH.

• If the Humidity Indicator Card reads >10%, devices require baking before they are mounted.

• If baking is required, bake devices for 8 hours at 125°C.

7.1.6.2

SMT Recommendations

Figure 7-6

shows the recommended reflow profile for the WiLink 8 module.

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Temp

(degC)

D2

D3

D1

T1 T2

T3

Meating

Preheat

Soldering Cooling

Time

(SeC)

Figure 7-6. Reflow Profile for the WiLink 8 Module

Table 7-3

lists the temperature values for the profile shown in

Figure 7-6

.

Preheat

Soldering

Peak temperature

ITEM

Table 7-3. Temperature Values for Reflow Profile

TEMPERATURE (°C)

D1 to approximately D2: 140 to 200

D2: 220

D3: 250 maximum

TIME (s)

T1: 80 to approximately 120

T2: 60 ±10

T3: 10 space

NOTE

TI does not recommend the use of conformal coating or similar material on the WiLink 8 module. This coating can lead to localized stress on the WCSP solder connections inside the module and impact the device reliability. Care should be taken during module assembly process to the final PCB to avoid the presence of foreign material inside the module.

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8 Device and Documentation Support

8.1

Device Support

8.1.1

Development Support

For a complete listing of development-support tools, visit the Texas Instruments WL18xx Wiki . For information on pricing and availability, contact the nearest TI field sales office or authorized distributor.

8.1.2

Device Support Nomenclature

To designate the stages in the product development cycle, TI assigns prefixes to the part numbers. These prefixes represent evolutionary stages of product development from engineering prototypes through fully qualified production devices.

X Experimental, preproduction, sample or prototype device. Device may not meet all product qualification conditions and may not fully comply with TI specifications. Experimental/Prototype devices are shipped against the following disclaimer:

“This product is still in development and is intended for internal evaluation purposes.” Notwithstanding any provision to the contrary, TI makes no warranty expressed, implied, or statutory, including any implied warranty of merchantability of fitness for a specific purpose, of this device.

null Device is qualified and released to production. TI’s standard warranty applies to production devices.

8.2

Related Links

The table below lists quick access links. Categories include technical documents, support and community resources, tools and software, and quick access to sample or buy.

PARTS

WL1801MOD

WL1805MOD

WL1831MOD

WL1835MOD

PRODUCT FOLDER

Click here

Click here

Click here

Click here

Table 8-1. Related Links

SAMPLE & BUY

Click here

Click here

Click here

Click here

TECHNICAL

DOCUMENTS

Click here

Click here

Click here

Click here

TOOLS &

SOFTWARE

Click here

Click here

Click here

Click here

SUPPORT &

COMMUNITY

Click here

Click here

Click here

Click here

8.3

Community Resources

The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of Use .

TI E2E™ Online Community

TI's Engineer-to-Engineer (E2E) Community.

Created to foster collaboration among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve problems with fellow engineers.

TI Embedded Processors Wiki

Texas Instruments Embedded Processors Wiki. Established to help developers get started with Embedded Processors from Texas Instruments and to foster innovation and growth of general knowledge about the hardware and software surrounding these devices.

8.4

Trademarks

WiLink, E2E are trademarks of Texas Instruments.

ARM is a registered trademark of ARM Physical IP, Inc.

Bluetooth is a registered trademark of Bluetooth SIG, Inc..

Android is a trademark of Google, Inc.

IEEE Std 802.11 is a trademark of IEEE.

Linux is a registered trademark of Linus Torvalds.

Wi-Fi is a registered trademark of Wi-Fi Alliance.

All other trademarks are the property of their respective owners.

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www.ti.com

8.5

Electrostatic Discharge Caution

This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.

ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.

8.6

Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

38

Device and Documentation Support

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9 Mechanical Packaging and Orderable Information

9.1

TI Module Mechanical Outline

Figure 9-1

shows the mechanical outline for the device.

e4

W e5

T e3 e2 d2 d1 e1

L e6

L

W

Pin 2 Indicator b1 b2 b3 a3 c2 c3 a1 a2

Bottom View

4 3 2 1 c1

Side View

Figure 9-1. TI Module Mechanical Outline

Table 9-1

lists the dimensions for the mechanical outline of the device.

The TI module weighs 0.684 g (±0.005 g).

NOTE

MARKING

L (body size)

W (body size)

T (thickness) a1 a2 a3 b1 b2 b3 c1

Top View

Table 9-1. Dimensions for TI Module Mechanical Outline

MIN (mm) NOM (mm) MAX (mm)

13.20

13.30

13.40

13.30

1.90

13.40

13.50

2.00

0.30

0.60

0.65

0.20

0.65

1.20

0.20

0.40

0.70

0.75

0.30

0.75

1.30

0.30

0.50

0.80

0.85

0.40

0.85

1.40

0.40

MARKING

c2 c3 d1 d2 e1 e2 e3 e4 e5 e6

MIN (mm) NOM (mm) MAX (mm)

0.65

0.75

0.85

1.15

0.90

1.25

1.00

1.35

1.10

0.90

1.30

1.30

1.15

1.20

1.00

1.00

1.00

1.40

1.40

1.25

1.30

1.10

1.10

1.10

1.50

1.50

1.35

1.40

1.20

1.20

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9.2

Tape and Reel Information

Emboss taping specification for MOC 100 pin.

9.2.1

Tape and Reel Specification

Po

Do

Pin 1

P2

www.ti.com

P

C0.5

ITEM

DIMENSION

(mm)

5.00°

Ao = Bo

Figure 9-2. Tape Specification

Table 9-2. Dimensions for Tape Specification

W E F P Po P2 Do T Ao Bo Ko

24.00

1.75

11.50

20.00

4.00

2.00

2.00

0.35

13.80

13.80

2.50

(±0.30) (±0.10) (±0.10) (±0.10) (±0.10) (±0.10) (±0.10) (±0.05) (±0.10) (±0.10) (±0.10)

330.00±2.0

2.20±0.7

100.00±1.5

W1

W2

ITEM

DIMENSION (mm)

Figure 9-3. Reel Specification

Table 9-3. Dimensions for Reel Specification

W1

24.4 (+1.5, –0.5)

W2

30.4 (maximum)

9.2.2

Packing Specification

9.2.2.1

Reel Box

The reel is packed in a moisture barrier bag fastened by heat-sealing. Each moisture-barrier bag is packed into a reel box, as shown in

Figure 9-4 .

40

Mechanical Packaging and Orderable Information

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856

360

45

Figure 9-4. Reel Box

The reel box is made of corrugated fiberboard.

9.2.2.2

Shipping Box

Figure 9-5

shows a typical shipping box. If the shipping box has excess space, filler (such as cushion) is added.

NOTE

The size of the shipping box may vary depending on the number of reel boxes packed.

354 250

1,243

Figure 9-5. Shipping Box

The shipping box is made of corrugated fiberboard.

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9.3

Packaging Information

The following pages include mechanical packaging and orderable information. This information is the most current data available for the designated devices. This data is subject to change without notice and revision of this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

42

Mechanical Packaging and Orderable Information

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PACKAGE OPTION ADDENDUM

Orderable Device

WL1801MODGBMOCR

WL1801MODGBMOCT

WL1805MODGBMOCR

WL1805MODGBMOCT

WL1831MODGBMOCR

WL1831MODGBMOCT

WL1835MODGBMOCR

WL1835MODGBMOCT

Status

(1)

ACTIVE

ACTIVE

ACTIVE

ACTIVE

ACTIVE

ACTIVE

ACTIVE

ACTIVE

Package Type

Module

Module

Module

Module

Module

Module

Module

Module

Package

Drawing

MOC

MOC

MOC

MOC

MOC

MOC

MOC

MOC

Pins

100

100

100

100

100

100

100

100

Package Qty

1200

250

1200

250

1200

250

1200

250

Eco Plan (2)

RoHS Compliant

RoHS Compliant

RoHS Compliant

RoHS Compliant

RoHS Compliant

RoHS Compliant

RoHS Compliant

RoHS Compliant

Lead/Ball Finish

NiPdAu

NiPdAu

NiPdAu

NiPdAu

NiPdAu

NiPdAu

NiPdAu

NiPdAu

MSL Peak Temp (°C)

(3)

250

250

250

250

250

250

250

250

Op Temp (°C)

(1) The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.

PRE_PROD Unannounced device, not in production, not available for mass market, nor on the web, samples not available.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2) RoHS Compliance: This product has an RoHS exemption for one or more subcomponent(s). The product is otherwise considered Pb-Free (RoHS compatible) as defined above.

(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

space

–20 to 70

–20 to 70

–20 to 70

–20 to 70

–20 to 70

–20 to 70

–20 to 70

–20 to 70

Important Information and Disclaimer: The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.

TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

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IMPORTANT NOTICE

Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.

TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily performed.

TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide adequate design and operating safeguards.

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Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional restrictions.

Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.

TI is not responsible or liable for any such statements.

Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use of any TI components in safety-critical applications.

In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and requirements. Nonetheless, such components are subject to these terms.

No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties have executed a special agreement specifically governing such use.

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TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.

Products

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Amplifiers

Data Converters

DLP® Products

DSP

Clocks and Timers

Interface

Logic

Power Mgmt

Microcontrollers

RFID

OMAP Applications Processors

Wireless Connectivity www.ti.com/audio amplifier.ti.com

dataconverter.ti.com

www.dlp.com

dsp.ti.com

www.ti.com/clocks interface.ti.com

logic.ti.com

power.ti.com

microcontroller.ti.com

Applications

Automotive and Transportation

Communications and Telecom

Computers and Peripherals

Consumer Electronics

Energy and Lighting

Industrial

Medical

Security

Space, Avionics and Defense

Video and Imaging www.ti-rfid.com

www.ti.com/omap

TI E2E Community

www.ti.com/wirelessconnectivity www.ti.com/automotive www.ti.com/communications www.ti.com/computers www.ti.com/consumer-apps www.ti.com/energy www.ti.com/industrial www.ti.com/medical www.ti.com/security www.ti.com/space-avionics-defense www.ti.com/video e2e.ti.com

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