Anritsu MG3700A Electronic Keyboard User Manual

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MG3700A Vector Signal Generator
MX370x series software
MX3700xxA Waveform pattern
MX3701xxA IQproducer
Superior Expandability Supporting A Wide Variety Of Communication Systems
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MX370x series software
The MG3700A Vector Signal Generator (hereafter referred to as “MG3700A”) is a signal generator that integrates
a 160-MHz high-speed ARB baseband generator. With features that include a broadband vector modulation
bandwidth and large-capacity ARB memory, it supports digital modulation signals for a variety of communication
systems. The MG3700A provides optimal performance for generating signals for new wireless communications
in advancing broadband technology, as well as for major mobile telecommunication systems such as mobile
phones and wireless LANs.
Since the standard MG3700A comes equipped with an ARB generator, modulation signals can be output simply
by selecting a waveform pattern that conforms to each supported communication system. The following four
categories of waveform patterns are available for the MG3700A:
• Standard waveform patterns
• Waveform patterns generated by the optional waveform pattern option (Model: MX3700xxA)
• Waveform patterns generated by the optional waveform generation software IQproducer (Model: MX3701xxA)
• Waveform patterns converted from data generated by commonly-used signal generation software, so
as to be available for the MG3700A.
Each waveform category above contains multiple waveform pattern files in which parameters conforming to
each communication system are set in advance. The default waveform patterns are saved on the MG3700A hard
disk, allowing users to make free use of them. In addition, optional waveform patterns are also available.
The waveform generation software IQproducer is provided with the system to support various communication
methods. Parameter setting for the waveform data of a corresponding communication system can generate an
arbitrary waveform pattern file that can be used by MG3700A.
MG3700A can output signals by choosing a waveform pattern when the generated arbitrary waveform pattern
file is downloaded to MG3700A via LAN or a CompactFlash (CF) card.
Furthermore, an IQ sample file in ASCII format, generated by common EDA (Electronic Design Automation)
software such as MATLAB®, can be converted into a waveform pattern file for MG3700A. Thus, a user can
arbitrarily generate a custom waveform pattern file.
Selection guide
Waveform pattern
Communication system
Page
Standard
IQproducer
MX370002A
Public Radio
System
MX370001A
TD-SCDMA
MX370101A
HSDPA
W-CDMA
4
✓
✓
HSDPA
24
✓
✓
GSM
11
✓
EDGE
11
✓
10
✓
8, 31
✓
CDMA2000
CDMA2000 1xEV-DO
TD-SCDMA
MX370102A
TDMA
✓
✓
18
PDC
13, 14, 28
✓
✓
PHS
12, 28
✓
✓
WLAN IEEE802.11a
15
✓
WLAN IEEE802.11b
15
✓
WLAN IEEE802.11g
15
✓
RCR STD-39
21
✓
ARIB STD-T61
21, 28
✓
✓
ARIB STD-T79
21, 28
✓
✓
ARIB STD-T86
21, 28
✓
✓
AWGN
16
MX370103A
CDMA2000®
1xEV-DO
✓
CDMA2000® is a registered trademark of the Telecommunications Industry Association (TIA-USA).
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The standard waveform
patterns are saved on the
MG3700A hard disk.
Waveform patterns are transferred from
the HDD to ARB memory.
MG3700A Vector Signal Generator
HDD 40GB
ARB memory
1 GB = 256 M samples (Std)
2 GB = 512 M samples (Opt)
W-CDMA
GSM/EDGE
Memory A
CDMA2000
CDMA2000 1xEV-DO
PDC
PHS
WLAN
Output signal
Memory B
AWGN
Waveform patterns can be
selected from both ARB
memories A and B, and
one of the following
methods can be selected
for output:
A only
B only
Addition of A and B
TD-SCDMA
Public radio system
From IQproducer
From IQproducer
Download
Download
Install
MX370001A TD-SCDMA
MX370002A Public radio system
Optional waveform patterns are
saved in the MG3700A once
and then loaded to the
waveform memory for use.
MX370101A
HSDPA IQproducer
MX370102A
TDMA IQproducer
MX370103A
CDMA2000 1xEV-DO IQproducer
IQproducer is PC application software.
The waveform patterns available with the MG3700A can be generated by editing
the parameters for the modulation signals according to the appropriate
communication systems.
The generated waveform patterns are saved in the MG3700A once and then
loaded to the waveform memory for use.
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W-CDMA waveform pattern
Standard
■ W-CDMA waveform pattern:
•For testing receivers and performance of UE
(TS 25.101 DL RMC 12.2 to 384 kbps)
DL_RMC_12_2kbps_RX
DL_RMC_12_2kbps
DL_RMC_12_2kbps_MIL
DL_RMC_12_2kbps_ACS
DL_RMC_64kbps
DL_RMC_144kbps
DL_RMC_384kbps
DL_AMR_TFCS1
DL_AMR_TFCS2
DL_AMR_TFCS3
DL_ISDN
DL_384kbps_Packet
DL_Interfere
P_CCPCH
DL_CPICH
The W-CDMA waveform patterns listed below are provided on
the MG3700A internal hard disk as standard (see the next page
for details):
•For evaluating transmitter device of BS
(TS 25.141 Test Model 1 to 4)
TestModel_1_16DPCH
TestModel_1_32DPCH
TestModel_1_64DPCH
TestModel_1_64x2_10M
TestModel_1_64x2_15M
TestModel_2
TestModel_3_16DPCH
TestModel_3_32DPCH
TestModel_4
TestModel_5_2HSPDSCH
TestModel_5_4HSPDSCH
TestModel_5_8HSPDSCH
TestModel_1_64DPCHx2
TestModel_1_64DPCHx3
TestModel_1_64DPCHx4
Uplink/downlink W-CDMA modulation signals conforming to the
3GPP (FDD) standards can be output simply by selecting a
waveform pattern loaded from the MG3700A internal hard disk
to the large-capacity ARB memory, without setting any complex
3GPP-compliant parameters.
•For testing receivers and performance of BS and
evaluating transmitter devices of UE
(TS 25.101/ 25.104 UL RMC 12.2 to 384 kbps)
UL_RMC_12_2kbps
UL_RMC_12_2kbps_ACS
UL_RMC_64kbps
UL_RMC_144kbps
UL_RMC_384kbps
UL_AMR_TFCS1
UL_AMR_TFCS2
UL_AMR_TFCS3
UL_ISDN
UL_64kbps_Packet
UL_Interfere
UL_RMC_12_2kbps_TX
Example of selecting a waveform pattern
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W-CDMA waveform pattern
Standard
•W-CDMA waveform pattern list
Waveform pattern
UL_RMC_12_2kbps
UL_RMC_12_2kbps_ACS
UL_RMC_64kbps
UL_RMC_144kbps
UL_RMC_384kbps
UL_AMR_TFCS1
UL_AMR_TFCS2
UL_AMR_TFCS3
UL_ISDN
UL_64kbps_Packet
UL_Interfere
UL_RMC_12_2kbps_TX
P_CCPCH
DL_RMC_12_2kbps_RX
DL_RMC_12_2kbps_ACS
DL_RMC_12_2kbps
DL_RMC_12_2kbps_MIL
DL_RMC_64kbps
DL_RMC_144kbps
DL_RMC_384kbps
DL_AMR_TFCS1
DL_AMR_TFCS2
DL_AMR_TFCS3
DL_ISDN
DL_384kbps_Packet
DL_Interfere
DL_CPICH
TestModel_1_16DPCH
TestModel_1_32DPCH
TestModel_1_64DPCH
TestModel_2
TestModel_3_16DPCH
TestModel_3_32DPCH
TestModel_4
UL / DL
∗1
∗1
∗1
UL
∗1
∗2
DL
TestModel_5_4HSPSDCH
TestModel_5_8HSPSDCH
TestModel_1_64DPCHx2
TestModel_1_64DPCHx3
TestModel_1_64DPCHx4
TestModel_1_64x2_10M
TestModel_1_64x2_15M
∗4
∗4
∗4
3GPP (Release1999)
Evaluation
TS25.104 A.2
TS25.104 A.3
TS25.104 A.4
TS25.104 A.5
BS RX test
TS25.944 4.1.2
TS25.141 I
TS25.101 A.2.1
TS25.944 4.1.1∗3
P-CPICH, SCH, PICH, DPCH
∗2
∗2
∗2
∗2
∗2
∗2
∗2
∗2
∗2
∗2
TestModel_5_2HSPSDCH
Channel
DPCCH, DPDCH
DPCCH, DPDCH
DPCCH, DPDCH
DPCCH, DPDCH
DPCCH, DPDCH
DPCCH, DPDCH
DPCCH, DPDCH
DPCCH, DPDCH
DPCCH, DPDCH
DPCCH, DPDCH
DPCCH, DPDCH
DPCCH, DPDCH
P_CCPCH
P-CPICH, P-CCPCH, SCH, PICH, DPCH
P-CCPCH, SCH, PICH, DPCH, OCNS
P-CCPCH, SCH, PICH, DPCH, OCNS
P-CCPCH, SCH, PICH, DPCH, OCNS
P-CCPCH, SCH, PICH, DPCH, OCNS
P-CCPCH, SCH, PICH, DPCH, OCNS
P-CCPCH, SCH, PICH, DPCH, OCNS
P-CCPCH, SCH, PICH, DPCH, OCNS
P-CCPCH, SCH, PICH, DPCH, OCNS
P-CCPCH, SCH, PICH, DPCH, OCNS
P-CCPCH, SCH, PICH, DPCH, OCNS
P-CPICH, P-CCPCH, SCH, PICH, DPCH, OCNS
P-CPICH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, 16 DPCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, 32 DPCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, 64 DPCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, DPCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, 16 DPCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, 32 DPCH
P-CCPCH, SCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH,
6DPCH, HS-SCCH, 2HS-PDSCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH,
14DPCH, HS-SCCH, 4HS-PDSCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH,
30DPCH, HS-SCCH, 8HS-PDSCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, 64 DPCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, 64 DPCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, 64 DPCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, 64 DPCH
P-CPICH, P-CCPCH, SCH, PICH, S-CCPCH, 64 DPCH
UE TX device test
TS25.101 A.3.1
TS25.101 C.3.1
TS25.101 A.3.1
TS25.101 C.3.2
UE RX test
TS25.944 4.1.1.3
TS25.101 C.3.2
TS25.101 C.4
—
TS25.141 6.1.1
BS TX
device test
∗1: UL_ISDN can be combined with AWGN that is a standard waveform pattern only when Option 021/121 ARB Memory Upgrade 512M samples is installed.
∗2: P-CCPCH is not included in the waveform patterns such as RMC for UE RX test. They must be used in combination with P-CCPCH waveform patterns.
∗3: 12-bit SFN is added to the head of the BCH transport block.
∗4: x2, x3, and x4 represent the number of multi-carrier signals 2, 3, and 4, respectively.
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W-CDMA waveform pattern
Standard
■ ACPR:
The adjacent channel leakage power ratio of a Vector Signal Generator is an important factor in device distortion testing and receiver
interference testing.
W-CDMA ACPR (Test Model 1, 64 DPCH, 1carrier)
Waveform pattern [Test_Model_1_64DPCH]
W-CDMA ACPR (Test Model 1, 64 DPCH, 4carrier)
Waveform pattern [Test_Model_1_64DPCH x 4]
■ CCDF:
CCDF (Test Model 1, 64 DPCH, 1carrier)
Waveform pattern [Test_Model_1_64DPCH]
CCDF (Test Model 1, 64 DPCH, 4carrier)
Waveform pattern [Test_Model_1_64DPCH x 4]
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W-CDMA waveform pattern
Standard
■ AWGN (Additive White Gaussian Noise) Supports Dynamic Range Test
When performing the receiver dynamic range test specified by 3GPP, AWGN with a W-CDMA modulation signal is required.
Either of the AWGN waveform patterns AWGN_3_84MHz_x2 or AWGN_3_84MHz_x1_5, which are stored on the MG3700A internal
hard disk, can be used for an AWGN signal.
Since a single MG3700A can add a W-CDMA uplink modulation signal and AWGN signal internally and output them as a combined
signal, it is useful for a simple dynamic range test for base station receivers.
Wanted signal + AWGN screen
Output waveform screen of Wanted signal + AWGN
Wanted signal + Interfering signal screen
Output waveform screen of Wanted signal + Interfering signal
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CDMA2000 1xEV-DO waveform pattern
Standard
■ CDMA2000 1xEV-DO waveform pattern:
•Access terminal (AT) receiver test
CDMA2000 1xEV-DO forward
Base band filter: IS-95SPEC +EQ
Data: PN15fix∗ (excluding FWD-Idle)
FWD_38_4kbps_16slot
FWD_76_8kbps_8slot
FWD_153_6kbps_4slot
FWD_307_2kbps_2slot
FWD_614_4kbps_1slot
FWD_307_2kbps_4slot
FWD_614_4kbps_2slot
FWD_1228_8kbps_1slot
FWD_921_6kbps_2slot
FWD_1843_2kbps_1slot
FWD_1228_8kbps_2slot
FWD_2457_6kbps_1slot
FWD_Idle
The CDMA2000 1xEV-DO waveform patterns listed on the right
are provided on the MG3700A internal hard disk.
The signals for testing the receiver and transmitter of the
CDMA2000 1xEV-DO access network (base station) and
access terminal (mobile station), which are specified in 3GPP2,
can be output by selecting one of these CDMA2000 1xEV-DO
waveform patterns. Thirteen forward and ten reverse data rate
waveform patterns are available.
When multi-carrier signals, mixed signals of idle and active,
and/or multi-user signals are required, parameter setting and
waveform pattern generation are available using the optional
MX370103A CDMA2000 1xEV-DO IQproducer.
•Access network (AN) receiver test
CDMA2000 1xEV-DO Reverse
Base band filter: IS-95SPEC
Data: PN9fix∗
RVS_9_6kbps_RX
RVS_19_2kbps_RX
RVS_38_4kbps_RX
RVS_76_8kbps_RX
RVS_153_6kbps_RX
RVS_9_6kbps_TX
RVS_19_2kbps_TX
RVS_38_4kbps_TX
RVS_76_8kbps_RT
RVS_153_6kbps_RT
Example of selecting a waveform pattern
∗ This is a PN sequence delimited for each packet.
Therefore, the PN
sequence is discontinuous between the end data of a packet and the
start data of the next packet.
•Access terminal (AT) receiver test
3GPP2 C.S0033 standard receiver tests (PER: Packet Error Rate) can be performed by selecting a forward signal pattern
required for testing the AT. No protocol is supported for the access network simulator. In addition, all the transmission channels
are traffic, and all the other channels (e.g., Sync) are unsupported; it is necessary to calculate the PER by controlling the AT
using an external controller.
MG3700A Vector Signal Generator
Modulation signal
(Downlink)
AT
8
AT control, PER calculation
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CDMA2000 1xEV-DO waveform pattern
Standard
•Access network (AN) receiver test
GPP2 C.S0032 standard receiver tests (PER: Packet Error Rate) can be performed by selecting a reverse signal pattern required
for testing the AN. Since access terminal simulator protocols are not supported, an external controller must be used to control the
AN and calculate PER.
MG3700A Vector Signal Generator
Trigger∗, Clock∗
Modulation signal (Uplink)
AN
AN control, PER calculation
∗ Trigger: Timing for synchronizing the start of frame (frame trigger)
∗ Clock: Clock for synchronizing the chip rate 1.2288 Mcps (11 x 1.2288 MHz or 5MHz/10 MHz)
■ AWGN Supports Dynamic Range Test
(AWGN: Additive White Gaussian Noise)
When performing the receiver dynamic range test specified by
3GPP2, a 1xEV-DO modulation signal with AWGN is required.
Either of the AWGN waveform patterns AWGN_1.23MHz_x2 or
AWGN_1.23MHz_x1_5, which are stored on the MG3700A
internal hard disk, can be used for an AWGN signal.
Since a single MG3700A can add a CDMA2000 uplink
modulation signal and an AWGN signal internally and output
them as a combined signal, it is useful for a simple dynamic
range test for an AN receiver.
Wanted signal + AWGN screen
Output waveform screen of wanted signal + AWGN
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CDMA2000 waveform pattern
Standard
■ CDMA2000 waveform pattern:
The CDMA2000 waveform patterns listed in the table below are
provided on the MG3700A internal hard disk.
CDMA2000 modulation signals specified in 3GPP2 C.S0002-0-2
can be output by selecting one of these CDMA2000 waveform
patterns.
Since reverse channel signals are output by channel coding
(convolutional coding, etc.) 4-frame length PN9 fix ∗1 data, it is
useful for Frame Error Rate (FER) measurement∗2 of the base
station, as well as device evaluation.
∗1: The data length is not an integer multiple of the PN sequence
length (511 bits for PN9), and the PN sequence becomes
discontinuous at the end.
2: This is the case where the timing signal and 1.2288 Mcps x 11
clock signal (or 5 or 10 MHz reference clock) can be input from the
test target base station to the MG3700A in order to provide
synchronization of the frame start point and chip clock.
∗
Waveform pattern
RVS_RC1_FCH
RVS_RC2_FCH
RVS_RC3_FCH
RVS_RC3_FCH/SCH
RVS_RC3_DCCH
RVS_RC4_FCH
FWD_RC1-2_9channel
FWD_RC3-5_9channel
CDMA2000
CDMA2000
CDMA2000
CDMA2000
CDMA2000
CDMA2000
CDMA2000
CDMA2000
Waveform pattern
Example of selecting waveform pattern
System
1xRTT RC1 Reverse
1xRTT RC2 Reverse
1xRTT RC3 Reverse
1xRTT RC3 Reverse
1xRTT RC3 Reverse
1xRTT RC4 Reverse
1xRTT RC1, RC2 Forward
1xRTT RC3, RC4, RC5 Forward
Walsh Code
Frame coding
Coded
Coded
Coded
Coded
Coded
Coded
spreading only
spreading only
Code Power
Symbol data
FCH 9.6 kbps
FCH 14.4 kbps
PICH, FCH 9.6 kbps
PICH, FCH 9.6 kbps, SCH 9.6 kbps
PICH, DCCH 9.6 kbps
PICH, FCH 14.4 kbps
PICH, SyncCH, PagingCH, FCH 19.2 ksps x 6
PICH, SyncCH, PagingCH, FCH 38.4 ksps x 6
Data Rate
Data
RVS_RC1_FCH
R-FCH
RVS_RC2_FCH
R-FCH
14.4 kbps
PN9fix∗
PN9fix∗
RVS_RC3_FCH
R-PICH
R-FCH
0
4
–5.278 dB
–1.528 dB
N/A
9.6 kbps
All "0"
PN9fix∗
RVS_RC3_FCH/SCH
R-PICH
R-FCH
R-SCH
0
4
2
–7.5912 dB
–3.8412 dB
–3.8412 dB
N/A
9.6 kbps
9.6 kbps
All"0"
PN9fix∗
PN9fix∗
RVS_RC3_DCCH
R-PICH
R-DCCH
0
8
–5.278 dB
–1.528 dB
N/A
9.6 kbps
All"0"
PN9fix∗
RVS_RC4_FCH
R-PICH
R-FCH
0
4
–5.278 dB
–1.528 dB
N/A
14.4 kbps
All"0"
PN9fix∗
Waveform pattern
9.6 kbps
Walsh Code
Code Power
FWD_RC1-2_9channel
F-PICH
F-SyncCH
PagingCH
F-FCH x6
0
32
1
8-13
–7.0
–13.3
–7.3
–10.3
dB
dB
dB
dB
N/A
4.8 kbps
19.2 kbps
19.2 kbps
All"0"
PN9fix∗
PN9fix∗
PN9fix∗
FWD_RC3-5_9channel
F-PICH
F-SyncCH
PagingCH
F-FCH x6
0
32
1
8-13
–7.0
–13.3
–7.3
–10.3
dB
dB
dB
dB
N/A
4.8 kbps
19.2 kbps
38.4 kbps
All"0"
PN9fix∗
PN9fix∗
PN9fix∗
R-PICH (Reverse Pilot Channel),
R-FCH (Reverse Fundamental Channel)
R-SCH (Reverse Supplemental Channel)
R-DCCH (Reverse Dedicated Control Channel)
F-PICH (Forward Pilot Channel),
F-SyncCH (Forward Sync Channel),
PagingCH (Paging Channel),
F-FCH (Forward Fundamental Channel)
10
Symbol Rate
Symbol Data
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GSM/EDGE waveform pattern
Standard
■ GSM/EDGE waveform pattern:
The GSM/EDGE waveform patterns listed in the table below
are provided on the MG3700A internal hard disk.
The signals suitable for testing receivers and for managing
device evaluation in a GSM/EDGE system can be output by
selecting one of these GSM/EDGE waveform patterns.
• GMSK_PN9, 8PSK_PN9
PN9 data is inserted into the entire area of the slots, except the
guard. The PN9 data in each slot are continuous.
• GMSK_TN0, 8PSK_TN0
PN9 data is inserted into the entire area of the slots, except the
guard. The PN9 data in each slot are continuous.
• NB_TN0, NB_ALL
PN9 data is inserted into the normal burst encrypted bit area.
The PN9 data in the slots are continuous.
• TCH_FS
Supports the Speech channel at the full rate (TCH/FS) specified
in Section 3.1 of 3GPP TS05.03.
• CS-1_1 (4)_SLOT (_4SLOT )
Supports the packet data block type 1 (CS-4) and 4 (CS-1)
specified in Section 5.1 of 3GPP TS05.03.
• DL (UL)_MCS-1 (5, 9)_1SLOT (_4SLOT)
Supports the packet data block types 5(MCS-1), 9(MCS-5), and
13 (MCS-9) specified in Section 5.1 of 3GPP TS05.03.
Waveform pattern
Example of selecting waveform pattern
Uplink / Downlink
Data
GMSK_PN9
Uplink / Downlink
Uplink / Downlink
PN9 ∗1
–
8PSK_PN9
–
–
GMSK_TN0
Uplink / Downlink
–
8PSK_TN0
Uplink / Downlink
PN9 ∗2
TN0
TN0
–
NB_TN0
Uplink / Downlink
NB_ALL
Uplink / Downlink
PN9 ∗3
Output slot
All slot
Uplink / Downlink
TN0
CS-1_1SLOT
Uplink / Downlink
TN0
CS-4_1SLOT
Uplink / Downlink
TN0
DL_MCS-1_1SLOT
Uplink / Downlink
TN0
UL_MCS-1_1SLOT
Uplink / Downlink
TN0
DL_MCS-5_1SLOT
Uplink / Downlink
Uplink / Downlink
TN0
DL_MCS-9_1SLOT
Uplink / Downlink
TN0
UL_MCS-9_1SLOT
Uplink / Downlink
TN0
DL_MCS-9_4SLOT
Uplink / Downlink
TN0, 1, 2, 3
UL_MCS-9_4SLOT
Uplink / Downlink
TN0, 1, 2, 3
11
GSM
GPRS
TN0
UL_MCS-5_1SLOT
∗1: PN9 data is inserted into the entire area that does not have the slot format.
∗2: PN9 data is inserted into the entire area of the slots, except the guard.
∗3: PN9 is inserted into the normal burst encrypted bit area.
∗4: The bit string channel-coded for PN9 data is inserted into the normal burst encrypted bit area.
–
TN0
TCH_FS
PN9 ∗4
Communications
EDGE
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PHS waveform pattern
Standard
■ PHS waveform pattern:
The PHS waveform patterns listed in the table below are
provided on the MG3700A internal hard disk.
The signals for testing CS (base station) and PS (mobile station)
receivers, which are specified in RCR STD-28, can be output
by selecting one of these PHS waveform patterns, without
setting any complex RCR STD-28 parameters.
When a signal that has parameters different from those of the
provided waveform patterns are required, parameter setting
and waveform pattern generation are available using the
optional MX370102A TDMA IQproducer.
Example of selecting waveform pattern
Uplink / Downlink
Scramble
PI_4_DQPSK_PN9
Waveform pattern
—
OFF
No frame
Output slot
PI_4_DQPSK_PN15
—
OFF
No frame
PI_4_DQPSK_ALL0
—
OFF
No frame
DL_TCH_Slot_1
Uplink / Downlink
OFF
Slot1: TCH
Slot 2 to 4: off
UL_TCH_Slot_1
Uplink / Downlink
OFF
Slot1: TCH
Slot 2 to 4: off
• PS receiver test
MG3700A Vector Signal Generator
Modulation signal (Downlink)
Data, Clock
BER analyzer is built in.
PS
• PS receiver test
MG3700A Vector Signal Generator
Trigger∗
Modulation signal (Uplink)
Data, Clock
BER analyzer is built in.
CS
∗ Trigger: Timing for synchronizing frames (frame trigger)
12
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PDC waveform pattern
Standard
■ PDC waveform pattern:
The waveform patterns for the wanted signals/interfering signals
required to execute transmission/reception tests as specified in
ARIB STD-27 are provided on the MG3700A internal hard disk.
Modulation signals conforming to the standard can be output
without any options (Note: Check the parameters listed on the
next page in advance).
The waveform pattern to output uplink/downlink Slot 0 data
only and the unframed waveform pattern for interfering signals
are provided for full rate and half rate, respectively.
When a signal is required that has parameters different from
those of the provided waveform patterns, parameter setting and
waveform pattern generation are available using the optional
MX370102A TDMA IQproducer.
Example of selecting waveform pattern
Waveform pattern
PI_4_DQPSK_PN9
Uplink / Downlink
Half rate / Fill rate
—
—
No frame
Output slot
TX device test
Evaluation
Interfering signal
PI_4_DQPSK_PN15
—
—
No frame
DL_Full_Rate_Slot0
Uplink / Downlink
Full rate
Slot 0 only
DL_Half_Rate_Slot0
Uplink / Downlink
Half rate
Slot 0 only
Wanted signal for
UL_Full_Rate_Slot0
Uplink / Downlink
Full rate
Slot 0 only
receiver test
UL_Half_Rate_Slot0
Uplink / Downlink
Half rate
Slot 0 only
13
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PDC Packet waveform pattern
Standard
■ PDC Packet waveform pattern:
The four types of waveform patterns listed in the table below
are provided on the MG3700A internal hard disk.
The signals for testing base station and mobile station
receivers for UPCH communications, which are specified in
RCR STD-27, can be output by selecting one of these
waveform patterns, without setting any complex RCR STD-27
parameters. Also, the Downlink3 data rate UPHC pattern and
Uplink1 UPHC pattern can be switched.
When a signal is required that has parameters different from
those of the provided waveform patterns, parameter setting and
waveform pattern generation are available using the optional
MX370102A TDMA IQproducer.
Example of selecting waveform pattern
Waveform pattern
DL_Packet_Slot_0
Uplink / Downlink
Output slot
Slot 0 = UPCH
Slot 1 = IDLE (all "1")
Uplink / Downlink
Slot 2 = IDLE (all "1")
DL_Packet_Slot_01
Uplink / Downlink
DL_Packet_Slot_all
Uplink / Downlink
Slot 0 = UPCH
Slot 1 = UPCH
Slot 2 = IDLE (all "1")
Slot 0 = UPCH
Slot 1 = UPCH
Slot 2 = UPCH
UL_Packet_Slot_0
Slot 0 = UPCH
Slot 1 = Transmit off
Slot 2 = Transmit off
Uplink / Downlink
• Mobile station test
MG3700A Vector Signal Generator
Modulation signal (Downlink)
Data, Clock
BER analyzer is built in.
Mobile device
• Base station test
MG3700A Vector Signal Generator
Trigger∗
Modulation signal (Uplink)
Data, Clock
BER analyzer is built in.
Base station
∗ Trigger: Timing for synchronizing sub frames (frame trigger)
14
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WLAN waveform pattern
Standard
■ WLAN waveform pattern:
The WLAN (IEEE802.11a/b/g) waveform patterns listed in the
table below are provided on the MG3700A internal hard disk.
The signals for testing the receiver/transmitter of a terminal or
module can be output by selecting one of these WLAN
waveform patterns.
Example of selecting waveform pattern
• IEEE_802.11a waveform pattern list
Waveform pattern
11a_OFDM_6Mbps
Data rate
(Mbits/s)
Modulation
Coding rate
Coding bits per
sub-carrier
Coding bits per
OFDM symbol
Data bits per
OFDM symbol
6
BPSK
1/2
1
48
24
36
11a_OFDM_9Mbps
9
BPSK
3/4
1
48
11a_OFDM_12Mbps
12
QPSK
1/2
2
96
48
11a_OFDM_18Mbps
18
QPSK
3/4
2
96
72
11a_OFDM_24Mbps
24
16-QAM
1/2
4
192
96
11a_OFDM_36Mbps
36
16-QAM
3/4
4
192
144
11a_OFDM_48Mbps
48
64-QAM
2/3
6
288
192
11a_OFDM_54Mbps
54
64-QAM
3/4
6
288
216
• IEEE_802.11b waveform pattern list
Waveform pattern
Spreading, Coding
Modulation
11b_DSSS_1Mbps
DSSS, 11 chip Barker Code
DBPSK
11b_DSSS_2Mbps
DSSS, 11 chip Barker Code
DQPSK
11b_CCK_5_5Mbps
CCK
DQPSK
11b_CCK_11Mbps
CCK
DQPSK
• IEEE_802.11g waveform pattern list
Waveform pattern
Data rate
(Mbits/s)
Modulation
Coding rate
Coding bits per
sub-carrier
Coding bits per
OFDM symbol
Data bits per
OFDM symbol
11g_DSSS_OFDM_6Mbps
6
BPSK
1/2
1
48
24
11g_DSSS_OFDM_9Mbps
9
BPSK
3/4
1
48
36
11g_DSSS_OFDM_12Mbps
12
QPSK
1/2
2
96
48
11g_DSSS_OFDM_18Mbps
18
QPSK
3/4
2
96
72
11g_DSSS_OFDM_24Mbps
24
16-QAM
1/2
4
192
96
11g_DSSS_OFDM_36Mbps
36
16-QAM
3/4
4
192
144
11g_DSSS_OFDM_48Mbps
48
64-QAM
2/3
6
288
192
11g_DSSS_OFDM_54Mbps
54
64-QAM
3/4
6
288
216
15
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AWGN waveform pattern
Standard
■ AWGN waveform pattern:
The Additive White Gaussian Noise (AWGN) waveform patterns listed in the table below are provided on the MG3700A
internal hard disk.
The signals for testing the receiver/transmitter of a terminal or
module can be output by selecting one of these AWGN
waveform patterns.
Example of selecting a waveform pattern
MAX peak/RMS
3dB bandwidth
ratio
(MHz)
In-band power
conversion ratio (dB)∗
AWGN_3_84MHz_x2
>12 dB
7.68
3.01
AWGN_3_84MHz_x1_5
>12 dB
5.76
1.76
Added with the W-CDMA UL signal to
perform a dynamic range test.
AWGN_1.23MHz_x2
>12 dB
2.46
3.01
Added with the reverse signals of
CDMA2000 or CDMA2000 1xEV-DO to
perform a dynamic range test.
AWGN_1.23MHz_x1_5
>12 dB
3.69
1.76
Added with the reverse signals of
CDMA2000 or CDMA2000 1xEV-DO to
perform a dynamic range test.
Waveform pattern
Evaluation
Added with the W-CDMA UL signal to
perform a dynamic range test.
∗ In-band power conversion ratio is the ratio of the system bandwidth of each communication system to the total power of the MG3700A output measured with a
power meter or another equivalent device.
AWGN band width
System band width
Wanted signal
In-band
AWGN
power
AWGN
WGN
In-band AWGN power
16
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Page 17
AWGN waveform pattern
Standard
■ With the waveform combine function, a single MG3700A outputs a signal that is the addition (such
as modulation signal + AWGN) of the wanted signal and interfering signal:
The MG3700A has ARB memory that consists of two memory areas, each allowing one waveform pattern to be set. The addition of
the signals from the two memories, as well as the signal for either one, can be output.
For example, if a wanted signal (W-CDMA, CDMA2000) waveform pattern is selected for one memory and an interfering signal
(AWGN) waveform pattern for the other, a signal that is the addition of the wanted signal and interfering signal (AWGN) shown in the
upper figures below can be output with a single MG3700A.
Also, if a modulation signal is selected as the interfering signal, the addition of the wanted signal and interfering signal (modulation
signal) shown in the lower figures below can also be output with a single MG3700A.
Furthermore, the accuracy of the level ratio is superior since the S/N adjustment and calculation are performed by digital processing.
Wanted signal + AWGN screen
Output waveform screen of wanted signal + AWGN
Wanted signal + interfering signal screen
Output waveform screen of wanted signal + interfering signal
17
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MX370001A TD-SCDMA waveform pattern
Optional
■ TD-SCDMA waveform pattern:
■ Simple operation and high speed signal
pattern change:
The signals corresponding to the 3GPP 1.28Mcps TDD options
can be output by installing the MX370001A TD-SCDMA
waveform pattern on the MG3700A.
Typical waveforms specified in 3GPP, such as the reference
management channel, can be output simply by selecting the
waveform pattern loaded from the MG3700A internal hard disk
to the large-capacity ARB memory, without setting any complex
TD-SCDMA parameters.
•For evaluating transmitter of BS •For evaluating receiver of UE
(TS 25.141 Test Model 1 to 4)
BS_DL RMC 1Code
BS_DL RMC 1Code+P-CCPCH
BS_DL RMC 8Code
BS_DL RMC 10Code
UE_DL RMC
UE_DL RMC
UE_DL RMC
UE_DL RMC
UE_DL RMC
12.2k
12.2k+OCNS
64k+OCNS
144k+OCNS
384
•For evaluating receiver of BS
BS_UL RMC
BS_UL RMC
BS_UL RMC
BS_UL RMC
BS_UL RMC
12.2k(Single)
12.2k+OCNS
64k+OCNS
144k+OCNS
384
PC
MG3700A Vector Signal Generator
MX370001A
LAN or Compact Flash
• Waveform patterns for evaluating BS transmitters
Target of test
Test signal
Waveform pattern
Test
Standard
DwPTS/UpPTS
SYNC_DL/UL
NUMBER (quadruples)
P-CCPCH
Scrambling Code
midamble ID
Maximum User
(user number)
Spread Factor
Time Slot Number
Number of DPCH0
DPCH Channelization Codes
DPCH0 Channelization Codes
Data:DPCH0
Data: other channel
∑ DPCH_Ec/Ior [dB]
DPCH0_Ec/Ior [dB]
DPCH Channelization
Codes Power [dB]/1 ch
DPCH0 Channelization
Codes Power [dB]/1 ch
rmc_1 code_bs_dl
Freq / Power Ctrlr /
Minimum Pwr
BS Transmitter Test (DL)
BS
BS-DL RMC
rmc_P-CCPCH_bs_dl
rmc_8 code_bs_dl
OBW / On Off Ratio / Max Pwr /
PCCPCH Pw
spurious / ACLR / TxIM
TS25.142
rmc_10 code_bs_dl
EVM /
Peak code domain err
SYNC_DL #0
(S1)
SYNC_DL #0
(S1)
SYNC_DL #0
(S1)
SYNC_DL #0
(S1)
—
0
0
add
0
0
—
0
0
—
0
0
2 (1)
8 (1)
2 (1)
2 (1)
16
4, 5, 6
—
C (i, 16), i = 1
—
PN9
—
0
—
16
0
—
C (i, 16), i = 1, 2
—
—
P-CCPCH:All 0
—
—
16
4, 5, 6
0
C (i, 16), 1 ≤ i ≤8
—
PN9
—
0
—
16
4, 5, 6
0
C(i, 16), 1 ≤ i ≤10
—
PN9
—
0
—
0
—
–9
–10
—
—
—
—
18
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MX370001A TD-SCDMA waveform pattern
Optional
• Waveform patterns for evaluating BS receivers
Target of test
Test signal
Waveform patterns
Test
rmc12_2k_bs_ul
RS / Min. Input Lev./
Dynamic range /ACS /
Blocking / Rx IM
BS Receive Test (UL)
BS
BS-UL RMC
rmc12k_ocns_bs_ul rmc64k_ocns_bs_ul
Performance Req.
Performance Req.
rmc144k_bs_ul
rmc384k_bs_ul
Performance Req.
Performance Req.
Standard
DwPTS/UpPTS/SYNC_DL/UL
NUMBER (quadruples)
P-CCPCH
Scrambling Code
midamble ID
Maximum User (user number)
Spread Factor
Time Slot Number
Number of DPCH
TS25.142
—
—
—
—
—
—
0
0
2 (1)
8
1
0
—
0
0
2 (1)
8
1
4
—
0
0
2 (1)
2, 8
1
1
—
0
0
2 (1)
2, 8
1, 2
1
DPCH Channelization Codes
C (i, 8), i = 1
C (i, 8), i = 1
C (i, 2), i = 1
C (i, 2), i = 1
DPCH0 Channelization Codes
Data: DPCH0
Data: other channel
∑ DPCH_Ec/Ior [dB]
DPCH0_Ec/Ior [dB]
DPCH Channelization Codes
Power [dB] / 1 ch
DPCH0 Channelization Codes
Power [dB] / 1 ch
—
PN9
—
0
—
C (i, 8), 2≤ i ≤5
PN9
PN9
—
–7
C (i, 8), i = 5
PN9
PN9
—
–7
C (i, 8), i = 5
PN9
PN9
—
–7
0
–7
–0.97
–0.97
—
0
0
2 (1)
8, 2
1, 2, 3, 4
0
C (i, 2) i = 1
C (i, 8) i = 5
—
PN9
—
0
—
C (i, 2) = –6.99
C (i, 8) = –0.97
—
–7
–7
–7
—
• Waveform patterns for evaluating receiver of UE
Target of test
Test signal
Waveform pattern
Test
Standard
DwPTS/UpPTS SYNC_DL/UL
NUMBER (quadruples)
P-CCPCH
Scrambling Code
midamble ID
Maximum User (user number)
Spread Factor
Time Slot Number
Number of DPCH0
DPCH Channelization Codes
DPCH0 Channelization Codes
Data:DPCH0
Data: other channel
∑ DPCH_Ec/Ior [dB]
DPCH0_Ec/Ior [dB]
DPCH Channelization Codes
Power [dB] / 1ch
DPCH0 Channelization Codes
Power [dB / 1 ch
UE Receiver Test (DL)
UE
UE-DL RMC
rmc12_2k_ue_dl
rmc12k_ocns_ue_dl rmc64k_ocns_ue_dl rmc144k_ocns_ue_dl
RS / Min. Input Lev. / Maximum input level
ACS / Blocking /
test / RMC 12.2k
Performance Req.
Performance Req.
Spur.Resp. / Inter Mod
TS25.102
SYNC_DL #0
SYNC_DL #0
SYNC_DL #0
SYNC_DL #0
(S1)
(S1)
(S1)
(S1)
Add
Add
Add
Add
0
0
0
0
0
0
0
0
8 (1)
8 (1)
8 (1)
8 (1)
16
16
16
16
4
4
4
4, 5
0
8
2
2
C (i, 16), i = 1, 2
C (i, 16), i = 1, 2
C (i, 16), i = 1,…, 8 C (i, 16), i = 1,…, 8
C (i, 16)
C (i, 16)
C (i, 16)
—
3≤ i ≤10
9≤ i ≤10
9≤ i ≤10
PN9
PN9
PN9
PN9
—
PN9
PN9
PN9
0
–7
—
—
—
–10
–10
–10
rmc384k_ue_dl
Performance Req.
SYNC_DL #0
(S1)
Add
0
0
8 (1)
16
3, 4, 5, 6
0
C (i, 16)i = 1,…, 10
—
PN9
—
—
0
–3.01
–10.00
–10.00
–10.00
–10
—
–10.00
–10.00
–10.00
—
19
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MX370001A TD-SCDMA waveform pattern
Optional
■ Frame configuration
•UL-RMC12.2 kbps: For BS receiver test (Uplink):
TS-25.142: BS UL reference measurement channel p132, A2.1.2, 1.28 MCps, SF = 8
Test items: 7.2 Reference sensitivity level / 7.3 Dynamic range / 7.4 Adjacent Channel Selectivity (ACS) / 7.5 Blocking characteristics /
7.6 Inter modulation characteristics
Time slot
#0
C (8,1)
Dw
PTS
m (1)
GP
C (8,1)
Up
PT
Time slot
#1
Time slot
#2
GP (ts)
Time Slot
16 chip
Time slot
#3
Time slot
#4
Time slot
#6
Time slot
#5
DPCH ( DPCH )
1) DTCH information bits: PN9
2) TFCI (4bits): 0
3) TPC (4bits): 0101: No power control
4) SS (4bits): 0101: No shift
5) Scrambling Code: 0
6) Midamble Code: MID=0, K=2, k=1
7) Channelization Code: C (8, 1)
•UL-RMC12.2 kbps: For UE receiver test (Uplink):
TS-25.102: UE DL reference measurement channel p58, A.2.2.2.1, 1.28 MCps, 12.2 kbps, SF = 16
Test items: 7.3 Reference sensitivity level / 7.4 Maximum input level / 7.5 Adjacent Channel selectivity (ACS) / 7.6 Blocking
characteristics / 7.7 Spurious response / 7.8 Inter modulation characteristics
Time slot
#0
Dw
PTS
GP
Up
PT
Time slot
#1
Time slot
#2
Time slot
#3
Time slot
#4
C1, C2
Time slot
#5
m (1)
C1, C2
DwPTS
SYNC-DL ID: 0
Phase quadruple: S1: P-CCPCH
Time slot
#6
GP (ts) Time
16 chip Slot
DPCH ( DPCH1, DPCH2)
P-CCPCH (P-CCPCH1, P-CCPCH2)
1) Information bits: data (246 bit):
Frame Number/2 is inserted to the first 11 bits, and 0s
are stored in the remaining bits. The frame number is a
repeated value of 0, 1, 2, and 3.
2) Scrambling Code: 0
3) Midamble Code: MID= 0, K =8, k =1
4) Channelization Code: C(16, 1), C(16, 2)
20
1)
2)
3)
4)
5)
6)
7)
DTCH information bits: PN9
DCCH information bits: ALL0
TFCI (4bits): 0
TPC (4bits): 0101: No power control
SS (4bits): 0101: No shift
Scrambling Code: 0
Midamble Code: MID=0, K=2, k=1
Default midamble
8) Channelization Code: C(16, 1), C(16, 2)
*MX370X_E_050127
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MX370002A Public radio system waveform pattern
Optional
■ Public radio system waveform pattern:
The signals for testing the receiver/tester specified in the ARIB
standards can be output by selecting a waveform pattern
loaded from the MG3700A internal hard disk to the largecapacity ARB memory, without setting any complex ARIB standard
parameters. The TCH/CCH pattern, PN9 pattern, and PN15
continuous modulation pattern can be switched quickly.
The downlink/uplink modulation signals of the following ARIB
standards can be output by installing the MX370002A Public
radio system waveform pattern on the MG3700A:
•RCR STD-39
Waveform pattern
Uplink / Downlink
Transmit frame
UpLink
Uplink / Downlink
0, x, x, x
DownLink 1
Uplink / Downlink
0, x, x, x
DownLink 4
Uplink / Downlink
0, 1, 2, 3
DownCCH 4
Uplink / Downlink
0, 1, 2, 3
PN9
—
—
PN15
—
—
Waveform pattern
Uplink / Downlink
Transmit frame
UpDownLink
Uplink / Downlink
0, 0, 0, 0
40ms_Burst_all
Uplink / Downlink
0, 1, 2, 3
20ms_Burst_all
Uplink / Downlink
0, 1, 2, 3
40ms_Burst_1_4
Uplink / Downlink
0, x, x, x,
20ms_Burst_1_8
Uplink / Downlink
0, x, x, x, x, x, x, x
Sampling Rate
Symbol Rate
128 kHz
16 kHz
•ARIB STD-T61
PN9
—
—
PN15
—
—
Sampling Rate
Symbol Rate
76.8 kHz
4.8 kHz
PC
MG3700A Vector Signal Generator
MX370002A
LAN or Compact Flash
21
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MX370002A Public radio system waveform pattern
Optional
•ARIB STD-T79
•ARIB STD-T61 frame configuration
Waveform pattern
Uplink / Downlink
UpLink
Uplink / Downlink
0, x, x, x
DownLink 1
Uplink / Downlink
0, x, x, x
DownLink 4
Uplink / Downlink
0, 1, 2, 3
Direct
Uplink / Downlink
1, x, x, x
The uplink/downlink frames both generate data in cycles of 40
ms defined as a basic frame length. The PN9 pseudo random
pattern of TCH in a frame has continuity in each frame.
Transmit frame
40 ms
PN9
—
—
PN15
—
—
Frame 0
Frame 1
PN9 is continuous in each frame.
Sampling Rate
Symbol Rate
128 kHz
16 kHz
•ARIB STD-T86 frame configuration
One frame consists of 6 slots and the data is generated in this
frame cycle. The PN9 pseudo random pattern of TCH in a slot
has continuity in all slots.
•ARIB STD-T86
Waveform pattern
Uplink / Downlink
Down_tch
Uplink / Downlink
0, 1, 2, x, 4, 5
Transmit frame
Down_tch_all
Uplink / Downlink
0, 1, 2, x, 4, 5
Down_cch
Uplink / Downlink
x, x, x, 3, x, x
Up_tch
Uplink / Downlink
x, x, x, 3, x, x
Up_cch
Uplink / Downlink
x, x, x, 3, x, x
PN9
—
—
PN15
—
—
Sampling Rate
Symbol Rate
UpLink CCH
1 Frame 80 ms
Slot 0
off
Slot 1
off
90 kHz
11.25 kHz
Slot 0
off
Slot 1
off
The uplink frame (TDMA) and downlink frame (TDM) both
generate data in frame cycles of 4-slot length (40 ms) defined
as a basic frame length. The PN9 pseudo random pattern of
the traffic channel (hereinafter called TCH) in a slot is
independent per slot and has continuity.
Slot 0
TCH
Slot 0
CCH
Slot 3
Slot 0 Slot 1
Slot 2
Slot 5
off
Slot 2
off
Slot 3
TCH
Slot 4
off
Slot 5
off
Slot 1
TCH
Slot 2
TCH
Slot 3
TCH
Slot 4
TCH
Slot 5
TCH
Slot 4
off
Slot 5
off
Slot 4
off
Slot 5
off
DownLink CCH
1 Frame 80 ms
40 ms
Slot 2
Slot 4
off
DownLink TCH (all Slot)
1 Frame 80 ms
•RCR STD-39, ARIB STD-T79 frame configuration
Slot 1
Slot 3
CCH
UpLink TCH
1 Frame 80 ms
■ Frame configuration
Slot 0
Slot 2
off
Slot 1
off
Slot 2
off
Slot 3
off
Slot 3
DownLink TCH
1 Frame 80 ms
PN9 is continuous in the same slot.
Slot 0
CCH
22
Slot 1
TCH
Slot 2
TCH
Slot 3
off
*MX370X_E_050127
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MX370002A Public radio system waveform pattern
Optional
■ Signal formats in each system
• Downlink
R
6
•RCR STD-39, slot format
The signal formats in uplink/downlink are as follows.
P
2
TCH
148
SW I CC SACCH
20
20 2 6
R: Guard time for burst transient response
P: Preamble
TCH: Traffic channel
SW: Sync word
I: Idle bit (all “0”)
CC: Color code (Counterinterference code)
SACCH: Slow ACCH
G: Guard time
TCH
108
P
2
G
8
00H (6 bit)
2H (2 bit)
Continuous PN9
785B4H (Slot 0) (20 bit)
0H (2 bit)
00H (6 bit)
00000H (20 bit)
00H (8 bit)
SW CI CC SACCH
20
20 2 6
TCH
144
B/I
8
00H (6 bit)
2H (2 bit)
Continuous PN9
87A4BH (Slot 0),
9D236H (Slot 1),
81D75H (Slot 2),
A94EAH (Slot 3) (20 bit)
CI: Control channel communication information 11H (2 bit)
CC: Color code (Counterinterference code) 00H (6 bit)
SACCH: Slow ACCH
00000H (20 bit)
B/I: Busy/Idle bit
FFH (8 bit)
SW undefined
20
20
LP+R: Preamble for linearizer and guard
time for burst transient response
Pa: Preamble
TCH: Traffic channel
RI: Radio information channel
SW: Sync word
Undefined:
R TCH P
16 24 4
TCH
160
00000000H (30 bit)
2H (2 bit)
Continuous PN9
00000000000000H (56 bit)
1E56FH (20 bit)
00000H (20 bit)
SW I CC SACCH
20
20 2 6
R: Guard time for burst transient response
P: Preamble
TCH: Traffic channel
SW: Sync word
I: Idle bit (all “0”)
CC: Color code (Counterinterference code)
SACCH: Slow ACCH
G: Guard time for transient response
TCH
108
SW C
40 4
C: Channel identification
TCH: Information channel
G
16
00H (8 bit), 0000H (16 bit)
00H (6 bit)
2H (2 bit)
Continuous PN9
4D9DEH (20 bit)
000H (12 bit)
TCH
232
P TCH
4 24
G
20
0H (16 bit)
AH (4 bit)
Uplink=00A000000AH (40 bit)
Downlink=00A000AAAAH (40 bit)
8H (4 bit)
PN9 pseudo random pattern
(The PN pattern has continuity in
TCH of all slots.)
G: Guard time for transient response 00000H (20 bit)
• Uplink / Downlink control channel
R AP P
16 24 4
AP
232
SW C
40 4
R: Ramp time for transient response
AP: Repetition of AGC preamble
P: Pilot symbol
SW: Sync word
CAC
232
P CAC
4 24
G
20
0H (16 bit)
20A800080AH
AH (4 bit)
Uplink=000A0AA00AH (40 bit)
Downlink=000A0A00A0H (40 bit)
C: Channel identification
AH (4 bit)
CAC: Information channel random pattern
G: Guard time for transient response 00000H (20 bit)
• Uplink
TCH
148
TCH
232
R: Ramp time for transient response
P: Pilot symbol
SW: Sync word
The signal formats in uplink/downlink and direct communication
between mobile stations are as follows.
P
2
TCH
116
• Uplink / Downlink traffic channel
•ARIB STD-T79, Slot format
R
6
SW PICH
20 12
TCH
140
There are four types of slots: uplink/downlink traffic channels
and uplink/downlink control channels.
The signal formats in uplink/downlink are as follows.
RI
56
P
2
•ARIB STD-T86, Slot format
•ARIB STD-T61, Frame format
TCH
96
R
6
G: Guard time for transient response
R: Guard time for burst transient response
P: Preamble
TCH: Traffic channel
SW: Sync word
PICH: Parameter information channel
R: Guard time for burst transient response
P: Preamble
TCH: Traffic channel
SW: Sync word
LP+R Pa
30 2
B/I
8
• Direct communication between mobile stations
G
8
TCH
112
TCH
144
00H (6 bit)
2H (2 bit)
Continuous PN9
87A4BH (Slot 0),
9D236H (Slot 1),
81D75H (Slot 2),
A94EAH (Slot 3) (20 bit)
CI: Control channel communication information 11H (2 bit)
CC: Color code (Counterinterference code) 00H (6 bit)
SACCH: Slow ACCH
00000H (20 bit)
B/I: Busy/Idle bit
FFH (8 bit)
• Downlink
R
6
SW CI CC SACCH
20
20 2 6
R: Guard time for burst transient response
P: Preamble
TCH: Traffic channel
SW: Sync word
• Uplink
R
6
TCH
112
P
2
G
8
00H (6 bit)
2H (2 bit)
Continuous PN9
785B4H (Slot 0) (20 bit)
0H (2 bit)
00H (6 bit)
00000H (20 bit)
00H (8 bit)
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MX370101A HSDPA IQproducer
Optional
■ HSDPA IQproducer:
• Downlink Settings:
Various parameters conforming to standards can be set for
downlink (for details, refer to the “Downlink parameter setting
range” table shown later).
The Downlink Easy Setup function provides the items for the
HSDPA Fixed Reference Channel (FRC) specified in 3GPP
TS25.101 and the Reference Measurement Channel (RMC)
specified in 3GPP TS25.101, TS25.104. Parameter setting and
waveform pattern generation can be performed simply by
selecting items.
[Easy Setup items]
FRC: H-Set1 (QPSK), H-Set1 (16QAM), H-Set2 (QPSK),
H-Set2 (16QAM), H-Set3 (QPSK), H-Set3 (16QAM),
H-Set4, H-Set5
RMC: RMC12.2 kbps (for RX test),
RMC12.2 kbps (for Performance test),
RMC64 kbps (for Performance test),
RMC144 kbps (for Performance test),
RMC384kbps (for Performance test)
The MX370101A HSDPA IQproducer is GUI-driven PC application software used to set up the parameters and generate
waveform patterns according to the 3GPP HSDPA
(Uplink/Downlink) system. The generated waveform patterns
are downloaded to the MG3700A, and used to output HSDPA
Modulation baseband signals and RF signals with the ARB
generation function of the MG3700A.
In addition, it is possible to set the parameters specified in
TS25.212 with respect to HS-PDSCH and HS-DPCCH. The
signals in various states can be generated by changing the
transmitting process freely.
In addition, the Downlink Easy Setup function provides typical
items and parameters so that the settings can be executed
simply by selecting items/parameters.
• IQproducer™ operating environment
CPU
Pentium III 1 GHz or faster
Memory size
≥512 Mbytes
• Uplink Settings:
HDD
≥5 Gbytes
Display
1024 × 768 pixels or more
OS
Windows® 2000 Professional, Windows® XP
For Uplink, parameter setting for the UL-DPCCH/UL-DPDCH
and HS-DPCCH channels and waveform pattern generation
can be performed (for details, refer to the “Uplink parameter
setting range” table shown later).
HS-DPCCH (ACK, NACK, CQI)
UL-DPCCH
UL-DPDCH
Windows/Windows2000/WindowsXP is a registered trademark of
Microsoft Corporation.
PC
MG3700A Vector Signal Generator
MX370101A
LAN or Compact Flash
(1) IQproducer is
installed in PC.
(2) Waveform data is
(3) Waveform data is
(4) The waveform
generated using
transmitted to
data of an output
IQproducer.
MG3700A.
signal is chosen.
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MX370101A HSDPA IQproducer
Optional
• Downlink Main screen:
• Uplink Main screen:
25
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MX370101A HSDPA IQproducer
Optional
• Downlink parameter setting range:
Display
Setting range
Scrambling Code
CPICH
P-CCPCH
PICH
DPCH
0 to 8191
ON/OFF
ON or OFF
Power
–40.00 to 0.00 [dB], Resolution 0.01 dB
ON/OFF
ON or OFF
Power
–40.00 to 0.00 [dB], Resolution 0.01 dB
ON/OFF
ON or OFF
Power
–40.00 to 0.00 [dB], Resolution 0.01 dB
Channelization Code
0 to 255
ON/OFF
ON or OFF
Power
–40.00 to 0.00 [dB], Resolution 0.01 dB
0 to SF –1
The spreading factor (SF) varies depending on the [Data]
setting as follows:
RMC 12.2 kbps = 128
RMC 64 kbps = 32
RMC 144 kbps = 16
RMC 384 kbps = 8
AMR1/AMR2/AMR3 = 128
Channelization Code
ISDN = 32384 kbps Packet = 8
RMC12.2 kbps / RMC 64 kbps / RMC 144 kbps / RMC 384
Data
OCNS
HS-SCCH1/2/3/4
HS-PDSCH1/2/3/4
P-CCPCH Edit
DPCH Edit
HSDPA transport channel
(HS-SCCH,HS-PDSCH
parameters)
kbps / AMR1 / AMR2 / AMR3 / ISDN / 384 kbps Packet
ON/OFF
ON or OFF
Type
16 Codes or 6 Codes
ON/OFF
ON or OFF
Power
–40.00 to 0.00 [dB]
Channelization Code
0 to 127
Data
PN9/PN9fix/PN15fix/16bitRepeat/Coded
ON/OFF
ON or OFF
Power
–40.00 to 0.00 [dB]
Channelization Code
0 to 127
Data
PN9/PN9fix/PN15fix/16bitRepeat/HS-DSCH
SFN Cycle
8 or 4096
DTCH Information Data
PN9/PN9fix/PN15fix/16bitRepeat
TFCI
0 to 1023
Channelization Code Offset
1 to (16 - "Number of Physical Channel Code")
Number of Physical Channel Code
1 to (16 - "Channelization Code Offset")
Modulation
QPSK or 16QAM
Transport Block Size Information
0 to 63
RV Information
0 to 7
UE Identity
0 to 65535
CRC Error Insertion
Correct or Fail (CRC error of all)
Number of HARQ Processes
0 to 8
Virtual IR Buffer Size
800 to 304000 (Resolution: 800)
Payload Data
PN9/PN9fix/PN15fix/16bitRepeat
0 to 16 (Note that it ranges from 0 to 6 if PN9 has been set for
HARQ Process Cycle
Transmitting Pattern Edit
Payload Data.)
Inter-TTI Distance
1 to 8
TTI Start Offset
0 to 7
Process Setting File
Used or Not used
26
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MX370101A HSDPA IQproducer
Optional
• Uplink parameter setting range:
Display
Setting range
Scrambling Code
0 to 16777215
Channel ON/OFF
UL-DPCCH, UL-DPDCH
ON or OFF
Power
0 to –40.00 dB
RMC 12.2 kbps / RMC 64 kbps / RMC 144 kbps / RMC 384
Data
HS-DPCCH
DPCH Edit
kbps / AMR1 / AMR2 / AMR3 / ISDN / 64 kbps Packet
ON/OFF
HS-DPCCH ON or OFF
Timing Offset
0 to 149
ACK Power
0 to –40.00 dB
NACK Power
0 to –40.00 dB
CQI Power
0 to –40.00 dB
ACK Pattern
ACK_only, NACK_only, alt_ACK_NACK_DTX
CQI value
0 to 30
Pattern Setting File
Used or Not used
DTCH Information Data
PN9/PN9fix/PN15fix/16 bit Repeat
TFCI
0 to 1023
• Parameter save/recall:
The numeric values and settings for each item can be saved in a parameter file. Type the desired name in the [file name] text box and
then click the [Save] button to save the parameter file.
A parameter file can be recalled. Click the desired parameter file from the file list and then click the [Open] button.
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MX370102A TDMA IQproducer
Optional
■ TDMA IQproducer:
• IQproducer™ operating environment
The MX370102A TDMA IQproducer“ is GUI-driven PC
application software used to set up the parameters and
generate waveform patterns according to the TDMA system.
The generated waveform patterns are downloaded to the
MG3700A, and used to output TDMA Modulation baseband signals and RF signals with the ARB generation function of
the MG3700A.
In addition to the signals supporting the PDC, PHS, and ARIB
STD-T61/T79/T86 systems, signals for other systems can also
be generated.
CPU
Pentium III 1 GHz or faster
Memory size
≥512 Mbytes
HDD
≥5 Gbytes
Display
1024 × 768 pixels or more
OS
Windows® 2000 Professional, Windows® XP
PC
MG3700A Vector Signal Generator
MX370102A
LAN or Compact Flash
(1) IQproducer is
installed in PC.
(2) Waveform data is
(3) Waveform data is
(4) The waveform
generated using
transmitted to
data of an output
IQproducer.
MG3700A.
signal is chosen.
• Main screen:
28
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MX370102A TDMA IQproducer
Optional
• Parameter setting items list:
Parameter setting sheet
Setting items
Modulation
Burst
Continuous
No Format
✓
✓
✓
✓
✓
Frame
—
Slot
✓
✓
—
Field
✓
✓
—
Data
—
—
✓
Filter
✓
✓
✓
Pattern Name
✓
✓
✓
• Parameter setting items list:
Items
Modulation
Frame
Display
Modulation system
Symbol Rate
Symbol rate
1ksps to 40Msps (Specified in increments of 1 sps.)
The Number of Frames
Frame number
1 to 4088
Slot numbers in one frame
1 to 10
The Number of Slots
2, 23field
Ramp field
3 to 22field
Fixed (Fixed data) field
Set an integer from 0 to 32.
DATA (PN9, PN15) field
Set an integer from 0 to 400.
Calculation
CRC(Cyclic Redundancy
Check character) field
Set an integer from 0 to 32.
Fixed (Fixed data) field
Set an integer from 0 to 32.
Set an integer from 0 to 400.
CRC
CRC(Cyclic Redundancy
Check character) field
Sets a hexadecimal fixed
data.
Sets the CRC calculation
field by an integer.
Selects a continuous pattern.
Set an integer from 0 to 32.
0 to the maximum value of the number of bits being set
1 to the number of bits in the field on the left to CRC
(except Guard and Ramp fields)
PN9, PN15, 16-bit Pattern, ALL0, ALL1
Enter arbitrary hexadecimal number for “16-bit Pattern.”
Data
Selects a continuous pattern.
PN9, PN15, 16-bit Pattern, ALL0, ALL1
Filter
Filter type
Root Nyquist, Nyquist
Roll Off
Filter roll-off rate
0 to 1.00 (up to the second digit of fraction)
RMS
Pattern Name
according to “Modulation Type.”
DATA (PN9, PN15) field
Data Field
Filter
Set the number of bits listed in the separate table
1 to 24field
Fixed
Data(No Format)
according to “Modulation Type.”
1 to 24field
2 to 24field
(Burst/Continuous)
Set the number of bits listed in the separate table
Guard field
4 to 22field
Field
16QAM (ARIB_STD_T86), 64QAM, 256QAM
1, 24field
3 to 22field
Slot(Continuous)
Setting range
PI/4DQPSK, BPSK, QPSK, 8PSK, 16QAM,
Modulation Type
per Frame
Slot(Burst)
Outline
RMS value of waveform
pattern data
651 to 4104
Pattern Name
Waveform pattern file name
Within 20 characters
Comment
Comment
Within 38 characters
Starts waveform pattern data generation after setting parameters.
29
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MX370102A TDMA IQproducer
Optional
• Graph:
• Ramp field Setting range:
Modulation Type
This function displays a generated waveform pattern in a
CCDF or FFT graph on the PC. It is useful to check/review the
waveform pattern in a graph before transferring it to the
MG3700A.
Bit numbers
Pi/4DQPSK, QPSK
Multiple of 2 from 2 to 32
BPSK
Integer from 1 to 32
8PSK
Multiple of 3 from 3 to 30
16QAM, 16QAM (ARIB_STD_T86)
Multiple of 4 from 4 to 32
64QAM
Multiple of 6 from 6 to 30
256QAM
Multiple of 8 from 8 to 32
[CCDF (Complimentary Cumulative Distribution Function) graph]
Up to eight types of generated waveform patterns are read to
be displayed in a CCDF graph.
• Parameter save/recall:
The numeric values and settings for each item can be saved in
a parameter file. Type the desired name in the [file name] text
box and then click the [Save] button to save the parameter file.
A parameter file can be recalled. Click the desired
parameter file from the file list and then click the [Open] button.
CCDF graph screen
[FFT (Fast Fourier Transform) graph]
Up to four types of generated waveform patterns are read and
the FFT calculation results for them are displayed in an FFT
graph.
FFT graph screen
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MX370103A CDMA2000 1xEV-DO IQproducer
Optional
■ CDMA2000 1xEV-DO IQproducer:
• IQproducer™ operating environment
The MX370103A CDMA2000 1xEV-DO IQproducer is
GUI-driven PC application software used to set up the
parameters and generate waveform patterns according to the
CDMA2000 1xEV-DO system (1xEV-DO forward and 1xEV-DO
Reverse). The generated waveform patterns are downloaded
to the MG3700A, and used to output CDMA2000 1xEV-DO
Modulation baseband signals and RF signals with the ARB
generation function of the MG3700A.
For forward, multi-carrier signals of up to nine carriers and
mixed signals of Idle and Active can be generated. For
reverse, multi-user signals for which the frequency, phase,
level, and delay are adjusted freely can be generated.
CPU
Pentium III 1 GHz or faster
Memory size
≥512 Mbytes
HDD
≥5 Gbytes
Display
1024 × 768 pixels or more
OS
Windows2000® Professional, Windows XP
PC
MG3700A Vector Signal Generator
MX370103A
LAN or Compact Flash
(1) IQproducer is
installed in PC.
(2) Waveform data is
(3) Waveform data is
(4) The waveform
generated using
transmitted to
data of an output
IQproducer.
MG3700A.
signal is chosen.
• 1xEV-DO forward setting screen
31
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MX370103A CDMA2000 1xEV-DO IQproducer
Optional
• 1xEV-DO forward setting range
[Carrier Edit sheet]
On the Carrier Edit sheet, set up the Modulation parameters for the single carriers (associated with carrier numbers 1 to 9) that constitute the multi-carrier.
Display
Wave Data Length
ing
Over Sampling
Default All
Carrier
Carrier Parameters Copy
Execute
Data Rate
1st to 4th Frame Active
(1) / Idle (0)
TCH Data
Offset Index
TCH1 to TCH4
Reg1 to Reg4
Carrier Default
RPC/RA CH Parameters
Setting range
Number of frames of the waveform pattern to be generated. Specify up to 4 frames. Specify 3 frames when generata multi-carrier.
Over sampling rate for waveform patterns. Set 4, 8, or 16.
Restores the settings of all the single carriers to the initial values.
Select a single carrier to be edited from 1 to 9.
Specify a single carrier to which the settings of the currently-set single carrier are to be copied (copy destination).
Set Carrier 1 to Carrier 9 or All Carrier.
Copies the settings of the currently-set single carrier (the corresponding carrier number is displayed in Carrier) to the
copy destination specified by Carrier Parameters Copy. The settings to be copied include the contents of the RPC/RA
CH Parameter screen.
Set the data rate and transmission slot for the single carrier to be generated from the following:38.4 kbps (16 slots)
QPSK, 76.8 kbps (8 slots) QPSK, 153.6 kbps (4 slots) QPSK, 307.2 kbps (2 slots) QPSK, 614.4 kbps (1 slot) QPSK,
307.2 kbps (4 slots) QPSK, 614.4 kbps (2 slots) QPSK, 1228.8 kbps (1 slot) QPSK, 921.6 kbps (2 slots) 8-PSK,
1843.2 kbps (1 slot) 8-PSK, 1228.8 kbps (2 slots) 16QAM, 2457.6 kbps (1 slot) 16QAM, Idle Slot
Set traffic channel active/idle for each slot.
Set the traffic channel payload data.
All ‘0’: Sets the payload data to all 0.
All ‘1’: Sets the payload data to all 1.
PN15: Sets the payload data to a discontinuous PN15 sequence. PN15 is continuous within a frame.
Specify the PN Offset Index of the single carrier to be generated from 0 to 511.
Specify the MAC Index that is used for the scrambling sequence of the traffic channel and preamble Walsh cover by an
integer from 5 to 63.
Initial value of the linear feedback shift register used to generate the PN15 sequence when TCH Data is set to PN15.
Set a hexadecimal number from 0 to 7FFF. The offset can be added to the PN15 sequence of each TCH by changing
this initial value.
Restores the settings of the single carrier currently set on the screen (the corresponding carrier number is displayed in
Carrier) to the initial values. The settings in the Carrier Parameters frame are restored to the initial values of the single
carrier.
Opens the RPC/RA CH Parameters screen used to set up the parameters of the RPC and RA channels.
Generates the waveform patterns of nine single carriers with the current settings. After clicking this button, the entire
• RPC/RA CH Parameters sheet:
Display
Frame
Slot
RA Bit
CH Power
RPC Bit
ON/OFF
Normalize
Setting range
Selects a frame for which the RPC and RA channels are to be edited.
Selects a slot for which the RPC and RA channels are to be edited.
RA bit of RA channel. Set 0 or 1.
Channel gain of MAC channel (relative value to pilot channel). Set from –40 to +40 dB.
RPC bit of RPC channel. Set 0 or 1.
Turns on/off each MAC channel.
Sets the channel gains of the RPC and RA channels in the currently-set slot collectively to the ratio expressed with a
fraction. The numerator of the RA channel ratio can be set from 1 to “denominator –1”. The denominator can be set
from 2 to 99.
[Multi-carrier Composition sheet]
Generates a multi-carrier or single carrier waveform pattern from the single carrier waveform patterns generated in the Carrier Edit
Display
Spacing
Carrier Select
Target RMS Range
RMS Adjustment Value
RMS Adjust
Setting range
Sets the frequency interval between the carriers having the consecutive carrier numbers, from 1.20, 1.23, or 1.25 MHz.
Turns on or off the single carrier that is used to generate a multi-carrier (or a single carrier, if only one single carrier
were turned with all the others turned off) in the single carrier generated in the Carrier Edit sheet.
“RMS” indicates the waveform pattern RMS value. Set the maximum value to “Max” when adjusting the waveform
pattern RMS value.
Sets the RMS value of the multi- or single carrier waveform pattern.
Converts a waveform pattern generated by clicking the Composition Execute button into a waveform pattern that has
an RMS value close to the value entered in RMS Adjustment Value.
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MX370103A CDMA2000 1xEV-DO IQproducer
Optional
• 1xEV-DO Reverse Setting range:
Display
Over Sampling
Carrier On/Off
Description
Ratio of the waveform pattern sampling rate and the chip rate
Set the carrier On/Off. It is “On” when checked.
Long Code Mask
Set the I and Q long code masks. MQ is set automatically when MI is set by a user.
Power
Frequency Offset
Phase Offset
DRC CH On/Off
DRC CH Gain
Set the power of carrier.
Set the carrier frequency offset from the center frequency setting of the MG3700A.
Set the delay of the carrier. A delay is a time gap from when a frame trigger is output
from the rear panel of the MG3700A to when the first frame of the carrier is output.
Set a phase offset of the carrier.
Set the DRC channel On/Off. It is “On” when checked.
Set the channel gain of the DRC channel by a relative value to the pilot channel.
DRC Symbol
Set the DRC channel symbol data in hexadecimal.
DRC Cover Symbol
Set the DRC cover symbol data in octal.
ACK CH On/Off
ACK CH Gain
ACK CH Bit
Data CH On/Off
Data CH Gain
Data Rate
Set the ACK channel On/Off. It is “On” when checked.
Set the channel gain of the ACK channel by a relative value to the pilot channel.
Set the ACK channel bit.
Set the Data channel On/Off. It is “On” when checked.
Set the channel gain of the Data channel by a relative value to the pilot channel.
Set the Data channel data rate.
Set the Data channel payload data. The selection item “PN9fix” specifies a
discontinuous PN9 code sequence.
When PN9fix is set for Data, set the initial value of the PN9 generation shift register in
hexadecimal.
Set the RRI symbol in binary.
Delay
Data
Initial LFSR
RRI Symbol
33
Setting range
4, 8, 16
On, Off
MI, MQ: 0x0 to
0x3FFFFFFFFFF
–80.000 to 0.000 dB
–5.000 to 5.000MHz
0 chip to 32768 chip
0.000 to 2.000 pai rad.
On, Off
–80.000 to 20.000 dB
0000000000000000 to
FFFFFFFFFFFFFFFF(HEX)
0000000000000000 to
7777777777777777(OCT)
On, Off
–80.000 to 20.000 dB
A (ACK), N (NACK), X (DTX)
On, Off
–80.000 to 20.000 dB
9.6, 19.2, 38.4, 76.8, 153.6 kbps
PN9fix, All '0', All '1'
0 to 1FF (HEX)
000 to 101 (BIN)
*MX370X_E_050127
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MX370103A CDMA2000 1xEV-DO IQproducer
Optional
■ Parameter save/recall:
The numeric values and settings for each item can be saved in
a parameter file. Type the desired name in the [file name] text
box and then click the [Save] button to save the parameter file.
A parameter file can be recalled. Click the desired parameter
file from the file list and then click the [Open] button.
■ Graph:
This function displays a generated waveform pattern in a
CCDF or FFT graph on the PC. It is useful to check/review the
waveform pattern in a graph before transferring it to the
MG3700A.
[CCDF (Complimentary Cumulative Distribution Function) graph]
Up to eight types of generated waveform patterns are read to be displayed in a CCDF graph.
[FFT (Fast Fourier Transform) graph]
Up to four types of generated waveform patterns are read and the FFT calculation results for them are displayed in an FFT graph.
CCDF graph screen
FFT graph screen
34
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Ordering information
Please specify model/order number, name, and quantity when ordering.
Model/Order No.
Name
Remarks
MG3700A
— Mainframe —
Vector Signal Generator
J0017F
J1276
P0020
J1254
Z0742
— Standard accessories —
Power cord, 2.6 m
LAN Straight cable
Compact Flash 64 MB
Compact Flash Adapter
MG3700A CD-ROM
MG3700A-001
MG3700A-002
MG3700A-011
MG3700A-021
— Options —
Rubidium Reference Oscillator
Mechanical Attenuator
Upper Frequency 6 GHz
ARB Memory Upgrade 512 M sample
MG3700A-101
MG3700A-102
MG3700A-103
MG3700A-111
MG3700A-121
Rubidium Reference Oscillator Retrofit
Mechanical Attenuator Retrofit
Electronic Attenuator Retrofit
Upper Frequency 6GHz Retrofit
ARB Memory Upgrade 512 M sample Retrofit
Aging rate: +/–1 × 10 –10/Month
Standard Electron Attenuator is changed to Mechanical Attenuator.
Standard “250 kHz to 3 GHz” is extended to “250 kHz to 6 GHz.”
Standard “128 Msample/channel × 2” is extended to
“256 Msample/channel × 2.”
Retrofitted to an already-shipped mainframe.
Retrofitted to an already-shipped mainframe.
Retrofitted to an already-shipped mainframe.
Retrofitted to an already-shipped mainframe.
Retrofit Retrofitted to an already-shipped mainframe.
MG3700A-ES210
MG3700A-ES310
MG3700A-ES510
— Maintenance service —
Extended warranty service
Extended warranty service
Extended warranty service
Two years
Three years
Five years
MX370001A
MX370002A
— Softwares (Waveform pattern) —
TD-SCDMA Waveform Pattern
Public Radio System Waveform Pattern
RCR STD-39, ARIB STD-T61/T79/T86
MX370101A
MX370102A
MX370103A
— Softwares (License Key for IQproducer system) —
HSDPA IQproducer
TDMA IQproducer
CDMA2000 1xEV-DO IQproducer
W2495AE
W2496AE
W2539AE
W2503AE
W2504AE
W2505AE
G0141
K240B
MA1612A
MP752A
MA2512A
J0576B
J0576D
J0127C
J0127B
J0127A
J0322A
J0322B
J0322C
J0322D
J1264
J1261B
J1261D
J0008
J1277
B0329C
B0331C
B0332
B0333C
B0334C
P0021
P0022
P0023
: 1 pc
: 1 pc
: 1 pc
: 1 pc
: 1 pc
10 cm, For U link connection on Rear panel
Main frame operation manual, IQproducer operation manual, Standard
waveform operation manual, IQproducer software
— Optional accessories —
MG3700A operation manual
MG3700A IQproducer operation manual
MG3700A standard waveform pattern operation manual
MX370101A HSDPA IQproducer operation manual
MX370102A TDMA IQproducer operation manual
MX370103A CDMA2000 1xEV-DO IQproducer
operation manual
HDD ASSY
Power Divider (K connector)
Four-Port Junction pad
Termination
Band Pass Filter
Coaxial Cord, 1.0 M
Coaxial Cord, 2.0 M
Coaxial Cord, 0.5 M
Coaxial Cord, 2.0 M
Coaxial Cord, 1.0 M
Coaxial Cord, 0.5 M
Coaxial Cord, 1.0 M
Coaxial Cord, 1.5 M
Coaxial Cord, 2.0 M
N-SMA Adapter
Ethernet Cable (Shield Type)
Ethernet Cable (Shield Type)
GPIB CABLE, 2.0 M
IQ Output Conversion Adapter
Front cover for 1MW 4
Front panel handle kit
Joint plate
Rack mount kit
Hardtype carrying case
Compact Flash 128 MB
Compact Flash 256 MB
Compact Flash 512 MB
35
For Embedded HDD Exchange
DC to 26.5 GHz, K-J, 50 Ω, 1 Wmax
5 MHz to 3 GHz, N-J
DC to 12.4 GHz, 50 Ω, N-P
For W-CDMA, pass band: 1.92 to 2.17 GHz
N-P • 5D-2W • N-P
N-P • 5D-2W • N-P
BNC-P • RG-58A/U • BNC-P
BNC-P • RG-58A/U • BNC-P
BNC-P • RG-58A/U • BNC-P
SMA-P • SMA-P, DC to 18 GHz, 50 Ω
SMA-P • SMA-P, DC to 18 GHz, 50 Ω
SMA-P • SMA-P, DC to 18 GHz, 50 Ω
SMA-P • SMA-P, DC to 18 GHz, 50 Ω
N-P • SMA-J
Straight, 3 m
Cross, 3 m
D-SUB/BNC
2 pcs/set
4 pcs/set
With front cover and casters
*MX370X_E_050127
1/28/05
8:54 AM
Page 36
Specifications are subject to change without notice.
ANRITSU CORPORATION
1800 Onna, Atsugi-shi, Kanagawa, 243-8555 Japan
Phone: +81-46-223-1111
Fax: +81-46-296-1264
• U.S.A.
ANRITSU COMPANY
TX OFFICE SALES AND SERVICE
1155 East Collins Blvd., Richardson, TX 75081, U.S.A.
Toll Free: 1-800-ANRITSU (267-4878)
Phone: +1- 972-644-1777
Fax: +1-972-644-3416
• Canada
ANRITSU ELECTRONICS LTD.
700 Silver Seven Road, Suite 120, Kanata,
ON K2V 1C3, Canada
Phone: +1-613-591-2003
Fax: +1-613-591-1006
• Brasil
ANRITSU ELETRÔNICA LTDA.
Praca Amadeu Amaral, 27 - 1 andar
01327-010 - Paraiso, Sao Paulo, Brazil
Phone: +55-11-3283-2511
Fax: +55-11-3886940
• U.K.
ANRITSU LTD.
200 Capability Green, Luton, Bedfordshire LU1 3LU, U.K.
Phone: +44-1582-433280
Fax: +44-1582-731303
Printed on 70%
Recycled Paper
• Germany
• Hong Kong
Grafenberger Allee 54-56, 40237 Düsseldorf, Germany
Phone: +49-211-96855-0
Fax: +49-211-96855-55
Suite 923, 9/F., Chinachem Golden Plaza, 77 Mody
Road, Tsimshatsui East, Kowloon, Hong Kong, China
Phone: +852-2301-4980
Fax: +852-2301-3545
ANRITSU GmbH
ANRITSU COMPANY LTD.
• France
• P. R. China
ANRITSU S.A.
9, Avenue du Québec Z.A. de Courtabœuf 91951 Les
Ulis Cedex, France
Phone: +33-1-60-92-15-50
Fax: +33-1-64-46-10-65
• Italy
ANRITSU S.p.A.
Via Elio Vittorini, 129, 00144 Roma EUR, Italy
Phone: +39-06-509-9711
Fax: +39-06-502-2425
• Sweden
ANRITSU AB
Borgafjordsgatan 13 164 40 Kista, Sweden
Phone: +46-853470700
Fax: +46-853470730
• Denmark
Anritsu AB Danmark
Korskildelund 6 DK - 2670 Greve, Denmark
Phone: +45-36915035
Fax: +45-43909371
• Singapore
ANRITSU COMPANY LTD.
Beijing Representative Office
Room 1515, Beijing Fortune Building, No. 5 North Road,
the East 3rd Ring Road, Chao-Yang District
Beijing 100004, P.R. China
Phone: +86-10-6590-9230
• Korea
ANRITSU CORPORATION
8F Hyun Juk Bldg. 832-41, Yeoksam-dong,
Kangnam-ku, Seoul, 135-080, Korea
Phone: +82-2-553-6603
Fax: +82-2-553-6604
• Australia
ANRITSU PTY LTD.
Unit 3/170 Forster Road Mt. Waverley, Victoria, 3149,
Australia
Phone: +61-3-9558-8177
Fax: +61-3-9558-8255
• Taiwan
ANRITSU COMPANY INC.
ANRITSU PTE LTD.
10, Hoe Chiang Road #07-01/02, Keppel Towers,
Singapore 089315
Phone: +65-6282-2400
Fax: +65-6282-2533
7F, No. 316, Sec. 1, NeiHu Rd., Taipei, Taiwan
Phone: +886-2-8751-1816
Fax: +886-2-8751-1817
Catalog No. MX370x-E-A-1-(1.00)
050114
Printed in Japan
2005-1 W/CDT
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