Fairchild AN-7511 Network Card User Manual

Insulated-Gate Transistors Simplify AC-Motor
Speed Control
Application Note
/Title
AN75
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In
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Gate
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An IGT’s few input requirements and low On-state resistance
simplify drive circuitry and increase power efficiency in motorcontrol applications. The voltage-controlled, MOSFET-like
input and transfer characteristics of the insulated-gate transistor (IGT) (see EDN, September 29, 1983, pg 153 for IGT
details) simplify power-control circuitry when compared with
bipolar devices. Moreover, the IGT has an input capacitance
mirroring that of a MOSFET that has only one-third the powerhandling capability. These attributes allow you to design simple, low-power gate-drive circuits using isolated or level-shifting techniques. What’s more, the drive circuit can control the
IGT’s switching times to suppress EMI, reduce oscillation and
noise, and eliminate the need for snubber networks.
September 1993
AN-7511
VCC
R1
LOAD
R3
ON
OFF
V
R
CC 2
15 ≤ -------------------- ≤ 25V
R +R
1
2
R2
R3 CONTROLS t OFF
FIGURE 1A. SIMPLE DRIVING AND TRANSITION-TIME
CONTROL
Use Optoisolation To Avoid Ground Loops
The gate-drive techniques described in the following sections
illustrate the economy and flexibility the IGT brings to power
control: economy, because you can drive the device’s gate
directly from a preceding collector, via a resistor network, for
example; flexibility, because you can choose the drive circuit’s
impedance to yield a desired turn-off time, or you can use a
switchable impedance that causes the IGT to act as a chargecontrolled device requiring less than 10 nanocoulombs of
drive charge for full turn-on.
R1 CONTROLS GATE
SUPPLY POWER LOSS
Take Some Driving Lessons
R2 CONTROLS tOFF
Note the IGT’s straightforward drive compatibility with CMOS,
NMOS and open-collector TTL/HTL logic circuits in the
common-emitter configuration Figure 1A. R3 controls the turnoff time, and the sum of R3 and the parallel combination of R1
and R2 sets the turn-on time. Drive-circuit requirements,
however, are more complex in the common-collector
configuration Figure 1B.
In this floating-gate-supply floating-control drive scheme, R1
controls the gate supply’s power loss, R2 governs the turn-off
time, and the sum of R1 and R2 sets the turn-on time. Figure
1C shows another common-collector configuration employing
a bootstrapped gate supply. In this configuration, R3 defines
the turn-off time, while the sum of R2 and R3 controls the turnon time. Note that the gate’s very low leakage allows the use
of low-consumption bootstrap supplies using very low-value
capacitors. Figure 1 shows two of an IGT’s strong points. In
the common-emitter Figure 1A, TTL or MOS-logic circuits can
drive the device directly. In the common-collector mode, you’ll
need level shifting, using either a second power supply Figure
1B or a bootstrapping scheme Figure 1C.
VCC
CONTROL
INPUT
ON
OFF
R1
R2
15V
LOAD
R1 + R2 CONTROLS t ON
FIGURE 1B. A SECOND POWER SUPPLY
V CC R 2
15 ≤ -------------------- ≤ 25V
R1 + R 2
R3 CONTROLS t OFF
R2 + R3 CONTROLS tON
5C
τ « ------------------------------------------------
R1
R2
I CEO + I GES + 2I R
R3
OFF
ON
LOAD
FIGURE 1C. BOOTSTRAPPING SCHEME
In the common-collector circuits, power-switch current flowing
through the logic circuit’s ground can create problems.
Optoisolation can solve this problem (Figure 2A.) Because of
the high common-mode dV/dt possible in this configuration,
you should use an optoisolator with very low isolation capacitance; the H11AV specs 0.5pF maximum.
©2002 Fairchild Semiconductor Corporation
Application Note 7511 Rev. A1
Application Note 7511
For optically isolated “relay-action” switching, it makes sense
to replace the phototransistor optocoupler with an H11L1
Schmitt-trigger optocoupler (Figure 2B).) For applications
requiring extremely high isolation, you can use an optical fiber
to provide the signal to the gate-control photodetector. These
circuit examples use a gate-discharge resistor to control the
IGT’s turn-off time. To exploit fully the IGT’s safe operating
area (SOA), this resistor allows time for the device’s minority
carriers to recombine. Furthermore, the recombination occurs
without any current crowding that could cause hot-spot formation or latch-up pnpn action. For very fast turn-off, you can use
a minimal snubber network, which allows the safe use of lower
value gate resistors and higher collector currents.
VCC
R1
R2
R3
C
CONTROL
INPUT
OFF
H11AV2
LOAD
ON
directly from TTL levels, thanks to its 1.2V, 20mA input
parameters.
Available photovoltaic couplers have an output-current
capability of approximately 100µA. Combined with
approximately 100kΩ equivalent shunt impedance and the
IGT’s input capacitance, this current level yields very long
switching times. These transition times (typically ranging to 1
msec) vary with the photovoltaic coupler’s drive current and the
IGT’s Miller-effect equivalent capacitance.
Figure 3 illustrates a typical photovoltaic-coupler drive along
with its transient response. In some applications, the
photovoltaic element can charge a storage capacitor that’s
subsequently switched with a phototransistor isolator. This
isolator technique - similar to that used in bootstrap circuits
provides rapid turn-on and turn-off while maintaining small size,
good isolation and low cost.
In common-collector applications involving high-voltage, reactive-load switching, capacitive currents in the low-level logic circuits can flow through the isolation capacitance of the control
element (eg, a pulse transformer, optoisolator, piezoelectric
coupler or level-shift transistor). These currents can cause
undesirable effects in the logic circuitry, especially in highimpedance, low-signal-level CMOS circuits.
+
I
DIG22
FIGURE 2A. AVOID GROUND-LOOP PROBLEMS BY USING AN
OPTOISOLATOR. THE ISOLATOR IGNORES SYSTEM GROUND CURRENTS AND ALSO PROVIDES HIGH COMMON-MODE RANGE.
IGT
ON
OFF
-
CONTROL
INPUT
VCC = 300V
43k
1N5061
5.6k
5.6k
5.6k
CONTROL
INPUT
OFF
OUTPUT
CURRENT
10µF
35V
ON
INPUT
CURRENT
H11L1
FIGURE 2B. A SCHMITT-TRIGGER OPTOISOLATOR YIELDS
“SNAP-ACTION” TRIGGERING SIMILAR TO
THAT OF A RELAY.
Pulse-Transformer Drive Is Cheap And Efficient
Photovoltaic couplers provide yet another means of driving the
IGT. Typically, these devices contain an array of small silicon
photovoltaic cells, illuminated by an infrared diode through a
transparent dielectric. The photovoltaic coupler provides an
isolated, controlled, remote dc supply without the need for
oscillators, rectifiers or filters. What’s more, you can drive it
©2002 Fairchild Semiconductor Corporation
0
1
2ms
LOAD
FIGURE 3. AS ANOTHER OPTICAL-DRIVE OPTION, A PHOTOVOLTAIC COUPLER PROVIDES AN ISOLATED,
REMOTE DC SUPPIY TO THE IGT’S INPUT. ITS
LOW 100µA OUTPUT, HOWEVER, YIELDS LONG
IGT TURN-ON AND TURN-OFF TIMES.
The solution? Use fiber-optic components Figure 4 to eliminate the problems completely. As an added feature, this lowcost technique provides physical separation between the
power and logic circuitry, thereby eliminating the effects of
radiated EMI and high-flux magnetic fields typically found
near power-switching circuits. You could use this method
with a bootstrap-supply circuit, although the fiber-optic system’s reduced transmission efficiency could require a
gain/speed trade-off. The added bipolar signal transistor
minimizes the potential for compromise.
Application Note 7511 Rev. A1
Application Note 7511
R1
+
CONTROL 1N914
INPUT
R2
R3
IGT
2N5354
ON
GFOD1A1
Q1
OFF
C
GFOE1A1
-
10M (30FT)
QSF2000C
(W/CONNECTORS)
EMITTER
(DISCONNECTED)
DETECTOR
(CONNECTED)
FIGURE 4. ELIMINATE EMI IN HIGH-FLUX OR NOISE ENVIRONMENTS BY USING FIBER-OPTIC COMPONENTS. THESE PARTS ALSO ALLEVIATE
PROBLEMS ARISING FROM CAPACITIVE COUPLING IN ISOLATION ELEMENTS.
Piezos Pare Prices
ACOUSTIC WAVE
OUTPUT
VOLTAGE
OSCILLATOR
FIGURE 5A. YIELDING 4-kV ISOLATION, A PIEZOELECTRIC COUPLER PROVIDES TRANSFORMER-LIKE PERFORMANCE AND AN
ISOLATED POWER SUPPLY.
2.5k
18V
1N914
IGT
3.3k
4.7k
PZ61343
2.7k
0.001
µF
NE555
1k
0.001
µF
1N914
D33D21
FIGURE 5B. THIS CIRCUIT PROVIDES THE DRIVE FOR THIS ARTICLE’S MOTOR-CONTROL CIRCUIT.
©2002 Fairchild Semiconductor Corporation
Application Note 7511 Rev. A1
Application Note 7511
A piezoelectric coupler operationally similar to a pulse-train
drive transformer, but potentially less costly in high volume is
a small, efficient device with isolation capability ranging to
4kV. What’s more, unlike optocouplers, they require no
auxiliary power supply. The piezo element is a ceramic
component in which electrical energy is converted to
mechanical energy, transmitted as an acoustic wave, and
then reconverted to electrical energy at the output terminals
Figure 5A.
+
1N914
ON
CONTROL
INPUT
OFF
1N914
2N5232
PULSE
TRANSFORMER
1k
The piezo element’s maximum coupling efficiency occurs at
its resonant frequency, so the control oscillator must operate
at that frequency. For example, the PZT61343 piezo coupler
in Figure 5B’s driver circuit requires a 108kHz, ±1%-accurate
astable multivibrator to maximize mechanical oscillations in
the ceramic material. This piezo element has a 1W max
power handling capability and a 30mA p-p max secondary
current rating. The 555 timer shown provides compatible
waveforms while the RC network sets the frequency.
FIGURE 6A. PROVIDING HIGH ISOLATION AT LOW COST, PULSE
TRANSFORMERS ARE IDEAL FOR DRIVING THE
IGT. AT SUFFICIENTLY HIGH FREQUENCIES, C1
CAN BE THE IGT’S GATE-EMITTER CAPACITANCE
ALONE.
+
ON
OFF
1N914
IGT
Isolate With Galvanic Impunity
CONTROL
INPUT
Do you require tried and true isolation? Then use
transformers; the IGT’s low gate requirements simplify the
design of independent, transformer-coupled gate-drive
supplies. The supplies can directly drive the gate and its
discharge resistor Figure 6, or they can simply replace the
level-shifting supplies of Figure 2. It’s good practice to use
pulse transformers in drive circuitry, both for IGT’s and
MOSFETs, because these components are economical,
rugged and highly reliable.
220V AC
3φ 60Hz
IGT
C1
C
R
1N914
RC = 3µSEC
FIGURE 6B. A HIGH-FREQUENCY OSCILLATOR IN THE TRANSFORMER’S PRIMARY YIELDS UNLIMITED ONTIME CAPABILITY.
In the pulse-on, pulse-off method Figure 6A, C1 stores a
positive pulse, holding the IGT on. At moderate frequencies
(several hundred Hertz and above), the gate-emitter
capacitance alone can store enough energy to keep the IGT
on; lower frequencies require an additional external capacitor.
Use of the common-base n-p-n bipolar transistor to discharge
the capacitance minimizes circuit loading on the capacitor.
This action extends continuous on-time capability without
capacitor refreshing; it also controls the gate-discharge time
via the 1kΩ emitter resistor.
VARIABLE
DC VOLTAGE
THREE-PHASE
BRIDGE
RECTIFIER
SWITCHING
REGULATOR
TIMING
VOLTAGE
ENABLE
THREE-PHASE
IGT
INVERTER
3φ
INDUCTION
MOTOR
AND DRIVE
ADJUST VOLTAGE
I
I
I
ENABLE
LOWER
LEGS
CURRENT
SENSE
SIGNAL
5V
LOW VOLTAGE
POWER SUPPLY
TRANSFORMER
FOR CONTROL
RECTIFIER
CIRCUITS
24V DC
FILTER
VOLTAGE
CONTROLLED
OSCILATOR
24V
I
MOTOR
CONTROL
LOGIC
I
SHUT DOWN
DRIVE
OSCILLATOR
OVERLOAD
PROTECTION
TACHOMETER
FEEDBACK
SIGNAL PATH ISOLATOR
EG: OPTOCOUPLIER PIEZO COUPLER
FIGURE 8. THIS 6-STEP 3-PHASE-MOTOR DRIVE USES THE IGT-DRIVE TECHNIQUES DESCRIBED IN THE TEXT. THE REGULATOR ADJUSTS THE OUTPUT DEVICES’ INPUT LEVELS; THE VOLTAGE-CONTROLLED OSCILLATOR VARIES THE SWITCHING
FREQUENCY AND ALSO PROVIDES THE CLOCK FOR THE 3-PHASE TIMING LOGIC. THE V/F RATIO STAYS CONSTANT
TO MAINTAIN CONSTANT TORQUE REGARDLESS OF SPEED.
©2002 Fairchild Semiconductor Corporation
Application Note 7511 Rev. A1
Application Note 7511
Piezoelectric Couplers Provide 4-kV Isolation
age-doubler circuitry improves the turn-on time and also provides long on-time capability. Although this design uses only
a 5V supply on the primary side of a standard trigger transformer, it provides 15V gate-to-emitter voltage.
Using a high-frequency oscillator for pulse-train drive Figure
6B yields unlimited on-time capability. However, the scheme
requires an oscillator that can be turned on and off by the
control logic. A diode or zener clamp across the transformer’s primary will limit leakage-inductance flyback effects.
To optimize transformer efficiency, make the pulses’ voltage
x time products equal for both the On and the Off pulses. In
situations where the line voltage generates the drive power,
a simple relaxation oscillator using a programmable unijunction transistor can derive its power directly from the line to
provide a pulse train to the IGT gate.
1N914
1:2
0.001
µF
OSCILLATOR
IGT
4.7k
1N914
0.001µF
The circuit shown in Figure 7 accommodates applications
involving lower frequencies (a few hundred Hertz and
below). The high oscillator frequency (greater than 20kHz)
helps keep the pulse transformer reasonably small. The volt-
FIGURE 7. THIS DRIVING METHOD FOR LOW-FREQUENCY
SWITCHING PROVIDES 15V TO THE IGT’S GATE
D7
L1
D1
C1
R
Q1
D3
R
Q3
D5
R
Q5
325V
10A
INDUCTION
MOTOR
D2
R
Q2
D4
R
Q4
Q6
R
D6 NOTES:
Q1 - Q6 = D94FR4
D1 - D7 = 1N3913
D8 - D13 = 1N914
220V
R = 4.7k, 1/2W
C1 = 100µF, 400V
L1 = 40µH
FIGURE 9A. THE POWER INVERTER’S DRIVE CIRCUIT USES SIX IGTS TO DRIVE A 2-HP MOTOR.
180o
φA
0
Q1 ON
VAB
0
15o DELAY
t
Q2ON
φB
Q3ON
0
Q4ON
t
VBC
0
t
VCA
t
t
φC
0
0
Q5ON
Q6ON
t
ILA
0
t
ILA
0
t
ILB
0
ILB
0
t
t
ILC
ILC
0
0
FIGURE 9B. THE TIMING DIAGRAM SHOWS THAT EACH IGT
CONDUCTS FOR 165o× OF EVERY 360o CYCLE;
THE DELAY IS NECESSARY TO AVOID CROSS
CONDUCTION.
©2002 Fairchild Semiconductor Corporation
t
t
FIGURE 9C. THE THREE WINDINGS’ VOLTAGES AND CURRENTS ARE SHOWN. NOTE THAT ALTHOUGH
COSTLY SNUBBER NETWORKS ARE ELIMINATED, FREEWHEELING DIODES ARE NEEDED; THE
IGTS HAVE NO INTRINSIC OUTPUT DIODE.
Application Note 7511 Rev. A1
Application Note 7511
Polyphase motors, controlled by solid-state, adjustable-frequency ac drives, are used extensively in pumps, conveyors,
mills, machine tools and robotics applications. The specific control method could be either 6-step or pulse-width modulation.
This section describes a 6-step drive that uses some of the previously discussed drive techniques (see page 11, “Latch-Up:
Hints, Kinks and Caveats”).
(simultaneous conduction) conditions. If a fault continues to
exist for an appreciable period, inhibiting the switching regulator causes the inverter to shut off. The inverter’s power-output circuit is shown in Figure 9A; the corresponding timing
diagrams show resistive-load current waveforms that indicate the 3-phase power Figure 9B and waveforms of the output line voltage and current Figure 9C.
Figure 8 defines the drive’s block diagram. A 3-phase rectifier
converts the 220V ac to dc; the switching regulator varies the
output voltage to the IGT inverter. At the regulator’s output, a
large filter capacitor provides a stiff voltage supply to the
inverter.
In Figure 9’s circuit, it appears that IGTs Q1 through Q6 will
conduct for 180o. However, in a practical situation, it’s necessary to provide some time delay (typically 10o to 15o×) during the positive-to-negative transition periods in the phase
current. This delay allows the complementary IGTs to turn
off before their opposite members turn on, thus preventing
cross conduction and eventual destruction of the IGTs.
The motor used in this example has a low slip characteristic
and is therefore very efficient. You can change the motor’s
speed by varying the inverter’s frequency. As the frequency
increases, however, the motor’s air-gap flux diminishes, reducing developed-torque capability. You can maintain the flux at a
constant level (as in a dc shunt motor) if you also vary the voltage so the V/F ratio remains constant.
Because of the time delay, the maximum conduction time is
165o of every 360o period. Because the IGTs don’t have an
integral diode, it’s necessary to connect an antiparallel diode
externally to allow the freewheeling current to flow. Inductor
L1 limits the di/dt during fault conditions; freewheeling diode
D7 clamps the IGT’s collector supply to the dc bus.
Fiber-Optic Drive Eliminates Interference
The peak full-load line current specified by the motor manufacturer determines the maximum steady-state current that
each transistor must switch. You must convert this RMSspecified current to peak values to specify the proper IGT. If
the input voltage regulator had a fixed output voltage and a
constant frequency, each IGT would be required to supply
the starting locked-rotor current to the motor. This current
could be as much as 15 times the full-load running current.
In the example given, the switching regulator varies the IGT
inverter’s output by controlling its dc input; the voltage-controlled oscillator (VCO) adjusts the inverter’s switching frequency, thereby varying the output frequency. The VCO also
drives the 3-phase logic that provides properly timed pulsed
outputs to the piezo couplers that directly drive the IGT.
Sensing the dc current in the negative rail and inhibiting the
gate signal protect the IGT from overload and shoot-through
D7
L1
D11
C1
+
Q1
D12
D1
R
D13
Q3
Q5
D3
D5
R
R
TO
LOAD
0 TO 325V
10A
D8
Q2
R
D2 D9
Q4
D10
D4
R
R
Q6
D6
SWITCHES ON” (1, 4, 5),
(1, 3, 6), (2, 3, 6),
(2, 3, 5), (2, 4, 5)
FIGURE 10A. COMPONENT SELECTION IS IMPORTANT. THE IGT SELECTED CIRCUIT HANDLES 10A, 500V AT 150oC. THE ANTIPARALLEL DIODES HAVE A SIMILAR CURRENT RATING.
10
tD(OFF)
tF1
0.1IC
0
0.9IC
1
tF2
0.1
100
tF1
IC
tD(OFF)
1k
tF2
10k
RGE
FIGURE 10B. SELECT R TO YIELD THE DESIRED TURN-OFF TIME. FINALLY, L1’S VALUE DETERMINES THE FAULT-CONDITION
ACTION TIME.
©2002 Fairchild Semiconductor Corporation
Application Note 7511 Rev. A1
Application Note 7511
It’s impractical, however, to rate an inverter based on lockedrotor current. You can avoid this necessity by adjusting the
switching regulator’s output voltage and by providing a fixed
output-current limit slightly higher than the maximum fullload current. This way, the current requirements during startup will never exceed the current capability of an efficiently
sized inverter.
RMS. For the peak current of 8.766A, you can select IGT
type D94FR4. This device has a reverse-breakdown SOA
(RBSOA) of 10A, 500V for a clamped inductive load at a
junction temperature of 150oC. A 400V IGT could also do the
job, but the 500V choice gives an additional derating safety
margin. You must set the current limit at 9A to limit the inrush current during start-up. Note that thanks to the IGT’s
adequate RBSOA, you don’t need turn-off snubbers.
For example, consider a 2-hp, 3-phase induction motor specifying VL at 230V RMS and full-load current (ILFL) at 6.2A
24V
5V
2.5k
DC BUS
PIEZOCOUPLER
470
Q1
1N914 E
D
D94FR4
3.3k
1N914
74
1k
1k
C
8 3
NE555
2.7k
6
2
1
24V
5
PZT61343
Q8
0.001µF
1N914
4.7k
Q8
2N3903
1000pF
4.7k
1N914
2N3903
φA
470
5V
D33030
3
Q3
470
B
VCO &
TIMING
LOGIC
A 4.7k
Q7
22µF
470
2N3903
1N914
D94FR4
10
2N3903
D29E10
C1
10
Q4
Q2
F
4.7k
Q5
1N914
FIGURE 11A. PROVIDING PROPERLY TIMED DRIVE TO THE IGTS, THE CIRCUIT USES PIEZO COUPLING TO THE UPPER POWER
DEVICE. THE 3-TRANSISTOR DELAY CIRCUIT PROVIDES THE NEEDED 15o LAG TO THE LOWER IGT TO AVOID
CROSS CONDUCTION.
VOLTS
24V
F
24V
E
TIME
24V
TIME
D
5V
TIME
C
100kHz
5V
B
TIME
5V
A
TIME
FIGURE 11B. THE TIMING DIAGRAM SHOWS THE 555’S 108-KHz DRIVE TO THE PIEZO DEVICE AND THE LATTER’S SLOW
RESPONSE.
©2002 Fairchild Semiconductor Corporation
Application Note 7511 Rev. A1
Application Note 7511
Use 6-Step Drive For Speed-Invariant Torque
Figure 10A shows the inverter circuit configured for this
example. Diodes D1 through D6 carry the same peak current
as the IGTs; consequently, they’re rated to handle peak currents of at least 8.766A. However, they only conduct for a
short time (15o to 20o of 180o), so their average-current
requirement is relatively small.
External circuitry can control the IGT’s current fall time.
Resistor R controls tF1 Figure 10B; there's no way to control
tF2, an inherent characteristic of the selected IGT. In this
example, a 4.7-kΩ gate-to-emitter resistor provides the
appropriate fall time. The choice of current-limiting inductor
L1 is based on the IGT’s overload-current rating and the
action time (the sum of the sensor’s sensing and response
time and the IGT’s turn-off time) in fault conditions.
You could use a set of flip flops and a multivibrator to generate the necessary drive pulses and the corresponding 120o×
delay between the three phases in Figure 10’s circuit. A voltage-controlled oscillator serves to change the inverter’s output frequency. In this circuit, IGTs Q1, Q3 and Q5 require
isolated gate drive; the drive for Q2, Q4 and Q6 can be
referred to common. If you use optocouplers for isolation,
you’ll need three isolated or bootstrap power supplies (in
addition to the 5V and 24V power supplies) to drive the IGTs.
Another alternative is to use transformer coupling.
FIGURE 12A. THE PIEZO COUPLER’S SLOW RESPONSE IS NOT
A DISADVANTAGE IN THIS ARTICLE’S CIRCUIT. IN
FACT, IT CONTRIBUTES 2o TO THE REQUIRED 15o
TURN-ON/TURN-OFF DELAY.
TRACE
VERTICAL
HORIZONTAL
A
5V/DIV
200µSEC/DIV
B
5V/DIV
200µSEC/DIV
165o Conduction Prevents Shoot-Through
Consider, however, using Figure 11A’s novel, low-cost circuit. It uses a piezo coupler to drive the isolated IGT. As
noted, the coupler needs a high-frequency square wave to
induce mechanical oscillations in its primary side. The 555
oscillator provides the necessary 108-kHz waveform; its output is gated according to the required timing logic and then
applied to the piezo coupler’s primary. The coupler’s rectified
output drives the IGT’s gate; the 4.7kW gate-to-emitter resistor provides a discharge path for CGE during the IGT’s turnoff. The circuit’s logic-timing diagram is shown in Figure 11B.
The piezo coupler’s slow response time Figure 12A contributes approximately 2o to the 15o to 20o turn-on/turn-off delay
needed to avoid shoot-through in the complementary pairs.
The corresponding collector current is shown in Figure 12B.
C1 and its associated circuitry provide the remaining delay
as follows:
FIGURE 12B. THE DRIVEN IGT'S COLLECTOR CURRENT IS
SHOWN
TRACE
VERTICAL
HORIZONTAL
A
3A/DIV
200µSEC/DIV
B
5V/DIV
200µSEC/DIV
When Q3’s base swings negative, C1 - at this time discharged turns on Q5. Once C1 is charged, Q5 turns off, allowing a drive
pulse to turn the IGT on. When Q7’s base goes to ground, Q4
turns on and discharges C1, initiating the IGT’s turn-off. Figure
13 shows the motor current and corresponding line voltage
under light-load Figure 12A and full-load Figure 12B conditions.
©2002 Fairchild Semiconductor Corporation
Application Note 7511 Rev. A1
Application Note 7511
.
FIGURE 13A. MOTOR CURRENT AND VOLTAGE ARE SHOWN
HERE, FOR LIGHT LOADS
TRACE
VERTICAL
HORIZONTAL
A
1A/DIV
1mSEC/DIV
B
50V/DIV
FIGURE 13B. MOTOR CURRENT AND VOLTAGE ARE SHOWN
HERE, FOR HEAVY LOADS.
TRACE
1mSEC/DIV
VERTICAL
HORIZONTAL
A
3A/DIV
2mSEC/DIV
B
100V/DIV
2mSEC/DIV
To complete the design of the 6-step motor drive, it’s necessary to consider protection circuitry for the output IGTs. The drive receives its
power from a switching supply already containing provisions for protection from line over-voltage and under-voltage and transient effects.
However, you still have to guard the power switches against unwanted effects on the output lines and the possibility of noise or other
extraneous signals causing gate-drive timing errors.
The best protection circuit must match the characteristics of the power switch and the circuit’s bias conditions. The IGT is very rugged
during turn-on and conduction, but it requires time to dissipate minority carriers when turning off high currents and voltages. An analysis
of the possible malfunction condition
50 TO 320V DC
AC
LINE
INPUT
RECTIFIER
AND
FILTER
SWITCHING
POWER
SUPPLY
24V DC
CONTROL
AND
TIMING
5V DC
dI/dt LIMIT
UPPER 3
ISOLATION
LOWER 3
IGT
SWITCHES
HV
ADJUST
ISOLATION
HV
DISABLE
RECYCLE
TIME
ISOLATION
GATE DRIVE
COMPARATOR
AND LATCH
TURNOFF
I LIMIT
MOTOR
ISOLATION
CHOPPER
AC
AV = 100
10A
20A
FIGURE 14. THE LOWEST COST SENSOR IMAGINABLE, A PIECE OF COPPER WIRE SERVES AS THE CURRENT MONITOR IN THIS SYSTEM. THE CHOPPED AND AMPLIFIED VOLTAGE DROP ACROSS THE WIRE TRIGGERS A GATE-DRIVE SHUT-OFF CIRCUIT
UNDER FAULT CONDITIONS.
©2002 Fairchild Semiconductor Corporation
Application Note 7511 Rev. A1
Application Note 7511
A139M
50 TO 320V DC
50µH
24V
3.9k
3.3k
750k
TO
DRIVE
2N5355
47k
180k
2.7k
470pF
39k
0.001
µF
0.01µF
2N5232
5µF
25V
10A
2k
150
5µF
20V
15V
TO
MOTOR
2N5306
20A
2k
390
C203B
470
pF
220k
22
1k 0.02
µF
10k
2.2k
DT230F
22k
2 0.2µF
39
1
0.001
µF
H11F3 TO
CONTROL CIRCUIT
H11AV2 TO PZO SHUTDOWN
H11AV2 TO HI-V SHUTDOWN
H11F3
2mΩ (1” #24 AWG COPPER)
POWER
SUPPLY
CURRENT
SENSE AND
CHOPPER
AC
AMPLIFIER
LATCHING
FAST
COMPARATOR
10ms
RESET
IGT POWER SWITCHES
FIGURE 15A. THIS ALL-ENCOMPASSING PROTECTION SYSTEM PROVIDES THREE INDEPENDENT SHUTDOWN FUNCTONS ONE EACH FOR THE UPPER AND LOWER IGTS AND THE HIGH-VOLTAGE SUPPLY.
CHOPPER DRIVE
5V
TO PIEZO
DRIVERS
47k
150
150
DT230F
(3)
TIMER
555
1 3
HIGH-VOLTAGE SHUTDOWN
0.002
µF
5.1k
5.1k
2N5232
H11F3
2.2k
16 15
H11F3
0.005
µF
0.005µF
TO
CONTROL
5V
2N5232
150
H11AV2
24V
180
180
10µF
10V
0.002
µF
100
SG3524
10
1M
8
ALL OPTOCOUPLERS GO TO PROTECTION CIRCUIT
FIGURE 15B. THIS CIRCUIT PROVIDES CHOPPER DRIVE FOR THE COPPER-WIRE
SENSOR IN FIGURE 15A.
©2002 Fairchild Semiconductor Corporation
FIGURE 15C. SHOWS THE HIGH-VOLTAGE SHUTDOWN CIRCUIT.
Application Note 7511 Rev. A1
Application Note 7511
Latch-Up: Hints, Kinks and Caveats
Forward-Bias Latch-Up
The IGT is a rugged device, requiring no snubber network
when operating within its published safe-operating-area
(SOA) ratings. Within the SOA, the gate emitter voltage
controls the collector current. In fact, the IGT can conduct
three to four times the published maximum current if it’s in the
ON state and the junction temperature is +150oC maximum.
Within the IGT’s current and junction-temperature ratings,
current does not flow through Q2 under forward-biased
conditions. When the current far exceeds its rated value, the
current flow through R1 increases and Q3’s VCE also
increases because of MOSFET channel saturation. Once
Q3’s ICR1 drop exceeds Q2’s VBE(ON), Q2 turns on and
more current flow bypasses the FET.
However, if the current exceeds the rated maximum, the IGT
could lose gate control and latch up during turn-off attempts.
The culprit is the parasitic SCR formed by the pnpn structure
shown in Figure 16. In the equivalent circuit, Q1 is a power
MOSFET with a normal parasitic transistor (Q2) whose baseemitter junction is shunted by the low-value resistance R1.
EMITTER METAL
N+
N+
N EPITAXIAL LAYER
MAIN CURRENT PATH
P
POLYSILICON GATE
P
MINORITY
CARRIER
INJECTION
P+ SUBSTRATE
METAL COLLECTOR
COLLECTOR
Q3
GATE
Q1 Q2
R1
EMITTER
FIGURE 16. THE IGT’S PARASITIC SCR IS RESPONSIBLE FOR
THE DEVICE’S LATCH-UP CHARACTERISTICS.
For large current overloads, the current flowing through R1
can provoke SCR triggering. In the simplest terms, R1 represents the equivalent of a distributed resistor network, whose
magnitude is a function of Q2’s VCE. During normal IGT
operation, a positive gate voltage (greater than the threshold) applied between Q1’s gate and source turns the FET on.
The FET then turns on Q3 (a pnp transistor with very low
gain), causing a small portion of the total collector current to
flow through the R1 network.
To turn the IGT off, you must reduce the gate-to-emitter
voltage to zero. This turns Q1 off, thus initiating the turn-off
sequence within the device. Total fall time includes currentfall-time one (tF1) and current-fall-time two (tF2)
components. The turn-off is a function of the gate-emitter
resistance, Q3’s storage time and the value of VGE prior to
turn-off. Device characteristics fix both the delay time and
the fall time.
©2002 Fairchild Semiconductor Corporation
The positive feedback thus established causes the device to
latch in the forward-biased mode. The value of IC at which
the IGT latches on while in forward conduction is typically
three to four times the device’s maximum rated collector
current. When the collector current drops below the value
that provokes Q2 turn-on, normal operation resumes if chip
temperature is still within ratings.
If the gate-to-emitter resistance is too low, the Q2-Q3
parasitic SCR can cause the IGT to latch up during turn-off.
During this period, RGE determines the drain-source dV/dt of
power MOSFET Q1. A low R1 causes a rapid rise in voltage this increases Q2’s VCE, increasing both R1’s value and Q2’s
gain.
Because of storage time, Q3’s collector current continues to
flow at a level that’s higher than normal for the FET bias.
During rapid turn-off, a portion of this current could flow in
Q2’s base-emitter junction, causing Q2 to conduct. This
process results in device latch-up; current distribution will
probably be less uniform than in the case of forward-bias
latch-up.
Because the gains of Q2 and Q3 increase with temperature
and VCE, latching current - high at +25oC - decreases as a
function of increasing junction temperature for a given gateto-emitter resistance.
How do you test an IGT’s turn-off latching characteristic?
Consider the circuit in Figure 17. Q1’s base-current pulse
width is set approximately 2µsec greater than the IGT’s gatevoltage pulse width. This way, the device under test (DUT)
can be switched through Q1 when reverse-bias latch-up
occurs. This circuit allows you to test an IGT’s latching
current nondestructively.
The results? Clamped-inductive-load testing with and
without snubbers reveals that snubbering increases current
handling dramatically: With RGE = 1kΩ, a 0.02µF snubber
capacitor increases current capability from 6A to 10A; with
RGE = 5kΩ, a 0.09µF snubber practically doubles capacity
(25A vs 13A).
Conclusions? You can double the IGT’s latching current by
increasing RGE from 1kΩ to 5kΩ, and double it again with a
polarized snubber using CS < 0.1µF. The IGT is therefore
useful in situations where the device must conduct currents
of five to six times normal levels for short periods.
Finally, you can also use the latching behavior to your advantage under fault conditions. In other words, if the device
latches up during turn-off under normal operation, you could
arrange it so that a suitable snubber is switched electronically across the IGT.
Application Note 7511 Rev. A1
Application Note 7511
L = 100µH
A139P
5V
1N914 PE-63385
D66EV7
Q1
10V
2k
10µF
A114A
15V
A114A
PULSE
GENERATOR
100
TRIGGER
1000pF
PULSE
GENERATOR
A114A
Q1 = D66EV7
Q2 = DUT D94FQ4
1k
D44D6
100
50
A139M
DS0026x2
10
Q2
D38H1
RGE
1-10k
VCC
VCE
10
VCLAMP
(400V MAX)
0.02µF
FIGURE 17. USE THIS LATCHING-CURRENT TESTER TO TEST IGTS NONDESTRUCTIVELY. Q1’S BASE-DRIVE PULSE WIDTH IS GREATER THAN THAT OF THE IGT’S GATE DRIVE, SO THE IGT UNDER TEST IS SWITCHED THROUGH Q1 WHEN REVERSE-BIAS
LATCH-UP OCCURS.
©2002 Fairchild Semiconductor Corporation
Application Note 7511 Rev. A1
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
Bottomless™
CoolFET™
CROSSVOLT™
DenseTrench™
DOME™
EcoSPARK™
E2CMOSTM
EnSignaTM
FACT™
FACT Quiet Series™
FAST â
FASTr™
FRFET™
GlobalOptoisolator™
GTO™
HiSeC™
I2C™
ISOPLANAR™
LittleFET™
MicroFET™
MicroPak™
MICROWIRE™
OPTOLOGIC â
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerTrench â
QFET™
QS™
QT Optoelectronics™
Quiet Series™
SILENT SWITCHER â UHC™
SMART START™
UltraFET â
SPM™
VCX™
STAR*POWER™
Stealth™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
TinyLogic™
TruTranslation™
STAR*POWER is used under license
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NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD
DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT
RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H5